pvclock: Add vDSO support(cherry picked from commit d4b2d3035a23d5dc468d41151487a8299bf45cdc)
hyperv: Add Hygon Dhyana support.Submitted by: Pu Wen <[email protected]>MFC after: 1 weekDifferential revision: https://reviews.freebsd.org/D23563
Use SMAP on amd64.Ifuncs selectors dispatch copyin(9) family to the suitable variant, toset rflags.AC around userspace access. Rflags.AC bit is cleared inall kernel entry points unconditionally
Use SMAP on amd64.Ifuncs selectors dispatch copyin(9) family to the suitable variant, toset rflags.AC around userspace access. Rflags.AC bit is cleared inall kernel entry points unconditionally even on machines notsupporting SMAP.Reviewed by: jhbSponsored by: The FreeBSD FoundationDifferential revision: https://reviews.freebsd.org/D13838
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Rename assym.s to assym.incassym is only to be included by other .s files, and should neveractually be assembled by itself.Reviewed by: imp, bdrewery (earlier)Sponsored by: The FreeBSD Foundati
Rename assym.s to assym.incassym is only to be included by other .s files, and should neveractually be assembled by itself.Reviewed by: imp, bdrewery (earlier)Sponsored by: The FreeBSD FoundationDifferential Revision: https://reviews.freebsd.org/D14180
PTI for amd64.The implementation of the Kernel Page Table Isolation (KPTI) foramd64, first version. It provides a workaround for the 'meltdown'vulnerability. PTI is turned off by default for now
PTI for amd64.The implementation of the Kernel Page Table Isolation (KPTI) foramd64, first version. It provides a workaround for the 'meltdown'vulnerability. PTI is turned off by default for now, enable with theloader tunable vm.pmap.pti=1.The pmap page table is split into kernel-mode table and user-modetable. Kernel-mode table is identical to the non-PTI table, whileusermode table is obtained from kernel table by leaving userspacemappings intact, but only leaving the following parts of the kernelmapped: kernel text (but not modules text) PCPU GDT/IDT/user LDT/task structures IST stacks for NMI and doublefault handlers.Kernel switches to user page table before returning to usermode, andrestores full kernel page table on the entry. Initial kernel-modestack for PTI trampoline is allocated in PCPU, it is only 16qwords. Kernel entry trampoline switches page tables. then thehardware trap frame is copied to the normal kstack, and executioncontinues.IST stacks are kept mapped and no trampoline is needed forNMI/doublefault, but of course page table switch is performed.On return to usermode, the trampoline is used again, iret frame iscopied to the trampoline stack, page tables are switched and iretq isexecuted. The case of iretq faulting due to the invalid usermodecontext is tricky, since the frame for fault is appended to thetrampoline frame. Besides copying the fault frame and original(corrupted) frame to kstack, the fault frame must be patched to makeit look as if the fault occured on the kstack, see the comment indoret_iret detection code in trap().Currently kernel pages which are mapped during trampoline operationare identical for all pmaps. They are registered usingpmap_pti_add_kva(). Besides initial registrations done during boot,LDT and non-common TSS segments are registered if user requested theiruse. In principle, they can be installed into kernel page table perpmap with some work. Similarly, PCPU can be hidden from userspacemapping using trampoline PCPU page, but again I do not see muchbenefits besides complexity.PDPE pages for the kernel half of the user page tables arepre-allocated during boot because we need to know pml4 entries whichare copied to the top-level paging structure page, in advance on a newpmap creation. I enforce this to avoid iterating over the allexisting pmaps if a new PDPE page is needed for PTI kernel mappings.The iteration is a known problematic operation on i386.The need to flush hidden kernel translations on the switch to usermode make global tables (PG_G) meaningless and even harming, so PG_Guse is disabled for PTI case. Our existing use of PCID isincompatible with PTI and is automatically disabled if PTI isenabled. PCID can be forced on only for developer's benefit.MCE is known to be broken, it requires IST stack to operate completelycorrectly even for non-PTI case, and absolutely needs dedicated ISTstack because MCE delivery while trampoline did not switched from PTIstack is fatal. The fix is pending.Reviewed by: markj (partially)Tested by: pho (previous version)Discussed with: jeff, jhbSponsored by: The FreeBSD FoundationMFC after: 2 weeks
hyperv: Update copyright for the files changed in 2017MFC after: 3 daysSponsored by: MicrosoftDifferential Revision: https://reviews.freebsd.org/D11982
hyperv: Add method to read 64bit Hyper-V specific time value.MFC after: 1 weekSponsored by: MicrosoftDifferential Revision: https://reviews.freebsd.org/D9057
hyperv: Implement userspace gettimeofday(2) with Hyper-V reference TSCThis 6 times gettimeofday performance, as measured bytools/tools/syscall_timingReviewed by: kibMFC after: 1 weekSponsored
hyperv: Implement userspace gettimeofday(2) with Hyper-V reference TSCThis 6 times gettimeofday performance, as measured bytools/tools/syscall_timingReviewed by: kibMFC after: 1 weekSponsored by: MicrosoftDifferential Revision: https://reviews.freebsd.org/D8789
hyperv: Allow userland to ro-mmap reference TSC pageThis paves way to implement VDSO for the enlightened time counter.Reviewed by: kibMFC after: 1 weekSponsored by: MicrosoftDifferential Revis
hyperv: Allow userland to ro-mmap reference TSC pageThis paves way to implement VDSO for the enlightened time counter.Reviewed by: kibMFC after: 1 weekSponsored by: MicrosoftDifferential Revision: https://reviews.freebsd.org/D8768
hyperv: Implement "enlightened" time counter, which is rdtsc based.Reviewed by: kibMFC after: 1 weekSponsored by: MicrosoftDifferential Revision: https://reviews.freebsd.org/D8763
hyperv: Move machine dependent bits into machine dependent files.MFC after: 1 weekSponsored by: Microsoft OSTCDifferential Revision: https://reviews.freebsd.org/D6701
hyperv: Rename some cleaned up/almost cleaned up filesMFC after: 1 weekSponsored by: Microsoft OSTC
hyperv/vmbus: Rename ISR functionsMFC after: 1 weekSponsored by: Microsoft OSTCDifferential Revision: https://reviews.freebsd.org/D6601
hyperv: Deprecate HYPERV option by moving Hyper-V IDT vector into vmbusSubmitted by: Jun Su <junsu microsoft com>Reviewed by: jhb, kib, sepheSponsored by: Microsoft OSTCDifferential Revision: ht
hyperv: Deprecate HYPERV option by moving Hyper-V IDT vector into vmbusSubmitted by: Jun Su <junsu microsoft com>Reviewed by: jhb, kib, sepheSponsored by: Microsoft OSTCDifferential Revision: https://reviews.freebsd.org/D5910