[POWERPC] msun: fix incorrect flag in fesetexceptflagFix incorrect mask being used when FE_INVALID bit is wanted by user.The problem was noticed thanks to msun fenv tests.Reviewed by: jhibbits,
[POWERPC] msun: fix incorrect flag in fesetexceptflagFix incorrect mask being used when FE_INVALID bit is wanted by user.The problem was noticed thanks to msun fenv tests.Reviewed by: jhibbits, luporlSponsored by: Eldorado Research Institute (eldorado.org.br)Differential Revision: https://reviews.freebsd.org/D27201
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[PowerPC] Fix feholdexcept() on powerpc referencing the wrong struct memberIn r355656, endianness handling of the floating point environment was fixedin the PowerPC code to work as intended.Howe
[PowerPC] Fix feholdexcept() on powerpc referencing the wrong struct memberIn r355656, endianness handling of the floating point environment was fixedin the PowerPC code to work as intended.However, one bit got missed, causing feholdexcept() to mis-save the fenv.Submitted by: Renato Riolino <[email protected]>Differential Revision: https://reviews.freebsd.org/D23382
[PowerPC] Fix SPE floating point environment manipulationFix multiple problems in the powerpcspe floating point code.* Endianness handling of the SPEFSCR in fenv.h was completely broken.* Ensure
[PowerPC] Fix SPE floating point environment manipulationFix multiple problems in the powerpcspe floating point code.* Endianness handling of the SPEFSCR in fenv.h was completely broken.* Ensure SPEFSCR synchronization requirements are being met.The __r.__d -> __r transformations were written by jhibbits.Reviewed by: jhibbitsDifferential Revision: https://reviews.freebsd.org/D22526
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorpr
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorprone - task.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.
Create a new MACHINE_ARCH for Freescale PowerPC e500v2Summary:The Freescale e500v2 PowerPC core does not use a standard FPU.Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector p
Create a new MACHINE_ARCH for Freescale PowerPC e500v2Summary:The Freescale e500v2 PowerPC core does not use a standard FPU.Instead, it uses a Signal Processing Engine (SPE)--a DSP-style vector processorunit, which doubles as a FPU. The PowerPC SPE ABI is incompatible with thestock powerpc ABI, so a new MACHINE_ARCH was created to deal with this.Additionaly, the SPE opcodes overlap with Altivec, so these are mutuallyexclusive. Taking advantage of this fact, a new file, powerpc/booke/spe.c, wascreated with the same function set as in powerpc/powerpc/altivec.c, so itbecomes effectively a drop-in replacement. setjmp/longjmp were modified to savethe upper 32-bits of the now-64-bit GPRs (upper 32-bits are only accessible bythe SPE).Note: This does _not_ support the SPE in the e500v1, as the e500v1 SPE does notsupport double-precision floating point.Also, without a new MACHINE_ARCH it would be impossible to provide binarypackages which utilize the SPE.Additionally, no work has been done to support ports, work is needed for this.This also means no newer gcc can yet be used. However, gcc's powerpc supporthas been refactored which would make adding a powerpcspe-freebsd target veryeasy.Test Plan:This was lightly tested on a RouterBoard RB800 and an AmigaOne A1222(P1022-based) board, compiled against the new ABI. Base system utilities(/bin/sh, /bin/ls, etc) still function appropriately, the system is able to bootmultiuser.Reviewed By: bdrewery, impRelnotes: yesDifferential Revision: https://reviews.freebsd.org/D5683
Make FPSCR definition endian clean.PR: 207526Submitted by: Simon ByrneObtained from: JuliaMFC after: 1 month
Use #include "fenv.h" instead of #include <fenv.h>. This makes itmore convenient to compile the math library by itself.Requested by: bde
Provide external definitions of all of the standardized functions infenv.h that are currently inlined.The definitions are provided in fenv.c via 'extern inline'declaractions. This assumes the co
Provide external definitions of all of the standardized functions infenv.h that are currently inlined.The definitions are provided in fenv.c via 'extern inline'declaractions. This assumes the compiler handles 'extern inline' asspecified in C99, which has been true under FreeBSD since 8.0.The goal is to eventually remove the 'static' keyword from the inlinedefinitions in fenv.h, so that non-inlined references all wind uppointing to the same external definition like they're supposed to.I am deferring the second step to provide a window wherenewly-compiled apps will still link against old math libraries.(This isn't supported, but there's no need to cause undue breakage.)Reviewed by: stefanf, bde
Let PowerPC world optionally build with -msoft-float. For FPU-less PowerPCvariations (e500 currently), this provides a gcc-level FPU emulation and is analternative approach to the recently introduc
Let PowerPC world optionally build with -msoft-float. For FPU-less PowerPCvariations (e500 currently), this provides a gcc-level FPU emulation and is analternative approach to the recently introduced kernel-level emulation(FPU_EMU).Approved by: cognet (mentor)MFp4: e500
Use C comments since we now preprocess these files with CPP.
Add symbol versioning to libm.
Replace fegetmask() and fesetmask() with feenableexcept(),fedisableexcept(), and fegetexcept(). These two sets of routinesprovide the same functionality. I implemented the former as anundocument
Replace fegetmask() and fesetmask() with feenableexcept(),fedisableexcept(), and fegetexcept(). These two sets of routinesprovide the same functionality. I implemented the former as anundocumented internal interface to make the regression test easier towrite. However, fe(enable|disable|get)except() is already part ofglibc, and I would like to avoid gratuitous differences. The onlymajor flaw in the glibc API is that there's no good way to reporterrors on processors that don't support all the unmasked exceptions.
Define the LDBL_PREC to be the number of significant bits in a longdouble's mantissa.
Mark all inline asms that read the floating-point control or statusregisters as volatile. Instructions that *wrote* to FP state werealready marked volatile, but apparently gcc has license to move
Mark all inline asms that read the floating-point control or statusregisters as volatile. Instructions that *wrote* to FP state werealready marked volatile, but apparently gcc has license to movenon-volatile asms past volatile asms. This broke amd64's feupdateenvat -O2 due to a WAR conflict between fnstsw and fldenv there.
Add an fenv.h implementation for the powerpc port.Reviewed by: standards@