Add CFI start/end proc directives to arm64, i386, and ppcFollow-up to r353959 and r368070: do the same for other architectures.arm32 already seems to use its own .fnstart/.fnend directives, which
Add CFI start/end proc directives to arm64, i386, and ppcFollow-up to r353959 and r368070: do the same for other architectures.arm32 already seems to use its own .fnstart/.fnend directives, whichappear to be ARM-specific variants of the same thing. Likewise, MIPSuses .frame directives.Reviewed by: arichardsonDifferential Revision: https://reviews.freebsd.org/D27387
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Remove libthr, csu, libthread_db and testfloat sparc64 specific directories.Submitted by: kib@ (libthr)
libthr: Add missing END() directive for umtx_op_err (amd64)Like r353929, related to D22122. No functional change.Reviewed by: emaste, kib (earlier version both)
RISC-V: Fix an alignment warning in libthrCompiling with clang gives a loss-of-alignment error due the cast touint8_t *. Since the TLS is always tcb aligned and TP_OFFSET is definedas sizeof(stru
RISC-V: Fix an alignment warning in libthrCompiling with clang gives a loss-of-alignment error due the cast touint8_t *. Since the TLS is always tcb aligned and TP_OFFSET is definedas sizeof(struct tcb) we can guarantee there is no misalignment. Silencethe error by moving the offset into the inline assembly.Reviewed by: brMFC after: 1 weekDifferential Revision: https://reviews.freebsd.org/D21926
Implement _umtx_op_err.S on powerpc / powerpc64.As per r177853, we need to avoid using errno inside user mutex code, since signal handlers can interfere with it and mess up libthr internal state.
Implement _umtx_op_err.S on powerpc / powerpc64.As per r177853, we need to avoid using errno inside user mutex code, since signal handlers can interfere with it and mess up libthr internal state.So, implement _umtx_op_err() instead, which makes a raw syscall andreturns the error value directly instead of using errno.Approved by: jhibbits (mentor)Differential Revision: https://reviews.freebsd.org/D20946
Fix initial exec TLS mode for dynamically loaded shared objects.If dso uses initial exec TLS mode, rtld tries to allocate TLS instatic space. If there is no space left, the dlopen(3) fails. If spa
Fix initial exec TLS mode for dynamically loaded shared objects.If dso uses initial exec TLS mode, rtld tries to allocate TLS instatic space. If there is no space left, the dlopen(3) fails. If spaceif allocated, initial content from PT_TLS segment is distributed toall threads' pcbs, which was missed and caused un-initialized TLSsegment for such dso after dlopen(3).The mode is auto-detected either due to the relocation used, or if theDF_STATIC_TLS dynamic flag is set. In the later case, the TLS segmentis tried to allocate earlier, which increases chance of the dlopen(3)to succeed. LLD was recently fixed to properly emit the flag, ld.bdfdid it always.Initial test by: dumbbellTested by: emaste (amd64), ian (arm)Tested by: Gerald Aryeetey <aryeeteygerald_rogers.com> (arm64)Sponsored by: The FreeBSD FoundationMFC after: 2 weeksDifferential revision: https://reviews.freebsd.org/D19072
silence cast-align warnings from clang on powerpc64silence the following warning when compiling libthr with clang 8for powerpc64 architecture:usr/src/lib/libthr/arch/powerpc/include/pthread_md.h
silence cast-align warnings from clang on powerpc64silence the following warning when compiling libthr with clang 8for powerpc64 architecture:usr/src/lib/libthr/arch/powerpc/include/pthread_md.h:82:10: error:cast from 'uint8_t *' (aka 'unsigned char *') to 'struct tcb *'increases required alignment from 1 to 8 [-Werror,-Wcast-align]82: return ((struct tcb *)(_tp - TP_OFFSET));Submitted by: alfredo.junior_eldorado.org.brReviewed by: git_bdragon.rtk0.net, emaste, kib, jhibbits, luporlDifferential Revision: https://reviews.freebsd.org/D18807
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorpr
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorprone - task.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.
Fix misleading comment.Not a functional change.MFC after: 3 days
libthr: fix warnings at WARNS=6Fix more warnings about redundant declarations.Reviewed by: kib emasteMFC after: 3 daysSponsored by: Dell EMCDifferential Revision: https://reviews.freebsd.org/D
libthr: fix warnings at WARNS=6Fix more warnings about redundant declarations.Reviewed by: kib emasteMFC after: 3 daysSponsored by: Dell EMCDifferential Revision: https://reviews.freebsd.org/D10932
[mips] convert over =v to =r for the inline assembly.Later gcc and clang have deprecated =v (which maps to a specific tempregister) and instead we should just use =r to have the assembler(hopeful
[mips] convert over =v to =r for the inline assembly.Later gcc and clang have deprecated =v (which maps to a specific tempregister) and instead we should just use =r to have the assembler(hopefully!) save/restore things appropriately after choosinga register.Tested:* AR9344 SoC, with userreg support* AR9331 SoC, with no userreg supportSponsored by: Sponsored by: DARPA, AFRL (MIPS TLS user register work)
[mips] add support for using the MIPS user register for TLS data.This work, originally from Stacey Son, uses the MIPS UserReg forreading the TLS data, and will fall back to the normal syscall path
[mips] add support for using the MIPS user register for TLS data.This work, originally from Stacey Son, uses the MIPS UserReg forreading the TLS data, and will fall back to the normal syscall pathwhen it isn't supported.This code dynamically patches cpu_switch() to bypass the UserReginstruction so to avoid generating a machine exception.Thanks to sson for the original work, and to Dan Nelson forbringing it to date and testing it on MIPS32 with me.Tested:* mips64 (sson)* mips74k ([email protected]) - AR9344 SoC, UserReg support* mips24k (adrian) - AR9331 SoC, no UserReg supportObtained from: sson, [email protected]
Unmagic the thread pointer offset.
Add pthread MD part for RISC-V.Reviewed by: andrewSponsored by: DARPA, AFRLSponsored by: HEIF5Differential Revision: https://reviews.freebsd.org/D5063
Start support for the RISC-V 64-bit architecture developed by UC Berkeley.RISC-V is a new ISA designed to support computer research and education, andis now become a standard open architecture for
Start support for the RISC-V 64-bit architecture developed by UC Berkeley.RISC-V is a new ISA designed to support computer research and education, andis now become a standard open architecture for industry implementations.This is a minimal set of changes required to run 'make kernel-toolchain'using external (GNU) toolchain.The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv.Reviewed by: andrew, bdrewery, emaste, impSponsored by: DARPA, AFRLSponsored by: HEIF5Differential Revision: https://reviews.freebsd.org/D4445
Disable SSE in libthrClang emits SSE instructions on amd64 in the common path ofpthread_mutex_unlock. If the thread does not otherwise use SSE,this usage incurs a context-switch of the FPU/SSE s
Disable SSE in libthrClang emits SSE instructions on amd64 in the common path ofpthread_mutex_unlock. If the thread does not otherwise use SSE,this usage incurs a context-switch of the FPU/SSE state, whichreduces the performance of multiple real-world applications by anon-trivial amount (3-5% in one application).Instead of this change, I experimented with eagerly switching theFPU state at context-switch time. This did not help. Most of thecost seems to be in the read/write of memory--as kib@ stated--andnot in the #NM handling. I tested on machines with and withoutXSAVEOPT.One counter-argument to this change is that most applications alreadyuse SIMD, and the number of applications and amount of SIMD usageare only increasing. This is absolutely true. I agree that--ingeneral and in principle--this change is in the wrong direction.However, there are applications that do not use enough SSE to offsetthe extra context-switch cost. SSE does not provide a clear benefitin the current libthr code with the current compiler, but it doesprovide a clear loss in some cases. Therefore, disabling SSE inlibthr is a non-loss for most, and a gain for some.I refrained from disabling SSE in libc--as was suggested--becauseI can't make the above argument for libc. It provides a wide varietyof code; each case should be analyzed separately.https://lists.freebsd.org/pipermail/freebsd-current/2015-March/055193.htmlSuggestions from: dim, jmg, rpauloApproved by: kib (mentor)MFC after: 2 weeksSponsored by: Dell Inc.
Add pthread_md.h for arm64.Differential Revision: https://reviews.freebsd.org/D2137Reviewed by: kibSponsored by: The FreeBSD Foundation
Start to import support for the AArch64 architecture from ARM. This changeonly adds support for kernel-toolchain, however it is expected furtherchanges to add kernel and userland support will be co
Start to import support for the AArch64 architecture from ARM. This changeonly adds support for kernel-toolchain, however it is expected furtherchanges to add kernel and userland support will be committed as they arereviewed.As our copy of binutils is too old the devel/aarch64-binutils port needsto be installed to pull in a linker.To build either TARGET needs to be set to arm64, or TARGET_ARCH set toaarch64. The latter is set so uname -p will return aarch64 as existingthird party software expects this.Differential Revision: https://reviews.freebsd.org/D2005Relnotes: YesSponsored by: The FreeBSD Foundation
Merge all the copies of _tcb_ctor and _tcb_dtor.The amd64, i386, and sparc64 versions were identical, with the onedifference where the former two used inline asm instead of _tcb_get. Ihave compar
Merge all the copies of _tcb_ctor and _tcb_dtor.The amd64, i386, and sparc64 versions were identical, with the onedifference where the former two used inline asm instead of _tcb_get. Ihave compared the function before and after replacing the asm with _tcb_getand found the object files to be identical.The arm, mips, and powerpc versions were almost identical. The onlydifference was the powerpc version used an alignment of 1 where arm andmips used 16. As this is an increase in alignment is will be safe.Along with this arm, mips, and powerpc all passed, when initial was true,the value returned from _tcb_get as the first argument to_rtld_allocate_tls. This would then return this pointer back to the caller.We can remove these extra calls by checking if initial is set and settingthe thread control block directly. As this is what the sparc64 code doeswe can use it directly.As after these observations all the architectures can now have identicalcode we can merge them into a common file.Differential Revision: https://reviews.freebsd.org/D1556Reviewed by: kibSponsored by: The FreeBSD Foundation
Avoid use of register variables. Clang 3.5 treats this as undefined behavior,and bad things happen.MFC after: 1 week
Remove ia64.This includes:o All directories named *ia64*o All files named *ia64*o All ia64-specific code guarded by __ia64__o All ia64-specific makefile logico Mention of ia64 in com
Remove ia64.This includes:o All directories named *ia64*o All files named *ia64*o All ia64-specific code guarded by __ia64__o All ia64-specific makefile logico Mention of ia64 in comments and documentationThis excludes:o Everything under contrib/o Everything under crypto/o sys/xen/interfaceo sys/sys/elf_common.hDiscussed at: BSDcan
Merging of projects/armv6, part 2Handle TLS for ARMv6 and ARMv7
- Switch to saving non-offseted pointer to TLS block in order too keep things simple
Add thread-local storage support for arm:- Switch to Variant I TCB layout- Use function from rtld for TCB allocation/deallocation
Switch MIPS TLS implementation to Variant I:Save pointer to the TLS structure taking into account TP_OFFSETand TCB structure size.
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