History log of /freebsd-12.1/sys/powerpc/fpu/fpu_explode.c (Results 1 – 6 of 6)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: release/12.2.0, release/11.4.0, release/12.1.0, release/11.3.0, release/12.0.0, release/11.2.0
# 51369649 20-Nov-2017 Pedro F. Giffuni <[email protected]>

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for

sys: further adoption of SPDX licensing ID tags.

Mainly focus on files that use BSD 3-Clause license.

The Software Package Data Exchange (SPDX) group provides a specification
to make it easier for automated tools to detect and summarize well known
opensource licenses. We are gradually adopting the specification, noting
that the tags are considered only advisory and do not, in any way,
superceed or replace the license texts.

Special thanks to Wind River for providing access to "The Duke of
Highlander" tool: an older (2014) run over FreeBSD tree was useful as a
starting point.

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Revision tags: release/10.4.0, release/11.1.0, release/11.0.1, release/11.0.0, release/10.3.0
# aa59d767 04-Feb-2016 John Baldwin <[email protected]>

Fix build of powerpc FPU emulator after changes in r295132 to restore the
ABI of struct fpreg. The FPU emulator operates on the "raw" FPU state
stored in the pcb rather than the "cooked" fpreg state

Fix build of powerpc FPU emulator after changes in r295132 to restore the
ABI of struct fpreg. The FPU emulator operates on the "raw" FPU state
stored in the pcb rather than the "cooked" fpreg state used for ptrace()
and cores.

Reported by: bz

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Revision tags: release/10.2.0
# 35f612b8 22-Feb-2015 Nathan Whitehorn <[email protected]>

Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7
and POWER8. This instruction set unifies the 32 64-bit scalar floating
point registers with the 32 128-bit vector registers in

Kernel support for the Vector-Scalar eXtension (VSX) found on the POWER7
and POWER8. This instruction set unifies the 32 64-bit scalar floating
point registers with the 32 128-bit vector registers into a single bank
of 64 128-bit registers. Kernel support mostly amounts to saving and
restoring the wider version of the floating point registers and making
sure that both scalar FP and vector registers are enabled once a VSX
instruction is executed. get_mcontext() and friends currently cannot
see the high bits, which will require a little more work.

As the system compiler (GCC 4.2) does not support VSX, making use of this
from userland requires either newer GCC or clang.

Relnotes: yes
Sponsored by: FreeBSD Foundation

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Revision tags: release/10.1.0, release/9.3.0, release/10.0.0
# b8201e1c 17-Nov-2013 Nathan Whitehorn <[email protected]>

Make single precision floating point arithmetic actually work -- I think
it never did -- and fix an obvious missing line. Floating point emulation
on Book-E still needs some work but this gets it bas

Make single precision floating point arithmetic actually work -- I think
it never did -- and fix an obvious missing line. Floating point emulation
on Book-E still needs some work but this gets it basically functional on
soft-FPU systems (hard FPU for Book-E is not yet implemented).

MFC after: 1 week

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Revision tags: release/9.2.0, release/8.4.0, release/9.1.0, release/8.3.0, release/7.4.0, release/8.2.0, release/8.1.0, release/7.3.0, release/8.0.0, release/7.2.0, release/7.1.0, release/6.4.0
# 2aa95ace 09-Apr-2008 Peter Grehan <[email protected]>

Include <sys/types.h> before <sys/systm.h> to get typedefs required
by new atomic.h. Fixes tinderbox LINT build.


Revision tags: release/7.0.0
# 7e76048a 23-Feb-2008 Marcel Moolenaar <[email protected]>

Add a floating-point emulator so that a single userland or single ABI
can run on processors that don't have a FPU. This is typically the
case for Book E processors. While a tuned system will probably

Add a floating-point emulator so that a single userland or single ABI
can run on processors that don't have a FPU. This is typically the
case for Book E processors. While a tuned system will probably want
to use soft-float (or use a processor that has a FPU if the usage is
FP intensive enough), allowing hard-float on FPU-less systems gives
great portability and flexibility.

Obtained from: NetBSD

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