| f6f7bec6 | 05-Feb-2018 |
Adrian Chadd <[email protected]> |
[arswitch] disable ARP copy-to-CPU port for AR9340 for now.
I'll have to go double check to see if it does indeed pass ARP frames between switch ports with this disabled, but it seems required for t
[arswitch] disable ARP copy-to-CPU port for AR9340 for now.
I'll have to go double check to see if it does indeed pass ARP frames between switch ports with this disabled, but it seems required for the CPU port to see ARP traffic.
I'll dig into this some more.
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| f76883d6 | 05-Feb-2018 |
Adrian Chadd <[email protected]> |
[arswitch] Enable ATU dump support for the AR9340.
This indeed uses the same registers as the AR8216 and later chips.
There seems to be an issue with ARP requests being sent out from the CPU throug
[arswitch] Enable ATU dump support for the AR9340.
This indeed uses the same registers as the AR8216 and later chips.
There seems to be an issue with ARP requests being sent out from the CPU through this switch here, so figuring that out is next. Learning works fine on the AR8327 ethernet switch on the /other/ gigabit ethernet port, so I don't think it's the network stack or ethernet driver.
Tested:
* DB120 - AR9340 SOC + ethernet switch (and other bits.)
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| 2c6cecca | 31-Jan-2018 |
Adrian Chadd <[email protected]> |
[arswitch] Fix ATU flushing on AR8216/AR8316 and most of the later chips.
The switch hardware requires this bit to be set in order to kick start the actual ATU update. This was being masked on some
[arswitch] Fix ATU flushing on AR8216/AR8316 and most of the later chips.
The switch hardware requires this bit to be set in order to kick start the actual ATU update. This was being masked on some chips by the learning programming (what to do when a MAC address moves, hash table collision, etc) which is currently inconsistent between chips.
Tested:
* AR9344 SoC (AR7240 style switch internal)
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