MFC r345703:Fix initial exec TLS mode for dynamically loaded shared objects.
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorpr
lib: further adoption of SPDX licensing ID tags.Mainly focus on files that use BSD 2-Clause license, however the tool Iwas using mis-identified many licenses so this was mostly a manual - errorprone - task.The Software Package Data Exchange (SPDX) group provides a specificationto make it easier for automated tools to detect and summarize well knownopensource licenses. We are gradually adopting the specification, notingthat the tags are considered only advisory and do not, in any way,superceed or replace the license texts.
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Fix misleading comment.Not a functional change.MFC after: 3 days
libthr: fix warnings at WARNS=6Fix more warnings about redundant declarations.Reviewed by: kib emasteMFC after: 3 daysSponsored by: Dell EMCDifferential Revision: https://reviews.freebsd.org/D
libthr: fix warnings at WARNS=6Fix more warnings about redundant declarations.Reviewed by: kib emasteMFC after: 3 daysSponsored by: Dell EMCDifferential Revision: https://reviews.freebsd.org/D10932
[mips] convert over =v to =r for the inline assembly.Later gcc and clang have deprecated =v (which maps to a specific tempregister) and instead we should just use =r to have the assembler(hopeful
[mips] convert over =v to =r for the inline assembly.Later gcc and clang have deprecated =v (which maps to a specific tempregister) and instead we should just use =r to have the assembler(hopefully!) save/restore things appropriately after choosinga register.Tested:* AR9344 SoC, with userreg support* AR9331 SoC, with no userreg supportSponsored by: Sponsored by: DARPA, AFRL (MIPS TLS user register work)
[mips] add support for using the MIPS user register for TLS data.This work, originally from Stacey Son, uses the MIPS UserReg forreading the TLS data, and will fall back to the normal syscall path
[mips] add support for using the MIPS user register for TLS data.This work, originally from Stacey Son, uses the MIPS UserReg forreading the TLS data, and will fall back to the normal syscall pathwhen it isn't supported.This code dynamically patches cpu_switch() to bypass the UserReginstruction so to avoid generating a machine exception.Thanks to sson for the original work, and to Dan Nelson forbringing it to date and testing it on MIPS32 with me.Tested:* mips64 (sson)* mips74k ([email protected]) - AR9344 SoC, UserReg support* mips24k (adrian) - AR9331 SoC, no UserReg supportObtained from: sson, [email protected]
Unmagic the thread pointer offset.
Add pthread MD part for RISC-V.Reviewed by: andrewSponsored by: DARPA, AFRLSponsored by: HEIF5Differential Revision: https://reviews.freebsd.org/D5063
Start support for the RISC-V 64-bit architecture developed by UC Berkeley.RISC-V is a new ISA designed to support computer research and education, andis now become a standard open architecture for
Start support for the RISC-V 64-bit architecture developed by UC Berkeley.RISC-V is a new ISA designed to support computer research and education, andis now become a standard open architecture for industry implementations.This is a minimal set of changes required to run 'make kernel-toolchain'using external (GNU) toolchain.The FreeBSD/RISC-V project home: https://wiki.freebsd.org/riscv.Reviewed by: andrew, bdrewery, emaste, impSponsored by: DARPA, AFRLSponsored by: HEIF5Differential Revision: https://reviews.freebsd.org/D4445
Disable SSE in libthrClang emits SSE instructions on amd64 in the common path ofpthread_mutex_unlock. If the thread does not otherwise use SSE,this usage incurs a context-switch of the FPU/SSE s
Disable SSE in libthrClang emits SSE instructions on amd64 in the common path ofpthread_mutex_unlock. If the thread does not otherwise use SSE,this usage incurs a context-switch of the FPU/SSE state, whichreduces the performance of multiple real-world applications by anon-trivial amount (3-5% in one application).Instead of this change, I experimented with eagerly switching theFPU state at context-switch time. This did not help. Most of thecost seems to be in the read/write of memory--as kib@ stated--andnot in the #NM handling. I tested on machines with and withoutXSAVEOPT.One counter-argument to this change is that most applications alreadyuse SIMD, and the number of applications and amount of SIMD usageare only increasing. This is absolutely true. I agree that--ingeneral and in principle--this change is in the wrong direction.However, there are applications that do not use enough SSE to offsetthe extra context-switch cost. SSE does not provide a clear benefitin the current libthr code with the current compiler, but it doesprovide a clear loss in some cases. Therefore, disabling SSE inlibthr is a non-loss for most, and a gain for some.I refrained from disabling SSE in libc--as was suggested--becauseI can't make the above argument for libc. It provides a wide varietyof code; each case should be analyzed separately.https://lists.freebsd.org/pipermail/freebsd-current/2015-March/055193.htmlSuggestions from: dim, jmg, rpauloApproved by: kib (mentor)MFC after: 2 weeksSponsored by: Dell Inc.
Add pthread_md.h for arm64.Differential Revision: https://reviews.freebsd.org/D2137Reviewed by: kibSponsored by: The FreeBSD Foundation
Start to import support for the AArch64 architecture from ARM. This changeonly adds support for kernel-toolchain, however it is expected furtherchanges to add kernel and userland support will be co
Start to import support for the AArch64 architecture from ARM. This changeonly adds support for kernel-toolchain, however it is expected furtherchanges to add kernel and userland support will be committed as they arereviewed.As our copy of binutils is too old the devel/aarch64-binutils port needsto be installed to pull in a linker.To build either TARGET needs to be set to arm64, or TARGET_ARCH set toaarch64. The latter is set so uname -p will return aarch64 as existingthird party software expects this.Differential Revision: https://reviews.freebsd.org/D2005Relnotes: YesSponsored by: The FreeBSD Foundation
Merge all the copies of _tcb_ctor and _tcb_dtor.The amd64, i386, and sparc64 versions were identical, with the onedifference where the former two used inline asm instead of _tcb_get. Ihave compar
Merge all the copies of _tcb_ctor and _tcb_dtor.The amd64, i386, and sparc64 versions were identical, with the onedifference where the former two used inline asm instead of _tcb_get. Ihave compared the function before and after replacing the asm with _tcb_getand found the object files to be identical.The arm, mips, and powerpc versions were almost identical. The onlydifference was the powerpc version used an alignment of 1 where arm andmips used 16. As this is an increase in alignment is will be safe.Along with this arm, mips, and powerpc all passed, when initial was true,the value returned from _tcb_get as the first argument to_rtld_allocate_tls. This would then return this pointer back to the caller.We can remove these extra calls by checking if initial is set and settingthe thread control block directly. As this is what the sparc64 code doeswe can use it directly.As after these observations all the architectures can now have identicalcode we can merge them into a common file.Differential Revision: https://reviews.freebsd.org/D1556Reviewed by: kibSponsored by: The FreeBSD Foundation
Avoid use of register variables. Clang 3.5 treats this as undefined behavior,and bad things happen.MFC after: 1 week
Remove ia64.This includes:o All directories named *ia64*o All files named *ia64*o All ia64-specific code guarded by __ia64__o All ia64-specific makefile logico Mention of ia64 in com
Remove ia64.This includes:o All directories named *ia64*o All files named *ia64*o All ia64-specific code guarded by __ia64__o All ia64-specific makefile logico Mention of ia64 in comments and documentationThis excludes:o Everything under contrib/o Everything under crypto/o sys/xen/interfaceo sys/sys/elf_common.hDiscussed at: BSDcan
Merging of projects/armv6, part 2Handle TLS for ARMv6 and ARMv7
- Switch to saving non-offseted pointer to TLS block in order too keep things simple
Add thread-local storage support for arm:- Switch to Variant I TCB layout- Use function from rtld for TCB allocation/deallocation
Switch MIPS TLS implementation to Variant I:Save pointer to the TLS structure taking into account TP_OFFSETand TCB structure size.
The TCB_GET32() and TCB_GET64() macros in the i386 and amd64-specificversions of pthread_md.h have a special case of dereferencing a nullpointer. Clang warns about this with:In file included fro
The TCB_GET32() and TCB_GET64() macros in the i386 and amd64-specificversions of pthread_md.h have a special case of dereferencing a nullpointer. Clang warns about this with:In file included from lib/libthr/arch/i386/i386/pthread_md.c:36:lib/libthr/arch/i386/include/pthread_md.h:96:10: error: indirection of non-volatile null pointer will be deleted, not trap [-Werror,-Wnull-dereference] return (TCB_GET32(tcb_self)); ^~~~~~~~~~~~~~~~~~~lib/libthr/arch/i386/include/pthread_md.h:73:13: note: expanded from: : "m" (*(u_int *)(__tcb_offset(name)))); \ ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~lib/libthr/arch/i386/include/pthread_md.h:96:10: note: consider using __builtin_trap() or qualifying pointer with 'volatile'Since this indirection is done relative to the fs or gs segment, toretrieve thread-specific data, it is an exception to the rule.Therefore, add a volatile qualifier to tell the compiler we really wantto dereference a zero address.MFC after: 1 week
Merge from r161730:o Set TP using inline assembly to avoid dead code elimination.o Eliminate _tcb.Merge from r161840:Stylize: avoid using a global register variable.Merge from r157461:Simpl
Merge from r161730:o Set TP using inline assembly to avoid dead code elimination.o Eliminate _tcb.Merge from r161840:Stylize: avoid using a global register variable.Merge from r157461:Simplify _get_curthread() and _tcb_ctor because libc and rtld nowalready allocate thread pointer space in tls block for initial thread.Merge from r177853:Replace function _umtx_op with _umtx_op_err, the later function directlyreturns errno, because errno can be mucked by user's signal handler andmost of pthread api heavily depends on errno to be correct, this changeshould improve stability of the thread library.MFC after: 1 week
Add section .note.GNU-stack for assembly files used by 386 and amd64.
Merge from tbemd, with a small amount of rework:For all libthr contexts, use ${MACHINE_CPUARCH}for all libc contexts, use ${MACHINE_ARCH} if it exists, otherwise use${MACHINE_CPUARCH}Move some co
Merge from tbemd, with a small amount of rework:For all libthr contexts, use ${MACHINE_CPUARCH}for all libc contexts, use ${MACHINE_ARCH} if it exists, otherwise use${MACHINE_CPUARCH}Move some common code up a layer (the .PATH statement was the same inall the arch submakefiles).# Hope she hasn't busted powerpc64 with this...
Unify 32-bit and 64-bit PowerPC libthr support. This reduces codeduplication, and simplifies the TBEMD import.Requested by: imp
Fix SVN mismerge. We somehow ended up with the 32-bit powerpc versionin arch/powerpc64 instead of the 64-bit one.
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