| e7ef133d | 17-Aug-2021 |
Juraj Linkeš <[email protected]> |
config/arm: make N2 crypto an optional feature
Not all Neoverse-N2 CPUs must support the crypto feature/extension
which makes it an optional feature.
Only enable the feature for SoCs which support i
config/arm: make N2 crypto an optional feature
Not all Neoverse-N2 CPUs must support the crypto feature/extension
which makes it an optional feature.
Only enable the feature for SoCs which support it.
Signed-off-by: Juraj Linkeš <[email protected]>
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| 5aa9189d | 28-Jun-2021 |
Chengwen Feng <[email protected]> |
config/arm: fix SVE build with GCC 8.3
If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler is gcc-8.3, it will produce this error:
In file included from lib/eal/co
config/arm: fix SVE build with GCC 8.3
If the target machine has SVE feature (e.g. "-march=armv8.2-a+sve'),
and the compiler is gcc-8.3, it will produce this error:
In file included from lib/eal/common/eal_common_options.c:38:
lib/eal/arm/include/rte_vect.h:13:10: fatal error:
arm_sve.h: No such file or directory
#include <arm_sve.h>
^~~~~~~~~~~
The root cause is that gcc-8.3 supports SVE (the macro
__ARM_FEATURE_SVE was 1), but it doesn't support SVE ACLE [1].
The solution:
a) Detect compiler whether support SVE ACLE, if support then define
RTE_HAS_SVE_ACLE macro.
b) Use the RTE_HAS_SVE_ACLE macro to include SVE header file.
[1] ACLE: Arm C Language Extensions, the SVE ACLE header file is
<arm_sve.h>, user should include it when writing ACLE SVE code.
Fixes: 67b68824a82d ("lpm/arm: support SVE")
Cc: [email protected]
Signed-off-by: Chengwen Feng <[email protected]>
Acked-by: Ruifeng Wang <[email protected]>
Signed-off-by: Thomas Monjalon <[email protected]>
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| e754875c | 07-Jul-2021 |
Juraj Linkeš <[email protected]> |
config/arm: add aarch32 cross-compilation
Create meson cross file arm32_armv8a_linux_gcc. Use arm-linux-gnueabihf-
toolset which comes with standard packages on most used systems, such as
Ubuntu and
config/arm: add aarch32 cross-compilation
Create meson cross file arm32_armv8a_linux_gcc. Use arm-linux-gnueabihf-
toolset which comes with standard packages on most used systems, such as
Ubuntu and CentOS.
Signed-off-by: Juraj Linkeš <[email protected]>
Acked-by: Ruifeng Wang <[email protected]>
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| bf66003b | 06-Jul-2021 |
Juraj Linkeš <[email protected]> |
build: use platform for generic and native builds
The current meson option 'machine' should only specify the ISA, which is
not sufficient for Arm, where setting ISA implies other settings as well
(a
build: use platform for generic and native builds
The current meson option 'machine' should only specify the ISA, which is
not sufficient for Arm, where setting ISA implies other settings as well
(and is used in Arm configuration as such).
Use the existing 'platform' meson option to differentiate the type of
the build (native/generic) and set ISA accordingly, unless the user
chooses to override it with a new option, 'cpu_instruction_set'.
The 'machine' option set the ISA in x86 builds and set native/default
'build type' in aarch64 builds. These two new variables, 'platform' and
'cpu_instruction_set', now properly set both ISA and build type for all
architectures in a uniform manner.
The 'machine' option also doesn't describe very well what it sets. The
new option, 'cpu_instruction_set', is much more descriptive. Keep
'machine' for backwards compatibility.
Signed-off-by: Juraj Linkeš <[email protected]>
Acked-by: Bruce Richardson <[email protected]>
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| 8f5ea6a4 | 14-Apr-2021 |
Juraj Linkeš <[email protected]> |
config/arm: fix implementer and its SoCs
Fix the implementer and part number of DPAA and ARMADA SoCs.
The current values of 16 cores and 1 NUMA node don't cover all SoCs from
the Arm implementer, e.
config/arm: fix implementer and its SoCs
Fix the implementer and part number of DPAA and ARMADA SoCs.
The current values of 16 cores and 1 NUMA node don't cover all SoCs from
the Arm implementer, e.g. Taishan 2280 has 64 cores and 4 NUMA nodes.
Increase these to 64 and 4 to widen the coverage.
Also increase the neoverse-n1 MAX_LCORE and MAX_NUMA_NODES to reflect
new available hardware (Amplere Altra).
Add configuration to SoC options where smaller values are needed.
Fixes: 6ec78c2463ac ("build: add meson support for dpaaX platforms")
Fixes: dd1cd845c102 ("config: add Marvell ARMADA based on armv8-a")
Fixes: d97108a33231 ("config: change defaults of armv8")
Signed-off-by: Juraj Linkeš <[email protected]>
Reviewed-by: Honnappa Nagarahalli <[email protected]>
Reviewed-by: Liron Himi <[email protected]>
Acked-by: Pavan Nikhilesh <[email protected]>
Acked-by: Viacheslav Ovsiienko <[email protected]>
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