1 //! A place to park MachInst::Inst fragments which are common across multiple architectures.
2 
3 use crate::ir::{self, Inst as IRInst};
4 
5 //============================================================================
6 // Instruction input "slots".
7 //
8 // We use these types to refer to operand numbers, and result numbers, together
9 // with the associated instruction, in a type-safe way.
10 
11 /// Identifier for a particular input of an instruction.
12 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
13 pub(crate) struct InsnInput {
14     pub(crate) insn: IRInst,
15     pub(crate) input: usize,
16 }
17 
18 /// Identifier for a particular output of an instruction.
19 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
20 #[allow(dead_code)]
21 pub(crate) struct InsnOutput {
22     pub(crate) insn: IRInst,
23     pub(crate) output: usize,
24 }
25 
26 //============================================================================
27 // Atomic instructions.
28 
29 /// Atomic memory update operations.
30 #[derive(Clone, Copy, Debug, PartialEq, Eq)]
31 #[repr(u8)]
32 pub enum MachAtomicRmwOp {
33     /// Add
34     Add,
35     /// Sub
36     Sub,
37     /// And
38     And,
39     /// Nand
40     Nand,
41     /// Or
42     Or,
43     /// Exclusive Or
44     Xor,
45     /// Exchange (swap operands)
46     Xchg,
47     /// Unsigned min
48     Umin,
49     /// Unsigned max
50     Umax,
51     /// Signed min
52     Smin,
53     /// Signed max
54     Smax,
55 }
56 
57 impl MachAtomicRmwOp {
58     /// Converts an `ir::AtomicRmwOp` to the corresponding
59     /// `inst_common::AtomicRmwOp`.
60     pub fn from(ir_op: ir::AtomicRmwOp) -> Self {
61         match ir_op {
62             ir::AtomicRmwOp::Add => MachAtomicRmwOp::Add,
63             ir::AtomicRmwOp::Sub => MachAtomicRmwOp::Sub,
64             ir::AtomicRmwOp::And => MachAtomicRmwOp::And,
65             ir::AtomicRmwOp::Nand => MachAtomicRmwOp::Nand,
66             ir::AtomicRmwOp::Or => MachAtomicRmwOp::Or,
67             ir::AtomicRmwOp::Xor => MachAtomicRmwOp::Xor,
68             ir::AtomicRmwOp::Xchg => MachAtomicRmwOp::Xchg,
69             ir::AtomicRmwOp::Umin => MachAtomicRmwOp::Umin,
70             ir::AtomicRmwOp::Umax => MachAtomicRmwOp::Umax,
71             ir::AtomicRmwOp::Smin => MachAtomicRmwOp::Smin,
72             ir::AtomicRmwOp::Smax => MachAtomicRmwOp::Smax,
73         }
74     }
75 }
76