1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case, unused_mut)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg; 39 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 40 fn u8_as_u64(&mut self, arg0: u8) -> u64; 41 fn u16_as_u64(&mut self, arg0: u16) -> u64; 42 fn u32_as_u64(&mut self, arg0: u32) -> u64; 43 fn i64_as_u64(&mut self, arg0: i64) -> u64; 44 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 47 fn ty_bits(&mut self, arg0: Type) -> u8; 48 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 49 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 50 fn ty_mask(&mut self, arg0: Type) -> u64; 51 fn ty_bytes(&mut self, arg0: Type) -> u16; 52 fn lane_type(&mut self, arg0: Type) -> Type; 53 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 55 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 57 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 58 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 59 fn ty_int_bool_ref_64(&mut self, arg0: Type) -> Option<Type>; 60 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 61 fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>; 62 fn ty_vec128(&mut self, arg0: Type) -> Option<Type>; 63 fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>; 64 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 65 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 66 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 67 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 68 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 69 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 70 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 71 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 72 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 73 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 74 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 75 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 76 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 77 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 78 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 79 fn value_type(&mut self, arg0: Value) -> Type; 80 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 81 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 82 fn offset32_to_u32(&mut self, arg0: Offset32) -> u32; 83 fn emit(&mut self, arg0: &MInst) -> Unit; 84 fn trap_code_division_by_zero(&mut self) -> TrapCode; 85 fn trap_code_integer_overflow(&mut self) -> TrapCode; 86 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 87 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 88 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 89 fn symbol_value_data( 90 &mut self, 91 arg0: GlobalValue, 92 ) -> Option<(ExternalName, RelocDistance, i64)>; 93 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 94 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 95 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 96 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 97 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 98 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 99 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 100 fn zero_reg(&mut self) -> Reg; 101 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 102 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 103 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 104 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 105 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 106 fn u8_as_u16(&mut self, arg0: u8) -> u16; 107 fn u64_as_u32(&mut self, arg0: u64) -> u32; 108 fn u64_as_i16(&mut self, arg0: u64) -> i16; 109 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 110 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 111 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 112 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 113 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 114 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 115 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 116 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 117 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 118 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 119 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 120 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 121 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 122 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 123 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 124 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 125 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 126 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 127 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 128 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 129 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 130 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 131 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 132 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 133 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 134 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 135 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 136 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 137 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 138 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 139 fn zero_offset(&mut self) -> Offset32; 140 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 141 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 142 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 143 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 144 fn memflags_trusted(&mut self) -> MemFlags; 145 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 146 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 147 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 148 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 149 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 150 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 151 fn sink_inst(&mut self, arg0: Inst) -> Unit; 152 fn inst_builder_new(&mut self) -> VecMInstBuilder; 153 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 154 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 155 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 156 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 157 } 158 159 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 412. 160 #[derive(Clone, Debug)] 161 pub enum SideEffectNoResult { 162 Inst { inst: MInst }, 163 Inst2 { inst1: MInst, inst2: MInst }, 164 } 165 166 /// Internal type ProducesFlags: defined at src/prelude.isle line 439. 167 #[derive(Clone, Debug)] 168 pub enum ProducesFlags { 169 ProducesFlagsSideEffect { inst: MInst }, 170 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 171 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 172 } 173 174 /// Internal type ConsumesFlags: defined at src/prelude.isle line 450. 175 #[derive(Clone, Debug)] 176 pub enum ConsumesFlags { 177 ConsumesFlagsReturnsResultWithProducer { 178 inst: MInst, 179 result: Reg, 180 }, 181 ConsumesFlagsReturnsReg { 182 inst: MInst, 183 result: Reg, 184 }, 185 ConsumesFlagsTwiceReturnsValueRegs { 186 inst1: MInst, 187 inst2: MInst, 188 result: ValueRegs, 189 }, 190 ConsumesFlagsFourTimesReturnsValueRegs { 191 inst1: MInst, 192 inst2: MInst, 193 inst3: MInst, 194 inst4: MInst, 195 result: ValueRegs, 196 }, 197 } 198 199 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 200 #[derive(Clone, Debug)] 201 pub enum MInst { 202 Nop0, 203 Nop2, 204 AluRRR { 205 alu_op: ALUOp, 206 rd: WritableReg, 207 rn: Reg, 208 rm: Reg, 209 }, 210 AluRRSImm16 { 211 alu_op: ALUOp, 212 rd: WritableReg, 213 rn: Reg, 214 imm: i16, 215 }, 216 AluRR { 217 alu_op: ALUOp, 218 rd: WritableReg, 219 rm: Reg, 220 }, 221 AluRX { 222 alu_op: ALUOp, 223 rd: WritableReg, 224 mem: MemArg, 225 }, 226 AluRSImm16 { 227 alu_op: ALUOp, 228 rd: WritableReg, 229 imm: i16, 230 }, 231 AluRSImm32 { 232 alu_op: ALUOp, 233 rd: WritableReg, 234 imm: i32, 235 }, 236 AluRUImm32 { 237 alu_op: ALUOp, 238 rd: WritableReg, 239 imm: u32, 240 }, 241 AluRUImm16Shifted { 242 alu_op: ALUOp, 243 rd: WritableReg, 244 imm: UImm16Shifted, 245 }, 246 AluRUImm32Shifted { 247 alu_op: ALUOp, 248 rd: WritableReg, 249 imm: UImm32Shifted, 250 }, 251 SMulWide { 252 rn: Reg, 253 rm: Reg, 254 }, 255 UMulWide { 256 rn: Reg, 257 }, 258 SDivMod32 { 259 rn: Reg, 260 }, 261 SDivMod64 { 262 rn: Reg, 263 }, 264 UDivMod32 { 265 rn: Reg, 266 }, 267 UDivMod64 { 268 rn: Reg, 269 }, 270 Flogr { 271 rn: Reg, 272 }, 273 ShiftRR { 274 shift_op: ShiftOp, 275 rd: WritableReg, 276 rn: Reg, 277 shift_imm: u8, 278 shift_reg: Reg, 279 }, 280 RxSBG { 281 op: RxSBGOp, 282 rd: WritableReg, 283 rn: Reg, 284 start_bit: u8, 285 end_bit: u8, 286 rotate_amt: i8, 287 }, 288 RxSBGTest { 289 op: RxSBGOp, 290 rd: Reg, 291 rn: Reg, 292 start_bit: u8, 293 end_bit: u8, 294 rotate_amt: i8, 295 }, 296 UnaryRR { 297 op: UnaryOp, 298 rd: WritableReg, 299 rn: Reg, 300 }, 301 CmpRR { 302 op: CmpOp, 303 rn: Reg, 304 rm: Reg, 305 }, 306 CmpRX { 307 op: CmpOp, 308 rn: Reg, 309 mem: MemArg, 310 }, 311 CmpRSImm16 { 312 op: CmpOp, 313 rn: Reg, 314 imm: i16, 315 }, 316 CmpRSImm32 { 317 op: CmpOp, 318 rn: Reg, 319 imm: i32, 320 }, 321 CmpRUImm32 { 322 op: CmpOp, 323 rn: Reg, 324 imm: u32, 325 }, 326 CmpTrapRR { 327 op: CmpOp, 328 rn: Reg, 329 rm: Reg, 330 cond: Cond, 331 trap_code: TrapCode, 332 }, 333 CmpTrapRSImm16 { 334 op: CmpOp, 335 rn: Reg, 336 imm: i16, 337 cond: Cond, 338 trap_code: TrapCode, 339 }, 340 CmpTrapRUImm16 { 341 op: CmpOp, 342 rn: Reg, 343 imm: u16, 344 cond: Cond, 345 trap_code: TrapCode, 346 }, 347 AtomicRmw { 348 alu_op: ALUOp, 349 rd: WritableReg, 350 rn: Reg, 351 mem: MemArg, 352 }, 353 AtomicCas32 { 354 rd: WritableReg, 355 rn: Reg, 356 mem: MemArg, 357 }, 358 AtomicCas64 { 359 rd: WritableReg, 360 rn: Reg, 361 mem: MemArg, 362 }, 363 Fence, 364 Load32 { 365 rd: WritableReg, 366 mem: MemArg, 367 }, 368 Load32ZExt8 { 369 rd: WritableReg, 370 mem: MemArg, 371 }, 372 Load32SExt8 { 373 rd: WritableReg, 374 mem: MemArg, 375 }, 376 Load32ZExt16 { 377 rd: WritableReg, 378 mem: MemArg, 379 }, 380 Load32SExt16 { 381 rd: WritableReg, 382 mem: MemArg, 383 }, 384 Load64 { 385 rd: WritableReg, 386 mem: MemArg, 387 }, 388 Load64ZExt8 { 389 rd: WritableReg, 390 mem: MemArg, 391 }, 392 Load64SExt8 { 393 rd: WritableReg, 394 mem: MemArg, 395 }, 396 Load64ZExt16 { 397 rd: WritableReg, 398 mem: MemArg, 399 }, 400 Load64SExt16 { 401 rd: WritableReg, 402 mem: MemArg, 403 }, 404 Load64ZExt32 { 405 rd: WritableReg, 406 mem: MemArg, 407 }, 408 Load64SExt32 { 409 rd: WritableReg, 410 mem: MemArg, 411 }, 412 LoadRev16 { 413 rd: WritableReg, 414 mem: MemArg, 415 }, 416 LoadRev32 { 417 rd: WritableReg, 418 mem: MemArg, 419 }, 420 LoadRev64 { 421 rd: WritableReg, 422 mem: MemArg, 423 }, 424 Store8 { 425 rd: Reg, 426 mem: MemArg, 427 }, 428 Store16 { 429 rd: Reg, 430 mem: MemArg, 431 }, 432 Store32 { 433 rd: Reg, 434 mem: MemArg, 435 }, 436 Store64 { 437 rd: Reg, 438 mem: MemArg, 439 }, 440 StoreImm8 { 441 imm: u8, 442 mem: MemArg, 443 }, 444 StoreImm16 { 445 imm: i16, 446 mem: MemArg, 447 }, 448 StoreImm32SExt16 { 449 imm: i16, 450 mem: MemArg, 451 }, 452 StoreImm64SExt16 { 453 imm: i16, 454 mem: MemArg, 455 }, 456 StoreRev16 { 457 rd: Reg, 458 mem: MemArg, 459 }, 460 StoreRev32 { 461 rd: Reg, 462 mem: MemArg, 463 }, 464 StoreRev64 { 465 rd: Reg, 466 mem: MemArg, 467 }, 468 LoadMultiple64 { 469 rt: WritableReg, 470 rt2: WritableReg, 471 mem: MemArg, 472 }, 473 StoreMultiple64 { 474 rt: Reg, 475 rt2: Reg, 476 mem: MemArg, 477 }, 478 Mov32 { 479 rd: WritableReg, 480 rm: Reg, 481 }, 482 Mov64 { 483 rd: WritableReg, 484 rm: Reg, 485 }, 486 Mov32Imm { 487 rd: WritableReg, 488 imm: u32, 489 }, 490 Mov32SImm16 { 491 rd: WritableReg, 492 imm: i16, 493 }, 494 Mov64SImm16 { 495 rd: WritableReg, 496 imm: i16, 497 }, 498 Mov64SImm32 { 499 rd: WritableReg, 500 imm: i32, 501 }, 502 Mov64UImm16Shifted { 503 rd: WritableReg, 504 imm: UImm16Shifted, 505 }, 506 Mov64UImm32Shifted { 507 rd: WritableReg, 508 imm: UImm32Shifted, 509 }, 510 Insert64UImm16Shifted { 511 rd: WritableReg, 512 imm: UImm16Shifted, 513 }, 514 Insert64UImm32Shifted { 515 rd: WritableReg, 516 imm: UImm32Shifted, 517 }, 518 Extend { 519 rd: WritableReg, 520 rn: Reg, 521 signed: bool, 522 from_bits: u8, 523 to_bits: u8, 524 }, 525 CMov32 { 526 rd: WritableReg, 527 cond: Cond, 528 rm: Reg, 529 }, 530 CMov64 { 531 rd: WritableReg, 532 cond: Cond, 533 rm: Reg, 534 }, 535 CMov32SImm16 { 536 rd: WritableReg, 537 cond: Cond, 538 imm: i16, 539 }, 540 CMov64SImm16 { 541 rd: WritableReg, 542 cond: Cond, 543 imm: i16, 544 }, 545 FpuMove32 { 546 rd: WritableReg, 547 rn: Reg, 548 }, 549 FpuMove64 { 550 rd: WritableReg, 551 rn: Reg, 552 }, 553 FpuCMov32 { 554 rd: WritableReg, 555 cond: Cond, 556 rm: Reg, 557 }, 558 FpuCMov64 { 559 rd: WritableReg, 560 cond: Cond, 561 rm: Reg, 562 }, 563 MovToFpr { 564 rd: WritableReg, 565 rn: Reg, 566 }, 567 MovFromFpr { 568 rd: WritableReg, 569 rn: Reg, 570 }, 571 FpuRR { 572 fpu_op: FPUOp1, 573 rd: WritableReg, 574 rn: Reg, 575 }, 576 FpuRRR { 577 fpu_op: FPUOp2, 578 rd: WritableReg, 579 rm: Reg, 580 }, 581 FpuRRRR { 582 fpu_op: FPUOp3, 583 rd: WritableReg, 584 rn: Reg, 585 rm: Reg, 586 }, 587 FpuCopysign { 588 rd: WritableReg, 589 rn: Reg, 590 rm: Reg, 591 }, 592 FpuCmp32 { 593 rn: Reg, 594 rm: Reg, 595 }, 596 FpuCmp64 { 597 rn: Reg, 598 rm: Reg, 599 }, 600 FpuLoad32 { 601 rd: WritableReg, 602 mem: MemArg, 603 }, 604 FpuStore32 { 605 rd: Reg, 606 mem: MemArg, 607 }, 608 FpuLoad64 { 609 rd: WritableReg, 610 mem: MemArg, 611 }, 612 FpuStore64 { 613 rd: Reg, 614 mem: MemArg, 615 }, 616 FpuLoadRev32 { 617 rd: WritableReg, 618 mem: MemArg, 619 }, 620 FpuStoreRev32 { 621 rd: Reg, 622 mem: MemArg, 623 }, 624 FpuLoadRev64 { 625 rd: WritableReg, 626 mem: MemArg, 627 }, 628 FpuStoreRev64 { 629 rd: Reg, 630 mem: MemArg, 631 }, 632 LoadFpuConst32 { 633 rd: WritableReg, 634 const_data: u32, 635 }, 636 LoadFpuConst64 { 637 rd: WritableReg, 638 const_data: u64, 639 }, 640 FpuToInt { 641 op: FpuToIntOp, 642 rd: WritableReg, 643 rn: Reg, 644 }, 645 IntToFpu { 646 op: IntToFpuOp, 647 rd: WritableReg, 648 rn: Reg, 649 }, 650 FpuRound { 651 op: FpuRoundMode, 652 rd: WritableReg, 653 rn: Reg, 654 }, 655 FpuVecRRR { 656 fpu_op: FPUOp2, 657 rd: WritableReg, 658 rn: Reg, 659 rm: Reg, 660 }, 661 Call { 662 link: WritableReg, 663 info: BoxCallInfo, 664 }, 665 CallInd { 666 link: WritableReg, 667 info: BoxCallIndInfo, 668 }, 669 Ret { 670 link: Reg, 671 rets: VecReg, 672 }, 673 EpiloguePlaceholder, 674 Jump { 675 dest: MachLabel, 676 }, 677 CondBr { 678 taken: MachLabel, 679 not_taken: MachLabel, 680 cond: Cond, 681 }, 682 TrapIf { 683 cond: Cond, 684 trap_code: TrapCode, 685 }, 686 OneWayCondBr { 687 target: MachLabel, 688 cond: Cond, 689 }, 690 IndirectBr { 691 rn: Reg, 692 targets: VecMachLabel, 693 }, 694 Debugtrap, 695 Trap { 696 trap_code: TrapCode, 697 }, 698 JTSequence { 699 ridx: Reg, 700 targets: VecMachLabel, 701 }, 702 LoadExtNameFar { 703 rd: WritableReg, 704 name: BoxExternalName, 705 offset: i64, 706 }, 707 LoadAddr { 708 rd: WritableReg, 709 mem: MemArg, 710 }, 711 Loop { 712 body: VecMInst, 713 cond: Cond, 714 }, 715 CondBreak { 716 cond: Cond, 717 }, 718 VirtualSPOffsetAdj { 719 offset: i64, 720 }, 721 DummyUse { 722 reg: Reg, 723 }, 724 Unwind { 725 inst: UnwindInst, 726 }, 727 } 728 729 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 730 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 731 pub enum ALUOp { 732 Add32, 733 Add32Ext16, 734 Add64, 735 Add64Ext16, 736 Add64Ext32, 737 AddLogical32, 738 AddLogical64, 739 AddLogical64Ext32, 740 Sub32, 741 Sub32Ext16, 742 Sub64, 743 Sub64Ext16, 744 Sub64Ext32, 745 SubLogical32, 746 SubLogical64, 747 SubLogical64Ext32, 748 Mul32, 749 Mul32Ext16, 750 Mul64, 751 Mul64Ext16, 752 Mul64Ext32, 753 And32, 754 And64, 755 Orr32, 756 Orr64, 757 Xor32, 758 Xor64, 759 AndNot32, 760 AndNot64, 761 OrrNot32, 762 OrrNot64, 763 XorNot32, 764 XorNot64, 765 } 766 767 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 768 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 769 pub enum UnaryOp { 770 Abs32, 771 Abs64, 772 Abs64Ext32, 773 Neg32, 774 Neg64, 775 Neg64Ext32, 776 PopcntByte, 777 PopcntReg, 778 BSwap32, 779 BSwap64, 780 } 781 782 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 783 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 784 pub enum ShiftOp { 785 RotL32, 786 RotL64, 787 LShL32, 788 LShL64, 789 LShR32, 790 LShR64, 791 AShR32, 792 AShR64, 793 } 794 795 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 796 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 797 pub enum RxSBGOp { 798 Insert, 799 And, 800 Or, 801 Xor, 802 } 803 804 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 805 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 806 pub enum CmpOp { 807 CmpS32, 808 CmpS32Ext16, 809 CmpS64, 810 CmpS64Ext16, 811 CmpS64Ext32, 812 CmpL32, 813 CmpL32Ext16, 814 CmpL64, 815 CmpL64Ext16, 816 CmpL64Ext32, 817 } 818 819 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 820 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 821 pub enum FPUOp1 { 822 Abs32, 823 Abs64, 824 Neg32, 825 Neg64, 826 NegAbs32, 827 NegAbs64, 828 Sqrt32, 829 Sqrt64, 830 Cvt32To64, 831 Cvt64To32, 832 } 833 834 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 835 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 836 pub enum FPUOp2 { 837 Add32, 838 Add64, 839 Sub32, 840 Sub64, 841 Mul32, 842 Mul64, 843 Div32, 844 Div64, 845 Max32, 846 Max64, 847 Min32, 848 Min64, 849 } 850 851 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 852 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 853 pub enum FPUOp3 { 854 MAdd32, 855 MAdd64, 856 MSub32, 857 MSub64, 858 } 859 860 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 861 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 862 pub enum FpuToIntOp { 863 F32ToU32, 864 F32ToI32, 865 F32ToU64, 866 F32ToI64, 867 F64ToU32, 868 F64ToI32, 869 F64ToU64, 870 F64ToI64, 871 } 872 873 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 874 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 875 pub enum IntToFpuOp { 876 U32ToF32, 877 I32ToF32, 878 U32ToF64, 879 I32ToF64, 880 U64ToF32, 881 I64ToF32, 882 U64ToF64, 883 I64ToF64, 884 } 885 886 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 887 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 888 pub enum FpuRoundMode { 889 Minus32, 890 Minus64, 891 Plus32, 892 Plus64, 893 Zero32, 894 Zero64, 895 Nearest32, 896 Nearest64, 897 } 898 899 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 900 #[derive(Clone, Debug)] 901 pub enum WritableRegPair { 902 WritableRegPair { hi: WritableReg, lo: WritableReg }, 903 } 904 905 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 906 #[derive(Clone, Debug)] 907 pub enum RegPair { 908 RegPair { hi: Reg, lo: Reg }, 909 } 910 911 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 912 #[derive(Clone, Debug)] 913 pub enum ProducesBool { 914 ProducesBool { producer: ProducesFlags, cond: Cond }, 915 } 916 917 // Generated as internal constructor for term output_reg. 918 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 919 let pattern0_0 = arg0; 920 // Rule at src/prelude.isle line 86. 921 let expr0_0 = C::value_reg(ctx, pattern0_0); 922 let expr1_0 = C::output(ctx, expr0_0); 923 return Some(expr1_0); 924 } 925 926 // Generated as internal constructor for term output_value. 927 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 928 let pattern0_0 = arg0; 929 // Rule at src/prelude.isle line 90. 930 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 931 let expr1_0 = C::output(ctx, expr0_0); 932 return Some(expr1_0); 933 } 934 935 // Generated as internal constructor for term temp_reg. 936 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 937 let pattern0_0 = arg0; 938 // Rule at src/prelude.isle line 110. 939 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 940 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 941 return Some(expr1_0); 942 } 943 944 // Generated as internal constructor for term lo_reg. 945 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 946 let pattern0_0 = arg0; 947 // Rule at src/prelude.isle line 150. 948 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 949 let expr1_0: usize = 0; 950 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 951 return Some(expr2_0); 952 } 953 954 // Generated as internal constructor for term side_effect. 955 pub fn constructor_side_effect<C: Context>( 956 ctx: &mut C, 957 arg0: &SideEffectNoResult, 958 ) -> Option<InstOutput> { 959 let pattern0_0 = arg0; 960 match pattern0_0 { 961 &SideEffectNoResult::Inst { 962 inst: ref pattern1_0, 963 } => { 964 // Rule at src/prelude.isle line 420. 965 let expr0_0 = C::emit(ctx, pattern1_0); 966 let expr1_0 = C::output_none(ctx); 967 return Some(expr1_0); 968 } 969 &SideEffectNoResult::Inst2 { 970 inst1: ref pattern1_0, 971 inst2: ref pattern1_1, 972 } => { 973 // Rule at src/prelude.isle line 423. 974 let expr0_0 = C::emit(ctx, pattern1_0); 975 let expr1_0 = C::emit(ctx, pattern1_1); 976 let expr2_0 = C::output_none(ctx); 977 return Some(expr2_0); 978 } 979 _ => {} 980 } 981 return None; 982 } 983 984 // Generated as internal constructor for term side_effect_concat. 985 pub fn constructor_side_effect_concat<C: Context>( 986 ctx: &mut C, 987 arg0: &SideEffectNoResult, 988 arg1: &SideEffectNoResult, 989 ) -> Option<SideEffectNoResult> { 990 let pattern0_0 = arg0; 991 if let &SideEffectNoResult::Inst { 992 inst: ref pattern1_0, 993 } = pattern0_0 994 { 995 let pattern2_0 = arg1; 996 if let &SideEffectNoResult::Inst { 997 inst: ref pattern3_0, 998 } = pattern2_0 999 { 1000 // Rule at src/prelude.isle line 429. 1001 let expr0_0 = SideEffectNoResult::Inst2 { 1002 inst1: pattern1_0.clone(), 1003 inst2: pattern3_0.clone(), 1004 }; 1005 return Some(expr0_0); 1006 } 1007 } 1008 return None; 1009 } 1010 1011 // Generated as internal constructor for term produces_flags_get_reg. 1012 pub fn constructor_produces_flags_get_reg<C: Context>( 1013 ctx: &mut C, 1014 arg0: &ProducesFlags, 1015 ) -> Option<Reg> { 1016 let pattern0_0 = arg0; 1017 if let &ProducesFlags::ProducesFlagsReturnsReg { 1018 inst: ref pattern1_0, 1019 result: pattern1_1, 1020 } = pattern0_0 1021 { 1022 // Rule at src/prelude.isle line 466. 1023 return Some(pattern1_1); 1024 } 1025 return None; 1026 } 1027 1028 // Generated as internal constructor for term produces_flags_ignore. 1029 pub fn constructor_produces_flags_ignore<C: Context>( 1030 ctx: &mut C, 1031 arg0: &ProducesFlags, 1032 ) -> Option<ProducesFlags> { 1033 let pattern0_0 = arg0; 1034 match pattern0_0 { 1035 &ProducesFlags::ProducesFlagsReturnsReg { 1036 inst: ref pattern1_0, 1037 result: pattern1_1, 1038 } => { 1039 // Rule at src/prelude.isle line 471. 1040 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1041 inst: pattern1_0.clone(), 1042 }; 1043 return Some(expr0_0); 1044 } 1045 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1046 inst: ref pattern1_0, 1047 result: pattern1_1, 1048 } => { 1049 // Rule at src/prelude.isle line 473. 1050 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1051 inst: pattern1_0.clone(), 1052 }; 1053 return Some(expr0_0); 1054 } 1055 _ => {} 1056 } 1057 return None; 1058 } 1059 1060 // Generated as internal constructor for term consumes_flags_concat. 1061 pub fn constructor_consumes_flags_concat<C: Context>( 1062 ctx: &mut C, 1063 arg0: &ConsumesFlags, 1064 arg1: &ConsumesFlags, 1065 ) -> Option<ConsumesFlags> { 1066 let pattern0_0 = arg0; 1067 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1068 inst: ref pattern1_0, 1069 result: pattern1_1, 1070 } = pattern0_0 1071 { 1072 let pattern2_0 = arg1; 1073 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1074 inst: ref pattern3_0, 1075 result: pattern3_1, 1076 } = pattern2_0 1077 { 1078 // Rule at src/prelude.isle line 480. 1079 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1080 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1081 inst1: pattern1_0.clone(), 1082 inst2: pattern3_0.clone(), 1083 result: expr0_0, 1084 }; 1085 return Some(expr1_0); 1086 } 1087 } 1088 return None; 1089 } 1090 1091 // Generated as internal constructor for term with_flags. 1092 pub fn constructor_with_flags<C: Context>( 1093 ctx: &mut C, 1094 arg0: &ProducesFlags, 1095 arg1: &ConsumesFlags, 1096 ) -> Option<ValueRegs> { 1097 let pattern0_0 = arg0; 1098 match pattern0_0 { 1099 &ProducesFlags::ProducesFlagsSideEffect { 1100 inst: ref pattern1_0, 1101 } => { 1102 let pattern2_0 = arg1; 1103 match pattern2_0 { 1104 &ConsumesFlags::ConsumesFlagsReturnsReg { 1105 inst: ref pattern3_0, 1106 result: pattern3_1, 1107 } => { 1108 // Rule at src/prelude.isle line 505. 1109 let expr0_0 = C::emit(ctx, pattern1_0); 1110 let expr1_0 = C::emit(ctx, pattern3_0); 1111 let expr2_0 = C::value_reg(ctx, pattern3_1); 1112 return Some(expr2_0); 1113 } 1114 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1115 inst1: ref pattern3_0, 1116 inst2: ref pattern3_1, 1117 result: pattern3_2, 1118 } => { 1119 // Rule at src/prelude.isle line 511. 1120 let expr0_0 = C::emit(ctx, pattern1_0); 1121 let expr1_0 = C::emit(ctx, pattern3_0); 1122 let expr2_0 = C::emit(ctx, pattern3_1); 1123 return Some(pattern3_2); 1124 } 1125 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1126 inst1: ref pattern3_0, 1127 inst2: ref pattern3_1, 1128 inst3: ref pattern3_2, 1129 inst4: ref pattern3_3, 1130 result: pattern3_4, 1131 } => { 1132 // Rule at src/prelude.isle line 523. 1133 let expr0_0 = C::emit(ctx, pattern1_0); 1134 let expr1_0 = C::emit(ctx, pattern3_0); 1135 let expr2_0 = C::emit(ctx, pattern3_1); 1136 let expr3_0 = C::emit(ctx, pattern3_2); 1137 let expr4_0 = C::emit(ctx, pattern3_3); 1138 return Some(pattern3_4); 1139 } 1140 _ => {} 1141 } 1142 } 1143 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1144 inst: ref pattern1_0, 1145 result: pattern1_1, 1146 } => { 1147 let pattern2_0 = arg1; 1148 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1149 inst: ref pattern3_0, 1150 result: pattern3_1, 1151 } = pattern2_0 1152 { 1153 // Rule at src/prelude.isle line 499. 1154 let expr0_0 = C::emit(ctx, pattern1_0); 1155 let expr1_0 = C::emit(ctx, pattern3_0); 1156 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1157 return Some(expr2_0); 1158 } 1159 } 1160 _ => {} 1161 } 1162 return None; 1163 } 1164 1165 // Generated as internal constructor for term with_flags_reg. 1166 pub fn constructor_with_flags_reg<C: Context>( 1167 ctx: &mut C, 1168 arg0: &ProducesFlags, 1169 arg1: &ConsumesFlags, 1170 ) -> Option<Reg> { 1171 let pattern0_0 = arg0; 1172 let pattern1_0 = arg1; 1173 // Rule at src/prelude.isle line 540. 1174 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1175 let expr1_0: usize = 0; 1176 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1177 return Some(expr2_0); 1178 } 1179 1180 // Generated as internal constructor for term mask_amt_reg. 1181 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1182 let pattern0_0 = arg0; 1183 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1184 let pattern2_0 = arg1; 1185 // Rule at src/isa/s390x/inst.isle line 1040. 1186 let expr0_0: i64 = -1; 1187 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1188 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1189 let expr3_0: u8 = 0; 1190 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1191 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1192 return Some(expr5_0); 1193 } 1194 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1195 let pattern2_0 = arg1; 1196 // Rule at src/isa/s390x/inst.isle line 1043. 1197 return Some(pattern2_0); 1198 } 1199 return None; 1200 } 1201 1202 // Generated as internal constructor for term lower_address. 1203 pub fn constructor_lower_address<C: Context>( 1204 ctx: &mut C, 1205 arg0: MemFlags, 1206 arg1: Value, 1207 arg2: Offset32, 1208 ) -> Option<MemArg> { 1209 let pattern0_0 = arg0; 1210 let pattern1_0 = arg1; 1211 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1212 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1213 match &pattern3_0 { 1214 &InstructionData::UnaryGlobalValue { 1215 opcode: ref pattern4_0, 1216 global_value: pattern4_1, 1217 } => { 1218 if let &Opcode::SymbolValue = pattern4_0 { 1219 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1220 C::symbol_value_data(ctx, pattern4_1) 1221 { 1222 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1223 let pattern8_0 = arg2; 1224 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1225 let mut closure10 = || { 1226 return Some(pattern6_2); 1227 }; 1228 if let Some(pattern10_0) = closure10() { 1229 if let Some(pattern11_0) = 1230 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1231 { 1232 // Rule at src/isa/s390x/inst.isle line 1136. 1233 let expr0_0 = 1234 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1235 return Some(expr0_0); 1236 } 1237 } 1238 } 1239 } 1240 } 1241 } 1242 &InstructionData::Binary { 1243 opcode: ref pattern4_0, 1244 args: ref pattern4_1, 1245 } => { 1246 if let &Opcode::Iadd = pattern4_0 { 1247 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1248 let pattern7_0 = arg2; 1249 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1250 if pattern8_0 == 0 { 1251 // Rule at src/isa/s390x/inst.isle line 1133. 1252 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1253 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1254 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1255 return Some(expr2_0); 1256 } 1257 } 1258 } 1259 _ => {} 1260 } 1261 } 1262 let pattern2_0 = arg2; 1263 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1264 // Rule at src/isa/s390x/inst.isle line 1130. 1265 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1266 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1267 return Some(expr1_0); 1268 } 1269 1270 // Generated as internal constructor for term stack_addr_impl. 1271 pub fn constructor_stack_addr_impl<C: Context>( 1272 ctx: &mut C, 1273 arg0: Type, 1274 arg1: StackSlot, 1275 arg2: Offset32, 1276 ) -> Option<Reg> { 1277 let pattern0_0 = arg0; 1278 let pattern1_0 = arg1; 1279 let pattern2_0 = arg2; 1280 // Rule at src/isa/s390x/inst.isle line 1163. 1281 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1282 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1283 let expr2_0 = C::emit(ctx, &expr1_0); 1284 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1285 return Some(expr3_0); 1286 } 1287 1288 // Generated as internal constructor for term sink_load. 1289 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1290 let pattern0_0 = arg0; 1291 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1292 if let &InstructionData::Load { 1293 opcode: ref pattern2_0, 1294 arg: pattern2_1, 1295 flags: pattern2_2, 1296 offset: pattern2_3, 1297 } = &pattern1_0 1298 { 1299 if let &Opcode::Load = pattern2_0 { 1300 // Rule at src/isa/s390x/inst.isle line 1233. 1301 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1302 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1303 return Some(expr1_0); 1304 } 1305 } 1306 return None; 1307 } 1308 1309 // Generated as internal constructor for term sink_sload16. 1310 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1311 let pattern0_0 = arg0; 1312 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1313 if let &InstructionData::Load { 1314 opcode: ref pattern2_0, 1315 arg: pattern2_1, 1316 flags: pattern2_2, 1317 offset: pattern2_3, 1318 } = &pattern1_0 1319 { 1320 if let &Opcode::Sload16 = pattern2_0 { 1321 // Rule at src/isa/s390x/inst.isle line 1240. 1322 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1323 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1324 return Some(expr1_0); 1325 } 1326 } 1327 return None; 1328 } 1329 1330 // Generated as internal constructor for term sink_sload32. 1331 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1332 let pattern0_0 = arg0; 1333 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1334 if let &InstructionData::Load { 1335 opcode: ref pattern2_0, 1336 arg: pattern2_1, 1337 flags: pattern2_2, 1338 offset: pattern2_3, 1339 } = &pattern1_0 1340 { 1341 if let &Opcode::Sload32 = pattern2_0 { 1342 // Rule at src/isa/s390x/inst.isle line 1247. 1343 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1344 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1345 return Some(expr1_0); 1346 } 1347 } 1348 return None; 1349 } 1350 1351 // Generated as internal constructor for term sink_uload16. 1352 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1353 let pattern0_0 = arg0; 1354 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1355 if let &InstructionData::Load { 1356 opcode: ref pattern2_0, 1357 arg: pattern2_1, 1358 flags: pattern2_2, 1359 offset: pattern2_3, 1360 } = &pattern1_0 1361 { 1362 if let &Opcode::Uload16 = pattern2_0 { 1363 // Rule at src/isa/s390x/inst.isle line 1254. 1364 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1365 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1366 return Some(expr1_0); 1367 } 1368 } 1369 return None; 1370 } 1371 1372 // Generated as internal constructor for term sink_uload32. 1373 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1374 let pattern0_0 = arg0; 1375 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1376 if let &InstructionData::Load { 1377 opcode: ref pattern2_0, 1378 arg: pattern2_1, 1379 flags: pattern2_2, 1380 offset: pattern2_3, 1381 } = &pattern1_0 1382 { 1383 if let &Opcode::Uload32 = pattern2_0 { 1384 // Rule at src/isa/s390x/inst.isle line 1261. 1385 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1386 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1387 return Some(expr1_0); 1388 } 1389 } 1390 return None; 1391 } 1392 1393 // Generated as internal constructor for term temp_writable_regpair. 1394 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1395 // Rule at src/isa/s390x/inst.isle line 1274. 1396 let expr0_0: u8 = 0; 1397 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1398 let expr2_0: u8 = 1; 1399 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1400 let expr4_0 = WritableRegPair::WritableRegPair { 1401 hi: expr1_0, 1402 lo: expr3_0, 1403 }; 1404 return Some(expr4_0); 1405 } 1406 1407 // Generated as internal constructor for term copy_writable_regpair. 1408 pub fn constructor_copy_writable_regpair<C: Context>( 1409 ctx: &mut C, 1410 arg0: &RegPair, 1411 ) -> Option<WritableRegPair> { 1412 let pattern0_0 = arg0; 1413 // Rule at src/isa/s390x/inst.isle line 1280. 1414 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1415 return Some(expr0_0); 1416 } 1417 1418 // Generated as internal constructor for term writable_regpair_hi. 1419 pub fn constructor_writable_regpair_hi<C: Context>( 1420 ctx: &mut C, 1421 arg0: &WritableRegPair, 1422 ) -> Option<WritableReg> { 1423 let pattern0_0 = arg0; 1424 if let &WritableRegPair::WritableRegPair { 1425 hi: pattern1_0, 1426 lo: pattern1_1, 1427 } = pattern0_0 1428 { 1429 // Rule at src/isa/s390x/inst.isle line 1284. 1430 return Some(pattern1_0); 1431 } 1432 return None; 1433 } 1434 1435 // Generated as internal constructor for term writable_regpair_lo. 1436 pub fn constructor_writable_regpair_lo<C: Context>( 1437 ctx: &mut C, 1438 arg0: &WritableRegPair, 1439 ) -> Option<WritableReg> { 1440 let pattern0_0 = arg0; 1441 if let &WritableRegPair::WritableRegPair { 1442 hi: pattern1_0, 1443 lo: pattern1_1, 1444 } = pattern0_0 1445 { 1446 // Rule at src/isa/s390x/inst.isle line 1288. 1447 return Some(pattern1_1); 1448 } 1449 return None; 1450 } 1451 1452 // Generated as internal constructor for term writable_regpair_to_regpair. 1453 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1454 ctx: &mut C, 1455 arg0: &WritableRegPair, 1456 ) -> Option<RegPair> { 1457 let pattern0_0 = arg0; 1458 if let &WritableRegPair::WritableRegPair { 1459 hi: pattern1_0, 1460 lo: pattern1_1, 1461 } = pattern0_0 1462 { 1463 // Rule at src/isa/s390x/inst.isle line 1295. 1464 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1465 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1466 let expr2_0 = RegPair::RegPair { 1467 hi: expr0_0, 1468 lo: expr1_0, 1469 }; 1470 return Some(expr2_0); 1471 } 1472 return None; 1473 } 1474 1475 // Generated as internal constructor for term uninitialized_regpair. 1476 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1477 // Rule at src/isa/s390x/inst.isle line 1300. 1478 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1479 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1480 return Some(expr1_0); 1481 } 1482 1483 // Generated as internal constructor for term regpair_hi. 1484 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1485 let pattern0_0 = arg0; 1486 if let &RegPair::RegPair { 1487 hi: pattern1_0, 1488 lo: pattern1_1, 1489 } = pattern0_0 1490 { 1491 // Rule at src/isa/s390x/inst.isle line 1305. 1492 return Some(pattern1_0); 1493 } 1494 return None; 1495 } 1496 1497 // Generated as internal constructor for term regpair_lo. 1498 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1499 let pattern0_0 = arg0; 1500 if let &RegPair::RegPair { 1501 hi: pattern1_0, 1502 lo: pattern1_1, 1503 } = pattern0_0 1504 { 1505 // Rule at src/isa/s390x/inst.isle line 1309. 1506 return Some(pattern1_1); 1507 } 1508 return None; 1509 } 1510 1511 // Generated as internal constructor for term alu_rrr. 1512 pub fn constructor_alu_rrr<C: Context>( 1513 ctx: &mut C, 1514 arg0: Type, 1515 arg1: &ALUOp, 1516 arg2: Reg, 1517 arg3: Reg, 1518 ) -> Option<Reg> { 1519 let pattern0_0 = arg0; 1520 let pattern1_0 = arg1; 1521 let pattern2_0 = arg2; 1522 let pattern3_0 = arg3; 1523 // Rule at src/isa/s390x/inst.isle line 1316. 1524 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1525 let expr1_0 = MInst::AluRRR { 1526 alu_op: pattern1_0.clone(), 1527 rd: expr0_0, 1528 rn: pattern2_0, 1529 rm: pattern3_0, 1530 }; 1531 let expr2_0 = C::emit(ctx, &expr1_0); 1532 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1533 return Some(expr3_0); 1534 } 1535 1536 // Generated as internal constructor for term alu_rrsimm16. 1537 pub fn constructor_alu_rrsimm16<C: Context>( 1538 ctx: &mut C, 1539 arg0: Type, 1540 arg1: &ALUOp, 1541 arg2: Reg, 1542 arg3: i16, 1543 ) -> Option<Reg> { 1544 let pattern0_0 = arg0; 1545 let pattern1_0 = arg1; 1546 let pattern2_0 = arg2; 1547 let pattern3_0 = arg3; 1548 // Rule at src/isa/s390x/inst.isle line 1323. 1549 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1550 let expr1_0 = MInst::AluRRSImm16 { 1551 alu_op: pattern1_0.clone(), 1552 rd: expr0_0, 1553 rn: pattern2_0, 1554 imm: pattern3_0, 1555 }; 1556 let expr2_0 = C::emit(ctx, &expr1_0); 1557 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1558 return Some(expr3_0); 1559 } 1560 1561 // Generated as internal constructor for term alu_rr. 1562 pub fn constructor_alu_rr<C: Context>( 1563 ctx: &mut C, 1564 arg0: Type, 1565 arg1: &ALUOp, 1566 arg2: Reg, 1567 arg3: Reg, 1568 ) -> Option<Reg> { 1569 let pattern0_0 = arg0; 1570 let pattern1_0 = arg1; 1571 let pattern2_0 = arg2; 1572 let pattern3_0 = arg3; 1573 // Rule at src/isa/s390x/inst.isle line 1330. 1574 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1575 let expr1_0 = MInst::AluRR { 1576 alu_op: pattern1_0.clone(), 1577 rd: expr0_0, 1578 rm: pattern3_0, 1579 }; 1580 let expr2_0 = C::emit(ctx, &expr1_0); 1581 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1582 return Some(expr3_0); 1583 } 1584 1585 // Generated as internal constructor for term alu_rx. 1586 pub fn constructor_alu_rx<C: Context>( 1587 ctx: &mut C, 1588 arg0: Type, 1589 arg1: &ALUOp, 1590 arg2: Reg, 1591 arg3: &MemArg, 1592 ) -> Option<Reg> { 1593 let pattern0_0 = arg0; 1594 let pattern1_0 = arg1; 1595 let pattern2_0 = arg2; 1596 let pattern3_0 = arg3; 1597 // Rule at src/isa/s390x/inst.isle line 1337. 1598 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1599 let expr1_0 = MInst::AluRX { 1600 alu_op: pattern1_0.clone(), 1601 rd: expr0_0, 1602 mem: pattern3_0.clone(), 1603 }; 1604 let expr2_0 = C::emit(ctx, &expr1_0); 1605 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1606 return Some(expr3_0); 1607 } 1608 1609 // Generated as internal constructor for term alu_rsimm16. 1610 pub fn constructor_alu_rsimm16<C: Context>( 1611 ctx: &mut C, 1612 arg0: Type, 1613 arg1: &ALUOp, 1614 arg2: Reg, 1615 arg3: i16, 1616 ) -> Option<Reg> { 1617 let pattern0_0 = arg0; 1618 let pattern1_0 = arg1; 1619 let pattern2_0 = arg2; 1620 let pattern3_0 = arg3; 1621 // Rule at src/isa/s390x/inst.isle line 1344. 1622 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1623 let expr1_0 = MInst::AluRSImm16 { 1624 alu_op: pattern1_0.clone(), 1625 rd: expr0_0, 1626 imm: pattern3_0, 1627 }; 1628 let expr2_0 = C::emit(ctx, &expr1_0); 1629 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1630 return Some(expr3_0); 1631 } 1632 1633 // Generated as internal constructor for term alu_rsimm32. 1634 pub fn constructor_alu_rsimm32<C: Context>( 1635 ctx: &mut C, 1636 arg0: Type, 1637 arg1: &ALUOp, 1638 arg2: Reg, 1639 arg3: i32, 1640 ) -> Option<Reg> { 1641 let pattern0_0 = arg0; 1642 let pattern1_0 = arg1; 1643 let pattern2_0 = arg2; 1644 let pattern3_0 = arg3; 1645 // Rule at src/isa/s390x/inst.isle line 1351. 1646 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1647 let expr1_0 = MInst::AluRSImm32 { 1648 alu_op: pattern1_0.clone(), 1649 rd: expr0_0, 1650 imm: pattern3_0, 1651 }; 1652 let expr2_0 = C::emit(ctx, &expr1_0); 1653 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1654 return Some(expr3_0); 1655 } 1656 1657 // Generated as internal constructor for term alu_ruimm32. 1658 pub fn constructor_alu_ruimm32<C: Context>( 1659 ctx: &mut C, 1660 arg0: Type, 1661 arg1: &ALUOp, 1662 arg2: Reg, 1663 arg3: u32, 1664 ) -> Option<Reg> { 1665 let pattern0_0 = arg0; 1666 let pattern1_0 = arg1; 1667 let pattern2_0 = arg2; 1668 let pattern3_0 = arg3; 1669 // Rule at src/isa/s390x/inst.isle line 1358. 1670 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1671 let expr1_0 = MInst::AluRUImm32 { 1672 alu_op: pattern1_0.clone(), 1673 rd: expr0_0, 1674 imm: pattern3_0, 1675 }; 1676 let expr2_0 = C::emit(ctx, &expr1_0); 1677 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1678 return Some(expr3_0); 1679 } 1680 1681 // Generated as internal constructor for term alu_ruimm16shifted. 1682 pub fn constructor_alu_ruimm16shifted<C: Context>( 1683 ctx: &mut C, 1684 arg0: Type, 1685 arg1: &ALUOp, 1686 arg2: Reg, 1687 arg3: UImm16Shifted, 1688 ) -> Option<Reg> { 1689 let pattern0_0 = arg0; 1690 let pattern1_0 = arg1; 1691 let pattern2_0 = arg2; 1692 let pattern3_0 = arg3; 1693 // Rule at src/isa/s390x/inst.isle line 1365. 1694 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1695 let expr1_0 = MInst::AluRUImm16Shifted { 1696 alu_op: pattern1_0.clone(), 1697 rd: expr0_0, 1698 imm: pattern3_0, 1699 }; 1700 let expr2_0 = C::emit(ctx, &expr1_0); 1701 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1702 return Some(expr3_0); 1703 } 1704 1705 // Generated as internal constructor for term alu_ruimm32shifted. 1706 pub fn constructor_alu_ruimm32shifted<C: Context>( 1707 ctx: &mut C, 1708 arg0: Type, 1709 arg1: &ALUOp, 1710 arg2: Reg, 1711 arg3: UImm32Shifted, 1712 ) -> Option<Reg> { 1713 let pattern0_0 = arg0; 1714 let pattern1_0 = arg1; 1715 let pattern2_0 = arg2; 1716 let pattern3_0 = arg3; 1717 // Rule at src/isa/s390x/inst.isle line 1372. 1718 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1719 let expr1_0 = MInst::AluRUImm32Shifted { 1720 alu_op: pattern1_0.clone(), 1721 rd: expr0_0, 1722 imm: pattern3_0, 1723 }; 1724 let expr2_0 = C::emit(ctx, &expr1_0); 1725 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1726 return Some(expr3_0); 1727 } 1728 1729 // Generated as internal constructor for term smul_wide. 1730 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1731 let pattern0_0 = arg0; 1732 let pattern1_0 = arg1; 1733 // Rule at src/isa/s390x/inst.isle line 1379. 1734 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1735 let expr1_0 = MInst::SMulWide { 1736 rn: pattern0_0, 1737 rm: pattern1_0, 1738 }; 1739 let expr2_0 = C::emit(ctx, &expr1_0); 1740 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1741 return Some(expr3_0); 1742 } 1743 1744 // Generated as internal constructor for term umul_wide. 1745 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1746 let pattern0_0 = arg0; 1747 let pattern1_0 = arg1; 1748 // Rule at src/isa/s390x/inst.isle line 1386. 1749 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1750 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1751 let expr2_0 = MInst::Mov64 { 1752 rd: expr1_0, 1753 rm: pattern1_0, 1754 }; 1755 let expr3_0 = C::emit(ctx, &expr2_0); 1756 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1757 let expr5_0 = C::emit(ctx, &expr4_0); 1758 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1759 return Some(expr6_0); 1760 } 1761 1762 // Generated as internal constructor for term sdivmod32. 1763 pub fn constructor_sdivmod32<C: Context>( 1764 ctx: &mut C, 1765 arg0: &RegPair, 1766 arg1: Reg, 1767 ) -> Option<RegPair> { 1768 let pattern0_0 = arg0; 1769 let pattern1_0 = arg1; 1770 // Rule at src/isa/s390x/inst.isle line 1394. 1771 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1772 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1773 let expr2_0 = C::emit(ctx, &expr1_0); 1774 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1775 return Some(expr3_0); 1776 } 1777 1778 // Generated as internal constructor for term sdivmod64. 1779 pub fn constructor_sdivmod64<C: Context>( 1780 ctx: &mut C, 1781 arg0: &RegPair, 1782 arg1: Reg, 1783 ) -> Option<RegPair> { 1784 let pattern0_0 = arg0; 1785 let pattern1_0 = arg1; 1786 // Rule at src/isa/s390x/inst.isle line 1401. 1787 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1788 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1789 let expr2_0 = C::emit(ctx, &expr1_0); 1790 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1791 return Some(expr3_0); 1792 } 1793 1794 // Generated as internal constructor for term udivmod32. 1795 pub fn constructor_udivmod32<C: Context>( 1796 ctx: &mut C, 1797 arg0: &RegPair, 1798 arg1: Reg, 1799 ) -> Option<RegPair> { 1800 let pattern0_0 = arg0; 1801 let pattern1_0 = arg1; 1802 // Rule at src/isa/s390x/inst.isle line 1408. 1803 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1804 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1805 let expr2_0 = C::emit(ctx, &expr1_0); 1806 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1807 return Some(expr3_0); 1808 } 1809 1810 // Generated as internal constructor for term udivmod64. 1811 pub fn constructor_udivmod64<C: Context>( 1812 ctx: &mut C, 1813 arg0: &RegPair, 1814 arg1: Reg, 1815 ) -> Option<RegPair> { 1816 let pattern0_0 = arg0; 1817 let pattern1_0 = arg1; 1818 // Rule at src/isa/s390x/inst.isle line 1415. 1819 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1820 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1821 let expr2_0 = C::emit(ctx, &expr1_0); 1822 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1823 return Some(expr3_0); 1824 } 1825 1826 // Generated as internal constructor for term shift_rr. 1827 pub fn constructor_shift_rr<C: Context>( 1828 ctx: &mut C, 1829 arg0: Type, 1830 arg1: &ShiftOp, 1831 arg2: Reg, 1832 arg3: u8, 1833 arg4: Reg, 1834 ) -> Option<Reg> { 1835 let pattern0_0 = arg0; 1836 let pattern1_0 = arg1; 1837 let pattern2_0 = arg2; 1838 let pattern3_0 = arg3; 1839 let pattern4_0 = arg4; 1840 // Rule at src/isa/s390x/inst.isle line 1422. 1841 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1842 let expr1_0 = MInst::ShiftRR { 1843 shift_op: pattern1_0.clone(), 1844 rd: expr0_0, 1845 rn: pattern2_0, 1846 shift_imm: pattern3_0, 1847 shift_reg: pattern4_0, 1848 }; 1849 let expr2_0 = C::emit(ctx, &expr1_0); 1850 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1851 return Some(expr3_0); 1852 } 1853 1854 // Generated as internal constructor for term rxsbg_test. 1855 pub fn constructor_rxsbg_test<C: Context>( 1856 ctx: &mut C, 1857 arg0: &RxSBGOp, 1858 arg1: Reg, 1859 arg2: Reg, 1860 arg3: u8, 1861 arg4: u8, 1862 arg5: i8, 1863 ) -> Option<ProducesFlags> { 1864 let pattern0_0 = arg0; 1865 let pattern1_0 = arg1; 1866 let pattern2_0 = arg2; 1867 let pattern3_0 = arg3; 1868 let pattern4_0 = arg4; 1869 let pattern5_0 = arg5; 1870 // Rule at src/isa/s390x/inst.isle line 1429. 1871 let expr0_0 = MInst::RxSBGTest { 1872 op: pattern0_0.clone(), 1873 rd: pattern1_0, 1874 rn: pattern2_0, 1875 start_bit: pattern3_0, 1876 end_bit: pattern4_0, 1877 rotate_amt: pattern5_0, 1878 }; 1879 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1880 return Some(expr1_0); 1881 } 1882 1883 // Generated as internal constructor for term unary_rr. 1884 pub fn constructor_unary_rr<C: Context>( 1885 ctx: &mut C, 1886 arg0: Type, 1887 arg1: &UnaryOp, 1888 arg2: Reg, 1889 ) -> Option<Reg> { 1890 let pattern0_0 = arg0; 1891 let pattern1_0 = arg1; 1892 let pattern2_0 = arg2; 1893 // Rule at src/isa/s390x/inst.isle line 1435. 1894 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1895 let expr1_0 = MInst::UnaryRR { 1896 op: pattern1_0.clone(), 1897 rd: expr0_0, 1898 rn: pattern2_0, 1899 }; 1900 let expr2_0 = C::emit(ctx, &expr1_0); 1901 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1902 return Some(expr3_0); 1903 } 1904 1905 // Generated as internal constructor for term cmp_rr. 1906 pub fn constructor_cmp_rr<C: Context>( 1907 ctx: &mut C, 1908 arg0: &CmpOp, 1909 arg1: Reg, 1910 arg2: Reg, 1911 ) -> Option<ProducesFlags> { 1912 let pattern0_0 = arg0; 1913 let pattern1_0 = arg1; 1914 let pattern2_0 = arg2; 1915 // Rule at src/isa/s390x/inst.isle line 1442. 1916 let expr0_0 = MInst::CmpRR { 1917 op: pattern0_0.clone(), 1918 rn: pattern1_0, 1919 rm: pattern2_0, 1920 }; 1921 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1922 return Some(expr1_0); 1923 } 1924 1925 // Generated as internal constructor for term cmp_rx. 1926 pub fn constructor_cmp_rx<C: Context>( 1927 ctx: &mut C, 1928 arg0: &CmpOp, 1929 arg1: Reg, 1930 arg2: &MemArg, 1931 ) -> Option<ProducesFlags> { 1932 let pattern0_0 = arg0; 1933 let pattern1_0 = arg1; 1934 let pattern2_0 = arg2; 1935 // Rule at src/isa/s390x/inst.isle line 1447. 1936 let expr0_0 = MInst::CmpRX { 1937 op: pattern0_0.clone(), 1938 rn: pattern1_0, 1939 mem: pattern2_0.clone(), 1940 }; 1941 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1942 return Some(expr1_0); 1943 } 1944 1945 // Generated as internal constructor for term cmp_rsimm16. 1946 pub fn constructor_cmp_rsimm16<C: Context>( 1947 ctx: &mut C, 1948 arg0: &CmpOp, 1949 arg1: Reg, 1950 arg2: i16, 1951 ) -> Option<ProducesFlags> { 1952 let pattern0_0 = arg0; 1953 let pattern1_0 = arg1; 1954 let pattern2_0 = arg2; 1955 // Rule at src/isa/s390x/inst.isle line 1452. 1956 let expr0_0 = MInst::CmpRSImm16 { 1957 op: pattern0_0.clone(), 1958 rn: pattern1_0, 1959 imm: pattern2_0, 1960 }; 1961 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1962 return Some(expr1_0); 1963 } 1964 1965 // Generated as internal constructor for term cmp_rsimm32. 1966 pub fn constructor_cmp_rsimm32<C: Context>( 1967 ctx: &mut C, 1968 arg0: &CmpOp, 1969 arg1: Reg, 1970 arg2: i32, 1971 ) -> Option<ProducesFlags> { 1972 let pattern0_0 = arg0; 1973 let pattern1_0 = arg1; 1974 let pattern2_0 = arg2; 1975 // Rule at src/isa/s390x/inst.isle line 1457. 1976 let expr0_0 = MInst::CmpRSImm32 { 1977 op: pattern0_0.clone(), 1978 rn: pattern1_0, 1979 imm: pattern2_0, 1980 }; 1981 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1982 return Some(expr1_0); 1983 } 1984 1985 // Generated as internal constructor for term cmp_ruimm32. 1986 pub fn constructor_cmp_ruimm32<C: Context>( 1987 ctx: &mut C, 1988 arg0: &CmpOp, 1989 arg1: Reg, 1990 arg2: u32, 1991 ) -> Option<ProducesFlags> { 1992 let pattern0_0 = arg0; 1993 let pattern1_0 = arg1; 1994 let pattern2_0 = arg2; 1995 // Rule at src/isa/s390x/inst.isle line 1462. 1996 let expr0_0 = MInst::CmpRUImm32 { 1997 op: pattern0_0.clone(), 1998 rn: pattern1_0, 1999 imm: pattern2_0, 2000 }; 2001 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2002 return Some(expr1_0); 2003 } 2004 2005 // Generated as internal constructor for term atomic_rmw_impl. 2006 pub fn constructor_atomic_rmw_impl<C: Context>( 2007 ctx: &mut C, 2008 arg0: Type, 2009 arg1: &ALUOp, 2010 arg2: Reg, 2011 arg3: &MemArg, 2012 ) -> Option<Reg> { 2013 let pattern0_0 = arg0; 2014 let pattern1_0 = arg1; 2015 let pattern2_0 = arg2; 2016 let pattern3_0 = arg3; 2017 // Rule at src/isa/s390x/inst.isle line 1467. 2018 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2019 let expr1_0 = MInst::AtomicRmw { 2020 alu_op: pattern1_0.clone(), 2021 rd: expr0_0, 2022 rn: pattern2_0, 2023 mem: pattern3_0.clone(), 2024 }; 2025 let expr2_0 = C::emit(ctx, &expr1_0); 2026 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2027 return Some(expr3_0); 2028 } 2029 2030 // Generated as internal constructor for term atomic_cas32. 2031 pub fn constructor_atomic_cas32<C: Context>( 2032 ctx: &mut C, 2033 arg0: Reg, 2034 arg1: Reg, 2035 arg2: &MemArg, 2036 ) -> Option<Reg> { 2037 let pattern0_0 = arg0; 2038 let pattern1_0 = arg1; 2039 let pattern2_0 = arg2; 2040 // Rule at src/isa/s390x/inst.isle line 1474. 2041 let expr0_0: Type = I32; 2042 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2043 let expr2_0 = MInst::AtomicCas32 { 2044 rd: expr1_0, 2045 rn: pattern1_0, 2046 mem: pattern2_0.clone(), 2047 }; 2048 let expr3_0 = C::emit(ctx, &expr2_0); 2049 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2050 return Some(expr4_0); 2051 } 2052 2053 // Generated as internal constructor for term atomic_cas64. 2054 pub fn constructor_atomic_cas64<C: Context>( 2055 ctx: &mut C, 2056 arg0: Reg, 2057 arg1: Reg, 2058 arg2: &MemArg, 2059 ) -> Option<Reg> { 2060 let pattern0_0 = arg0; 2061 let pattern1_0 = arg1; 2062 let pattern2_0 = arg2; 2063 // Rule at src/isa/s390x/inst.isle line 1481. 2064 let expr0_0: Type = I64; 2065 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2066 let expr2_0 = MInst::AtomicCas64 { 2067 rd: expr1_0, 2068 rn: pattern1_0, 2069 mem: pattern2_0.clone(), 2070 }; 2071 let expr3_0 = C::emit(ctx, &expr2_0); 2072 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2073 return Some(expr4_0); 2074 } 2075 2076 // Generated as internal constructor for term fence_impl. 2077 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2078 // Rule at src/isa/s390x/inst.isle line 1488. 2079 let expr0_0 = MInst::Fence; 2080 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2081 return Some(expr1_0); 2082 } 2083 2084 // Generated as internal constructor for term load32. 2085 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2086 let pattern0_0 = arg0; 2087 // Rule at src/isa/s390x/inst.isle line 1493. 2088 let expr0_0: Type = I32; 2089 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2090 let expr2_0 = MInst::Load32 { 2091 rd: expr1_0, 2092 mem: pattern0_0.clone(), 2093 }; 2094 let expr3_0 = C::emit(ctx, &expr2_0); 2095 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2096 return Some(expr4_0); 2097 } 2098 2099 // Generated as internal constructor for term load64. 2100 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2101 let pattern0_0 = arg0; 2102 // Rule at src/isa/s390x/inst.isle line 1500. 2103 let expr0_0: Type = I64; 2104 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2105 let expr2_0 = MInst::Load64 { 2106 rd: expr1_0, 2107 mem: pattern0_0.clone(), 2108 }; 2109 let expr3_0 = C::emit(ctx, &expr2_0); 2110 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2111 return Some(expr4_0); 2112 } 2113 2114 // Generated as internal constructor for term loadrev16. 2115 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2116 let pattern0_0 = arg0; 2117 // Rule at src/isa/s390x/inst.isle line 1507. 2118 let expr0_0: Type = I32; 2119 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2120 let expr2_0 = MInst::LoadRev16 { 2121 rd: expr1_0, 2122 mem: pattern0_0.clone(), 2123 }; 2124 let expr3_0 = C::emit(ctx, &expr2_0); 2125 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2126 return Some(expr4_0); 2127 } 2128 2129 // Generated as internal constructor for term loadrev32. 2130 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2131 let pattern0_0 = arg0; 2132 // Rule at src/isa/s390x/inst.isle line 1514. 2133 let expr0_0: Type = I32; 2134 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2135 let expr2_0 = MInst::LoadRev32 { 2136 rd: expr1_0, 2137 mem: pattern0_0.clone(), 2138 }; 2139 let expr3_0 = C::emit(ctx, &expr2_0); 2140 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2141 return Some(expr4_0); 2142 } 2143 2144 // Generated as internal constructor for term loadrev64. 2145 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2146 let pattern0_0 = arg0; 2147 // Rule at src/isa/s390x/inst.isle line 1521. 2148 let expr0_0: Type = I64; 2149 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2150 let expr2_0 = MInst::LoadRev64 { 2151 rd: expr1_0, 2152 mem: pattern0_0.clone(), 2153 }; 2154 let expr3_0 = C::emit(ctx, &expr2_0); 2155 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2156 return Some(expr4_0); 2157 } 2158 2159 // Generated as internal constructor for term store8. 2160 pub fn constructor_store8<C: Context>( 2161 ctx: &mut C, 2162 arg0: Reg, 2163 arg1: &MemArg, 2164 ) -> Option<SideEffectNoResult> { 2165 let pattern0_0 = arg0; 2166 let pattern1_0 = arg1; 2167 // Rule at src/isa/s390x/inst.isle line 1528. 2168 let expr0_0 = MInst::Store8 { 2169 rd: pattern0_0, 2170 mem: pattern1_0.clone(), 2171 }; 2172 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2173 return Some(expr1_0); 2174 } 2175 2176 // Generated as internal constructor for term store16. 2177 pub fn constructor_store16<C: Context>( 2178 ctx: &mut C, 2179 arg0: Reg, 2180 arg1: &MemArg, 2181 ) -> Option<SideEffectNoResult> { 2182 let pattern0_0 = arg0; 2183 let pattern1_0 = arg1; 2184 // Rule at src/isa/s390x/inst.isle line 1533. 2185 let expr0_0 = MInst::Store16 { 2186 rd: pattern0_0, 2187 mem: pattern1_0.clone(), 2188 }; 2189 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2190 return Some(expr1_0); 2191 } 2192 2193 // Generated as internal constructor for term store32. 2194 pub fn constructor_store32<C: Context>( 2195 ctx: &mut C, 2196 arg0: Reg, 2197 arg1: &MemArg, 2198 ) -> Option<SideEffectNoResult> { 2199 let pattern0_0 = arg0; 2200 let pattern1_0 = arg1; 2201 // Rule at src/isa/s390x/inst.isle line 1538. 2202 let expr0_0 = MInst::Store32 { 2203 rd: pattern0_0, 2204 mem: pattern1_0.clone(), 2205 }; 2206 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2207 return Some(expr1_0); 2208 } 2209 2210 // Generated as internal constructor for term store64. 2211 pub fn constructor_store64<C: Context>( 2212 ctx: &mut C, 2213 arg0: Reg, 2214 arg1: &MemArg, 2215 ) -> Option<SideEffectNoResult> { 2216 let pattern0_0 = arg0; 2217 let pattern1_0 = arg1; 2218 // Rule at src/isa/s390x/inst.isle line 1543. 2219 let expr0_0 = MInst::Store64 { 2220 rd: pattern0_0, 2221 mem: pattern1_0.clone(), 2222 }; 2223 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2224 return Some(expr1_0); 2225 } 2226 2227 // Generated as internal constructor for term store8_imm. 2228 pub fn constructor_store8_imm<C: Context>( 2229 ctx: &mut C, 2230 arg0: u8, 2231 arg1: &MemArg, 2232 ) -> Option<SideEffectNoResult> { 2233 let pattern0_0 = arg0; 2234 let pattern1_0 = arg1; 2235 // Rule at src/isa/s390x/inst.isle line 1548. 2236 let expr0_0 = MInst::StoreImm8 { 2237 imm: pattern0_0, 2238 mem: pattern1_0.clone(), 2239 }; 2240 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2241 return Some(expr1_0); 2242 } 2243 2244 // Generated as internal constructor for term store16_imm. 2245 pub fn constructor_store16_imm<C: Context>( 2246 ctx: &mut C, 2247 arg0: i16, 2248 arg1: &MemArg, 2249 ) -> Option<SideEffectNoResult> { 2250 let pattern0_0 = arg0; 2251 let pattern1_0 = arg1; 2252 // Rule at src/isa/s390x/inst.isle line 1553. 2253 let expr0_0 = MInst::StoreImm16 { 2254 imm: pattern0_0, 2255 mem: pattern1_0.clone(), 2256 }; 2257 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2258 return Some(expr1_0); 2259 } 2260 2261 // Generated as internal constructor for term store32_simm16. 2262 pub fn constructor_store32_simm16<C: Context>( 2263 ctx: &mut C, 2264 arg0: i16, 2265 arg1: &MemArg, 2266 ) -> Option<SideEffectNoResult> { 2267 let pattern0_0 = arg0; 2268 let pattern1_0 = arg1; 2269 // Rule at src/isa/s390x/inst.isle line 1558. 2270 let expr0_0 = MInst::StoreImm32SExt16 { 2271 imm: pattern0_0, 2272 mem: pattern1_0.clone(), 2273 }; 2274 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2275 return Some(expr1_0); 2276 } 2277 2278 // Generated as internal constructor for term store64_simm16. 2279 pub fn constructor_store64_simm16<C: Context>( 2280 ctx: &mut C, 2281 arg0: i16, 2282 arg1: &MemArg, 2283 ) -> Option<SideEffectNoResult> { 2284 let pattern0_0 = arg0; 2285 let pattern1_0 = arg1; 2286 // Rule at src/isa/s390x/inst.isle line 1563. 2287 let expr0_0 = MInst::StoreImm64SExt16 { 2288 imm: pattern0_0, 2289 mem: pattern1_0.clone(), 2290 }; 2291 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2292 return Some(expr1_0); 2293 } 2294 2295 // Generated as internal constructor for term storerev16. 2296 pub fn constructor_storerev16<C: Context>( 2297 ctx: &mut C, 2298 arg0: Reg, 2299 arg1: &MemArg, 2300 ) -> Option<SideEffectNoResult> { 2301 let pattern0_0 = arg0; 2302 let pattern1_0 = arg1; 2303 // Rule at src/isa/s390x/inst.isle line 1568. 2304 let expr0_0 = MInst::StoreRev16 { 2305 rd: pattern0_0, 2306 mem: pattern1_0.clone(), 2307 }; 2308 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2309 return Some(expr1_0); 2310 } 2311 2312 // Generated as internal constructor for term storerev32. 2313 pub fn constructor_storerev32<C: Context>( 2314 ctx: &mut C, 2315 arg0: Reg, 2316 arg1: &MemArg, 2317 ) -> Option<SideEffectNoResult> { 2318 let pattern0_0 = arg0; 2319 let pattern1_0 = arg1; 2320 // Rule at src/isa/s390x/inst.isle line 1573. 2321 let expr0_0 = MInst::StoreRev32 { 2322 rd: pattern0_0, 2323 mem: pattern1_0.clone(), 2324 }; 2325 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2326 return Some(expr1_0); 2327 } 2328 2329 // Generated as internal constructor for term storerev64. 2330 pub fn constructor_storerev64<C: Context>( 2331 ctx: &mut C, 2332 arg0: Reg, 2333 arg1: &MemArg, 2334 ) -> Option<SideEffectNoResult> { 2335 let pattern0_0 = arg0; 2336 let pattern1_0 = arg1; 2337 // Rule at src/isa/s390x/inst.isle line 1578. 2338 let expr0_0 = MInst::StoreRev64 { 2339 rd: pattern0_0, 2340 mem: pattern1_0.clone(), 2341 }; 2342 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2343 return Some(expr1_0); 2344 } 2345 2346 // Generated as internal constructor for term fpu_rr. 2347 pub fn constructor_fpu_rr<C: Context>( 2348 ctx: &mut C, 2349 arg0: Type, 2350 arg1: &FPUOp1, 2351 arg2: Reg, 2352 ) -> Option<Reg> { 2353 let pattern0_0 = arg0; 2354 let pattern1_0 = arg1; 2355 let pattern2_0 = arg2; 2356 // Rule at src/isa/s390x/inst.isle line 1583. 2357 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2358 let expr1_0 = MInst::FpuRR { 2359 fpu_op: pattern1_0.clone(), 2360 rd: expr0_0, 2361 rn: pattern2_0, 2362 }; 2363 let expr2_0 = C::emit(ctx, &expr1_0); 2364 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2365 return Some(expr3_0); 2366 } 2367 2368 // Generated as internal constructor for term fpu_rrr. 2369 pub fn constructor_fpu_rrr<C: Context>( 2370 ctx: &mut C, 2371 arg0: Type, 2372 arg1: &FPUOp2, 2373 arg2: Reg, 2374 arg3: Reg, 2375 ) -> Option<Reg> { 2376 let pattern0_0 = arg0; 2377 let pattern1_0 = arg1; 2378 let pattern2_0 = arg2; 2379 let pattern3_0 = arg3; 2380 // Rule at src/isa/s390x/inst.isle line 1590. 2381 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2382 let expr1_0 = MInst::FpuRRR { 2383 fpu_op: pattern1_0.clone(), 2384 rd: expr0_0, 2385 rm: pattern3_0, 2386 }; 2387 let expr2_0 = C::emit(ctx, &expr1_0); 2388 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2389 return Some(expr3_0); 2390 } 2391 2392 // Generated as internal constructor for term fpu_rrrr. 2393 pub fn constructor_fpu_rrrr<C: Context>( 2394 ctx: &mut C, 2395 arg0: Type, 2396 arg1: &FPUOp3, 2397 arg2: Reg, 2398 arg3: Reg, 2399 arg4: Reg, 2400 ) -> Option<Reg> { 2401 let pattern0_0 = arg0; 2402 let pattern1_0 = arg1; 2403 let pattern2_0 = arg2; 2404 let pattern3_0 = arg3; 2405 let pattern4_0 = arg4; 2406 // Rule at src/isa/s390x/inst.isle line 1597. 2407 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2408 let expr1_0 = MInst::FpuRRRR { 2409 fpu_op: pattern1_0.clone(), 2410 rd: expr0_0, 2411 rn: pattern3_0, 2412 rm: pattern4_0, 2413 }; 2414 let expr2_0 = C::emit(ctx, &expr1_0); 2415 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2416 return Some(expr3_0); 2417 } 2418 2419 // Generated as internal constructor for term fpu_copysign. 2420 pub fn constructor_fpu_copysign<C: Context>( 2421 ctx: &mut C, 2422 arg0: Type, 2423 arg1: Reg, 2424 arg2: Reg, 2425 ) -> Option<Reg> { 2426 let pattern0_0 = arg0; 2427 let pattern1_0 = arg1; 2428 let pattern2_0 = arg2; 2429 // Rule at src/isa/s390x/inst.isle line 1604. 2430 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2431 let expr1_0 = MInst::FpuCopysign { 2432 rd: expr0_0, 2433 rn: pattern1_0, 2434 rm: pattern2_0, 2435 }; 2436 let expr2_0 = C::emit(ctx, &expr1_0); 2437 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2438 return Some(expr3_0); 2439 } 2440 2441 // Generated as internal constructor for term fpu_cmp32. 2442 pub fn constructor_fpu_cmp32<C: Context>( 2443 ctx: &mut C, 2444 arg0: Reg, 2445 arg1: Reg, 2446 ) -> Option<ProducesFlags> { 2447 let pattern0_0 = arg0; 2448 let pattern1_0 = arg1; 2449 // Rule at src/isa/s390x/inst.isle line 1611. 2450 let expr0_0 = MInst::FpuCmp32 { 2451 rn: pattern0_0, 2452 rm: pattern1_0, 2453 }; 2454 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2455 return Some(expr1_0); 2456 } 2457 2458 // Generated as internal constructor for term fpu_cmp64. 2459 pub fn constructor_fpu_cmp64<C: Context>( 2460 ctx: &mut C, 2461 arg0: Reg, 2462 arg1: Reg, 2463 ) -> Option<ProducesFlags> { 2464 let pattern0_0 = arg0; 2465 let pattern1_0 = arg1; 2466 // Rule at src/isa/s390x/inst.isle line 1616. 2467 let expr0_0 = MInst::FpuCmp64 { 2468 rn: pattern0_0, 2469 rm: pattern1_0, 2470 }; 2471 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2472 return Some(expr1_0); 2473 } 2474 2475 // Generated as internal constructor for term fpu_to_int. 2476 pub fn constructor_fpu_to_int<C: Context>( 2477 ctx: &mut C, 2478 arg0: Type, 2479 arg1: &FpuToIntOp, 2480 arg2: Reg, 2481 ) -> Option<ProducesFlags> { 2482 let pattern0_0 = arg0; 2483 let pattern1_0 = arg1; 2484 let pattern2_0 = arg2; 2485 // Rule at src/isa/s390x/inst.isle line 1621. 2486 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2487 let expr1_0 = MInst::FpuToInt { 2488 op: pattern1_0.clone(), 2489 rd: expr0_0, 2490 rn: pattern2_0, 2491 }; 2492 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2493 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2494 inst: expr1_0, 2495 result: expr2_0, 2496 }; 2497 return Some(expr3_0); 2498 } 2499 2500 // Generated as internal constructor for term int_to_fpu. 2501 pub fn constructor_int_to_fpu<C: Context>( 2502 ctx: &mut C, 2503 arg0: Type, 2504 arg1: &IntToFpuOp, 2505 arg2: Reg, 2506 ) -> Option<Reg> { 2507 let pattern0_0 = arg0; 2508 let pattern1_0 = arg1; 2509 let pattern2_0 = arg2; 2510 // Rule at src/isa/s390x/inst.isle line 1628. 2511 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2512 let expr1_0 = MInst::IntToFpu { 2513 op: pattern1_0.clone(), 2514 rd: expr0_0, 2515 rn: pattern2_0, 2516 }; 2517 let expr2_0 = C::emit(ctx, &expr1_0); 2518 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2519 return Some(expr3_0); 2520 } 2521 2522 // Generated as internal constructor for term fpu_round. 2523 pub fn constructor_fpu_round<C: Context>( 2524 ctx: &mut C, 2525 arg0: Type, 2526 arg1: &FpuRoundMode, 2527 arg2: Reg, 2528 ) -> Option<Reg> { 2529 let pattern0_0 = arg0; 2530 let pattern1_0 = arg1; 2531 let pattern2_0 = arg2; 2532 // Rule at src/isa/s390x/inst.isle line 1635. 2533 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2534 let expr1_0 = MInst::FpuRound { 2535 op: pattern1_0.clone(), 2536 rd: expr0_0, 2537 rn: pattern2_0, 2538 }; 2539 let expr2_0 = C::emit(ctx, &expr1_0); 2540 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2541 return Some(expr3_0); 2542 } 2543 2544 // Generated as internal constructor for term fpuvec_rrr. 2545 pub fn constructor_fpuvec_rrr<C: Context>( 2546 ctx: &mut C, 2547 arg0: Type, 2548 arg1: &FPUOp2, 2549 arg2: Reg, 2550 arg3: Reg, 2551 ) -> Option<Reg> { 2552 let pattern0_0 = arg0; 2553 let pattern1_0 = arg1; 2554 let pattern2_0 = arg2; 2555 let pattern3_0 = arg3; 2556 // Rule at src/isa/s390x/inst.isle line 1642. 2557 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2558 let expr1_0 = MInst::FpuVecRRR { 2559 fpu_op: pattern1_0.clone(), 2560 rd: expr0_0, 2561 rn: pattern2_0, 2562 rm: pattern3_0, 2563 }; 2564 let expr2_0 = C::emit(ctx, &expr1_0); 2565 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2566 return Some(expr3_0); 2567 } 2568 2569 // Generated as internal constructor for term mov_to_fpr. 2570 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2571 let pattern0_0 = arg0; 2572 // Rule at src/isa/s390x/inst.isle line 1649. 2573 let expr0_0: Type = F64; 2574 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2575 let expr2_0 = MInst::MovToFpr { 2576 rd: expr1_0, 2577 rn: pattern0_0, 2578 }; 2579 let expr3_0 = C::emit(ctx, &expr2_0); 2580 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2581 return Some(expr4_0); 2582 } 2583 2584 // Generated as internal constructor for term mov_from_fpr. 2585 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2586 let pattern0_0 = arg0; 2587 // Rule at src/isa/s390x/inst.isle line 1656. 2588 let expr0_0: Type = I64; 2589 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2590 let expr2_0 = MInst::MovFromFpr { 2591 rd: expr1_0, 2592 rn: pattern0_0, 2593 }; 2594 let expr3_0 = C::emit(ctx, &expr2_0); 2595 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2596 return Some(expr4_0); 2597 } 2598 2599 // Generated as internal constructor for term fpu_load32. 2600 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2601 let pattern0_0 = arg0; 2602 // Rule at src/isa/s390x/inst.isle line 1663. 2603 let expr0_0: Type = F32; 2604 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2605 let expr2_0 = MInst::FpuLoad32 { 2606 rd: expr1_0, 2607 mem: pattern0_0.clone(), 2608 }; 2609 let expr3_0 = C::emit(ctx, &expr2_0); 2610 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2611 return Some(expr4_0); 2612 } 2613 2614 // Generated as internal constructor for term fpu_load64. 2615 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2616 let pattern0_0 = arg0; 2617 // Rule at src/isa/s390x/inst.isle line 1670. 2618 let expr0_0: Type = F64; 2619 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2620 let expr2_0 = MInst::FpuLoad64 { 2621 rd: expr1_0, 2622 mem: pattern0_0.clone(), 2623 }; 2624 let expr3_0 = C::emit(ctx, &expr2_0); 2625 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2626 return Some(expr4_0); 2627 } 2628 2629 // Generated as internal constructor for term fpu_loadrev32. 2630 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2631 let pattern0_0 = arg0; 2632 // Rule at src/isa/s390x/inst.isle line 1677. 2633 let expr0_0: Type = F32; 2634 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2635 let expr2_0 = MInst::FpuLoadRev32 { 2636 rd: expr1_0, 2637 mem: pattern0_0.clone(), 2638 }; 2639 let expr3_0 = C::emit(ctx, &expr2_0); 2640 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2641 return Some(expr4_0); 2642 } 2643 2644 // Generated as internal constructor for term fpu_loadrev64. 2645 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2646 let pattern0_0 = arg0; 2647 // Rule at src/isa/s390x/inst.isle line 1684. 2648 let expr0_0: Type = F64; 2649 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2650 let expr2_0 = MInst::FpuLoadRev64 { 2651 rd: expr1_0, 2652 mem: pattern0_0.clone(), 2653 }; 2654 let expr3_0 = C::emit(ctx, &expr2_0); 2655 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2656 return Some(expr4_0); 2657 } 2658 2659 // Generated as internal constructor for term fpu_store32. 2660 pub fn constructor_fpu_store32<C: Context>( 2661 ctx: &mut C, 2662 arg0: Reg, 2663 arg1: &MemArg, 2664 ) -> Option<SideEffectNoResult> { 2665 let pattern0_0 = arg0; 2666 let pattern1_0 = arg1; 2667 // Rule at src/isa/s390x/inst.isle line 1691. 2668 let expr0_0 = MInst::FpuStore32 { 2669 rd: pattern0_0, 2670 mem: pattern1_0.clone(), 2671 }; 2672 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2673 return Some(expr1_0); 2674 } 2675 2676 // Generated as internal constructor for term fpu_store64. 2677 pub fn constructor_fpu_store64<C: Context>( 2678 ctx: &mut C, 2679 arg0: Reg, 2680 arg1: &MemArg, 2681 ) -> Option<SideEffectNoResult> { 2682 let pattern0_0 = arg0; 2683 let pattern1_0 = arg1; 2684 // Rule at src/isa/s390x/inst.isle line 1696. 2685 let expr0_0 = MInst::FpuStore64 { 2686 rd: pattern0_0, 2687 mem: pattern1_0.clone(), 2688 }; 2689 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2690 return Some(expr1_0); 2691 } 2692 2693 // Generated as internal constructor for term fpu_storerev32. 2694 pub fn constructor_fpu_storerev32<C: Context>( 2695 ctx: &mut C, 2696 arg0: Reg, 2697 arg1: &MemArg, 2698 ) -> Option<SideEffectNoResult> { 2699 let pattern0_0 = arg0; 2700 let pattern1_0 = arg1; 2701 // Rule at src/isa/s390x/inst.isle line 1701. 2702 let expr0_0 = MInst::FpuStoreRev32 { 2703 rd: pattern0_0, 2704 mem: pattern1_0.clone(), 2705 }; 2706 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2707 return Some(expr1_0); 2708 } 2709 2710 // Generated as internal constructor for term fpu_storerev64. 2711 pub fn constructor_fpu_storerev64<C: Context>( 2712 ctx: &mut C, 2713 arg0: Reg, 2714 arg1: &MemArg, 2715 ) -> Option<SideEffectNoResult> { 2716 let pattern0_0 = arg0; 2717 let pattern1_0 = arg1; 2718 // Rule at src/isa/s390x/inst.isle line 1706. 2719 let expr0_0 = MInst::FpuStoreRev64 { 2720 rd: pattern0_0, 2721 mem: pattern1_0.clone(), 2722 }; 2723 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2724 return Some(expr1_0); 2725 } 2726 2727 // Generated as internal constructor for term load_ext_name_far. 2728 pub fn constructor_load_ext_name_far<C: Context>( 2729 ctx: &mut C, 2730 arg0: ExternalName, 2731 arg1: i64, 2732 ) -> Option<Reg> { 2733 let pattern0_0 = arg0; 2734 let pattern1_0 = arg1; 2735 // Rule at src/isa/s390x/inst.isle line 1711. 2736 let expr0_0: Type = I64; 2737 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2738 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2739 let expr3_0 = MInst::LoadExtNameFar { 2740 rd: expr1_0, 2741 name: expr2_0, 2742 offset: pattern1_0, 2743 }; 2744 let expr4_0 = C::emit(ctx, &expr3_0); 2745 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2746 return Some(expr5_0); 2747 } 2748 2749 // Generated as internal constructor for term load_addr. 2750 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2751 let pattern0_0 = arg0; 2752 // Rule at src/isa/s390x/inst.isle line 1719. 2753 let expr0_0: Type = I64; 2754 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2755 let expr2_0 = MInst::LoadAddr { 2756 rd: expr1_0, 2757 mem: pattern0_0.clone(), 2758 }; 2759 let expr3_0 = C::emit(ctx, &expr2_0); 2760 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2761 return Some(expr4_0); 2762 } 2763 2764 // Generated as internal constructor for term jump_impl. 2765 pub fn constructor_jump_impl<C: Context>( 2766 ctx: &mut C, 2767 arg0: MachLabel, 2768 ) -> Option<SideEffectNoResult> { 2769 let pattern0_0 = arg0; 2770 // Rule at src/isa/s390x/inst.isle line 1726. 2771 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2772 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2773 return Some(expr1_0); 2774 } 2775 2776 // Generated as internal constructor for term cond_br. 2777 pub fn constructor_cond_br<C: Context>( 2778 ctx: &mut C, 2779 arg0: MachLabel, 2780 arg1: MachLabel, 2781 arg2: &Cond, 2782 ) -> Option<SideEffectNoResult> { 2783 let pattern0_0 = arg0; 2784 let pattern1_0 = arg1; 2785 let pattern2_0 = arg2; 2786 // Rule at src/isa/s390x/inst.isle line 1731. 2787 let expr0_0 = MInst::CondBr { 2788 taken: pattern0_0, 2789 not_taken: pattern1_0, 2790 cond: pattern2_0.clone(), 2791 }; 2792 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2793 return Some(expr1_0); 2794 } 2795 2796 // Generated as internal constructor for term oneway_cond_br. 2797 pub fn constructor_oneway_cond_br<C: Context>( 2798 ctx: &mut C, 2799 arg0: MachLabel, 2800 arg1: &Cond, 2801 ) -> Option<SideEffectNoResult> { 2802 let pattern0_0 = arg0; 2803 let pattern1_0 = arg1; 2804 // Rule at src/isa/s390x/inst.isle line 1736. 2805 let expr0_0 = MInst::OneWayCondBr { 2806 target: pattern0_0, 2807 cond: pattern1_0.clone(), 2808 }; 2809 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2810 return Some(expr1_0); 2811 } 2812 2813 // Generated as internal constructor for term jt_sequence. 2814 pub fn constructor_jt_sequence<C: Context>( 2815 ctx: &mut C, 2816 arg0: Reg, 2817 arg1: &VecMachLabel, 2818 ) -> Option<SideEffectNoResult> { 2819 let pattern0_0 = arg0; 2820 let pattern1_0 = arg1; 2821 // Rule at src/isa/s390x/inst.isle line 1741. 2822 let expr0_0 = MInst::JTSequence { 2823 ridx: pattern0_0, 2824 targets: pattern1_0.clone(), 2825 }; 2826 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2827 return Some(expr1_0); 2828 } 2829 2830 // Generated as internal constructor for term drop_flags. 2831 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2832 let pattern0_0 = arg0; 2833 if let &ProducesFlags::ProducesFlagsReturnsReg { 2834 inst: ref pattern1_0, 2835 result: pattern1_1, 2836 } = pattern0_0 2837 { 2838 // Rule at src/isa/s390x/inst.isle line 1746. 2839 let expr0_0 = C::emit(ctx, pattern1_0); 2840 return Some(pattern1_1); 2841 } 2842 return None; 2843 } 2844 2845 // Generated as internal constructor for term push_alu_reg. 2846 pub fn constructor_push_alu_reg<C: Context>( 2847 ctx: &mut C, 2848 arg0: &VecMInstBuilder, 2849 arg1: &ALUOp, 2850 arg2: WritableReg, 2851 arg3: Reg, 2852 arg4: Reg, 2853 ) -> Option<Reg> { 2854 let pattern0_0 = arg0; 2855 let pattern1_0 = arg1; 2856 let pattern2_0 = arg2; 2857 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2858 let pattern4_0 = arg3; 2859 let pattern5_0 = arg4; 2860 // Rule at src/isa/s390x/inst.isle line 1785. 2861 let expr0_0 = MInst::AluRRR { 2862 alu_op: pattern1_0.clone(), 2863 rd: pattern3_0, 2864 rn: pattern4_0, 2865 rm: pattern5_0, 2866 }; 2867 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2868 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2869 return Some(expr2_0); 2870 } 2871 return None; 2872 } 2873 2874 // Generated as internal constructor for term push_alu_uimm32shifted. 2875 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2876 ctx: &mut C, 2877 arg0: &VecMInstBuilder, 2878 arg1: &ALUOp, 2879 arg2: WritableReg, 2880 arg3: Reg, 2881 arg4: UImm32Shifted, 2882 ) -> Option<Reg> { 2883 let pattern0_0 = arg0; 2884 let pattern1_0 = arg1; 2885 let pattern2_0 = arg2; 2886 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2887 let pattern4_0 = arg3; 2888 let mut closure5 = || { 2889 return Some(pattern3_0); 2890 }; 2891 if let Some(pattern5_0) = closure5() { 2892 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2893 let pattern7_0 = arg4; 2894 // Rule at src/isa/s390x/inst.isle line 1791. 2895 let expr0_0 = MInst::AluRUImm32Shifted { 2896 alu_op: pattern1_0.clone(), 2897 rd: pattern3_0, 2898 imm: pattern7_0, 2899 }; 2900 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2901 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2902 return Some(expr2_0); 2903 } 2904 } 2905 } 2906 return None; 2907 } 2908 2909 // Generated as internal constructor for term push_shift. 2910 pub fn constructor_push_shift<C: Context>( 2911 ctx: &mut C, 2912 arg0: &VecMInstBuilder, 2913 arg1: &ShiftOp, 2914 arg2: WritableReg, 2915 arg3: Reg, 2916 arg4: u8, 2917 arg5: Reg, 2918 ) -> Option<Reg> { 2919 let pattern0_0 = arg0; 2920 let pattern1_0 = arg1; 2921 let pattern2_0 = arg2; 2922 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2923 let pattern4_0 = arg3; 2924 let pattern5_0 = arg4; 2925 let pattern6_0 = arg5; 2926 // Rule at src/isa/s390x/inst.isle line 1797. 2927 let expr0_0 = MInst::ShiftRR { 2928 shift_op: pattern1_0.clone(), 2929 rd: pattern3_0, 2930 rn: pattern4_0, 2931 shift_imm: pattern5_0, 2932 shift_reg: pattern6_0, 2933 }; 2934 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2935 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2936 return Some(expr2_0); 2937 } 2938 return None; 2939 } 2940 2941 // Generated as internal constructor for term push_rxsbg. 2942 pub fn constructor_push_rxsbg<C: Context>( 2943 ctx: &mut C, 2944 arg0: &VecMInstBuilder, 2945 arg1: &RxSBGOp, 2946 arg2: WritableReg, 2947 arg3: Reg, 2948 arg4: Reg, 2949 arg5: u8, 2950 arg6: u8, 2951 arg7: i8, 2952 ) -> Option<Reg> { 2953 let pattern0_0 = arg0; 2954 let pattern1_0 = arg1; 2955 let pattern2_0 = arg2; 2956 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2957 let pattern4_0 = arg3; 2958 let mut closure5 = || { 2959 return Some(pattern3_0); 2960 }; 2961 if let Some(pattern5_0) = closure5() { 2962 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2963 let pattern7_0 = arg4; 2964 let pattern8_0 = arg5; 2965 let pattern9_0 = arg6; 2966 let pattern10_0 = arg7; 2967 // Rule at src/isa/s390x/inst.isle line 1804. 2968 let expr0_0 = MInst::RxSBG { 2969 op: pattern1_0.clone(), 2970 rd: pattern3_0, 2971 rn: pattern7_0, 2972 start_bit: pattern8_0, 2973 end_bit: pattern9_0, 2974 rotate_amt: pattern10_0, 2975 }; 2976 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2977 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2978 return Some(expr2_0); 2979 } 2980 } 2981 } 2982 return None; 2983 } 2984 2985 // Generated as internal constructor for term push_unary. 2986 pub fn constructor_push_unary<C: Context>( 2987 ctx: &mut C, 2988 arg0: &VecMInstBuilder, 2989 arg1: &UnaryOp, 2990 arg2: WritableReg, 2991 arg3: Reg, 2992 ) -> Option<Reg> { 2993 let pattern0_0 = arg0; 2994 let pattern1_0 = arg1; 2995 let pattern2_0 = arg2; 2996 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2997 let pattern4_0 = arg3; 2998 // Rule at src/isa/s390x/inst.isle line 1811. 2999 let expr0_0 = MInst::UnaryRR { 3000 op: pattern1_0.clone(), 3001 rd: pattern3_0, 3002 rn: pattern4_0, 3003 }; 3004 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3005 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3006 return Some(expr2_0); 3007 } 3008 return None; 3009 } 3010 3011 // Generated as internal constructor for term push_atomic_cas32. 3012 pub fn constructor_push_atomic_cas32<C: Context>( 3013 ctx: &mut C, 3014 arg0: &VecMInstBuilder, 3015 arg1: WritableReg, 3016 arg2: Reg, 3017 arg3: &MemArg, 3018 ) -> Option<Reg> { 3019 let pattern0_0 = arg0; 3020 let pattern1_0 = arg1; 3021 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3022 let pattern3_0 = arg2; 3023 let pattern4_0 = arg3; 3024 // Rule at src/isa/s390x/inst.isle line 1817. 3025 let expr0_0 = MInst::AtomicCas32 { 3026 rd: pattern2_0, 3027 rn: pattern3_0, 3028 mem: pattern4_0.clone(), 3029 }; 3030 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3031 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3032 return Some(expr2_0); 3033 } 3034 return None; 3035 } 3036 3037 // Generated as internal constructor for term push_atomic_cas64. 3038 pub fn constructor_push_atomic_cas64<C: Context>( 3039 ctx: &mut C, 3040 arg0: &VecMInstBuilder, 3041 arg1: WritableReg, 3042 arg2: Reg, 3043 arg3: &MemArg, 3044 ) -> Option<Reg> { 3045 let pattern0_0 = arg0; 3046 let pattern1_0 = arg1; 3047 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3048 let pattern3_0 = arg2; 3049 let pattern4_0 = arg3; 3050 // Rule at src/isa/s390x/inst.isle line 1823. 3051 let expr0_0 = MInst::AtomicCas64 { 3052 rd: pattern2_0, 3053 rn: pattern3_0, 3054 mem: pattern4_0.clone(), 3055 }; 3056 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3057 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3058 return Some(expr2_0); 3059 } 3060 return None; 3061 } 3062 3063 // Generated as internal constructor for term push_break_if. 3064 pub fn constructor_push_break_if<C: Context>( 3065 ctx: &mut C, 3066 arg0: &VecMInstBuilder, 3067 arg1: &ProducesFlags, 3068 arg2: &Cond, 3069 ) -> Option<Reg> { 3070 let pattern0_0 = arg0; 3071 let pattern1_0 = arg1; 3072 if let &ProducesFlags::ProducesFlagsSideEffect { 3073 inst: ref pattern2_0, 3074 } = pattern1_0 3075 { 3076 let pattern3_0 = arg2; 3077 // Rule at src/isa/s390x/inst.isle line 1829. 3078 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3079 let expr1_0 = MInst::CondBreak { 3080 cond: pattern3_0.clone(), 3081 }; 3082 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3083 let expr3_0 = C::invalid_reg(ctx); 3084 return Some(expr3_0); 3085 } 3086 return None; 3087 } 3088 3089 // Generated as internal constructor for term emit_loop. 3090 pub fn constructor_emit_loop<C: Context>( 3091 ctx: &mut C, 3092 arg0: &VecMInstBuilder, 3093 arg1: &Cond, 3094 ) -> Option<Unit> { 3095 let pattern0_0 = arg0; 3096 let pattern1_0 = arg1; 3097 // Rule at src/isa/s390x/inst.isle line 1836. 3098 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3099 let expr1_0 = MInst::Loop { 3100 body: expr0_0, 3101 cond: pattern1_0.clone(), 3102 }; 3103 let expr2_0 = C::emit(ctx, &expr1_0); 3104 return Some(expr2_0); 3105 } 3106 3107 // Generated as internal constructor for term emit_mov. 3108 pub fn constructor_emit_mov<C: Context>( 3109 ctx: &mut C, 3110 arg0: Type, 3111 arg1: WritableReg, 3112 arg2: Reg, 3113 ) -> Option<Unit> { 3114 let pattern0_0 = arg0; 3115 if pattern0_0 == F32 { 3116 let pattern2_0 = arg1; 3117 let pattern3_0 = arg2; 3118 // Rule at src/isa/s390x/inst.isle line 1851. 3119 let expr0_0 = MInst::FpuMove32 { 3120 rd: pattern2_0, 3121 rn: pattern3_0, 3122 }; 3123 let expr1_0 = C::emit(ctx, &expr0_0); 3124 return Some(expr1_0); 3125 } 3126 if pattern0_0 == F64 { 3127 let pattern2_0 = arg1; 3128 let pattern3_0 = arg2; 3129 // Rule at src/isa/s390x/inst.isle line 1854. 3130 let expr0_0 = MInst::FpuMove64 { 3131 rd: pattern2_0, 3132 rn: pattern3_0, 3133 }; 3134 let expr1_0 = C::emit(ctx, &expr0_0); 3135 return Some(expr1_0); 3136 } 3137 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3138 let pattern2_0 = arg1; 3139 let pattern3_0 = arg2; 3140 // Rule at src/isa/s390x/inst.isle line 1845. 3141 let expr0_0 = MInst::Mov32 { 3142 rd: pattern2_0, 3143 rm: pattern3_0, 3144 }; 3145 let expr1_0 = C::emit(ctx, &expr0_0); 3146 return Some(expr1_0); 3147 } 3148 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3149 let pattern2_0 = arg1; 3150 let pattern3_0 = arg2; 3151 // Rule at src/isa/s390x/inst.isle line 1848. 3152 let expr0_0 = MInst::Mov64 { 3153 rd: pattern2_0, 3154 rm: pattern3_0, 3155 }; 3156 let expr1_0 = C::emit(ctx, &expr0_0); 3157 return Some(expr1_0); 3158 } 3159 return None; 3160 } 3161 3162 // Generated as internal constructor for term copy_writable_reg. 3163 pub fn constructor_copy_writable_reg<C: Context>( 3164 ctx: &mut C, 3165 arg0: Type, 3166 arg1: Reg, 3167 ) -> Option<WritableReg> { 3168 let pattern0_0 = arg0; 3169 let pattern1_0 = arg1; 3170 // Rule at src/isa/s390x/inst.isle line 1859. 3171 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3172 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3173 return Some(expr0_0); 3174 } 3175 3176 // Generated as internal constructor for term copy_reg. 3177 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3178 let pattern0_0 = arg0; 3179 let pattern1_0 = arg1; 3180 // Rule at src/isa/s390x/inst.isle line 1866. 3181 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3182 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3183 return Some(expr1_0); 3184 } 3185 3186 // Generated as internal constructor for term emit_load. 3187 pub fn constructor_emit_load<C: Context>( 3188 ctx: &mut C, 3189 arg0: Type, 3190 arg1: WritableReg, 3191 arg2: &MemArg, 3192 ) -> Option<Unit> { 3193 let pattern0_0 = arg0; 3194 if pattern0_0 == I32 { 3195 let pattern2_0 = arg1; 3196 let pattern3_0 = arg2; 3197 // Rule at src/isa/s390x/inst.isle line 1870. 3198 let expr0_0 = MInst::Load32 { 3199 rd: pattern2_0, 3200 mem: pattern3_0.clone(), 3201 }; 3202 let expr1_0 = C::emit(ctx, &expr0_0); 3203 return Some(expr1_0); 3204 } 3205 if pattern0_0 == I64 { 3206 let pattern2_0 = arg1; 3207 let pattern3_0 = arg2; 3208 // Rule at src/isa/s390x/inst.isle line 1872. 3209 let expr0_0 = MInst::Load64 { 3210 rd: pattern2_0, 3211 mem: pattern3_0.clone(), 3212 }; 3213 let expr1_0 = C::emit(ctx, &expr0_0); 3214 return Some(expr1_0); 3215 } 3216 return None; 3217 } 3218 3219 // Generated as internal constructor for term emit_imm. 3220 pub fn constructor_emit_imm<C: Context>( 3221 ctx: &mut C, 3222 arg0: Type, 3223 arg1: WritableReg, 3224 arg2: u64, 3225 ) -> Option<Unit> { 3226 let pattern0_0 = arg0; 3227 if pattern0_0 == F32 { 3228 let pattern2_0 = arg1; 3229 let pattern3_0 = arg2; 3230 // Rule at src/isa/s390x/inst.isle line 1928. 3231 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3232 let expr1_0 = MInst::LoadFpuConst32 { 3233 rd: pattern2_0, 3234 const_data: expr0_0, 3235 }; 3236 let expr2_0 = C::emit(ctx, &expr1_0); 3237 return Some(expr2_0); 3238 } 3239 if pattern0_0 == F64 { 3240 let pattern2_0 = arg1; 3241 let pattern3_0 = arg2; 3242 // Rule at src/isa/s390x/inst.isle line 1933. 3243 let expr0_0 = MInst::LoadFpuConst64 { 3244 rd: pattern2_0, 3245 const_data: pattern3_0, 3246 }; 3247 let expr1_0 = C::emit(ctx, &expr0_0); 3248 return Some(expr1_0); 3249 } 3250 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3251 let pattern2_0 = arg1; 3252 let pattern3_0 = arg2; 3253 // Rule at src/isa/s390x/inst.isle line 1882. 3254 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3255 let expr1_0 = MInst::Mov32SImm16 { 3256 rd: pattern2_0, 3257 imm: expr0_0, 3258 }; 3259 let expr2_0 = C::emit(ctx, &expr1_0); 3260 return Some(expr2_0); 3261 } 3262 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3263 let pattern2_0 = arg1; 3264 let pattern3_0 = arg2; 3265 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3266 // Rule at src/isa/s390x/inst.isle line 1886. 3267 let expr0_0 = MInst::Mov32SImm16 { 3268 rd: pattern2_0, 3269 imm: pattern4_0, 3270 }; 3271 let expr1_0 = C::emit(ctx, &expr0_0); 3272 return Some(expr1_0); 3273 } 3274 // Rule at src/isa/s390x/inst.isle line 1890. 3275 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3276 let expr1_0 = MInst::Mov32Imm { 3277 rd: pattern2_0, 3278 imm: expr0_0, 3279 }; 3280 let expr2_0 = C::emit(ctx, &expr1_0); 3281 return Some(expr2_0); 3282 } 3283 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3284 let pattern2_0 = arg1; 3285 let pattern3_0 = arg2; 3286 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3287 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3288 // Rule at src/isa/s390x/inst.isle line 1910. 3289 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3290 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3291 return Some(expr1_0); 3292 } 3293 } 3294 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3295 // Rule at src/isa/s390x/inst.isle line 1894. 3296 let expr0_0 = MInst::Mov64SImm16 { 3297 rd: pattern2_0, 3298 imm: pattern4_0, 3299 }; 3300 let expr1_0 = C::emit(ctx, &expr0_0); 3301 return Some(expr1_0); 3302 } 3303 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3304 // Rule at src/isa/s390x/inst.isle line 1898. 3305 let expr0_0 = MInst::Mov64SImm32 { 3306 rd: pattern2_0, 3307 imm: pattern4_0, 3308 }; 3309 let expr1_0 = C::emit(ctx, &expr0_0); 3310 return Some(expr1_0); 3311 } 3312 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3313 // Rule at src/isa/s390x/inst.isle line 1906. 3314 let expr0_0 = MInst::Mov64UImm32Shifted { 3315 rd: pattern2_0, 3316 imm: pattern4_0, 3317 }; 3318 let expr1_0 = C::emit(ctx, &expr0_0); 3319 return Some(expr1_0); 3320 } 3321 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3322 // Rule at src/isa/s390x/inst.isle line 1902. 3323 let expr0_0 = MInst::Mov64UImm16Shifted { 3324 rd: pattern2_0, 3325 imm: pattern4_0, 3326 }; 3327 let expr1_0 = C::emit(ctx, &expr0_0); 3328 return Some(expr1_0); 3329 } 3330 } 3331 return None; 3332 } 3333 3334 // Generated as internal constructor for term emit_insert_imm. 3335 pub fn constructor_emit_insert_imm<C: Context>( 3336 ctx: &mut C, 3337 arg0: WritableReg, 3338 arg1: u64, 3339 ) -> Option<Unit> { 3340 let pattern0_0 = arg0; 3341 let pattern1_0 = arg1; 3342 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3343 // Rule at src/isa/s390x/inst.isle line 1923. 3344 let expr0_0 = MInst::Insert64UImm32Shifted { 3345 rd: pattern0_0, 3346 imm: pattern2_0, 3347 }; 3348 let expr1_0 = C::emit(ctx, &expr0_0); 3349 return Some(expr1_0); 3350 } 3351 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3352 // Rule at src/isa/s390x/inst.isle line 1919. 3353 let expr0_0 = MInst::Insert64UImm16Shifted { 3354 rd: pattern0_0, 3355 imm: pattern2_0, 3356 }; 3357 let expr1_0 = C::emit(ctx, &expr0_0); 3358 return Some(expr1_0); 3359 } 3360 return None; 3361 } 3362 3363 // Generated as internal constructor for term imm. 3364 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3365 let pattern0_0 = arg0; 3366 let pattern1_0 = arg1; 3367 // Rule at src/isa/s390x/inst.isle line 1938. 3368 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3369 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3370 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3371 return Some(expr2_0); 3372 } 3373 3374 // Generated as internal constructor for term imm_regpair_lo. 3375 pub fn constructor_imm_regpair_lo<C: Context>( 3376 ctx: &mut C, 3377 arg0: Type, 3378 arg1: u64, 3379 arg2: &RegPair, 3380 ) -> Option<RegPair> { 3381 let pattern0_0 = arg0; 3382 let pattern1_0 = arg1; 3383 let pattern2_0 = arg2; 3384 // Rule at src/isa/s390x/inst.isle line 1946. 3385 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3386 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3387 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3388 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3389 return Some(expr3_0); 3390 } 3391 3392 // Generated as internal constructor for term imm_regpair_hi. 3393 pub fn constructor_imm_regpair_hi<C: Context>( 3394 ctx: &mut C, 3395 arg0: Type, 3396 arg1: u64, 3397 arg2: &RegPair, 3398 ) -> Option<RegPair> { 3399 let pattern0_0 = arg0; 3400 let pattern1_0 = arg1; 3401 let pattern2_0 = arg2; 3402 // Rule at src/isa/s390x/inst.isle line 1954. 3403 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3404 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3405 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3406 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3407 return Some(expr3_0); 3408 } 3409 3410 // Generated as internal constructor for term ty_ext32. 3411 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3412 let pattern0_0 = arg0; 3413 if pattern0_0 == I8 { 3414 // Rule at src/isa/s390x/inst.isle line 1964. 3415 let expr0_0: Type = I32; 3416 return Some(expr0_0); 3417 } 3418 if pattern0_0 == I16 { 3419 // Rule at src/isa/s390x/inst.isle line 1965. 3420 let expr0_0: Type = I32; 3421 return Some(expr0_0); 3422 } 3423 if pattern0_0 == I32 { 3424 // Rule at src/isa/s390x/inst.isle line 1966. 3425 let expr0_0: Type = I32; 3426 return Some(expr0_0); 3427 } 3428 if pattern0_0 == I64 { 3429 // Rule at src/isa/s390x/inst.isle line 1967. 3430 let expr0_0: Type = I64; 3431 return Some(expr0_0); 3432 } 3433 return None; 3434 } 3435 3436 // Generated as internal constructor for term ty_ext64. 3437 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3438 let pattern0_0 = arg0; 3439 if pattern0_0 == I8 { 3440 // Rule at src/isa/s390x/inst.isle line 1971. 3441 let expr0_0: Type = I64; 3442 return Some(expr0_0); 3443 } 3444 if pattern0_0 == I16 { 3445 // Rule at src/isa/s390x/inst.isle line 1972. 3446 let expr0_0: Type = I64; 3447 return Some(expr0_0); 3448 } 3449 if pattern0_0 == I32 { 3450 // Rule at src/isa/s390x/inst.isle line 1973. 3451 let expr0_0: Type = I64; 3452 return Some(expr0_0); 3453 } 3454 if pattern0_0 == I64 { 3455 // Rule at src/isa/s390x/inst.isle line 1974. 3456 let expr0_0: Type = I64; 3457 return Some(expr0_0); 3458 } 3459 return None; 3460 } 3461 3462 // Generated as internal constructor for term emit_zext32_reg. 3463 pub fn constructor_emit_zext32_reg<C: Context>( 3464 ctx: &mut C, 3465 arg0: WritableReg, 3466 arg1: Type, 3467 arg2: Reg, 3468 ) -> Option<Unit> { 3469 let pattern0_0 = arg0; 3470 let pattern1_0 = arg1; 3471 let pattern2_0 = arg2; 3472 // Rule at src/isa/s390x/inst.isle line 1979. 3473 let expr0_0: bool = false; 3474 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3475 let expr2_0: u8 = 32; 3476 let expr3_0 = MInst::Extend { 3477 rd: pattern0_0, 3478 rn: pattern2_0, 3479 signed: expr0_0, 3480 from_bits: expr1_0, 3481 to_bits: expr2_0, 3482 }; 3483 let expr4_0 = C::emit(ctx, &expr3_0); 3484 return Some(expr4_0); 3485 } 3486 3487 // Generated as internal constructor for term emit_sext32_reg. 3488 pub fn constructor_emit_sext32_reg<C: Context>( 3489 ctx: &mut C, 3490 arg0: WritableReg, 3491 arg1: Type, 3492 arg2: Reg, 3493 ) -> Option<Unit> { 3494 let pattern0_0 = arg0; 3495 let pattern1_0 = arg1; 3496 let pattern2_0 = arg2; 3497 // Rule at src/isa/s390x/inst.isle line 1985. 3498 let expr0_0: bool = true; 3499 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3500 let expr2_0: u8 = 32; 3501 let expr3_0 = MInst::Extend { 3502 rd: pattern0_0, 3503 rn: pattern2_0, 3504 signed: expr0_0, 3505 from_bits: expr1_0, 3506 to_bits: expr2_0, 3507 }; 3508 let expr4_0 = C::emit(ctx, &expr3_0); 3509 return Some(expr4_0); 3510 } 3511 3512 // Generated as internal constructor for term emit_zext64_reg. 3513 pub fn constructor_emit_zext64_reg<C: Context>( 3514 ctx: &mut C, 3515 arg0: WritableReg, 3516 arg1: Type, 3517 arg2: Reg, 3518 ) -> Option<Unit> { 3519 let pattern0_0 = arg0; 3520 let pattern1_0 = arg1; 3521 let pattern2_0 = arg2; 3522 // Rule at src/isa/s390x/inst.isle line 1991. 3523 let expr0_0: bool = false; 3524 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3525 let expr2_0: u8 = 64; 3526 let expr3_0 = MInst::Extend { 3527 rd: pattern0_0, 3528 rn: pattern2_0, 3529 signed: expr0_0, 3530 from_bits: expr1_0, 3531 to_bits: expr2_0, 3532 }; 3533 let expr4_0 = C::emit(ctx, &expr3_0); 3534 return Some(expr4_0); 3535 } 3536 3537 // Generated as internal constructor for term emit_sext64_reg. 3538 pub fn constructor_emit_sext64_reg<C: Context>( 3539 ctx: &mut C, 3540 arg0: WritableReg, 3541 arg1: Type, 3542 arg2: Reg, 3543 ) -> Option<Unit> { 3544 let pattern0_0 = arg0; 3545 let pattern1_0 = arg1; 3546 let pattern2_0 = arg2; 3547 // Rule at src/isa/s390x/inst.isle line 1997. 3548 let expr0_0: bool = true; 3549 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3550 let expr2_0: u8 = 64; 3551 let expr3_0 = MInst::Extend { 3552 rd: pattern0_0, 3553 rn: pattern2_0, 3554 signed: expr0_0, 3555 from_bits: expr1_0, 3556 to_bits: expr2_0, 3557 }; 3558 let expr4_0 = C::emit(ctx, &expr3_0); 3559 return Some(expr4_0); 3560 } 3561 3562 // Generated as internal constructor for term zext32_reg. 3563 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3564 let pattern0_0 = arg0; 3565 let pattern1_0 = arg1; 3566 // Rule at src/isa/s390x/inst.isle line 2003. 3567 let expr0_0: Type = I32; 3568 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3569 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3570 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3571 return Some(expr3_0); 3572 } 3573 3574 // Generated as internal constructor for term sext32_reg. 3575 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3576 let pattern0_0 = arg0; 3577 let pattern1_0 = arg1; 3578 // Rule at src/isa/s390x/inst.isle line 2011. 3579 let expr0_0: Type = I32; 3580 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3581 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3582 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3583 return Some(expr3_0); 3584 } 3585 3586 // Generated as internal constructor for term zext64_reg. 3587 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3588 let pattern0_0 = arg0; 3589 let pattern1_0 = arg1; 3590 // Rule at src/isa/s390x/inst.isle line 2019. 3591 let expr0_0: Type = I64; 3592 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3593 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3594 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3595 return Some(expr3_0); 3596 } 3597 3598 // Generated as internal constructor for term sext64_reg. 3599 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3600 let pattern0_0 = arg0; 3601 let pattern1_0 = arg1; 3602 // Rule at src/isa/s390x/inst.isle line 2027. 3603 let expr0_0: Type = I64; 3604 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3605 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3606 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3607 return Some(expr3_0); 3608 } 3609 3610 // Generated as internal constructor for term emit_zext32_mem. 3611 pub fn constructor_emit_zext32_mem<C: Context>( 3612 ctx: &mut C, 3613 arg0: WritableReg, 3614 arg1: Type, 3615 arg2: &MemArg, 3616 ) -> Option<Unit> { 3617 let pattern0_0 = arg0; 3618 let pattern1_0 = arg1; 3619 if pattern1_0 == I8 { 3620 let pattern3_0 = arg2; 3621 // Rule at src/isa/s390x/inst.isle line 2035. 3622 let expr0_0 = MInst::Load32ZExt8 { 3623 rd: pattern0_0, 3624 mem: pattern3_0.clone(), 3625 }; 3626 let expr1_0 = C::emit(ctx, &expr0_0); 3627 return Some(expr1_0); 3628 } 3629 if pattern1_0 == I16 { 3630 let pattern3_0 = arg2; 3631 // Rule at src/isa/s390x/inst.isle line 2036. 3632 let expr0_0 = MInst::Load32ZExt16 { 3633 rd: pattern0_0, 3634 mem: pattern3_0.clone(), 3635 }; 3636 let expr1_0 = C::emit(ctx, &expr0_0); 3637 return Some(expr1_0); 3638 } 3639 return None; 3640 } 3641 3642 // Generated as internal constructor for term emit_sext32_mem. 3643 pub fn constructor_emit_sext32_mem<C: Context>( 3644 ctx: &mut C, 3645 arg0: WritableReg, 3646 arg1: Type, 3647 arg2: &MemArg, 3648 ) -> Option<Unit> { 3649 let pattern0_0 = arg0; 3650 let pattern1_0 = arg1; 3651 if pattern1_0 == I8 { 3652 let pattern3_0 = arg2; 3653 // Rule at src/isa/s390x/inst.isle line 2040. 3654 let expr0_0 = MInst::Load32SExt8 { 3655 rd: pattern0_0, 3656 mem: pattern3_0.clone(), 3657 }; 3658 let expr1_0 = C::emit(ctx, &expr0_0); 3659 return Some(expr1_0); 3660 } 3661 if pattern1_0 == I16 { 3662 let pattern3_0 = arg2; 3663 // Rule at src/isa/s390x/inst.isle line 2041. 3664 let expr0_0 = MInst::Load32SExt16 { 3665 rd: pattern0_0, 3666 mem: pattern3_0.clone(), 3667 }; 3668 let expr1_0 = C::emit(ctx, &expr0_0); 3669 return Some(expr1_0); 3670 } 3671 return None; 3672 } 3673 3674 // Generated as internal constructor for term emit_zext64_mem. 3675 pub fn constructor_emit_zext64_mem<C: Context>( 3676 ctx: &mut C, 3677 arg0: WritableReg, 3678 arg1: Type, 3679 arg2: &MemArg, 3680 ) -> Option<Unit> { 3681 let pattern0_0 = arg0; 3682 let pattern1_0 = arg1; 3683 if pattern1_0 == I8 { 3684 let pattern3_0 = arg2; 3685 // Rule at src/isa/s390x/inst.isle line 2045. 3686 let expr0_0 = MInst::Load64ZExt8 { 3687 rd: pattern0_0, 3688 mem: pattern3_0.clone(), 3689 }; 3690 let expr1_0 = C::emit(ctx, &expr0_0); 3691 return Some(expr1_0); 3692 } 3693 if pattern1_0 == I16 { 3694 let pattern3_0 = arg2; 3695 // Rule at src/isa/s390x/inst.isle line 2046. 3696 let expr0_0 = MInst::Load64ZExt16 { 3697 rd: pattern0_0, 3698 mem: pattern3_0.clone(), 3699 }; 3700 let expr1_0 = C::emit(ctx, &expr0_0); 3701 return Some(expr1_0); 3702 } 3703 if pattern1_0 == I32 { 3704 let pattern3_0 = arg2; 3705 // Rule at src/isa/s390x/inst.isle line 2047. 3706 let expr0_0 = MInst::Load64ZExt32 { 3707 rd: pattern0_0, 3708 mem: pattern3_0.clone(), 3709 }; 3710 let expr1_0 = C::emit(ctx, &expr0_0); 3711 return Some(expr1_0); 3712 } 3713 return None; 3714 } 3715 3716 // Generated as internal constructor for term emit_sext64_mem. 3717 pub fn constructor_emit_sext64_mem<C: Context>( 3718 ctx: &mut C, 3719 arg0: WritableReg, 3720 arg1: Type, 3721 arg2: &MemArg, 3722 ) -> Option<Unit> { 3723 let pattern0_0 = arg0; 3724 let pattern1_0 = arg1; 3725 if pattern1_0 == I8 { 3726 let pattern3_0 = arg2; 3727 // Rule at src/isa/s390x/inst.isle line 2051. 3728 let expr0_0 = MInst::Load64SExt8 { 3729 rd: pattern0_0, 3730 mem: pattern3_0.clone(), 3731 }; 3732 let expr1_0 = C::emit(ctx, &expr0_0); 3733 return Some(expr1_0); 3734 } 3735 if pattern1_0 == I16 { 3736 let pattern3_0 = arg2; 3737 // Rule at src/isa/s390x/inst.isle line 2052. 3738 let expr0_0 = MInst::Load64SExt16 { 3739 rd: pattern0_0, 3740 mem: pattern3_0.clone(), 3741 }; 3742 let expr1_0 = C::emit(ctx, &expr0_0); 3743 return Some(expr1_0); 3744 } 3745 if pattern1_0 == I32 { 3746 let pattern3_0 = arg2; 3747 // Rule at src/isa/s390x/inst.isle line 2053. 3748 let expr0_0 = MInst::Load64SExt32 { 3749 rd: pattern0_0, 3750 mem: pattern3_0.clone(), 3751 }; 3752 let expr1_0 = C::emit(ctx, &expr0_0); 3753 return Some(expr1_0); 3754 } 3755 return None; 3756 } 3757 3758 // Generated as internal constructor for term zext32_mem. 3759 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3760 let pattern0_0 = arg0; 3761 let pattern1_0 = arg1; 3762 // Rule at src/isa/s390x/inst.isle line 2057. 3763 let expr0_0: Type = I32; 3764 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3765 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3766 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3767 return Some(expr3_0); 3768 } 3769 3770 // Generated as internal constructor for term sext32_mem. 3771 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3772 let pattern0_0 = arg0; 3773 let pattern1_0 = arg1; 3774 // Rule at src/isa/s390x/inst.isle line 2064. 3775 let expr0_0: Type = I32; 3776 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3777 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3778 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3779 return Some(expr3_0); 3780 } 3781 3782 // Generated as internal constructor for term zext64_mem. 3783 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3784 let pattern0_0 = arg0; 3785 let pattern1_0 = arg1; 3786 // Rule at src/isa/s390x/inst.isle line 2071. 3787 let expr0_0: Type = I64; 3788 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3789 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3790 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3791 return Some(expr3_0); 3792 } 3793 3794 // Generated as internal constructor for term sext64_mem. 3795 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3796 let pattern0_0 = arg0; 3797 let pattern1_0 = arg1; 3798 // Rule at src/isa/s390x/inst.isle line 2078. 3799 let expr0_0: Type = I64; 3800 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3801 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3802 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3803 return Some(expr3_0); 3804 } 3805 3806 // Generated as internal constructor for term emit_put_in_reg_zext32. 3807 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3808 ctx: &mut C, 3809 arg0: WritableReg, 3810 arg1: Value, 3811 ) -> Option<Unit> { 3812 let pattern0_0 = arg0; 3813 let pattern1_0 = arg1; 3814 let pattern2_0 = C::value_type(ctx, pattern1_0); 3815 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3816 // Rule at src/isa/s390x/inst.isle line 2086. 3817 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3818 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3819 return Some(expr1_0); 3820 } 3821 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3822 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3823 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3824 if let &InstructionData::Load { 3825 opcode: ref pattern6_0, 3826 arg: pattern6_1, 3827 flags: pattern6_2, 3828 offset: pattern6_3, 3829 } = &pattern5_0 3830 { 3831 if let &Opcode::Load = pattern6_0 { 3832 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3833 // Rule at src/isa/s390x/inst.isle line 2088. 3834 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3835 let expr1_0 = 3836 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3837 return Some(expr1_0); 3838 } 3839 } 3840 } 3841 } 3842 // Rule at src/isa/s390x/inst.isle line 2090. 3843 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3844 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3845 return Some(expr1_0); 3846 } 3847 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3848 // Rule at src/isa/s390x/inst.isle line 2092. 3849 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3850 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3851 return Some(expr1_0); 3852 } 3853 return None; 3854 } 3855 3856 // Generated as internal constructor for term emit_put_in_reg_sext32. 3857 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3858 ctx: &mut C, 3859 arg0: WritableReg, 3860 arg1: Value, 3861 ) -> Option<Unit> { 3862 let pattern0_0 = arg0; 3863 let pattern1_0 = arg1; 3864 let pattern2_0 = C::value_type(ctx, pattern1_0); 3865 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3866 // Rule at src/isa/s390x/inst.isle line 2097. 3867 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3868 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3869 return Some(expr1_0); 3870 } 3871 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3872 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3873 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3874 if let &InstructionData::Load { 3875 opcode: ref pattern6_0, 3876 arg: pattern6_1, 3877 flags: pattern6_2, 3878 offset: pattern6_3, 3879 } = &pattern5_0 3880 { 3881 if let &Opcode::Load = pattern6_0 { 3882 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3883 // Rule at src/isa/s390x/inst.isle line 2099. 3884 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3885 let expr1_0 = 3886 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3887 return Some(expr1_0); 3888 } 3889 } 3890 } 3891 } 3892 // Rule at src/isa/s390x/inst.isle line 2101. 3893 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3894 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3895 return Some(expr1_0); 3896 } 3897 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3898 // Rule at src/isa/s390x/inst.isle line 2103. 3899 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3900 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3901 return Some(expr1_0); 3902 } 3903 return None; 3904 } 3905 3906 // Generated as internal constructor for term emit_put_in_reg_zext64. 3907 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3908 ctx: &mut C, 3909 arg0: WritableReg, 3910 arg1: Value, 3911 ) -> Option<Unit> { 3912 let pattern0_0 = arg0; 3913 let pattern1_0 = arg1; 3914 let pattern2_0 = C::value_type(ctx, pattern1_0); 3915 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3916 // Rule at src/isa/s390x/inst.isle line 2108. 3917 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3918 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3919 return Some(expr1_0); 3920 } 3921 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3922 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3923 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3924 if let &InstructionData::Load { 3925 opcode: ref pattern6_0, 3926 arg: pattern6_1, 3927 flags: pattern6_2, 3928 offset: pattern6_3, 3929 } = &pattern5_0 3930 { 3931 if let &Opcode::Load = pattern6_0 { 3932 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3933 // Rule at src/isa/s390x/inst.isle line 2110. 3934 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3935 let expr1_0 = 3936 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3937 return Some(expr1_0); 3938 } 3939 } 3940 } 3941 } 3942 // Rule at src/isa/s390x/inst.isle line 2112. 3943 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3944 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3945 return Some(expr1_0); 3946 } 3947 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3948 // Rule at src/isa/s390x/inst.isle line 2114. 3949 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3950 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3951 return Some(expr1_0); 3952 } 3953 return None; 3954 } 3955 3956 // Generated as internal constructor for term emit_put_in_reg_sext64. 3957 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3958 ctx: &mut C, 3959 arg0: WritableReg, 3960 arg1: Value, 3961 ) -> Option<Unit> { 3962 let pattern0_0 = arg0; 3963 let pattern1_0 = arg1; 3964 let pattern2_0 = C::value_type(ctx, pattern1_0); 3965 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3966 // Rule at src/isa/s390x/inst.isle line 2119. 3967 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3968 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3969 return Some(expr1_0); 3970 } 3971 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3972 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3973 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3974 if let &InstructionData::Load { 3975 opcode: ref pattern6_0, 3976 arg: pattern6_1, 3977 flags: pattern6_2, 3978 offset: pattern6_3, 3979 } = &pattern5_0 3980 { 3981 if let &Opcode::Load = pattern6_0 { 3982 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3983 // Rule at src/isa/s390x/inst.isle line 2121. 3984 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3985 let expr1_0 = 3986 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3987 return Some(expr1_0); 3988 } 3989 } 3990 } 3991 } 3992 // Rule at src/isa/s390x/inst.isle line 2123. 3993 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3994 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3995 return Some(expr1_0); 3996 } 3997 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3998 // Rule at src/isa/s390x/inst.isle line 2125. 3999 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4000 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 4001 return Some(expr1_0); 4002 } 4003 return None; 4004 } 4005 4006 // Generated as internal constructor for term put_in_reg_zext32. 4007 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4008 let pattern0_0 = arg0; 4009 let pattern1_0 = C::value_type(ctx, pattern0_0); 4010 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4011 // Rule at src/isa/s390x/inst.isle line 2130. 4012 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4013 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4014 return Some(expr1_0); 4015 } 4016 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4017 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4018 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4019 if let &InstructionData::Load { 4020 opcode: ref pattern5_0, 4021 arg: pattern5_1, 4022 flags: pattern5_2, 4023 offset: pattern5_3, 4024 } = &pattern4_0 4025 { 4026 if let &Opcode::Load = pattern5_0 { 4027 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4028 // Rule at src/isa/s390x/inst.isle line 2132. 4029 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4030 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4031 return Some(expr1_0); 4032 } 4033 } 4034 } 4035 } 4036 // Rule at src/isa/s390x/inst.isle line 2134. 4037 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4038 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4039 return Some(expr1_0); 4040 } 4041 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4042 // Rule at src/isa/s390x/inst.isle line 2136. 4043 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4044 return Some(expr0_0); 4045 } 4046 return None; 4047 } 4048 4049 // Generated as internal constructor for term put_in_reg_sext32. 4050 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4051 let pattern0_0 = arg0; 4052 let pattern1_0 = C::value_type(ctx, pattern0_0); 4053 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4054 // Rule at src/isa/s390x/inst.isle line 2141. 4055 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4056 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4057 return Some(expr1_0); 4058 } 4059 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4060 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4061 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4062 if let &InstructionData::Load { 4063 opcode: ref pattern5_0, 4064 arg: pattern5_1, 4065 flags: pattern5_2, 4066 offset: pattern5_3, 4067 } = &pattern4_0 4068 { 4069 if let &Opcode::Load = pattern5_0 { 4070 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4071 // Rule at src/isa/s390x/inst.isle line 2143. 4072 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4073 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4074 return Some(expr1_0); 4075 } 4076 } 4077 } 4078 } 4079 // Rule at src/isa/s390x/inst.isle line 2145. 4080 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4081 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4082 return Some(expr1_0); 4083 } 4084 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4085 // Rule at src/isa/s390x/inst.isle line 2147. 4086 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4087 return Some(expr0_0); 4088 } 4089 return None; 4090 } 4091 4092 // Generated as internal constructor for term put_in_reg_zext64. 4093 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4094 let pattern0_0 = arg0; 4095 let pattern1_0 = C::value_type(ctx, pattern0_0); 4096 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4097 // Rule at src/isa/s390x/inst.isle line 2152. 4098 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4099 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4100 return Some(expr1_0); 4101 } 4102 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4103 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4104 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4105 if let &InstructionData::Load { 4106 opcode: ref pattern5_0, 4107 arg: pattern5_1, 4108 flags: pattern5_2, 4109 offset: pattern5_3, 4110 } = &pattern4_0 4111 { 4112 if let &Opcode::Load = pattern5_0 { 4113 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4114 // Rule at src/isa/s390x/inst.isle line 2154. 4115 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4116 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4117 return Some(expr1_0); 4118 } 4119 } 4120 } 4121 } 4122 // Rule at src/isa/s390x/inst.isle line 2156. 4123 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4124 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4125 return Some(expr1_0); 4126 } 4127 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4128 // Rule at src/isa/s390x/inst.isle line 2158. 4129 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4130 return Some(expr0_0); 4131 } 4132 return None; 4133 } 4134 4135 // Generated as internal constructor for term put_in_reg_sext64. 4136 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4137 let pattern0_0 = arg0; 4138 let pattern1_0 = C::value_type(ctx, pattern0_0); 4139 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4140 // Rule at src/isa/s390x/inst.isle line 2163. 4141 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4142 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4143 return Some(expr1_0); 4144 } 4145 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4146 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4147 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4148 if let &InstructionData::Load { 4149 opcode: ref pattern5_0, 4150 arg: pattern5_1, 4151 flags: pattern5_2, 4152 offset: pattern5_3, 4153 } = &pattern4_0 4154 { 4155 if let &Opcode::Load = pattern5_0 { 4156 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4157 // Rule at src/isa/s390x/inst.isle line 2165. 4158 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4159 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4160 return Some(expr1_0); 4161 } 4162 } 4163 } 4164 } 4165 // Rule at src/isa/s390x/inst.isle line 2167. 4166 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4167 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4168 return Some(expr1_0); 4169 } 4170 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4171 // Rule at src/isa/s390x/inst.isle line 2169. 4172 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4173 return Some(expr0_0); 4174 } 4175 return None; 4176 } 4177 4178 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4179 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4180 ctx: &mut C, 4181 arg0: Value, 4182 arg1: &RegPair, 4183 ) -> Option<RegPair> { 4184 let pattern0_0 = arg0; 4185 let pattern1_0 = arg1; 4186 // Rule at src/isa/s390x/inst.isle line 2175. 4187 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4188 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4189 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4190 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4191 return Some(expr3_0); 4192 } 4193 4194 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4195 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4196 ctx: &mut C, 4197 arg0: Value, 4198 arg1: &RegPair, 4199 ) -> Option<RegPair> { 4200 let pattern0_0 = arg0; 4201 let pattern1_0 = arg1; 4202 // Rule at src/isa/s390x/inst.isle line 2183. 4203 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4204 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4205 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4206 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4207 return Some(expr3_0); 4208 } 4209 4210 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4211 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4212 ctx: &mut C, 4213 arg0: Value, 4214 arg1: &RegPair, 4215 ) -> Option<RegPair> { 4216 let pattern0_0 = arg0; 4217 let pattern1_0 = arg1; 4218 // Rule at src/isa/s390x/inst.isle line 2191. 4219 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4220 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4221 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4222 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4223 return Some(expr3_0); 4224 } 4225 4226 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4227 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4228 ctx: &mut C, 4229 arg0: Value, 4230 arg1: &RegPair, 4231 ) -> Option<RegPair> { 4232 let pattern0_0 = arg0; 4233 let pattern1_0 = arg1; 4234 // Rule at src/isa/s390x/inst.isle line 2199. 4235 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4236 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4237 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4238 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4239 return Some(expr3_0); 4240 } 4241 4242 // Generated as internal constructor for term emit_cmov_imm. 4243 pub fn constructor_emit_cmov_imm<C: Context>( 4244 ctx: &mut C, 4245 arg0: Type, 4246 arg1: WritableReg, 4247 arg2: &Cond, 4248 arg3: i16, 4249 ) -> Option<ConsumesFlags> { 4250 let pattern0_0 = arg0; 4251 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4252 let pattern2_0 = arg1; 4253 let pattern3_0 = arg2; 4254 let pattern4_0 = arg3; 4255 // Rule at src/isa/s390x/inst.isle line 2209. 4256 let expr0_0 = MInst::CMov32SImm16 { 4257 rd: pattern2_0, 4258 cond: pattern3_0.clone(), 4259 imm: pattern4_0, 4260 }; 4261 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4262 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4263 inst: expr0_0, 4264 result: expr1_0, 4265 }; 4266 return Some(expr2_0); 4267 } 4268 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4269 let pattern2_0 = arg1; 4270 let pattern3_0 = arg2; 4271 let pattern4_0 = arg3; 4272 // Rule at src/isa/s390x/inst.isle line 2212. 4273 let expr0_0 = MInst::CMov64SImm16 { 4274 rd: pattern2_0, 4275 cond: pattern3_0.clone(), 4276 imm: pattern4_0, 4277 }; 4278 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4279 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4280 inst: expr0_0, 4281 result: expr1_0, 4282 }; 4283 return Some(expr2_0); 4284 } 4285 return None; 4286 } 4287 4288 // Generated as internal constructor for term cmov_imm. 4289 pub fn constructor_cmov_imm<C: Context>( 4290 ctx: &mut C, 4291 arg0: Type, 4292 arg1: &Cond, 4293 arg2: i16, 4294 arg3: Reg, 4295 ) -> Option<ConsumesFlags> { 4296 let pattern0_0 = arg0; 4297 let pattern1_0 = arg1; 4298 let pattern2_0 = arg2; 4299 let pattern3_0 = arg3; 4300 // Rule at src/isa/s390x/inst.isle line 2218. 4301 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4302 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4303 return Some(expr1_0); 4304 } 4305 4306 // Generated as internal constructor for term cmov_imm_regpair_lo. 4307 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4308 ctx: &mut C, 4309 arg0: Type, 4310 arg1: &ProducesFlags, 4311 arg2: &Cond, 4312 arg3: i16, 4313 arg4: &RegPair, 4314 ) -> Option<RegPair> { 4315 let pattern0_0 = arg0; 4316 let pattern1_0 = arg1; 4317 let pattern2_0 = arg2; 4318 let pattern3_0 = arg3; 4319 let pattern4_0 = arg4; 4320 // Rule at src/isa/s390x/inst.isle line 2225. 4321 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4322 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4323 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4324 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4325 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4326 return Some(expr4_0); 4327 } 4328 4329 // Generated as internal constructor for term cmov_imm_regpair_hi. 4330 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4331 ctx: &mut C, 4332 arg0: Type, 4333 arg1: &ProducesFlags, 4334 arg2: &Cond, 4335 arg3: i16, 4336 arg4: &RegPair, 4337 ) -> Option<RegPair> { 4338 let pattern0_0 = arg0; 4339 let pattern1_0 = arg1; 4340 let pattern2_0 = arg2; 4341 let pattern3_0 = arg3; 4342 let pattern4_0 = arg4; 4343 // Rule at src/isa/s390x/inst.isle line 2234. 4344 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4345 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4346 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4347 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4348 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4349 return Some(expr4_0); 4350 } 4351 4352 // Generated as internal constructor for term emit_cmov_reg. 4353 pub fn constructor_emit_cmov_reg<C: Context>( 4354 ctx: &mut C, 4355 arg0: Type, 4356 arg1: WritableReg, 4357 arg2: &Cond, 4358 arg3: Reg, 4359 ) -> Option<ConsumesFlags> { 4360 let pattern0_0 = arg0; 4361 if pattern0_0 == F32 { 4362 let pattern2_0 = arg1; 4363 let pattern3_0 = arg2; 4364 let pattern4_0 = arg3; 4365 // Rule at src/isa/s390x/inst.isle line 2248. 4366 let expr0_0 = MInst::FpuCMov32 { 4367 rd: pattern2_0, 4368 cond: pattern3_0.clone(), 4369 rm: pattern4_0, 4370 }; 4371 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4372 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4373 inst: expr0_0, 4374 result: expr1_0, 4375 }; 4376 return Some(expr2_0); 4377 } 4378 if pattern0_0 == F64 { 4379 let pattern2_0 = arg1; 4380 let pattern3_0 = arg2; 4381 let pattern4_0 = arg3; 4382 // Rule at src/isa/s390x/inst.isle line 2251. 4383 let expr0_0 = MInst::FpuCMov64 { 4384 rd: pattern2_0, 4385 cond: pattern3_0.clone(), 4386 rm: pattern4_0, 4387 }; 4388 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4389 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4390 inst: expr0_0, 4391 result: expr1_0, 4392 }; 4393 return Some(expr2_0); 4394 } 4395 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4396 let pattern2_0 = arg1; 4397 let pattern3_0 = arg2; 4398 let pattern4_0 = arg3; 4399 // Rule at src/isa/s390x/inst.isle line 2242. 4400 let expr0_0 = MInst::CMov32 { 4401 rd: pattern2_0, 4402 cond: pattern3_0.clone(), 4403 rm: pattern4_0, 4404 }; 4405 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4406 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4407 inst: expr0_0, 4408 result: expr1_0, 4409 }; 4410 return Some(expr2_0); 4411 } 4412 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4413 let pattern2_0 = arg1; 4414 let pattern3_0 = arg2; 4415 let pattern4_0 = arg3; 4416 // Rule at src/isa/s390x/inst.isle line 2245. 4417 let expr0_0 = MInst::CMov64 { 4418 rd: pattern2_0, 4419 cond: pattern3_0.clone(), 4420 rm: pattern4_0, 4421 }; 4422 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4423 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4424 inst: expr0_0, 4425 result: expr1_0, 4426 }; 4427 return Some(expr2_0); 4428 } 4429 return None; 4430 } 4431 4432 // Generated as internal constructor for term cmov_reg. 4433 pub fn constructor_cmov_reg<C: Context>( 4434 ctx: &mut C, 4435 arg0: Type, 4436 arg1: &Cond, 4437 arg2: Reg, 4438 arg3: Reg, 4439 ) -> Option<ConsumesFlags> { 4440 let pattern0_0 = arg0; 4441 let pattern1_0 = arg1; 4442 let pattern2_0 = arg2; 4443 let pattern3_0 = arg3; 4444 // Rule at src/isa/s390x/inst.isle line 2257. 4445 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4446 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4447 return Some(expr1_0); 4448 } 4449 4450 // Generated as internal constructor for term trap_if. 4451 pub fn constructor_trap_if<C: Context>( 4452 ctx: &mut C, 4453 arg0: &ProducesFlags, 4454 arg1: &Cond, 4455 arg2: &TrapCode, 4456 ) -> Option<Reg> { 4457 let pattern0_0 = arg0; 4458 match pattern0_0 { 4459 &ProducesFlags::ProducesFlagsSideEffect { 4460 inst: ref pattern1_0, 4461 } => { 4462 let pattern2_0 = arg1; 4463 let pattern3_0 = arg2; 4464 // Rule at src/isa/s390x/inst.isle line 2269. 4465 let expr0_0 = C::emit(ctx, pattern1_0); 4466 let expr1_0 = MInst::TrapIf { 4467 cond: pattern2_0.clone(), 4468 trap_code: pattern3_0.clone(), 4469 }; 4470 let expr2_0 = C::emit(ctx, &expr1_0); 4471 let expr3_0 = C::invalid_reg(ctx); 4472 return Some(expr3_0); 4473 } 4474 &ProducesFlags::ProducesFlagsReturnsReg { 4475 inst: ref pattern1_0, 4476 result: pattern1_1, 4477 } => { 4478 let pattern2_0 = arg1; 4479 let pattern3_0 = arg2; 4480 // Rule at src/isa/s390x/inst.isle line 2265. 4481 let expr0_0 = C::emit(ctx, pattern1_0); 4482 let expr1_0 = MInst::TrapIf { 4483 cond: pattern2_0.clone(), 4484 trap_code: pattern3_0.clone(), 4485 }; 4486 let expr2_0 = C::emit(ctx, &expr1_0); 4487 return Some(pattern1_1); 4488 } 4489 _ => {} 4490 } 4491 return None; 4492 } 4493 4494 // Generated as internal constructor for term icmps_reg_and_trap. 4495 pub fn constructor_icmps_reg_and_trap<C: Context>( 4496 ctx: &mut C, 4497 arg0: Type, 4498 arg1: Reg, 4499 arg2: Reg, 4500 arg3: &Cond, 4501 arg4: &TrapCode, 4502 ) -> Option<Reg> { 4503 let pattern0_0 = arg0; 4504 let pattern1_0 = arg1; 4505 let pattern2_0 = arg2; 4506 let pattern3_0 = arg3; 4507 let pattern4_0 = arg4; 4508 // Rule at src/isa/s390x/inst.isle line 2275. 4509 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4510 let expr1_0 = MInst::CmpTrapRR { 4511 op: expr0_0, 4512 rn: pattern1_0, 4513 rm: pattern2_0, 4514 cond: pattern3_0.clone(), 4515 trap_code: pattern4_0.clone(), 4516 }; 4517 let expr2_0 = C::emit(ctx, &expr1_0); 4518 let expr3_0 = C::invalid_reg(ctx); 4519 return Some(expr3_0); 4520 } 4521 4522 // Generated as internal constructor for term icmps_simm16_and_trap. 4523 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4524 ctx: &mut C, 4525 arg0: Type, 4526 arg1: Reg, 4527 arg2: i16, 4528 arg3: &Cond, 4529 arg4: &TrapCode, 4530 ) -> Option<Reg> { 4531 let pattern0_0 = arg0; 4532 let pattern1_0 = arg1; 4533 let pattern2_0 = arg2; 4534 let pattern3_0 = arg3; 4535 let pattern4_0 = arg4; 4536 // Rule at src/isa/s390x/inst.isle line 2281. 4537 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4538 let expr1_0 = MInst::CmpTrapRSImm16 { 4539 op: expr0_0, 4540 rn: pattern1_0, 4541 imm: pattern2_0, 4542 cond: pattern3_0.clone(), 4543 trap_code: pattern4_0.clone(), 4544 }; 4545 let expr2_0 = C::emit(ctx, &expr1_0); 4546 let expr3_0 = C::invalid_reg(ctx); 4547 return Some(expr3_0); 4548 } 4549 4550 // Generated as internal constructor for term icmpu_reg_and_trap. 4551 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4552 ctx: &mut C, 4553 arg0: Type, 4554 arg1: Reg, 4555 arg2: Reg, 4556 arg3: &Cond, 4557 arg4: &TrapCode, 4558 ) -> Option<Reg> { 4559 let pattern0_0 = arg0; 4560 let pattern1_0 = arg1; 4561 let pattern2_0 = arg2; 4562 let pattern3_0 = arg3; 4563 let pattern4_0 = arg4; 4564 // Rule at src/isa/s390x/inst.isle line 2287. 4565 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4566 let expr1_0 = MInst::CmpTrapRR { 4567 op: expr0_0, 4568 rn: pattern1_0, 4569 rm: pattern2_0, 4570 cond: pattern3_0.clone(), 4571 trap_code: pattern4_0.clone(), 4572 }; 4573 let expr2_0 = C::emit(ctx, &expr1_0); 4574 let expr3_0 = C::invalid_reg(ctx); 4575 return Some(expr3_0); 4576 } 4577 4578 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4579 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4580 ctx: &mut C, 4581 arg0: Type, 4582 arg1: Reg, 4583 arg2: u16, 4584 arg3: &Cond, 4585 arg4: &TrapCode, 4586 ) -> Option<Reg> { 4587 let pattern0_0 = arg0; 4588 let pattern1_0 = arg1; 4589 let pattern2_0 = arg2; 4590 let pattern3_0 = arg3; 4591 let pattern4_0 = arg4; 4592 // Rule at src/isa/s390x/inst.isle line 2293. 4593 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4594 let expr1_0 = MInst::CmpTrapRUImm16 { 4595 op: expr0_0, 4596 rn: pattern1_0, 4597 imm: pattern2_0, 4598 cond: pattern3_0.clone(), 4599 trap_code: pattern4_0.clone(), 4600 }; 4601 let expr2_0 = C::emit(ctx, &expr1_0); 4602 let expr3_0 = C::invalid_reg(ctx); 4603 return Some(expr3_0); 4604 } 4605 4606 // Generated as internal constructor for term trap_impl. 4607 pub fn constructor_trap_impl<C: Context>( 4608 ctx: &mut C, 4609 arg0: &TrapCode, 4610 ) -> Option<SideEffectNoResult> { 4611 let pattern0_0 = arg0; 4612 // Rule at src/isa/s390x/inst.isle line 2299. 4613 let expr0_0 = MInst::Trap { 4614 trap_code: pattern0_0.clone(), 4615 }; 4616 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4617 return Some(expr1_0); 4618 } 4619 4620 // Generated as internal constructor for term trap_if_impl. 4621 pub fn constructor_trap_if_impl<C: Context>( 4622 ctx: &mut C, 4623 arg0: &Cond, 4624 arg1: &TrapCode, 4625 ) -> Option<SideEffectNoResult> { 4626 let pattern0_0 = arg0; 4627 let pattern1_0 = arg1; 4628 // Rule at src/isa/s390x/inst.isle line 2303. 4629 let expr0_0 = MInst::TrapIf { 4630 cond: pattern0_0.clone(), 4631 trap_code: pattern1_0.clone(), 4632 }; 4633 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4634 return Some(expr1_0); 4635 } 4636 4637 // Generated as internal constructor for term debugtrap_impl. 4638 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4639 // Rule at src/isa/s390x/inst.isle line 2307. 4640 let expr0_0 = MInst::Debugtrap; 4641 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4642 return Some(expr1_0); 4643 } 4644 4645 // Generated as internal constructor for term bool. 4646 pub fn constructor_bool<C: Context>( 4647 ctx: &mut C, 4648 arg0: &ProducesFlags, 4649 arg1: &Cond, 4650 ) -> Option<ProducesBool> { 4651 let pattern0_0 = arg0; 4652 let pattern1_0 = arg1; 4653 // Rule at src/isa/s390x/inst.isle line 2318. 4654 let expr0_0 = ProducesBool::ProducesBool { 4655 producer: pattern0_0.clone(), 4656 cond: pattern1_0.clone(), 4657 }; 4658 return Some(expr0_0); 4659 } 4660 4661 // Generated as internal constructor for term invert_bool. 4662 pub fn constructor_invert_bool<C: Context>( 4663 ctx: &mut C, 4664 arg0: &ProducesBool, 4665 ) -> Option<ProducesBool> { 4666 let pattern0_0 = arg0; 4667 if let &ProducesBool::ProducesBool { 4668 producer: ref pattern1_0, 4669 cond: ref pattern1_1, 4670 } = pattern0_0 4671 { 4672 // Rule at src/isa/s390x/inst.isle line 2322. 4673 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4674 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4675 return Some(expr1_0); 4676 } 4677 return None; 4678 } 4679 4680 // Generated as internal constructor for term emit_producer. 4681 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4682 let pattern0_0 = arg0; 4683 if let &ProducesFlags::ProducesFlagsSideEffect { 4684 inst: ref pattern1_0, 4685 } = pattern0_0 4686 { 4687 // Rule at src/isa/s390x/inst.isle line 2331. 4688 let expr0_0 = C::emit(ctx, pattern1_0); 4689 return Some(expr0_0); 4690 } 4691 return None; 4692 } 4693 4694 // Generated as internal constructor for term emit_consumer. 4695 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4696 let pattern0_0 = arg0; 4697 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4698 inst: ref pattern1_0, 4699 result: pattern1_1, 4700 } = pattern0_0 4701 { 4702 // Rule at src/isa/s390x/inst.isle line 2333. 4703 let expr0_0 = C::emit(ctx, pattern1_0); 4704 return Some(expr0_0); 4705 } 4706 return None; 4707 } 4708 4709 // Generated as internal constructor for term select_bool_reg. 4710 pub fn constructor_select_bool_reg<C: Context>( 4711 ctx: &mut C, 4712 arg0: Type, 4713 arg1: &ProducesBool, 4714 arg2: Reg, 4715 arg3: Reg, 4716 ) -> Option<Reg> { 4717 let pattern0_0 = arg0; 4718 let pattern1_0 = arg1; 4719 if let &ProducesBool::ProducesBool { 4720 producer: ref pattern2_0, 4721 cond: ref pattern2_1, 4722 } = pattern1_0 4723 { 4724 let pattern3_0 = arg2; 4725 let pattern4_0 = arg3; 4726 // Rule at src/isa/s390x/inst.isle line 2337. 4727 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4728 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4729 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4730 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4731 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4732 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4733 return Some(expr5_0); 4734 } 4735 return None; 4736 } 4737 4738 // Generated as internal constructor for term select_bool_imm. 4739 pub fn constructor_select_bool_imm<C: Context>( 4740 ctx: &mut C, 4741 arg0: Type, 4742 arg1: &ProducesBool, 4743 arg2: i16, 4744 arg3: u64, 4745 ) -> Option<Reg> { 4746 let pattern0_0 = arg0; 4747 let pattern1_0 = arg1; 4748 if let &ProducesBool::ProducesBool { 4749 producer: ref pattern2_0, 4750 cond: ref pattern2_1, 4751 } = pattern1_0 4752 { 4753 let pattern3_0 = arg2; 4754 let pattern4_0 = arg3; 4755 // Rule at src/isa/s390x/inst.isle line 2346. 4756 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4757 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4758 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4759 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4760 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4761 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4762 return Some(expr5_0); 4763 } 4764 return None; 4765 } 4766 4767 // Generated as internal constructor for term lower_bool. 4768 pub fn constructor_lower_bool<C: Context>( 4769 ctx: &mut C, 4770 arg0: Type, 4771 arg1: &ProducesBool, 4772 ) -> Option<Reg> { 4773 let pattern0_0 = arg0; 4774 if pattern0_0 == B1 { 4775 let pattern2_0 = arg1; 4776 // Rule at src/isa/s390x/inst.isle line 2356. 4777 let expr0_0: Type = B1; 4778 let expr1_0: i16 = 1; 4779 let expr2_0: u64 = 0; 4780 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4781 return Some(expr3_0); 4782 } 4783 if pattern0_0 == B8 { 4784 let pattern2_0 = arg1; 4785 // Rule at src/isa/s390x/inst.isle line 2357. 4786 let expr0_0: Type = B8; 4787 let expr1_0: i16 = -1; 4788 let expr2_0: u64 = 0; 4789 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4790 return Some(expr3_0); 4791 } 4792 if pattern0_0 == B16 { 4793 let pattern2_0 = arg1; 4794 // Rule at src/isa/s390x/inst.isle line 2358. 4795 let expr0_0: Type = B16; 4796 let expr1_0: i16 = -1; 4797 let expr2_0: u64 = 0; 4798 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4799 return Some(expr3_0); 4800 } 4801 if pattern0_0 == B32 { 4802 let pattern2_0 = arg1; 4803 // Rule at src/isa/s390x/inst.isle line 2359. 4804 let expr0_0: Type = B32; 4805 let expr1_0: i16 = -1; 4806 let expr2_0: u64 = 0; 4807 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4808 return Some(expr3_0); 4809 } 4810 if pattern0_0 == B64 { 4811 let pattern2_0 = arg1; 4812 // Rule at src/isa/s390x/inst.isle line 2360. 4813 let expr0_0: Type = B64; 4814 let expr1_0: i16 = -1; 4815 let expr2_0: u64 = 0; 4816 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4817 return Some(expr3_0); 4818 } 4819 return None; 4820 } 4821 4822 // Generated as internal constructor for term cond_br_bool. 4823 pub fn constructor_cond_br_bool<C: Context>( 4824 ctx: &mut C, 4825 arg0: &ProducesBool, 4826 arg1: MachLabel, 4827 arg2: MachLabel, 4828 ) -> Option<SideEffectNoResult> { 4829 let pattern0_0 = arg0; 4830 if let &ProducesBool::ProducesBool { 4831 producer: ref pattern1_0, 4832 cond: ref pattern1_1, 4833 } = pattern0_0 4834 { 4835 let pattern2_0 = arg1; 4836 let pattern3_0 = arg2; 4837 // Rule at src/isa/s390x/inst.isle line 2364. 4838 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4839 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4840 return Some(expr1_0); 4841 } 4842 return None; 4843 } 4844 4845 // Generated as internal constructor for term oneway_cond_br_bool. 4846 pub fn constructor_oneway_cond_br_bool<C: Context>( 4847 ctx: &mut C, 4848 arg0: &ProducesBool, 4849 arg1: MachLabel, 4850 ) -> Option<SideEffectNoResult> { 4851 let pattern0_0 = arg0; 4852 if let &ProducesBool::ProducesBool { 4853 producer: ref pattern1_0, 4854 cond: ref pattern1_1, 4855 } = pattern0_0 4856 { 4857 let pattern2_0 = arg1; 4858 // Rule at src/isa/s390x/inst.isle line 2370. 4859 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4860 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4861 return Some(expr1_0); 4862 } 4863 return None; 4864 } 4865 4866 // Generated as internal constructor for term trap_if_bool. 4867 pub fn constructor_trap_if_bool<C: Context>( 4868 ctx: &mut C, 4869 arg0: &ProducesBool, 4870 arg1: &TrapCode, 4871 ) -> Option<SideEffectNoResult> { 4872 let pattern0_0 = arg0; 4873 if let &ProducesBool::ProducesBool { 4874 producer: ref pattern1_0, 4875 cond: ref pattern1_1, 4876 } = pattern0_0 4877 { 4878 let pattern2_0 = arg1; 4879 // Rule at src/isa/s390x/inst.isle line 2376. 4880 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4881 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4882 return Some(expr1_0); 4883 } 4884 return None; 4885 } 4886 4887 // Generated as internal constructor for term casloop_val_reg. 4888 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4889 // Rule at src/isa/s390x/inst.isle line 2390. 4890 let expr0_0: u8 = 0; 4891 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4892 return Some(expr1_0); 4893 } 4894 4895 // Generated as internal constructor for term casloop_tmp_reg. 4896 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4897 // Rule at src/isa/s390x/inst.isle line 2394. 4898 let expr0_0: u8 = 1; 4899 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4900 return Some(expr1_0); 4901 } 4902 4903 // Generated as internal constructor for term casloop_emit. 4904 pub fn constructor_casloop_emit<C: Context>( 4905 ctx: &mut C, 4906 arg0: &VecMInstBuilder, 4907 arg1: Type, 4908 arg2: MemFlags, 4909 arg3: Reg, 4910 arg4: Reg, 4911 ) -> Option<Reg> { 4912 let pattern0_0 = arg0; 4913 let pattern1_0 = arg1; 4914 let pattern2_0 = arg2; 4915 let pattern3_0 = arg3; 4916 let pattern4_0 = arg4; 4917 // Rule at src/isa/s390x/inst.isle line 2403. 4918 let expr0_0: i64 = 0; 4919 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4920 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4921 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4922 let expr4_0 = 4923 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4924 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4925 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4926 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4927 let expr8_0 = IntCC::NotEqual; 4928 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4929 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4930 return Some(expr4_0); 4931 } 4932 4933 // Generated as internal constructor for term casloop_result. 4934 pub fn constructor_casloop_result<C: Context>( 4935 ctx: &mut C, 4936 arg0: Type, 4937 arg1: MemFlags, 4938 arg2: Reg, 4939 ) -> Option<Reg> { 4940 let pattern0_0 = arg0; 4941 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4942 let pattern2_0 = arg1; 4943 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4944 let pattern4_0 = arg2; 4945 // Rule at src/isa/s390x/inst.isle line 2421. 4946 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4947 return Some(expr0_0); 4948 } 4949 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4950 let pattern4_0 = arg2; 4951 // Rule at src/isa/s390x/inst.isle line 2419. 4952 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4953 return Some(expr0_0); 4954 } 4955 } 4956 return None; 4957 } 4958 4959 // Generated as internal constructor for term casloop. 4960 pub fn constructor_casloop<C: Context>( 4961 ctx: &mut C, 4962 arg0: &VecMInstBuilder, 4963 arg1: Type, 4964 arg2: MemFlags, 4965 arg3: Reg, 4966 arg4: Reg, 4967 ) -> Option<Reg> { 4968 let pattern0_0 = arg0; 4969 let pattern1_0 = arg1; 4970 let pattern2_0 = arg2; 4971 let pattern3_0 = arg3; 4972 let pattern4_0 = arg4; 4973 // Rule at src/isa/s390x/inst.isle line 2426. 4974 let expr0_0 = constructor_casloop_emit( 4975 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4976 )?; 4977 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4978 return Some(expr1_0); 4979 } 4980 4981 // Generated as internal constructor for term casloop_bitshift. 4982 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4983 let pattern0_0 = arg0; 4984 // Rule at src/isa/s390x/inst.isle line 2441. 4985 let expr0_0: Type = I32; 4986 let expr1_0: u8 = 3; 4987 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4988 return Some(expr2_0); 4989 } 4990 4991 // Generated as internal constructor for term casloop_aligned_addr. 4992 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4993 let pattern0_0 = arg0; 4994 // Rule at src/isa/s390x/inst.isle line 2446. 4995 let expr0_0: Type = I64; 4996 let expr1_0: u16 = 65532; 4997 let expr2_0: u8 = 0; 4998 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4999 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 5000 return Some(expr4_0); 5001 } 5002 5003 // Generated as internal constructor for term casloop_rotate_in. 5004 pub fn constructor_casloop_rotate_in<C: Context>( 5005 ctx: &mut C, 5006 arg0: &VecMInstBuilder, 5007 arg1: Type, 5008 arg2: MemFlags, 5009 arg3: Reg, 5010 arg4: Reg, 5011 ) -> Option<Reg> { 5012 let pattern0_0 = arg0; 5013 let pattern1_0 = arg1; 5014 if pattern1_0 == I8 { 5015 let pattern3_0 = arg2; 5016 let pattern4_0 = arg3; 5017 let pattern5_0 = arg4; 5018 // Rule at src/isa/s390x/inst.isle line 2456. 5019 let expr0_0: Type = I32; 5020 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5021 let expr2_0: u8 = 0; 5022 let expr3_0 = constructor_push_rot_imm_reg( 5023 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 5024 )?; 5025 return Some(expr3_0); 5026 } 5027 if pattern1_0 == I16 { 5028 let pattern3_0 = arg2; 5029 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5030 let pattern5_0 = arg3; 5031 let pattern6_0 = arg4; 5032 // Rule at src/isa/s390x/inst.isle line 2460. 5033 let expr0_0: Type = I32; 5034 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5035 let expr2_0: u8 = 16; 5036 let expr3_0 = constructor_push_rot_imm_reg( 5037 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5038 )?; 5039 return Some(expr3_0); 5040 } 5041 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5042 let pattern5_0 = arg3; 5043 let pattern6_0 = arg4; 5044 // Rule at src/isa/s390x/inst.isle line 2458. 5045 let expr0_0: Type = I32; 5046 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5047 let expr2_0: u8 = 0; 5048 let expr3_0 = constructor_push_rot_imm_reg( 5049 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5050 )?; 5051 return Some(expr3_0); 5052 } 5053 } 5054 return None; 5055 } 5056 5057 // Generated as internal constructor for term casloop_rotate_out. 5058 pub fn constructor_casloop_rotate_out<C: Context>( 5059 ctx: &mut C, 5060 arg0: &VecMInstBuilder, 5061 arg1: Type, 5062 arg2: MemFlags, 5063 arg3: Reg, 5064 arg4: Reg, 5065 ) -> Option<Reg> { 5066 let pattern0_0 = arg0; 5067 let pattern1_0 = arg1; 5068 if pattern1_0 == I8 { 5069 let pattern3_0 = arg2; 5070 let pattern4_0 = arg3; 5071 let pattern5_0 = arg4; 5072 // Rule at src/isa/s390x/inst.isle line 2469. 5073 let expr0_0: Type = I32; 5074 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5075 let expr2_0: u8 = 0; 5076 let expr3_0: Type = I32; 5077 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5078 let expr5_0 = constructor_push_rot_imm_reg( 5079 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5080 )?; 5081 return Some(expr5_0); 5082 } 5083 if pattern1_0 == I16 { 5084 let pattern3_0 = arg2; 5085 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5086 let pattern5_0 = arg3; 5087 let pattern6_0 = arg4; 5088 // Rule at src/isa/s390x/inst.isle line 2473. 5089 let expr0_0: Type = I32; 5090 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5091 let expr2_0: u8 = 16; 5092 let expr3_0 = constructor_push_rot_imm_reg( 5093 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5094 )?; 5095 return Some(expr3_0); 5096 } 5097 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5098 let pattern5_0 = arg3; 5099 let pattern6_0 = arg4; 5100 // Rule at src/isa/s390x/inst.isle line 2471. 5101 let expr0_0: Type = I32; 5102 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5103 let expr2_0: u8 = 0; 5104 let expr3_0 = constructor_push_rot_imm_reg( 5105 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5106 )?; 5107 return Some(expr3_0); 5108 } 5109 } 5110 return None; 5111 } 5112 5113 // Generated as internal constructor for term casloop_rotate_result. 5114 pub fn constructor_casloop_rotate_result<C: Context>( 5115 ctx: &mut C, 5116 arg0: Type, 5117 arg1: MemFlags, 5118 arg2: Reg, 5119 arg3: Reg, 5120 ) -> Option<Reg> { 5121 let pattern0_0 = arg0; 5122 if pattern0_0 == I8 { 5123 let pattern2_0 = arg1; 5124 let pattern3_0 = arg2; 5125 let pattern4_0 = arg3; 5126 // Rule at src/isa/s390x/inst.isle line 2484. 5127 let expr0_0: Type = I32; 5128 let expr1_0: u8 = 8; 5129 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5130 return Some(expr2_0); 5131 } 5132 if pattern0_0 == I16 { 5133 let pattern2_0 = arg1; 5134 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5135 let pattern4_0 = arg2; 5136 let pattern5_0 = arg3; 5137 // Rule at src/isa/s390x/inst.isle line 2488. 5138 let expr0_0: Type = I32; 5139 let expr1_0: Type = I32; 5140 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5141 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5142 return Some(expr3_0); 5143 } 5144 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5145 let pattern4_0 = arg2; 5146 let pattern5_0 = arg3; 5147 // Rule at src/isa/s390x/inst.isle line 2486. 5148 let expr0_0: Type = I32; 5149 let expr1_0: u8 = 16; 5150 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5151 return Some(expr2_0); 5152 } 5153 } 5154 return None; 5155 } 5156 5157 // Generated as internal constructor for term casloop_subword. 5158 pub fn constructor_casloop_subword<C: Context>( 5159 ctx: &mut C, 5160 arg0: &VecMInstBuilder, 5161 arg1: Type, 5162 arg2: MemFlags, 5163 arg3: Reg, 5164 arg4: Reg, 5165 arg5: Reg, 5166 ) -> Option<Reg> { 5167 let pattern0_0 = arg0; 5168 let pattern1_0 = arg1; 5169 let pattern2_0 = arg2; 5170 let pattern3_0 = arg3; 5171 let pattern4_0 = arg4; 5172 let pattern5_0 = arg5; 5173 // Rule at src/isa/s390x/inst.isle line 2493. 5174 let expr0_0 = constructor_casloop_emit( 5175 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5176 )?; 5177 let expr1_0 = 5178 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5179 return Some(expr1_0); 5180 } 5181 5182 // Generated as internal constructor for term clz_reg. 5183 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5184 let pattern0_0 = arg0; 5185 if pattern0_0 == 64 { 5186 let pattern2_0 = arg1; 5187 // Rule at src/isa/s390x/inst.isle line 2504. 5188 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5189 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5190 let expr2_0 = C::emit(ctx, &expr1_0); 5191 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5192 return Some(expr3_0); 5193 } 5194 let pattern1_0 = arg1; 5195 // Rule at src/isa/s390x/inst.isle line 2513. 5196 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5197 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5198 let expr2_0 = C::emit(ctx, &expr1_0); 5199 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5200 let expr4_0 = IntCC::Equal; 5201 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5202 let expr6_0 = MInst::CMov64SImm16 { 5203 rd: expr3_0, 5204 cond: expr5_0, 5205 imm: pattern0_0, 5206 }; 5207 let expr7_0 = C::emit(ctx, &expr6_0); 5208 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5209 return Some(expr8_0); 5210 } 5211 5212 // Generated as internal constructor for term aluop_add. 5213 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5214 let pattern0_0 = arg0; 5215 if pattern0_0 == I8 { 5216 // Rule at src/isa/s390x/inst.isle line 2524. 5217 let expr0_0 = ALUOp::Add32; 5218 return Some(expr0_0); 5219 } 5220 if pattern0_0 == I16 { 5221 // Rule at src/isa/s390x/inst.isle line 2525. 5222 let expr0_0 = ALUOp::Add32; 5223 return Some(expr0_0); 5224 } 5225 if pattern0_0 == I32 { 5226 // Rule at src/isa/s390x/inst.isle line 2526. 5227 let expr0_0 = ALUOp::Add32; 5228 return Some(expr0_0); 5229 } 5230 if pattern0_0 == I64 { 5231 // Rule at src/isa/s390x/inst.isle line 2527. 5232 let expr0_0 = ALUOp::Add64; 5233 return Some(expr0_0); 5234 } 5235 return None; 5236 } 5237 5238 // Generated as internal constructor for term aluop_add_sext16. 5239 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5240 let pattern0_0 = arg0; 5241 if pattern0_0 == I16 { 5242 // Rule at src/isa/s390x/inst.isle line 2530. 5243 let expr0_0 = ALUOp::Add32Ext16; 5244 return Some(expr0_0); 5245 } 5246 if pattern0_0 == I32 { 5247 // Rule at src/isa/s390x/inst.isle line 2531. 5248 let expr0_0 = ALUOp::Add32Ext16; 5249 return Some(expr0_0); 5250 } 5251 if pattern0_0 == I64 { 5252 // Rule at src/isa/s390x/inst.isle line 2532. 5253 let expr0_0 = ALUOp::Add64Ext16; 5254 return Some(expr0_0); 5255 } 5256 return None; 5257 } 5258 5259 // Generated as internal constructor for term aluop_add_sext32. 5260 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5261 let pattern0_0 = arg0; 5262 if pattern0_0 == I64 { 5263 // Rule at src/isa/s390x/inst.isle line 2535. 5264 let expr0_0 = ALUOp::Add64Ext32; 5265 return Some(expr0_0); 5266 } 5267 return None; 5268 } 5269 5270 // Generated as internal constructor for term add_reg. 5271 pub fn constructor_add_reg<C: Context>( 5272 ctx: &mut C, 5273 arg0: Type, 5274 arg1: Reg, 5275 arg2: Reg, 5276 ) -> Option<Reg> { 5277 let pattern0_0 = arg0; 5278 let pattern1_0 = arg1; 5279 let pattern2_0 = arg2; 5280 // Rule at src/isa/s390x/inst.isle line 2538. 5281 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5282 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5283 return Some(expr1_0); 5284 } 5285 5286 // Generated as internal constructor for term add_reg_sext32. 5287 pub fn constructor_add_reg_sext32<C: Context>( 5288 ctx: &mut C, 5289 arg0: Type, 5290 arg1: Reg, 5291 arg2: Reg, 5292 ) -> Option<Reg> { 5293 let pattern0_0 = arg0; 5294 let pattern1_0 = arg1; 5295 let pattern2_0 = arg2; 5296 // Rule at src/isa/s390x/inst.isle line 2541. 5297 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5298 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5299 return Some(expr1_0); 5300 } 5301 5302 // Generated as internal constructor for term add_simm16. 5303 pub fn constructor_add_simm16<C: Context>( 5304 ctx: &mut C, 5305 arg0: Type, 5306 arg1: Reg, 5307 arg2: i16, 5308 ) -> Option<Reg> { 5309 let pattern0_0 = arg0; 5310 let pattern1_0 = arg1; 5311 let pattern2_0 = arg2; 5312 // Rule at src/isa/s390x/inst.isle line 2544. 5313 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5314 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5315 return Some(expr1_0); 5316 } 5317 5318 // Generated as internal constructor for term add_simm32. 5319 pub fn constructor_add_simm32<C: Context>( 5320 ctx: &mut C, 5321 arg0: Type, 5322 arg1: Reg, 5323 arg2: i32, 5324 ) -> Option<Reg> { 5325 let pattern0_0 = arg0; 5326 let pattern1_0 = arg1; 5327 let pattern2_0 = arg2; 5328 // Rule at src/isa/s390x/inst.isle line 2547. 5329 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5330 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5331 return Some(expr1_0); 5332 } 5333 5334 // Generated as internal constructor for term add_mem. 5335 pub fn constructor_add_mem<C: Context>( 5336 ctx: &mut C, 5337 arg0: Type, 5338 arg1: Reg, 5339 arg2: &MemArg, 5340 ) -> Option<Reg> { 5341 let pattern0_0 = arg0; 5342 let pattern1_0 = arg1; 5343 let pattern2_0 = arg2; 5344 // Rule at src/isa/s390x/inst.isle line 2550. 5345 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5346 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5347 return Some(expr1_0); 5348 } 5349 5350 // Generated as internal constructor for term add_mem_sext16. 5351 pub fn constructor_add_mem_sext16<C: Context>( 5352 ctx: &mut C, 5353 arg0: Type, 5354 arg1: Reg, 5355 arg2: &MemArg, 5356 ) -> Option<Reg> { 5357 let pattern0_0 = arg0; 5358 let pattern1_0 = arg1; 5359 let pattern2_0 = arg2; 5360 // Rule at src/isa/s390x/inst.isle line 2553. 5361 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5362 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5363 return Some(expr1_0); 5364 } 5365 5366 // Generated as internal constructor for term add_mem_sext32. 5367 pub fn constructor_add_mem_sext32<C: Context>( 5368 ctx: &mut C, 5369 arg0: Type, 5370 arg1: Reg, 5371 arg2: &MemArg, 5372 ) -> Option<Reg> { 5373 let pattern0_0 = arg0; 5374 let pattern1_0 = arg1; 5375 let pattern2_0 = arg2; 5376 // Rule at src/isa/s390x/inst.isle line 2556. 5377 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5378 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5379 return Some(expr1_0); 5380 } 5381 5382 // Generated as internal constructor for term aluop_add_logical. 5383 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5384 let pattern0_0 = arg0; 5385 if pattern0_0 == I32 { 5386 // Rule at src/isa/s390x/inst.isle line 2562. 5387 let expr0_0 = ALUOp::AddLogical32; 5388 return Some(expr0_0); 5389 } 5390 if pattern0_0 == I64 { 5391 // Rule at src/isa/s390x/inst.isle line 2563. 5392 let expr0_0 = ALUOp::AddLogical64; 5393 return Some(expr0_0); 5394 } 5395 return None; 5396 } 5397 5398 // Generated as internal constructor for term aluop_add_logical_zext32. 5399 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5400 let pattern0_0 = arg0; 5401 if pattern0_0 == I64 { 5402 // Rule at src/isa/s390x/inst.isle line 2566. 5403 let expr0_0 = ALUOp::AddLogical64Ext32; 5404 return Some(expr0_0); 5405 } 5406 return None; 5407 } 5408 5409 // Generated as internal constructor for term add_logical_reg. 5410 pub fn constructor_add_logical_reg<C: Context>( 5411 ctx: &mut C, 5412 arg0: Type, 5413 arg1: Reg, 5414 arg2: Reg, 5415 ) -> Option<Reg> { 5416 let pattern0_0 = arg0; 5417 let pattern1_0 = arg1; 5418 let pattern2_0 = arg2; 5419 // Rule at src/isa/s390x/inst.isle line 2569. 5420 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5421 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5422 return Some(expr1_0); 5423 } 5424 5425 // Generated as internal constructor for term add_logical_reg_zext32. 5426 pub fn constructor_add_logical_reg_zext32<C: Context>( 5427 ctx: &mut C, 5428 arg0: Type, 5429 arg1: Reg, 5430 arg2: Reg, 5431 ) -> Option<Reg> { 5432 let pattern0_0 = arg0; 5433 let pattern1_0 = arg1; 5434 let pattern2_0 = arg2; 5435 // Rule at src/isa/s390x/inst.isle line 2572. 5436 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5437 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5438 return Some(expr1_0); 5439 } 5440 5441 // Generated as internal constructor for term add_logical_zimm32. 5442 pub fn constructor_add_logical_zimm32<C: Context>( 5443 ctx: &mut C, 5444 arg0: Type, 5445 arg1: Reg, 5446 arg2: u32, 5447 ) -> Option<Reg> { 5448 let pattern0_0 = arg0; 5449 let pattern1_0 = arg1; 5450 let pattern2_0 = arg2; 5451 // Rule at src/isa/s390x/inst.isle line 2575. 5452 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5453 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5454 return Some(expr1_0); 5455 } 5456 5457 // Generated as internal constructor for term add_logical_mem. 5458 pub fn constructor_add_logical_mem<C: Context>( 5459 ctx: &mut C, 5460 arg0: Type, 5461 arg1: Reg, 5462 arg2: &MemArg, 5463 ) -> Option<Reg> { 5464 let pattern0_0 = arg0; 5465 let pattern1_0 = arg1; 5466 let pattern2_0 = arg2; 5467 // Rule at src/isa/s390x/inst.isle line 2578. 5468 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5469 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5470 return Some(expr1_0); 5471 } 5472 5473 // Generated as internal constructor for term add_logical_mem_zext32. 5474 pub fn constructor_add_logical_mem_zext32<C: Context>( 5475 ctx: &mut C, 5476 arg0: Type, 5477 arg1: Reg, 5478 arg2: &MemArg, 5479 ) -> Option<Reg> { 5480 let pattern0_0 = arg0; 5481 let pattern1_0 = arg1; 5482 let pattern2_0 = arg2; 5483 // Rule at src/isa/s390x/inst.isle line 2581. 5484 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5485 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5486 return Some(expr1_0); 5487 } 5488 5489 // Generated as internal constructor for term aluop_sub. 5490 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5491 let pattern0_0 = arg0; 5492 if pattern0_0 == I8 { 5493 // Rule at src/isa/s390x/inst.isle line 2587. 5494 let expr0_0 = ALUOp::Sub32; 5495 return Some(expr0_0); 5496 } 5497 if pattern0_0 == I16 { 5498 // Rule at src/isa/s390x/inst.isle line 2588. 5499 let expr0_0 = ALUOp::Sub32; 5500 return Some(expr0_0); 5501 } 5502 if pattern0_0 == I32 { 5503 // Rule at src/isa/s390x/inst.isle line 2589. 5504 let expr0_0 = ALUOp::Sub32; 5505 return Some(expr0_0); 5506 } 5507 if pattern0_0 == I64 { 5508 // Rule at src/isa/s390x/inst.isle line 2590. 5509 let expr0_0 = ALUOp::Sub64; 5510 return Some(expr0_0); 5511 } 5512 return None; 5513 } 5514 5515 // Generated as internal constructor for term aluop_sub_sext16. 5516 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5517 let pattern0_0 = arg0; 5518 if pattern0_0 == I16 { 5519 // Rule at src/isa/s390x/inst.isle line 2593. 5520 let expr0_0 = ALUOp::Sub32Ext16; 5521 return Some(expr0_0); 5522 } 5523 if pattern0_0 == I32 { 5524 // Rule at src/isa/s390x/inst.isle line 2594. 5525 let expr0_0 = ALUOp::Sub32Ext16; 5526 return Some(expr0_0); 5527 } 5528 if pattern0_0 == I64 { 5529 // Rule at src/isa/s390x/inst.isle line 2595. 5530 let expr0_0 = ALUOp::Sub64Ext16; 5531 return Some(expr0_0); 5532 } 5533 return None; 5534 } 5535 5536 // Generated as internal constructor for term aluop_sub_sext32. 5537 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5538 let pattern0_0 = arg0; 5539 if pattern0_0 == I64 { 5540 // Rule at src/isa/s390x/inst.isle line 2598. 5541 let expr0_0 = ALUOp::Sub64Ext32; 5542 return Some(expr0_0); 5543 } 5544 return None; 5545 } 5546 5547 // Generated as internal constructor for term sub_reg. 5548 pub fn constructor_sub_reg<C: Context>( 5549 ctx: &mut C, 5550 arg0: Type, 5551 arg1: Reg, 5552 arg2: Reg, 5553 ) -> Option<Reg> { 5554 let pattern0_0 = arg0; 5555 let pattern1_0 = arg1; 5556 let pattern2_0 = arg2; 5557 // Rule at src/isa/s390x/inst.isle line 2601. 5558 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5559 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5560 return Some(expr1_0); 5561 } 5562 5563 // Generated as internal constructor for term sub_reg_sext32. 5564 pub fn constructor_sub_reg_sext32<C: Context>( 5565 ctx: &mut C, 5566 arg0: Type, 5567 arg1: Reg, 5568 arg2: Reg, 5569 ) -> Option<Reg> { 5570 let pattern0_0 = arg0; 5571 let pattern1_0 = arg1; 5572 let pattern2_0 = arg2; 5573 // Rule at src/isa/s390x/inst.isle line 2604. 5574 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5575 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5576 return Some(expr1_0); 5577 } 5578 5579 // Generated as internal constructor for term sub_mem. 5580 pub fn constructor_sub_mem<C: Context>( 5581 ctx: &mut C, 5582 arg0: Type, 5583 arg1: Reg, 5584 arg2: &MemArg, 5585 ) -> Option<Reg> { 5586 let pattern0_0 = arg0; 5587 let pattern1_0 = arg1; 5588 let pattern2_0 = arg2; 5589 // Rule at src/isa/s390x/inst.isle line 2607. 5590 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5591 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5592 return Some(expr1_0); 5593 } 5594 5595 // Generated as internal constructor for term sub_mem_sext16. 5596 pub fn constructor_sub_mem_sext16<C: Context>( 5597 ctx: &mut C, 5598 arg0: Type, 5599 arg1: Reg, 5600 arg2: &MemArg, 5601 ) -> Option<Reg> { 5602 let pattern0_0 = arg0; 5603 let pattern1_0 = arg1; 5604 let pattern2_0 = arg2; 5605 // Rule at src/isa/s390x/inst.isle line 2610. 5606 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5607 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5608 return Some(expr1_0); 5609 } 5610 5611 // Generated as internal constructor for term sub_mem_sext32. 5612 pub fn constructor_sub_mem_sext32<C: Context>( 5613 ctx: &mut C, 5614 arg0: Type, 5615 arg1: Reg, 5616 arg2: &MemArg, 5617 ) -> Option<Reg> { 5618 let pattern0_0 = arg0; 5619 let pattern1_0 = arg1; 5620 let pattern2_0 = arg2; 5621 // Rule at src/isa/s390x/inst.isle line 2613. 5622 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5623 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5624 return Some(expr1_0); 5625 } 5626 5627 // Generated as internal constructor for term aluop_sub_logical. 5628 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5629 let pattern0_0 = arg0; 5630 if pattern0_0 == I32 { 5631 // Rule at src/isa/s390x/inst.isle line 2619. 5632 let expr0_0 = ALUOp::SubLogical32; 5633 return Some(expr0_0); 5634 } 5635 if pattern0_0 == I64 { 5636 // Rule at src/isa/s390x/inst.isle line 2620. 5637 let expr0_0 = ALUOp::SubLogical64; 5638 return Some(expr0_0); 5639 } 5640 return None; 5641 } 5642 5643 // Generated as internal constructor for term aluop_sub_logical_zext32. 5644 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5645 let pattern0_0 = arg0; 5646 if pattern0_0 == I64 { 5647 // Rule at src/isa/s390x/inst.isle line 2623. 5648 let expr0_0 = ALUOp::SubLogical64Ext32; 5649 return Some(expr0_0); 5650 } 5651 return None; 5652 } 5653 5654 // Generated as internal constructor for term sub_logical_reg. 5655 pub fn constructor_sub_logical_reg<C: Context>( 5656 ctx: &mut C, 5657 arg0: Type, 5658 arg1: Reg, 5659 arg2: Reg, 5660 ) -> Option<Reg> { 5661 let pattern0_0 = arg0; 5662 let pattern1_0 = arg1; 5663 let pattern2_0 = arg2; 5664 // Rule at src/isa/s390x/inst.isle line 2626. 5665 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5666 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5667 return Some(expr1_0); 5668 } 5669 5670 // Generated as internal constructor for term sub_logical_reg_zext32. 5671 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5672 ctx: &mut C, 5673 arg0: Type, 5674 arg1: Reg, 5675 arg2: Reg, 5676 ) -> Option<Reg> { 5677 let pattern0_0 = arg0; 5678 let pattern1_0 = arg1; 5679 let pattern2_0 = arg2; 5680 // Rule at src/isa/s390x/inst.isle line 2629. 5681 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5682 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5683 return Some(expr1_0); 5684 } 5685 5686 // Generated as internal constructor for term sub_logical_zimm32. 5687 pub fn constructor_sub_logical_zimm32<C: Context>( 5688 ctx: &mut C, 5689 arg0: Type, 5690 arg1: Reg, 5691 arg2: u32, 5692 ) -> Option<Reg> { 5693 let pattern0_0 = arg0; 5694 let pattern1_0 = arg1; 5695 let pattern2_0 = arg2; 5696 // Rule at src/isa/s390x/inst.isle line 2632. 5697 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5698 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5699 return Some(expr1_0); 5700 } 5701 5702 // Generated as internal constructor for term sub_logical_mem. 5703 pub fn constructor_sub_logical_mem<C: Context>( 5704 ctx: &mut C, 5705 arg0: Type, 5706 arg1: Reg, 5707 arg2: &MemArg, 5708 ) -> Option<Reg> { 5709 let pattern0_0 = arg0; 5710 let pattern1_0 = arg1; 5711 let pattern2_0 = arg2; 5712 // Rule at src/isa/s390x/inst.isle line 2635. 5713 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5714 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5715 return Some(expr1_0); 5716 } 5717 5718 // Generated as internal constructor for term sub_logical_mem_zext32. 5719 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5720 ctx: &mut C, 5721 arg0: Type, 5722 arg1: Reg, 5723 arg2: &MemArg, 5724 ) -> Option<Reg> { 5725 let pattern0_0 = arg0; 5726 let pattern1_0 = arg1; 5727 let pattern2_0 = arg2; 5728 // Rule at src/isa/s390x/inst.isle line 2638. 5729 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5730 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5731 return Some(expr1_0); 5732 } 5733 5734 // Generated as internal constructor for term aluop_mul. 5735 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5736 let pattern0_0 = arg0; 5737 if pattern0_0 == I8 { 5738 // Rule at src/isa/s390x/inst.isle line 2644. 5739 let expr0_0 = ALUOp::Mul32; 5740 return Some(expr0_0); 5741 } 5742 if pattern0_0 == I16 { 5743 // Rule at src/isa/s390x/inst.isle line 2645. 5744 let expr0_0 = ALUOp::Mul32; 5745 return Some(expr0_0); 5746 } 5747 if pattern0_0 == I32 { 5748 // Rule at src/isa/s390x/inst.isle line 2646. 5749 let expr0_0 = ALUOp::Mul32; 5750 return Some(expr0_0); 5751 } 5752 if pattern0_0 == I64 { 5753 // Rule at src/isa/s390x/inst.isle line 2647. 5754 let expr0_0 = ALUOp::Mul64; 5755 return Some(expr0_0); 5756 } 5757 return None; 5758 } 5759 5760 // Generated as internal constructor for term aluop_mul_sext16. 5761 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5762 let pattern0_0 = arg0; 5763 if pattern0_0 == I16 { 5764 // Rule at src/isa/s390x/inst.isle line 2650. 5765 let expr0_0 = ALUOp::Mul32Ext16; 5766 return Some(expr0_0); 5767 } 5768 if pattern0_0 == I32 { 5769 // Rule at src/isa/s390x/inst.isle line 2651. 5770 let expr0_0 = ALUOp::Mul32Ext16; 5771 return Some(expr0_0); 5772 } 5773 if pattern0_0 == I64 { 5774 // Rule at src/isa/s390x/inst.isle line 2652. 5775 let expr0_0 = ALUOp::Mul64Ext16; 5776 return Some(expr0_0); 5777 } 5778 return None; 5779 } 5780 5781 // Generated as internal constructor for term aluop_mul_sext32. 5782 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5783 let pattern0_0 = arg0; 5784 if pattern0_0 == I64 { 5785 // Rule at src/isa/s390x/inst.isle line 2655. 5786 let expr0_0 = ALUOp::Mul64Ext32; 5787 return Some(expr0_0); 5788 } 5789 return None; 5790 } 5791 5792 // Generated as internal constructor for term mul_reg. 5793 pub fn constructor_mul_reg<C: Context>( 5794 ctx: &mut C, 5795 arg0: Type, 5796 arg1: Reg, 5797 arg2: Reg, 5798 ) -> Option<Reg> { 5799 let pattern0_0 = arg0; 5800 let pattern1_0 = arg1; 5801 let pattern2_0 = arg2; 5802 // Rule at src/isa/s390x/inst.isle line 2658. 5803 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5804 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5805 return Some(expr1_0); 5806 } 5807 5808 // Generated as internal constructor for term mul_reg_sext32. 5809 pub fn constructor_mul_reg_sext32<C: Context>( 5810 ctx: &mut C, 5811 arg0: Type, 5812 arg1: Reg, 5813 arg2: Reg, 5814 ) -> Option<Reg> { 5815 let pattern0_0 = arg0; 5816 let pattern1_0 = arg1; 5817 let pattern2_0 = arg2; 5818 // Rule at src/isa/s390x/inst.isle line 2661. 5819 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5820 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5821 return Some(expr1_0); 5822 } 5823 5824 // Generated as internal constructor for term mul_simm16. 5825 pub fn constructor_mul_simm16<C: Context>( 5826 ctx: &mut C, 5827 arg0: Type, 5828 arg1: Reg, 5829 arg2: i16, 5830 ) -> Option<Reg> { 5831 let pattern0_0 = arg0; 5832 let pattern1_0 = arg1; 5833 let pattern2_0 = arg2; 5834 // Rule at src/isa/s390x/inst.isle line 2664. 5835 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5836 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5837 return Some(expr1_0); 5838 } 5839 5840 // Generated as internal constructor for term mul_simm32. 5841 pub fn constructor_mul_simm32<C: Context>( 5842 ctx: &mut C, 5843 arg0: Type, 5844 arg1: Reg, 5845 arg2: i32, 5846 ) -> Option<Reg> { 5847 let pattern0_0 = arg0; 5848 let pattern1_0 = arg1; 5849 let pattern2_0 = arg2; 5850 // Rule at src/isa/s390x/inst.isle line 2667. 5851 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5852 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5853 return Some(expr1_0); 5854 } 5855 5856 // Generated as internal constructor for term mul_mem. 5857 pub fn constructor_mul_mem<C: Context>( 5858 ctx: &mut C, 5859 arg0: Type, 5860 arg1: Reg, 5861 arg2: &MemArg, 5862 ) -> Option<Reg> { 5863 let pattern0_0 = arg0; 5864 let pattern1_0 = arg1; 5865 let pattern2_0 = arg2; 5866 // Rule at src/isa/s390x/inst.isle line 2670. 5867 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5868 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5869 return Some(expr1_0); 5870 } 5871 5872 // Generated as internal constructor for term mul_mem_sext16. 5873 pub fn constructor_mul_mem_sext16<C: Context>( 5874 ctx: &mut C, 5875 arg0: Type, 5876 arg1: Reg, 5877 arg2: &MemArg, 5878 ) -> Option<Reg> { 5879 let pattern0_0 = arg0; 5880 let pattern1_0 = arg1; 5881 let pattern2_0 = arg2; 5882 // Rule at src/isa/s390x/inst.isle line 2673. 5883 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5884 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5885 return Some(expr1_0); 5886 } 5887 5888 // Generated as internal constructor for term mul_mem_sext32. 5889 pub fn constructor_mul_mem_sext32<C: Context>( 5890 ctx: &mut C, 5891 arg0: Type, 5892 arg1: Reg, 5893 arg2: &MemArg, 5894 ) -> Option<Reg> { 5895 let pattern0_0 = arg0; 5896 let pattern1_0 = arg1; 5897 let pattern2_0 = arg2; 5898 // Rule at src/isa/s390x/inst.isle line 2676. 5899 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5900 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5901 return Some(expr1_0); 5902 } 5903 5904 // Generated as internal constructor for term udivmod. 5905 pub fn constructor_udivmod<C: Context>( 5906 ctx: &mut C, 5907 arg0: Type, 5908 arg1: &RegPair, 5909 arg2: Reg, 5910 ) -> Option<RegPair> { 5911 let pattern0_0 = arg0; 5912 if pattern0_0 == I32 { 5913 let pattern2_0 = arg1; 5914 let pattern3_0 = arg2; 5915 // Rule at src/isa/s390x/inst.isle line 2682. 5916 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5917 return Some(expr0_0); 5918 } 5919 if pattern0_0 == I64 { 5920 let pattern2_0 = arg1; 5921 let pattern3_0 = arg2; 5922 // Rule at src/isa/s390x/inst.isle line 2683. 5923 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5924 return Some(expr0_0); 5925 } 5926 return None; 5927 } 5928 5929 // Generated as internal constructor for term sdivmod. 5930 pub fn constructor_sdivmod<C: Context>( 5931 ctx: &mut C, 5932 arg0: Type, 5933 arg1: &RegPair, 5934 arg2: Reg, 5935 ) -> Option<RegPair> { 5936 let pattern0_0 = arg0; 5937 if pattern0_0 == I32 { 5938 let pattern2_0 = arg1; 5939 let pattern3_0 = arg2; 5940 // Rule at src/isa/s390x/inst.isle line 2689. 5941 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5942 return Some(expr0_0); 5943 } 5944 if pattern0_0 == I64 { 5945 let pattern2_0 = arg1; 5946 let pattern3_0 = arg2; 5947 // Rule at src/isa/s390x/inst.isle line 2690. 5948 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5949 return Some(expr0_0); 5950 } 5951 return None; 5952 } 5953 5954 // Generated as internal constructor for term aluop_and. 5955 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5956 let pattern0_0 = arg0; 5957 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5958 // Rule at src/isa/s390x/inst.isle line 2696. 5959 let expr0_0 = ALUOp::And32; 5960 return Some(expr0_0); 5961 } 5962 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5963 // Rule at src/isa/s390x/inst.isle line 2697. 5964 let expr0_0 = ALUOp::And64; 5965 return Some(expr0_0); 5966 } 5967 return None; 5968 } 5969 5970 // Generated as internal constructor for term and_reg. 5971 pub fn constructor_and_reg<C: Context>( 5972 ctx: &mut C, 5973 arg0: Type, 5974 arg1: Reg, 5975 arg2: Reg, 5976 ) -> Option<Reg> { 5977 let pattern0_0 = arg0; 5978 let pattern1_0 = arg1; 5979 let pattern2_0 = arg2; 5980 // Rule at src/isa/s390x/inst.isle line 2700. 5981 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5982 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5983 return Some(expr1_0); 5984 } 5985 5986 // Generated as internal constructor for term and_uimm16shifted. 5987 pub fn constructor_and_uimm16shifted<C: Context>( 5988 ctx: &mut C, 5989 arg0: Type, 5990 arg1: Reg, 5991 arg2: UImm16Shifted, 5992 ) -> Option<Reg> { 5993 let pattern0_0 = arg0; 5994 let pattern1_0 = arg1; 5995 let pattern2_0 = arg2; 5996 // Rule at src/isa/s390x/inst.isle line 2703. 5997 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5998 let expr1_0 = 5999 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6000 return Some(expr1_0); 6001 } 6002 6003 // Generated as internal constructor for term and_uimm32shifted. 6004 pub fn constructor_and_uimm32shifted<C: Context>( 6005 ctx: &mut C, 6006 arg0: Type, 6007 arg1: Reg, 6008 arg2: UImm32Shifted, 6009 ) -> Option<Reg> { 6010 let pattern0_0 = arg0; 6011 let pattern1_0 = arg1; 6012 let pattern2_0 = arg2; 6013 // Rule at src/isa/s390x/inst.isle line 2706. 6014 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6015 let expr1_0 = 6016 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6017 return Some(expr1_0); 6018 } 6019 6020 // Generated as internal constructor for term and_mem. 6021 pub fn constructor_and_mem<C: Context>( 6022 ctx: &mut C, 6023 arg0: Type, 6024 arg1: Reg, 6025 arg2: &MemArg, 6026 ) -> Option<Reg> { 6027 let pattern0_0 = arg0; 6028 let pattern1_0 = arg1; 6029 let pattern2_0 = arg2; 6030 // Rule at src/isa/s390x/inst.isle line 2709. 6031 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6032 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6033 return Some(expr1_0); 6034 } 6035 6036 // Generated as internal constructor for term aluop_or. 6037 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6038 let pattern0_0 = arg0; 6039 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6040 // Rule at src/isa/s390x/inst.isle line 2715. 6041 let expr0_0 = ALUOp::Orr32; 6042 return Some(expr0_0); 6043 } 6044 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6045 // Rule at src/isa/s390x/inst.isle line 2716. 6046 let expr0_0 = ALUOp::Orr64; 6047 return Some(expr0_0); 6048 } 6049 return None; 6050 } 6051 6052 // Generated as internal constructor for term or_reg. 6053 pub fn constructor_or_reg<C: Context>( 6054 ctx: &mut C, 6055 arg0: Type, 6056 arg1: Reg, 6057 arg2: Reg, 6058 ) -> Option<Reg> { 6059 let pattern0_0 = arg0; 6060 let pattern1_0 = arg1; 6061 let pattern2_0 = arg2; 6062 // Rule at src/isa/s390x/inst.isle line 2719. 6063 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6064 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6065 return Some(expr1_0); 6066 } 6067 6068 // Generated as internal constructor for term or_uimm16shifted. 6069 pub fn constructor_or_uimm16shifted<C: Context>( 6070 ctx: &mut C, 6071 arg0: Type, 6072 arg1: Reg, 6073 arg2: UImm16Shifted, 6074 ) -> Option<Reg> { 6075 let pattern0_0 = arg0; 6076 let pattern1_0 = arg1; 6077 let pattern2_0 = arg2; 6078 // Rule at src/isa/s390x/inst.isle line 2722. 6079 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6080 let expr1_0 = 6081 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6082 return Some(expr1_0); 6083 } 6084 6085 // Generated as internal constructor for term or_uimm32shifted. 6086 pub fn constructor_or_uimm32shifted<C: Context>( 6087 ctx: &mut C, 6088 arg0: Type, 6089 arg1: Reg, 6090 arg2: UImm32Shifted, 6091 ) -> Option<Reg> { 6092 let pattern0_0 = arg0; 6093 let pattern1_0 = arg1; 6094 let pattern2_0 = arg2; 6095 // Rule at src/isa/s390x/inst.isle line 2725. 6096 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6097 let expr1_0 = 6098 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6099 return Some(expr1_0); 6100 } 6101 6102 // Generated as internal constructor for term or_mem. 6103 pub fn constructor_or_mem<C: Context>( 6104 ctx: &mut C, 6105 arg0: Type, 6106 arg1: Reg, 6107 arg2: &MemArg, 6108 ) -> Option<Reg> { 6109 let pattern0_0 = arg0; 6110 let pattern1_0 = arg1; 6111 let pattern2_0 = arg2; 6112 // Rule at src/isa/s390x/inst.isle line 2728. 6113 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6114 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6115 return Some(expr1_0); 6116 } 6117 6118 // Generated as internal constructor for term aluop_xor. 6119 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6120 let pattern0_0 = arg0; 6121 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6122 // Rule at src/isa/s390x/inst.isle line 2734. 6123 let expr0_0 = ALUOp::Xor32; 6124 return Some(expr0_0); 6125 } 6126 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6127 // Rule at src/isa/s390x/inst.isle line 2735. 6128 let expr0_0 = ALUOp::Xor64; 6129 return Some(expr0_0); 6130 } 6131 return None; 6132 } 6133 6134 // Generated as internal constructor for term xor_reg. 6135 pub fn constructor_xor_reg<C: Context>( 6136 ctx: &mut C, 6137 arg0: Type, 6138 arg1: Reg, 6139 arg2: Reg, 6140 ) -> Option<Reg> { 6141 let pattern0_0 = arg0; 6142 let pattern1_0 = arg1; 6143 let pattern2_0 = arg2; 6144 // Rule at src/isa/s390x/inst.isle line 2738. 6145 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6146 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6147 return Some(expr1_0); 6148 } 6149 6150 // Generated as internal constructor for term xor_uimm32shifted. 6151 pub fn constructor_xor_uimm32shifted<C: Context>( 6152 ctx: &mut C, 6153 arg0: Type, 6154 arg1: Reg, 6155 arg2: UImm32Shifted, 6156 ) -> Option<Reg> { 6157 let pattern0_0 = arg0; 6158 let pattern1_0 = arg1; 6159 let pattern2_0 = arg2; 6160 // Rule at src/isa/s390x/inst.isle line 2741. 6161 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6162 let expr1_0 = 6163 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6164 return Some(expr1_0); 6165 } 6166 6167 // Generated as internal constructor for term xor_mem. 6168 pub fn constructor_xor_mem<C: Context>( 6169 ctx: &mut C, 6170 arg0: Type, 6171 arg1: Reg, 6172 arg2: &MemArg, 6173 ) -> Option<Reg> { 6174 let pattern0_0 = arg0; 6175 let pattern1_0 = arg1; 6176 let pattern2_0 = arg2; 6177 // Rule at src/isa/s390x/inst.isle line 2744. 6178 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6179 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6180 return Some(expr1_0); 6181 } 6182 6183 // Generated as internal constructor for term push_xor_uimm32shifted. 6184 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6185 ctx: &mut C, 6186 arg0: &VecMInstBuilder, 6187 arg1: Type, 6188 arg2: WritableReg, 6189 arg3: Reg, 6190 arg4: UImm32Shifted, 6191 ) -> Option<Reg> { 6192 let pattern0_0 = arg0; 6193 let pattern1_0 = arg1; 6194 let pattern2_0 = arg2; 6195 let pattern3_0 = arg3; 6196 let pattern4_0 = arg4; 6197 // Rule at src/isa/s390x/inst.isle line 2747. 6198 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6199 let expr1_0 = constructor_push_alu_uimm32shifted( 6200 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6201 )?; 6202 return Some(expr1_0); 6203 } 6204 6205 // Generated as internal constructor for term not_reg. 6206 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6207 let pattern0_0 = arg0; 6208 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6209 let pattern2_0 = arg1; 6210 // Rule at src/isa/s390x/inst.isle line 2753. 6211 let expr0_0: u32 = 4294967295; 6212 let expr1_0: u8 = 0; 6213 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6214 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6215 return Some(expr3_0); 6216 } 6217 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6218 let pattern2_0 = arg1; 6219 // Rule at src/isa/s390x/inst.isle line 2755. 6220 let expr0_0: u32 = 4294967295; 6221 let expr1_0: u8 = 0; 6222 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6223 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6224 let expr4_0: u32 = 4294967295; 6225 let expr5_0: u8 = 32; 6226 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6227 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6228 return Some(expr7_0); 6229 } 6230 return None; 6231 } 6232 6233 // Generated as internal constructor for term push_not_reg. 6234 pub fn constructor_push_not_reg<C: Context>( 6235 ctx: &mut C, 6236 arg0: &VecMInstBuilder, 6237 arg1: Type, 6238 arg2: WritableReg, 6239 arg3: Reg, 6240 ) -> Option<Reg> { 6241 let pattern0_0 = arg0; 6242 let pattern1_0 = arg1; 6243 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6244 let pattern3_0 = arg2; 6245 let pattern4_0 = arg3; 6246 // Rule at src/isa/s390x/inst.isle line 2761. 6247 let expr0_0: u32 = 4294967295; 6248 let expr1_0: u8 = 0; 6249 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6250 let expr3_0 = constructor_push_xor_uimm32shifted( 6251 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6252 )?; 6253 return Some(expr3_0); 6254 } 6255 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6256 let pattern3_0 = arg2; 6257 let pattern4_0 = arg3; 6258 // Rule at src/isa/s390x/inst.isle line 2763. 6259 let expr0_0: u32 = 4294967295; 6260 let expr1_0: u8 = 0; 6261 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6262 let expr3_0 = constructor_push_xor_uimm32shifted( 6263 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6264 )?; 6265 let expr4_0: u32 = 4294967295; 6266 let expr5_0: u8 = 32; 6267 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6268 let expr7_0 = constructor_push_xor_uimm32shifted( 6269 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6270 )?; 6271 return Some(expr7_0); 6272 } 6273 return None; 6274 } 6275 6276 // Generated as internal constructor for term aluop_and_not. 6277 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6278 let pattern0_0 = arg0; 6279 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6280 // Rule at src/isa/s390x/inst.isle line 2771. 6281 let expr0_0 = ALUOp::AndNot32; 6282 return Some(expr0_0); 6283 } 6284 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6285 // Rule at src/isa/s390x/inst.isle line 2772. 6286 let expr0_0 = ALUOp::AndNot64; 6287 return Some(expr0_0); 6288 } 6289 return None; 6290 } 6291 6292 // Generated as internal constructor for term and_not_reg. 6293 pub fn constructor_and_not_reg<C: Context>( 6294 ctx: &mut C, 6295 arg0: Type, 6296 arg1: Reg, 6297 arg2: Reg, 6298 ) -> Option<Reg> { 6299 let pattern0_0 = arg0; 6300 let pattern1_0 = arg1; 6301 let pattern2_0 = arg2; 6302 // Rule at src/isa/s390x/inst.isle line 2775. 6303 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6304 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6305 return Some(expr1_0); 6306 } 6307 6308 // Generated as internal constructor for term aluop_or_not. 6309 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6310 let pattern0_0 = arg0; 6311 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6312 // Rule at src/isa/s390x/inst.isle line 2781. 6313 let expr0_0 = ALUOp::OrrNot32; 6314 return Some(expr0_0); 6315 } 6316 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6317 // Rule at src/isa/s390x/inst.isle line 2782. 6318 let expr0_0 = ALUOp::OrrNot64; 6319 return Some(expr0_0); 6320 } 6321 return None; 6322 } 6323 6324 // Generated as internal constructor for term or_not_reg. 6325 pub fn constructor_or_not_reg<C: Context>( 6326 ctx: &mut C, 6327 arg0: Type, 6328 arg1: Reg, 6329 arg2: Reg, 6330 ) -> Option<Reg> { 6331 let pattern0_0 = arg0; 6332 let pattern1_0 = arg1; 6333 let pattern2_0 = arg2; 6334 // Rule at src/isa/s390x/inst.isle line 2785. 6335 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6336 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6337 return Some(expr1_0); 6338 } 6339 6340 // Generated as internal constructor for term aluop_xor_not. 6341 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6342 let pattern0_0 = arg0; 6343 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6344 // Rule at src/isa/s390x/inst.isle line 2791. 6345 let expr0_0 = ALUOp::XorNot32; 6346 return Some(expr0_0); 6347 } 6348 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6349 // Rule at src/isa/s390x/inst.isle line 2792. 6350 let expr0_0 = ALUOp::XorNot64; 6351 return Some(expr0_0); 6352 } 6353 return None; 6354 } 6355 6356 // Generated as internal constructor for term xor_not_reg. 6357 pub fn constructor_xor_not_reg<C: Context>( 6358 ctx: &mut C, 6359 arg0: Type, 6360 arg1: Reg, 6361 arg2: Reg, 6362 ) -> Option<Reg> { 6363 let pattern0_0 = arg0; 6364 let pattern1_0 = arg1; 6365 let pattern2_0 = arg2; 6366 // Rule at src/isa/s390x/inst.isle line 2795. 6367 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6368 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6369 return Some(expr1_0); 6370 } 6371 6372 // Generated as internal constructor for term unaryop_abs. 6373 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6374 let pattern0_0 = arg0; 6375 if pattern0_0 == I32 { 6376 // Rule at src/isa/s390x/inst.isle line 2801. 6377 let expr0_0 = UnaryOp::Abs32; 6378 return Some(expr0_0); 6379 } 6380 if pattern0_0 == I64 { 6381 // Rule at src/isa/s390x/inst.isle line 2802. 6382 let expr0_0 = UnaryOp::Abs64; 6383 return Some(expr0_0); 6384 } 6385 return None; 6386 } 6387 6388 // Generated as internal constructor for term unaryop_abs_sext32. 6389 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6390 let pattern0_0 = arg0; 6391 if pattern0_0 == I64 { 6392 // Rule at src/isa/s390x/inst.isle line 2805. 6393 let expr0_0 = UnaryOp::Abs64Ext32; 6394 return Some(expr0_0); 6395 } 6396 return None; 6397 } 6398 6399 // Generated as internal constructor for term abs_reg. 6400 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6401 let pattern0_0 = arg0; 6402 let pattern1_0 = arg1; 6403 // Rule at src/isa/s390x/inst.isle line 2808. 6404 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6405 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6406 return Some(expr1_0); 6407 } 6408 6409 // Generated as internal constructor for term abs_reg_sext32. 6410 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6411 let pattern0_0 = arg0; 6412 let pattern1_0 = arg1; 6413 // Rule at src/isa/s390x/inst.isle line 2811. 6414 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6415 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6416 return Some(expr1_0); 6417 } 6418 6419 // Generated as internal constructor for term unaryop_neg. 6420 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6421 let pattern0_0 = arg0; 6422 if pattern0_0 == I8 { 6423 // Rule at src/isa/s390x/inst.isle line 2817. 6424 let expr0_0 = UnaryOp::Neg32; 6425 return Some(expr0_0); 6426 } 6427 if pattern0_0 == I16 { 6428 // Rule at src/isa/s390x/inst.isle line 2818. 6429 let expr0_0 = UnaryOp::Neg32; 6430 return Some(expr0_0); 6431 } 6432 if pattern0_0 == I32 { 6433 // Rule at src/isa/s390x/inst.isle line 2819. 6434 let expr0_0 = UnaryOp::Neg32; 6435 return Some(expr0_0); 6436 } 6437 if pattern0_0 == I64 { 6438 // Rule at src/isa/s390x/inst.isle line 2820. 6439 let expr0_0 = UnaryOp::Neg64; 6440 return Some(expr0_0); 6441 } 6442 return None; 6443 } 6444 6445 // Generated as internal constructor for term unaryop_neg_sext32. 6446 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6447 let pattern0_0 = arg0; 6448 if pattern0_0 == I64 { 6449 // Rule at src/isa/s390x/inst.isle line 2823. 6450 let expr0_0 = UnaryOp::Neg64Ext32; 6451 return Some(expr0_0); 6452 } 6453 return None; 6454 } 6455 6456 // Generated as internal constructor for term neg_reg. 6457 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6458 let pattern0_0 = arg0; 6459 let pattern1_0 = arg1; 6460 // Rule at src/isa/s390x/inst.isle line 2826. 6461 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6462 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6463 return Some(expr1_0); 6464 } 6465 6466 // Generated as internal constructor for term neg_reg_sext32. 6467 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6468 let pattern0_0 = arg0; 6469 let pattern1_0 = arg1; 6470 // Rule at src/isa/s390x/inst.isle line 2829. 6471 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6472 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6473 return Some(expr1_0); 6474 } 6475 6476 // Generated as internal constructor for term unaryop_bswap. 6477 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6478 let pattern0_0 = arg0; 6479 if pattern0_0 == I32 { 6480 // Rule at src/isa/s390x/inst.isle line 2835. 6481 let expr0_0 = UnaryOp::BSwap32; 6482 return Some(expr0_0); 6483 } 6484 if pattern0_0 == I64 { 6485 // Rule at src/isa/s390x/inst.isle line 2836. 6486 let expr0_0 = UnaryOp::BSwap64; 6487 return Some(expr0_0); 6488 } 6489 return None; 6490 } 6491 6492 // Generated as internal constructor for term bswap_reg. 6493 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6494 let pattern0_0 = arg0; 6495 let pattern1_0 = arg1; 6496 // Rule at src/isa/s390x/inst.isle line 2839. 6497 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6498 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6499 return Some(expr1_0); 6500 } 6501 6502 // Generated as internal constructor for term push_bswap_reg. 6503 pub fn constructor_push_bswap_reg<C: Context>( 6504 ctx: &mut C, 6505 arg0: &VecMInstBuilder, 6506 arg1: Type, 6507 arg2: WritableReg, 6508 arg3: Reg, 6509 ) -> Option<Reg> { 6510 let pattern0_0 = arg0; 6511 let pattern1_0 = arg1; 6512 let pattern2_0 = arg2; 6513 let pattern3_0 = arg3; 6514 // Rule at src/isa/s390x/inst.isle line 2842. 6515 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6516 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6517 return Some(expr1_0); 6518 } 6519 6520 // Generated as internal constructor for term shiftop_rot. 6521 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6522 let pattern0_0 = arg0; 6523 if pattern0_0 == I32 { 6524 // Rule at src/isa/s390x/inst.isle line 2848. 6525 let expr0_0 = ShiftOp::RotL32; 6526 return Some(expr0_0); 6527 } 6528 if pattern0_0 == I64 { 6529 // Rule at src/isa/s390x/inst.isle line 2849. 6530 let expr0_0 = ShiftOp::RotL64; 6531 return Some(expr0_0); 6532 } 6533 return None; 6534 } 6535 6536 // Generated as internal constructor for term rot_reg. 6537 pub fn constructor_rot_reg<C: Context>( 6538 ctx: &mut C, 6539 arg0: Type, 6540 arg1: Reg, 6541 arg2: Reg, 6542 ) -> Option<Reg> { 6543 let pattern0_0 = arg0; 6544 let pattern1_0 = arg1; 6545 let pattern2_0 = arg2; 6546 // Rule at src/isa/s390x/inst.isle line 2852. 6547 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6548 let expr1_0: u8 = 0; 6549 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6550 return Some(expr2_0); 6551 } 6552 6553 // Generated as internal constructor for term rot_imm. 6554 pub fn constructor_rot_imm<C: Context>( 6555 ctx: &mut C, 6556 arg0: Type, 6557 arg1: Reg, 6558 arg2: u8, 6559 ) -> Option<Reg> { 6560 let pattern0_0 = arg0; 6561 let pattern1_0 = arg1; 6562 let pattern2_0 = arg2; 6563 // Rule at src/isa/s390x/inst.isle line 2856. 6564 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6565 let expr1_0 = C::zero_reg(ctx); 6566 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6567 return Some(expr2_0); 6568 } 6569 6570 // Generated as internal constructor for term rot_imm_reg. 6571 pub fn constructor_rot_imm_reg<C: Context>( 6572 ctx: &mut C, 6573 arg0: Type, 6574 arg1: Reg, 6575 arg2: u8, 6576 arg3: Reg, 6577 ) -> Option<Reg> { 6578 let pattern0_0 = arg0; 6579 let pattern1_0 = arg1; 6580 let pattern2_0 = arg2; 6581 let pattern3_0 = arg3; 6582 // Rule at src/isa/s390x/inst.isle line 2860. 6583 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6584 let expr1_0 = constructor_shift_rr( 6585 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6586 )?; 6587 return Some(expr1_0); 6588 } 6589 6590 // Generated as internal constructor for term push_rot_imm_reg. 6591 pub fn constructor_push_rot_imm_reg<C: Context>( 6592 ctx: &mut C, 6593 arg0: &VecMInstBuilder, 6594 arg1: Type, 6595 arg2: WritableReg, 6596 arg3: Reg, 6597 arg4: u8, 6598 arg5: Reg, 6599 ) -> Option<Reg> { 6600 let pattern0_0 = arg0; 6601 let pattern1_0 = arg1; 6602 let pattern2_0 = arg2; 6603 let pattern3_0 = arg3; 6604 let pattern4_0 = arg4; 6605 let pattern5_0 = arg5; 6606 // Rule at src/isa/s390x/inst.isle line 2864. 6607 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6608 let expr1_0 = constructor_push_shift( 6609 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6610 )?; 6611 return Some(expr1_0); 6612 } 6613 6614 // Generated as internal constructor for term shiftop_lshl. 6615 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6616 let pattern0_0 = arg0; 6617 if pattern0_0 == I8 { 6618 // Rule at src/isa/s390x/inst.isle line 2871. 6619 let expr0_0 = ShiftOp::LShL32; 6620 return Some(expr0_0); 6621 } 6622 if pattern0_0 == I16 { 6623 // Rule at src/isa/s390x/inst.isle line 2872. 6624 let expr0_0 = ShiftOp::LShL32; 6625 return Some(expr0_0); 6626 } 6627 if pattern0_0 == I32 { 6628 // Rule at src/isa/s390x/inst.isle line 2873. 6629 let expr0_0 = ShiftOp::LShL32; 6630 return Some(expr0_0); 6631 } 6632 if pattern0_0 == I64 { 6633 // Rule at src/isa/s390x/inst.isle line 2874. 6634 let expr0_0 = ShiftOp::LShL64; 6635 return Some(expr0_0); 6636 } 6637 return None; 6638 } 6639 6640 // Generated as internal constructor for term lshl_reg. 6641 pub fn constructor_lshl_reg<C: Context>( 6642 ctx: &mut C, 6643 arg0: Type, 6644 arg1: Reg, 6645 arg2: Reg, 6646 ) -> Option<Reg> { 6647 let pattern0_0 = arg0; 6648 let pattern1_0 = arg1; 6649 let pattern2_0 = arg2; 6650 // Rule at src/isa/s390x/inst.isle line 2877. 6651 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6652 let expr1_0: u8 = 0; 6653 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6654 return Some(expr2_0); 6655 } 6656 6657 // Generated as internal constructor for term lshl_imm. 6658 pub fn constructor_lshl_imm<C: Context>( 6659 ctx: &mut C, 6660 arg0: Type, 6661 arg1: Reg, 6662 arg2: u8, 6663 ) -> Option<Reg> { 6664 let pattern0_0 = arg0; 6665 let pattern1_0 = arg1; 6666 let pattern2_0 = arg2; 6667 // Rule at src/isa/s390x/inst.isle line 2881. 6668 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6669 let expr1_0 = C::zero_reg(ctx); 6670 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6671 return Some(expr2_0); 6672 } 6673 6674 // Generated as internal constructor for term shiftop_lshr. 6675 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6676 let pattern0_0 = arg0; 6677 if pattern0_0 == I32 { 6678 // Rule at src/isa/s390x/inst.isle line 2888. 6679 let expr0_0 = ShiftOp::LShR32; 6680 return Some(expr0_0); 6681 } 6682 if pattern0_0 == I64 { 6683 // Rule at src/isa/s390x/inst.isle line 2889. 6684 let expr0_0 = ShiftOp::LShR64; 6685 return Some(expr0_0); 6686 } 6687 return None; 6688 } 6689 6690 // Generated as internal constructor for term lshr_reg. 6691 pub fn constructor_lshr_reg<C: Context>( 6692 ctx: &mut C, 6693 arg0: Type, 6694 arg1: Reg, 6695 arg2: Reg, 6696 ) -> Option<Reg> { 6697 let pattern0_0 = arg0; 6698 let pattern1_0 = arg1; 6699 let pattern2_0 = arg2; 6700 // Rule at src/isa/s390x/inst.isle line 2892. 6701 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6702 let expr1_0: u8 = 0; 6703 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6704 return Some(expr2_0); 6705 } 6706 6707 // Generated as internal constructor for term lshr_imm. 6708 pub fn constructor_lshr_imm<C: Context>( 6709 ctx: &mut C, 6710 arg0: Type, 6711 arg1: Reg, 6712 arg2: u8, 6713 ) -> Option<Reg> { 6714 let pattern0_0 = arg0; 6715 let pattern1_0 = arg1; 6716 let pattern2_0 = arg2; 6717 // Rule at src/isa/s390x/inst.isle line 2896. 6718 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6719 let expr1_0 = C::zero_reg(ctx); 6720 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6721 return Some(expr2_0); 6722 } 6723 6724 // Generated as internal constructor for term shiftop_ashr. 6725 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6726 let pattern0_0 = arg0; 6727 if pattern0_0 == I32 { 6728 // Rule at src/isa/s390x/inst.isle line 2903. 6729 let expr0_0 = ShiftOp::AShR32; 6730 return Some(expr0_0); 6731 } 6732 if pattern0_0 == I64 { 6733 // Rule at src/isa/s390x/inst.isle line 2904. 6734 let expr0_0 = ShiftOp::AShR64; 6735 return Some(expr0_0); 6736 } 6737 return None; 6738 } 6739 6740 // Generated as internal constructor for term ashr_reg. 6741 pub fn constructor_ashr_reg<C: Context>( 6742 ctx: &mut C, 6743 arg0: Type, 6744 arg1: Reg, 6745 arg2: Reg, 6746 ) -> Option<Reg> { 6747 let pattern0_0 = arg0; 6748 let pattern1_0 = arg1; 6749 let pattern2_0 = arg2; 6750 // Rule at src/isa/s390x/inst.isle line 2907. 6751 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6752 let expr1_0: u8 = 0; 6753 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6754 return Some(expr2_0); 6755 } 6756 6757 // Generated as internal constructor for term ashr_imm. 6758 pub fn constructor_ashr_imm<C: Context>( 6759 ctx: &mut C, 6760 arg0: Type, 6761 arg1: Reg, 6762 arg2: u8, 6763 ) -> Option<Reg> { 6764 let pattern0_0 = arg0; 6765 let pattern1_0 = arg1; 6766 let pattern2_0 = arg2; 6767 // Rule at src/isa/s390x/inst.isle line 2911. 6768 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6769 let expr1_0 = C::zero_reg(ctx); 6770 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6771 return Some(expr2_0); 6772 } 6773 6774 // Generated as internal constructor for term popcnt_byte. 6775 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6776 let pattern0_0 = arg0; 6777 // Rule at src/isa/s390x/inst.isle line 2918. 6778 let expr0_0: Type = I64; 6779 let expr1_0 = UnaryOp::PopcntByte; 6780 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6781 return Some(expr2_0); 6782 } 6783 6784 // Generated as internal constructor for term popcnt_reg. 6785 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6786 let pattern0_0 = arg0; 6787 // Rule at src/isa/s390x/inst.isle line 2921. 6788 let expr0_0: Type = I64; 6789 let expr1_0 = UnaryOp::PopcntReg; 6790 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6791 return Some(expr2_0); 6792 } 6793 6794 // Generated as internal constructor for term atomic_rmw_and. 6795 pub fn constructor_atomic_rmw_and<C: Context>( 6796 ctx: &mut C, 6797 arg0: Type, 6798 arg1: Reg, 6799 arg2: &MemArg, 6800 ) -> Option<Reg> { 6801 let pattern0_0 = arg0; 6802 if pattern0_0 == I32 { 6803 let pattern2_0 = arg1; 6804 let pattern3_0 = arg2; 6805 // Rule at src/isa/s390x/inst.isle line 2927. 6806 let expr0_0: Type = I32; 6807 let expr1_0 = ALUOp::And32; 6808 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6809 return Some(expr2_0); 6810 } 6811 if pattern0_0 == I64 { 6812 let pattern2_0 = arg1; 6813 let pattern3_0 = arg2; 6814 // Rule at src/isa/s390x/inst.isle line 2928. 6815 let expr0_0: Type = I64; 6816 let expr1_0 = ALUOp::And64; 6817 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6818 return Some(expr2_0); 6819 } 6820 return None; 6821 } 6822 6823 // Generated as internal constructor for term atomic_rmw_or. 6824 pub fn constructor_atomic_rmw_or<C: Context>( 6825 ctx: &mut C, 6826 arg0: Type, 6827 arg1: Reg, 6828 arg2: &MemArg, 6829 ) -> Option<Reg> { 6830 let pattern0_0 = arg0; 6831 if pattern0_0 == I32 { 6832 let pattern2_0 = arg1; 6833 let pattern3_0 = arg2; 6834 // Rule at src/isa/s390x/inst.isle line 2931. 6835 let expr0_0: Type = I32; 6836 let expr1_0 = ALUOp::Orr32; 6837 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6838 return Some(expr2_0); 6839 } 6840 if pattern0_0 == I64 { 6841 let pattern2_0 = arg1; 6842 let pattern3_0 = arg2; 6843 // Rule at src/isa/s390x/inst.isle line 2932. 6844 let expr0_0: Type = I64; 6845 let expr1_0 = ALUOp::Orr64; 6846 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6847 return Some(expr2_0); 6848 } 6849 return None; 6850 } 6851 6852 // Generated as internal constructor for term atomic_rmw_xor. 6853 pub fn constructor_atomic_rmw_xor<C: Context>( 6854 ctx: &mut C, 6855 arg0: Type, 6856 arg1: Reg, 6857 arg2: &MemArg, 6858 ) -> Option<Reg> { 6859 let pattern0_0 = arg0; 6860 if pattern0_0 == I32 { 6861 let pattern2_0 = arg1; 6862 let pattern3_0 = arg2; 6863 // Rule at src/isa/s390x/inst.isle line 2935. 6864 let expr0_0: Type = I32; 6865 let expr1_0 = ALUOp::Xor32; 6866 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6867 return Some(expr2_0); 6868 } 6869 if pattern0_0 == I64 { 6870 let pattern2_0 = arg1; 6871 let pattern3_0 = arg2; 6872 // Rule at src/isa/s390x/inst.isle line 2936. 6873 let expr0_0: Type = I64; 6874 let expr1_0 = ALUOp::Xor64; 6875 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6876 return Some(expr2_0); 6877 } 6878 return None; 6879 } 6880 6881 // Generated as internal constructor for term atomic_rmw_add. 6882 pub fn constructor_atomic_rmw_add<C: Context>( 6883 ctx: &mut C, 6884 arg0: Type, 6885 arg1: Reg, 6886 arg2: &MemArg, 6887 ) -> Option<Reg> { 6888 let pattern0_0 = arg0; 6889 if pattern0_0 == I32 { 6890 let pattern2_0 = arg1; 6891 let pattern3_0 = arg2; 6892 // Rule at src/isa/s390x/inst.isle line 2939. 6893 let expr0_0: Type = I32; 6894 let expr1_0 = ALUOp::Add32; 6895 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6896 return Some(expr2_0); 6897 } 6898 if pattern0_0 == I64 { 6899 let pattern2_0 = arg1; 6900 let pattern3_0 = arg2; 6901 // Rule at src/isa/s390x/inst.isle line 2940. 6902 let expr0_0: Type = I64; 6903 let expr1_0 = ALUOp::Add64; 6904 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6905 return Some(expr2_0); 6906 } 6907 return None; 6908 } 6909 6910 // Generated as internal constructor for term atomic_cas_impl. 6911 pub fn constructor_atomic_cas_impl<C: Context>( 6912 ctx: &mut C, 6913 arg0: Type, 6914 arg1: Reg, 6915 arg2: Reg, 6916 arg3: &MemArg, 6917 ) -> Option<Reg> { 6918 let pattern0_0 = arg0; 6919 if pattern0_0 == I32 { 6920 let pattern2_0 = arg1; 6921 let pattern3_0 = arg2; 6922 let pattern4_0 = arg3; 6923 // Rule at src/isa/s390x/inst.isle line 2946. 6924 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6925 return Some(expr0_0); 6926 } 6927 if pattern0_0 == I64 { 6928 let pattern2_0 = arg1; 6929 let pattern3_0 = arg2; 6930 let pattern4_0 = arg3; 6931 // Rule at src/isa/s390x/inst.isle line 2947. 6932 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6933 return Some(expr0_0); 6934 } 6935 return None; 6936 } 6937 6938 // Generated as internal constructor for term push_atomic_cas. 6939 pub fn constructor_push_atomic_cas<C: Context>( 6940 ctx: &mut C, 6941 arg0: &VecMInstBuilder, 6942 arg1: Type, 6943 arg2: WritableReg, 6944 arg3: Reg, 6945 arg4: &MemArg, 6946 ) -> Option<Reg> { 6947 let pattern0_0 = arg0; 6948 let pattern1_0 = arg1; 6949 if pattern1_0 == I32 { 6950 let pattern3_0 = arg2; 6951 let pattern4_0 = arg3; 6952 let pattern5_0 = arg4; 6953 // Rule at src/isa/s390x/inst.isle line 2950. 6954 let expr0_0 = 6955 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6956 return Some(expr0_0); 6957 } 6958 if pattern1_0 == I64 { 6959 let pattern3_0 = arg2; 6960 let pattern4_0 = arg3; 6961 let pattern5_0 = arg4; 6962 // Rule at src/isa/s390x/inst.isle line 2951. 6963 let expr0_0 = 6964 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6965 return Some(expr0_0); 6966 } 6967 return None; 6968 } 6969 6970 // Generated as internal constructor for term fpuop2_add. 6971 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6972 let pattern0_0 = arg0; 6973 if pattern0_0 == F32 { 6974 // Rule at src/isa/s390x/inst.isle line 2957. 6975 let expr0_0 = FPUOp2::Add32; 6976 return Some(expr0_0); 6977 } 6978 if pattern0_0 == F64 { 6979 // Rule at src/isa/s390x/inst.isle line 2958. 6980 let expr0_0 = FPUOp2::Add64; 6981 return Some(expr0_0); 6982 } 6983 return None; 6984 } 6985 6986 // Generated as internal constructor for term fadd_reg. 6987 pub fn constructor_fadd_reg<C: Context>( 6988 ctx: &mut C, 6989 arg0: Type, 6990 arg1: Reg, 6991 arg2: Reg, 6992 ) -> Option<Reg> { 6993 let pattern0_0 = arg0; 6994 let pattern1_0 = arg1; 6995 let pattern2_0 = arg2; 6996 // Rule at src/isa/s390x/inst.isle line 2961. 6997 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6998 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6999 return Some(expr1_0); 7000 } 7001 7002 // Generated as internal constructor for term fpuop2_sub. 7003 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7004 let pattern0_0 = arg0; 7005 if pattern0_0 == F32 { 7006 // Rule at src/isa/s390x/inst.isle line 2967. 7007 let expr0_0 = FPUOp2::Sub32; 7008 return Some(expr0_0); 7009 } 7010 if pattern0_0 == F64 { 7011 // Rule at src/isa/s390x/inst.isle line 2968. 7012 let expr0_0 = FPUOp2::Sub64; 7013 return Some(expr0_0); 7014 } 7015 return None; 7016 } 7017 7018 // Generated as internal constructor for term fsub_reg. 7019 pub fn constructor_fsub_reg<C: Context>( 7020 ctx: &mut C, 7021 arg0: Type, 7022 arg1: Reg, 7023 arg2: Reg, 7024 ) -> Option<Reg> { 7025 let pattern0_0 = arg0; 7026 let pattern1_0 = arg1; 7027 let pattern2_0 = arg2; 7028 // Rule at src/isa/s390x/inst.isle line 2971. 7029 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7030 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7031 return Some(expr1_0); 7032 } 7033 7034 // Generated as internal constructor for term fpuop2_mul. 7035 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7036 let pattern0_0 = arg0; 7037 if pattern0_0 == F32 { 7038 // Rule at src/isa/s390x/inst.isle line 2977. 7039 let expr0_0 = FPUOp2::Mul32; 7040 return Some(expr0_0); 7041 } 7042 if pattern0_0 == F64 { 7043 // Rule at src/isa/s390x/inst.isle line 2978. 7044 let expr0_0 = FPUOp2::Mul64; 7045 return Some(expr0_0); 7046 } 7047 return None; 7048 } 7049 7050 // Generated as internal constructor for term fmul_reg. 7051 pub fn constructor_fmul_reg<C: Context>( 7052 ctx: &mut C, 7053 arg0: Type, 7054 arg1: Reg, 7055 arg2: Reg, 7056 ) -> Option<Reg> { 7057 let pattern0_0 = arg0; 7058 let pattern1_0 = arg1; 7059 let pattern2_0 = arg2; 7060 // Rule at src/isa/s390x/inst.isle line 2981. 7061 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7062 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7063 return Some(expr1_0); 7064 } 7065 7066 // Generated as internal constructor for term fpuop2_div. 7067 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7068 let pattern0_0 = arg0; 7069 if pattern0_0 == F32 { 7070 // Rule at src/isa/s390x/inst.isle line 2987. 7071 let expr0_0 = FPUOp2::Div32; 7072 return Some(expr0_0); 7073 } 7074 if pattern0_0 == F64 { 7075 // Rule at src/isa/s390x/inst.isle line 2988. 7076 let expr0_0 = FPUOp2::Div64; 7077 return Some(expr0_0); 7078 } 7079 return None; 7080 } 7081 7082 // Generated as internal constructor for term fdiv_reg. 7083 pub fn constructor_fdiv_reg<C: Context>( 7084 ctx: &mut C, 7085 arg0: Type, 7086 arg1: Reg, 7087 arg2: Reg, 7088 ) -> Option<Reg> { 7089 let pattern0_0 = arg0; 7090 let pattern1_0 = arg1; 7091 let pattern2_0 = arg2; 7092 // Rule at src/isa/s390x/inst.isle line 2991. 7093 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7094 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7095 return Some(expr1_0); 7096 } 7097 7098 // Generated as internal constructor for term fpuop2_min. 7099 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7100 let pattern0_0 = arg0; 7101 if pattern0_0 == F32 { 7102 // Rule at src/isa/s390x/inst.isle line 2997. 7103 let expr0_0 = FPUOp2::Min32; 7104 return Some(expr0_0); 7105 } 7106 if pattern0_0 == F64 { 7107 // Rule at src/isa/s390x/inst.isle line 2998. 7108 let expr0_0 = FPUOp2::Min64; 7109 return Some(expr0_0); 7110 } 7111 return None; 7112 } 7113 7114 // Generated as internal constructor for term fmin_reg. 7115 pub fn constructor_fmin_reg<C: Context>( 7116 ctx: &mut C, 7117 arg0: Type, 7118 arg1: Reg, 7119 arg2: Reg, 7120 ) -> Option<Reg> { 7121 let pattern0_0 = arg0; 7122 let pattern1_0 = arg1; 7123 let pattern2_0 = arg2; 7124 // Rule at src/isa/s390x/inst.isle line 3001. 7125 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7126 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7127 return Some(expr1_0); 7128 } 7129 7130 // Generated as internal constructor for term fpuop2_max. 7131 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7132 let pattern0_0 = arg0; 7133 if pattern0_0 == F32 { 7134 // Rule at src/isa/s390x/inst.isle line 3007. 7135 let expr0_0 = FPUOp2::Max32; 7136 return Some(expr0_0); 7137 } 7138 if pattern0_0 == F64 { 7139 // Rule at src/isa/s390x/inst.isle line 3008. 7140 let expr0_0 = FPUOp2::Max64; 7141 return Some(expr0_0); 7142 } 7143 return None; 7144 } 7145 7146 // Generated as internal constructor for term fmax_reg. 7147 pub fn constructor_fmax_reg<C: Context>( 7148 ctx: &mut C, 7149 arg0: Type, 7150 arg1: Reg, 7151 arg2: Reg, 7152 ) -> Option<Reg> { 7153 let pattern0_0 = arg0; 7154 let pattern1_0 = arg1; 7155 let pattern2_0 = arg2; 7156 // Rule at src/isa/s390x/inst.isle line 3011. 7157 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7158 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7159 return Some(expr1_0); 7160 } 7161 7162 // Generated as internal constructor for term fpuop3_fma. 7163 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7164 let pattern0_0 = arg0; 7165 if pattern0_0 == F32 { 7166 // Rule at src/isa/s390x/inst.isle line 3017. 7167 let expr0_0 = FPUOp3::MAdd32; 7168 return Some(expr0_0); 7169 } 7170 if pattern0_0 == F64 { 7171 // Rule at src/isa/s390x/inst.isle line 3018. 7172 let expr0_0 = FPUOp3::MAdd64; 7173 return Some(expr0_0); 7174 } 7175 return None; 7176 } 7177 7178 // Generated as internal constructor for term fma_reg. 7179 pub fn constructor_fma_reg<C: Context>( 7180 ctx: &mut C, 7181 arg0: Type, 7182 arg1: Reg, 7183 arg2: Reg, 7184 arg3: Reg, 7185 ) -> Option<Reg> { 7186 let pattern0_0 = arg0; 7187 let pattern1_0 = arg1; 7188 let pattern2_0 = arg2; 7189 let pattern3_0 = arg3; 7190 // Rule at src/isa/s390x/inst.isle line 3021. 7191 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7192 let expr1_0 = constructor_fpu_rrrr( 7193 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7194 )?; 7195 return Some(expr1_0); 7196 } 7197 7198 // Generated as internal constructor for term fpuop1_sqrt. 7199 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7200 let pattern0_0 = arg0; 7201 if pattern0_0 == F32 { 7202 // Rule at src/isa/s390x/inst.isle line 3027. 7203 let expr0_0 = FPUOp1::Sqrt32; 7204 return Some(expr0_0); 7205 } 7206 if pattern0_0 == F64 { 7207 // Rule at src/isa/s390x/inst.isle line 3028. 7208 let expr0_0 = FPUOp1::Sqrt64; 7209 return Some(expr0_0); 7210 } 7211 return None; 7212 } 7213 7214 // Generated as internal constructor for term sqrt_reg. 7215 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7216 let pattern0_0 = arg0; 7217 let pattern1_0 = arg1; 7218 // Rule at src/isa/s390x/inst.isle line 3031. 7219 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7220 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7221 return Some(expr1_0); 7222 } 7223 7224 // Generated as internal constructor for term fpuop1_neg. 7225 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7226 let pattern0_0 = arg0; 7227 if pattern0_0 == F32 { 7228 // Rule at src/isa/s390x/inst.isle line 3037. 7229 let expr0_0 = FPUOp1::Neg32; 7230 return Some(expr0_0); 7231 } 7232 if pattern0_0 == F64 { 7233 // Rule at src/isa/s390x/inst.isle line 3038. 7234 let expr0_0 = FPUOp1::Neg64; 7235 return Some(expr0_0); 7236 } 7237 return None; 7238 } 7239 7240 // Generated as internal constructor for term fneg_reg. 7241 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7242 let pattern0_0 = arg0; 7243 let pattern1_0 = arg1; 7244 // Rule at src/isa/s390x/inst.isle line 3041. 7245 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7246 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7247 return Some(expr1_0); 7248 } 7249 7250 // Generated as internal constructor for term fpuop1_abs. 7251 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7252 let pattern0_0 = arg0; 7253 if pattern0_0 == F32 { 7254 // Rule at src/isa/s390x/inst.isle line 3047. 7255 let expr0_0 = FPUOp1::Abs32; 7256 return Some(expr0_0); 7257 } 7258 if pattern0_0 == F64 { 7259 // Rule at src/isa/s390x/inst.isle line 3048. 7260 let expr0_0 = FPUOp1::Abs64; 7261 return Some(expr0_0); 7262 } 7263 return None; 7264 } 7265 7266 // Generated as internal constructor for term fabs_reg. 7267 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7268 let pattern0_0 = arg0; 7269 let pattern1_0 = arg1; 7270 // Rule at src/isa/s390x/inst.isle line 3051. 7271 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7272 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7273 return Some(expr1_0); 7274 } 7275 7276 // Generated as internal constructor for term fpuroundmode_ceil. 7277 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7278 let pattern0_0 = arg0; 7279 if pattern0_0 == F32 { 7280 // Rule at src/isa/s390x/inst.isle line 3057. 7281 let expr0_0 = FpuRoundMode::Plus32; 7282 return Some(expr0_0); 7283 } 7284 if pattern0_0 == F64 { 7285 // Rule at src/isa/s390x/inst.isle line 3058. 7286 let expr0_0 = FpuRoundMode::Plus64; 7287 return Some(expr0_0); 7288 } 7289 return None; 7290 } 7291 7292 // Generated as internal constructor for term ceil_reg. 7293 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7294 let pattern0_0 = arg0; 7295 let pattern1_0 = arg1; 7296 // Rule at src/isa/s390x/inst.isle line 3061. 7297 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7298 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7299 return Some(expr1_0); 7300 } 7301 7302 // Generated as internal constructor for term fpuroundmode_floor. 7303 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7304 let pattern0_0 = arg0; 7305 if pattern0_0 == F32 { 7306 // Rule at src/isa/s390x/inst.isle line 3067. 7307 let expr0_0 = FpuRoundMode::Minus32; 7308 return Some(expr0_0); 7309 } 7310 if pattern0_0 == F64 { 7311 // Rule at src/isa/s390x/inst.isle line 3068. 7312 let expr0_0 = FpuRoundMode::Minus64; 7313 return Some(expr0_0); 7314 } 7315 return None; 7316 } 7317 7318 // Generated as internal constructor for term floor_reg. 7319 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7320 let pattern0_0 = arg0; 7321 let pattern1_0 = arg1; 7322 // Rule at src/isa/s390x/inst.isle line 3071. 7323 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7324 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7325 return Some(expr1_0); 7326 } 7327 7328 // Generated as internal constructor for term fpuroundmode_trunc. 7329 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7330 let pattern0_0 = arg0; 7331 if pattern0_0 == F32 { 7332 // Rule at src/isa/s390x/inst.isle line 3077. 7333 let expr0_0 = FpuRoundMode::Zero32; 7334 return Some(expr0_0); 7335 } 7336 if pattern0_0 == F64 { 7337 // Rule at src/isa/s390x/inst.isle line 3078. 7338 let expr0_0 = FpuRoundMode::Zero64; 7339 return Some(expr0_0); 7340 } 7341 return None; 7342 } 7343 7344 // Generated as internal constructor for term trunc_reg. 7345 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7346 let pattern0_0 = arg0; 7347 let pattern1_0 = arg1; 7348 // Rule at src/isa/s390x/inst.isle line 3081. 7349 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7350 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7351 return Some(expr1_0); 7352 } 7353 7354 // Generated as internal constructor for term fpuroundmode_nearest. 7355 pub fn constructor_fpuroundmode_nearest<C: Context>( 7356 ctx: &mut C, 7357 arg0: Type, 7358 ) -> Option<FpuRoundMode> { 7359 let pattern0_0 = arg0; 7360 if pattern0_0 == F32 { 7361 // Rule at src/isa/s390x/inst.isle line 3087. 7362 let expr0_0 = FpuRoundMode::Nearest32; 7363 return Some(expr0_0); 7364 } 7365 if pattern0_0 == F64 { 7366 // Rule at src/isa/s390x/inst.isle line 3088. 7367 let expr0_0 = FpuRoundMode::Nearest64; 7368 return Some(expr0_0); 7369 } 7370 return None; 7371 } 7372 7373 // Generated as internal constructor for term nearest_reg. 7374 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7375 let pattern0_0 = arg0; 7376 let pattern1_0 = arg1; 7377 // Rule at src/isa/s390x/inst.isle line 3091. 7378 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7379 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7380 return Some(expr1_0); 7381 } 7382 7383 // Generated as internal constructor for term fpuop1_promote. 7384 pub fn constructor_fpuop1_promote<C: Context>( 7385 ctx: &mut C, 7386 arg0: Type, 7387 arg1: Type, 7388 ) -> Option<FPUOp1> { 7389 let pattern0_0 = arg0; 7390 if pattern0_0 == F64 { 7391 let pattern2_0 = arg1; 7392 if pattern2_0 == F32 { 7393 // Rule at src/isa/s390x/inst.isle line 3097. 7394 let expr0_0 = FPUOp1::Cvt32To64; 7395 return Some(expr0_0); 7396 } 7397 } 7398 return None; 7399 } 7400 7401 // Generated as internal constructor for term fpromote_reg. 7402 pub fn constructor_fpromote_reg<C: Context>( 7403 ctx: &mut C, 7404 arg0: Type, 7405 arg1: Type, 7406 arg2: Reg, 7407 ) -> Option<Reg> { 7408 let pattern0_0 = arg0; 7409 let pattern1_0 = arg1; 7410 let pattern2_0 = arg2; 7411 // Rule at src/isa/s390x/inst.isle line 3100. 7412 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7413 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7414 return Some(expr1_0); 7415 } 7416 7417 // Generated as internal constructor for term fpuop1_demote. 7418 pub fn constructor_fpuop1_demote<C: Context>( 7419 ctx: &mut C, 7420 arg0: Type, 7421 arg1: Type, 7422 ) -> Option<FPUOp1> { 7423 let pattern0_0 = arg0; 7424 if pattern0_0 == F32 { 7425 let pattern2_0 = arg1; 7426 if pattern2_0 == F64 { 7427 // Rule at src/isa/s390x/inst.isle line 3107. 7428 let expr0_0 = FPUOp1::Cvt64To32; 7429 return Some(expr0_0); 7430 } 7431 } 7432 return None; 7433 } 7434 7435 // Generated as internal constructor for term fdemote_reg. 7436 pub fn constructor_fdemote_reg<C: Context>( 7437 ctx: &mut C, 7438 arg0: Type, 7439 arg1: Type, 7440 arg2: Reg, 7441 ) -> Option<Reg> { 7442 let pattern0_0 = arg0; 7443 let pattern1_0 = arg1; 7444 let pattern2_0 = arg2; 7445 // Rule at src/isa/s390x/inst.isle line 3110. 7446 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7447 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7448 return Some(expr1_0); 7449 } 7450 7451 // Generated as internal constructor for term uint_to_fpu_op. 7452 pub fn constructor_uint_to_fpu_op<C: Context>( 7453 ctx: &mut C, 7454 arg0: Type, 7455 arg1: Type, 7456 ) -> Option<IntToFpuOp> { 7457 let pattern0_0 = arg0; 7458 if pattern0_0 == F32 { 7459 let pattern2_0 = arg1; 7460 if pattern2_0 == I32 { 7461 // Rule at src/isa/s390x/inst.isle line 3117. 7462 let expr0_0 = IntToFpuOp::U32ToF32; 7463 return Some(expr0_0); 7464 } 7465 if pattern2_0 == I64 { 7466 // Rule at src/isa/s390x/inst.isle line 3119. 7467 let expr0_0 = IntToFpuOp::U64ToF32; 7468 return Some(expr0_0); 7469 } 7470 } 7471 if pattern0_0 == F64 { 7472 let pattern2_0 = arg1; 7473 if pattern2_0 == I32 { 7474 // Rule at src/isa/s390x/inst.isle line 3118. 7475 let expr0_0 = IntToFpuOp::U32ToF64; 7476 return Some(expr0_0); 7477 } 7478 if pattern2_0 == I64 { 7479 // Rule at src/isa/s390x/inst.isle line 3120. 7480 let expr0_0 = IntToFpuOp::U64ToF64; 7481 return Some(expr0_0); 7482 } 7483 } 7484 return None; 7485 } 7486 7487 // Generated as internal constructor for term fcvt_from_uint_reg. 7488 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7489 ctx: &mut C, 7490 arg0: Type, 7491 arg1: Type, 7492 arg2: Reg, 7493 ) -> Option<Reg> { 7494 let pattern0_0 = arg0; 7495 let pattern1_0 = arg1; 7496 let pattern2_0 = arg2; 7497 // Rule at src/isa/s390x/inst.isle line 3123. 7498 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7499 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7500 return Some(expr1_0); 7501 } 7502 7503 // Generated as internal constructor for term sint_to_fpu_op. 7504 pub fn constructor_sint_to_fpu_op<C: Context>( 7505 ctx: &mut C, 7506 arg0: Type, 7507 arg1: Type, 7508 ) -> Option<IntToFpuOp> { 7509 let pattern0_0 = arg0; 7510 if pattern0_0 == F32 { 7511 let pattern2_0 = arg1; 7512 if pattern2_0 == I32 { 7513 // Rule at src/isa/s390x/inst.isle line 3130. 7514 let expr0_0 = IntToFpuOp::I32ToF32; 7515 return Some(expr0_0); 7516 } 7517 if pattern2_0 == I64 { 7518 // Rule at src/isa/s390x/inst.isle line 3132. 7519 let expr0_0 = IntToFpuOp::I64ToF32; 7520 return Some(expr0_0); 7521 } 7522 } 7523 if pattern0_0 == F64 { 7524 let pattern2_0 = arg1; 7525 if pattern2_0 == I32 { 7526 // Rule at src/isa/s390x/inst.isle line 3131. 7527 let expr0_0 = IntToFpuOp::I32ToF64; 7528 return Some(expr0_0); 7529 } 7530 if pattern2_0 == I64 { 7531 // Rule at src/isa/s390x/inst.isle line 3133. 7532 let expr0_0 = IntToFpuOp::I64ToF64; 7533 return Some(expr0_0); 7534 } 7535 } 7536 return None; 7537 } 7538 7539 // Generated as internal constructor for term fcvt_from_sint_reg. 7540 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7541 ctx: &mut C, 7542 arg0: Type, 7543 arg1: Type, 7544 arg2: Reg, 7545 ) -> Option<Reg> { 7546 let pattern0_0 = arg0; 7547 let pattern1_0 = arg1; 7548 let pattern2_0 = arg2; 7549 // Rule at src/isa/s390x/inst.isle line 3136. 7550 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7551 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7552 return Some(expr1_0); 7553 } 7554 7555 // Generated as internal constructor for term fpu_to_uint_op. 7556 pub fn constructor_fpu_to_uint_op<C: Context>( 7557 ctx: &mut C, 7558 arg0: Type, 7559 arg1: Type, 7560 ) -> Option<FpuToIntOp> { 7561 let pattern0_0 = arg0; 7562 if pattern0_0 == I32 { 7563 let pattern2_0 = arg1; 7564 if pattern2_0 == F32 { 7565 // Rule at src/isa/s390x/inst.isle line 3143. 7566 let expr0_0 = FpuToIntOp::F32ToU32; 7567 return Some(expr0_0); 7568 } 7569 if pattern2_0 == F64 { 7570 // Rule at src/isa/s390x/inst.isle line 3144. 7571 let expr0_0 = FpuToIntOp::F64ToU32; 7572 return Some(expr0_0); 7573 } 7574 } 7575 if pattern0_0 == I64 { 7576 let pattern2_0 = arg1; 7577 if pattern2_0 == F32 { 7578 // Rule at src/isa/s390x/inst.isle line 3145. 7579 let expr0_0 = FpuToIntOp::F32ToU64; 7580 return Some(expr0_0); 7581 } 7582 if pattern2_0 == F64 { 7583 // Rule at src/isa/s390x/inst.isle line 3146. 7584 let expr0_0 = FpuToIntOp::F64ToU64; 7585 return Some(expr0_0); 7586 } 7587 } 7588 return None; 7589 } 7590 7591 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7592 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7593 ctx: &mut C, 7594 arg0: Type, 7595 arg1: Type, 7596 arg2: Reg, 7597 ) -> Option<ProducesFlags> { 7598 let pattern0_0 = arg0; 7599 let pattern1_0 = arg1; 7600 let pattern2_0 = arg2; 7601 // Rule at src/isa/s390x/inst.isle line 3149. 7602 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7603 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7604 return Some(expr1_0); 7605 } 7606 7607 // Generated as internal constructor for term fcvt_to_uint_reg. 7608 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7609 ctx: &mut C, 7610 arg0: Type, 7611 arg1: Type, 7612 arg2: Reg, 7613 ) -> Option<Reg> { 7614 let pattern0_0 = arg0; 7615 let pattern1_0 = arg1; 7616 let pattern2_0 = arg2; 7617 // Rule at src/isa/s390x/inst.isle line 3153. 7618 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7619 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7620 return Some(expr1_0); 7621 } 7622 7623 // Generated as internal constructor for term fpu_to_sint_op. 7624 pub fn constructor_fpu_to_sint_op<C: Context>( 7625 ctx: &mut C, 7626 arg0: Type, 7627 arg1: Type, 7628 ) -> Option<FpuToIntOp> { 7629 let pattern0_0 = arg0; 7630 if pattern0_0 == I32 { 7631 let pattern2_0 = arg1; 7632 if pattern2_0 == F32 { 7633 // Rule at src/isa/s390x/inst.isle line 3160. 7634 let expr0_0 = FpuToIntOp::F32ToI32; 7635 return Some(expr0_0); 7636 } 7637 if pattern2_0 == F64 { 7638 // Rule at src/isa/s390x/inst.isle line 3161. 7639 let expr0_0 = FpuToIntOp::F64ToI32; 7640 return Some(expr0_0); 7641 } 7642 } 7643 if pattern0_0 == I64 { 7644 let pattern2_0 = arg1; 7645 if pattern2_0 == F32 { 7646 // Rule at src/isa/s390x/inst.isle line 3162. 7647 let expr0_0 = FpuToIntOp::F32ToI64; 7648 return Some(expr0_0); 7649 } 7650 if pattern2_0 == F64 { 7651 // Rule at src/isa/s390x/inst.isle line 3163. 7652 let expr0_0 = FpuToIntOp::F64ToI64; 7653 return Some(expr0_0); 7654 } 7655 } 7656 return None; 7657 } 7658 7659 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7660 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7661 ctx: &mut C, 7662 arg0: Type, 7663 arg1: Type, 7664 arg2: Reg, 7665 ) -> Option<ProducesFlags> { 7666 let pattern0_0 = arg0; 7667 let pattern1_0 = arg1; 7668 let pattern2_0 = arg2; 7669 // Rule at src/isa/s390x/inst.isle line 3166. 7670 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7671 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7672 return Some(expr1_0); 7673 } 7674 7675 // Generated as internal constructor for term fcvt_to_sint_reg. 7676 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7677 ctx: &mut C, 7678 arg0: Type, 7679 arg1: Type, 7680 arg2: Reg, 7681 ) -> Option<Reg> { 7682 let pattern0_0 = arg0; 7683 let pattern1_0 = arg1; 7684 let pattern2_0 = arg2; 7685 // Rule at src/isa/s390x/inst.isle line 3170. 7686 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7687 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7688 return Some(expr1_0); 7689 } 7690 7691 // Generated as internal constructor for term cmpop_cmps. 7692 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7693 let pattern0_0 = arg0; 7694 if pattern0_0 == I32 { 7695 // Rule at src/isa/s390x/inst.isle line 3177. 7696 let expr0_0 = CmpOp::CmpS32; 7697 return Some(expr0_0); 7698 } 7699 if pattern0_0 == I64 { 7700 // Rule at src/isa/s390x/inst.isle line 3178. 7701 let expr0_0 = CmpOp::CmpS64; 7702 return Some(expr0_0); 7703 } 7704 return None; 7705 } 7706 7707 // Generated as internal constructor for term cmpop_cmps_sext16. 7708 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7709 let pattern0_0 = arg0; 7710 if pattern0_0 == I32 { 7711 // Rule at src/isa/s390x/inst.isle line 3181. 7712 let expr0_0 = CmpOp::CmpS32Ext16; 7713 return Some(expr0_0); 7714 } 7715 if pattern0_0 == I64 { 7716 // Rule at src/isa/s390x/inst.isle line 3182. 7717 let expr0_0 = CmpOp::CmpS64Ext16; 7718 return Some(expr0_0); 7719 } 7720 return None; 7721 } 7722 7723 // Generated as internal constructor for term cmpop_cmps_sext32. 7724 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7725 let pattern0_0 = arg0; 7726 if pattern0_0 == I64 { 7727 // Rule at src/isa/s390x/inst.isle line 3185. 7728 let expr0_0 = CmpOp::CmpS64Ext32; 7729 return Some(expr0_0); 7730 } 7731 return None; 7732 } 7733 7734 // Generated as internal constructor for term icmps_reg. 7735 pub fn constructor_icmps_reg<C: Context>( 7736 ctx: &mut C, 7737 arg0: Type, 7738 arg1: Reg, 7739 arg2: Reg, 7740 ) -> Option<ProducesFlags> { 7741 let pattern0_0 = arg0; 7742 let pattern1_0 = arg1; 7743 let pattern2_0 = arg2; 7744 // Rule at src/isa/s390x/inst.isle line 3188. 7745 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7746 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7747 return Some(expr1_0); 7748 } 7749 7750 // Generated as internal constructor for term icmps_reg_sext32. 7751 pub fn constructor_icmps_reg_sext32<C: Context>( 7752 ctx: &mut C, 7753 arg0: Type, 7754 arg1: Reg, 7755 arg2: Reg, 7756 ) -> Option<ProducesFlags> { 7757 let pattern0_0 = arg0; 7758 let pattern1_0 = arg1; 7759 let pattern2_0 = arg2; 7760 // Rule at src/isa/s390x/inst.isle line 3191. 7761 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7762 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7763 return Some(expr1_0); 7764 } 7765 7766 // Generated as internal constructor for term icmps_simm16. 7767 pub fn constructor_icmps_simm16<C: Context>( 7768 ctx: &mut C, 7769 arg0: Type, 7770 arg1: Reg, 7771 arg2: i16, 7772 ) -> Option<ProducesFlags> { 7773 let pattern0_0 = arg0; 7774 let pattern1_0 = arg1; 7775 let pattern2_0 = arg2; 7776 // Rule at src/isa/s390x/inst.isle line 3194. 7777 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7778 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7779 return Some(expr1_0); 7780 } 7781 7782 // Generated as internal constructor for term icmps_simm32. 7783 pub fn constructor_icmps_simm32<C: Context>( 7784 ctx: &mut C, 7785 arg0: Type, 7786 arg1: Reg, 7787 arg2: i32, 7788 ) -> Option<ProducesFlags> { 7789 let pattern0_0 = arg0; 7790 let pattern1_0 = arg1; 7791 let pattern2_0 = arg2; 7792 // Rule at src/isa/s390x/inst.isle line 3197. 7793 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7794 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7795 return Some(expr1_0); 7796 } 7797 7798 // Generated as internal constructor for term icmps_mem. 7799 pub fn constructor_icmps_mem<C: Context>( 7800 ctx: &mut C, 7801 arg0: Type, 7802 arg1: Reg, 7803 arg2: &MemArg, 7804 ) -> Option<ProducesFlags> { 7805 let pattern0_0 = arg0; 7806 let pattern1_0 = arg1; 7807 let pattern2_0 = arg2; 7808 // Rule at src/isa/s390x/inst.isle line 3200. 7809 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7810 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7811 return Some(expr1_0); 7812 } 7813 7814 // Generated as internal constructor for term icmps_mem_sext16. 7815 pub fn constructor_icmps_mem_sext16<C: Context>( 7816 ctx: &mut C, 7817 arg0: Type, 7818 arg1: Reg, 7819 arg2: &MemArg, 7820 ) -> Option<ProducesFlags> { 7821 let pattern0_0 = arg0; 7822 let pattern1_0 = arg1; 7823 let pattern2_0 = arg2; 7824 // Rule at src/isa/s390x/inst.isle line 3203. 7825 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7826 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7827 return Some(expr1_0); 7828 } 7829 7830 // Generated as internal constructor for term icmps_mem_sext32. 7831 pub fn constructor_icmps_mem_sext32<C: Context>( 7832 ctx: &mut C, 7833 arg0: Type, 7834 arg1: Reg, 7835 arg2: &MemArg, 7836 ) -> Option<ProducesFlags> { 7837 let pattern0_0 = arg0; 7838 let pattern1_0 = arg1; 7839 let pattern2_0 = arg2; 7840 // Rule at src/isa/s390x/inst.isle line 3206. 7841 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7842 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7843 return Some(expr1_0); 7844 } 7845 7846 // Generated as internal constructor for term cmpop_cmpu. 7847 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7848 let pattern0_0 = arg0; 7849 if pattern0_0 == I32 { 7850 // Rule at src/isa/s390x/inst.isle line 3212. 7851 let expr0_0 = CmpOp::CmpL32; 7852 return Some(expr0_0); 7853 } 7854 if pattern0_0 == I64 { 7855 // Rule at src/isa/s390x/inst.isle line 3213. 7856 let expr0_0 = CmpOp::CmpL64; 7857 return Some(expr0_0); 7858 } 7859 return None; 7860 } 7861 7862 // Generated as internal constructor for term cmpop_cmpu_zext16. 7863 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7864 let pattern0_0 = arg0; 7865 if pattern0_0 == I32 { 7866 // Rule at src/isa/s390x/inst.isle line 3216. 7867 let expr0_0 = CmpOp::CmpL32Ext16; 7868 return Some(expr0_0); 7869 } 7870 if pattern0_0 == I64 { 7871 // Rule at src/isa/s390x/inst.isle line 3217. 7872 let expr0_0 = CmpOp::CmpL64Ext16; 7873 return Some(expr0_0); 7874 } 7875 return None; 7876 } 7877 7878 // Generated as internal constructor for term cmpop_cmpu_zext32. 7879 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7880 let pattern0_0 = arg0; 7881 if pattern0_0 == I64 { 7882 // Rule at src/isa/s390x/inst.isle line 3220. 7883 let expr0_0 = CmpOp::CmpL64Ext32; 7884 return Some(expr0_0); 7885 } 7886 return None; 7887 } 7888 7889 // Generated as internal constructor for term icmpu_reg. 7890 pub fn constructor_icmpu_reg<C: Context>( 7891 ctx: &mut C, 7892 arg0: Type, 7893 arg1: Reg, 7894 arg2: Reg, 7895 ) -> Option<ProducesFlags> { 7896 let pattern0_0 = arg0; 7897 let pattern1_0 = arg1; 7898 let pattern2_0 = arg2; 7899 // Rule at src/isa/s390x/inst.isle line 3223. 7900 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7901 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7902 return Some(expr1_0); 7903 } 7904 7905 // Generated as internal constructor for term icmpu_reg_zext32. 7906 pub fn constructor_icmpu_reg_zext32<C: Context>( 7907 ctx: &mut C, 7908 arg0: Type, 7909 arg1: Reg, 7910 arg2: Reg, 7911 ) -> Option<ProducesFlags> { 7912 let pattern0_0 = arg0; 7913 let pattern1_0 = arg1; 7914 let pattern2_0 = arg2; 7915 // Rule at src/isa/s390x/inst.isle line 3226. 7916 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7917 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7918 return Some(expr1_0); 7919 } 7920 7921 // Generated as internal constructor for term icmpu_uimm32. 7922 pub fn constructor_icmpu_uimm32<C: Context>( 7923 ctx: &mut C, 7924 arg0: Type, 7925 arg1: Reg, 7926 arg2: u32, 7927 ) -> Option<ProducesFlags> { 7928 let pattern0_0 = arg0; 7929 let pattern1_0 = arg1; 7930 let pattern2_0 = arg2; 7931 // Rule at src/isa/s390x/inst.isle line 3229. 7932 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7933 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7934 return Some(expr1_0); 7935 } 7936 7937 // Generated as internal constructor for term icmpu_mem. 7938 pub fn constructor_icmpu_mem<C: Context>( 7939 ctx: &mut C, 7940 arg0: Type, 7941 arg1: Reg, 7942 arg2: &MemArg, 7943 ) -> Option<ProducesFlags> { 7944 let pattern0_0 = arg0; 7945 let pattern1_0 = arg1; 7946 let pattern2_0 = arg2; 7947 // Rule at src/isa/s390x/inst.isle line 3232. 7948 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7949 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7950 return Some(expr1_0); 7951 } 7952 7953 // Generated as internal constructor for term icmpu_mem_zext16. 7954 pub fn constructor_icmpu_mem_zext16<C: Context>( 7955 ctx: &mut C, 7956 arg0: Type, 7957 arg1: Reg, 7958 arg2: &MemArg, 7959 ) -> Option<ProducesFlags> { 7960 let pattern0_0 = arg0; 7961 let pattern1_0 = arg1; 7962 let pattern2_0 = arg2; 7963 // Rule at src/isa/s390x/inst.isle line 3235. 7964 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7965 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7966 return Some(expr1_0); 7967 } 7968 7969 // Generated as internal constructor for term icmpu_mem_zext32. 7970 pub fn constructor_icmpu_mem_zext32<C: Context>( 7971 ctx: &mut C, 7972 arg0: Type, 7973 arg1: Reg, 7974 arg2: &MemArg, 7975 ) -> Option<ProducesFlags> { 7976 let pattern0_0 = arg0; 7977 let pattern1_0 = arg1; 7978 let pattern2_0 = arg2; 7979 // Rule at src/isa/s390x/inst.isle line 3238. 7980 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7981 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7982 return Some(expr1_0); 7983 } 7984 7985 // Generated as internal constructor for term fcmp_reg. 7986 pub fn constructor_fcmp_reg<C: Context>( 7987 ctx: &mut C, 7988 arg0: Type, 7989 arg1: Reg, 7990 arg2: Reg, 7991 ) -> Option<ProducesFlags> { 7992 let pattern0_0 = arg0; 7993 if pattern0_0 == F32 { 7994 let pattern2_0 = arg1; 7995 let pattern3_0 = arg2; 7996 // Rule at src/isa/s390x/inst.isle line 3244. 7997 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7998 return Some(expr0_0); 7999 } 8000 if pattern0_0 == F64 { 8001 let pattern2_0 = arg1; 8002 let pattern3_0 = arg2; 8003 // Rule at src/isa/s390x/inst.isle line 3245. 8004 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 8005 return Some(expr0_0); 8006 } 8007 return None; 8008 } 8009 8010 // Generated as internal constructor for term lower. 8011 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 8012 let pattern0_0 = arg0; 8013 let pattern1_0 = C::inst_data(ctx, pattern0_0); 8014 match &pattern1_0 { 8015 &InstructionData::NullAry { 8016 opcode: ref pattern2_0, 8017 } => { 8018 match pattern2_0 { 8019 &Opcode::Debugtrap => { 8020 // Rule at src/isa/s390x/lower.isle line 2169. 8021 let expr0_0 = constructor_debugtrap_impl(ctx)?; 8022 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8023 return Some(expr1_0); 8024 } 8025 &Opcode::Nop => { 8026 // Rule at src/isa/s390x/lower.isle line 47. 8027 let expr0_0 = C::invalid_reg(ctx); 8028 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8029 return Some(expr1_0); 8030 } 8031 &Opcode::Fence => { 8032 // Rule at src/isa/s390x/lower.isle line 1882. 8033 let expr0_0 = constructor_fence_impl(ctx)?; 8034 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8035 return Some(expr1_0); 8036 } 8037 _ => {} 8038 } 8039 } 8040 &InstructionData::FuncAddr { 8041 opcode: ref pattern2_0, 8042 func_ref: pattern2_1, 8043 } => { 8044 if let &Opcode::FuncAddr = pattern2_0 { 8045 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8046 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8047 // Rule at src/isa/s390x/lower.isle line 1159. 8048 let expr0_0: i32 = 0; 8049 let expr1_0 = C::memflags_trusted(ctx); 8050 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8051 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8052 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8053 return Some(expr4_0); 8054 } 8055 // Rule at src/isa/s390x/lower.isle line 1163. 8056 let expr0_0: i64 = 0; 8057 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8058 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8059 return Some(expr2_0); 8060 } 8061 } 8062 &InstructionData::UnaryGlobalValue { 8063 opcode: ref pattern2_0, 8064 global_value: pattern2_1, 8065 } => { 8066 if let &Opcode::SymbolValue = pattern2_0 { 8067 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8068 C::symbol_value_data(ctx, pattern2_1) 8069 { 8070 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8071 let pattern6_0 = 0; 8072 if let Some(pattern7_0) = 8073 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8074 { 8075 // Rule at src/isa/s390x/lower.isle line 1170. 8076 let expr0_0 = C::memflags_trusted(ctx); 8077 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8078 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8079 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8080 return Some(expr3_0); 8081 } 8082 } 8083 // Rule at src/isa/s390x/lower.isle line 1175. 8084 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8085 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8086 return Some(expr1_0); 8087 } 8088 } 8089 } 8090 &InstructionData::UnaryIeee32 { 8091 opcode: ref pattern2_0, 8092 imm: pattern2_1, 8093 } => { 8094 if let &Opcode::F32const = pattern2_0 { 8095 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8096 // Rule at src/isa/s390x/lower.isle line 29. 8097 let expr0_0: Type = F32; 8098 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8099 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8100 return Some(expr2_0); 8101 } 8102 } 8103 &InstructionData::UnaryIeee64 { 8104 opcode: ref pattern2_0, 8105 imm: pattern2_1, 8106 } => { 8107 if let &Opcode::F64const = pattern2_0 { 8108 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8109 // Rule at src/isa/s390x/lower.isle line 35. 8110 let expr0_0: Type = F64; 8111 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8112 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8113 return Some(expr2_0); 8114 } 8115 } 8116 &InstructionData::Trap { 8117 opcode: ref pattern2_0, 8118 code: ref pattern2_1, 8119 } => { 8120 match pattern2_0 { 8121 &Opcode::Trap => { 8122 // Rule at src/isa/s390x/lower.isle line 2139. 8123 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8124 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8125 return Some(expr1_0); 8126 } 8127 &Opcode::ResumableTrap => { 8128 // Rule at src/isa/s390x/lower.isle line 2145. 8129 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8130 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8131 return Some(expr1_0); 8132 } 8133 _ => {} 8134 } 8135 } 8136 &InstructionData::StoreNoOffset { 8137 opcode: ref pattern2_0, 8138 args: ref pattern2_1, 8139 flags: pattern2_2, 8140 } => { 8141 if let &Opcode::AtomicStore = pattern2_0 { 8142 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8143 let pattern5_0 = C::value_type(ctx, pattern4_0); 8144 if pattern5_0 == I8 { 8145 // Rule at src/isa/s390x/lower.isle line 1863. 8146 let expr0_0 = C::zero_offset(ctx); 8147 let expr1_0 = 8148 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8149 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8150 return Some(expr2_0); 8151 } 8152 if pattern5_0 == I16 { 8153 // Rule at src/isa/s390x/lower.isle line 1867. 8154 let expr0_0 = C::zero_offset(ctx); 8155 let expr1_0 = constructor_istore16_impl( 8156 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8157 )?; 8158 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8159 return Some(expr2_0); 8160 } 8161 if pattern5_0 == I32 { 8162 // Rule at src/isa/s390x/lower.isle line 1871. 8163 let expr0_0 = C::zero_offset(ctx); 8164 let expr1_0 = constructor_istore32_impl( 8165 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8166 )?; 8167 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8168 return Some(expr2_0); 8169 } 8170 if pattern5_0 == I64 { 8171 // Rule at src/isa/s390x/lower.isle line 1875. 8172 let expr0_0 = C::zero_offset(ctx); 8173 let expr1_0 = constructor_istore64_impl( 8174 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8175 )?; 8176 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8177 return Some(expr2_0); 8178 } 8179 } 8180 } 8181 &InstructionData::Store { 8182 opcode: ref pattern2_0, 8183 args: ref pattern2_1, 8184 flags: pattern2_2, 8185 offset: pattern2_3, 8186 } => { 8187 match pattern2_0 { 8188 &Opcode::Store => { 8189 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8190 let pattern5_0 = C::value_type(ctx, pattern4_0); 8191 if pattern5_0 == I8 { 8192 // Rule at src/isa/s390x/lower.isle line 1354. 8193 let expr0_0 = constructor_istore8_impl( 8194 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8195 )?; 8196 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8197 return Some(expr1_0); 8198 } 8199 if pattern5_0 == I16 { 8200 // Rule at src/isa/s390x/lower.isle line 1358. 8201 let expr0_0 = constructor_istore16_impl( 8202 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8203 )?; 8204 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8205 return Some(expr1_0); 8206 } 8207 if pattern5_0 == I32 { 8208 // Rule at src/isa/s390x/lower.isle line 1362. 8209 let expr0_0 = constructor_istore32_impl( 8210 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8211 )?; 8212 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8213 return Some(expr1_0); 8214 } 8215 if pattern5_0 == I64 { 8216 // Rule at src/isa/s390x/lower.isle line 1366. 8217 let expr0_0 = constructor_istore64_impl( 8218 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8219 )?; 8220 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8221 return Some(expr1_0); 8222 } 8223 if pattern5_0 == R64 { 8224 // Rule at src/isa/s390x/lower.isle line 1370. 8225 let expr0_0 = constructor_istore64_impl( 8226 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8227 )?; 8228 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8229 return Some(expr1_0); 8230 } 8231 if pattern5_0 == F32 { 8232 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8233 // Rule at src/isa/s390x/lower.isle line 1374. 8234 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8235 let expr1_0 = 8236 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8237 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8238 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8239 return Some(expr3_0); 8240 } 8241 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8242 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8243 // Rule at src/isa/s390x/lower.isle line 1380. 8244 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8245 let expr1_0 = constructor_lower_address( 8246 ctx, pattern2_2, pattern4_1, pattern2_3, 8247 )?; 8248 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8249 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8250 return Some(expr3_0); 8251 } 8252 } 8253 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8254 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8255 // Rule at src/isa/s390x/lower.isle line 1386. 8256 let expr0_0: Type = I64; 8257 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8258 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8259 let expr3_0: u8 = 32; 8260 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8261 let expr5_0 = constructor_lower_address( 8262 ctx, pattern2_2, pattern4_1, pattern2_3, 8263 )?; 8264 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8265 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8266 return Some(expr7_0); 8267 } 8268 } 8269 } 8270 if pattern5_0 == F64 { 8271 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8272 // Rule at src/isa/s390x/lower.isle line 1392. 8273 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8274 let expr1_0 = 8275 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8276 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8277 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8278 return Some(expr3_0); 8279 } 8280 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8281 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8282 // Rule at src/isa/s390x/lower.isle line 1398. 8283 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8284 let expr1_0 = constructor_lower_address( 8285 ctx, pattern2_2, pattern4_1, pattern2_3, 8286 )?; 8287 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8288 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8289 return Some(expr3_0); 8290 } 8291 } 8292 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8293 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8294 // Rule at src/isa/s390x/lower.isle line 1404. 8295 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8296 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8297 let expr2_0 = constructor_lower_address( 8298 ctx, pattern2_2, pattern4_1, pattern2_3, 8299 )?; 8300 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8301 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8302 return Some(expr4_0); 8303 } 8304 } 8305 } 8306 } 8307 &Opcode::Istore8 => { 8308 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8309 // Rule at src/isa/s390x/lower.isle line 1413. 8310 let expr0_0 = constructor_istore8_impl( 8311 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8312 )?; 8313 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8314 return Some(expr1_0); 8315 } 8316 &Opcode::Istore16 => { 8317 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8318 // Rule at src/isa/s390x/lower.isle line 1431. 8319 let expr0_0 = constructor_istore16_impl( 8320 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8321 )?; 8322 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8323 return Some(expr1_0); 8324 } 8325 &Opcode::Istore32 => { 8326 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8327 // Rule at src/isa/s390x/lower.isle line 1457. 8328 let expr0_0 = constructor_istore32_impl( 8329 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8330 )?; 8331 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8332 return Some(expr1_0); 8333 } 8334 _ => {} 8335 } 8336 } 8337 &InstructionData::Unary { 8338 opcode: ref pattern2_0, 8339 arg: pattern2_1, 8340 } => { 8341 match pattern2_0 { 8342 &Opcode::Copy => { 8343 // Rule at src/isa/s390x/lower.isle line 53. 8344 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8345 return Some(expr0_0); 8346 } 8347 &Opcode::Breduce => { 8348 // Rule at src/isa/s390x/lower.isle line 752. 8349 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8350 return Some(expr0_0); 8351 } 8352 &Opcode::Ireduce => { 8353 // Rule at src/isa/s390x/lower.isle line 596. 8354 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8355 return Some(expr0_0); 8356 } 8357 _ => {} 8358 } 8359 } 8360 &InstructionData::IntCondTrap { 8361 opcode: ref pattern2_0, 8362 arg: pattern2_1, 8363 cond: ref pattern2_2, 8364 code: ref pattern2_3, 8365 } => { 8366 if let &Opcode::Trapif = pattern2_0 { 8367 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8368 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8369 if let &InstructionData::Binary { 8370 opcode: ref pattern6_0, 8371 args: ref pattern6_1, 8372 } = &pattern5_0 8373 { 8374 match pattern6_0 { 8375 &Opcode::Ifcmp => { 8376 let (pattern8_0, pattern8_1) = 8377 C::unpack_value_array_2(ctx, pattern6_1); 8378 // Rule at src/isa/s390x/lower.isle line 2181. 8379 let expr0_0: bool = false; 8380 let expr1_0 = constructor_icmp_val( 8381 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8382 )?; 8383 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8384 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8385 return Some(expr3_0); 8386 } 8387 &Opcode::IaddIfcout => { 8388 let (pattern8_0, pattern8_1) = 8389 C::unpack_value_array_2(ctx, pattern6_1); 8390 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8391 // Rule at src/isa/s390x/lower.isle line 2206. 8392 let expr0_0: u8 = 3; 8393 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8394 let expr2_0 = 8395 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8396 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8397 return Some(expr3_0); 8398 } 8399 } 8400 _ => {} 8401 } 8402 } 8403 } 8404 } 8405 } 8406 &InstructionData::CondTrap { 8407 opcode: ref pattern2_0, 8408 arg: pattern2_1, 8409 code: ref pattern2_2, 8410 } => { 8411 match pattern2_0 { 8412 &Opcode::Trapz => { 8413 // Rule at src/isa/s390x/lower.isle line 2151. 8414 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8415 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8416 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8417 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8418 return Some(expr3_0); 8419 } 8420 &Opcode::Trapnz => { 8421 // Rule at src/isa/s390x/lower.isle line 2157. 8422 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8423 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8424 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8425 return Some(expr2_0); 8426 } 8427 &Opcode::ResumableTrapnz => { 8428 // Rule at src/isa/s390x/lower.isle line 2163. 8429 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8430 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8431 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8432 return Some(expr2_0); 8433 } 8434 _ => {} 8435 } 8436 } 8437 _ => {} 8438 } 8439 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8440 let pattern2_0 = C::value_type(ctx, pattern1_0); 8441 if pattern2_0 == B1 { 8442 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8443 if let &InstructionData::Unary { 8444 opcode: ref pattern5_0, 8445 arg: pattern5_1, 8446 } = &pattern4_0 8447 { 8448 match pattern5_0 { 8449 &Opcode::IsNull => { 8450 let pattern7_0 = C::value_type(ctx, pattern5_1); 8451 if pattern7_0 == R64 { 8452 // Rule at src/isa/s390x/lower.isle line 2017. 8453 let expr0_0: Type = B1; 8454 let expr1_0: Type = I64; 8455 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8456 let expr3_0: i16 = 0; 8457 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8458 let expr5_0 = IntCC::Equal; 8459 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8460 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8461 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8462 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8463 return Some(expr9_0); 8464 } 8465 } 8466 &Opcode::IsInvalid => { 8467 let pattern7_0 = C::value_type(ctx, pattern5_1); 8468 if pattern7_0 == R64 { 8469 // Rule at src/isa/s390x/lower.isle line 2023. 8470 let expr0_0: Type = B1; 8471 let expr1_0: Type = I64; 8472 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8473 let expr3_0: i16 = -1; 8474 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8475 let expr5_0 = IntCC::Equal; 8476 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8477 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8478 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8479 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8480 return Some(expr9_0); 8481 } 8482 } 8483 _ => {} 8484 } 8485 } 8486 } 8487 if pattern2_0 == I8 { 8488 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8489 match &pattern4_0 { 8490 &InstructionData::Unary { 8491 opcode: ref pattern5_0, 8492 arg: pattern5_1, 8493 } => { 8494 if let &Opcode::Popcnt = pattern5_0 { 8495 // Rule at src/isa/s390x/lower.isle line 884. 8496 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8497 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8498 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8499 return Some(expr2_0); 8500 } 8501 } 8502 &InstructionData::LoadNoOffset { 8503 opcode: ref pattern5_0, 8504 arg: pattern5_1, 8505 flags: pattern5_2, 8506 } => { 8507 if let &Opcode::AtomicLoad = pattern5_0 { 8508 // Rule at src/isa/s390x/lower.isle line 1826. 8509 let expr0_0: Type = I8; 8510 let expr1_0 = C::zero_offset(ctx); 8511 let expr2_0 = 8512 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8513 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8514 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8515 return Some(expr4_0); 8516 } 8517 } 8518 &InstructionData::Load { 8519 opcode: ref pattern5_0, 8520 arg: pattern5_1, 8521 flags: pattern5_2, 8522 offset: pattern5_3, 8523 } => { 8524 if let &Opcode::Load = pattern5_0 { 8525 // Rule at src/isa/s390x/lower.isle line 1182. 8526 let expr0_0: Type = I8; 8527 let expr1_0 = 8528 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8529 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8530 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8531 return Some(expr3_0); 8532 } 8533 } 8534 _ => {} 8535 } 8536 } 8537 if pattern2_0 == I16 { 8538 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8539 match &pattern4_0 { 8540 &InstructionData::LoadNoOffset { 8541 opcode: ref pattern5_0, 8542 arg: pattern5_1, 8543 flags: pattern5_2, 8544 } => { 8545 if let &Opcode::AtomicLoad = pattern5_0 { 8546 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8547 // Rule at src/isa/s390x/lower.isle line 1834. 8548 let expr0_0 = C::zero_offset(ctx); 8549 let expr1_0 = 8550 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8551 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8552 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8553 return Some(expr3_0); 8554 } 8555 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8556 // Rule at src/isa/s390x/lower.isle line 1830. 8557 let expr0_0: Type = I16; 8558 let expr1_0 = C::zero_offset(ctx); 8559 let expr2_0 = 8560 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8561 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8562 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8563 return Some(expr4_0); 8564 } 8565 } 8566 } 8567 &InstructionData::Load { 8568 opcode: ref pattern5_0, 8569 arg: pattern5_1, 8570 flags: pattern5_2, 8571 offset: pattern5_3, 8572 } => { 8573 if let &Opcode::Load = pattern5_0 { 8574 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8575 // Rule at src/isa/s390x/lower.isle line 1190. 8576 let expr0_0 = 8577 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8578 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8579 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8580 return Some(expr2_0); 8581 } 8582 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8583 // Rule at src/isa/s390x/lower.isle line 1186. 8584 let expr0_0: Type = I16; 8585 let expr1_0 = 8586 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8587 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8588 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8589 return Some(expr3_0); 8590 } 8591 } 8592 } 8593 _ => {} 8594 } 8595 } 8596 if pattern2_0 == I32 { 8597 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8598 match &pattern4_0 { 8599 &InstructionData::Binary { 8600 opcode: ref pattern5_0, 8601 args: ref pattern5_1, 8602 } => { 8603 match pattern5_0 { 8604 &Opcode::Umulhi => { 8605 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8606 // Rule at src/isa/s390x/lower.isle line 252. 8607 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8608 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8609 let expr2_0: Type = I64; 8610 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8611 let expr4_0: Type = I64; 8612 let expr5_0: u8 = 32; 8613 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8614 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8615 return Some(expr7_0); 8616 } 8617 &Opcode::Smulhi => { 8618 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8619 // Rule at src/isa/s390x/lower.isle line 274. 8620 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8621 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8622 let expr2_0: Type = I64; 8623 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8624 let expr4_0: Type = I64; 8625 let expr5_0: u8 = 32; 8626 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8627 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8628 return Some(expr7_0); 8629 } 8630 _ => {} 8631 } 8632 } 8633 &InstructionData::Unary { 8634 opcode: ref pattern5_0, 8635 arg: pattern5_1, 8636 } => { 8637 if let &Opcode::Bitcast = pattern5_0 { 8638 let pattern7_0 = C::value_type(ctx, pattern5_1); 8639 if pattern7_0 == F32 { 8640 // Rule at src/isa/s390x/lower.isle line 1145. 8641 let expr0_0: Type = I64; 8642 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8643 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8644 let expr3_0: u8 = 32; 8645 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8646 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8647 return Some(expr5_0); 8648 } 8649 } 8650 } 8651 &InstructionData::LoadNoOffset { 8652 opcode: ref pattern5_0, 8653 arg: pattern5_1, 8654 flags: pattern5_2, 8655 } => { 8656 if let &Opcode::AtomicLoad = pattern5_0 { 8657 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8658 // Rule at src/isa/s390x/lower.isle line 1842. 8659 let expr0_0 = C::zero_offset(ctx); 8660 let expr1_0 = 8661 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8662 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8663 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8664 return Some(expr3_0); 8665 } 8666 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8667 // Rule at src/isa/s390x/lower.isle line 1838. 8668 let expr0_0 = C::zero_offset(ctx); 8669 let expr1_0 = 8670 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8671 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8672 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8673 return Some(expr3_0); 8674 } 8675 } 8676 } 8677 &InstructionData::Load { 8678 opcode: ref pattern5_0, 8679 arg: pattern5_1, 8680 flags: pattern5_2, 8681 offset: pattern5_3, 8682 } => { 8683 if let &Opcode::Load = pattern5_0 { 8684 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8685 // Rule at src/isa/s390x/lower.isle line 1198. 8686 let expr0_0 = 8687 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8688 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8689 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8690 return Some(expr2_0); 8691 } 8692 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8693 // Rule at src/isa/s390x/lower.isle line 1194. 8694 let expr0_0 = 8695 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8696 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8697 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8698 return Some(expr2_0); 8699 } 8700 } 8701 } 8702 _ => {} 8703 } 8704 } 8705 if pattern2_0 == I64 { 8706 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8707 match &pattern4_0 { 8708 &InstructionData::Binary { 8709 opcode: ref pattern5_0, 8710 args: ref pattern5_1, 8711 } => { 8712 match pattern5_0 { 8713 &Opcode::Umulhi => { 8714 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8715 // Rule at src/isa/s390x/lower.isle line 259. 8716 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8717 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8718 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8719 let expr3_0: Type = I64; 8720 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8721 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8722 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8723 return Some(expr6_0); 8724 } 8725 &Opcode::Smulhi => { 8726 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8727 // Rule at src/isa/s390x/lower.isle line 281. 8728 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8729 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8730 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8731 let expr3_0: Type = I64; 8732 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8733 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8734 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8735 return Some(expr6_0); 8736 } 8737 _ => {} 8738 } 8739 } 8740 &InstructionData::Unary { 8741 opcode: ref pattern5_0, 8742 arg: pattern5_1, 8743 } => { 8744 if let &Opcode::Bitcast = pattern5_0 { 8745 let pattern7_0 = C::value_type(ctx, pattern5_1); 8746 if pattern7_0 == F64 { 8747 // Rule at src/isa/s390x/lower.isle line 1135. 8748 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8749 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8750 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8751 return Some(expr2_0); 8752 } 8753 } 8754 } 8755 &InstructionData::LoadNoOffset { 8756 opcode: ref pattern5_0, 8757 arg: pattern5_1, 8758 flags: pattern5_2, 8759 } => { 8760 if let &Opcode::AtomicLoad = pattern5_0 { 8761 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8762 // Rule at src/isa/s390x/lower.isle line 1850. 8763 let expr0_0 = C::zero_offset(ctx); 8764 let expr1_0 = 8765 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8766 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8767 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8768 return Some(expr3_0); 8769 } 8770 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8771 // Rule at src/isa/s390x/lower.isle line 1846. 8772 let expr0_0 = C::zero_offset(ctx); 8773 let expr1_0 = 8774 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8775 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8776 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8777 return Some(expr3_0); 8778 } 8779 } 8780 } 8781 &InstructionData::Load { 8782 opcode: ref pattern5_0, 8783 arg: pattern5_1, 8784 flags: pattern5_2, 8785 offset: pattern5_3, 8786 } => { 8787 if let &Opcode::Load = pattern5_0 { 8788 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8789 // Rule at src/isa/s390x/lower.isle line 1206. 8790 let expr0_0 = 8791 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8792 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8793 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8794 return Some(expr2_0); 8795 } 8796 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8797 // Rule at src/isa/s390x/lower.isle line 1202. 8798 let expr0_0 = 8799 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8800 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8801 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8802 return Some(expr2_0); 8803 } 8804 } 8805 } 8806 _ => {} 8807 } 8808 } 8809 if pattern2_0 == R64 { 8810 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8811 if let &InstructionData::Load { 8812 opcode: ref pattern5_0, 8813 arg: pattern5_1, 8814 flags: pattern5_2, 8815 offset: pattern5_3, 8816 } = &pattern4_0 8817 { 8818 if let &Opcode::Load = pattern5_0 { 8819 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8820 // Rule at src/isa/s390x/lower.isle line 1214. 8821 let expr0_0 = 8822 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8823 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8824 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8825 return Some(expr2_0); 8826 } 8827 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8828 // Rule at src/isa/s390x/lower.isle line 1210. 8829 let expr0_0 = 8830 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8831 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8832 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8833 return Some(expr2_0); 8834 } 8835 } 8836 } 8837 } 8838 if pattern2_0 == F32 { 8839 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8840 match &pattern4_0 { 8841 &InstructionData::Unary { 8842 opcode: ref pattern5_0, 8843 arg: pattern5_1, 8844 } => { 8845 if let &Opcode::Bitcast = pattern5_0 { 8846 let pattern7_0 = C::value_type(ctx, pattern5_1); 8847 if pattern7_0 == I32 { 8848 // Rule at src/isa/s390x/lower.isle line 1140. 8849 let expr0_0: Type = I64; 8850 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8851 let expr2_0: u8 = 32; 8852 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8853 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8854 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8855 return Some(expr5_0); 8856 } 8857 } 8858 } 8859 &InstructionData::Load { 8860 opcode: ref pattern5_0, 8861 arg: pattern5_1, 8862 flags: pattern5_2, 8863 offset: pattern5_3, 8864 } => { 8865 if let &Opcode::Load = pattern5_0 { 8866 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8867 // Rule at src/isa/s390x/lower.isle line 1218. 8868 let expr0_0 = 8869 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8870 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8871 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8872 return Some(expr2_0); 8873 } 8874 } 8875 } 8876 _ => {} 8877 } 8878 } 8879 if pattern2_0 == F64 { 8880 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8881 match &pattern4_0 { 8882 &InstructionData::Unary { 8883 opcode: ref pattern5_0, 8884 arg: pattern5_1, 8885 } => { 8886 if let &Opcode::Bitcast = pattern5_0 { 8887 let pattern7_0 = C::value_type(ctx, pattern5_1); 8888 if pattern7_0 == I64 { 8889 // Rule at src/isa/s390x/lower.isle line 1131. 8890 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8891 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8892 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8893 return Some(expr2_0); 8894 } 8895 } 8896 } 8897 &InstructionData::Load { 8898 opcode: ref pattern5_0, 8899 arg: pattern5_1, 8900 flags: pattern5_2, 8901 offset: pattern5_3, 8902 } => { 8903 if let &Opcode::Load = pattern5_0 { 8904 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8905 // Rule at src/isa/s390x/lower.isle line 1233. 8906 let expr0_0 = 8907 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8908 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8909 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8910 return Some(expr2_0); 8911 } 8912 } 8913 } 8914 _ => {} 8915 } 8916 } 8917 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8918 match &pattern3_0 { 8919 &InstructionData::NullAry { 8920 opcode: ref pattern4_0, 8921 } => { 8922 if let &Opcode::Null = pattern4_0 { 8923 // Rule at src/isa/s390x/lower.isle line 41. 8924 let expr0_0: u64 = 0; 8925 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8926 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8927 return Some(expr2_0); 8928 } 8929 } 8930 &InstructionData::UnaryImm { 8931 opcode: ref pattern4_0, 8932 imm: pattern4_1, 8933 } => { 8934 if let &Opcode::Iconst = pattern4_0 { 8935 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8936 // Rule at src/isa/s390x/lower.isle line 15. 8937 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8938 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8939 return Some(expr1_0); 8940 } 8941 } 8942 &InstructionData::StackLoad { 8943 opcode: ref pattern4_0, 8944 stack_slot: pattern4_1, 8945 offset: pattern4_2, 8946 } => { 8947 if let &Opcode::StackAddr = pattern4_0 { 8948 // Rule at src/isa/s390x/lower.isle line 1152. 8949 let expr0_0 = 8950 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8951 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8952 return Some(expr1_0); 8953 } 8954 } 8955 &InstructionData::UnaryBool { 8956 opcode: ref pattern4_0, 8957 imm: pattern4_1, 8958 } => { 8959 if let &Opcode::Bconst = pattern4_0 { 8960 if pattern4_1 == true { 8961 // Rule at src/isa/s390x/lower.isle line 23. 8962 let expr0_0: u64 = 1; 8963 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8964 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8965 return Some(expr2_0); 8966 } 8967 if pattern4_1 == false { 8968 // Rule at src/isa/s390x/lower.isle line 21. 8969 let expr0_0: u64 = 0; 8970 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8971 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8972 return Some(expr2_0); 8973 } 8974 } 8975 } 8976 &InstructionData::Binary { 8977 opcode: ref pattern4_0, 8978 args: ref pattern4_1, 8979 } => { 8980 match pattern4_0 { 8981 &Opcode::Fadd => { 8982 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8983 // Rule at src/isa/s390x/lower.isle line 920. 8984 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8985 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8986 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8987 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8988 return Some(expr3_0); 8989 } 8990 &Opcode::Fsub => { 8991 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8992 // Rule at src/isa/s390x/lower.isle line 927. 8993 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8994 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8995 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8996 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8997 return Some(expr3_0); 8998 } 8999 &Opcode::Fmul => { 9000 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9001 // Rule at src/isa/s390x/lower.isle line 934. 9002 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9003 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9004 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9005 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9006 return Some(expr3_0); 9007 } 9008 &Opcode::Fdiv => { 9009 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9010 // Rule at src/isa/s390x/lower.isle line 941. 9011 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9012 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9013 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9014 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9015 return Some(expr3_0); 9016 } 9017 &Opcode::Fcopysign => { 9018 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9019 // Rule at src/isa/s390x/lower.isle line 962. 9020 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9021 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9022 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 9023 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9024 return Some(expr3_0); 9025 } 9026 &Opcode::Fmin => { 9027 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9028 // Rule at src/isa/s390x/lower.isle line 948. 9029 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9030 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9031 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9032 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9033 return Some(expr3_0); 9034 } 9035 &Opcode::Fmax => { 9036 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9037 // Rule at src/isa/s390x/lower.isle line 955. 9038 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9039 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9040 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9041 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9042 return Some(expr3_0); 9043 } 9044 _ => {} 9045 } 9046 } 9047 &InstructionData::FloatCompare { 9048 opcode: ref pattern4_0, 9049 args: ref pattern4_1, 9050 cond: ref pattern4_2, 9051 } => { 9052 if let &Opcode::Fcmp = pattern4_0 { 9053 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9054 // Rule at src/isa/s390x/lower.isle line 2004. 9055 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9056 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9057 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9058 return Some(expr2_0); 9059 } 9060 } 9061 &InstructionData::IntCompare { 9062 opcode: ref pattern4_0, 9063 args: ref pattern4_1, 9064 cond: ref pattern4_2, 9065 } => { 9066 if let &Opcode::Icmp = pattern4_0 { 9067 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9068 // Rule at src/isa/s390x/lower.isle line 1915. 9069 let expr0_0: bool = true; 9070 let expr1_0 = 9071 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9072 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9073 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9074 return Some(expr3_0); 9075 } 9076 } 9077 &InstructionData::Ternary { 9078 opcode: ref pattern4_0, 9079 args: ref pattern4_1, 9080 } => { 9081 match pattern4_0 { 9082 &Opcode::Select => { 9083 let (pattern6_0, pattern6_1, pattern6_2) = 9084 C::unpack_value_array_3(ctx, pattern4_1); 9085 // Rule at src/isa/s390x/lower.isle line 2046. 9086 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9087 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9088 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9089 let expr3_0 = constructor_select_bool_reg( 9090 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9091 )?; 9092 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9093 return Some(expr4_0); 9094 } 9095 &Opcode::Fma => { 9096 let (pattern6_0, pattern6_1, pattern6_2) = 9097 C::unpack_value_array_3(ctx, pattern4_1); 9098 // Rule at src/isa/s390x/lower.isle line 969. 9099 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9100 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9101 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9102 let expr3_0 = 9103 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9104 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9105 return Some(expr4_0); 9106 } 9107 _ => {} 9108 } 9109 } 9110 &InstructionData::IntSelect { 9111 opcode: ref pattern4_0, 9112 args: ref pattern4_1, 9113 cond: ref pattern4_2, 9114 } => { 9115 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9116 let (pattern6_0, pattern6_1, pattern6_2) = 9117 C::unpack_value_array_3(ctx, pattern4_1); 9118 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9119 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9120 if let &InstructionData::Binary { 9121 opcode: ref pattern9_0, 9122 args: ref pattern9_1, 9123 } = &pattern8_0 9124 { 9125 if let &Opcode::Ifcmp = pattern9_0 { 9126 let (pattern11_0, pattern11_1) = 9127 C::unpack_value_array_2(ctx, pattern9_1); 9128 // Rule at src/isa/s390x/lower.isle line 2058. 9129 let expr0_0: bool = false; 9130 let expr1_0 = constructor_icmp_val( 9131 ctx, 9132 expr0_0, 9133 pattern4_2, 9134 pattern11_0, 9135 pattern11_1, 9136 )?; 9137 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9138 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9139 let expr4_0 = constructor_select_bool_reg( 9140 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9141 )?; 9142 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9143 return Some(expr5_0); 9144 } 9145 } 9146 } 9147 } 9148 } 9149 &InstructionData::Unary { 9150 opcode: ref pattern4_0, 9151 arg: pattern4_1, 9152 } => { 9153 match pattern4_0 { 9154 &Opcode::Sqrt => { 9155 // Rule at src/isa/s390x/lower.isle line 976. 9156 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9157 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9158 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9159 return Some(expr2_0); 9160 } 9161 &Opcode::Fneg => { 9162 // Rule at src/isa/s390x/lower.isle line 983. 9163 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9164 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9165 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9166 return Some(expr2_0); 9167 } 9168 &Opcode::Fabs => { 9169 // Rule at src/isa/s390x/lower.isle line 990. 9170 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9171 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9172 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9173 return Some(expr2_0); 9174 } 9175 &Opcode::Ceil => { 9176 // Rule at src/isa/s390x/lower.isle line 997. 9177 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9178 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9179 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9180 return Some(expr2_0); 9181 } 9182 &Opcode::Floor => { 9183 // Rule at src/isa/s390x/lower.isle line 1004. 9184 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9185 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9186 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9187 return Some(expr2_0); 9188 } 9189 &Opcode::Trunc => { 9190 // Rule at src/isa/s390x/lower.isle line 1011. 9191 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9192 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9193 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9194 return Some(expr2_0); 9195 } 9196 &Opcode::Nearest => { 9197 // Rule at src/isa/s390x/lower.isle line 1018. 9198 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9199 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9200 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9201 return Some(expr2_0); 9202 } 9203 &Opcode::Bextend => { 9204 // Rule at src/isa/s390x/lower.isle line 760. 9205 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9206 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9207 return Some(expr1_0); 9208 } 9209 &Opcode::Bmask => { 9210 // Rule at src/isa/s390x/lower.isle line 762. 9211 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9212 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9213 return Some(expr1_0); 9214 } 9215 &Opcode::Fpromote => { 9216 let pattern6_0 = C::value_type(ctx, pattern4_1); 9217 // Rule at src/isa/s390x/lower.isle line 1025. 9218 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9219 let expr1_0 = 9220 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9221 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9222 return Some(expr2_0); 9223 } 9224 &Opcode::Fdemote => { 9225 let pattern6_0 = C::value_type(ctx, pattern4_1); 9226 // Rule at src/isa/s390x/lower.isle line 1032. 9227 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9228 let expr1_0 = 9229 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9230 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9231 return Some(expr2_0); 9232 } 9233 &Opcode::FcvtFromUint => { 9234 let pattern6_0 = C::value_type(ctx, pattern4_1); 9235 // Rule at src/isa/s390x/lower.isle line 1039. 9236 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9237 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9238 let expr2_0 = 9239 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9240 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9241 return Some(expr3_0); 9242 } 9243 &Opcode::FcvtFromSint => { 9244 let pattern6_0 = C::value_type(ctx, pattern4_1); 9245 // Rule at src/isa/s390x/lower.isle line 1047. 9246 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9247 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9248 let expr2_0 = 9249 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9250 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9251 return Some(expr3_0); 9252 } 9253 _ => {} 9254 } 9255 } 9256 _ => {} 9257 } 9258 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9259 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9260 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9261 match &pattern5_0 { 9262 &InstructionData::Binary { 9263 opcode: ref pattern6_0, 9264 args: ref pattern6_1, 9265 } => { 9266 match pattern6_0 { 9267 &Opcode::BandNot => { 9268 let (pattern8_0, pattern8_1) = 9269 C::unpack_value_array_2(ctx, pattern6_1); 9270 // Rule at src/isa/s390x/lower.isle line 702. 9271 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9272 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9273 let expr2_0 = 9274 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9275 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9276 return Some(expr3_0); 9277 } 9278 &Opcode::BorNot => { 9279 let (pattern8_0, pattern8_1) = 9280 C::unpack_value_array_2(ctx, pattern6_1); 9281 // Rule at src/isa/s390x/lower.isle line 713. 9282 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9283 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9284 let expr2_0 = 9285 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9286 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9287 return Some(expr3_0); 9288 } 9289 &Opcode::BxorNot => { 9290 let (pattern8_0, pattern8_1) = 9291 C::unpack_value_array_2(ctx, pattern6_1); 9292 // Rule at src/isa/s390x/lower.isle line 724. 9293 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9294 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9295 let expr2_0 = 9296 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9297 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9298 return Some(expr3_0); 9299 } 9300 _ => {} 9301 } 9302 } 9303 &InstructionData::Ternary { 9304 opcode: ref pattern6_0, 9305 args: ref pattern6_1, 9306 } => { 9307 if let &Opcode::Bitselect = pattern6_0 { 9308 let (pattern8_0, pattern8_1, pattern8_2) = 9309 C::unpack_value_array_3(ctx, pattern6_1); 9310 // Rule at src/isa/s390x/lower.isle line 735. 9311 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9312 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9313 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9314 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9315 let expr4_0 = 9316 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9317 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9318 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9319 return Some(expr6_0); 9320 } 9321 } 9322 &InstructionData::Unary { 9323 opcode: ref pattern6_0, 9324 arg: pattern6_1, 9325 } => { 9326 match pattern6_0 { 9327 &Opcode::Bnot => { 9328 // Rule at src/isa/s390x/lower.isle line 625. 9329 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9330 let expr1_0 = 9331 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9332 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9333 return Some(expr2_0); 9334 } 9335 &Opcode::Popcnt => { 9336 // Rule at src/isa/s390x/lower.isle line 889. 9337 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9338 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9339 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9340 return Some(expr2_0); 9341 } 9342 _ => {} 9343 } 9344 } 9345 _ => {} 9346 } 9347 } 9348 } 9349 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9350 if pattern2_0 == I16 { 9351 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9352 if let &InstructionData::Unary { 9353 opcode: ref pattern6_0, 9354 arg: pattern6_1, 9355 } = &pattern5_0 9356 { 9357 if let &Opcode::Popcnt = pattern6_0 { 9358 // Rule at src/isa/s390x/lower.isle line 898. 9359 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9360 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9361 let expr2_0: Type = I32; 9362 let expr3_0: Type = I32; 9363 let expr4_0: u8 = 8; 9364 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9365 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9366 let expr7_0: Type = I32; 9367 let expr8_0: u8 = 8; 9368 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9369 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9370 return Some(expr10_0); 9371 } 9372 } 9373 } 9374 if pattern2_0 == I32 { 9375 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9376 if let &InstructionData::Unary { 9377 opcode: ref pattern6_0, 9378 arg: pattern6_1, 9379 } = &pattern5_0 9380 { 9381 if let &Opcode::Popcnt = pattern6_0 { 9382 // Rule at src/isa/s390x/lower.isle line 903. 9383 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9384 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9385 let expr2_0: Type = I32; 9386 let expr3_0: Type = I32; 9387 let expr4_0: u8 = 16; 9388 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9389 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9390 let expr7_0: Type = I32; 9391 let expr8_0: Type = I32; 9392 let expr9_0: u8 = 8; 9393 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9394 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9395 let expr12_0: Type = I32; 9396 let expr13_0: u8 = 24; 9397 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9398 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9399 return Some(expr15_0); 9400 } 9401 } 9402 } 9403 if pattern2_0 == I64 { 9404 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9405 if let &InstructionData::Unary { 9406 opcode: ref pattern6_0, 9407 arg: pattern6_1, 9408 } = &pattern5_0 9409 { 9410 if let &Opcode::Popcnt = pattern6_0 { 9411 // Rule at src/isa/s390x/lower.isle line 909. 9412 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9413 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9414 let expr2_0: Type = I64; 9415 let expr3_0: Type = I64; 9416 let expr4_0: u8 = 32; 9417 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9418 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9419 let expr7_0: Type = I64; 9420 let expr8_0: Type = I64; 9421 let expr9_0: u8 = 16; 9422 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9423 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9424 let expr12_0: Type = I64; 9425 let expr13_0: Type = I64; 9426 let expr14_0: u8 = 8; 9427 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9428 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9429 let expr17_0: Type = I64; 9430 let expr18_0: u8 = 56; 9431 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9432 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9433 return Some(expr20_0); 9434 } 9435 } 9436 } 9437 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9438 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9439 match &pattern5_0 { 9440 &InstructionData::Binary { 9441 opcode: ref pattern6_0, 9442 args: ref pattern6_1, 9443 } => { 9444 match pattern6_0 { 9445 &Opcode::BandNot => { 9446 let (pattern8_0, pattern8_1) = 9447 C::unpack_value_array_2(ctx, pattern6_1); 9448 // Rule at src/isa/s390x/lower.isle line 706. 9449 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9450 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9451 let expr2_0 = 9452 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9453 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9454 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9455 return Some(expr4_0); 9456 } 9457 &Opcode::BorNot => { 9458 let (pattern8_0, pattern8_1) = 9459 C::unpack_value_array_2(ctx, pattern6_1); 9460 // Rule at src/isa/s390x/lower.isle line 717. 9461 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9462 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9463 let expr2_0 = 9464 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9465 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9466 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9467 return Some(expr4_0); 9468 } 9469 &Opcode::BxorNot => { 9470 let (pattern8_0, pattern8_1) = 9471 C::unpack_value_array_2(ctx, pattern6_1); 9472 // Rule at src/isa/s390x/lower.isle line 728. 9473 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9474 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9475 let expr2_0 = 9476 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9477 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9478 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9479 return Some(expr4_0); 9480 } 9481 _ => {} 9482 } 9483 } 9484 &InstructionData::Ternary { 9485 opcode: ref pattern6_0, 9486 args: ref pattern6_1, 9487 } => { 9488 if let &Opcode::Bitselect = pattern6_0 { 9489 let (pattern8_0, pattern8_1, pattern8_2) = 9490 C::unpack_value_array_3(ctx, pattern6_1); 9491 // Rule at src/isa/s390x/lower.isle line 742. 9492 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9493 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9494 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9495 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9496 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9497 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9498 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9499 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9500 return Some(expr7_0); 9501 } 9502 } 9503 &InstructionData::Unary { 9504 opcode: ref pattern6_0, 9505 arg: pattern6_1, 9506 } => { 9507 if let &Opcode::Bnot = pattern6_0 { 9508 // Rule at src/isa/s390x/lower.isle line 630. 9509 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9510 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9511 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9512 return Some(expr2_0); 9513 } 9514 } 9515 _ => {} 9516 } 9517 } 9518 } 9519 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9520 if pattern2_0 == F32 { 9521 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9522 if let &InstructionData::Load { 9523 opcode: ref pattern6_0, 9524 arg: pattern6_1, 9525 flags: pattern6_2, 9526 offset: pattern6_3, 9527 } = &pattern5_0 9528 { 9529 if let &Opcode::Load = pattern6_0 { 9530 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9531 // Rule at src/isa/s390x/lower.isle line 1222. 9532 let expr0_0 = 9533 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9534 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9535 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9536 return Some(expr2_0); 9537 } 9538 } 9539 } 9540 } 9541 if pattern2_0 == F64 { 9542 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9543 if let &InstructionData::Load { 9544 opcode: ref pattern6_0, 9545 arg: pattern6_1, 9546 flags: pattern6_2, 9547 offset: pattern6_3, 9548 } = &pattern5_0 9549 { 9550 if let &Opcode::Load = pattern6_0 { 9551 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9552 // Rule at src/isa/s390x/lower.isle line 1237. 9553 let expr0_0 = 9554 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9555 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9556 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9557 return Some(expr2_0); 9558 } 9559 } 9560 } 9561 } 9562 } 9563 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9564 if pattern2_0 == F32 { 9565 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9566 if let &InstructionData::Load { 9567 opcode: ref pattern6_0, 9568 arg: pattern6_1, 9569 flags: pattern6_2, 9570 offset: pattern6_3, 9571 } = &pattern5_0 9572 { 9573 if let &Opcode::Load = pattern6_0 { 9574 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9575 // Rule at src/isa/s390x/lower.isle line 1227. 9576 let expr0_0 = 9577 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9578 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9579 let expr2_0: Type = I64; 9580 let expr3_0: u8 = 32; 9581 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9582 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9583 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9584 return Some(expr6_0); 9585 } 9586 } 9587 } 9588 } 9589 if pattern2_0 == F64 { 9590 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9591 if let &InstructionData::Load { 9592 opcode: ref pattern6_0, 9593 arg: pattern6_1, 9594 flags: pattern6_2, 9595 offset: pattern6_3, 9596 } = &pattern5_0 9597 { 9598 if let &Opcode::Load = pattern6_0 { 9599 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9600 // Rule at src/isa/s390x/lower.isle line 1242. 9601 let expr0_0 = 9602 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9603 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9604 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9605 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9606 return Some(expr3_0); 9607 } 9608 } 9609 } 9610 } 9611 } 9612 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9613 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9614 if let &InstructionData::Unary { 9615 opcode: ref pattern5_0, 9616 arg: pattern5_1, 9617 } = &pattern4_0 9618 { 9619 if let &Opcode::Bint = pattern5_0 { 9620 // Rule at src/isa/s390x/lower.isle line 796. 9621 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9622 let expr1_0: u16 = 1; 9623 let expr2_0: u8 = 0; 9624 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9625 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9626 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9627 return Some(expr5_0); 9628 } 9629 } 9630 } 9631 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9632 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9633 if let &InstructionData::Unary { 9634 opcode: ref pattern5_0, 9635 arg: pattern5_1, 9636 } = &pattern4_0 9637 { 9638 if let &Opcode::Bint = pattern5_0 { 9639 // Rule at src/isa/s390x/lower.isle line 800. 9640 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9641 let expr1_0: u32 = 1; 9642 let expr2_0: u8 = 0; 9643 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9644 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9645 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9646 return Some(expr5_0); 9647 } 9648 } 9649 } 9650 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9651 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9652 match &pattern4_0 { 9653 &InstructionData::Binary { 9654 opcode: ref pattern5_0, 9655 args: ref pattern5_1, 9656 } => { 9657 match pattern5_0 { 9658 &Opcode::Iadd => { 9659 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9660 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9661 // Rule at src/isa/s390x/lower.isle line 72. 9662 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9663 let expr1_0 = 9664 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9665 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9666 return Some(expr2_0); 9667 } 9668 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9669 // Rule at src/isa/s390x/lower.isle line 76. 9670 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9671 let expr1_0 = 9672 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9673 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9674 return Some(expr2_0); 9675 } 9676 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9677 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9678 if let &InstructionData::Unary { 9679 opcode: ref pattern10_0, 9680 arg: pattern10_1, 9681 } = &pattern9_0 9682 { 9683 if let &Opcode::Sextend = pattern10_0 { 9684 let pattern12_0 = C::value_type(ctx, pattern10_1); 9685 if pattern12_0 == I32 { 9686 // Rule at src/isa/s390x/lower.isle line 66. 9687 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9688 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9689 let expr2_0 = constructor_add_reg_sext32( 9690 ctx, pattern3_0, expr0_0, expr1_0, 9691 )?; 9692 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9693 return Some(expr3_0); 9694 } 9695 } 9696 } 9697 } 9698 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9699 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9700 if let &InstructionData::Load { 9701 opcode: ref pattern10_0, 9702 arg: pattern10_1, 9703 flags: pattern10_2, 9704 offset: pattern10_3, 9705 } = &pattern9_0 9706 { 9707 match pattern10_0 { 9708 &Opcode::Sload16 => { 9709 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9710 // Rule at src/isa/s390x/lower.isle line 94. 9711 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9712 let expr1_0 = 9713 constructor_sink_sload16(ctx, pattern8_0)?; 9714 let expr2_0 = constructor_add_mem_sext16( 9715 ctx, pattern3_0, expr0_0, &expr1_0, 9716 )?; 9717 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9718 return Some(expr3_0); 9719 } 9720 } 9721 &Opcode::Sload32 => { 9722 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9723 // Rule at src/isa/s390x/lower.isle line 98. 9724 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9725 let expr1_0 = 9726 constructor_sink_sload32(ctx, pattern8_0)?; 9727 let expr2_0 = constructor_add_mem_sext32( 9728 ctx, pattern3_0, expr0_0, &expr1_0, 9729 )?; 9730 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9731 return Some(expr3_0); 9732 } 9733 } 9734 _ => {} 9735 } 9736 } 9737 } 9738 let pattern8_0 = C::value_type(ctx, pattern7_0); 9739 if pattern8_0 == I16 { 9740 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9741 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9742 if let &InstructionData::Load { 9743 opcode: ref pattern12_0, 9744 arg: pattern12_1, 9745 flags: pattern12_2, 9746 offset: pattern12_3, 9747 } = &pattern11_0 9748 { 9749 if let &Opcode::Load = pattern12_0 { 9750 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9751 // Rule at src/isa/s390x/lower.isle line 88. 9752 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9753 let expr1_0 = 9754 constructor_sink_load(ctx, pattern10_0)?; 9755 let expr2_0 = constructor_add_mem_sext16( 9756 ctx, pattern3_0, expr0_0, &expr1_0, 9757 )?; 9758 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9759 return Some(expr3_0); 9760 } 9761 } 9762 } 9763 } 9764 } 9765 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9766 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9767 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9768 if let &InstructionData::Load { 9769 opcode: ref pattern12_0, 9770 arg: pattern12_1, 9771 flags: pattern12_2, 9772 offset: pattern12_3, 9773 } = &pattern11_0 9774 { 9775 if let &Opcode::Load = pattern12_0 { 9776 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9777 // Rule at src/isa/s390x/lower.isle line 82. 9778 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9779 let expr1_0 = 9780 constructor_sink_load(ctx, pattern10_0)?; 9781 let expr2_0 = constructor_add_mem( 9782 ctx, pattern3_0, expr0_0, &expr1_0, 9783 )?; 9784 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9785 return Some(expr3_0); 9786 } 9787 } 9788 } 9789 } 9790 } 9791 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9792 // Rule at src/isa/s390x/lower.isle line 70. 9793 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9794 let expr1_0 = 9795 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9796 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9797 return Some(expr2_0); 9798 } 9799 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9800 // Rule at src/isa/s390x/lower.isle line 74. 9801 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9802 let expr1_0 = 9803 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9804 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9805 return Some(expr2_0); 9806 } 9807 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9808 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9809 if let &InstructionData::Unary { 9810 opcode: ref pattern10_0, 9811 arg: pattern10_1, 9812 } = &pattern9_0 9813 { 9814 if let &Opcode::Sextend = pattern10_0 { 9815 let pattern12_0 = C::value_type(ctx, pattern10_1); 9816 if pattern12_0 == I32 { 9817 // Rule at src/isa/s390x/lower.isle line 64. 9818 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9819 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9820 let expr2_0 = constructor_add_reg_sext32( 9821 ctx, pattern3_0, expr0_0, expr1_0, 9822 )?; 9823 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9824 return Some(expr3_0); 9825 } 9826 } 9827 } 9828 } 9829 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9830 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9831 if let &InstructionData::Load { 9832 opcode: ref pattern10_0, 9833 arg: pattern10_1, 9834 flags: pattern10_2, 9835 offset: pattern10_3, 9836 } = &pattern9_0 9837 { 9838 match pattern10_0 { 9839 &Opcode::Sload16 => { 9840 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9841 // Rule at src/isa/s390x/lower.isle line 92. 9842 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9843 let expr1_0 = 9844 constructor_sink_sload16(ctx, pattern8_0)?; 9845 let expr2_0 = constructor_add_mem_sext16( 9846 ctx, pattern3_0, expr0_0, &expr1_0, 9847 )?; 9848 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9849 return Some(expr3_0); 9850 } 9851 } 9852 &Opcode::Sload32 => { 9853 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9854 // Rule at src/isa/s390x/lower.isle line 96. 9855 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9856 let expr1_0 = 9857 constructor_sink_sload32(ctx, pattern8_0)?; 9858 let expr2_0 = constructor_add_mem_sext32( 9859 ctx, pattern3_0, expr0_0, &expr1_0, 9860 )?; 9861 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9862 return Some(expr3_0); 9863 } 9864 } 9865 _ => {} 9866 } 9867 } 9868 } 9869 let pattern8_0 = C::value_type(ctx, pattern7_1); 9870 if pattern8_0 == I16 { 9871 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9872 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9873 if let &InstructionData::Load { 9874 opcode: ref pattern12_0, 9875 arg: pattern12_1, 9876 flags: pattern12_2, 9877 offset: pattern12_3, 9878 } = &pattern11_0 9879 { 9880 if let &Opcode::Load = pattern12_0 { 9881 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9882 // Rule at src/isa/s390x/lower.isle line 86. 9883 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9884 let expr1_0 = 9885 constructor_sink_load(ctx, pattern10_0)?; 9886 let expr2_0 = constructor_add_mem_sext16( 9887 ctx, pattern3_0, expr0_0, &expr1_0, 9888 )?; 9889 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9890 return Some(expr3_0); 9891 } 9892 } 9893 } 9894 } 9895 } 9896 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9897 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9898 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9899 if let &InstructionData::Load { 9900 opcode: ref pattern12_0, 9901 arg: pattern12_1, 9902 flags: pattern12_2, 9903 offset: pattern12_3, 9904 } = &pattern11_0 9905 { 9906 if let &Opcode::Load = pattern12_0 { 9907 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9908 // Rule at src/isa/s390x/lower.isle line 80. 9909 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9910 let expr1_0 = 9911 constructor_sink_load(ctx, pattern10_0)?; 9912 let expr2_0 = constructor_add_mem( 9913 ctx, pattern3_0, expr0_0, &expr1_0, 9914 )?; 9915 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9916 return Some(expr3_0); 9917 } 9918 } 9919 } 9920 } 9921 } 9922 // Rule at src/isa/s390x/lower.isle line 60. 9923 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9924 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9925 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9926 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9927 return Some(expr3_0); 9928 } 9929 &Opcode::Isub => { 9930 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9931 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9932 // Rule at src/isa/s390x/lower.isle line 113. 9933 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9934 let expr1_0 = 9935 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9936 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9937 return Some(expr2_0); 9938 } 9939 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9940 // Rule at src/isa/s390x/lower.isle line 115. 9941 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9942 let expr1_0 = 9943 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9944 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9945 return Some(expr2_0); 9946 } 9947 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9948 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9949 if let &InstructionData::Unary { 9950 opcode: ref pattern10_0, 9951 arg: pattern10_1, 9952 } = &pattern9_0 9953 { 9954 if let &Opcode::Sextend = pattern10_0 { 9955 let pattern12_0 = C::value_type(ctx, pattern10_1); 9956 if pattern12_0 == I32 { 9957 // Rule at src/isa/s390x/lower.isle line 109. 9958 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9959 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9960 let expr2_0 = constructor_sub_reg_sext32( 9961 ctx, pattern3_0, expr0_0, expr1_0, 9962 )?; 9963 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9964 return Some(expr3_0); 9965 } 9966 } 9967 } 9968 } 9969 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9970 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9971 if let &InstructionData::Load { 9972 opcode: ref pattern10_0, 9973 arg: pattern10_1, 9974 flags: pattern10_2, 9975 offset: pattern10_3, 9976 } = &pattern9_0 9977 { 9978 match pattern10_0 { 9979 &Opcode::Sload16 => { 9980 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9981 // Rule at src/isa/s390x/lower.isle line 127. 9982 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9983 let expr1_0 = 9984 constructor_sink_sload16(ctx, pattern8_0)?; 9985 let expr2_0 = constructor_sub_mem_sext16( 9986 ctx, pattern3_0, expr0_0, &expr1_0, 9987 )?; 9988 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9989 return Some(expr3_0); 9990 } 9991 } 9992 &Opcode::Sload32 => { 9993 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9994 // Rule at src/isa/s390x/lower.isle line 129. 9995 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9996 let expr1_0 = 9997 constructor_sink_sload32(ctx, pattern8_0)?; 9998 let expr2_0 = constructor_sub_mem_sext32( 9999 ctx, pattern3_0, expr0_0, &expr1_0, 10000 )?; 10001 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10002 return Some(expr3_0); 10003 } 10004 } 10005 _ => {} 10006 } 10007 } 10008 } 10009 let pattern8_0 = C::value_type(ctx, pattern7_1); 10010 if pattern8_0 == I16 { 10011 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10012 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10013 if let &InstructionData::Load { 10014 opcode: ref pattern12_0, 10015 arg: pattern12_1, 10016 flags: pattern12_2, 10017 offset: pattern12_3, 10018 } = &pattern11_0 10019 { 10020 if let &Opcode::Load = pattern12_0 { 10021 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10022 // Rule at src/isa/s390x/lower.isle line 123. 10023 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10024 let expr1_0 = 10025 constructor_sink_load(ctx, pattern10_0)?; 10026 let expr2_0 = constructor_sub_mem_sext16( 10027 ctx, pattern3_0, expr0_0, &expr1_0, 10028 )?; 10029 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10030 return Some(expr3_0); 10031 } 10032 } 10033 } 10034 } 10035 } 10036 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10037 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10038 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10039 if let &InstructionData::Load { 10040 opcode: ref pattern12_0, 10041 arg: pattern12_1, 10042 flags: pattern12_2, 10043 offset: pattern12_3, 10044 } = &pattern11_0 10045 { 10046 if let &Opcode::Load = pattern12_0 { 10047 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10048 // Rule at src/isa/s390x/lower.isle line 119. 10049 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10050 let expr1_0 = 10051 constructor_sink_load(ctx, pattern10_0)?; 10052 let expr2_0 = constructor_sub_mem( 10053 ctx, pattern3_0, expr0_0, &expr1_0, 10054 )?; 10055 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10056 return Some(expr3_0); 10057 } 10058 } 10059 } 10060 } 10061 } 10062 // Rule at src/isa/s390x/lower.isle line 105. 10063 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10064 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10065 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10066 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10067 return Some(expr3_0); 10068 } 10069 &Opcode::Imul => { 10070 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10071 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10072 // Rule at src/isa/s390x/lower.isle line 212. 10073 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10074 let expr1_0 = 10075 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10076 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10077 return Some(expr2_0); 10078 } 10079 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10080 // Rule at src/isa/s390x/lower.isle line 216. 10081 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10082 let expr1_0 = 10083 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10084 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10085 return Some(expr2_0); 10086 } 10087 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10088 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10089 if let &InstructionData::Unary { 10090 opcode: ref pattern10_0, 10091 arg: pattern10_1, 10092 } = &pattern9_0 10093 { 10094 if let &Opcode::Sextend = pattern10_0 { 10095 let pattern12_0 = C::value_type(ctx, pattern10_1); 10096 if pattern12_0 == I32 { 10097 // Rule at src/isa/s390x/lower.isle line 206. 10098 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10099 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10100 let expr2_0 = constructor_mul_reg_sext32( 10101 ctx, pattern3_0, expr0_0, expr1_0, 10102 )?; 10103 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10104 return Some(expr3_0); 10105 } 10106 } 10107 } 10108 } 10109 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10110 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10111 if let &InstructionData::Load { 10112 opcode: ref pattern10_0, 10113 arg: pattern10_1, 10114 flags: pattern10_2, 10115 offset: pattern10_3, 10116 } = &pattern9_0 10117 { 10118 match pattern10_0 { 10119 &Opcode::Sload16 => { 10120 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10121 // Rule at src/isa/s390x/lower.isle line 234. 10122 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10123 let expr1_0 = 10124 constructor_sink_sload16(ctx, pattern8_0)?; 10125 let expr2_0 = constructor_mul_mem_sext16( 10126 ctx, pattern3_0, expr0_0, &expr1_0, 10127 )?; 10128 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10129 return Some(expr3_0); 10130 } 10131 } 10132 &Opcode::Sload32 => { 10133 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10134 // Rule at src/isa/s390x/lower.isle line 238. 10135 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10136 let expr1_0 = 10137 constructor_sink_sload32(ctx, pattern8_0)?; 10138 let expr2_0 = constructor_mul_mem_sext32( 10139 ctx, pattern3_0, expr0_0, &expr1_0, 10140 )?; 10141 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10142 return Some(expr3_0); 10143 } 10144 } 10145 _ => {} 10146 } 10147 } 10148 } 10149 let pattern8_0 = C::value_type(ctx, pattern7_0); 10150 if pattern8_0 == I16 { 10151 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10152 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10153 if let &InstructionData::Load { 10154 opcode: ref pattern12_0, 10155 arg: pattern12_1, 10156 flags: pattern12_2, 10157 offset: pattern12_3, 10158 } = &pattern11_0 10159 { 10160 if let &Opcode::Load = pattern12_0 { 10161 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10162 // Rule at src/isa/s390x/lower.isle line 228. 10163 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10164 let expr1_0 = 10165 constructor_sink_load(ctx, pattern10_0)?; 10166 let expr2_0 = constructor_mul_mem_sext16( 10167 ctx, pattern3_0, expr0_0, &expr1_0, 10168 )?; 10169 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10170 return Some(expr3_0); 10171 } 10172 } 10173 } 10174 } 10175 } 10176 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10177 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10178 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10179 if let &InstructionData::Load { 10180 opcode: ref pattern12_0, 10181 arg: pattern12_1, 10182 flags: pattern12_2, 10183 offset: pattern12_3, 10184 } = &pattern11_0 10185 { 10186 if let &Opcode::Load = pattern12_0 { 10187 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10188 // Rule at src/isa/s390x/lower.isle line 222. 10189 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10190 let expr1_0 = 10191 constructor_sink_load(ctx, pattern10_0)?; 10192 let expr2_0 = constructor_mul_mem( 10193 ctx, pattern3_0, expr0_0, &expr1_0, 10194 )?; 10195 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10196 return Some(expr3_0); 10197 } 10198 } 10199 } 10200 } 10201 } 10202 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10203 // Rule at src/isa/s390x/lower.isle line 210. 10204 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10205 let expr1_0 = 10206 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10207 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10208 return Some(expr2_0); 10209 } 10210 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10211 // Rule at src/isa/s390x/lower.isle line 214. 10212 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10213 let expr1_0 = 10214 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10215 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10216 return Some(expr2_0); 10217 } 10218 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10219 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10220 if let &InstructionData::Unary { 10221 opcode: ref pattern10_0, 10222 arg: pattern10_1, 10223 } = &pattern9_0 10224 { 10225 if let &Opcode::Sextend = pattern10_0 { 10226 let pattern12_0 = C::value_type(ctx, pattern10_1); 10227 if pattern12_0 == I32 { 10228 // Rule at src/isa/s390x/lower.isle line 204. 10229 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10230 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10231 let expr2_0 = constructor_mul_reg_sext32( 10232 ctx, pattern3_0, expr0_0, expr1_0, 10233 )?; 10234 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10235 return Some(expr3_0); 10236 } 10237 } 10238 } 10239 } 10240 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10241 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10242 if let &InstructionData::Load { 10243 opcode: ref pattern10_0, 10244 arg: pattern10_1, 10245 flags: pattern10_2, 10246 offset: pattern10_3, 10247 } = &pattern9_0 10248 { 10249 match pattern10_0 { 10250 &Opcode::Sload16 => { 10251 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10252 // Rule at src/isa/s390x/lower.isle line 232. 10253 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10254 let expr1_0 = 10255 constructor_sink_sload16(ctx, pattern8_0)?; 10256 let expr2_0 = constructor_mul_mem_sext16( 10257 ctx, pattern3_0, expr0_0, &expr1_0, 10258 )?; 10259 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10260 return Some(expr3_0); 10261 } 10262 } 10263 &Opcode::Sload32 => { 10264 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10265 // Rule at src/isa/s390x/lower.isle line 236. 10266 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10267 let expr1_0 = 10268 constructor_sink_sload32(ctx, pattern8_0)?; 10269 let expr2_0 = constructor_mul_mem_sext32( 10270 ctx, pattern3_0, expr0_0, &expr1_0, 10271 )?; 10272 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10273 return Some(expr3_0); 10274 } 10275 } 10276 _ => {} 10277 } 10278 } 10279 } 10280 let pattern8_0 = C::value_type(ctx, pattern7_1); 10281 if pattern8_0 == I16 { 10282 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10283 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10284 if let &InstructionData::Load { 10285 opcode: ref pattern12_0, 10286 arg: pattern12_1, 10287 flags: pattern12_2, 10288 offset: pattern12_3, 10289 } = &pattern11_0 10290 { 10291 if let &Opcode::Load = pattern12_0 { 10292 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10293 // Rule at src/isa/s390x/lower.isle line 226. 10294 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10295 let expr1_0 = 10296 constructor_sink_load(ctx, pattern10_0)?; 10297 let expr2_0 = constructor_mul_mem_sext16( 10298 ctx, pattern3_0, expr0_0, &expr1_0, 10299 )?; 10300 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10301 return Some(expr3_0); 10302 } 10303 } 10304 } 10305 } 10306 } 10307 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10308 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10309 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10310 if let &InstructionData::Load { 10311 opcode: ref pattern12_0, 10312 arg: pattern12_1, 10313 flags: pattern12_2, 10314 offset: pattern12_3, 10315 } = &pattern11_0 10316 { 10317 if let &Opcode::Load = pattern12_0 { 10318 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10319 // Rule at src/isa/s390x/lower.isle line 220. 10320 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10321 let expr1_0 = 10322 constructor_sink_load(ctx, pattern10_0)?; 10323 let expr2_0 = constructor_mul_mem( 10324 ctx, pattern3_0, expr0_0, &expr1_0, 10325 )?; 10326 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10327 return Some(expr3_0); 10328 } 10329 } 10330 } 10331 } 10332 } 10333 // Rule at src/isa/s390x/lower.isle line 200. 10334 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10335 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10336 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10337 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10338 return Some(expr3_0); 10339 } 10340 &Opcode::Udiv => { 10341 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10342 // Rule at src/isa/s390x/lower.isle line 303. 10343 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10344 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10345 let expr2_0: u64 = 0; 10346 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10347 let expr4_0 = 10348 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10349 let expr5_0 = 10350 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10351 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10352 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10353 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10354 ctx, expr0_0, expr7_0, expr6_0, 10355 )?; 10356 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10357 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10358 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10359 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10360 return Some(expr12_0); 10361 } 10362 &Opcode::Sdiv => { 10363 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10364 // Rule at src/isa/s390x/lower.isle line 375. 10365 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10366 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10367 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10368 let expr3_0 = 10369 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10370 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10371 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10372 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10373 ctx, expr0_0, expr5_0, expr4_0, 10374 )?; 10375 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10376 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10377 )?; 10378 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10379 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10380 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10381 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10382 return Some(expr11_0); 10383 } 10384 &Opcode::Urem => { 10385 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10386 // Rule at src/isa/s390x/lower.isle line 326. 10387 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10388 let expr1_0: u64 = 0; 10389 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10390 let expr3_0 = 10391 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10392 let expr4_0 = 10393 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10394 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10395 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10396 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10397 ctx, expr0_0, expr6_0, expr5_0, 10398 )?; 10399 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10400 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10401 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10402 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10403 return Some(expr11_0); 10404 } 10405 &Opcode::Srem => { 10406 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10407 // Rule at src/isa/s390x/lower.isle line 398. 10408 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10409 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10410 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10411 let expr3_0 = 10412 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10413 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10414 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10415 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10416 ctx, expr0_0, expr5_0, expr4_0, 10417 )?; 10418 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10419 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10420 )?; 10421 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10422 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10423 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10424 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10425 return Some(expr11_0); 10426 } 10427 &Opcode::IaddIfcout => { 10428 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10429 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10430 // Rule at src/isa/s390x/lower.isle line 170. 10431 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10432 let expr1_0 = constructor_add_logical_zimm32( 10433 ctx, pattern3_0, expr0_0, pattern8_0, 10434 )?; 10435 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10436 return Some(expr2_0); 10437 } 10438 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10439 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10440 if let &InstructionData::Unary { 10441 opcode: ref pattern10_0, 10442 arg: pattern10_1, 10443 } = &pattern9_0 10444 { 10445 if let &Opcode::Uextend = pattern10_0 { 10446 let pattern12_0 = C::value_type(ctx, pattern10_1); 10447 if pattern12_0 == I32 { 10448 // Rule at src/isa/s390x/lower.isle line 164. 10449 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10450 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10451 let expr2_0 = constructor_add_logical_reg_zext32( 10452 ctx, pattern3_0, expr0_0, expr1_0, 10453 )?; 10454 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10455 return Some(expr3_0); 10456 } 10457 } 10458 } 10459 } 10460 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10461 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10462 if let &InstructionData::Load { 10463 opcode: ref pattern10_0, 10464 arg: pattern10_1, 10465 flags: pattern10_2, 10466 offset: pattern10_3, 10467 } = &pattern9_0 10468 { 10469 if let &Opcode::Uload32 = pattern10_0 { 10470 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10471 // Rule at src/isa/s390x/lower.isle line 182. 10472 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10473 let expr1_0 = 10474 constructor_sink_uload32(ctx, pattern8_0)?; 10475 let expr2_0 = constructor_add_logical_mem_zext32( 10476 ctx, pattern3_0, expr0_0, &expr1_0, 10477 )?; 10478 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10479 return Some(expr3_0); 10480 } 10481 } 10482 } 10483 } 10484 let pattern8_0 = C::value_type(ctx, pattern7_0); 10485 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10486 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10487 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10488 if let &InstructionData::Load { 10489 opcode: ref pattern12_0, 10490 arg: pattern12_1, 10491 flags: pattern12_2, 10492 offset: pattern12_3, 10493 } = &pattern11_0 10494 { 10495 if let &Opcode::Load = pattern12_0 { 10496 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10497 // Rule at src/isa/s390x/lower.isle line 176. 10498 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10499 let expr1_0 = 10500 constructor_sink_load(ctx, pattern10_0)?; 10501 let expr2_0 = constructor_add_logical_mem( 10502 ctx, pattern3_0, expr0_0, &expr1_0, 10503 )?; 10504 let expr3_0 = 10505 constructor_output_ifcout(ctx, expr2_0)?; 10506 return Some(expr3_0); 10507 } 10508 } 10509 } 10510 } 10511 } 10512 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10513 // Rule at src/isa/s390x/lower.isle line 168. 10514 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10515 let expr1_0 = constructor_add_logical_zimm32( 10516 ctx, pattern3_0, expr0_0, pattern8_0, 10517 )?; 10518 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10519 return Some(expr2_0); 10520 } 10521 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10522 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10523 if let &InstructionData::Unary { 10524 opcode: ref pattern10_0, 10525 arg: pattern10_1, 10526 } = &pattern9_0 10527 { 10528 if let &Opcode::Uextend = pattern10_0 { 10529 let pattern12_0 = C::value_type(ctx, pattern10_1); 10530 if pattern12_0 == I32 { 10531 // Rule at src/isa/s390x/lower.isle line 162. 10532 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10533 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10534 let expr2_0 = constructor_add_logical_reg_zext32( 10535 ctx, pattern3_0, expr0_0, expr1_0, 10536 )?; 10537 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10538 return Some(expr3_0); 10539 } 10540 } 10541 } 10542 } 10543 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10544 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10545 if let &InstructionData::Load { 10546 opcode: ref pattern10_0, 10547 arg: pattern10_1, 10548 flags: pattern10_2, 10549 offset: pattern10_3, 10550 } = &pattern9_0 10551 { 10552 if let &Opcode::Uload32 = pattern10_0 { 10553 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10554 // Rule at src/isa/s390x/lower.isle line 180. 10555 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10556 let expr1_0 = 10557 constructor_sink_uload32(ctx, pattern8_0)?; 10558 let expr2_0 = constructor_add_logical_mem_zext32( 10559 ctx, pattern3_0, expr0_0, &expr1_0, 10560 )?; 10561 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10562 return Some(expr3_0); 10563 } 10564 } 10565 } 10566 } 10567 let pattern8_0 = C::value_type(ctx, pattern7_1); 10568 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10569 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10570 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10571 if let &InstructionData::Load { 10572 opcode: ref pattern12_0, 10573 arg: pattern12_1, 10574 flags: pattern12_2, 10575 offset: pattern12_3, 10576 } = &pattern11_0 10577 { 10578 if let &Opcode::Load = pattern12_0 { 10579 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10580 // Rule at src/isa/s390x/lower.isle line 174. 10581 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10582 let expr1_0 = 10583 constructor_sink_load(ctx, pattern10_0)?; 10584 let expr2_0 = constructor_add_logical_mem( 10585 ctx, pattern3_0, expr0_0, &expr1_0, 10586 )?; 10587 let expr3_0 = 10588 constructor_output_ifcout(ctx, expr2_0)?; 10589 return Some(expr3_0); 10590 } 10591 } 10592 } 10593 } 10594 } 10595 // Rule at src/isa/s390x/lower.isle line 158. 10596 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10597 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10598 let expr2_0 = 10599 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10600 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10601 return Some(expr3_0); 10602 } 10603 &Opcode::Band => { 10604 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10605 let pattern8_0 = C::value_type(ctx, pattern7_0); 10606 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10607 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10608 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10609 if let &InstructionData::Load { 10610 opcode: ref pattern12_0, 10611 arg: pattern12_1, 10612 flags: pattern12_2, 10613 offset: pattern12_3, 10614 } = &pattern11_0 10615 { 10616 if let &Opcode::Load = pattern12_0 { 10617 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10618 // Rule at src/isa/s390x/lower.isle line 653. 10619 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10620 let expr1_0 = 10621 constructor_sink_load(ctx, pattern10_0)?; 10622 let expr2_0 = constructor_and_mem( 10623 ctx, pattern3_0, expr0_0, &expr1_0, 10624 )?; 10625 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10626 return Some(expr3_0); 10627 } 10628 } 10629 } 10630 } 10631 } 10632 if let Some(pattern8_0) = 10633 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10634 { 10635 // Rule at src/isa/s390x/lower.isle line 647. 10636 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10637 let expr1_0 = constructor_and_uimm32shifted( 10638 ctx, pattern3_0, expr0_0, pattern8_0, 10639 )?; 10640 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10641 return Some(expr2_0); 10642 } 10643 if let Some(pattern8_0) = 10644 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10645 { 10646 // Rule at src/isa/s390x/lower.isle line 643. 10647 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10648 let expr1_0 = constructor_and_uimm16shifted( 10649 ctx, pattern3_0, expr0_0, pattern8_0, 10650 )?; 10651 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10652 return Some(expr2_0); 10653 } 10654 let pattern8_0 = C::value_type(ctx, pattern7_1); 10655 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10656 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10657 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10658 if let &InstructionData::Load { 10659 opcode: ref pattern12_0, 10660 arg: pattern12_1, 10661 flags: pattern12_2, 10662 offset: pattern12_3, 10663 } = &pattern11_0 10664 { 10665 if let &Opcode::Load = pattern12_0 { 10666 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10667 // Rule at src/isa/s390x/lower.isle line 651. 10668 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10669 let expr1_0 = 10670 constructor_sink_load(ctx, pattern10_0)?; 10671 let expr2_0 = constructor_and_mem( 10672 ctx, pattern3_0, expr0_0, &expr1_0, 10673 )?; 10674 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10675 return Some(expr3_0); 10676 } 10677 } 10678 } 10679 } 10680 } 10681 if let Some(pattern8_0) = 10682 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10683 { 10684 // Rule at src/isa/s390x/lower.isle line 645. 10685 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10686 let expr1_0 = constructor_and_uimm32shifted( 10687 ctx, pattern3_0, expr0_0, pattern8_0, 10688 )?; 10689 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10690 return Some(expr2_0); 10691 } 10692 if let Some(pattern8_0) = 10693 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10694 { 10695 // Rule at src/isa/s390x/lower.isle line 641. 10696 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10697 let expr1_0 = constructor_and_uimm16shifted( 10698 ctx, pattern3_0, expr0_0, pattern8_0, 10699 )?; 10700 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10701 return Some(expr2_0); 10702 } 10703 // Rule at src/isa/s390x/lower.isle line 637. 10704 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10705 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10706 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10707 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10708 return Some(expr3_0); 10709 } 10710 &Opcode::Bor => { 10711 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10712 let pattern8_0 = C::value_type(ctx, pattern7_0); 10713 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10714 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10715 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10716 if let &InstructionData::Load { 10717 opcode: ref pattern12_0, 10718 arg: pattern12_1, 10719 flags: pattern12_2, 10720 offset: pattern12_3, 10721 } = &pattern11_0 10722 { 10723 if let &Opcode::Load = pattern12_0 { 10724 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10725 // Rule at src/isa/s390x/lower.isle line 676. 10726 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10727 let expr1_0 = 10728 constructor_sink_load(ctx, pattern10_0)?; 10729 let expr2_0 = constructor_or_mem( 10730 ctx, pattern3_0, expr0_0, &expr1_0, 10731 )?; 10732 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10733 return Some(expr3_0); 10734 } 10735 } 10736 } 10737 } 10738 } 10739 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10740 // Rule at src/isa/s390x/lower.isle line 670. 10741 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10742 let expr1_0 = constructor_or_uimm32shifted( 10743 ctx, pattern3_0, expr0_0, pattern8_0, 10744 )?; 10745 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10746 return Some(expr2_0); 10747 } 10748 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10749 // Rule at src/isa/s390x/lower.isle line 666. 10750 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10751 let expr1_0 = constructor_or_uimm16shifted( 10752 ctx, pattern3_0, expr0_0, pattern8_0, 10753 )?; 10754 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10755 return Some(expr2_0); 10756 } 10757 let pattern8_0 = C::value_type(ctx, pattern7_1); 10758 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10759 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10760 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10761 if let &InstructionData::Load { 10762 opcode: ref pattern12_0, 10763 arg: pattern12_1, 10764 flags: pattern12_2, 10765 offset: pattern12_3, 10766 } = &pattern11_0 10767 { 10768 if let &Opcode::Load = pattern12_0 { 10769 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10770 // Rule at src/isa/s390x/lower.isle line 674. 10771 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10772 let expr1_0 = 10773 constructor_sink_load(ctx, pattern10_0)?; 10774 let expr2_0 = constructor_or_mem( 10775 ctx, pattern3_0, expr0_0, &expr1_0, 10776 )?; 10777 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10778 return Some(expr3_0); 10779 } 10780 } 10781 } 10782 } 10783 } 10784 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10785 // Rule at src/isa/s390x/lower.isle line 668. 10786 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10787 let expr1_0 = constructor_or_uimm32shifted( 10788 ctx, pattern3_0, expr0_0, pattern8_0, 10789 )?; 10790 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10791 return Some(expr2_0); 10792 } 10793 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10794 // Rule at src/isa/s390x/lower.isle line 664. 10795 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10796 let expr1_0 = constructor_or_uimm16shifted( 10797 ctx, pattern3_0, expr0_0, pattern8_0, 10798 )?; 10799 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10800 return Some(expr2_0); 10801 } 10802 // Rule at src/isa/s390x/lower.isle line 660. 10803 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10804 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10805 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10806 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10807 return Some(expr3_0); 10808 } 10809 &Opcode::Bxor => { 10810 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10811 let pattern8_0 = C::value_type(ctx, pattern7_0); 10812 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10813 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10814 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10815 if let &InstructionData::Load { 10816 opcode: ref pattern12_0, 10817 arg: pattern12_1, 10818 flags: pattern12_2, 10819 offset: pattern12_3, 10820 } = &pattern11_0 10821 { 10822 if let &Opcode::Load = pattern12_0 { 10823 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10824 // Rule at src/isa/s390x/lower.isle line 695. 10825 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10826 let expr1_0 = 10827 constructor_sink_load(ctx, pattern10_0)?; 10828 let expr2_0 = constructor_xor_mem( 10829 ctx, pattern3_0, expr0_0, &expr1_0, 10830 )?; 10831 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10832 return Some(expr3_0); 10833 } 10834 } 10835 } 10836 } 10837 } 10838 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10839 // Rule at src/isa/s390x/lower.isle line 689. 10840 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10841 let expr1_0 = constructor_xor_uimm32shifted( 10842 ctx, pattern3_0, expr0_0, pattern8_0, 10843 )?; 10844 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10845 return Some(expr2_0); 10846 } 10847 let pattern8_0 = C::value_type(ctx, pattern7_1); 10848 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10849 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10850 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10851 if let &InstructionData::Load { 10852 opcode: ref pattern12_0, 10853 arg: pattern12_1, 10854 flags: pattern12_2, 10855 offset: pattern12_3, 10856 } = &pattern11_0 10857 { 10858 if let &Opcode::Load = pattern12_0 { 10859 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10860 // Rule at src/isa/s390x/lower.isle line 693. 10861 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10862 let expr1_0 = 10863 constructor_sink_load(ctx, pattern10_0)?; 10864 let expr2_0 = constructor_xor_mem( 10865 ctx, pattern3_0, expr0_0, &expr1_0, 10866 )?; 10867 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10868 return Some(expr3_0); 10869 } 10870 } 10871 } 10872 } 10873 } 10874 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10875 // Rule at src/isa/s390x/lower.isle line 687. 10876 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10877 let expr1_0 = constructor_xor_uimm32shifted( 10878 ctx, pattern3_0, expr0_0, pattern8_0, 10879 )?; 10880 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10881 return Some(expr2_0); 10882 } 10883 // Rule at src/isa/s390x/lower.isle line 683. 10884 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10885 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10886 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10887 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10888 return Some(expr3_0); 10889 } 10890 &Opcode::Ishl => { 10891 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10892 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10893 // Rule at src/isa/s390x/lower.isle line 482. 10894 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10895 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10896 let expr2_0 = 10897 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10898 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10899 return Some(expr3_0); 10900 } 10901 // Rule at src/isa/s390x/lower.isle line 477. 10902 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10903 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10904 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10905 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10906 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10907 return Some(expr4_0); 10908 } 10909 &Opcode::Ushr => { 10910 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10911 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10912 // Rule at src/isa/s390x/lower.isle line 498. 10913 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10914 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10915 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10916 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10917 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10918 return Some(expr4_0); 10919 } 10920 // Rule at src/isa/s390x/lower.isle line 491. 10921 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10922 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10923 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10924 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10925 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10926 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10927 return Some(expr5_0); 10928 } 10929 &Opcode::Sshr => { 10930 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10931 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10932 // Rule at src/isa/s390x/lower.isle line 515. 10933 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10934 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10935 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10936 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10937 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10938 return Some(expr4_0); 10939 } 10940 // Rule at src/isa/s390x/lower.isle line 508. 10941 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10942 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10943 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10944 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10945 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10946 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10947 return Some(expr5_0); 10948 } 10949 _ => {} 10950 } 10951 } 10952 &InstructionData::Unary { 10953 opcode: ref pattern5_0, 10954 arg: pattern5_1, 10955 } => { 10956 match pattern5_0 { 10957 &Opcode::Ineg => { 10958 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10959 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10960 if let &InstructionData::Unary { 10961 opcode: ref pattern9_0, 10962 arg: pattern9_1, 10963 } = &pattern8_0 10964 { 10965 if let &Opcode::Sextend = pattern9_0 { 10966 let pattern11_0 = C::value_type(ctx, pattern9_1); 10967 if pattern11_0 == I32 { 10968 // Rule at src/isa/s390x/lower.isle line 193. 10969 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10970 let expr1_0 = constructor_neg_reg_sext32( 10971 ctx, pattern3_0, expr0_0, 10972 )?; 10973 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10974 return Some(expr2_0); 10975 } 10976 } 10977 } 10978 } 10979 // Rule at src/isa/s390x/lower.isle line 189. 10980 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10981 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10982 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10983 return Some(expr2_0); 10984 } 10985 &Opcode::Iabs => { 10986 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10987 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10988 if let &InstructionData::Unary { 10989 opcode: ref pattern9_0, 10990 arg: pattern9_1, 10991 } = &pattern8_0 10992 { 10993 if let &Opcode::Sextend = pattern9_0 { 10994 let pattern11_0 = C::value_type(ctx, pattern9_1); 10995 if pattern11_0 == I32 { 10996 // Rule at src/isa/s390x/lower.isle line 141. 10997 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10998 let expr1_0 = constructor_abs_reg_sext32( 10999 ctx, pattern3_0, expr0_0, 11000 )?; 11001 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11002 return Some(expr2_0); 11003 } 11004 } 11005 } 11006 } 11007 // Rule at src/isa/s390x/lower.isle line 137. 11008 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11009 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11010 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 11011 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11012 return Some(expr3_0); 11013 } 11014 &Opcode::Clz => { 11015 // Rule at src/isa/s390x/lower.isle line 821. 11016 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11017 let expr1_0: i16 = 64; 11018 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 11019 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 11020 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 11021 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11022 return Some(expr5_0); 11023 } 11024 &Opcode::Cls => { 11025 // Rule at src/isa/s390x/lower.isle line 836. 11026 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11027 let expr1_0: Type = I64; 11028 let expr2_0: u8 = 63; 11029 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11030 let expr4_0: Type = I64; 11031 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11032 let expr6_0: i16 = 64; 11033 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11034 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11035 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11036 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11037 return Some(expr10_0); 11038 } 11039 &Opcode::Bint => { 11040 // Rule at src/isa/s390x/lower.isle line 804. 11041 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11042 let expr1_0: u64 = 1; 11043 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11044 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11045 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11046 return Some(expr4_0); 11047 } 11048 _ => {} 11049 } 11050 } 11051 _ => {} 11052 } 11053 } 11054 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11055 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11056 match &pattern4_0 { 11057 &InstructionData::Binary { 11058 opcode: ref pattern5_0, 11059 args: ref pattern5_1, 11060 } => { 11061 match pattern5_0 { 11062 &Opcode::Rotl => { 11063 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11064 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11065 // Rule at src/isa/s390x/lower.isle line 528. 11066 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11067 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11068 let expr2_0 = 11069 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11070 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11071 return Some(expr3_0); 11072 } 11073 // Rule at src/isa/s390x/lower.isle line 524. 11074 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11075 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11076 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11077 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11078 return Some(expr3_0); 11079 } 11080 &Opcode::Rotr => { 11081 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11082 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11083 // Rule at src/isa/s390x/lower.isle line 566. 11084 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11085 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11086 let expr2_0 = 11087 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11088 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11089 return Some(expr3_0); 11090 } 11091 // Rule at src/isa/s390x/lower.isle line 560. 11092 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11093 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11094 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11095 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11096 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11097 return Some(expr4_0); 11098 } 11099 _ => {} 11100 } 11101 } 11102 &InstructionData::AtomicRmw { 11103 opcode: ref pattern5_0, 11104 args: ref pattern5_1, 11105 flags: pattern5_2, 11106 op: ref pattern5_3, 11107 } => { 11108 if let &Opcode::AtomicRmw = pattern5_0 { 11109 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11110 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11111 match pattern5_3 { 11112 &AtomicRmwOp::And => { 11113 // Rule at src/isa/s390x/lower.isle line 1505. 11114 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11115 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11116 let expr2_0 = C::zero_offset(ctx); 11117 let expr3_0 = constructor_lower_address( 11118 ctx, pattern5_2, pattern7_0, expr2_0, 11119 )?; 11120 let expr4_0 = constructor_atomic_rmw_and( 11121 ctx, pattern3_0, expr1_0, &expr3_0, 11122 )?; 11123 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11124 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11125 return Some(expr6_0); 11126 } 11127 &AtomicRmwOp::Or => { 11128 // Rule at src/isa/s390x/lower.isle line 1517. 11129 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11130 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11131 let expr2_0 = C::zero_offset(ctx); 11132 let expr3_0 = constructor_lower_address( 11133 ctx, pattern5_2, pattern7_0, expr2_0, 11134 )?; 11135 let expr4_0 = constructor_atomic_rmw_or( 11136 ctx, pattern3_0, expr1_0, &expr3_0, 11137 )?; 11138 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11139 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11140 return Some(expr6_0); 11141 } 11142 &AtomicRmwOp::Xor => { 11143 // Rule at src/isa/s390x/lower.isle line 1529. 11144 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11145 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11146 let expr2_0 = C::zero_offset(ctx); 11147 let expr3_0 = constructor_lower_address( 11148 ctx, pattern5_2, pattern7_0, expr2_0, 11149 )?; 11150 let expr4_0 = constructor_atomic_rmw_xor( 11151 ctx, pattern3_0, expr1_0, &expr3_0, 11152 )?; 11153 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11154 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11155 return Some(expr6_0); 11156 } 11157 _ => {} 11158 } 11159 } 11160 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11161 match pattern5_3 { 11162 &AtomicRmwOp::Add => { 11163 // Rule at src/isa/s390x/lower.isle line 1535. 11164 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11165 let expr1_0 = C::zero_offset(ctx); 11166 let expr2_0 = constructor_lower_address( 11167 ctx, pattern5_2, pattern7_0, expr1_0, 11168 )?; 11169 let expr3_0 = constructor_atomic_rmw_add( 11170 ctx, pattern3_0, expr0_0, &expr2_0, 11171 )?; 11172 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11173 return Some(expr4_0); 11174 } 11175 &AtomicRmwOp::And => { 11176 // Rule at src/isa/s390x/lower.isle line 1499. 11177 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11178 let expr1_0 = C::zero_offset(ctx); 11179 let expr2_0 = constructor_lower_address( 11180 ctx, pattern5_2, pattern7_0, expr1_0, 11181 )?; 11182 let expr3_0 = constructor_atomic_rmw_and( 11183 ctx, pattern3_0, expr0_0, &expr2_0, 11184 )?; 11185 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11186 return Some(expr4_0); 11187 } 11188 &AtomicRmwOp::Or => { 11189 // Rule at src/isa/s390x/lower.isle line 1511. 11190 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11191 let expr1_0 = C::zero_offset(ctx); 11192 let expr2_0 = constructor_lower_address( 11193 ctx, pattern5_2, pattern7_0, expr1_0, 11194 )?; 11195 let expr3_0 = constructor_atomic_rmw_or( 11196 ctx, pattern3_0, expr0_0, &expr2_0, 11197 )?; 11198 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11199 return Some(expr4_0); 11200 } 11201 &AtomicRmwOp::Sub => { 11202 // Rule at src/isa/s390x/lower.isle line 1541. 11203 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11204 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11205 let expr2_0 = C::zero_offset(ctx); 11206 let expr3_0 = constructor_lower_address( 11207 ctx, pattern5_2, pattern7_0, expr2_0, 11208 )?; 11209 let expr4_0 = constructor_atomic_rmw_add( 11210 ctx, pattern3_0, expr1_0, &expr3_0, 11211 )?; 11212 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11213 return Some(expr5_0); 11214 } 11215 &AtomicRmwOp::Xor => { 11216 // Rule at src/isa/s390x/lower.isle line 1523. 11217 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11218 let expr1_0 = C::zero_offset(ctx); 11219 let expr2_0 = constructor_lower_address( 11220 ctx, pattern5_2, pattern7_0, expr1_0, 11221 )?; 11222 let expr3_0 = constructor_atomic_rmw_xor( 11223 ctx, pattern3_0, expr0_0, &expr2_0, 11224 )?; 11225 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11226 return Some(expr4_0); 11227 } 11228 _ => {} 11229 } 11230 } 11231 // Rule at src/isa/s390x/lower.isle line 1550. 11232 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11233 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11234 let expr2_0 = C::inst_builder_new(ctx); 11235 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11236 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11237 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11238 let expr6_0 = constructor_atomic_rmw_body( 11239 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11240 expr0_0, 11241 )?; 11242 let expr7_0 = constructor_casloop( 11243 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11244 )?; 11245 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11246 return Some(expr8_0); 11247 } 11248 } 11249 &InstructionData::AtomicCas { 11250 opcode: ref pattern5_0, 11251 args: ref pattern5_1, 11252 flags: pattern5_2, 11253 } => { 11254 if let &Opcode::AtomicCas = pattern5_0 { 11255 let (pattern7_0, pattern7_1, pattern7_2) = 11256 C::unpack_value_array_3(ctx, pattern5_1); 11257 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11258 // Rule at src/isa/s390x/lower.isle line 1762. 11259 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11260 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11261 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11262 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11263 let expr4_0 = C::zero_offset(ctx); 11264 let expr5_0 = 11265 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11266 let expr6_0 = constructor_atomic_cas_impl( 11267 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11268 )?; 11269 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11270 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11271 return Some(expr8_0); 11272 } 11273 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11274 // Rule at src/isa/s390x/lower.isle line 1755. 11275 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11276 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11277 let expr2_0 = C::zero_offset(ctx); 11278 let expr3_0 = 11279 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11280 let expr4_0 = constructor_atomic_cas_impl( 11281 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11282 )?; 11283 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11284 return Some(expr5_0); 11285 } 11286 } 11287 } 11288 &InstructionData::Unary { 11289 opcode: ref pattern5_0, 11290 arg: pattern5_1, 11291 } => { 11292 match pattern5_0 { 11293 &Opcode::FcvtToUint => { 11294 let pattern7_0 = C::value_type(ctx, pattern5_1); 11295 // Rule at src/isa/s390x/lower.isle line 1057. 11296 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11297 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11298 let expr2_0 = FloatCC::Unordered; 11299 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11300 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11301 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11302 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11303 ctx, pattern3_0, pattern7_0, expr0_0, 11304 )?; 11305 let expr7_0 = FloatCC::Unordered; 11306 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11307 let expr9_0 = C::trap_code_integer_overflow(ctx); 11308 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11309 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11310 return Some(expr11_0); 11311 } 11312 &Opcode::FcvtToUintSat => { 11313 let pattern7_0 = C::value_type(ctx, pattern5_1); 11314 // Rule at src/isa/s390x/lower.isle line 1098. 11315 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11316 let expr1_0 = 11317 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11318 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11319 let expr3_0 = FloatCC::Unordered; 11320 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11321 let expr5_0: i16 = 0; 11322 let expr6_0 = 11323 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11324 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11325 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11326 return Some(expr8_0); 11327 } 11328 &Opcode::FcvtToSint => { 11329 let pattern7_0 = C::value_type(ctx, pattern5_1); 11330 // Rule at src/isa/s390x/lower.isle line 1078. 11331 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11332 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11333 let expr2_0 = FloatCC::Unordered; 11334 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11335 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11336 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11337 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11338 ctx, pattern3_0, pattern7_0, expr0_0, 11339 )?; 11340 let expr7_0 = FloatCC::Unordered; 11341 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11342 let expr9_0 = C::trap_code_integer_overflow(ctx); 11343 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11344 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11345 return Some(expr11_0); 11346 } 11347 &Opcode::FcvtToSintSat => { 11348 let pattern7_0 = C::value_type(ctx, pattern5_1); 11349 // Rule at src/isa/s390x/lower.isle line 1115. 11350 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11351 let expr1_0 = 11352 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11353 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11354 let expr3_0 = FloatCC::Unordered; 11355 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11356 let expr5_0: i16 = 0; 11357 let expr6_0 = 11358 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11359 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11360 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11361 return Some(expr8_0); 11362 } 11363 _ => {} 11364 } 11365 } 11366 _ => {} 11367 } 11368 } 11369 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11370 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11371 match &pattern4_0 { 11372 &InstructionData::Binary { 11373 opcode: ref pattern5_0, 11374 args: ref pattern5_1, 11375 } => { 11376 match pattern5_0 { 11377 &Opcode::Umulhi => { 11378 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11379 // Rule at src/isa/s390x/lower.isle line 245. 11380 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11381 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11382 let expr2_0: Type = I32; 11383 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11384 let expr4_0: Type = I32; 11385 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11386 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11387 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11388 return Some(expr7_0); 11389 } 11390 &Opcode::Smulhi => { 11391 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11392 // Rule at src/isa/s390x/lower.isle line 267. 11393 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11394 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11395 let expr2_0: Type = I32; 11396 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11397 let expr4_0: Type = I32; 11398 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11399 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11400 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11401 return Some(expr7_0); 11402 } 11403 &Opcode::Rotl => { 11404 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11405 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11406 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11407 { 11408 // Rule at src/isa/s390x/lower.isle line 546. 11409 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11410 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11411 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11412 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11413 let expr4_0 = 11414 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11415 let expr5_0 = 11416 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11417 let expr6_0 = 11418 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11419 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11420 return Some(expr7_0); 11421 } 11422 } 11423 // Rule at src/isa/s390x/lower.isle line 534. 11424 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11425 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11426 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11427 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11428 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11429 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11430 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11431 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11432 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11433 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11434 return Some(expr9_0); 11435 } 11436 &Opcode::Rotr => { 11437 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11438 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11439 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11440 { 11441 // Rule at src/isa/s390x/lower.isle line 584. 11442 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11443 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11444 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11445 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11446 let expr4_0 = 11447 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11448 let expr5_0 = 11449 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11450 let expr6_0 = 11451 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11452 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11453 return Some(expr7_0); 11454 } 11455 } 11456 // Rule at src/isa/s390x/lower.isle line 572. 11457 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11458 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11459 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11460 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11461 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11462 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11463 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11464 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11465 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11466 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11467 return Some(expr9_0); 11468 } 11469 _ => {} 11470 } 11471 } 11472 &InstructionData::AtomicRmw { 11473 opcode: ref pattern5_0, 11474 args: ref pattern5_1, 11475 flags: pattern5_2, 11476 op: ref pattern5_3, 11477 } => { 11478 if let &Opcode::AtomicRmw = pattern5_0 { 11479 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11480 // Rule at src/isa/s390x/lower.isle line 1562. 11481 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11482 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11483 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11484 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11485 let expr4_0 = C::inst_builder_new(ctx); 11486 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11487 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11488 let expr7_0 = constructor_casloop_rotate_in( 11489 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11490 )?; 11491 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11492 let expr9_0 = constructor_atomic_rmw_body( 11493 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11494 expr0_0, 11495 )?; 11496 let expr10_0 = constructor_casloop_rotate_out( 11497 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11498 )?; 11499 let expr11_0 = constructor_casloop_subword( 11500 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11501 )?; 11502 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11503 return Some(expr12_0); 11504 } 11505 } 11506 &InstructionData::AtomicCas { 11507 opcode: ref pattern5_0, 11508 args: ref pattern5_1, 11509 flags: pattern5_2, 11510 } => { 11511 if let &Opcode::AtomicCas = pattern5_0 { 11512 let (pattern7_0, pattern7_1, pattern7_2) = 11513 C::unpack_value_array_3(ctx, pattern5_1); 11514 // Rule at src/isa/s390x/lower.isle line 1769. 11515 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11516 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11517 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11518 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11519 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11520 let expr5_0 = C::inst_builder_new(ctx); 11521 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11522 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11523 let expr8_0 = constructor_casloop_rotate_in( 11524 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11525 )?; 11526 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11527 let expr10_0 = constructor_atomic_cas_body( 11528 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11529 expr1_0, 11530 )?; 11531 let expr11_0 = constructor_casloop_rotate_out( 11532 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11533 )?; 11534 let expr12_0 = constructor_casloop_subword( 11535 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11536 )?; 11537 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11538 return Some(expr13_0); 11539 } 11540 } 11541 _ => {} 11542 } 11543 } 11544 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11545 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11546 match &pattern4_0 { 11547 &InstructionData::Unary { 11548 opcode: ref pattern5_0, 11549 arg: pattern5_1, 11550 } => { 11551 match pattern5_0 { 11552 &Opcode::Ctz => { 11553 // Rule at src/isa/s390x/lower.isle line 859. 11554 let expr0_0: Type = I64; 11555 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11556 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11557 let expr3_0 = 11558 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11559 let expr4_0: Type = I64; 11560 let expr5_0: Type = I64; 11561 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11562 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11563 let expr8_0: i16 = 64; 11564 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11565 let expr10_0: u64 = 63; 11566 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11567 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11568 let expr13_0 = 11569 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11570 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11571 return Some(expr14_0); 11572 } 11573 &Opcode::Uextend => { 11574 // Rule at src/isa/s390x/lower.isle line 603. 11575 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11576 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11577 return Some(expr1_0); 11578 } 11579 &Opcode::Sextend => { 11580 // Rule at src/isa/s390x/lower.isle line 614. 11581 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11582 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11583 return Some(expr1_0); 11584 } 11585 _ => {} 11586 } 11587 } 11588 &InstructionData::Load { 11589 opcode: ref pattern5_0, 11590 arg: pattern5_1, 11591 flags: pattern5_2, 11592 offset: pattern5_3, 11593 } => { 11594 match pattern5_0 { 11595 &Opcode::Uload8 => { 11596 // Rule at src/isa/s390x/lower.isle line 1251. 11597 let expr0_0: Type = I8; 11598 let expr1_0 = 11599 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11600 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11601 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11602 return Some(expr3_0); 11603 } 11604 &Opcode::Sload8 => { 11605 // Rule at src/isa/s390x/lower.isle line 1262. 11606 let expr0_0: Type = I8; 11607 let expr1_0 = 11608 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11609 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11610 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11611 return Some(expr3_0); 11612 } 11613 &Opcode::Uload16 => { 11614 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11615 // Rule at src/isa/s390x/lower.isle line 1278. 11616 let expr0_0 = constructor_lower_address( 11617 ctx, pattern5_2, pattern5_1, pattern5_3, 11618 )?; 11619 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11620 let expr2_0: Type = I16; 11621 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11622 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11623 return Some(expr4_0); 11624 } 11625 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11626 // Rule at src/isa/s390x/lower.isle line 1273. 11627 let expr0_0: Type = I16; 11628 let expr1_0 = constructor_lower_address( 11629 ctx, pattern5_2, pattern5_1, pattern5_3, 11630 )?; 11631 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11632 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11633 return Some(expr3_0); 11634 } 11635 } 11636 &Opcode::Sload16 => { 11637 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11638 // Rule at src/isa/s390x/lower.isle line 1303. 11639 let expr0_0 = constructor_lower_address( 11640 ctx, pattern5_2, pattern5_1, pattern5_3, 11641 )?; 11642 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11643 let expr2_0: Type = I16; 11644 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11645 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11646 return Some(expr4_0); 11647 } 11648 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11649 // Rule at src/isa/s390x/lower.isle line 1298. 11650 let expr0_0: Type = I16; 11651 let expr1_0 = constructor_lower_address( 11652 ctx, pattern5_2, pattern5_1, pattern5_3, 11653 )?; 11654 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11655 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11656 return Some(expr3_0); 11657 } 11658 } 11659 _ => {} 11660 } 11661 } 11662 _ => {} 11663 } 11664 } 11665 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11666 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11667 match &pattern4_0 { 11668 &InstructionData::Unary { 11669 opcode: ref pattern5_0, 11670 arg: pattern5_1, 11671 } => { 11672 match pattern5_0 { 11673 &Opcode::Ctz => { 11674 // Rule at src/isa/s390x/lower.isle line 874. 11675 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11676 let expr1_0: Type = I64; 11677 let expr2_0: Type = I64; 11678 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11679 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11680 let expr5_0: i16 = -1; 11681 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11682 let expr7_0: Type = I64; 11683 let expr8_0: Type = I64; 11684 let expr9_0: u64 = 63; 11685 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11686 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11687 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11688 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11689 return Some(expr13_0); 11690 } 11691 &Opcode::Uextend => { 11692 // Rule at src/isa/s390x/lower.isle line 607. 11693 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11694 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11695 return Some(expr1_0); 11696 } 11697 &Opcode::Sextend => { 11698 // Rule at src/isa/s390x/lower.isle line 618. 11699 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11700 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11701 return Some(expr1_0); 11702 } 11703 _ => {} 11704 } 11705 } 11706 &InstructionData::Load { 11707 opcode: ref pattern5_0, 11708 arg: pattern5_1, 11709 flags: pattern5_2, 11710 offset: pattern5_3, 11711 } => { 11712 match pattern5_0 { 11713 &Opcode::Uload8 => { 11714 // Rule at src/isa/s390x/lower.isle line 1255. 11715 let expr0_0: Type = I8; 11716 let expr1_0 = 11717 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11718 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11719 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11720 return Some(expr3_0); 11721 } 11722 &Opcode::Sload8 => { 11723 // Rule at src/isa/s390x/lower.isle line 1266. 11724 let expr0_0: Type = I8; 11725 let expr1_0 = 11726 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11727 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11728 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11729 return Some(expr3_0); 11730 } 11731 &Opcode::Uload16 => { 11732 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11733 // Rule at src/isa/s390x/lower.isle line 1289. 11734 let expr0_0 = constructor_lower_address( 11735 ctx, pattern5_2, pattern5_1, pattern5_3, 11736 )?; 11737 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11738 let expr2_0: Type = I16; 11739 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11740 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11741 return Some(expr4_0); 11742 } 11743 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11744 // Rule at src/isa/s390x/lower.isle line 1284. 11745 let expr0_0: Type = I16; 11746 let expr1_0 = constructor_lower_address( 11747 ctx, pattern5_2, pattern5_1, pattern5_3, 11748 )?; 11749 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11750 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11751 return Some(expr3_0); 11752 } 11753 } 11754 &Opcode::Sload16 => { 11755 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11756 // Rule at src/isa/s390x/lower.isle line 1314. 11757 let expr0_0 = constructor_lower_address( 11758 ctx, pattern5_2, pattern5_1, pattern5_3, 11759 )?; 11760 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11761 let expr2_0: Type = I16; 11762 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11763 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11764 return Some(expr4_0); 11765 } 11766 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11767 // Rule at src/isa/s390x/lower.isle line 1309. 11768 let expr0_0: Type = I16; 11769 let expr1_0 = constructor_lower_address( 11770 ctx, pattern5_2, pattern5_1, pattern5_3, 11771 )?; 11772 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11773 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11774 return Some(expr3_0); 11775 } 11776 } 11777 &Opcode::Uload32 => { 11778 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11779 // Rule at src/isa/s390x/lower.isle line 1328. 11780 let expr0_0 = constructor_lower_address( 11781 ctx, pattern5_2, pattern5_1, pattern5_3, 11782 )?; 11783 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11784 let expr2_0: Type = I32; 11785 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11786 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11787 return Some(expr4_0); 11788 } 11789 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11790 // Rule at src/isa/s390x/lower.isle line 1323. 11791 let expr0_0: Type = I32; 11792 let expr1_0 = constructor_lower_address( 11793 ctx, pattern5_2, pattern5_1, pattern5_3, 11794 )?; 11795 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11796 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11797 return Some(expr3_0); 11798 } 11799 } 11800 &Opcode::Sload32 => { 11801 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11802 // Rule at src/isa/s390x/lower.isle line 1342. 11803 let expr0_0 = constructor_lower_address( 11804 ctx, pattern5_2, pattern5_1, pattern5_3, 11805 )?; 11806 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11807 let expr2_0: Type = I32; 11808 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11809 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11810 return Some(expr4_0); 11811 } 11812 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11813 // Rule at src/isa/s390x/lower.isle line 1337. 11814 let expr0_0: Type = I32; 11815 let expr1_0 = constructor_lower_address( 11816 ctx, pattern5_2, pattern5_1, pattern5_3, 11817 )?; 11818 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11819 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11820 return Some(expr3_0); 11821 } 11822 } 11823 _ => {} 11824 } 11825 } 11826 _ => {} 11827 } 11828 } 11829 } 11830 return None; 11831 } 11832 11833 // Generated as internal constructor for term lower_branch. 11834 pub fn constructor_lower_branch<C: Context>( 11835 ctx: &mut C, 11836 arg0: Inst, 11837 arg1: &VecMachLabel, 11838 ) -> Option<InstOutput> { 11839 let pattern0_0 = arg0; 11840 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11841 match &pattern1_0 { 11842 &InstructionData::BranchTable { 11843 opcode: ref pattern2_0, 11844 arg: pattern2_1, 11845 destination: pattern2_2, 11846 table: pattern2_3, 11847 } => { 11848 if let &Opcode::BrTable = pattern2_0 { 11849 let pattern4_0 = arg1; 11850 // Rule at src/isa/s390x/lower.isle line 2076. 11851 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11852 let expr1_0: Type = I64; 11853 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11854 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11855 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11856 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11857 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11858 let expr7_0: u8 = 0; 11859 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11860 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11861 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11862 let expr11_0: Type = I64; 11863 let expr12_0: u8 = 2; 11864 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11865 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11866 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11867 return Some(expr15_0); 11868 } 11869 } 11870 &InstructionData::Branch { 11871 opcode: ref pattern2_0, 11872 args: pattern2_1, 11873 destination: pattern2_2, 11874 } => { 11875 match pattern2_0 { 11876 &Opcode::Brz => { 11877 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11878 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11879 let pattern6_0 = arg1; 11880 // Rule at src/isa/s390x/lower.isle line 2109. 11881 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11882 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11883 let expr2_0: u8 = 0; 11884 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11885 let expr4_0: u8 = 1; 11886 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11887 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11888 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11889 return Some(expr7_0); 11890 } 11891 } 11892 &Opcode::Brnz => { 11893 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11894 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11895 let pattern6_0 = arg1; 11896 // Rule at src/isa/s390x/lower.isle line 2120. 11897 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11898 let expr1_0: u8 = 0; 11899 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11900 let expr3_0: u8 = 1; 11901 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11902 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11903 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11904 return Some(expr6_0); 11905 } 11906 } 11907 _ => {} 11908 } 11909 } 11910 &InstructionData::Jump { 11911 opcode: ref pattern2_0, 11912 args: pattern2_1, 11913 destination: pattern2_2, 11914 } => { 11915 if let &Opcode::Jump = pattern2_0 { 11916 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11917 let pattern5_0 = arg1; 11918 // Rule at src/isa/s390x/lower.isle line 2068. 11919 let expr0_0: u8 = 0; 11920 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11921 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11922 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11923 return Some(expr3_0); 11924 } 11925 } 11926 &InstructionData::BranchInt { 11927 opcode: ref pattern2_0, 11928 args: pattern2_1, 11929 cond: ref pattern2_2, 11930 destination: pattern2_3, 11931 } => { 11932 if let &Opcode::Brif = pattern2_0 { 11933 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11934 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11935 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11936 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11937 if let &InstructionData::Binary { 11938 opcode: ref pattern8_0, 11939 args: ref pattern8_1, 11940 } = &pattern7_0 11941 { 11942 if let &Opcode::Ifcmp = pattern8_0 { 11943 let (pattern10_0, pattern10_1) = 11944 C::unpack_value_array_2(ctx, pattern8_1); 11945 let pattern11_0 = arg1; 11946 // Rule at src/isa/s390x/lower.isle line 2131. 11947 let expr0_0: bool = false; 11948 let expr1_0 = constructor_icmp_val( 11949 ctx, 11950 expr0_0, 11951 pattern2_2, 11952 pattern10_0, 11953 pattern10_1, 11954 )?; 11955 let expr2_0: u8 = 0; 11956 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11957 let expr4_0: u8 = 1; 11958 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11959 let expr6_0 = 11960 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11961 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11962 return Some(expr7_0); 11963 } 11964 } 11965 } 11966 } 11967 } 11968 } 11969 _ => {} 11970 } 11971 return None; 11972 } 11973 11974 // Generated as internal constructor for term output_ifcout. 11975 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11976 let pattern0_0 = arg0; 11977 // Rule at src/isa/s390x/lower.isle line 154. 11978 let expr0_0 = C::value_reg(ctx, pattern0_0); 11979 let expr1_0 = C::value_regs_invalid(ctx); 11980 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11981 return Some(expr2_0); 11982 } 11983 11984 // Generated as internal constructor for term zero_divisor_check_needed. 11985 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11986 let pattern0_0 = arg0; 11987 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11988 let pattern2_0 = 0; 11989 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11990 // Rule at src/isa/s390x/lower.isle line 344. 11991 let expr0_0: bool = false; 11992 return Some(expr0_0); 11993 } 11994 } 11995 let pattern1_0 = C::value_type(ctx, pattern0_0); 11996 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11997 // Rule at src/isa/s390x/lower.isle line 345. 11998 let expr0_0: bool = false; 11999 return Some(expr0_0); 12000 } 12001 // Rule at src/isa/s390x/lower.isle line 346. 12002 let expr0_0: bool = true; 12003 return Some(expr0_0); 12004 } 12005 12006 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 12007 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 12008 ctx: &mut C, 12009 arg0: bool, 12010 arg1: Type, 12011 arg2: Reg, 12012 ) -> Option<Reg> { 12013 let pattern0_0 = arg0; 12014 if pattern0_0 == true { 12015 let pattern2_0 = arg1; 12016 let pattern3_0 = arg2; 12017 // Rule at src/isa/s390x/lower.isle line 352. 12018 let expr0_0: i16 = 0; 12019 let expr1_0 = IntCC::Equal; 12020 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 12021 let expr3_0 = C::trap_code_division_by_zero(ctx); 12022 let expr4_0 = constructor_icmps_simm16_and_trap( 12023 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 12024 )?; 12025 return Some(expr4_0); 12026 } 12027 if pattern0_0 == false { 12028 let pattern2_0 = arg1; 12029 let pattern3_0 = arg2; 12030 // Rule at src/isa/s390x/lower.isle line 351. 12031 let expr0_0 = C::invalid_reg(ctx); 12032 return Some(expr0_0); 12033 } 12034 return None; 12035 } 12036 12037 // Generated as internal constructor for term div_overflow_check_needed. 12038 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12039 let pattern0_0 = arg0; 12040 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12041 let pattern2_0 = -1; 12042 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12043 // Rule at src/isa/s390x/lower.isle line 425. 12044 let expr0_0: bool = false; 12045 return Some(expr0_0); 12046 } 12047 } 12048 // Rule at src/isa/s390x/lower.isle line 426. 12049 let expr0_0: bool = true; 12050 return Some(expr0_0); 12051 } 12052 12053 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12054 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12055 ctx: &mut C, 12056 arg0: bool, 12057 arg1: Type, 12058 arg2: Type, 12059 arg3: &RegPair, 12060 arg4: Reg, 12061 ) -> Option<Reg> { 12062 let pattern0_0 = arg0; 12063 if pattern0_0 == true { 12064 let pattern2_0 = arg1; 12065 let pattern3_0 = arg2; 12066 let pattern4_0 = arg3; 12067 let pattern5_0 = arg4; 12068 // Rule at src/isa/s390x/lower.isle line 439. 12069 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12070 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12071 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12072 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12073 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12074 let expr5_0: i16 = -1; 12075 let expr6_0 = IntCC::Equal; 12076 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12077 let expr8_0 = C::trap_code_integer_overflow(ctx); 12078 let expr9_0 = constructor_icmps_simm16_and_trap( 12079 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12080 )?; 12081 return Some(expr9_0); 12082 } 12083 if pattern0_0 == false { 12084 let pattern2_0 = arg1; 12085 let pattern3_0 = arg2; 12086 let pattern4_0 = arg3; 12087 let pattern5_0 = arg4; 12088 // Rule at src/isa/s390x/lower.isle line 438. 12089 let expr0_0 = C::invalid_reg(ctx); 12090 return Some(expr0_0); 12091 } 12092 return None; 12093 } 12094 12095 // Generated as internal constructor for term int_max. 12096 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12097 let pattern0_0 = arg0; 12098 if pattern0_0 == I8 { 12099 // Rule at src/isa/s390x/lower.isle line 447. 12100 let expr0_0: u64 = 127; 12101 return Some(expr0_0); 12102 } 12103 if pattern0_0 == I16 { 12104 // Rule at src/isa/s390x/lower.isle line 448. 12105 let expr0_0: u64 = 32767; 12106 return Some(expr0_0); 12107 } 12108 if pattern0_0 == I32 { 12109 // Rule at src/isa/s390x/lower.isle line 449. 12110 let expr0_0: u64 = 2147483647; 12111 return Some(expr0_0); 12112 } 12113 if pattern0_0 == I64 { 12114 // Rule at src/isa/s390x/lower.isle line 450. 12115 let expr0_0: u64 = 9223372036854775807; 12116 return Some(expr0_0); 12117 } 12118 return None; 12119 } 12120 12121 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12122 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12123 ctx: &mut C, 12124 arg0: bool, 12125 arg1: Type, 12126 arg2: &RegPair, 12127 arg3: Reg, 12128 ) -> Option<RegPair> { 12129 let pattern0_0 = arg0; 12130 if pattern0_0 == true { 12131 let pattern2_0 = arg1; 12132 if pattern2_0 == I32 { 12133 let pattern4_0 = arg2; 12134 let pattern5_0 = arg3; 12135 // Rule at src/isa/s390x/lower.isle line 468. 12136 return Some(pattern4_0.clone()); 12137 } 12138 if pattern2_0 == I64 { 12139 let pattern4_0 = arg2; 12140 let pattern5_0 = arg3; 12141 // Rule at src/isa/s390x/lower.isle line 469. 12142 let expr0_0: Type = I64; 12143 let expr1_0: Type = I64; 12144 let expr2_0: i16 = -1; 12145 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12146 let expr4_0 = IntCC::Equal; 12147 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12148 let expr6_0: i16 = 0; 12149 let expr7_0 = constructor_cmov_imm_regpair_lo( 12150 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12151 )?; 12152 return Some(expr7_0); 12153 } 12154 } 12155 if pattern0_0 == false { 12156 let pattern2_0 = arg1; 12157 let pattern3_0 = arg2; 12158 let pattern4_0 = arg3; 12159 // Rule at src/isa/s390x/lower.isle line 467. 12160 return Some(pattern3_0.clone()); 12161 } 12162 return None; 12163 } 12164 12165 // Generated as internal constructor for term cast_bool. 12166 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12167 let pattern0_0 = arg0; 12168 if pattern0_0 == B1 { 12169 let pattern2_0 = arg1; 12170 let pattern3_0 = C::value_type(ctx, pattern2_0); 12171 if pattern3_0 == B1 { 12172 // Rule at src/isa/s390x/lower.isle line 766. 12173 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12174 return Some(expr0_0); 12175 } 12176 if pattern3_0 == B8 { 12177 // Rule at src/isa/s390x/lower.isle line 767. 12178 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12179 return Some(expr0_0); 12180 } 12181 } 12182 if pattern0_0 == B8 { 12183 let pattern2_0 = arg1; 12184 let pattern3_0 = C::value_type(ctx, pattern2_0); 12185 if pattern3_0 == B8 { 12186 // Rule at src/isa/s390x/lower.isle line 768. 12187 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12188 return Some(expr0_0); 12189 } 12190 } 12191 if pattern0_0 == I8 { 12192 let pattern2_0 = arg1; 12193 let pattern3_0 = C::value_type(ctx, pattern2_0); 12194 if pattern3_0 == B8 { 12195 // Rule at src/isa/s390x/lower.isle line 769. 12196 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12197 return Some(expr0_0); 12198 } 12199 } 12200 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12201 let pattern2_0 = arg1; 12202 let pattern3_0 = C::value_type(ctx, pattern2_0); 12203 if pattern3_0 == B16 { 12204 // Rule at src/isa/s390x/lower.isle line 770. 12205 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12206 return Some(expr0_0); 12207 } 12208 } 12209 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12210 let pattern2_0 = arg1; 12211 let pattern3_0 = C::value_type(ctx, pattern2_0); 12212 if pattern3_0 == B32 { 12213 // Rule at src/isa/s390x/lower.isle line 771. 12214 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12215 return Some(expr0_0); 12216 } 12217 } 12218 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12219 let pattern2_0 = arg1; 12220 let pattern3_0 = C::value_type(ctx, pattern2_0); 12221 if pattern3_0 == B64 { 12222 // Rule at src/isa/s390x/lower.isle line 772. 12223 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12224 return Some(expr0_0); 12225 } 12226 } 12227 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12228 let pattern2_0 = arg1; 12229 let pattern3_0 = C::value_type(ctx, pattern2_0); 12230 if pattern3_0 == B1 { 12231 // Rule at src/isa/s390x/lower.isle line 775. 12232 let expr0_0: Type = I32; 12233 let expr1_0: Type = I32; 12234 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12235 let expr3_0: u8 = 31; 12236 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12237 let expr5_0: u8 = 31; 12238 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12239 return Some(expr6_0); 12240 } 12241 if pattern3_0 == B8 { 12242 // Rule at src/isa/s390x/lower.isle line 781. 12243 let expr0_0: Type = I8; 12244 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12245 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12246 return Some(expr2_0); 12247 } 12248 if pattern3_0 == B16 { 12249 // Rule at src/isa/s390x/lower.isle line 783. 12250 let expr0_0: Type = I16; 12251 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12252 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12253 return Some(expr2_0); 12254 } 12255 } 12256 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12257 let pattern2_0 = arg1; 12258 let pattern3_0 = C::value_type(ctx, pattern2_0); 12259 if pattern3_0 == B1 { 12260 // Rule at src/isa/s390x/lower.isle line 777. 12261 let expr0_0: Type = I64; 12262 let expr1_0: Type = I64; 12263 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12264 let expr3_0: u8 = 63; 12265 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12266 let expr5_0: u8 = 63; 12267 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12268 return Some(expr6_0); 12269 } 12270 if pattern3_0 == B8 { 12271 // Rule at src/isa/s390x/lower.isle line 785. 12272 let expr0_0: Type = I8; 12273 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12274 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12275 return Some(expr2_0); 12276 } 12277 if pattern3_0 == B16 { 12278 // Rule at src/isa/s390x/lower.isle line 787. 12279 let expr0_0: Type = I16; 12280 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12281 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12282 return Some(expr2_0); 12283 } 12284 if pattern3_0 == B32 { 12285 // Rule at src/isa/s390x/lower.isle line 789. 12286 let expr0_0: Type = I32; 12287 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12288 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12289 return Some(expr2_0); 12290 } 12291 } 12292 return None; 12293 } 12294 12295 // Generated as internal constructor for term clz_offset. 12296 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12297 let pattern0_0 = arg0; 12298 if pattern0_0 == I8 { 12299 let pattern2_0 = arg1; 12300 // Rule at src/isa/s390x/lower.isle line 814. 12301 let expr0_0: Type = I8; 12302 let expr1_0: i16 = -56; 12303 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12304 return Some(expr2_0); 12305 } 12306 if pattern0_0 == I16 { 12307 let pattern2_0 = arg1; 12308 // Rule at src/isa/s390x/lower.isle line 815. 12309 let expr0_0: Type = I16; 12310 let expr1_0: i16 = -48; 12311 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12312 return Some(expr2_0); 12313 } 12314 if pattern0_0 == I32 { 12315 let pattern2_0 = arg1; 12316 // Rule at src/isa/s390x/lower.isle line 816. 12317 let expr0_0: Type = I32; 12318 let expr1_0: i16 = -32; 12319 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12320 return Some(expr2_0); 12321 } 12322 if pattern0_0 == I64 { 12323 let pattern2_0 = arg1; 12324 // Rule at src/isa/s390x/lower.isle line 817. 12325 let expr0_0: Type = I64; 12326 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12327 return Some(expr1_0); 12328 } 12329 return None; 12330 } 12331 12332 // Generated as internal constructor for term ctz_guardbit. 12333 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12334 let pattern0_0 = arg0; 12335 if pattern0_0 == I8 { 12336 // Rule at src/isa/s390x/lower.isle line 866. 12337 let expr0_0: u16 = 256; 12338 let expr1_0: u8 = 0; 12339 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12340 return Some(expr2_0); 12341 } 12342 if pattern0_0 == I16 { 12343 // Rule at src/isa/s390x/lower.isle line 867. 12344 let expr0_0: u16 = 1; 12345 let expr1_0: u8 = 16; 12346 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12347 return Some(expr2_0); 12348 } 12349 if pattern0_0 == I32 { 12350 // Rule at src/isa/s390x/lower.isle line 868. 12351 let expr0_0: u16 = 1; 12352 let expr1_0: u8 = 32; 12353 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12354 return Some(expr2_0); 12355 } 12356 return None; 12357 } 12358 12359 // Generated as internal constructor for term istore8_impl. 12360 pub fn constructor_istore8_impl<C: Context>( 12361 ctx: &mut C, 12362 arg0: MemFlags, 12363 arg1: Value, 12364 arg2: Value, 12365 arg3: Offset32, 12366 ) -> Option<SideEffectNoResult> { 12367 let pattern0_0 = arg0; 12368 let pattern1_0 = arg1; 12369 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12370 let pattern3_0 = arg2; 12371 let pattern4_0 = arg3; 12372 // Rule at src/isa/s390x/lower.isle line 1424. 12373 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12374 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12375 return Some(expr1_0); 12376 } 12377 let pattern2_0 = arg2; 12378 let pattern3_0 = arg3; 12379 // Rule at src/isa/s390x/lower.isle line 1420. 12380 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12381 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12382 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12383 return Some(expr2_0); 12384 } 12385 12386 // Generated as internal constructor for term istore16_impl. 12387 pub fn constructor_istore16_impl<C: Context>( 12388 ctx: &mut C, 12389 arg0: MemFlags, 12390 arg1: Value, 12391 arg2: Value, 12392 arg3: Offset32, 12393 ) -> Option<SideEffectNoResult> { 12394 let pattern0_0 = arg0; 12395 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12396 let pattern2_0 = arg1; 12397 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12398 let pattern4_0 = arg2; 12399 let pattern5_0 = arg3; 12400 // Rule at src/isa/s390x/lower.isle line 1450. 12401 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12402 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12403 return Some(expr1_0); 12404 } 12405 let pattern3_0 = arg2; 12406 let pattern4_0 = arg3; 12407 // Rule at src/isa/s390x/lower.isle line 1442. 12408 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12409 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12410 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12411 return Some(expr2_0); 12412 } 12413 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12414 let pattern2_0 = arg1; 12415 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12416 let pattern4_0 = arg2; 12417 let pattern5_0 = arg3; 12418 // Rule at src/isa/s390x/lower.isle line 1446. 12419 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12420 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12421 return Some(expr1_0); 12422 } 12423 let pattern3_0 = arg2; 12424 let pattern4_0 = arg3; 12425 // Rule at src/isa/s390x/lower.isle line 1438. 12426 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12427 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12428 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12429 return Some(expr2_0); 12430 } 12431 return None; 12432 } 12433 12434 // Generated as internal constructor for term istore32_impl. 12435 pub fn constructor_istore32_impl<C: Context>( 12436 ctx: &mut C, 12437 arg0: MemFlags, 12438 arg1: Value, 12439 arg2: Value, 12440 arg3: Offset32, 12441 ) -> Option<SideEffectNoResult> { 12442 let pattern0_0 = arg0; 12443 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12444 let pattern2_0 = arg1; 12445 let pattern3_0 = arg2; 12446 let pattern4_0 = arg3; 12447 // Rule at src/isa/s390x/lower.isle line 1472. 12448 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12449 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12450 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12451 return Some(expr2_0); 12452 } 12453 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12454 let pattern2_0 = arg1; 12455 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12456 let pattern4_0 = arg2; 12457 let pattern5_0 = arg3; 12458 // Rule at src/isa/s390x/lower.isle line 1468. 12459 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12460 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12461 return Some(expr1_0); 12462 } 12463 let pattern3_0 = arg2; 12464 let pattern4_0 = arg3; 12465 // Rule at src/isa/s390x/lower.isle line 1464. 12466 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12467 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12468 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12469 return Some(expr2_0); 12470 } 12471 return None; 12472 } 12473 12474 // Generated as internal constructor for term istore64_impl. 12475 pub fn constructor_istore64_impl<C: Context>( 12476 ctx: &mut C, 12477 arg0: MemFlags, 12478 arg1: Value, 12479 arg2: Value, 12480 arg3: Offset32, 12481 ) -> Option<SideEffectNoResult> { 12482 let pattern0_0 = arg0; 12483 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12484 let pattern2_0 = arg1; 12485 let pattern3_0 = arg2; 12486 let pattern4_0 = arg3; 12487 // Rule at src/isa/s390x/lower.isle line 1490. 12488 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12489 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12490 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12491 return Some(expr2_0); 12492 } 12493 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12494 let pattern2_0 = arg1; 12495 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12496 let pattern4_0 = arg2; 12497 let pattern5_0 = arg3; 12498 // Rule at src/isa/s390x/lower.isle line 1486. 12499 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12500 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12501 return Some(expr1_0); 12502 } 12503 let pattern3_0 = arg2; 12504 let pattern4_0 = arg3; 12505 // Rule at src/isa/s390x/lower.isle line 1482. 12506 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12507 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12508 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12509 return Some(expr2_0); 12510 } 12511 return None; 12512 } 12513 12514 // Generated as internal constructor for term atomic_rmw_body. 12515 pub fn constructor_atomic_rmw_body<C: Context>( 12516 ctx: &mut C, 12517 arg0: &VecMInstBuilder, 12518 arg1: Type, 12519 arg2: MemFlags, 12520 arg3: &AtomicRmwOp, 12521 arg4: WritableReg, 12522 arg5: Reg, 12523 arg6: Reg, 12524 ) -> Option<Reg> { 12525 let pattern0_0 = arg0; 12526 let pattern1_0 = arg1; 12527 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12528 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12529 let pattern4_0 = arg2; 12530 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12531 let pattern6_0 = arg3; 12532 if let &AtomicRmwOp::Nand = pattern6_0 { 12533 let pattern8_0 = arg4; 12534 let pattern9_0 = arg5; 12535 let pattern10_0 = arg6; 12536 // Rule at src/isa/s390x/lower.isle line 1598. 12537 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12538 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12539 let expr2_0 = constructor_push_alu_reg( 12540 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12541 )?; 12542 return Some(expr2_0); 12543 } 12544 } 12545 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12546 let pattern6_0 = arg3; 12547 if let &AtomicRmwOp::Nand = pattern6_0 { 12548 let pattern8_0 = arg4; 12549 let pattern9_0 = arg5; 12550 let pattern10_0 = arg6; 12551 // Rule at src/isa/s390x/lower.isle line 1595. 12552 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12553 let expr1_0 = constructor_push_alu_reg( 12554 ctx, 12555 pattern0_0, 12556 &expr0_0, 12557 pattern8_0, 12558 pattern9_0, 12559 pattern10_0, 12560 )?; 12561 return Some(expr1_0); 12562 } 12563 } 12564 } 12565 } 12566 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12567 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12568 let pattern4_0 = arg2; 12569 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12570 let pattern6_0 = arg3; 12571 if let &AtomicRmwOp::Nand = pattern6_0 { 12572 let pattern8_0 = arg4; 12573 let pattern9_0 = arg5; 12574 let pattern10_0 = arg6; 12575 // Rule at src/isa/s390x/lower.isle line 1605. 12576 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12577 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12578 let expr2_0 = constructor_push_alu_reg( 12579 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12580 )?; 12581 let expr3_0 = 12582 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12583 return Some(expr3_0); 12584 } 12585 } 12586 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12587 let pattern6_0 = arg3; 12588 if let &AtomicRmwOp::Nand = pattern6_0 { 12589 let pattern8_0 = arg4; 12590 let pattern9_0 = arg5; 12591 let pattern10_0 = arg6; 12592 // Rule at src/isa/s390x/lower.isle line 1601. 12593 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12594 let expr1_0 = constructor_push_alu_reg( 12595 ctx, 12596 pattern0_0, 12597 &expr0_0, 12598 pattern8_0, 12599 pattern9_0, 12600 pattern10_0, 12601 )?; 12602 let expr2_0 = 12603 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12604 return Some(expr2_0); 12605 } 12606 } 12607 } 12608 } 12609 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12610 let pattern3_0 = arg2; 12611 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12612 let pattern5_0 = arg3; 12613 if let &AtomicRmwOp::Xchg = pattern5_0 { 12614 let pattern7_0 = arg4; 12615 let pattern8_0 = arg5; 12616 let pattern9_0 = arg6; 12617 // Rule at src/isa/s390x/lower.isle line 1587. 12618 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12619 return Some(expr0_0); 12620 } 12621 } 12622 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12623 let pattern5_0 = arg3; 12624 if let &AtomicRmwOp::Xchg = pattern5_0 { 12625 let pattern7_0 = arg4; 12626 let pattern8_0 = arg5; 12627 let pattern9_0 = arg6; 12628 // Rule at src/isa/s390x/lower.isle line 1584. 12629 return Some(pattern9_0); 12630 } 12631 } 12632 } 12633 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12634 let pattern3_0 = arg2; 12635 let pattern4_0 = arg3; 12636 match pattern4_0 { 12637 &AtomicRmwOp::And => { 12638 let pattern6_0 = arg4; 12639 let pattern7_0 = arg5; 12640 let pattern8_0 = arg6; 12641 // Rule at src/isa/s390x/lower.isle line 1615. 12642 let expr0_0 = RxSBGOp::And; 12643 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12644 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12645 pattern8_0, 12646 )?; 12647 return Some(expr1_0); 12648 } 12649 &AtomicRmwOp::Nand => { 12650 let pattern6_0 = arg4; 12651 let pattern7_0 = arg5; 12652 let pattern8_0 = arg6; 12653 // Rule at src/isa/s390x/lower.isle line 1621. 12654 let expr0_0 = RxSBGOp::And; 12655 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12656 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12657 pattern8_0, 12658 )?; 12659 let expr2_0 = constructor_atomic_rmw_body_invert( 12660 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12661 )?; 12662 return Some(expr2_0); 12663 } 12664 &AtomicRmwOp::Or => { 12665 let pattern6_0 = arg4; 12666 let pattern7_0 = arg5; 12667 let pattern8_0 = arg6; 12668 // Rule at src/isa/s390x/lower.isle line 1617. 12669 let expr0_0 = RxSBGOp::Or; 12670 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12671 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12672 pattern8_0, 12673 )?; 12674 return Some(expr1_0); 12675 } 12676 &AtomicRmwOp::Xchg => { 12677 let pattern6_0 = arg4; 12678 let pattern7_0 = arg5; 12679 let pattern8_0 = arg6; 12680 // Rule at src/isa/s390x/lower.isle line 1613. 12681 let expr0_0 = RxSBGOp::Insert; 12682 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12683 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12684 pattern8_0, 12685 )?; 12686 return Some(expr1_0); 12687 } 12688 &AtomicRmwOp::Xor => { 12689 let pattern6_0 = arg4; 12690 let pattern7_0 = arg5; 12691 let pattern8_0 = arg6; 12692 // Rule at src/isa/s390x/lower.isle line 1619. 12693 let expr0_0 = RxSBGOp::Xor; 12694 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12695 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12696 pattern8_0, 12697 )?; 12698 return Some(expr1_0); 12699 } 12700 _ => {} 12701 } 12702 } 12703 let pattern2_0 = arg2; 12704 let pattern3_0 = arg3; 12705 match pattern3_0 { 12706 &AtomicRmwOp::Add => { 12707 let pattern5_0 = arg4; 12708 let pattern6_0 = arg5; 12709 let pattern7_0 = arg6; 12710 // Rule at src/isa/s390x/lower.isle line 1653. 12711 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12712 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12713 let expr2_0 = constructor_atomic_rmw_body_addsub( 12714 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12715 pattern7_0, 12716 )?; 12717 return Some(expr2_0); 12718 } 12719 &AtomicRmwOp::Smax => { 12720 let pattern5_0 = arg4; 12721 let pattern6_0 = arg5; 12722 let pattern7_0 = arg6; 12723 // Rule at src/isa/s390x/lower.isle line 1694. 12724 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12725 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12726 let expr2_0 = IntCC::SignedGreaterThan; 12727 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12728 let expr4_0 = constructor_atomic_rmw_body_minmax( 12729 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12730 pattern6_0, pattern7_0, 12731 )?; 12732 return Some(expr4_0); 12733 } 12734 &AtomicRmwOp::Smin => { 12735 let pattern5_0 = arg4; 12736 let pattern6_0 = arg5; 12737 let pattern7_0 = arg6; 12738 // Rule at src/isa/s390x/lower.isle line 1691. 12739 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12740 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12741 let expr2_0 = IntCC::SignedLessThan; 12742 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12743 let expr4_0 = constructor_atomic_rmw_body_minmax( 12744 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12745 pattern6_0, pattern7_0, 12746 )?; 12747 return Some(expr4_0); 12748 } 12749 &AtomicRmwOp::Sub => { 12750 let pattern5_0 = arg4; 12751 let pattern6_0 = arg5; 12752 let pattern7_0 = arg6; 12753 // Rule at src/isa/s390x/lower.isle line 1655. 12754 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12755 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12756 let expr2_0 = constructor_atomic_rmw_body_addsub( 12757 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12758 pattern7_0, 12759 )?; 12760 return Some(expr2_0); 12761 } 12762 &AtomicRmwOp::Umax => { 12763 let pattern5_0 = arg4; 12764 let pattern6_0 = arg5; 12765 let pattern7_0 = arg6; 12766 // Rule at src/isa/s390x/lower.isle line 1700. 12767 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12768 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12769 let expr2_0 = IntCC::UnsignedGreaterThan; 12770 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12771 let expr4_0 = constructor_atomic_rmw_body_minmax( 12772 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12773 pattern6_0, pattern7_0, 12774 )?; 12775 return Some(expr4_0); 12776 } 12777 &AtomicRmwOp::Umin => { 12778 let pattern5_0 = arg4; 12779 let pattern6_0 = arg5; 12780 let pattern7_0 = arg6; 12781 // Rule at src/isa/s390x/lower.isle line 1697. 12782 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12783 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12784 let expr2_0 = IntCC::UnsignedLessThan; 12785 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12786 let expr4_0 = constructor_atomic_rmw_body_minmax( 12787 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12788 pattern6_0, pattern7_0, 12789 )?; 12790 return Some(expr4_0); 12791 } 12792 _ => {} 12793 } 12794 return None; 12795 } 12796 12797 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12798 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12799 ctx: &mut C, 12800 arg0: &VecMInstBuilder, 12801 arg1: Type, 12802 arg2: MemFlags, 12803 arg3: &RxSBGOp, 12804 arg4: WritableReg, 12805 arg5: Reg, 12806 arg6: Reg, 12807 ) -> Option<Reg> { 12808 let pattern0_0 = arg0; 12809 let pattern1_0 = arg1; 12810 if pattern1_0 == I8 { 12811 let pattern3_0 = arg2; 12812 let pattern4_0 = arg3; 12813 let pattern5_0 = arg4; 12814 let pattern6_0 = arg5; 12815 let pattern7_0 = arg6; 12816 // Rule at src/isa/s390x/lower.isle line 1629. 12817 let expr0_0: u8 = 32; 12818 let expr1_0: u8 = 40; 12819 let expr2_0: i8 = 24; 12820 let expr3_0 = constructor_push_rxsbg( 12821 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12822 expr2_0, 12823 )?; 12824 return Some(expr3_0); 12825 } 12826 if pattern1_0 == I16 { 12827 let pattern3_0 = arg2; 12828 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12829 let pattern5_0 = arg3; 12830 let pattern6_0 = arg4; 12831 let pattern7_0 = arg5; 12832 let pattern8_0 = arg6; 12833 // Rule at src/isa/s390x/lower.isle line 1637. 12834 let expr0_0: Type = I32; 12835 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12836 let expr2_0: u8 = 48; 12837 let expr3_0: u8 = 64; 12838 let expr4_0: i8 = -16; 12839 let expr5_0 = constructor_push_rxsbg( 12840 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12841 expr4_0, 12842 )?; 12843 return Some(expr5_0); 12844 } 12845 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12846 let pattern5_0 = arg3; 12847 let pattern6_0 = arg4; 12848 let pattern7_0 = arg5; 12849 let pattern8_0 = arg6; 12850 // Rule at src/isa/s390x/lower.isle line 1633. 12851 let expr0_0: u8 = 32; 12852 let expr1_0: u8 = 48; 12853 let expr2_0: i8 = 16; 12854 let expr3_0 = constructor_push_rxsbg( 12855 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12856 expr2_0, 12857 )?; 12858 return Some(expr3_0); 12859 } 12860 } 12861 return None; 12862 } 12863 12864 // Generated as internal constructor for term atomic_rmw_body_invert. 12865 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12866 ctx: &mut C, 12867 arg0: &VecMInstBuilder, 12868 arg1: Type, 12869 arg2: MemFlags, 12870 arg3: WritableReg, 12871 arg4: Reg, 12872 ) -> Option<Reg> { 12873 let pattern0_0 = arg0; 12874 let pattern1_0 = arg1; 12875 if pattern1_0 == I8 { 12876 let pattern3_0 = arg2; 12877 let pattern4_0 = arg3; 12878 let pattern5_0 = arg4; 12879 // Rule at src/isa/s390x/lower.isle line 1643. 12880 let expr0_0: Type = I32; 12881 let expr1_0: u32 = 4278190080; 12882 let expr2_0: u8 = 0; 12883 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12884 let expr4_0 = constructor_push_xor_uimm32shifted( 12885 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12886 )?; 12887 return Some(expr4_0); 12888 } 12889 if pattern1_0 == I16 { 12890 let pattern3_0 = arg2; 12891 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12892 let pattern5_0 = arg3; 12893 let pattern6_0 = arg4; 12894 // Rule at src/isa/s390x/lower.isle line 1649. 12895 let expr0_0: Type = I32; 12896 let expr1_0: u32 = 65535; 12897 let expr2_0: u8 = 0; 12898 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12899 let expr4_0 = constructor_push_xor_uimm32shifted( 12900 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12901 )?; 12902 return Some(expr4_0); 12903 } 12904 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12905 let pattern5_0 = arg3; 12906 let pattern6_0 = arg4; 12907 // Rule at src/isa/s390x/lower.isle line 1646. 12908 let expr0_0: Type = I32; 12909 let expr1_0: u32 = 4294901760; 12910 let expr2_0: u8 = 0; 12911 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12912 let expr4_0 = constructor_push_xor_uimm32shifted( 12913 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12914 )?; 12915 return Some(expr4_0); 12916 } 12917 } 12918 return None; 12919 } 12920 12921 // Generated as internal constructor for term atomic_rmw_body_addsub. 12922 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12923 ctx: &mut C, 12924 arg0: &VecMInstBuilder, 12925 arg1: Type, 12926 arg2: MemFlags, 12927 arg3: &ALUOp, 12928 arg4: WritableReg, 12929 arg5: Reg, 12930 arg6: Reg, 12931 ) -> Option<Reg> { 12932 let pattern0_0 = arg0; 12933 let pattern1_0 = arg1; 12934 if pattern1_0 == I8 { 12935 let pattern3_0 = arg2; 12936 let pattern4_0 = arg3; 12937 let pattern5_0 = arg4; 12938 let pattern6_0 = arg5; 12939 let pattern7_0 = arg6; 12940 // Rule at src/isa/s390x/lower.isle line 1672. 12941 let expr0_0: Type = I32; 12942 let expr1_0: u8 = 24; 12943 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12944 let expr3_0 = 12945 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12946 return Some(expr3_0); 12947 } 12948 if pattern1_0 == I16 { 12949 let pattern3_0 = arg2; 12950 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12951 let pattern5_0 = arg3; 12952 let pattern6_0 = arg4; 12953 let pattern7_0 = arg5; 12954 let pattern8_0 = arg6; 12955 // Rule at src/isa/s390x/lower.isle line 1684. 12956 let expr0_0: Type = I32; 12957 let expr1_0: u8 = 16; 12958 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12959 let expr3_0: Type = I32; 12960 let expr4_0 = 12961 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12962 let expr5_0 = constructor_push_alu_reg( 12963 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12964 )?; 12965 let expr6_0: Type = I32; 12966 let expr7_0 = 12967 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12968 return Some(expr7_0); 12969 } 12970 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12971 let pattern5_0 = arg3; 12972 let pattern6_0 = arg4; 12973 let pattern7_0 = arg5; 12974 let pattern8_0 = arg6; 12975 // Rule at src/isa/s390x/lower.isle line 1676. 12976 let expr0_0: Type = I32; 12977 let expr1_0: u8 = 16; 12978 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12979 let expr3_0 = constructor_push_alu_reg( 12980 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12981 )?; 12982 return Some(expr3_0); 12983 } 12984 } 12985 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12986 let pattern3_0 = arg2; 12987 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12988 let pattern5_0 = arg3; 12989 let pattern6_0 = arg4; 12990 let pattern7_0 = arg5; 12991 let pattern8_0 = arg6; 12992 // Rule at src/isa/s390x/lower.isle line 1666. 12993 let expr0_0 = 12994 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12995 let expr1_0 = constructor_push_alu_reg( 12996 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12997 )?; 12998 let expr2_0 = 12999 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 13000 return Some(expr2_0); 13001 } 13002 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13003 let pattern5_0 = arg3; 13004 let pattern6_0 = arg4; 13005 let pattern7_0 = arg5; 13006 let pattern8_0 = arg6; 13007 // Rule at src/isa/s390x/lower.isle line 1662. 13008 let expr0_0 = constructor_push_alu_reg( 13009 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 13010 )?; 13011 return Some(expr0_0); 13012 } 13013 } 13014 return None; 13015 } 13016 13017 // Generated as internal constructor for term atomic_rmw_body_minmax. 13018 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 13019 ctx: &mut C, 13020 arg0: &VecMInstBuilder, 13021 arg1: Type, 13022 arg2: MemFlags, 13023 arg3: &CmpOp, 13024 arg4: &Cond, 13025 arg5: WritableReg, 13026 arg6: Reg, 13027 arg7: Reg, 13028 ) -> Option<Reg> { 13029 let pattern0_0 = arg0; 13030 let pattern1_0 = arg1; 13031 if pattern1_0 == I8 { 13032 let pattern3_0 = arg2; 13033 let pattern4_0 = arg3; 13034 let pattern5_0 = arg4; 13035 let pattern6_0 = arg5; 13036 let pattern7_0 = arg6; 13037 let pattern8_0 = arg7; 13038 // Rule at src/isa/s390x/lower.isle line 1729. 13039 let expr0_0: Type = I32; 13040 let expr1_0: u8 = 24; 13041 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13042 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13043 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13044 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13045 let expr6_0 = RxSBGOp::Insert; 13046 let expr7_0: u8 = 32; 13047 let expr8_0: u8 = 40; 13048 let expr9_0: i8 = 0; 13049 let expr10_0 = constructor_push_rxsbg( 13050 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13051 )?; 13052 return Some(expr10_0); 13053 } 13054 if pattern1_0 == I16 { 13055 let pattern3_0 = arg2; 13056 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13057 let pattern5_0 = arg3; 13058 let pattern6_0 = arg4; 13059 let pattern7_0 = arg5; 13060 let pattern8_0 = arg6; 13061 let pattern9_0 = arg7; 13062 // Rule at src/isa/s390x/lower.isle line 1742. 13063 let expr0_0: Type = I32; 13064 let expr1_0: u8 = 16; 13065 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13066 let expr3_0: Type = I32; 13067 let expr4_0 = 13068 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13069 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13070 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13071 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13072 let expr8_0 = RxSBGOp::Insert; 13073 let expr9_0: u8 = 32; 13074 let expr10_0: u8 = 48; 13075 let expr11_0: i8 = 0; 13076 let expr12_0 = constructor_push_rxsbg( 13077 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13078 expr11_0, 13079 )?; 13080 let expr13_0: Type = I32; 13081 let expr14_0 = 13082 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13083 return Some(expr14_0); 13084 } 13085 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13086 let pattern5_0 = arg3; 13087 let pattern6_0 = arg4; 13088 let pattern7_0 = arg5; 13089 let pattern8_0 = arg6; 13090 let pattern9_0 = arg7; 13091 // Rule at src/isa/s390x/lower.isle line 1735. 13092 let expr0_0: Type = I32; 13093 let expr1_0: u8 = 16; 13094 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13095 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13096 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13097 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13098 let expr6_0 = RxSBGOp::Insert; 13099 let expr7_0: u8 = 32; 13100 let expr8_0: u8 = 48; 13101 let expr9_0: i8 = 0; 13102 let expr10_0 = constructor_push_rxsbg( 13103 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13104 expr9_0, 13105 )?; 13106 return Some(expr10_0); 13107 } 13108 } 13109 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13110 let pattern3_0 = arg2; 13111 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13112 let pattern5_0 = arg3; 13113 let pattern6_0 = arg4; 13114 let pattern7_0 = arg5; 13115 let pattern8_0 = arg6; 13116 let pattern9_0 = arg7; 13117 // Rule at src/isa/s390x/lower.isle line 1717. 13118 let expr0_0 = 13119 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13120 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13121 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13122 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13123 let expr4_0 = 13124 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13125 return Some(expr4_0); 13126 } 13127 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13128 let pattern5_0 = arg3; 13129 let pattern6_0 = arg4; 13130 let pattern7_0 = arg5; 13131 let pattern8_0 = arg6; 13132 let pattern9_0 = arg7; 13133 // Rule at src/isa/s390x/lower.isle line 1710. 13134 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13135 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13136 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13137 return Some(pattern9_0); 13138 } 13139 } 13140 return None; 13141 } 13142 13143 // Generated as internal constructor for term atomic_cas_body. 13144 pub fn constructor_atomic_cas_body<C: Context>( 13145 ctx: &mut C, 13146 arg0: &VecMInstBuilder, 13147 arg1: Type, 13148 arg2: MemFlags, 13149 arg3: WritableReg, 13150 arg4: Reg, 13151 arg5: Reg, 13152 arg6: Reg, 13153 ) -> Option<Reg> { 13154 let pattern0_0 = arg0; 13155 let pattern1_0 = arg1; 13156 if pattern1_0 == I8 { 13157 let pattern3_0 = arg2; 13158 let pattern4_0 = arg3; 13159 let pattern5_0 = arg4; 13160 let pattern6_0 = arg5; 13161 let pattern7_0 = arg6; 13162 // Rule at src/isa/s390x/lower.isle line 1794. 13163 let expr0_0 = RxSBGOp::Xor; 13164 let expr1_0: u8 = 32; 13165 let expr2_0: u8 = 40; 13166 let expr3_0: i8 = 24; 13167 let expr4_0 = constructor_rxsbg_test( 13168 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13169 )?; 13170 let expr5_0 = IntCC::NotEqual; 13171 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13172 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13173 let expr8_0 = RxSBGOp::Insert; 13174 let expr9_0: u8 = 32; 13175 let expr10_0: u8 = 40; 13176 let expr11_0: i8 = 24; 13177 let expr12_0 = constructor_push_rxsbg( 13178 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13179 expr11_0, 13180 )?; 13181 return Some(expr12_0); 13182 } 13183 if pattern1_0 == I16 { 13184 let pattern3_0 = arg2; 13185 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13186 let pattern5_0 = arg3; 13187 let pattern6_0 = arg4; 13188 let pattern7_0 = arg5; 13189 let pattern8_0 = arg6; 13190 // Rule at src/isa/s390x/lower.isle line 1812. 13191 let expr0_0: Type = I32; 13192 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13193 let expr2_0: Type = I32; 13194 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13195 let expr4_0 = RxSBGOp::Xor; 13196 let expr5_0: u8 = 48; 13197 let expr6_0: u8 = 64; 13198 let expr7_0: i8 = -16; 13199 let expr8_0 = constructor_rxsbg_test( 13200 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13201 )?; 13202 let expr9_0 = IntCC::NotEqual; 13203 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13204 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13205 let expr12_0 = RxSBGOp::Insert; 13206 let expr13_0: u8 = 48; 13207 let expr14_0: u8 = 64; 13208 let expr15_0: i8 = -16; 13209 let expr16_0 = constructor_push_rxsbg( 13210 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13211 expr15_0, 13212 )?; 13213 return Some(expr16_0); 13214 } 13215 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13216 let pattern5_0 = arg3; 13217 let pattern6_0 = arg4; 13218 let pattern7_0 = arg5; 13219 let pattern8_0 = arg6; 13220 // Rule at src/isa/s390x/lower.isle line 1801. 13221 let expr0_0 = RxSBGOp::Xor; 13222 let expr1_0: u8 = 32; 13223 let expr2_0: u8 = 48; 13224 let expr3_0: i8 = 16; 13225 let expr4_0 = constructor_rxsbg_test( 13226 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13227 )?; 13228 let expr5_0 = IntCC::NotEqual; 13229 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13230 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13231 let expr8_0 = RxSBGOp::Insert; 13232 let expr9_0: u8 = 32; 13233 let expr10_0: u8 = 48; 13234 let expr11_0: i8 = 16; 13235 let expr12_0 = constructor_push_rxsbg( 13236 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13237 expr11_0, 13238 )?; 13239 return Some(expr12_0); 13240 } 13241 } 13242 return None; 13243 } 13244 13245 // Generated as internal constructor for term atomic_store_impl. 13246 pub fn constructor_atomic_store_impl<C: Context>( 13247 ctx: &mut C, 13248 arg0: &SideEffectNoResult, 13249 ) -> Option<InstOutput> { 13250 let pattern0_0 = arg0; 13251 // Rule at src/isa/s390x/lower.isle line 1858. 13252 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13253 let expr1_0 = constructor_fence_impl(ctx)?; 13254 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13255 return Some(expr2_0); 13256 } 13257 13258 // Generated as internal constructor for term icmp_val. 13259 pub fn constructor_icmp_val<C: Context>( 13260 ctx: &mut C, 13261 arg0: bool, 13262 arg1: &IntCC, 13263 arg2: Value, 13264 arg3: Value, 13265 ) -> Option<ProducesBool> { 13266 let pattern0_0 = arg0; 13267 let pattern1_0 = arg1; 13268 if let Some(()) = C::signed(ctx, pattern1_0) { 13269 let pattern3_0 = arg2; 13270 let pattern4_0 = arg3; 13271 // Rule at src/isa/s390x/lower.isle line 1925. 13272 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13273 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13274 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13275 return Some(expr2_0); 13276 } 13277 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13278 let pattern3_0 = arg2; 13279 let pattern4_0 = arg3; 13280 // Rule at src/isa/s390x/lower.isle line 1928. 13281 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13282 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13283 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13284 return Some(expr2_0); 13285 } 13286 return None; 13287 } 13288 13289 // Generated as internal constructor for term icmps_val. 13290 pub fn constructor_icmps_val<C: Context>( 13291 ctx: &mut C, 13292 arg0: bool, 13293 arg1: Value, 13294 arg2: Value, 13295 ) -> Option<ProducesFlags> { 13296 let pattern0_0 = arg0; 13297 if pattern0_0 == true { 13298 let pattern2_0 = arg1; 13299 let pattern3_0 = C::value_type(ctx, pattern2_0); 13300 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13301 let pattern5_0 = arg2; 13302 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13303 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13304 if let &InstructionData::Load { 13305 opcode: ref pattern8_0, 13306 arg: pattern8_1, 13307 flags: pattern8_2, 13308 offset: pattern8_3, 13309 } = &pattern7_0 13310 { 13311 match pattern8_0 { 13312 &Opcode::Sload16 => { 13313 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13314 // Rule at src/isa/s390x/lower.isle line 1958. 13315 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13316 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13317 let expr2_0 = constructor_icmps_mem_sext16( 13318 ctx, pattern4_0, expr0_0, &expr1_0, 13319 )?; 13320 return Some(expr2_0); 13321 } 13322 } 13323 &Opcode::Sload32 => { 13324 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13325 // Rule at src/isa/s390x/lower.isle line 1960. 13326 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13327 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13328 let expr2_0 = constructor_icmps_mem_sext32( 13329 ctx, pattern4_0, expr0_0, &expr1_0, 13330 )?; 13331 return Some(expr2_0); 13332 } 13333 } 13334 _ => {} 13335 } 13336 } 13337 } 13338 let pattern6_0 = C::value_type(ctx, pattern5_0); 13339 if pattern6_0 == I16 { 13340 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13341 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13342 if let &InstructionData::Load { 13343 opcode: ref pattern10_0, 13344 arg: pattern10_1, 13345 flags: pattern10_2, 13346 offset: pattern10_3, 13347 } = &pattern9_0 13348 { 13349 if let &Opcode::Load = pattern10_0 { 13350 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13351 // Rule at src/isa/s390x/lower.isle line 1954. 13352 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13353 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13354 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13355 let expr3_0 = 13356 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13357 return Some(expr3_0); 13358 } 13359 } 13360 } 13361 } 13362 } 13363 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13364 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13365 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13366 if let &InstructionData::Load { 13367 opcode: ref pattern10_0, 13368 arg: pattern10_1, 13369 flags: pattern10_2, 13370 offset: pattern10_3, 13371 } = &pattern9_0 13372 { 13373 if let &Opcode::Load = pattern10_0 { 13374 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13375 // Rule at src/isa/s390x/lower.isle line 1950. 13376 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13377 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13378 let expr2_0 = 13379 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13380 return Some(expr2_0); 13381 } 13382 } 13383 } 13384 } 13385 } 13386 } 13387 } 13388 let pattern1_0 = arg1; 13389 let pattern2_0 = C::value_type(ctx, pattern1_0); 13390 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13391 let pattern4_0 = arg2; 13392 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13393 // Rule at src/isa/s390x/lower.isle line 1944. 13394 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13395 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13396 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13397 return Some(expr2_0); 13398 } 13399 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13400 // Rule at src/isa/s390x/lower.isle line 1946. 13401 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13402 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13403 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13404 return Some(expr2_0); 13405 } 13406 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13407 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13408 if let &InstructionData::Unary { 13409 opcode: ref pattern7_0, 13410 arg: pattern7_1, 13411 } = &pattern6_0 13412 { 13413 if let &Opcode::Sextend = pattern7_0 { 13414 let pattern9_0 = C::value_type(ctx, pattern7_1); 13415 if pattern9_0 == I32 { 13416 // Rule at src/isa/s390x/lower.isle line 1940. 13417 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13418 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13419 let expr2_0 = 13420 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13421 return Some(expr2_0); 13422 } 13423 } 13424 } 13425 } 13426 // Rule at src/isa/s390x/lower.isle line 1936. 13427 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13428 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13429 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13430 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13431 return Some(expr3_0); 13432 } 13433 return None; 13434 } 13435 13436 // Generated as internal constructor for term icmpu_val. 13437 pub fn constructor_icmpu_val<C: Context>( 13438 ctx: &mut C, 13439 arg0: bool, 13440 arg1: Value, 13441 arg2: Value, 13442 ) -> Option<ProducesFlags> { 13443 let pattern0_0 = arg0; 13444 if pattern0_0 == true { 13445 let pattern2_0 = arg1; 13446 let pattern3_0 = C::value_type(ctx, pattern2_0); 13447 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13448 let pattern5_0 = arg2; 13449 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13450 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13451 if let &InstructionData::Load { 13452 opcode: ref pattern8_0, 13453 arg: pattern8_1, 13454 flags: pattern8_2, 13455 offset: pattern8_3, 13456 } = &pattern7_0 13457 { 13458 match pattern8_0 { 13459 &Opcode::Uload16 => { 13460 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13461 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13462 if let &InstructionData::UnaryGlobalValue { 13463 opcode: ref pattern12_0, 13464 global_value: pattern12_1, 13465 } = &pattern11_0 13466 { 13467 if let &Opcode::SymbolValue = pattern12_0 { 13468 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13469 C::symbol_value_data(ctx, pattern12_1) 13470 { 13471 if let Some(()) = 13472 C::reloc_distance_near(ctx, pattern14_1) 13473 { 13474 let pattern16_0 = 13475 C::i64_from_offset(ctx, pattern8_3); 13476 let mut closure17 = || { 13477 return Some(pattern14_2); 13478 }; 13479 if let Some(pattern17_0) = closure17() { 13480 if let Some(pattern18_0) = 13481 C::memarg_symbol_offset_sum( 13482 ctx, 13483 pattern16_0, 13484 pattern17_0, 13485 ) 13486 { 13487 let pattern19_0 = 13488 C::inst_data(ctx, pattern6_0); 13489 if let &InstructionData::Load { 13490 opcode: ref pattern20_0, 13491 arg: pattern20_1, 13492 flags: pattern20_2, 13493 offset: pattern20_3, 13494 } = &pattern19_0 13495 { 13496 if let &Opcode::Uload16 = pattern20_0 { 13497 if let Some(()) = 13498 C::bigendian(ctx, pattern20_2) 13499 { 13500 // Rule at src/isa/s390x/lower.isle line 1993. 13501 let expr0_0 = C::put_in_reg( 13502 ctx, pattern2_0, 13503 ); 13504 let expr1_0 = 13505 constructor_sink_uload16( 13506 ctx, pattern6_0, 13507 )?; 13508 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13509 return Some(expr2_0); 13510 } 13511 } 13512 } 13513 } 13514 } 13515 } 13516 } 13517 } 13518 } 13519 } 13520 } 13521 &Opcode::Uload32 => { 13522 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13523 // Rule at src/isa/s390x/lower.isle line 1996. 13524 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13525 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13526 let expr2_0 = constructor_icmpu_mem_zext32( 13527 ctx, pattern4_0, expr0_0, &expr1_0, 13528 )?; 13529 return Some(expr2_0); 13530 } 13531 } 13532 _ => {} 13533 } 13534 } 13535 } 13536 let pattern6_0 = C::value_type(ctx, pattern5_0); 13537 if pattern6_0 == I16 { 13538 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13539 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13540 if let &InstructionData::Load { 13541 opcode: ref pattern10_0, 13542 arg: pattern10_1, 13543 flags: pattern10_2, 13544 offset: pattern10_3, 13545 } = &pattern9_0 13546 { 13547 if let &Opcode::Load = pattern10_0 { 13548 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13549 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13550 if let &InstructionData::UnaryGlobalValue { 13551 opcode: ref pattern14_0, 13552 global_value: pattern14_1, 13553 } = &pattern13_0 13554 { 13555 if let &Opcode::SymbolValue = pattern14_0 { 13556 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13557 C::symbol_value_data(ctx, pattern14_1) 13558 { 13559 if let Some(()) = 13560 C::reloc_distance_near(ctx, pattern16_1) 13561 { 13562 let pattern18_0 = 13563 C::i64_from_offset(ctx, pattern10_3); 13564 let mut closure19 = || { 13565 return Some(pattern16_2); 13566 }; 13567 if let Some(pattern19_0) = closure19() { 13568 if let Some(pattern20_0) = 13569 C::memarg_symbol_offset_sum( 13570 ctx, 13571 pattern18_0, 13572 pattern19_0, 13573 ) 13574 { 13575 let pattern21_0 = 13576 C::inst_data(ctx, pattern8_0); 13577 if let &InstructionData::Load { 13578 opcode: ref pattern22_0, 13579 arg: pattern22_1, 13580 flags: pattern22_2, 13581 offset: pattern22_3, 13582 } = &pattern21_0 13583 { 13584 if let &Opcode::Load = pattern22_0 { 13585 if let Some(()) = 13586 C::bigendian(ctx, pattern22_2) 13587 { 13588 // Rule at src/isa/s390x/lower.isle line 1986. 13589 let expr0_0 = 13590 constructor_ty_ext32( 13591 ctx, pattern4_0, 13592 )?; 13593 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13594 let expr2_0 = 13595 constructor_sink_load( 13596 ctx, pattern8_0, 13597 )?; 13598 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13599 return Some(expr3_0); 13600 } 13601 } 13602 } 13603 } 13604 } 13605 } 13606 } 13607 } 13608 } 13609 } 13610 } 13611 } 13612 } 13613 } 13614 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13615 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13616 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13617 if let &InstructionData::Load { 13618 opcode: ref pattern10_0, 13619 arg: pattern10_1, 13620 flags: pattern10_2, 13621 offset: pattern10_3, 13622 } = &pattern9_0 13623 { 13624 if let &Opcode::Load = pattern10_0 { 13625 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13626 // Rule at src/isa/s390x/lower.isle line 1980. 13627 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13628 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13629 let expr2_0 = 13630 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13631 return Some(expr2_0); 13632 } 13633 } 13634 } 13635 } 13636 } 13637 } 13638 } 13639 let pattern1_0 = arg1; 13640 let pattern2_0 = C::value_type(ctx, pattern1_0); 13641 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13642 let pattern4_0 = arg2; 13643 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13644 // Rule at src/isa/s390x/lower.isle line 1976. 13645 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13646 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13647 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13648 return Some(expr2_0); 13649 } 13650 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13651 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13652 if let &InstructionData::Unary { 13653 opcode: ref pattern7_0, 13654 arg: pattern7_1, 13655 } = &pattern6_0 13656 { 13657 if let &Opcode::Uextend = pattern7_0 { 13658 let pattern9_0 = C::value_type(ctx, pattern7_1); 13659 if pattern9_0 == I32 { 13660 // Rule at src/isa/s390x/lower.isle line 1972. 13661 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13662 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13663 let expr2_0 = 13664 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13665 return Some(expr2_0); 13666 } 13667 } 13668 } 13669 } 13670 // Rule at src/isa/s390x/lower.isle line 1968. 13671 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13672 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13673 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13674 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13675 return Some(expr3_0); 13676 } 13677 return None; 13678 } 13679 13680 // Generated as internal constructor for term fcmp_val. 13681 pub fn constructor_fcmp_val<C: Context>( 13682 ctx: &mut C, 13683 arg0: &FloatCC, 13684 arg1: Value, 13685 arg2: Value, 13686 ) -> Option<ProducesBool> { 13687 let pattern0_0 = arg0; 13688 let pattern1_0 = arg1; 13689 let pattern2_0 = C::value_type(ctx, pattern1_0); 13690 let pattern3_0 = arg2; 13691 // Rule at src/isa/s390x/lower.isle line 2009. 13692 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13693 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13694 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13695 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13696 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13697 return Some(expr4_0); 13698 } 13699 13700 // Generated as internal constructor for term value_nonzero. 13701 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13702 let pattern0_0 = arg0; 13703 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13704 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13705 match &pattern2_0 { 13706 &InstructionData::FloatCompare { 13707 opcode: ref pattern3_0, 13708 args: ref pattern3_1, 13709 cond: ref pattern3_2, 13710 } => { 13711 if let &Opcode::Fcmp = pattern3_0 { 13712 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13713 // Rule at src/isa/s390x/lower.isle line 2037. 13714 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13715 return Some(expr0_0); 13716 } 13717 } 13718 &InstructionData::IntCompare { 13719 opcode: ref pattern3_0, 13720 args: ref pattern3_1, 13721 cond: ref pattern3_2, 13722 } => { 13723 if let &Opcode::Icmp = pattern3_0 { 13724 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13725 // Rule at src/isa/s390x/lower.isle line 2036. 13726 let expr0_0: bool = false; 13727 let expr1_0 = 13728 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13729 return Some(expr1_0); 13730 } 13731 } 13732 &InstructionData::Unary { 13733 opcode: ref pattern3_0, 13734 arg: pattern3_1, 13735 } => { 13736 if let &Opcode::Bint = pattern3_0 { 13737 // Rule at src/isa/s390x/lower.isle line 2035. 13738 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13739 return Some(expr0_0); 13740 } 13741 } 13742 _ => {} 13743 } 13744 } 13745 let pattern1_0 = C::value_type(ctx, pattern0_0); 13746 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13747 // Rule at src/isa/s390x/lower.isle line 2038. 13748 let expr0_0: Type = I32; 13749 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13750 let expr2_0: i16 = 0; 13751 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13752 let expr4_0 = IntCC::NotEqual; 13753 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13754 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13755 return Some(expr6_0); 13756 } 13757 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13758 // Rule at src/isa/s390x/lower.isle line 2041. 13759 let expr0_0: Type = I64; 13760 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13761 let expr2_0: i16 = 0; 13762 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13763 let expr4_0 = IntCC::NotEqual; 13764 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13765 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13766 return Some(expr6_0); 13767 } 13768 return None; 13769 } 13770