1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case, unused_mut)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn s32_add_fallible(&mut self, arg0: u32, arg1: u32) -> Option<u32>; 25 fn u32_nonnegative(&mut self, arg0: u32) -> Option<u32>; 26 fn offset32(&mut self, arg0: Offset32) -> Option<u32>; 27 fn u32_lteq(&mut self, arg0: u32, arg1: u32) -> Option<Unit>; 28 fn simm32(&mut self, arg0: Imm64) -> Option<u32>; 29 fn uimm8(&mut self, arg0: Imm64) -> Option<u8>; 30 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 31 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 32 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 33 fn value_regs_invalid(&mut self) -> ValueRegs; 34 fn output_none(&mut self) -> InstOutput; 35 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 36 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 37 fn output_builder_new(&mut self) -> InstOutputBuilder; 38 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 39 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 40 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 41 fn invalid_reg_etor(&mut self, arg0: Reg) -> Option<()>; 42 fn invalid_reg(&mut self) -> Reg; 43 fn valid_reg(&mut self, arg0: Reg) -> Option<()>; 44 fn put_in_reg(&mut self, arg0: Value) -> Reg; 45 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 46 fn ensure_in_vreg(&mut self, arg0: Reg, arg1: Type) -> Reg; 47 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 48 fn u8_as_u32(&mut self, arg0: u8) -> Option<u32>; 49 fn u8_as_u64(&mut self, arg0: u8) -> Option<u64>; 50 fn u16_as_u64(&mut self, arg0: u16) -> Option<u64>; 51 fn u32_as_u64(&mut self, arg0: u32) -> Option<u64>; 52 fn i64_as_u64(&mut self, arg0: i64) -> Option<u64>; 53 fn u64_add(&mut self, arg0: u64, arg1: u64) -> Option<u64>; 54 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> Option<u64>; 55 fn u64_and(&mut self, arg0: u64, arg1: u64) -> Option<u64>; 56 fn ty_bits(&mut self, arg0: Type) -> Option<u8>; 57 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 58 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 59 fn ty_mask(&mut self, arg0: Type) -> u64; 60 fn ty_bytes(&mut self, arg0: Type) -> u16; 61 fn lane_type(&mut self, arg0: Type) -> Type; 62 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 63 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 64 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 65 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 66 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 67 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 68 fn ty_int_bool_ref_64(&mut self, arg0: Type) -> Option<Type>; 69 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 70 fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>; 71 fn ty_vec128(&mut self, arg0: Type) -> Option<Type>; 72 fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>; 73 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 74 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 75 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 76 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 77 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 78 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 79 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 80 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 81 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 82 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 83 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 84 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 85 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 86 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 87 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 88 fn value_type(&mut self, arg0: Value) -> Type; 89 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 90 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 91 fn offset32_to_u32(&mut self, arg0: Offset32) -> u32; 92 fn emit(&mut self, arg0: &MInst) -> Unit; 93 fn trap_code_division_by_zero(&mut self) -> TrapCode; 94 fn trap_code_integer_overflow(&mut self) -> TrapCode; 95 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 96 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 97 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 98 fn symbol_value_data( 99 &mut self, 100 arg0: GlobalValue, 101 ) -> Option<(ExternalName, RelocDistance, i64)>; 102 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 103 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 104 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 105 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 106 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 107 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 108 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 109 fn zero_reg(&mut self) -> Reg; 110 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 111 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 112 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 113 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 114 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 115 fn u8_as_u16(&mut self, arg0: u8) -> u16; 116 fn u64_as_u32(&mut self, arg0: u64) -> u32; 117 fn u64_as_i16(&mut self, arg0: u64) -> i16; 118 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 119 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 120 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 121 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 122 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 123 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 124 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 125 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 126 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 127 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 128 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 129 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 130 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 131 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 132 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 133 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 134 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 135 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 136 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 137 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 138 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 139 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 140 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 141 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 142 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 143 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 144 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 145 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 146 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 147 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 148 fn zero_offset(&mut self) -> Offset32; 149 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 150 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 151 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 152 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 153 fn memflags_trusted(&mut self) -> MemFlags; 154 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 155 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 156 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 157 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 158 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 159 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 160 fn sink_inst(&mut self, arg0: Inst) -> Unit; 161 fn inst_builder_new(&mut self) -> VecMInstBuilder; 162 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 163 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 164 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 165 fn same_reg(&mut self, arg0: WritableReg, arg1: Reg) -> Option<Reg>; 166 } 167 168 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 447. 169 #[derive(Clone, Debug)] 170 pub enum SideEffectNoResult { 171 Inst { inst: MInst }, 172 Inst2 { inst1: MInst, inst2: MInst }, 173 } 174 175 /// Internal type ProducesFlags: defined at src/prelude.isle line 474. 176 #[derive(Clone, Debug)] 177 pub enum ProducesFlags { 178 ProducesFlagsSideEffect { inst: MInst }, 179 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 180 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 181 } 182 183 /// Internal type ConsumesFlags: defined at src/prelude.isle line 485. 184 #[derive(Clone, Debug)] 185 pub enum ConsumesFlags { 186 ConsumesFlagsReturnsResultWithProducer { 187 inst: MInst, 188 result: Reg, 189 }, 190 ConsumesFlagsReturnsReg { 191 inst: MInst, 192 result: Reg, 193 }, 194 ConsumesFlagsTwiceReturnsValueRegs { 195 inst1: MInst, 196 inst2: MInst, 197 result: ValueRegs, 198 }, 199 ConsumesFlagsFourTimesReturnsValueRegs { 200 inst1: MInst, 201 inst2: MInst, 202 inst3: MInst, 203 inst4: MInst, 204 result: ValueRegs, 205 }, 206 } 207 208 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 209 #[derive(Clone, Debug)] 210 pub enum MInst { 211 Nop0, 212 Nop2, 213 AluRRR { 214 alu_op: ALUOp, 215 rd: WritableReg, 216 rn: Reg, 217 rm: Reg, 218 }, 219 AluRRSImm16 { 220 alu_op: ALUOp, 221 rd: WritableReg, 222 rn: Reg, 223 imm: i16, 224 }, 225 AluRR { 226 alu_op: ALUOp, 227 rd: WritableReg, 228 rm: Reg, 229 }, 230 AluRX { 231 alu_op: ALUOp, 232 rd: WritableReg, 233 mem: MemArg, 234 }, 235 AluRSImm16 { 236 alu_op: ALUOp, 237 rd: WritableReg, 238 imm: i16, 239 }, 240 AluRSImm32 { 241 alu_op: ALUOp, 242 rd: WritableReg, 243 imm: i32, 244 }, 245 AluRUImm32 { 246 alu_op: ALUOp, 247 rd: WritableReg, 248 imm: u32, 249 }, 250 AluRUImm16Shifted { 251 alu_op: ALUOp, 252 rd: WritableReg, 253 imm: UImm16Shifted, 254 }, 255 AluRUImm32Shifted { 256 alu_op: ALUOp, 257 rd: WritableReg, 258 imm: UImm32Shifted, 259 }, 260 SMulWide { 261 rn: Reg, 262 rm: Reg, 263 }, 264 UMulWide { 265 rn: Reg, 266 }, 267 SDivMod32 { 268 rn: Reg, 269 }, 270 SDivMod64 { 271 rn: Reg, 272 }, 273 UDivMod32 { 274 rn: Reg, 275 }, 276 UDivMod64 { 277 rn: Reg, 278 }, 279 Flogr { 280 rn: Reg, 281 }, 282 ShiftRR { 283 shift_op: ShiftOp, 284 rd: WritableReg, 285 rn: Reg, 286 shift_imm: u8, 287 shift_reg: Reg, 288 }, 289 RxSBG { 290 op: RxSBGOp, 291 rd: WritableReg, 292 rn: Reg, 293 start_bit: u8, 294 end_bit: u8, 295 rotate_amt: i8, 296 }, 297 RxSBGTest { 298 op: RxSBGOp, 299 rd: Reg, 300 rn: Reg, 301 start_bit: u8, 302 end_bit: u8, 303 rotate_amt: i8, 304 }, 305 UnaryRR { 306 op: UnaryOp, 307 rd: WritableReg, 308 rn: Reg, 309 }, 310 CmpRR { 311 op: CmpOp, 312 rn: Reg, 313 rm: Reg, 314 }, 315 CmpRX { 316 op: CmpOp, 317 rn: Reg, 318 mem: MemArg, 319 }, 320 CmpRSImm16 { 321 op: CmpOp, 322 rn: Reg, 323 imm: i16, 324 }, 325 CmpRSImm32 { 326 op: CmpOp, 327 rn: Reg, 328 imm: i32, 329 }, 330 CmpRUImm32 { 331 op: CmpOp, 332 rn: Reg, 333 imm: u32, 334 }, 335 CmpTrapRR { 336 op: CmpOp, 337 rn: Reg, 338 rm: Reg, 339 cond: Cond, 340 trap_code: TrapCode, 341 }, 342 CmpTrapRSImm16 { 343 op: CmpOp, 344 rn: Reg, 345 imm: i16, 346 cond: Cond, 347 trap_code: TrapCode, 348 }, 349 CmpTrapRUImm16 { 350 op: CmpOp, 351 rn: Reg, 352 imm: u16, 353 cond: Cond, 354 trap_code: TrapCode, 355 }, 356 AtomicRmw { 357 alu_op: ALUOp, 358 rd: WritableReg, 359 rn: Reg, 360 mem: MemArg, 361 }, 362 AtomicCas32 { 363 rd: WritableReg, 364 rn: Reg, 365 mem: MemArg, 366 }, 367 AtomicCas64 { 368 rd: WritableReg, 369 rn: Reg, 370 mem: MemArg, 371 }, 372 Fence, 373 Load32 { 374 rd: WritableReg, 375 mem: MemArg, 376 }, 377 Load32ZExt8 { 378 rd: WritableReg, 379 mem: MemArg, 380 }, 381 Load32SExt8 { 382 rd: WritableReg, 383 mem: MemArg, 384 }, 385 Load32ZExt16 { 386 rd: WritableReg, 387 mem: MemArg, 388 }, 389 Load32SExt16 { 390 rd: WritableReg, 391 mem: MemArg, 392 }, 393 Load64 { 394 rd: WritableReg, 395 mem: MemArg, 396 }, 397 Load64ZExt8 { 398 rd: WritableReg, 399 mem: MemArg, 400 }, 401 Load64SExt8 { 402 rd: WritableReg, 403 mem: MemArg, 404 }, 405 Load64ZExt16 { 406 rd: WritableReg, 407 mem: MemArg, 408 }, 409 Load64SExt16 { 410 rd: WritableReg, 411 mem: MemArg, 412 }, 413 Load64ZExt32 { 414 rd: WritableReg, 415 mem: MemArg, 416 }, 417 Load64SExt32 { 418 rd: WritableReg, 419 mem: MemArg, 420 }, 421 LoadRev16 { 422 rd: WritableReg, 423 mem: MemArg, 424 }, 425 LoadRev32 { 426 rd: WritableReg, 427 mem: MemArg, 428 }, 429 LoadRev64 { 430 rd: WritableReg, 431 mem: MemArg, 432 }, 433 Store8 { 434 rd: Reg, 435 mem: MemArg, 436 }, 437 Store16 { 438 rd: Reg, 439 mem: MemArg, 440 }, 441 Store32 { 442 rd: Reg, 443 mem: MemArg, 444 }, 445 Store64 { 446 rd: Reg, 447 mem: MemArg, 448 }, 449 StoreImm8 { 450 imm: u8, 451 mem: MemArg, 452 }, 453 StoreImm16 { 454 imm: i16, 455 mem: MemArg, 456 }, 457 StoreImm32SExt16 { 458 imm: i16, 459 mem: MemArg, 460 }, 461 StoreImm64SExt16 { 462 imm: i16, 463 mem: MemArg, 464 }, 465 StoreRev16 { 466 rd: Reg, 467 mem: MemArg, 468 }, 469 StoreRev32 { 470 rd: Reg, 471 mem: MemArg, 472 }, 473 StoreRev64 { 474 rd: Reg, 475 mem: MemArg, 476 }, 477 LoadMultiple64 { 478 rt: WritableReg, 479 rt2: WritableReg, 480 mem: MemArg, 481 }, 482 StoreMultiple64 { 483 rt: Reg, 484 rt2: Reg, 485 mem: MemArg, 486 }, 487 Mov32 { 488 rd: WritableReg, 489 rm: Reg, 490 }, 491 Mov64 { 492 rd: WritableReg, 493 rm: Reg, 494 }, 495 Mov32Imm { 496 rd: WritableReg, 497 imm: u32, 498 }, 499 Mov32SImm16 { 500 rd: WritableReg, 501 imm: i16, 502 }, 503 Mov64SImm16 { 504 rd: WritableReg, 505 imm: i16, 506 }, 507 Mov64SImm32 { 508 rd: WritableReg, 509 imm: i32, 510 }, 511 Mov64UImm16Shifted { 512 rd: WritableReg, 513 imm: UImm16Shifted, 514 }, 515 Mov64UImm32Shifted { 516 rd: WritableReg, 517 imm: UImm32Shifted, 518 }, 519 Insert64UImm16Shifted { 520 rd: WritableReg, 521 imm: UImm16Shifted, 522 }, 523 Insert64UImm32Shifted { 524 rd: WritableReg, 525 imm: UImm32Shifted, 526 }, 527 Extend { 528 rd: WritableReg, 529 rn: Reg, 530 signed: bool, 531 from_bits: u8, 532 to_bits: u8, 533 }, 534 CMov32 { 535 rd: WritableReg, 536 cond: Cond, 537 rm: Reg, 538 }, 539 CMov64 { 540 rd: WritableReg, 541 cond: Cond, 542 rm: Reg, 543 }, 544 CMov32SImm16 { 545 rd: WritableReg, 546 cond: Cond, 547 imm: i16, 548 }, 549 CMov64SImm16 { 550 rd: WritableReg, 551 cond: Cond, 552 imm: i16, 553 }, 554 FpuMove32 { 555 rd: WritableReg, 556 rn: Reg, 557 }, 558 FpuMove64 { 559 rd: WritableReg, 560 rn: Reg, 561 }, 562 FpuCMov32 { 563 rd: WritableReg, 564 cond: Cond, 565 rm: Reg, 566 }, 567 FpuCMov64 { 568 rd: WritableReg, 569 cond: Cond, 570 rm: Reg, 571 }, 572 MovToFpr { 573 rd: WritableReg, 574 rn: Reg, 575 }, 576 MovFromFpr { 577 rd: WritableReg, 578 rn: Reg, 579 }, 580 FpuRR { 581 fpu_op: FPUOp1, 582 rd: WritableReg, 583 rn: Reg, 584 }, 585 FpuRRR { 586 fpu_op: FPUOp2, 587 rd: WritableReg, 588 rm: Reg, 589 }, 590 FpuRRRR { 591 fpu_op: FPUOp3, 592 rd: WritableReg, 593 rn: Reg, 594 rm: Reg, 595 }, 596 FpuCopysign { 597 rd: WritableReg, 598 rn: Reg, 599 rm: Reg, 600 }, 601 FpuCmp32 { 602 rn: Reg, 603 rm: Reg, 604 }, 605 FpuCmp64 { 606 rn: Reg, 607 rm: Reg, 608 }, 609 FpuLoad32 { 610 rd: WritableReg, 611 mem: MemArg, 612 }, 613 FpuStore32 { 614 rd: Reg, 615 mem: MemArg, 616 }, 617 FpuLoad64 { 618 rd: WritableReg, 619 mem: MemArg, 620 }, 621 FpuStore64 { 622 rd: Reg, 623 mem: MemArg, 624 }, 625 FpuLoadRev32 { 626 rd: WritableReg, 627 mem: MemArg, 628 }, 629 FpuStoreRev32 { 630 rd: Reg, 631 mem: MemArg, 632 }, 633 FpuLoadRev64 { 634 rd: WritableReg, 635 mem: MemArg, 636 }, 637 FpuStoreRev64 { 638 rd: Reg, 639 mem: MemArg, 640 }, 641 LoadFpuConst32 { 642 rd: WritableReg, 643 const_data: u32, 644 }, 645 LoadFpuConst64 { 646 rd: WritableReg, 647 const_data: u64, 648 }, 649 FpuToInt { 650 op: FpuToIntOp, 651 rd: WritableReg, 652 rn: Reg, 653 }, 654 IntToFpu { 655 op: IntToFpuOp, 656 rd: WritableReg, 657 rn: Reg, 658 }, 659 FpuRound { 660 op: FpuRoundMode, 661 rd: WritableReg, 662 rn: Reg, 663 }, 664 FpuVecRRR { 665 fpu_op: FPUOp2, 666 rd: WritableReg, 667 rn: Reg, 668 rm: Reg, 669 }, 670 Call { 671 link: WritableReg, 672 info: BoxCallInfo, 673 }, 674 CallInd { 675 link: WritableReg, 676 info: BoxCallIndInfo, 677 }, 678 Ret { 679 link: Reg, 680 rets: VecReg, 681 }, 682 EpiloguePlaceholder, 683 Jump { 684 dest: MachLabel, 685 }, 686 CondBr { 687 taken: MachLabel, 688 not_taken: MachLabel, 689 cond: Cond, 690 }, 691 TrapIf { 692 cond: Cond, 693 trap_code: TrapCode, 694 }, 695 OneWayCondBr { 696 target: MachLabel, 697 cond: Cond, 698 }, 699 IndirectBr { 700 rn: Reg, 701 targets: VecMachLabel, 702 }, 703 Debugtrap, 704 Trap { 705 trap_code: TrapCode, 706 }, 707 JTSequence { 708 ridx: Reg, 709 targets: VecMachLabel, 710 }, 711 LoadExtNameFar { 712 rd: WritableReg, 713 name: BoxExternalName, 714 offset: i64, 715 }, 716 LoadAddr { 717 rd: WritableReg, 718 mem: MemArg, 719 }, 720 Loop { 721 body: VecMInst, 722 cond: Cond, 723 }, 724 CondBreak { 725 cond: Cond, 726 }, 727 VirtualSPOffsetAdj { 728 offset: i64, 729 }, 730 DummyUse { 731 reg: Reg, 732 }, 733 Unwind { 734 inst: UnwindInst, 735 }, 736 } 737 738 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 739 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 740 pub enum ALUOp { 741 Add32, 742 Add32Ext16, 743 Add64, 744 Add64Ext16, 745 Add64Ext32, 746 AddLogical32, 747 AddLogical64, 748 AddLogical64Ext32, 749 Sub32, 750 Sub32Ext16, 751 Sub64, 752 Sub64Ext16, 753 Sub64Ext32, 754 SubLogical32, 755 SubLogical64, 756 SubLogical64Ext32, 757 Mul32, 758 Mul32Ext16, 759 Mul64, 760 Mul64Ext16, 761 Mul64Ext32, 762 And32, 763 And64, 764 Orr32, 765 Orr64, 766 Xor32, 767 Xor64, 768 AndNot32, 769 AndNot64, 770 OrrNot32, 771 OrrNot64, 772 XorNot32, 773 XorNot64, 774 } 775 776 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 777 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 778 pub enum UnaryOp { 779 Abs32, 780 Abs64, 781 Abs64Ext32, 782 Neg32, 783 Neg64, 784 Neg64Ext32, 785 PopcntByte, 786 PopcntReg, 787 BSwap32, 788 BSwap64, 789 } 790 791 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 792 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 793 pub enum ShiftOp { 794 RotL32, 795 RotL64, 796 LShL32, 797 LShL64, 798 LShR32, 799 LShR64, 800 AShR32, 801 AShR64, 802 } 803 804 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 805 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 806 pub enum RxSBGOp { 807 Insert, 808 And, 809 Or, 810 Xor, 811 } 812 813 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 814 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 815 pub enum CmpOp { 816 CmpS32, 817 CmpS32Ext16, 818 CmpS64, 819 CmpS64Ext16, 820 CmpS64Ext32, 821 CmpL32, 822 CmpL32Ext16, 823 CmpL64, 824 CmpL64Ext16, 825 CmpL64Ext32, 826 } 827 828 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 829 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 830 pub enum FPUOp1 { 831 Abs32, 832 Abs64, 833 Neg32, 834 Neg64, 835 NegAbs32, 836 NegAbs64, 837 Sqrt32, 838 Sqrt64, 839 Cvt32To64, 840 Cvt64To32, 841 } 842 843 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 844 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 845 pub enum FPUOp2 { 846 Add32, 847 Add64, 848 Sub32, 849 Sub64, 850 Mul32, 851 Mul64, 852 Div32, 853 Div64, 854 Max32, 855 Max64, 856 Min32, 857 Min64, 858 } 859 860 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 861 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 862 pub enum FPUOp3 { 863 MAdd32, 864 MAdd64, 865 MSub32, 866 MSub64, 867 } 868 869 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 870 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 871 pub enum FpuToIntOp { 872 F32ToU32, 873 F32ToI32, 874 F32ToU64, 875 F32ToI64, 876 F64ToU32, 877 F64ToI32, 878 F64ToU64, 879 F64ToI64, 880 } 881 882 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 883 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 884 pub enum IntToFpuOp { 885 U32ToF32, 886 I32ToF32, 887 U32ToF64, 888 I32ToF64, 889 U64ToF32, 890 I64ToF32, 891 U64ToF64, 892 I64ToF64, 893 } 894 895 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 896 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 897 pub enum FpuRoundMode { 898 Minus32, 899 Minus64, 900 Plus32, 901 Plus64, 902 Zero32, 903 Zero64, 904 Nearest32, 905 Nearest64, 906 } 907 908 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1278. 909 #[derive(Clone, Debug)] 910 pub enum WritableRegPair { 911 WritableRegPair { hi: WritableReg, lo: WritableReg }, 912 } 913 914 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1300. 915 #[derive(Clone, Debug)] 916 pub enum RegPair { 917 RegPair { hi: Reg, lo: Reg }, 918 } 919 920 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2327. 921 #[derive(Clone, Debug)] 922 pub enum ProducesBool { 923 ProducesBool { producer: ProducesFlags, cond: Cond }, 924 } 925 926 // Generated as internal constructor for term output_reg. 927 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 928 let pattern0_0 = arg0; 929 // Rule at src/prelude.isle line 113. 930 let expr0_0 = C::value_reg(ctx, pattern0_0); 931 let expr1_0 = C::output(ctx, expr0_0); 932 return Some(expr1_0); 933 } 934 935 // Generated as internal constructor for term output_value. 936 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 937 let pattern0_0 = arg0; 938 // Rule at src/prelude.isle line 117. 939 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 940 let expr1_0 = C::output(ctx, expr0_0); 941 return Some(expr1_0); 942 } 943 944 // Generated as internal constructor for term temp_reg. 945 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 946 let pattern0_0 = arg0; 947 // Rule at src/prelude.isle line 137. 948 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 949 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 950 return Some(expr1_0); 951 } 952 953 // Generated as internal constructor for term lo_reg. 954 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 955 let pattern0_0 = arg0; 956 // Rule at src/prelude.isle line 182. 957 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 958 let expr1_0: usize = 0; 959 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 960 return Some(expr2_0); 961 } 962 963 // Generated as internal constructor for term side_effect. 964 pub fn constructor_side_effect<C: Context>( 965 ctx: &mut C, 966 arg0: &SideEffectNoResult, 967 ) -> Option<InstOutput> { 968 let pattern0_0 = arg0; 969 match pattern0_0 { 970 &SideEffectNoResult::Inst { 971 inst: ref pattern1_0, 972 } => { 973 // Rule at src/prelude.isle line 455. 974 let expr0_0 = C::emit(ctx, pattern1_0); 975 let expr1_0 = C::output_none(ctx); 976 return Some(expr1_0); 977 } 978 &SideEffectNoResult::Inst2 { 979 inst1: ref pattern1_0, 980 inst2: ref pattern1_1, 981 } => { 982 // Rule at src/prelude.isle line 458. 983 let expr0_0 = C::emit(ctx, pattern1_0); 984 let expr1_0 = C::emit(ctx, pattern1_1); 985 let expr2_0 = C::output_none(ctx); 986 return Some(expr2_0); 987 } 988 _ => {} 989 } 990 return None; 991 } 992 993 // Generated as internal constructor for term side_effect_concat. 994 pub fn constructor_side_effect_concat<C: Context>( 995 ctx: &mut C, 996 arg0: &SideEffectNoResult, 997 arg1: &SideEffectNoResult, 998 ) -> Option<SideEffectNoResult> { 999 let pattern0_0 = arg0; 1000 if let &SideEffectNoResult::Inst { 1001 inst: ref pattern1_0, 1002 } = pattern0_0 1003 { 1004 let pattern2_0 = arg1; 1005 if let &SideEffectNoResult::Inst { 1006 inst: ref pattern3_0, 1007 } = pattern2_0 1008 { 1009 // Rule at src/prelude.isle line 464. 1010 let expr0_0 = SideEffectNoResult::Inst2 { 1011 inst1: pattern1_0.clone(), 1012 inst2: pattern3_0.clone(), 1013 }; 1014 return Some(expr0_0); 1015 } 1016 } 1017 return None; 1018 } 1019 1020 // Generated as internal constructor for term produces_flags_get_reg. 1021 pub fn constructor_produces_flags_get_reg<C: Context>( 1022 ctx: &mut C, 1023 arg0: &ProducesFlags, 1024 ) -> Option<Reg> { 1025 let pattern0_0 = arg0; 1026 if let &ProducesFlags::ProducesFlagsReturnsReg { 1027 inst: ref pattern1_0, 1028 result: pattern1_1, 1029 } = pattern0_0 1030 { 1031 // Rule at src/prelude.isle line 501. 1032 return Some(pattern1_1); 1033 } 1034 return None; 1035 } 1036 1037 // Generated as internal constructor for term produces_flags_ignore. 1038 pub fn constructor_produces_flags_ignore<C: Context>( 1039 ctx: &mut C, 1040 arg0: &ProducesFlags, 1041 ) -> Option<ProducesFlags> { 1042 let pattern0_0 = arg0; 1043 match pattern0_0 { 1044 &ProducesFlags::ProducesFlagsReturnsReg { 1045 inst: ref pattern1_0, 1046 result: pattern1_1, 1047 } => { 1048 // Rule at src/prelude.isle line 506. 1049 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1050 inst: pattern1_0.clone(), 1051 }; 1052 return Some(expr0_0); 1053 } 1054 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1055 inst: ref pattern1_0, 1056 result: pattern1_1, 1057 } => { 1058 // Rule at src/prelude.isle line 508. 1059 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1060 inst: pattern1_0.clone(), 1061 }; 1062 return Some(expr0_0); 1063 } 1064 _ => {} 1065 } 1066 return None; 1067 } 1068 1069 // Generated as internal constructor for term consumes_flags_concat. 1070 pub fn constructor_consumes_flags_concat<C: Context>( 1071 ctx: &mut C, 1072 arg0: &ConsumesFlags, 1073 arg1: &ConsumesFlags, 1074 ) -> Option<ConsumesFlags> { 1075 let pattern0_0 = arg0; 1076 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1077 inst: ref pattern1_0, 1078 result: pattern1_1, 1079 } = pattern0_0 1080 { 1081 let pattern2_0 = arg1; 1082 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1083 inst: ref pattern3_0, 1084 result: pattern3_1, 1085 } = pattern2_0 1086 { 1087 // Rule at src/prelude.isle line 515. 1088 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1089 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1090 inst1: pattern1_0.clone(), 1091 inst2: pattern3_0.clone(), 1092 result: expr0_0, 1093 }; 1094 return Some(expr1_0); 1095 } 1096 } 1097 return None; 1098 } 1099 1100 // Generated as internal constructor for term with_flags. 1101 pub fn constructor_with_flags<C: Context>( 1102 ctx: &mut C, 1103 arg0: &ProducesFlags, 1104 arg1: &ConsumesFlags, 1105 ) -> Option<ValueRegs> { 1106 let pattern0_0 = arg0; 1107 match pattern0_0 { 1108 &ProducesFlags::ProducesFlagsSideEffect { 1109 inst: ref pattern1_0, 1110 } => { 1111 let pattern2_0 = arg1; 1112 match pattern2_0 { 1113 &ConsumesFlags::ConsumesFlagsReturnsReg { 1114 inst: ref pattern3_0, 1115 result: pattern3_1, 1116 } => { 1117 // Rule at src/prelude.isle line 540. 1118 let expr0_0 = C::emit(ctx, pattern1_0); 1119 let expr1_0 = C::emit(ctx, pattern3_0); 1120 let expr2_0 = C::value_reg(ctx, pattern3_1); 1121 return Some(expr2_0); 1122 } 1123 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1124 inst1: ref pattern3_0, 1125 inst2: ref pattern3_1, 1126 result: pattern3_2, 1127 } => { 1128 // Rule at src/prelude.isle line 546. 1129 let expr0_0 = C::emit(ctx, pattern1_0); 1130 let expr1_0 = C::emit(ctx, pattern3_0); 1131 let expr2_0 = C::emit(ctx, pattern3_1); 1132 return Some(pattern3_2); 1133 } 1134 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1135 inst1: ref pattern3_0, 1136 inst2: ref pattern3_1, 1137 inst3: ref pattern3_2, 1138 inst4: ref pattern3_3, 1139 result: pattern3_4, 1140 } => { 1141 // Rule at src/prelude.isle line 558. 1142 let expr0_0 = C::emit(ctx, pattern1_0); 1143 let expr1_0 = C::emit(ctx, pattern3_0); 1144 let expr2_0 = C::emit(ctx, pattern3_1); 1145 let expr3_0 = C::emit(ctx, pattern3_2); 1146 let expr4_0 = C::emit(ctx, pattern3_3); 1147 return Some(pattern3_4); 1148 } 1149 _ => {} 1150 } 1151 } 1152 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1153 inst: ref pattern1_0, 1154 result: pattern1_1, 1155 } => { 1156 let pattern2_0 = arg1; 1157 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1158 inst: ref pattern3_0, 1159 result: pattern3_1, 1160 } = pattern2_0 1161 { 1162 // Rule at src/prelude.isle line 534. 1163 let expr0_0 = C::emit(ctx, pattern1_0); 1164 let expr1_0 = C::emit(ctx, pattern3_0); 1165 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1166 return Some(expr2_0); 1167 } 1168 } 1169 _ => {} 1170 } 1171 return None; 1172 } 1173 1174 // Generated as internal constructor for term with_flags_reg. 1175 pub fn constructor_with_flags_reg<C: Context>( 1176 ctx: &mut C, 1177 arg0: &ProducesFlags, 1178 arg1: &ConsumesFlags, 1179 ) -> Option<Reg> { 1180 let pattern0_0 = arg0; 1181 let pattern1_0 = arg1; 1182 // Rule at src/prelude.isle line 575. 1183 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1184 let expr1_0: usize = 0; 1185 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1186 return Some(expr2_0); 1187 } 1188 1189 // Generated as internal constructor for term i64_nonzero. 1190 pub fn constructor_i64_nonzero<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> { 1191 let pattern0_0 = arg0; 1192 let mut closure1 = || { 1193 let expr0_0: i64 = 0; 1194 let expr1_0 = C::i64_nonequal(ctx, pattern0_0, expr0_0)?; 1195 return Some(expr1_0); 1196 }; 1197 if let Some(pattern1_0) = closure1() { 1198 // Rule at src/isa/s390x/inst.isle line 944. 1199 return Some(pattern0_0); 1200 } 1201 return None; 1202 } 1203 1204 // Generated as internal constructor for term i64_not_neg1. 1205 pub fn constructor_i64_not_neg1<C: Context>(ctx: &mut C, arg0: i64) -> Option<i64> { 1206 let pattern0_0 = arg0; 1207 let mut closure1 = || { 1208 let expr0_0: i64 = -1; 1209 let expr1_0 = C::i64_nonequal(ctx, pattern0_0, expr0_0)?; 1210 return Some(expr1_0); 1211 }; 1212 if let Some(pattern1_0) = closure1() { 1213 // Rule at src/isa/s390x/inst.isle line 949. 1214 return Some(pattern0_0); 1215 } 1216 return None; 1217 } 1218 1219 // Generated as internal constructor for term mask_amt_reg. 1220 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1221 let pattern0_0 = arg0; 1222 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1223 let pattern2_0 = arg1; 1224 // Rule at src/isa/s390x/inst.isle line 1044. 1225 let expr0_0: i64 = -1; 1226 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1227 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1228 let expr3_0: u8 = 0; 1229 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1230 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1231 return Some(expr5_0); 1232 } 1233 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1234 let pattern2_0 = arg1; 1235 // Rule at src/isa/s390x/inst.isle line 1047. 1236 return Some(pattern2_0); 1237 } 1238 return None; 1239 } 1240 1241 // Generated as internal constructor for term memarg_symbol_offset. 1242 pub fn constructor_memarg_symbol_offset<C: Context>(ctx: &mut C, arg0: i64) -> Option<i32> { 1243 let pattern0_0 = arg0; 1244 // Rule at src/isa/s390x/inst.isle line 1128. 1245 let expr0_0: i64 = 0; 1246 let expr1_0 = C::memarg_symbol_offset_sum(ctx, pattern0_0, expr0_0)?; 1247 return Some(expr1_0); 1248 } 1249 1250 // Generated as internal constructor for term lower_address. 1251 pub fn constructor_lower_address<C: Context>( 1252 ctx: &mut C, 1253 arg0: MemFlags, 1254 arg1: Value, 1255 arg2: Offset32, 1256 ) -> Option<MemArg> { 1257 let pattern0_0 = arg0; 1258 let pattern1_0 = arg1; 1259 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1260 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1261 match &pattern3_0 { 1262 &InstructionData::UnaryGlobalValue { 1263 opcode: ref pattern4_0, 1264 global_value: pattern4_1, 1265 } => { 1266 if let &Opcode::SymbolValue = pattern4_0 { 1267 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1268 C::symbol_value_data(ctx, pattern4_1) 1269 { 1270 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1271 let pattern8_0 = arg2; 1272 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1273 let mut closure10 = || { 1274 let expr0_0 = 1275 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern6_2)?; 1276 return Some(expr0_0); 1277 }; 1278 if let Some(pattern10_0) = closure10() { 1279 // Rule at src/isa/s390x/inst.isle line 1141. 1280 let expr0_0 = 1281 C::memarg_symbol(ctx, pattern6_0, pattern10_0, pattern0_0); 1282 return Some(expr0_0); 1283 } 1284 } 1285 } 1286 } 1287 } 1288 &InstructionData::Binary { 1289 opcode: ref pattern4_0, 1290 args: ref pattern4_1, 1291 } => { 1292 if let &Opcode::Iadd = pattern4_0 { 1293 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1294 let pattern7_0 = arg2; 1295 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1296 if pattern8_0 == 0 { 1297 // Rule at src/isa/s390x/inst.isle line 1138. 1298 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1299 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1300 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1301 return Some(expr2_0); 1302 } 1303 } 1304 } 1305 _ => {} 1306 } 1307 } 1308 let pattern2_0 = arg2; 1309 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1310 // Rule at src/isa/s390x/inst.isle line 1135. 1311 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1312 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1313 return Some(expr1_0); 1314 } 1315 1316 // Generated as internal constructor for term load_sym. 1317 pub fn constructor_load_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> { 1318 let pattern0_0 = arg0; 1319 let mut closure1 = || { 1320 return Some(pattern0_0); 1321 }; 1322 if let Some(pattern1_0) = closure1() { 1323 let pattern2_0 = C::inst_data(ctx, pattern1_0); 1324 if let &InstructionData::Load { 1325 opcode: ref pattern3_0, 1326 arg: pattern3_1, 1327 flags: pattern3_2, 1328 offset: pattern3_3, 1329 } = &pattern2_0 1330 { 1331 if let &Opcode::Load = pattern3_0 { 1332 if let Some(pattern5_0) = C::def_inst(ctx, pattern3_1) { 1333 let pattern6_0 = C::inst_data(ctx, pattern5_0); 1334 if let &InstructionData::UnaryGlobalValue { 1335 opcode: ref pattern7_0, 1336 global_value: pattern7_1, 1337 } = &pattern6_0 1338 { 1339 if let &Opcode::SymbolValue = pattern7_0 { 1340 if let Some((pattern9_0, pattern9_1, pattern9_2)) = 1341 C::symbol_value_data(ctx, pattern7_1) 1342 { 1343 if let Some(()) = C::reloc_distance_near(ctx, pattern9_1) { 1344 let pattern11_0 = C::i64_from_offset(ctx, pattern3_3); 1345 let mut closure12 = || { 1346 let expr0_0 = C::memarg_symbol_offset_sum( 1347 ctx, 1348 pattern9_2, 1349 pattern11_0, 1350 )?; 1351 return Some(expr0_0); 1352 }; 1353 if let Some(pattern12_0) = closure12() { 1354 // Rule at src/isa/s390x/inst.isle line 1151. 1355 return Some(pattern0_0); 1356 } 1357 } 1358 } 1359 } 1360 } 1361 } 1362 } 1363 } 1364 } 1365 return None; 1366 } 1367 1368 // Generated as internal constructor for term uload16_sym. 1369 pub fn constructor_uload16_sym<C: Context>(ctx: &mut C, arg0: Inst) -> Option<Inst> { 1370 let pattern0_0 = arg0; 1371 let mut closure1 = || { 1372 return Some(pattern0_0); 1373 }; 1374 if let Some(pattern1_0) = closure1() { 1375 let pattern2_0 = C::inst_data(ctx, pattern1_0); 1376 if let &InstructionData::Load { 1377 opcode: ref pattern3_0, 1378 arg: pattern3_1, 1379 flags: pattern3_2, 1380 offset: pattern3_3, 1381 } = &pattern2_0 1382 { 1383 if let &Opcode::Uload16 = pattern3_0 { 1384 if let Some(pattern5_0) = C::def_inst(ctx, pattern3_1) { 1385 let pattern6_0 = C::inst_data(ctx, pattern5_0); 1386 if let &InstructionData::UnaryGlobalValue { 1387 opcode: ref pattern7_0, 1388 global_value: pattern7_1, 1389 } = &pattern6_0 1390 { 1391 if let &Opcode::SymbolValue = pattern7_0 { 1392 if let Some((pattern9_0, pattern9_1, pattern9_2)) = 1393 C::symbol_value_data(ctx, pattern7_1) 1394 { 1395 if let Some(()) = C::reloc_distance_near(ctx, pattern9_1) { 1396 let pattern11_0 = C::i64_from_offset(ctx, pattern3_3); 1397 let mut closure12 = || { 1398 let expr0_0 = C::memarg_symbol_offset_sum( 1399 ctx, 1400 pattern9_2, 1401 pattern11_0, 1402 )?; 1403 return Some(expr0_0); 1404 }; 1405 if let Some(pattern12_0) = closure12() { 1406 // Rule at src/isa/s390x/inst.isle line 1159. 1407 return Some(pattern0_0); 1408 } 1409 } 1410 } 1411 } 1412 } 1413 } 1414 } 1415 } 1416 } 1417 return None; 1418 } 1419 1420 // Generated as internal constructor for term stack_addr_impl. 1421 pub fn constructor_stack_addr_impl<C: Context>( 1422 ctx: &mut C, 1423 arg0: Type, 1424 arg1: StackSlot, 1425 arg2: Offset32, 1426 ) -> Option<Reg> { 1427 let pattern0_0 = arg0; 1428 let pattern1_0 = arg1; 1429 let pattern2_0 = arg2; 1430 // Rule at src/isa/s390x/inst.isle line 1172. 1431 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1432 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1433 let expr2_0 = C::emit(ctx, &expr1_0); 1434 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1435 return Some(expr3_0); 1436 } 1437 1438 // Generated as internal constructor for term sink_load. 1439 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1440 let pattern0_0 = arg0; 1441 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1442 if let &InstructionData::Load { 1443 opcode: ref pattern2_0, 1444 arg: pattern2_1, 1445 flags: pattern2_2, 1446 offset: pattern2_3, 1447 } = &pattern1_0 1448 { 1449 if let &Opcode::Load = pattern2_0 { 1450 // Rule at src/isa/s390x/inst.isle line 1242. 1451 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1452 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1453 return Some(expr1_0); 1454 } 1455 } 1456 return None; 1457 } 1458 1459 // Generated as internal constructor for term sink_sload16. 1460 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1461 let pattern0_0 = arg0; 1462 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1463 if let &InstructionData::Load { 1464 opcode: ref pattern2_0, 1465 arg: pattern2_1, 1466 flags: pattern2_2, 1467 offset: pattern2_3, 1468 } = &pattern1_0 1469 { 1470 if let &Opcode::Sload16 = pattern2_0 { 1471 // Rule at src/isa/s390x/inst.isle line 1249. 1472 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1473 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1474 return Some(expr1_0); 1475 } 1476 } 1477 return None; 1478 } 1479 1480 // Generated as internal constructor for term sink_sload32. 1481 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1482 let pattern0_0 = arg0; 1483 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1484 if let &InstructionData::Load { 1485 opcode: ref pattern2_0, 1486 arg: pattern2_1, 1487 flags: pattern2_2, 1488 offset: pattern2_3, 1489 } = &pattern1_0 1490 { 1491 if let &Opcode::Sload32 = pattern2_0 { 1492 // Rule at src/isa/s390x/inst.isle line 1256. 1493 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1494 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1495 return Some(expr1_0); 1496 } 1497 } 1498 return None; 1499 } 1500 1501 // Generated as internal constructor for term sink_uload16. 1502 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1503 let pattern0_0 = arg0; 1504 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1505 if let &InstructionData::Load { 1506 opcode: ref pattern2_0, 1507 arg: pattern2_1, 1508 flags: pattern2_2, 1509 offset: pattern2_3, 1510 } = &pattern1_0 1511 { 1512 if let &Opcode::Uload16 = pattern2_0 { 1513 // Rule at src/isa/s390x/inst.isle line 1263. 1514 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1515 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1516 return Some(expr1_0); 1517 } 1518 } 1519 return None; 1520 } 1521 1522 // Generated as internal constructor for term sink_uload32. 1523 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1524 let pattern0_0 = arg0; 1525 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1526 if let &InstructionData::Load { 1527 opcode: ref pattern2_0, 1528 arg: pattern2_1, 1529 flags: pattern2_2, 1530 offset: pattern2_3, 1531 } = &pattern1_0 1532 { 1533 if let &Opcode::Uload32 = pattern2_0 { 1534 // Rule at src/isa/s390x/inst.isle line 1270. 1535 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1536 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1537 return Some(expr1_0); 1538 } 1539 } 1540 return None; 1541 } 1542 1543 // Generated as internal constructor for term temp_writable_regpair. 1544 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1545 // Rule at src/isa/s390x/inst.isle line 1283. 1546 let expr0_0: u8 = 0; 1547 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1548 let expr2_0: u8 = 1; 1549 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1550 let expr4_0 = WritableRegPair::WritableRegPair { 1551 hi: expr1_0, 1552 lo: expr3_0, 1553 }; 1554 return Some(expr4_0); 1555 } 1556 1557 // Generated as internal constructor for term copy_writable_regpair. 1558 pub fn constructor_copy_writable_regpair<C: Context>( 1559 ctx: &mut C, 1560 arg0: &RegPair, 1561 ) -> Option<WritableRegPair> { 1562 let pattern0_0 = arg0; 1563 // Rule at src/isa/s390x/inst.isle line 1289. 1564 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1565 return Some(expr0_0); 1566 } 1567 1568 // Generated as internal constructor for term writable_regpair_hi. 1569 pub fn constructor_writable_regpair_hi<C: Context>( 1570 ctx: &mut C, 1571 arg0: &WritableRegPair, 1572 ) -> Option<WritableReg> { 1573 let pattern0_0 = arg0; 1574 if let &WritableRegPair::WritableRegPair { 1575 hi: pattern1_0, 1576 lo: pattern1_1, 1577 } = pattern0_0 1578 { 1579 // Rule at src/isa/s390x/inst.isle line 1293. 1580 return Some(pattern1_0); 1581 } 1582 return None; 1583 } 1584 1585 // Generated as internal constructor for term writable_regpair_lo. 1586 pub fn constructor_writable_regpair_lo<C: Context>( 1587 ctx: &mut C, 1588 arg0: &WritableRegPair, 1589 ) -> Option<WritableReg> { 1590 let pattern0_0 = arg0; 1591 if let &WritableRegPair::WritableRegPair { 1592 hi: pattern1_0, 1593 lo: pattern1_1, 1594 } = pattern0_0 1595 { 1596 // Rule at src/isa/s390x/inst.isle line 1297. 1597 return Some(pattern1_1); 1598 } 1599 return None; 1600 } 1601 1602 // Generated as internal constructor for term writable_regpair_to_regpair. 1603 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1604 ctx: &mut C, 1605 arg0: &WritableRegPair, 1606 ) -> Option<RegPair> { 1607 let pattern0_0 = arg0; 1608 if let &WritableRegPair::WritableRegPair { 1609 hi: pattern1_0, 1610 lo: pattern1_1, 1611 } = pattern0_0 1612 { 1613 // Rule at src/isa/s390x/inst.isle line 1304. 1614 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1615 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1616 let expr2_0 = RegPair::RegPair { 1617 hi: expr0_0, 1618 lo: expr1_0, 1619 }; 1620 return Some(expr2_0); 1621 } 1622 return None; 1623 } 1624 1625 // Generated as internal constructor for term uninitialized_regpair. 1626 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1627 // Rule at src/isa/s390x/inst.isle line 1309. 1628 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1629 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1630 return Some(expr1_0); 1631 } 1632 1633 // Generated as internal constructor for term regpair_hi. 1634 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1635 let pattern0_0 = arg0; 1636 if let &RegPair::RegPair { 1637 hi: pattern1_0, 1638 lo: pattern1_1, 1639 } = pattern0_0 1640 { 1641 // Rule at src/isa/s390x/inst.isle line 1314. 1642 return Some(pattern1_0); 1643 } 1644 return None; 1645 } 1646 1647 // Generated as internal constructor for term regpair_lo. 1648 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1649 let pattern0_0 = arg0; 1650 if let &RegPair::RegPair { 1651 hi: pattern1_0, 1652 lo: pattern1_1, 1653 } = pattern0_0 1654 { 1655 // Rule at src/isa/s390x/inst.isle line 1318. 1656 return Some(pattern1_1); 1657 } 1658 return None; 1659 } 1660 1661 // Generated as internal constructor for term alu_rrr. 1662 pub fn constructor_alu_rrr<C: Context>( 1663 ctx: &mut C, 1664 arg0: Type, 1665 arg1: &ALUOp, 1666 arg2: Reg, 1667 arg3: Reg, 1668 ) -> Option<Reg> { 1669 let pattern0_0 = arg0; 1670 let pattern1_0 = arg1; 1671 let pattern2_0 = arg2; 1672 let pattern3_0 = arg3; 1673 // Rule at src/isa/s390x/inst.isle line 1325. 1674 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1675 let expr1_0 = MInst::AluRRR { 1676 alu_op: pattern1_0.clone(), 1677 rd: expr0_0, 1678 rn: pattern2_0, 1679 rm: pattern3_0, 1680 }; 1681 let expr2_0 = C::emit(ctx, &expr1_0); 1682 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1683 return Some(expr3_0); 1684 } 1685 1686 // Generated as internal constructor for term alu_rrsimm16. 1687 pub fn constructor_alu_rrsimm16<C: Context>( 1688 ctx: &mut C, 1689 arg0: Type, 1690 arg1: &ALUOp, 1691 arg2: Reg, 1692 arg3: i16, 1693 ) -> Option<Reg> { 1694 let pattern0_0 = arg0; 1695 let pattern1_0 = arg1; 1696 let pattern2_0 = arg2; 1697 let pattern3_0 = arg3; 1698 // Rule at src/isa/s390x/inst.isle line 1332. 1699 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1700 let expr1_0 = MInst::AluRRSImm16 { 1701 alu_op: pattern1_0.clone(), 1702 rd: expr0_0, 1703 rn: pattern2_0, 1704 imm: pattern3_0, 1705 }; 1706 let expr2_0 = C::emit(ctx, &expr1_0); 1707 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1708 return Some(expr3_0); 1709 } 1710 1711 // Generated as internal constructor for term alu_rr. 1712 pub fn constructor_alu_rr<C: Context>( 1713 ctx: &mut C, 1714 arg0: Type, 1715 arg1: &ALUOp, 1716 arg2: Reg, 1717 arg3: Reg, 1718 ) -> Option<Reg> { 1719 let pattern0_0 = arg0; 1720 let pattern1_0 = arg1; 1721 let pattern2_0 = arg2; 1722 let pattern3_0 = arg3; 1723 // Rule at src/isa/s390x/inst.isle line 1339. 1724 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1725 let expr1_0 = MInst::AluRR { 1726 alu_op: pattern1_0.clone(), 1727 rd: expr0_0, 1728 rm: pattern3_0, 1729 }; 1730 let expr2_0 = C::emit(ctx, &expr1_0); 1731 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1732 return Some(expr3_0); 1733 } 1734 1735 // Generated as internal constructor for term alu_rx. 1736 pub fn constructor_alu_rx<C: Context>( 1737 ctx: &mut C, 1738 arg0: Type, 1739 arg1: &ALUOp, 1740 arg2: Reg, 1741 arg3: &MemArg, 1742 ) -> Option<Reg> { 1743 let pattern0_0 = arg0; 1744 let pattern1_0 = arg1; 1745 let pattern2_0 = arg2; 1746 let pattern3_0 = arg3; 1747 // Rule at src/isa/s390x/inst.isle line 1346. 1748 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1749 let expr1_0 = MInst::AluRX { 1750 alu_op: pattern1_0.clone(), 1751 rd: expr0_0, 1752 mem: pattern3_0.clone(), 1753 }; 1754 let expr2_0 = C::emit(ctx, &expr1_0); 1755 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1756 return Some(expr3_0); 1757 } 1758 1759 // Generated as internal constructor for term alu_rsimm16. 1760 pub fn constructor_alu_rsimm16<C: Context>( 1761 ctx: &mut C, 1762 arg0: Type, 1763 arg1: &ALUOp, 1764 arg2: Reg, 1765 arg3: i16, 1766 ) -> Option<Reg> { 1767 let pattern0_0 = arg0; 1768 let pattern1_0 = arg1; 1769 let pattern2_0 = arg2; 1770 let pattern3_0 = arg3; 1771 // Rule at src/isa/s390x/inst.isle line 1353. 1772 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1773 let expr1_0 = MInst::AluRSImm16 { 1774 alu_op: pattern1_0.clone(), 1775 rd: expr0_0, 1776 imm: pattern3_0, 1777 }; 1778 let expr2_0 = C::emit(ctx, &expr1_0); 1779 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1780 return Some(expr3_0); 1781 } 1782 1783 // Generated as internal constructor for term alu_rsimm32. 1784 pub fn constructor_alu_rsimm32<C: Context>( 1785 ctx: &mut C, 1786 arg0: Type, 1787 arg1: &ALUOp, 1788 arg2: Reg, 1789 arg3: i32, 1790 ) -> Option<Reg> { 1791 let pattern0_0 = arg0; 1792 let pattern1_0 = arg1; 1793 let pattern2_0 = arg2; 1794 let pattern3_0 = arg3; 1795 // Rule at src/isa/s390x/inst.isle line 1360. 1796 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1797 let expr1_0 = MInst::AluRSImm32 { 1798 alu_op: pattern1_0.clone(), 1799 rd: expr0_0, 1800 imm: pattern3_0, 1801 }; 1802 let expr2_0 = C::emit(ctx, &expr1_0); 1803 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1804 return Some(expr3_0); 1805 } 1806 1807 // Generated as internal constructor for term alu_ruimm32. 1808 pub fn constructor_alu_ruimm32<C: Context>( 1809 ctx: &mut C, 1810 arg0: Type, 1811 arg1: &ALUOp, 1812 arg2: Reg, 1813 arg3: u32, 1814 ) -> Option<Reg> { 1815 let pattern0_0 = arg0; 1816 let pattern1_0 = arg1; 1817 let pattern2_0 = arg2; 1818 let pattern3_0 = arg3; 1819 // Rule at src/isa/s390x/inst.isle line 1367. 1820 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1821 let expr1_0 = MInst::AluRUImm32 { 1822 alu_op: pattern1_0.clone(), 1823 rd: expr0_0, 1824 imm: pattern3_0, 1825 }; 1826 let expr2_0 = C::emit(ctx, &expr1_0); 1827 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1828 return Some(expr3_0); 1829 } 1830 1831 // Generated as internal constructor for term alu_ruimm16shifted. 1832 pub fn constructor_alu_ruimm16shifted<C: Context>( 1833 ctx: &mut C, 1834 arg0: Type, 1835 arg1: &ALUOp, 1836 arg2: Reg, 1837 arg3: UImm16Shifted, 1838 ) -> Option<Reg> { 1839 let pattern0_0 = arg0; 1840 let pattern1_0 = arg1; 1841 let pattern2_0 = arg2; 1842 let pattern3_0 = arg3; 1843 // Rule at src/isa/s390x/inst.isle line 1374. 1844 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1845 let expr1_0 = MInst::AluRUImm16Shifted { 1846 alu_op: pattern1_0.clone(), 1847 rd: expr0_0, 1848 imm: pattern3_0, 1849 }; 1850 let expr2_0 = C::emit(ctx, &expr1_0); 1851 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1852 return Some(expr3_0); 1853 } 1854 1855 // Generated as internal constructor for term alu_ruimm32shifted. 1856 pub fn constructor_alu_ruimm32shifted<C: Context>( 1857 ctx: &mut C, 1858 arg0: Type, 1859 arg1: &ALUOp, 1860 arg2: Reg, 1861 arg3: UImm32Shifted, 1862 ) -> Option<Reg> { 1863 let pattern0_0 = arg0; 1864 let pattern1_0 = arg1; 1865 let pattern2_0 = arg2; 1866 let pattern3_0 = arg3; 1867 // Rule at src/isa/s390x/inst.isle line 1381. 1868 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1869 let expr1_0 = MInst::AluRUImm32Shifted { 1870 alu_op: pattern1_0.clone(), 1871 rd: expr0_0, 1872 imm: pattern3_0, 1873 }; 1874 let expr2_0 = C::emit(ctx, &expr1_0); 1875 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1876 return Some(expr3_0); 1877 } 1878 1879 // Generated as internal constructor for term smul_wide. 1880 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1881 let pattern0_0 = arg0; 1882 let pattern1_0 = arg1; 1883 // Rule at src/isa/s390x/inst.isle line 1388. 1884 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1885 let expr1_0 = MInst::SMulWide { 1886 rn: pattern0_0, 1887 rm: pattern1_0, 1888 }; 1889 let expr2_0 = C::emit(ctx, &expr1_0); 1890 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1891 return Some(expr3_0); 1892 } 1893 1894 // Generated as internal constructor for term umul_wide. 1895 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1896 let pattern0_0 = arg0; 1897 let pattern1_0 = arg1; 1898 // Rule at src/isa/s390x/inst.isle line 1395. 1899 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1900 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1901 let expr2_0 = MInst::Mov64 { 1902 rd: expr1_0, 1903 rm: pattern1_0, 1904 }; 1905 let expr3_0 = C::emit(ctx, &expr2_0); 1906 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1907 let expr5_0 = C::emit(ctx, &expr4_0); 1908 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1909 return Some(expr6_0); 1910 } 1911 1912 // Generated as internal constructor for term sdivmod32. 1913 pub fn constructor_sdivmod32<C: Context>( 1914 ctx: &mut C, 1915 arg0: &RegPair, 1916 arg1: Reg, 1917 ) -> Option<RegPair> { 1918 let pattern0_0 = arg0; 1919 let pattern1_0 = arg1; 1920 // Rule at src/isa/s390x/inst.isle line 1403. 1921 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1922 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1923 let expr2_0 = C::emit(ctx, &expr1_0); 1924 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1925 return Some(expr3_0); 1926 } 1927 1928 // Generated as internal constructor for term sdivmod64. 1929 pub fn constructor_sdivmod64<C: Context>( 1930 ctx: &mut C, 1931 arg0: &RegPair, 1932 arg1: Reg, 1933 ) -> Option<RegPair> { 1934 let pattern0_0 = arg0; 1935 let pattern1_0 = arg1; 1936 // Rule at src/isa/s390x/inst.isle line 1410. 1937 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1938 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1939 let expr2_0 = C::emit(ctx, &expr1_0); 1940 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1941 return Some(expr3_0); 1942 } 1943 1944 // Generated as internal constructor for term udivmod32. 1945 pub fn constructor_udivmod32<C: Context>( 1946 ctx: &mut C, 1947 arg0: &RegPair, 1948 arg1: Reg, 1949 ) -> Option<RegPair> { 1950 let pattern0_0 = arg0; 1951 let pattern1_0 = arg1; 1952 // Rule at src/isa/s390x/inst.isle line 1417. 1953 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1954 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1955 let expr2_0 = C::emit(ctx, &expr1_0); 1956 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1957 return Some(expr3_0); 1958 } 1959 1960 // Generated as internal constructor for term udivmod64. 1961 pub fn constructor_udivmod64<C: Context>( 1962 ctx: &mut C, 1963 arg0: &RegPair, 1964 arg1: Reg, 1965 ) -> Option<RegPair> { 1966 let pattern0_0 = arg0; 1967 let pattern1_0 = arg1; 1968 // Rule at src/isa/s390x/inst.isle line 1424. 1969 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1970 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1971 let expr2_0 = C::emit(ctx, &expr1_0); 1972 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1973 return Some(expr3_0); 1974 } 1975 1976 // Generated as internal constructor for term shift_rr. 1977 pub fn constructor_shift_rr<C: Context>( 1978 ctx: &mut C, 1979 arg0: Type, 1980 arg1: &ShiftOp, 1981 arg2: Reg, 1982 arg3: u8, 1983 arg4: Reg, 1984 ) -> Option<Reg> { 1985 let pattern0_0 = arg0; 1986 let pattern1_0 = arg1; 1987 let pattern2_0 = arg2; 1988 let pattern3_0 = arg3; 1989 let pattern4_0 = arg4; 1990 // Rule at src/isa/s390x/inst.isle line 1431. 1991 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1992 let expr1_0 = MInst::ShiftRR { 1993 shift_op: pattern1_0.clone(), 1994 rd: expr0_0, 1995 rn: pattern2_0, 1996 shift_imm: pattern3_0, 1997 shift_reg: pattern4_0, 1998 }; 1999 let expr2_0 = C::emit(ctx, &expr1_0); 2000 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2001 return Some(expr3_0); 2002 } 2003 2004 // Generated as internal constructor for term rxsbg_test. 2005 pub fn constructor_rxsbg_test<C: Context>( 2006 ctx: &mut C, 2007 arg0: &RxSBGOp, 2008 arg1: Reg, 2009 arg2: Reg, 2010 arg3: u8, 2011 arg4: u8, 2012 arg5: i8, 2013 ) -> Option<ProducesFlags> { 2014 let pattern0_0 = arg0; 2015 let pattern1_0 = arg1; 2016 let pattern2_0 = arg2; 2017 let pattern3_0 = arg3; 2018 let pattern4_0 = arg4; 2019 let pattern5_0 = arg5; 2020 // Rule at src/isa/s390x/inst.isle line 1438. 2021 let expr0_0 = MInst::RxSBGTest { 2022 op: pattern0_0.clone(), 2023 rd: pattern1_0, 2024 rn: pattern2_0, 2025 start_bit: pattern3_0, 2026 end_bit: pattern4_0, 2027 rotate_amt: pattern5_0, 2028 }; 2029 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2030 return Some(expr1_0); 2031 } 2032 2033 // Generated as internal constructor for term unary_rr. 2034 pub fn constructor_unary_rr<C: Context>( 2035 ctx: &mut C, 2036 arg0: Type, 2037 arg1: &UnaryOp, 2038 arg2: Reg, 2039 ) -> Option<Reg> { 2040 let pattern0_0 = arg0; 2041 let pattern1_0 = arg1; 2042 let pattern2_0 = arg2; 2043 // Rule at src/isa/s390x/inst.isle line 1444. 2044 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2045 let expr1_0 = MInst::UnaryRR { 2046 op: pattern1_0.clone(), 2047 rd: expr0_0, 2048 rn: pattern2_0, 2049 }; 2050 let expr2_0 = C::emit(ctx, &expr1_0); 2051 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2052 return Some(expr3_0); 2053 } 2054 2055 // Generated as internal constructor for term cmp_rr. 2056 pub fn constructor_cmp_rr<C: Context>( 2057 ctx: &mut C, 2058 arg0: &CmpOp, 2059 arg1: Reg, 2060 arg2: Reg, 2061 ) -> Option<ProducesFlags> { 2062 let pattern0_0 = arg0; 2063 let pattern1_0 = arg1; 2064 let pattern2_0 = arg2; 2065 // Rule at src/isa/s390x/inst.isle line 1451. 2066 let expr0_0 = MInst::CmpRR { 2067 op: pattern0_0.clone(), 2068 rn: pattern1_0, 2069 rm: pattern2_0, 2070 }; 2071 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2072 return Some(expr1_0); 2073 } 2074 2075 // Generated as internal constructor for term cmp_rx. 2076 pub fn constructor_cmp_rx<C: Context>( 2077 ctx: &mut C, 2078 arg0: &CmpOp, 2079 arg1: Reg, 2080 arg2: &MemArg, 2081 ) -> Option<ProducesFlags> { 2082 let pattern0_0 = arg0; 2083 let pattern1_0 = arg1; 2084 let pattern2_0 = arg2; 2085 // Rule at src/isa/s390x/inst.isle line 1456. 2086 let expr0_0 = MInst::CmpRX { 2087 op: pattern0_0.clone(), 2088 rn: pattern1_0, 2089 mem: pattern2_0.clone(), 2090 }; 2091 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2092 return Some(expr1_0); 2093 } 2094 2095 // Generated as internal constructor for term cmp_rsimm16. 2096 pub fn constructor_cmp_rsimm16<C: Context>( 2097 ctx: &mut C, 2098 arg0: &CmpOp, 2099 arg1: Reg, 2100 arg2: i16, 2101 ) -> Option<ProducesFlags> { 2102 let pattern0_0 = arg0; 2103 let pattern1_0 = arg1; 2104 let pattern2_0 = arg2; 2105 // Rule at src/isa/s390x/inst.isle line 1461. 2106 let expr0_0 = MInst::CmpRSImm16 { 2107 op: pattern0_0.clone(), 2108 rn: pattern1_0, 2109 imm: pattern2_0, 2110 }; 2111 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2112 return Some(expr1_0); 2113 } 2114 2115 // Generated as internal constructor for term cmp_rsimm32. 2116 pub fn constructor_cmp_rsimm32<C: Context>( 2117 ctx: &mut C, 2118 arg0: &CmpOp, 2119 arg1: Reg, 2120 arg2: i32, 2121 ) -> Option<ProducesFlags> { 2122 let pattern0_0 = arg0; 2123 let pattern1_0 = arg1; 2124 let pattern2_0 = arg2; 2125 // Rule at src/isa/s390x/inst.isle line 1466. 2126 let expr0_0 = MInst::CmpRSImm32 { 2127 op: pattern0_0.clone(), 2128 rn: pattern1_0, 2129 imm: pattern2_0, 2130 }; 2131 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2132 return Some(expr1_0); 2133 } 2134 2135 // Generated as internal constructor for term cmp_ruimm32. 2136 pub fn constructor_cmp_ruimm32<C: Context>( 2137 ctx: &mut C, 2138 arg0: &CmpOp, 2139 arg1: Reg, 2140 arg2: u32, 2141 ) -> Option<ProducesFlags> { 2142 let pattern0_0 = arg0; 2143 let pattern1_0 = arg1; 2144 let pattern2_0 = arg2; 2145 // Rule at src/isa/s390x/inst.isle line 1471. 2146 let expr0_0 = MInst::CmpRUImm32 { 2147 op: pattern0_0.clone(), 2148 rn: pattern1_0, 2149 imm: pattern2_0, 2150 }; 2151 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2152 return Some(expr1_0); 2153 } 2154 2155 // Generated as internal constructor for term atomic_rmw_impl. 2156 pub fn constructor_atomic_rmw_impl<C: Context>( 2157 ctx: &mut C, 2158 arg0: Type, 2159 arg1: &ALUOp, 2160 arg2: Reg, 2161 arg3: &MemArg, 2162 ) -> Option<Reg> { 2163 let pattern0_0 = arg0; 2164 let pattern1_0 = arg1; 2165 let pattern2_0 = arg2; 2166 let pattern3_0 = arg3; 2167 // Rule at src/isa/s390x/inst.isle line 1476. 2168 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2169 let expr1_0 = MInst::AtomicRmw { 2170 alu_op: pattern1_0.clone(), 2171 rd: expr0_0, 2172 rn: pattern2_0, 2173 mem: pattern3_0.clone(), 2174 }; 2175 let expr2_0 = C::emit(ctx, &expr1_0); 2176 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2177 return Some(expr3_0); 2178 } 2179 2180 // Generated as internal constructor for term atomic_cas32. 2181 pub fn constructor_atomic_cas32<C: Context>( 2182 ctx: &mut C, 2183 arg0: Reg, 2184 arg1: Reg, 2185 arg2: &MemArg, 2186 ) -> Option<Reg> { 2187 let pattern0_0 = arg0; 2188 let pattern1_0 = arg1; 2189 let pattern2_0 = arg2; 2190 // Rule at src/isa/s390x/inst.isle line 1483. 2191 let expr0_0: Type = I32; 2192 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2193 let expr2_0 = MInst::AtomicCas32 { 2194 rd: expr1_0, 2195 rn: pattern1_0, 2196 mem: pattern2_0.clone(), 2197 }; 2198 let expr3_0 = C::emit(ctx, &expr2_0); 2199 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2200 return Some(expr4_0); 2201 } 2202 2203 // Generated as internal constructor for term atomic_cas64. 2204 pub fn constructor_atomic_cas64<C: Context>( 2205 ctx: &mut C, 2206 arg0: Reg, 2207 arg1: Reg, 2208 arg2: &MemArg, 2209 ) -> Option<Reg> { 2210 let pattern0_0 = arg0; 2211 let pattern1_0 = arg1; 2212 let pattern2_0 = arg2; 2213 // Rule at src/isa/s390x/inst.isle line 1490. 2214 let expr0_0: Type = I64; 2215 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2216 let expr2_0 = MInst::AtomicCas64 { 2217 rd: expr1_0, 2218 rn: pattern1_0, 2219 mem: pattern2_0.clone(), 2220 }; 2221 let expr3_0 = C::emit(ctx, &expr2_0); 2222 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2223 return Some(expr4_0); 2224 } 2225 2226 // Generated as internal constructor for term fence_impl. 2227 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2228 // Rule at src/isa/s390x/inst.isle line 1497. 2229 let expr0_0 = MInst::Fence; 2230 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2231 return Some(expr1_0); 2232 } 2233 2234 // Generated as internal constructor for term load32. 2235 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2236 let pattern0_0 = arg0; 2237 // Rule at src/isa/s390x/inst.isle line 1502. 2238 let expr0_0: Type = I32; 2239 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2240 let expr2_0 = MInst::Load32 { 2241 rd: expr1_0, 2242 mem: pattern0_0.clone(), 2243 }; 2244 let expr3_0 = C::emit(ctx, &expr2_0); 2245 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2246 return Some(expr4_0); 2247 } 2248 2249 // Generated as internal constructor for term load64. 2250 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2251 let pattern0_0 = arg0; 2252 // Rule at src/isa/s390x/inst.isle line 1509. 2253 let expr0_0: Type = I64; 2254 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2255 let expr2_0 = MInst::Load64 { 2256 rd: expr1_0, 2257 mem: pattern0_0.clone(), 2258 }; 2259 let expr3_0 = C::emit(ctx, &expr2_0); 2260 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2261 return Some(expr4_0); 2262 } 2263 2264 // Generated as internal constructor for term loadrev16. 2265 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2266 let pattern0_0 = arg0; 2267 // Rule at src/isa/s390x/inst.isle line 1516. 2268 let expr0_0: Type = I32; 2269 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2270 let expr2_0 = MInst::LoadRev16 { 2271 rd: expr1_0, 2272 mem: pattern0_0.clone(), 2273 }; 2274 let expr3_0 = C::emit(ctx, &expr2_0); 2275 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2276 return Some(expr4_0); 2277 } 2278 2279 // Generated as internal constructor for term loadrev32. 2280 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2281 let pattern0_0 = arg0; 2282 // Rule at src/isa/s390x/inst.isle line 1523. 2283 let expr0_0: Type = I32; 2284 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2285 let expr2_0 = MInst::LoadRev32 { 2286 rd: expr1_0, 2287 mem: pattern0_0.clone(), 2288 }; 2289 let expr3_0 = C::emit(ctx, &expr2_0); 2290 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2291 return Some(expr4_0); 2292 } 2293 2294 // Generated as internal constructor for term loadrev64. 2295 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2296 let pattern0_0 = arg0; 2297 // Rule at src/isa/s390x/inst.isle line 1530. 2298 let expr0_0: Type = I64; 2299 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2300 let expr2_0 = MInst::LoadRev64 { 2301 rd: expr1_0, 2302 mem: pattern0_0.clone(), 2303 }; 2304 let expr3_0 = C::emit(ctx, &expr2_0); 2305 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2306 return Some(expr4_0); 2307 } 2308 2309 // Generated as internal constructor for term store8. 2310 pub fn constructor_store8<C: Context>( 2311 ctx: &mut C, 2312 arg0: Reg, 2313 arg1: &MemArg, 2314 ) -> Option<SideEffectNoResult> { 2315 let pattern0_0 = arg0; 2316 let pattern1_0 = arg1; 2317 // Rule at src/isa/s390x/inst.isle line 1537. 2318 let expr0_0 = MInst::Store8 { 2319 rd: pattern0_0, 2320 mem: pattern1_0.clone(), 2321 }; 2322 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2323 return Some(expr1_0); 2324 } 2325 2326 // Generated as internal constructor for term store16. 2327 pub fn constructor_store16<C: Context>( 2328 ctx: &mut C, 2329 arg0: Reg, 2330 arg1: &MemArg, 2331 ) -> Option<SideEffectNoResult> { 2332 let pattern0_0 = arg0; 2333 let pattern1_0 = arg1; 2334 // Rule at src/isa/s390x/inst.isle line 1542. 2335 let expr0_0 = MInst::Store16 { 2336 rd: pattern0_0, 2337 mem: pattern1_0.clone(), 2338 }; 2339 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2340 return Some(expr1_0); 2341 } 2342 2343 // Generated as internal constructor for term store32. 2344 pub fn constructor_store32<C: Context>( 2345 ctx: &mut C, 2346 arg0: Reg, 2347 arg1: &MemArg, 2348 ) -> Option<SideEffectNoResult> { 2349 let pattern0_0 = arg0; 2350 let pattern1_0 = arg1; 2351 // Rule at src/isa/s390x/inst.isle line 1547. 2352 let expr0_0 = MInst::Store32 { 2353 rd: pattern0_0, 2354 mem: pattern1_0.clone(), 2355 }; 2356 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2357 return Some(expr1_0); 2358 } 2359 2360 // Generated as internal constructor for term store64. 2361 pub fn constructor_store64<C: Context>( 2362 ctx: &mut C, 2363 arg0: Reg, 2364 arg1: &MemArg, 2365 ) -> Option<SideEffectNoResult> { 2366 let pattern0_0 = arg0; 2367 let pattern1_0 = arg1; 2368 // Rule at src/isa/s390x/inst.isle line 1552. 2369 let expr0_0 = MInst::Store64 { 2370 rd: pattern0_0, 2371 mem: pattern1_0.clone(), 2372 }; 2373 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2374 return Some(expr1_0); 2375 } 2376 2377 // Generated as internal constructor for term store8_imm. 2378 pub fn constructor_store8_imm<C: Context>( 2379 ctx: &mut C, 2380 arg0: u8, 2381 arg1: &MemArg, 2382 ) -> Option<SideEffectNoResult> { 2383 let pattern0_0 = arg0; 2384 let pattern1_0 = arg1; 2385 // Rule at src/isa/s390x/inst.isle line 1557. 2386 let expr0_0 = MInst::StoreImm8 { 2387 imm: pattern0_0, 2388 mem: pattern1_0.clone(), 2389 }; 2390 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2391 return Some(expr1_0); 2392 } 2393 2394 // Generated as internal constructor for term store16_imm. 2395 pub fn constructor_store16_imm<C: Context>( 2396 ctx: &mut C, 2397 arg0: i16, 2398 arg1: &MemArg, 2399 ) -> Option<SideEffectNoResult> { 2400 let pattern0_0 = arg0; 2401 let pattern1_0 = arg1; 2402 // Rule at src/isa/s390x/inst.isle line 1562. 2403 let expr0_0 = MInst::StoreImm16 { 2404 imm: pattern0_0, 2405 mem: pattern1_0.clone(), 2406 }; 2407 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2408 return Some(expr1_0); 2409 } 2410 2411 // Generated as internal constructor for term store32_simm16. 2412 pub fn constructor_store32_simm16<C: Context>( 2413 ctx: &mut C, 2414 arg0: i16, 2415 arg1: &MemArg, 2416 ) -> Option<SideEffectNoResult> { 2417 let pattern0_0 = arg0; 2418 let pattern1_0 = arg1; 2419 // Rule at src/isa/s390x/inst.isle line 1567. 2420 let expr0_0 = MInst::StoreImm32SExt16 { 2421 imm: pattern0_0, 2422 mem: pattern1_0.clone(), 2423 }; 2424 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2425 return Some(expr1_0); 2426 } 2427 2428 // Generated as internal constructor for term store64_simm16. 2429 pub fn constructor_store64_simm16<C: Context>( 2430 ctx: &mut C, 2431 arg0: i16, 2432 arg1: &MemArg, 2433 ) -> Option<SideEffectNoResult> { 2434 let pattern0_0 = arg0; 2435 let pattern1_0 = arg1; 2436 // Rule at src/isa/s390x/inst.isle line 1572. 2437 let expr0_0 = MInst::StoreImm64SExt16 { 2438 imm: pattern0_0, 2439 mem: pattern1_0.clone(), 2440 }; 2441 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2442 return Some(expr1_0); 2443 } 2444 2445 // Generated as internal constructor for term storerev16. 2446 pub fn constructor_storerev16<C: Context>( 2447 ctx: &mut C, 2448 arg0: Reg, 2449 arg1: &MemArg, 2450 ) -> Option<SideEffectNoResult> { 2451 let pattern0_0 = arg0; 2452 let pattern1_0 = arg1; 2453 // Rule at src/isa/s390x/inst.isle line 1577. 2454 let expr0_0 = MInst::StoreRev16 { 2455 rd: pattern0_0, 2456 mem: pattern1_0.clone(), 2457 }; 2458 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2459 return Some(expr1_0); 2460 } 2461 2462 // Generated as internal constructor for term storerev32. 2463 pub fn constructor_storerev32<C: Context>( 2464 ctx: &mut C, 2465 arg0: Reg, 2466 arg1: &MemArg, 2467 ) -> Option<SideEffectNoResult> { 2468 let pattern0_0 = arg0; 2469 let pattern1_0 = arg1; 2470 // Rule at src/isa/s390x/inst.isle line 1582. 2471 let expr0_0 = MInst::StoreRev32 { 2472 rd: pattern0_0, 2473 mem: pattern1_0.clone(), 2474 }; 2475 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2476 return Some(expr1_0); 2477 } 2478 2479 // Generated as internal constructor for term storerev64. 2480 pub fn constructor_storerev64<C: Context>( 2481 ctx: &mut C, 2482 arg0: Reg, 2483 arg1: &MemArg, 2484 ) -> Option<SideEffectNoResult> { 2485 let pattern0_0 = arg0; 2486 let pattern1_0 = arg1; 2487 // Rule at src/isa/s390x/inst.isle line 1587. 2488 let expr0_0 = MInst::StoreRev64 { 2489 rd: pattern0_0, 2490 mem: pattern1_0.clone(), 2491 }; 2492 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2493 return Some(expr1_0); 2494 } 2495 2496 // Generated as internal constructor for term fpu_rr. 2497 pub fn constructor_fpu_rr<C: Context>( 2498 ctx: &mut C, 2499 arg0: Type, 2500 arg1: &FPUOp1, 2501 arg2: Reg, 2502 ) -> Option<Reg> { 2503 let pattern0_0 = arg0; 2504 let pattern1_0 = arg1; 2505 let pattern2_0 = arg2; 2506 // Rule at src/isa/s390x/inst.isle line 1592. 2507 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2508 let expr1_0 = MInst::FpuRR { 2509 fpu_op: pattern1_0.clone(), 2510 rd: expr0_0, 2511 rn: pattern2_0, 2512 }; 2513 let expr2_0 = C::emit(ctx, &expr1_0); 2514 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2515 return Some(expr3_0); 2516 } 2517 2518 // Generated as internal constructor for term fpu_rrr. 2519 pub fn constructor_fpu_rrr<C: Context>( 2520 ctx: &mut C, 2521 arg0: Type, 2522 arg1: &FPUOp2, 2523 arg2: Reg, 2524 arg3: Reg, 2525 ) -> Option<Reg> { 2526 let pattern0_0 = arg0; 2527 let pattern1_0 = arg1; 2528 let pattern2_0 = arg2; 2529 let pattern3_0 = arg3; 2530 // Rule at src/isa/s390x/inst.isle line 1599. 2531 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2532 let expr1_0 = MInst::FpuRRR { 2533 fpu_op: pattern1_0.clone(), 2534 rd: expr0_0, 2535 rm: pattern3_0, 2536 }; 2537 let expr2_0 = C::emit(ctx, &expr1_0); 2538 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2539 return Some(expr3_0); 2540 } 2541 2542 // Generated as internal constructor for term fpu_rrrr. 2543 pub fn constructor_fpu_rrrr<C: Context>( 2544 ctx: &mut C, 2545 arg0: Type, 2546 arg1: &FPUOp3, 2547 arg2: Reg, 2548 arg3: Reg, 2549 arg4: Reg, 2550 ) -> Option<Reg> { 2551 let pattern0_0 = arg0; 2552 let pattern1_0 = arg1; 2553 let pattern2_0 = arg2; 2554 let pattern3_0 = arg3; 2555 let pattern4_0 = arg4; 2556 // Rule at src/isa/s390x/inst.isle line 1606. 2557 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2558 let expr1_0 = MInst::FpuRRRR { 2559 fpu_op: pattern1_0.clone(), 2560 rd: expr0_0, 2561 rn: pattern3_0, 2562 rm: pattern4_0, 2563 }; 2564 let expr2_0 = C::emit(ctx, &expr1_0); 2565 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2566 return Some(expr3_0); 2567 } 2568 2569 // Generated as internal constructor for term fpu_copysign. 2570 pub fn constructor_fpu_copysign<C: Context>( 2571 ctx: &mut C, 2572 arg0: Type, 2573 arg1: Reg, 2574 arg2: Reg, 2575 ) -> Option<Reg> { 2576 let pattern0_0 = arg0; 2577 let pattern1_0 = arg1; 2578 let pattern2_0 = arg2; 2579 // Rule at src/isa/s390x/inst.isle line 1613. 2580 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2581 let expr1_0 = MInst::FpuCopysign { 2582 rd: expr0_0, 2583 rn: pattern1_0, 2584 rm: pattern2_0, 2585 }; 2586 let expr2_0 = C::emit(ctx, &expr1_0); 2587 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2588 return Some(expr3_0); 2589 } 2590 2591 // Generated as internal constructor for term fpu_cmp32. 2592 pub fn constructor_fpu_cmp32<C: Context>( 2593 ctx: &mut C, 2594 arg0: Reg, 2595 arg1: Reg, 2596 ) -> Option<ProducesFlags> { 2597 let pattern0_0 = arg0; 2598 let pattern1_0 = arg1; 2599 // Rule at src/isa/s390x/inst.isle line 1620. 2600 let expr0_0 = MInst::FpuCmp32 { 2601 rn: pattern0_0, 2602 rm: pattern1_0, 2603 }; 2604 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2605 return Some(expr1_0); 2606 } 2607 2608 // Generated as internal constructor for term fpu_cmp64. 2609 pub fn constructor_fpu_cmp64<C: Context>( 2610 ctx: &mut C, 2611 arg0: Reg, 2612 arg1: Reg, 2613 ) -> Option<ProducesFlags> { 2614 let pattern0_0 = arg0; 2615 let pattern1_0 = arg1; 2616 // Rule at src/isa/s390x/inst.isle line 1625. 2617 let expr0_0 = MInst::FpuCmp64 { 2618 rn: pattern0_0, 2619 rm: pattern1_0, 2620 }; 2621 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2622 return Some(expr1_0); 2623 } 2624 2625 // Generated as internal constructor for term fpu_to_int. 2626 pub fn constructor_fpu_to_int<C: Context>( 2627 ctx: &mut C, 2628 arg0: Type, 2629 arg1: &FpuToIntOp, 2630 arg2: Reg, 2631 ) -> Option<ProducesFlags> { 2632 let pattern0_0 = arg0; 2633 let pattern1_0 = arg1; 2634 let pattern2_0 = arg2; 2635 // Rule at src/isa/s390x/inst.isle line 1630. 2636 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2637 let expr1_0 = MInst::FpuToInt { 2638 op: pattern1_0.clone(), 2639 rd: expr0_0, 2640 rn: pattern2_0, 2641 }; 2642 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2643 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2644 inst: expr1_0, 2645 result: expr2_0, 2646 }; 2647 return Some(expr3_0); 2648 } 2649 2650 // Generated as internal constructor for term int_to_fpu. 2651 pub fn constructor_int_to_fpu<C: Context>( 2652 ctx: &mut C, 2653 arg0: Type, 2654 arg1: &IntToFpuOp, 2655 arg2: Reg, 2656 ) -> Option<Reg> { 2657 let pattern0_0 = arg0; 2658 let pattern1_0 = arg1; 2659 let pattern2_0 = arg2; 2660 // Rule at src/isa/s390x/inst.isle line 1637. 2661 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2662 let expr1_0 = MInst::IntToFpu { 2663 op: pattern1_0.clone(), 2664 rd: expr0_0, 2665 rn: pattern2_0, 2666 }; 2667 let expr2_0 = C::emit(ctx, &expr1_0); 2668 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2669 return Some(expr3_0); 2670 } 2671 2672 // Generated as internal constructor for term fpu_round. 2673 pub fn constructor_fpu_round<C: Context>( 2674 ctx: &mut C, 2675 arg0: Type, 2676 arg1: &FpuRoundMode, 2677 arg2: Reg, 2678 ) -> Option<Reg> { 2679 let pattern0_0 = arg0; 2680 let pattern1_0 = arg1; 2681 let pattern2_0 = arg2; 2682 // Rule at src/isa/s390x/inst.isle line 1644. 2683 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2684 let expr1_0 = MInst::FpuRound { 2685 op: pattern1_0.clone(), 2686 rd: expr0_0, 2687 rn: pattern2_0, 2688 }; 2689 let expr2_0 = C::emit(ctx, &expr1_0); 2690 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2691 return Some(expr3_0); 2692 } 2693 2694 // Generated as internal constructor for term fpuvec_rrr. 2695 pub fn constructor_fpuvec_rrr<C: Context>( 2696 ctx: &mut C, 2697 arg0: Type, 2698 arg1: &FPUOp2, 2699 arg2: Reg, 2700 arg3: Reg, 2701 ) -> Option<Reg> { 2702 let pattern0_0 = arg0; 2703 let pattern1_0 = arg1; 2704 let pattern2_0 = arg2; 2705 let pattern3_0 = arg3; 2706 // Rule at src/isa/s390x/inst.isle line 1651. 2707 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2708 let expr1_0 = MInst::FpuVecRRR { 2709 fpu_op: pattern1_0.clone(), 2710 rd: expr0_0, 2711 rn: pattern2_0, 2712 rm: pattern3_0, 2713 }; 2714 let expr2_0 = C::emit(ctx, &expr1_0); 2715 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2716 return Some(expr3_0); 2717 } 2718 2719 // Generated as internal constructor for term mov_to_fpr. 2720 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2721 let pattern0_0 = arg0; 2722 // Rule at src/isa/s390x/inst.isle line 1658. 2723 let expr0_0: Type = F64; 2724 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2725 let expr2_0 = MInst::MovToFpr { 2726 rd: expr1_0, 2727 rn: pattern0_0, 2728 }; 2729 let expr3_0 = C::emit(ctx, &expr2_0); 2730 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2731 return Some(expr4_0); 2732 } 2733 2734 // Generated as internal constructor for term mov_from_fpr. 2735 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2736 let pattern0_0 = arg0; 2737 // Rule at src/isa/s390x/inst.isle line 1665. 2738 let expr0_0: Type = I64; 2739 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2740 let expr2_0 = MInst::MovFromFpr { 2741 rd: expr1_0, 2742 rn: pattern0_0, 2743 }; 2744 let expr3_0 = C::emit(ctx, &expr2_0); 2745 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2746 return Some(expr4_0); 2747 } 2748 2749 // Generated as internal constructor for term fpu_load32. 2750 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2751 let pattern0_0 = arg0; 2752 // Rule at src/isa/s390x/inst.isle line 1672. 2753 let expr0_0: Type = F32; 2754 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2755 let expr2_0 = MInst::FpuLoad32 { 2756 rd: expr1_0, 2757 mem: pattern0_0.clone(), 2758 }; 2759 let expr3_0 = C::emit(ctx, &expr2_0); 2760 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2761 return Some(expr4_0); 2762 } 2763 2764 // Generated as internal constructor for term fpu_load64. 2765 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2766 let pattern0_0 = arg0; 2767 // Rule at src/isa/s390x/inst.isle line 1679. 2768 let expr0_0: Type = F64; 2769 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2770 let expr2_0 = MInst::FpuLoad64 { 2771 rd: expr1_0, 2772 mem: pattern0_0.clone(), 2773 }; 2774 let expr3_0 = C::emit(ctx, &expr2_0); 2775 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2776 return Some(expr4_0); 2777 } 2778 2779 // Generated as internal constructor for term fpu_loadrev32. 2780 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2781 let pattern0_0 = arg0; 2782 // Rule at src/isa/s390x/inst.isle line 1686. 2783 let expr0_0: Type = F32; 2784 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2785 let expr2_0 = MInst::FpuLoadRev32 { 2786 rd: expr1_0, 2787 mem: pattern0_0.clone(), 2788 }; 2789 let expr3_0 = C::emit(ctx, &expr2_0); 2790 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2791 return Some(expr4_0); 2792 } 2793 2794 // Generated as internal constructor for term fpu_loadrev64. 2795 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2796 let pattern0_0 = arg0; 2797 // Rule at src/isa/s390x/inst.isle line 1693. 2798 let expr0_0: Type = F64; 2799 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2800 let expr2_0 = MInst::FpuLoadRev64 { 2801 rd: expr1_0, 2802 mem: pattern0_0.clone(), 2803 }; 2804 let expr3_0 = C::emit(ctx, &expr2_0); 2805 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2806 return Some(expr4_0); 2807 } 2808 2809 // Generated as internal constructor for term fpu_store32. 2810 pub fn constructor_fpu_store32<C: Context>( 2811 ctx: &mut C, 2812 arg0: Reg, 2813 arg1: &MemArg, 2814 ) -> Option<SideEffectNoResult> { 2815 let pattern0_0 = arg0; 2816 let pattern1_0 = arg1; 2817 // Rule at src/isa/s390x/inst.isle line 1700. 2818 let expr0_0 = MInst::FpuStore32 { 2819 rd: pattern0_0, 2820 mem: pattern1_0.clone(), 2821 }; 2822 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2823 return Some(expr1_0); 2824 } 2825 2826 // Generated as internal constructor for term fpu_store64. 2827 pub fn constructor_fpu_store64<C: Context>( 2828 ctx: &mut C, 2829 arg0: Reg, 2830 arg1: &MemArg, 2831 ) -> Option<SideEffectNoResult> { 2832 let pattern0_0 = arg0; 2833 let pattern1_0 = arg1; 2834 // Rule at src/isa/s390x/inst.isle line 1705. 2835 let expr0_0 = MInst::FpuStore64 { 2836 rd: pattern0_0, 2837 mem: pattern1_0.clone(), 2838 }; 2839 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2840 return Some(expr1_0); 2841 } 2842 2843 // Generated as internal constructor for term fpu_storerev32. 2844 pub fn constructor_fpu_storerev32<C: Context>( 2845 ctx: &mut C, 2846 arg0: Reg, 2847 arg1: &MemArg, 2848 ) -> Option<SideEffectNoResult> { 2849 let pattern0_0 = arg0; 2850 let pattern1_0 = arg1; 2851 // Rule at src/isa/s390x/inst.isle line 1710. 2852 let expr0_0 = MInst::FpuStoreRev32 { 2853 rd: pattern0_0, 2854 mem: pattern1_0.clone(), 2855 }; 2856 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2857 return Some(expr1_0); 2858 } 2859 2860 // Generated as internal constructor for term fpu_storerev64. 2861 pub fn constructor_fpu_storerev64<C: Context>( 2862 ctx: &mut C, 2863 arg0: Reg, 2864 arg1: &MemArg, 2865 ) -> Option<SideEffectNoResult> { 2866 let pattern0_0 = arg0; 2867 let pattern1_0 = arg1; 2868 // Rule at src/isa/s390x/inst.isle line 1715. 2869 let expr0_0 = MInst::FpuStoreRev64 { 2870 rd: pattern0_0, 2871 mem: pattern1_0.clone(), 2872 }; 2873 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2874 return Some(expr1_0); 2875 } 2876 2877 // Generated as internal constructor for term load_ext_name_far. 2878 pub fn constructor_load_ext_name_far<C: Context>( 2879 ctx: &mut C, 2880 arg0: ExternalName, 2881 arg1: i64, 2882 ) -> Option<Reg> { 2883 let pattern0_0 = arg0; 2884 let pattern1_0 = arg1; 2885 // Rule at src/isa/s390x/inst.isle line 1720. 2886 let expr0_0: Type = I64; 2887 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2888 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2889 let expr3_0 = MInst::LoadExtNameFar { 2890 rd: expr1_0, 2891 name: expr2_0, 2892 offset: pattern1_0, 2893 }; 2894 let expr4_0 = C::emit(ctx, &expr3_0); 2895 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2896 return Some(expr5_0); 2897 } 2898 2899 // Generated as internal constructor for term load_addr. 2900 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2901 let pattern0_0 = arg0; 2902 // Rule at src/isa/s390x/inst.isle line 1728. 2903 let expr0_0: Type = I64; 2904 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2905 let expr2_0 = MInst::LoadAddr { 2906 rd: expr1_0, 2907 mem: pattern0_0.clone(), 2908 }; 2909 let expr3_0 = C::emit(ctx, &expr2_0); 2910 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2911 return Some(expr4_0); 2912 } 2913 2914 // Generated as internal constructor for term jump_impl. 2915 pub fn constructor_jump_impl<C: Context>( 2916 ctx: &mut C, 2917 arg0: MachLabel, 2918 ) -> Option<SideEffectNoResult> { 2919 let pattern0_0 = arg0; 2920 // Rule at src/isa/s390x/inst.isle line 1735. 2921 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2922 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2923 return Some(expr1_0); 2924 } 2925 2926 // Generated as internal constructor for term cond_br. 2927 pub fn constructor_cond_br<C: Context>( 2928 ctx: &mut C, 2929 arg0: MachLabel, 2930 arg1: MachLabel, 2931 arg2: &Cond, 2932 ) -> Option<SideEffectNoResult> { 2933 let pattern0_0 = arg0; 2934 let pattern1_0 = arg1; 2935 let pattern2_0 = arg2; 2936 // Rule at src/isa/s390x/inst.isle line 1740. 2937 let expr0_0 = MInst::CondBr { 2938 taken: pattern0_0, 2939 not_taken: pattern1_0, 2940 cond: pattern2_0.clone(), 2941 }; 2942 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2943 return Some(expr1_0); 2944 } 2945 2946 // Generated as internal constructor for term oneway_cond_br. 2947 pub fn constructor_oneway_cond_br<C: Context>( 2948 ctx: &mut C, 2949 arg0: MachLabel, 2950 arg1: &Cond, 2951 ) -> Option<SideEffectNoResult> { 2952 let pattern0_0 = arg0; 2953 let pattern1_0 = arg1; 2954 // Rule at src/isa/s390x/inst.isle line 1745. 2955 let expr0_0 = MInst::OneWayCondBr { 2956 target: pattern0_0, 2957 cond: pattern1_0.clone(), 2958 }; 2959 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2960 return Some(expr1_0); 2961 } 2962 2963 // Generated as internal constructor for term jt_sequence. 2964 pub fn constructor_jt_sequence<C: Context>( 2965 ctx: &mut C, 2966 arg0: Reg, 2967 arg1: &VecMachLabel, 2968 ) -> Option<SideEffectNoResult> { 2969 let pattern0_0 = arg0; 2970 let pattern1_0 = arg1; 2971 // Rule at src/isa/s390x/inst.isle line 1750. 2972 let expr0_0 = MInst::JTSequence { 2973 ridx: pattern0_0, 2974 targets: pattern1_0.clone(), 2975 }; 2976 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2977 return Some(expr1_0); 2978 } 2979 2980 // Generated as internal constructor for term drop_flags. 2981 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2982 let pattern0_0 = arg0; 2983 if let &ProducesFlags::ProducesFlagsReturnsReg { 2984 inst: ref pattern1_0, 2985 result: pattern1_1, 2986 } = pattern0_0 2987 { 2988 // Rule at src/isa/s390x/inst.isle line 1755. 2989 let expr0_0 = C::emit(ctx, pattern1_0); 2990 return Some(pattern1_1); 2991 } 2992 return None; 2993 } 2994 2995 // Generated as internal constructor for term push_alu_reg. 2996 pub fn constructor_push_alu_reg<C: Context>( 2997 ctx: &mut C, 2998 arg0: &VecMInstBuilder, 2999 arg1: &ALUOp, 3000 arg2: WritableReg, 3001 arg3: Reg, 3002 arg4: Reg, 3003 ) -> Option<Reg> { 3004 let pattern0_0 = arg0; 3005 let pattern1_0 = arg1; 3006 let pattern2_0 = arg2; 3007 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 3008 let pattern4_0 = arg3; 3009 let pattern5_0 = arg4; 3010 // Rule at src/isa/s390x/inst.isle line 1794. 3011 let expr0_0 = MInst::AluRRR { 3012 alu_op: pattern1_0.clone(), 3013 rd: pattern3_0, 3014 rn: pattern4_0, 3015 rm: pattern5_0, 3016 }; 3017 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3018 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3019 return Some(expr2_0); 3020 } 3021 return None; 3022 } 3023 3024 // Generated as internal constructor for term push_alu_uimm32shifted. 3025 pub fn constructor_push_alu_uimm32shifted<C: Context>( 3026 ctx: &mut C, 3027 arg0: &VecMInstBuilder, 3028 arg1: &ALUOp, 3029 arg2: WritableReg, 3030 arg3: Reg, 3031 arg4: UImm32Shifted, 3032 ) -> Option<Reg> { 3033 let pattern0_0 = arg0; 3034 let pattern1_0 = arg1; 3035 let pattern2_0 = arg2; 3036 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 3037 let pattern4_0 = arg3; 3038 let pattern5_0 = arg4; 3039 let mut closure6 = || { 3040 let expr0_0 = C::same_reg(ctx, pattern3_0, pattern4_0)?; 3041 return Some(expr0_0); 3042 }; 3043 if let Some(pattern6_0) = closure6() { 3044 // Rule at src/isa/s390x/inst.isle line 1800. 3045 let expr0_0 = MInst::AluRUImm32Shifted { 3046 alu_op: pattern1_0.clone(), 3047 rd: pattern3_0, 3048 imm: pattern5_0, 3049 }; 3050 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3051 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3052 return Some(expr2_0); 3053 } 3054 } 3055 return None; 3056 } 3057 3058 // Generated as internal constructor for term push_shift. 3059 pub fn constructor_push_shift<C: Context>( 3060 ctx: &mut C, 3061 arg0: &VecMInstBuilder, 3062 arg1: &ShiftOp, 3063 arg2: WritableReg, 3064 arg3: Reg, 3065 arg4: u8, 3066 arg5: Reg, 3067 ) -> Option<Reg> { 3068 let pattern0_0 = arg0; 3069 let pattern1_0 = arg1; 3070 let pattern2_0 = arg2; 3071 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 3072 let pattern4_0 = arg3; 3073 let pattern5_0 = arg4; 3074 let pattern6_0 = arg5; 3075 // Rule at src/isa/s390x/inst.isle line 1807. 3076 let expr0_0 = MInst::ShiftRR { 3077 shift_op: pattern1_0.clone(), 3078 rd: pattern3_0, 3079 rn: pattern4_0, 3080 shift_imm: pattern5_0, 3081 shift_reg: pattern6_0, 3082 }; 3083 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3084 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3085 return Some(expr2_0); 3086 } 3087 return None; 3088 } 3089 3090 // Generated as internal constructor for term push_rxsbg. 3091 pub fn constructor_push_rxsbg<C: Context>( 3092 ctx: &mut C, 3093 arg0: &VecMInstBuilder, 3094 arg1: &RxSBGOp, 3095 arg2: WritableReg, 3096 arg3: Reg, 3097 arg4: Reg, 3098 arg5: u8, 3099 arg6: u8, 3100 arg7: i8, 3101 ) -> Option<Reg> { 3102 let pattern0_0 = arg0; 3103 let pattern1_0 = arg1; 3104 let pattern2_0 = arg2; 3105 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 3106 let pattern4_0 = arg3; 3107 let pattern5_0 = arg4; 3108 let pattern6_0 = arg5; 3109 let pattern7_0 = arg6; 3110 let pattern8_0 = arg7; 3111 let mut closure9 = || { 3112 let expr0_0 = C::same_reg(ctx, pattern3_0, pattern4_0)?; 3113 return Some(expr0_0); 3114 }; 3115 if let Some(pattern9_0) = closure9() { 3116 // Rule at src/isa/s390x/inst.isle line 1814. 3117 let expr0_0 = MInst::RxSBG { 3118 op: pattern1_0.clone(), 3119 rd: pattern3_0, 3120 rn: pattern5_0, 3121 start_bit: pattern6_0, 3122 end_bit: pattern7_0, 3123 rotate_amt: pattern8_0, 3124 }; 3125 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3126 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3127 return Some(expr2_0); 3128 } 3129 } 3130 return None; 3131 } 3132 3133 // Generated as internal constructor for term push_unary. 3134 pub fn constructor_push_unary<C: Context>( 3135 ctx: &mut C, 3136 arg0: &VecMInstBuilder, 3137 arg1: &UnaryOp, 3138 arg2: WritableReg, 3139 arg3: Reg, 3140 ) -> Option<Reg> { 3141 let pattern0_0 = arg0; 3142 let pattern1_0 = arg1; 3143 let pattern2_0 = arg2; 3144 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 3145 let pattern4_0 = arg3; 3146 // Rule at src/isa/s390x/inst.isle line 1822. 3147 let expr0_0 = MInst::UnaryRR { 3148 op: pattern1_0.clone(), 3149 rd: pattern3_0, 3150 rn: pattern4_0, 3151 }; 3152 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3153 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3154 return Some(expr2_0); 3155 } 3156 return None; 3157 } 3158 3159 // Generated as internal constructor for term push_atomic_cas32. 3160 pub fn constructor_push_atomic_cas32<C: Context>( 3161 ctx: &mut C, 3162 arg0: &VecMInstBuilder, 3163 arg1: WritableReg, 3164 arg2: Reg, 3165 arg3: &MemArg, 3166 ) -> Option<Reg> { 3167 let pattern0_0 = arg0; 3168 let pattern1_0 = arg1; 3169 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3170 let pattern3_0 = arg2; 3171 let pattern4_0 = arg3; 3172 // Rule at src/isa/s390x/inst.isle line 1828. 3173 let expr0_0 = MInst::AtomicCas32 { 3174 rd: pattern2_0, 3175 rn: pattern3_0, 3176 mem: pattern4_0.clone(), 3177 }; 3178 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3179 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3180 return Some(expr2_0); 3181 } 3182 return None; 3183 } 3184 3185 // Generated as internal constructor for term push_atomic_cas64. 3186 pub fn constructor_push_atomic_cas64<C: Context>( 3187 ctx: &mut C, 3188 arg0: &VecMInstBuilder, 3189 arg1: WritableReg, 3190 arg2: Reg, 3191 arg3: &MemArg, 3192 ) -> Option<Reg> { 3193 let pattern0_0 = arg0; 3194 let pattern1_0 = arg1; 3195 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3196 let pattern3_0 = arg2; 3197 let pattern4_0 = arg3; 3198 // Rule at src/isa/s390x/inst.isle line 1834. 3199 let expr0_0 = MInst::AtomicCas64 { 3200 rd: pattern2_0, 3201 rn: pattern3_0, 3202 mem: pattern4_0.clone(), 3203 }; 3204 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3205 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3206 return Some(expr2_0); 3207 } 3208 return None; 3209 } 3210 3211 // Generated as internal constructor for term push_break_if. 3212 pub fn constructor_push_break_if<C: Context>( 3213 ctx: &mut C, 3214 arg0: &VecMInstBuilder, 3215 arg1: &ProducesFlags, 3216 arg2: &Cond, 3217 ) -> Option<Reg> { 3218 let pattern0_0 = arg0; 3219 let pattern1_0 = arg1; 3220 if let &ProducesFlags::ProducesFlagsSideEffect { 3221 inst: ref pattern2_0, 3222 } = pattern1_0 3223 { 3224 let pattern3_0 = arg2; 3225 // Rule at src/isa/s390x/inst.isle line 1840. 3226 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3227 let expr1_0 = MInst::CondBreak { 3228 cond: pattern3_0.clone(), 3229 }; 3230 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3231 let expr3_0 = C::invalid_reg(ctx); 3232 return Some(expr3_0); 3233 } 3234 return None; 3235 } 3236 3237 // Generated as internal constructor for term emit_loop. 3238 pub fn constructor_emit_loop<C: Context>( 3239 ctx: &mut C, 3240 arg0: &VecMInstBuilder, 3241 arg1: &Cond, 3242 ) -> Option<Unit> { 3243 let pattern0_0 = arg0; 3244 let pattern1_0 = arg1; 3245 // Rule at src/isa/s390x/inst.isle line 1847. 3246 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3247 let expr1_0 = MInst::Loop { 3248 body: expr0_0, 3249 cond: pattern1_0.clone(), 3250 }; 3251 let expr2_0 = C::emit(ctx, &expr1_0); 3252 return Some(expr2_0); 3253 } 3254 3255 // Generated as internal constructor for term emit_mov. 3256 pub fn constructor_emit_mov<C: Context>( 3257 ctx: &mut C, 3258 arg0: Type, 3259 arg1: WritableReg, 3260 arg2: Reg, 3261 ) -> Option<Unit> { 3262 let pattern0_0 = arg0; 3263 if pattern0_0 == F32 { 3264 let pattern2_0 = arg1; 3265 let pattern3_0 = arg2; 3266 // Rule at src/isa/s390x/inst.isle line 1862. 3267 let expr0_0 = MInst::FpuMove32 { 3268 rd: pattern2_0, 3269 rn: pattern3_0, 3270 }; 3271 let expr1_0 = C::emit(ctx, &expr0_0); 3272 return Some(expr1_0); 3273 } 3274 if pattern0_0 == F64 { 3275 let pattern2_0 = arg1; 3276 let pattern3_0 = arg2; 3277 // Rule at src/isa/s390x/inst.isle line 1865. 3278 let expr0_0 = MInst::FpuMove64 { 3279 rd: pattern2_0, 3280 rn: pattern3_0, 3281 }; 3282 let expr1_0 = C::emit(ctx, &expr0_0); 3283 return Some(expr1_0); 3284 } 3285 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3286 let pattern2_0 = arg1; 3287 let pattern3_0 = arg2; 3288 // Rule at src/isa/s390x/inst.isle line 1856. 3289 let expr0_0 = MInst::Mov32 { 3290 rd: pattern2_0, 3291 rm: pattern3_0, 3292 }; 3293 let expr1_0 = C::emit(ctx, &expr0_0); 3294 return Some(expr1_0); 3295 } 3296 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3297 let pattern2_0 = arg1; 3298 let pattern3_0 = arg2; 3299 // Rule at src/isa/s390x/inst.isle line 1859. 3300 let expr0_0 = MInst::Mov64 { 3301 rd: pattern2_0, 3302 rm: pattern3_0, 3303 }; 3304 let expr1_0 = C::emit(ctx, &expr0_0); 3305 return Some(expr1_0); 3306 } 3307 return None; 3308 } 3309 3310 // Generated as internal constructor for term copy_writable_reg. 3311 pub fn constructor_copy_writable_reg<C: Context>( 3312 ctx: &mut C, 3313 arg0: Type, 3314 arg1: Reg, 3315 ) -> Option<WritableReg> { 3316 let pattern0_0 = arg0; 3317 let pattern1_0 = arg1; 3318 // Rule at src/isa/s390x/inst.isle line 1870. 3319 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3320 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3321 return Some(expr0_0); 3322 } 3323 3324 // Generated as internal constructor for term copy_reg. 3325 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3326 let pattern0_0 = arg0; 3327 let pattern1_0 = arg1; 3328 // Rule at src/isa/s390x/inst.isle line 1877. 3329 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3330 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3331 return Some(expr1_0); 3332 } 3333 3334 // Generated as internal constructor for term emit_load. 3335 pub fn constructor_emit_load<C: Context>( 3336 ctx: &mut C, 3337 arg0: Type, 3338 arg1: WritableReg, 3339 arg2: &MemArg, 3340 ) -> Option<Unit> { 3341 let pattern0_0 = arg0; 3342 if pattern0_0 == I32 { 3343 let pattern2_0 = arg1; 3344 let pattern3_0 = arg2; 3345 // Rule at src/isa/s390x/inst.isle line 1881. 3346 let expr0_0 = MInst::Load32 { 3347 rd: pattern2_0, 3348 mem: pattern3_0.clone(), 3349 }; 3350 let expr1_0 = C::emit(ctx, &expr0_0); 3351 return Some(expr1_0); 3352 } 3353 if pattern0_0 == I64 { 3354 let pattern2_0 = arg1; 3355 let pattern3_0 = arg2; 3356 // Rule at src/isa/s390x/inst.isle line 1883. 3357 let expr0_0 = MInst::Load64 { 3358 rd: pattern2_0, 3359 mem: pattern3_0.clone(), 3360 }; 3361 let expr1_0 = C::emit(ctx, &expr0_0); 3362 return Some(expr1_0); 3363 } 3364 return None; 3365 } 3366 3367 // Generated as internal constructor for term emit_imm. 3368 pub fn constructor_emit_imm<C: Context>( 3369 ctx: &mut C, 3370 arg0: Type, 3371 arg1: WritableReg, 3372 arg2: u64, 3373 ) -> Option<Unit> { 3374 let pattern0_0 = arg0; 3375 if pattern0_0 == F32 { 3376 let pattern2_0 = arg1; 3377 let pattern3_0 = arg2; 3378 // Rule at src/isa/s390x/inst.isle line 1939. 3379 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3380 let expr1_0 = MInst::LoadFpuConst32 { 3381 rd: pattern2_0, 3382 const_data: expr0_0, 3383 }; 3384 let expr2_0 = C::emit(ctx, &expr1_0); 3385 return Some(expr2_0); 3386 } 3387 if pattern0_0 == F64 { 3388 let pattern2_0 = arg1; 3389 let pattern3_0 = arg2; 3390 // Rule at src/isa/s390x/inst.isle line 1944. 3391 let expr0_0 = MInst::LoadFpuConst64 { 3392 rd: pattern2_0, 3393 const_data: pattern3_0, 3394 }; 3395 let expr1_0 = C::emit(ctx, &expr0_0); 3396 return Some(expr1_0); 3397 } 3398 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3399 let pattern2_0 = arg1; 3400 let pattern3_0 = arg2; 3401 // Rule at src/isa/s390x/inst.isle line 1893. 3402 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3403 let expr1_0 = MInst::Mov32SImm16 { 3404 rd: pattern2_0, 3405 imm: expr0_0, 3406 }; 3407 let expr2_0 = C::emit(ctx, &expr1_0); 3408 return Some(expr2_0); 3409 } 3410 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3411 let pattern2_0 = arg1; 3412 let pattern3_0 = arg2; 3413 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3414 // Rule at src/isa/s390x/inst.isle line 1897. 3415 let expr0_0 = MInst::Mov32SImm16 { 3416 rd: pattern2_0, 3417 imm: pattern4_0, 3418 }; 3419 let expr1_0 = C::emit(ctx, &expr0_0); 3420 return Some(expr1_0); 3421 } 3422 // Rule at src/isa/s390x/inst.isle line 1901. 3423 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3424 let expr1_0 = MInst::Mov32Imm { 3425 rd: pattern2_0, 3426 imm: expr0_0, 3427 }; 3428 let expr2_0 = C::emit(ctx, &expr1_0); 3429 return Some(expr2_0); 3430 } 3431 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3432 let pattern2_0 = arg1; 3433 let pattern3_0 = arg2; 3434 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3435 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3436 // Rule at src/isa/s390x/inst.isle line 1921. 3437 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3438 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3439 return Some(expr1_0); 3440 } 3441 } 3442 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3443 // Rule at src/isa/s390x/inst.isle line 1905. 3444 let expr0_0 = MInst::Mov64SImm16 { 3445 rd: pattern2_0, 3446 imm: pattern4_0, 3447 }; 3448 let expr1_0 = C::emit(ctx, &expr0_0); 3449 return Some(expr1_0); 3450 } 3451 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3452 // Rule at src/isa/s390x/inst.isle line 1909. 3453 let expr0_0 = MInst::Mov64SImm32 { 3454 rd: pattern2_0, 3455 imm: pattern4_0, 3456 }; 3457 let expr1_0 = C::emit(ctx, &expr0_0); 3458 return Some(expr1_0); 3459 } 3460 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3461 // Rule at src/isa/s390x/inst.isle line 1917. 3462 let expr0_0 = MInst::Mov64UImm32Shifted { 3463 rd: pattern2_0, 3464 imm: pattern4_0, 3465 }; 3466 let expr1_0 = C::emit(ctx, &expr0_0); 3467 return Some(expr1_0); 3468 } 3469 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3470 // Rule at src/isa/s390x/inst.isle line 1913. 3471 let expr0_0 = MInst::Mov64UImm16Shifted { 3472 rd: pattern2_0, 3473 imm: pattern4_0, 3474 }; 3475 let expr1_0 = C::emit(ctx, &expr0_0); 3476 return Some(expr1_0); 3477 } 3478 } 3479 return None; 3480 } 3481 3482 // Generated as internal constructor for term emit_insert_imm. 3483 pub fn constructor_emit_insert_imm<C: Context>( 3484 ctx: &mut C, 3485 arg0: WritableReg, 3486 arg1: u64, 3487 ) -> Option<Unit> { 3488 let pattern0_0 = arg0; 3489 let pattern1_0 = arg1; 3490 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3491 // Rule at src/isa/s390x/inst.isle line 1934. 3492 let expr0_0 = MInst::Insert64UImm32Shifted { 3493 rd: pattern0_0, 3494 imm: pattern2_0, 3495 }; 3496 let expr1_0 = C::emit(ctx, &expr0_0); 3497 return Some(expr1_0); 3498 } 3499 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3500 // Rule at src/isa/s390x/inst.isle line 1930. 3501 let expr0_0 = MInst::Insert64UImm16Shifted { 3502 rd: pattern0_0, 3503 imm: pattern2_0, 3504 }; 3505 let expr1_0 = C::emit(ctx, &expr0_0); 3506 return Some(expr1_0); 3507 } 3508 return None; 3509 } 3510 3511 // Generated as internal constructor for term imm. 3512 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3513 let pattern0_0 = arg0; 3514 let pattern1_0 = arg1; 3515 // Rule at src/isa/s390x/inst.isle line 1949. 3516 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3517 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3518 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3519 return Some(expr2_0); 3520 } 3521 3522 // Generated as internal constructor for term imm_regpair_lo. 3523 pub fn constructor_imm_regpair_lo<C: Context>( 3524 ctx: &mut C, 3525 arg0: Type, 3526 arg1: u64, 3527 arg2: &RegPair, 3528 ) -> Option<RegPair> { 3529 let pattern0_0 = arg0; 3530 let pattern1_0 = arg1; 3531 let pattern2_0 = arg2; 3532 // Rule at src/isa/s390x/inst.isle line 1957. 3533 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3534 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3535 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3536 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3537 return Some(expr3_0); 3538 } 3539 3540 // Generated as internal constructor for term imm_regpair_hi. 3541 pub fn constructor_imm_regpair_hi<C: Context>( 3542 ctx: &mut C, 3543 arg0: Type, 3544 arg1: u64, 3545 arg2: &RegPair, 3546 ) -> Option<RegPair> { 3547 let pattern0_0 = arg0; 3548 let pattern1_0 = arg1; 3549 let pattern2_0 = arg2; 3550 // Rule at src/isa/s390x/inst.isle line 1965. 3551 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3552 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3553 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3554 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3555 return Some(expr3_0); 3556 } 3557 3558 // Generated as internal constructor for term ty_ext32. 3559 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3560 let pattern0_0 = arg0; 3561 if pattern0_0 == I8 { 3562 // Rule at src/isa/s390x/inst.isle line 1975. 3563 let expr0_0: Type = I32; 3564 return Some(expr0_0); 3565 } 3566 if pattern0_0 == I16 { 3567 // Rule at src/isa/s390x/inst.isle line 1976. 3568 let expr0_0: Type = I32; 3569 return Some(expr0_0); 3570 } 3571 if pattern0_0 == I32 { 3572 // Rule at src/isa/s390x/inst.isle line 1977. 3573 let expr0_0: Type = I32; 3574 return Some(expr0_0); 3575 } 3576 if pattern0_0 == I64 { 3577 // Rule at src/isa/s390x/inst.isle line 1978. 3578 let expr0_0: Type = I64; 3579 return Some(expr0_0); 3580 } 3581 return None; 3582 } 3583 3584 // Generated as internal constructor for term ty_ext64. 3585 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3586 let pattern0_0 = arg0; 3587 if pattern0_0 == I8 { 3588 // Rule at src/isa/s390x/inst.isle line 1982. 3589 let expr0_0: Type = I64; 3590 return Some(expr0_0); 3591 } 3592 if pattern0_0 == I16 { 3593 // Rule at src/isa/s390x/inst.isle line 1983. 3594 let expr0_0: Type = I64; 3595 return Some(expr0_0); 3596 } 3597 if pattern0_0 == I32 { 3598 // Rule at src/isa/s390x/inst.isle line 1984. 3599 let expr0_0: Type = I64; 3600 return Some(expr0_0); 3601 } 3602 if pattern0_0 == I64 { 3603 // Rule at src/isa/s390x/inst.isle line 1985. 3604 let expr0_0: Type = I64; 3605 return Some(expr0_0); 3606 } 3607 return None; 3608 } 3609 3610 // Generated as internal constructor for term emit_zext32_reg. 3611 pub fn constructor_emit_zext32_reg<C: Context>( 3612 ctx: &mut C, 3613 arg0: WritableReg, 3614 arg1: Type, 3615 arg2: Reg, 3616 ) -> Option<Unit> { 3617 let pattern0_0 = arg0; 3618 let pattern1_0 = arg1; 3619 let pattern2_0 = arg2; 3620 // Rule at src/isa/s390x/inst.isle line 1990. 3621 let expr0_0: bool = false; 3622 let expr1_0 = C::ty_bits(ctx, pattern1_0)?; 3623 let expr2_0: u8 = 32; 3624 let expr3_0 = MInst::Extend { 3625 rd: pattern0_0, 3626 rn: pattern2_0, 3627 signed: expr0_0, 3628 from_bits: expr1_0, 3629 to_bits: expr2_0, 3630 }; 3631 let expr4_0 = C::emit(ctx, &expr3_0); 3632 return Some(expr4_0); 3633 } 3634 3635 // Generated as internal constructor for term emit_sext32_reg. 3636 pub fn constructor_emit_sext32_reg<C: Context>( 3637 ctx: &mut C, 3638 arg0: WritableReg, 3639 arg1: Type, 3640 arg2: Reg, 3641 ) -> Option<Unit> { 3642 let pattern0_0 = arg0; 3643 let pattern1_0 = arg1; 3644 let pattern2_0 = arg2; 3645 // Rule at src/isa/s390x/inst.isle line 1996. 3646 let expr0_0: bool = true; 3647 let expr1_0 = C::ty_bits(ctx, pattern1_0)?; 3648 let expr2_0: u8 = 32; 3649 let expr3_0 = MInst::Extend { 3650 rd: pattern0_0, 3651 rn: pattern2_0, 3652 signed: expr0_0, 3653 from_bits: expr1_0, 3654 to_bits: expr2_0, 3655 }; 3656 let expr4_0 = C::emit(ctx, &expr3_0); 3657 return Some(expr4_0); 3658 } 3659 3660 // Generated as internal constructor for term emit_zext64_reg. 3661 pub fn constructor_emit_zext64_reg<C: Context>( 3662 ctx: &mut C, 3663 arg0: WritableReg, 3664 arg1: Type, 3665 arg2: Reg, 3666 ) -> Option<Unit> { 3667 let pattern0_0 = arg0; 3668 let pattern1_0 = arg1; 3669 let pattern2_0 = arg2; 3670 // Rule at src/isa/s390x/inst.isle line 2002. 3671 let expr0_0: bool = false; 3672 let expr1_0 = C::ty_bits(ctx, pattern1_0)?; 3673 let expr2_0: u8 = 64; 3674 let expr3_0 = MInst::Extend { 3675 rd: pattern0_0, 3676 rn: pattern2_0, 3677 signed: expr0_0, 3678 from_bits: expr1_0, 3679 to_bits: expr2_0, 3680 }; 3681 let expr4_0 = C::emit(ctx, &expr3_0); 3682 return Some(expr4_0); 3683 } 3684 3685 // Generated as internal constructor for term emit_sext64_reg. 3686 pub fn constructor_emit_sext64_reg<C: Context>( 3687 ctx: &mut C, 3688 arg0: WritableReg, 3689 arg1: Type, 3690 arg2: Reg, 3691 ) -> Option<Unit> { 3692 let pattern0_0 = arg0; 3693 let pattern1_0 = arg1; 3694 let pattern2_0 = arg2; 3695 // Rule at src/isa/s390x/inst.isle line 2008. 3696 let expr0_0: bool = true; 3697 let expr1_0 = C::ty_bits(ctx, pattern1_0)?; 3698 let expr2_0: u8 = 64; 3699 let expr3_0 = MInst::Extend { 3700 rd: pattern0_0, 3701 rn: pattern2_0, 3702 signed: expr0_0, 3703 from_bits: expr1_0, 3704 to_bits: expr2_0, 3705 }; 3706 let expr4_0 = C::emit(ctx, &expr3_0); 3707 return Some(expr4_0); 3708 } 3709 3710 // Generated as internal constructor for term zext32_reg. 3711 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3712 let pattern0_0 = arg0; 3713 let pattern1_0 = arg1; 3714 // Rule at src/isa/s390x/inst.isle line 2014. 3715 let expr0_0: Type = I32; 3716 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3717 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3718 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3719 return Some(expr3_0); 3720 } 3721 3722 // Generated as internal constructor for term sext32_reg. 3723 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3724 let pattern0_0 = arg0; 3725 let pattern1_0 = arg1; 3726 // Rule at src/isa/s390x/inst.isle line 2022. 3727 let expr0_0: Type = I32; 3728 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3729 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3730 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3731 return Some(expr3_0); 3732 } 3733 3734 // Generated as internal constructor for term zext64_reg. 3735 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3736 let pattern0_0 = arg0; 3737 let pattern1_0 = arg1; 3738 // Rule at src/isa/s390x/inst.isle line 2030. 3739 let expr0_0: Type = I64; 3740 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3741 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3742 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3743 return Some(expr3_0); 3744 } 3745 3746 // Generated as internal constructor for term sext64_reg. 3747 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3748 let pattern0_0 = arg0; 3749 let pattern1_0 = arg1; 3750 // Rule at src/isa/s390x/inst.isle line 2038. 3751 let expr0_0: Type = I64; 3752 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3753 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3754 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3755 return Some(expr3_0); 3756 } 3757 3758 // Generated as internal constructor for term emit_zext32_mem. 3759 pub fn constructor_emit_zext32_mem<C: Context>( 3760 ctx: &mut C, 3761 arg0: WritableReg, 3762 arg1: Type, 3763 arg2: &MemArg, 3764 ) -> Option<Unit> { 3765 let pattern0_0 = arg0; 3766 let pattern1_0 = arg1; 3767 if pattern1_0 == I8 { 3768 let pattern3_0 = arg2; 3769 // Rule at src/isa/s390x/inst.isle line 2046. 3770 let expr0_0 = MInst::Load32ZExt8 { 3771 rd: pattern0_0, 3772 mem: pattern3_0.clone(), 3773 }; 3774 let expr1_0 = C::emit(ctx, &expr0_0); 3775 return Some(expr1_0); 3776 } 3777 if pattern1_0 == I16 { 3778 let pattern3_0 = arg2; 3779 // Rule at src/isa/s390x/inst.isle line 2047. 3780 let expr0_0 = MInst::Load32ZExt16 { 3781 rd: pattern0_0, 3782 mem: pattern3_0.clone(), 3783 }; 3784 let expr1_0 = C::emit(ctx, &expr0_0); 3785 return Some(expr1_0); 3786 } 3787 return None; 3788 } 3789 3790 // Generated as internal constructor for term emit_sext32_mem. 3791 pub fn constructor_emit_sext32_mem<C: Context>( 3792 ctx: &mut C, 3793 arg0: WritableReg, 3794 arg1: Type, 3795 arg2: &MemArg, 3796 ) -> Option<Unit> { 3797 let pattern0_0 = arg0; 3798 let pattern1_0 = arg1; 3799 if pattern1_0 == I8 { 3800 let pattern3_0 = arg2; 3801 // Rule at src/isa/s390x/inst.isle line 2051. 3802 let expr0_0 = MInst::Load32SExt8 { 3803 rd: pattern0_0, 3804 mem: pattern3_0.clone(), 3805 }; 3806 let expr1_0 = C::emit(ctx, &expr0_0); 3807 return Some(expr1_0); 3808 } 3809 if pattern1_0 == I16 { 3810 let pattern3_0 = arg2; 3811 // Rule at src/isa/s390x/inst.isle line 2052. 3812 let expr0_0 = MInst::Load32SExt16 { 3813 rd: pattern0_0, 3814 mem: pattern3_0.clone(), 3815 }; 3816 let expr1_0 = C::emit(ctx, &expr0_0); 3817 return Some(expr1_0); 3818 } 3819 return None; 3820 } 3821 3822 // Generated as internal constructor for term emit_zext64_mem. 3823 pub fn constructor_emit_zext64_mem<C: Context>( 3824 ctx: &mut C, 3825 arg0: WritableReg, 3826 arg1: Type, 3827 arg2: &MemArg, 3828 ) -> Option<Unit> { 3829 let pattern0_0 = arg0; 3830 let pattern1_0 = arg1; 3831 if pattern1_0 == I8 { 3832 let pattern3_0 = arg2; 3833 // Rule at src/isa/s390x/inst.isle line 2056. 3834 let expr0_0 = MInst::Load64ZExt8 { 3835 rd: pattern0_0, 3836 mem: pattern3_0.clone(), 3837 }; 3838 let expr1_0 = C::emit(ctx, &expr0_0); 3839 return Some(expr1_0); 3840 } 3841 if pattern1_0 == I16 { 3842 let pattern3_0 = arg2; 3843 // Rule at src/isa/s390x/inst.isle line 2057. 3844 let expr0_0 = MInst::Load64ZExt16 { 3845 rd: pattern0_0, 3846 mem: pattern3_0.clone(), 3847 }; 3848 let expr1_0 = C::emit(ctx, &expr0_0); 3849 return Some(expr1_0); 3850 } 3851 if pattern1_0 == I32 { 3852 let pattern3_0 = arg2; 3853 // Rule at src/isa/s390x/inst.isle line 2058. 3854 let expr0_0 = MInst::Load64ZExt32 { 3855 rd: pattern0_0, 3856 mem: pattern3_0.clone(), 3857 }; 3858 let expr1_0 = C::emit(ctx, &expr0_0); 3859 return Some(expr1_0); 3860 } 3861 return None; 3862 } 3863 3864 // Generated as internal constructor for term emit_sext64_mem. 3865 pub fn constructor_emit_sext64_mem<C: Context>( 3866 ctx: &mut C, 3867 arg0: WritableReg, 3868 arg1: Type, 3869 arg2: &MemArg, 3870 ) -> Option<Unit> { 3871 let pattern0_0 = arg0; 3872 let pattern1_0 = arg1; 3873 if pattern1_0 == I8 { 3874 let pattern3_0 = arg2; 3875 // Rule at src/isa/s390x/inst.isle line 2062. 3876 let expr0_0 = MInst::Load64SExt8 { 3877 rd: pattern0_0, 3878 mem: pattern3_0.clone(), 3879 }; 3880 let expr1_0 = C::emit(ctx, &expr0_0); 3881 return Some(expr1_0); 3882 } 3883 if pattern1_0 == I16 { 3884 let pattern3_0 = arg2; 3885 // Rule at src/isa/s390x/inst.isle line 2063. 3886 let expr0_0 = MInst::Load64SExt16 { 3887 rd: pattern0_0, 3888 mem: pattern3_0.clone(), 3889 }; 3890 let expr1_0 = C::emit(ctx, &expr0_0); 3891 return Some(expr1_0); 3892 } 3893 if pattern1_0 == I32 { 3894 let pattern3_0 = arg2; 3895 // Rule at src/isa/s390x/inst.isle line 2064. 3896 let expr0_0 = MInst::Load64SExt32 { 3897 rd: pattern0_0, 3898 mem: pattern3_0.clone(), 3899 }; 3900 let expr1_0 = C::emit(ctx, &expr0_0); 3901 return Some(expr1_0); 3902 } 3903 return None; 3904 } 3905 3906 // Generated as internal constructor for term zext32_mem. 3907 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3908 let pattern0_0 = arg0; 3909 let pattern1_0 = arg1; 3910 // Rule at src/isa/s390x/inst.isle line 2068. 3911 let expr0_0: Type = I32; 3912 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3913 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3914 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3915 return Some(expr3_0); 3916 } 3917 3918 // Generated as internal constructor for term sext32_mem. 3919 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3920 let pattern0_0 = arg0; 3921 let pattern1_0 = arg1; 3922 // Rule at src/isa/s390x/inst.isle line 2075. 3923 let expr0_0: Type = I32; 3924 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3925 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3926 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3927 return Some(expr3_0); 3928 } 3929 3930 // Generated as internal constructor for term zext64_mem. 3931 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3932 let pattern0_0 = arg0; 3933 let pattern1_0 = arg1; 3934 // Rule at src/isa/s390x/inst.isle line 2082. 3935 let expr0_0: Type = I64; 3936 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3937 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3938 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3939 return Some(expr3_0); 3940 } 3941 3942 // Generated as internal constructor for term sext64_mem. 3943 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3944 let pattern0_0 = arg0; 3945 let pattern1_0 = arg1; 3946 // Rule at src/isa/s390x/inst.isle line 2089. 3947 let expr0_0: Type = I64; 3948 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3949 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3950 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3951 return Some(expr3_0); 3952 } 3953 3954 // Generated as internal constructor for term emit_put_in_reg_zext32. 3955 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3956 ctx: &mut C, 3957 arg0: WritableReg, 3958 arg1: Value, 3959 ) -> Option<Unit> { 3960 let pattern0_0 = arg0; 3961 let pattern1_0 = arg1; 3962 let pattern2_0 = C::value_type(ctx, pattern1_0); 3963 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3964 // Rule at src/isa/s390x/inst.isle line 2097. 3965 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3966 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3967 return Some(expr1_0); 3968 } 3969 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3970 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3971 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3972 if let &InstructionData::Load { 3973 opcode: ref pattern6_0, 3974 arg: pattern6_1, 3975 flags: pattern6_2, 3976 offset: pattern6_3, 3977 } = &pattern5_0 3978 { 3979 if let &Opcode::Load = pattern6_0 { 3980 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3981 // Rule at src/isa/s390x/inst.isle line 2099. 3982 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3983 let expr1_0 = 3984 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3985 return Some(expr1_0); 3986 } 3987 } 3988 } 3989 } 3990 // Rule at src/isa/s390x/inst.isle line 2101. 3991 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3992 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3993 return Some(expr1_0); 3994 } 3995 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3996 // Rule at src/isa/s390x/inst.isle line 2103. 3997 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3998 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3999 return Some(expr1_0); 4000 } 4001 return None; 4002 } 4003 4004 // Generated as internal constructor for term emit_put_in_reg_sext32. 4005 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 4006 ctx: &mut C, 4007 arg0: WritableReg, 4008 arg1: Value, 4009 ) -> Option<Unit> { 4010 let pattern0_0 = arg0; 4011 let pattern1_0 = arg1; 4012 let pattern2_0 = C::value_type(ctx, pattern1_0); 4013 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 4014 // Rule at src/isa/s390x/inst.isle line 2108. 4015 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 4016 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 4017 return Some(expr1_0); 4018 } 4019 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 4020 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 4021 let pattern5_0 = C::inst_data(ctx, pattern4_0); 4022 if let &InstructionData::Load { 4023 opcode: ref pattern6_0, 4024 arg: pattern6_1, 4025 flags: pattern6_2, 4026 offset: pattern6_3, 4027 } = &pattern5_0 4028 { 4029 if let &Opcode::Load = pattern6_0 { 4030 if let Some(()) = C::bigendian(ctx, pattern6_2) { 4031 // Rule at src/isa/s390x/inst.isle line 2110. 4032 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 4033 let expr1_0 = 4034 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 4035 return Some(expr1_0); 4036 } 4037 } 4038 } 4039 } 4040 // Rule at src/isa/s390x/inst.isle line 2112. 4041 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4042 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 4043 return Some(expr1_0); 4044 } 4045 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 4046 // Rule at src/isa/s390x/inst.isle line 2114. 4047 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4048 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 4049 return Some(expr1_0); 4050 } 4051 return None; 4052 } 4053 4054 // Generated as internal constructor for term emit_put_in_reg_zext64. 4055 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 4056 ctx: &mut C, 4057 arg0: WritableReg, 4058 arg1: Value, 4059 ) -> Option<Unit> { 4060 let pattern0_0 = arg0; 4061 let pattern1_0 = arg1; 4062 let pattern2_0 = C::value_type(ctx, pattern1_0); 4063 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 4064 // Rule at src/isa/s390x/inst.isle line 2119. 4065 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 4066 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 4067 return Some(expr1_0); 4068 } 4069 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 4070 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 4071 let pattern5_0 = C::inst_data(ctx, pattern4_0); 4072 if let &InstructionData::Load { 4073 opcode: ref pattern6_0, 4074 arg: pattern6_1, 4075 flags: pattern6_2, 4076 offset: pattern6_3, 4077 } = &pattern5_0 4078 { 4079 if let &Opcode::Load = pattern6_0 { 4080 if let Some(()) = C::bigendian(ctx, pattern6_2) { 4081 // Rule at src/isa/s390x/inst.isle line 2121. 4082 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 4083 let expr1_0 = 4084 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 4085 return Some(expr1_0); 4086 } 4087 } 4088 } 4089 } 4090 // Rule at src/isa/s390x/inst.isle line 2123. 4091 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4092 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 4093 return Some(expr1_0); 4094 } 4095 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 4096 // Rule at src/isa/s390x/inst.isle line 2125. 4097 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4098 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 4099 return Some(expr1_0); 4100 } 4101 return None; 4102 } 4103 4104 // Generated as internal constructor for term emit_put_in_reg_sext64. 4105 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 4106 ctx: &mut C, 4107 arg0: WritableReg, 4108 arg1: Value, 4109 ) -> Option<Unit> { 4110 let pattern0_0 = arg0; 4111 let pattern1_0 = arg1; 4112 let pattern2_0 = C::value_type(ctx, pattern1_0); 4113 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 4114 // Rule at src/isa/s390x/inst.isle line 2130. 4115 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 4116 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 4117 return Some(expr1_0); 4118 } 4119 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 4120 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 4121 let pattern5_0 = C::inst_data(ctx, pattern4_0); 4122 if let &InstructionData::Load { 4123 opcode: ref pattern6_0, 4124 arg: pattern6_1, 4125 flags: pattern6_2, 4126 offset: pattern6_3, 4127 } = &pattern5_0 4128 { 4129 if let &Opcode::Load = pattern6_0 { 4130 if let Some(()) = C::bigendian(ctx, pattern6_2) { 4131 // Rule at src/isa/s390x/inst.isle line 2132. 4132 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 4133 let expr1_0 = 4134 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 4135 return Some(expr1_0); 4136 } 4137 } 4138 } 4139 } 4140 // Rule at src/isa/s390x/inst.isle line 2134. 4141 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4142 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 4143 return Some(expr1_0); 4144 } 4145 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 4146 // Rule at src/isa/s390x/inst.isle line 2136. 4147 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 4148 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 4149 return Some(expr1_0); 4150 } 4151 return None; 4152 } 4153 4154 // Generated as internal constructor for term put_in_reg_zext32. 4155 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4156 let pattern0_0 = arg0; 4157 let pattern1_0 = C::value_type(ctx, pattern0_0); 4158 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4159 // Rule at src/isa/s390x/inst.isle line 2141. 4160 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4161 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4162 return Some(expr1_0); 4163 } 4164 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4165 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4166 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4167 if let &InstructionData::Load { 4168 opcode: ref pattern5_0, 4169 arg: pattern5_1, 4170 flags: pattern5_2, 4171 offset: pattern5_3, 4172 } = &pattern4_0 4173 { 4174 if let &Opcode::Load = pattern5_0 { 4175 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4176 // Rule at src/isa/s390x/inst.isle line 2143. 4177 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4178 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4179 return Some(expr1_0); 4180 } 4181 } 4182 } 4183 } 4184 // Rule at src/isa/s390x/inst.isle line 2145. 4185 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4186 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4187 return Some(expr1_0); 4188 } 4189 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4190 // Rule at src/isa/s390x/inst.isle line 2147. 4191 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4192 return Some(expr0_0); 4193 } 4194 return None; 4195 } 4196 4197 // Generated as internal constructor for term put_in_reg_sext32. 4198 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4199 let pattern0_0 = arg0; 4200 let pattern1_0 = C::value_type(ctx, pattern0_0); 4201 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4202 // Rule at src/isa/s390x/inst.isle line 2152. 4203 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4204 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4205 return Some(expr1_0); 4206 } 4207 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4208 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4209 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4210 if let &InstructionData::Load { 4211 opcode: ref pattern5_0, 4212 arg: pattern5_1, 4213 flags: pattern5_2, 4214 offset: pattern5_3, 4215 } = &pattern4_0 4216 { 4217 if let &Opcode::Load = pattern5_0 { 4218 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4219 // Rule at src/isa/s390x/inst.isle line 2154. 4220 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4221 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4222 return Some(expr1_0); 4223 } 4224 } 4225 } 4226 } 4227 // Rule at src/isa/s390x/inst.isle line 2156. 4228 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4229 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4230 return Some(expr1_0); 4231 } 4232 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4233 // Rule at src/isa/s390x/inst.isle line 2158. 4234 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4235 return Some(expr0_0); 4236 } 4237 return None; 4238 } 4239 4240 // Generated as internal constructor for term put_in_reg_zext64. 4241 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4242 let pattern0_0 = arg0; 4243 let pattern1_0 = C::value_type(ctx, pattern0_0); 4244 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4245 // Rule at src/isa/s390x/inst.isle line 2163. 4246 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4247 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4248 return Some(expr1_0); 4249 } 4250 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4251 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4252 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4253 if let &InstructionData::Load { 4254 opcode: ref pattern5_0, 4255 arg: pattern5_1, 4256 flags: pattern5_2, 4257 offset: pattern5_3, 4258 } = &pattern4_0 4259 { 4260 if let &Opcode::Load = pattern5_0 { 4261 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4262 // Rule at src/isa/s390x/inst.isle line 2165. 4263 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4264 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4265 return Some(expr1_0); 4266 } 4267 } 4268 } 4269 } 4270 // Rule at src/isa/s390x/inst.isle line 2167. 4271 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4272 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4273 return Some(expr1_0); 4274 } 4275 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4276 // Rule at src/isa/s390x/inst.isle line 2169. 4277 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4278 return Some(expr0_0); 4279 } 4280 return None; 4281 } 4282 4283 // Generated as internal constructor for term put_in_reg_sext64. 4284 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4285 let pattern0_0 = arg0; 4286 let pattern1_0 = C::value_type(ctx, pattern0_0); 4287 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4288 // Rule at src/isa/s390x/inst.isle line 2174. 4289 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4290 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4291 return Some(expr1_0); 4292 } 4293 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4294 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4295 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4296 if let &InstructionData::Load { 4297 opcode: ref pattern5_0, 4298 arg: pattern5_1, 4299 flags: pattern5_2, 4300 offset: pattern5_3, 4301 } = &pattern4_0 4302 { 4303 if let &Opcode::Load = pattern5_0 { 4304 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4305 // Rule at src/isa/s390x/inst.isle line 2176. 4306 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4307 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4308 return Some(expr1_0); 4309 } 4310 } 4311 } 4312 } 4313 // Rule at src/isa/s390x/inst.isle line 2178. 4314 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4315 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4316 return Some(expr1_0); 4317 } 4318 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4319 // Rule at src/isa/s390x/inst.isle line 2180. 4320 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4321 return Some(expr0_0); 4322 } 4323 return None; 4324 } 4325 4326 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4327 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4328 ctx: &mut C, 4329 arg0: Value, 4330 arg1: &RegPair, 4331 ) -> Option<RegPair> { 4332 let pattern0_0 = arg0; 4333 let pattern1_0 = arg1; 4334 // Rule at src/isa/s390x/inst.isle line 2186. 4335 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4336 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4337 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4338 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4339 return Some(expr3_0); 4340 } 4341 4342 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4343 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4344 ctx: &mut C, 4345 arg0: Value, 4346 arg1: &RegPair, 4347 ) -> Option<RegPair> { 4348 let pattern0_0 = arg0; 4349 let pattern1_0 = arg1; 4350 // Rule at src/isa/s390x/inst.isle line 2194. 4351 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4352 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4353 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4354 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4355 return Some(expr3_0); 4356 } 4357 4358 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4359 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4360 ctx: &mut C, 4361 arg0: Value, 4362 arg1: &RegPair, 4363 ) -> Option<RegPair> { 4364 let pattern0_0 = arg0; 4365 let pattern1_0 = arg1; 4366 // Rule at src/isa/s390x/inst.isle line 2202. 4367 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4368 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4369 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4370 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4371 return Some(expr3_0); 4372 } 4373 4374 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4375 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4376 ctx: &mut C, 4377 arg0: Value, 4378 arg1: &RegPair, 4379 ) -> Option<RegPair> { 4380 let pattern0_0 = arg0; 4381 let pattern1_0 = arg1; 4382 // Rule at src/isa/s390x/inst.isle line 2210. 4383 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4384 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4385 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4386 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4387 return Some(expr3_0); 4388 } 4389 4390 // Generated as internal constructor for term emit_cmov_imm. 4391 pub fn constructor_emit_cmov_imm<C: Context>( 4392 ctx: &mut C, 4393 arg0: Type, 4394 arg1: WritableReg, 4395 arg2: &Cond, 4396 arg3: i16, 4397 ) -> Option<ConsumesFlags> { 4398 let pattern0_0 = arg0; 4399 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4400 let pattern2_0 = arg1; 4401 let pattern3_0 = arg2; 4402 let pattern4_0 = arg3; 4403 // Rule at src/isa/s390x/inst.isle line 2220. 4404 let expr0_0 = MInst::CMov32SImm16 { 4405 rd: pattern2_0, 4406 cond: pattern3_0.clone(), 4407 imm: pattern4_0, 4408 }; 4409 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4410 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4411 inst: expr0_0, 4412 result: expr1_0, 4413 }; 4414 return Some(expr2_0); 4415 } 4416 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4417 let pattern2_0 = arg1; 4418 let pattern3_0 = arg2; 4419 let pattern4_0 = arg3; 4420 // Rule at src/isa/s390x/inst.isle line 2223. 4421 let expr0_0 = MInst::CMov64SImm16 { 4422 rd: pattern2_0, 4423 cond: pattern3_0.clone(), 4424 imm: pattern4_0, 4425 }; 4426 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4427 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4428 inst: expr0_0, 4429 result: expr1_0, 4430 }; 4431 return Some(expr2_0); 4432 } 4433 return None; 4434 } 4435 4436 // Generated as internal constructor for term cmov_imm. 4437 pub fn constructor_cmov_imm<C: Context>( 4438 ctx: &mut C, 4439 arg0: Type, 4440 arg1: &Cond, 4441 arg2: i16, 4442 arg3: Reg, 4443 ) -> Option<ConsumesFlags> { 4444 let pattern0_0 = arg0; 4445 let pattern1_0 = arg1; 4446 let pattern2_0 = arg2; 4447 let pattern3_0 = arg3; 4448 // Rule at src/isa/s390x/inst.isle line 2229. 4449 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4450 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4451 return Some(expr1_0); 4452 } 4453 4454 // Generated as internal constructor for term cmov_imm_regpair_lo. 4455 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4456 ctx: &mut C, 4457 arg0: Type, 4458 arg1: &ProducesFlags, 4459 arg2: &Cond, 4460 arg3: i16, 4461 arg4: &RegPair, 4462 ) -> Option<RegPair> { 4463 let pattern0_0 = arg0; 4464 let pattern1_0 = arg1; 4465 let pattern2_0 = arg2; 4466 let pattern3_0 = arg3; 4467 let pattern4_0 = arg4; 4468 // Rule at src/isa/s390x/inst.isle line 2236. 4469 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4470 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4471 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4472 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4473 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4474 return Some(expr4_0); 4475 } 4476 4477 // Generated as internal constructor for term cmov_imm_regpair_hi. 4478 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4479 ctx: &mut C, 4480 arg0: Type, 4481 arg1: &ProducesFlags, 4482 arg2: &Cond, 4483 arg3: i16, 4484 arg4: &RegPair, 4485 ) -> Option<RegPair> { 4486 let pattern0_0 = arg0; 4487 let pattern1_0 = arg1; 4488 let pattern2_0 = arg2; 4489 let pattern3_0 = arg3; 4490 let pattern4_0 = arg4; 4491 // Rule at src/isa/s390x/inst.isle line 2245. 4492 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4493 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4494 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4495 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4496 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4497 return Some(expr4_0); 4498 } 4499 4500 // Generated as internal constructor for term emit_cmov_reg. 4501 pub fn constructor_emit_cmov_reg<C: Context>( 4502 ctx: &mut C, 4503 arg0: Type, 4504 arg1: WritableReg, 4505 arg2: &Cond, 4506 arg3: Reg, 4507 ) -> Option<ConsumesFlags> { 4508 let pattern0_0 = arg0; 4509 if pattern0_0 == F32 { 4510 let pattern2_0 = arg1; 4511 let pattern3_0 = arg2; 4512 let pattern4_0 = arg3; 4513 // Rule at src/isa/s390x/inst.isle line 2259. 4514 let expr0_0 = MInst::FpuCMov32 { 4515 rd: pattern2_0, 4516 cond: pattern3_0.clone(), 4517 rm: pattern4_0, 4518 }; 4519 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4520 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4521 inst: expr0_0, 4522 result: expr1_0, 4523 }; 4524 return Some(expr2_0); 4525 } 4526 if pattern0_0 == F64 { 4527 let pattern2_0 = arg1; 4528 let pattern3_0 = arg2; 4529 let pattern4_0 = arg3; 4530 // Rule at src/isa/s390x/inst.isle line 2262. 4531 let expr0_0 = MInst::FpuCMov64 { 4532 rd: pattern2_0, 4533 cond: pattern3_0.clone(), 4534 rm: pattern4_0, 4535 }; 4536 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4537 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4538 inst: expr0_0, 4539 result: expr1_0, 4540 }; 4541 return Some(expr2_0); 4542 } 4543 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4544 let pattern2_0 = arg1; 4545 let pattern3_0 = arg2; 4546 let pattern4_0 = arg3; 4547 // Rule at src/isa/s390x/inst.isle line 2253. 4548 let expr0_0 = MInst::CMov32 { 4549 rd: pattern2_0, 4550 cond: pattern3_0.clone(), 4551 rm: pattern4_0, 4552 }; 4553 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4554 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4555 inst: expr0_0, 4556 result: expr1_0, 4557 }; 4558 return Some(expr2_0); 4559 } 4560 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4561 let pattern2_0 = arg1; 4562 let pattern3_0 = arg2; 4563 let pattern4_0 = arg3; 4564 // Rule at src/isa/s390x/inst.isle line 2256. 4565 let expr0_0 = MInst::CMov64 { 4566 rd: pattern2_0, 4567 cond: pattern3_0.clone(), 4568 rm: pattern4_0, 4569 }; 4570 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4571 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4572 inst: expr0_0, 4573 result: expr1_0, 4574 }; 4575 return Some(expr2_0); 4576 } 4577 return None; 4578 } 4579 4580 // Generated as internal constructor for term cmov_reg. 4581 pub fn constructor_cmov_reg<C: Context>( 4582 ctx: &mut C, 4583 arg0: Type, 4584 arg1: &Cond, 4585 arg2: Reg, 4586 arg3: Reg, 4587 ) -> Option<ConsumesFlags> { 4588 let pattern0_0 = arg0; 4589 let pattern1_0 = arg1; 4590 let pattern2_0 = arg2; 4591 let pattern3_0 = arg3; 4592 // Rule at src/isa/s390x/inst.isle line 2268. 4593 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4594 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4595 return Some(expr1_0); 4596 } 4597 4598 // Generated as internal constructor for term trap_if. 4599 pub fn constructor_trap_if<C: Context>( 4600 ctx: &mut C, 4601 arg0: &ProducesFlags, 4602 arg1: &Cond, 4603 arg2: &TrapCode, 4604 ) -> Option<Reg> { 4605 let pattern0_0 = arg0; 4606 match pattern0_0 { 4607 &ProducesFlags::ProducesFlagsSideEffect { 4608 inst: ref pattern1_0, 4609 } => { 4610 let pattern2_0 = arg1; 4611 let pattern3_0 = arg2; 4612 // Rule at src/isa/s390x/inst.isle line 2280. 4613 let expr0_0 = C::emit(ctx, pattern1_0); 4614 let expr1_0 = MInst::TrapIf { 4615 cond: pattern2_0.clone(), 4616 trap_code: pattern3_0.clone(), 4617 }; 4618 let expr2_0 = C::emit(ctx, &expr1_0); 4619 let expr3_0 = C::invalid_reg(ctx); 4620 return Some(expr3_0); 4621 } 4622 &ProducesFlags::ProducesFlagsReturnsReg { 4623 inst: ref pattern1_0, 4624 result: pattern1_1, 4625 } => { 4626 let pattern2_0 = arg1; 4627 let pattern3_0 = arg2; 4628 // Rule at src/isa/s390x/inst.isle line 2276. 4629 let expr0_0 = C::emit(ctx, pattern1_0); 4630 let expr1_0 = MInst::TrapIf { 4631 cond: pattern2_0.clone(), 4632 trap_code: pattern3_0.clone(), 4633 }; 4634 let expr2_0 = C::emit(ctx, &expr1_0); 4635 return Some(pattern1_1); 4636 } 4637 _ => {} 4638 } 4639 return None; 4640 } 4641 4642 // Generated as internal constructor for term icmps_reg_and_trap. 4643 pub fn constructor_icmps_reg_and_trap<C: Context>( 4644 ctx: &mut C, 4645 arg0: Type, 4646 arg1: Reg, 4647 arg2: Reg, 4648 arg3: &Cond, 4649 arg4: &TrapCode, 4650 ) -> Option<Reg> { 4651 let pattern0_0 = arg0; 4652 let pattern1_0 = arg1; 4653 let pattern2_0 = arg2; 4654 let pattern3_0 = arg3; 4655 let pattern4_0 = arg4; 4656 // Rule at src/isa/s390x/inst.isle line 2286. 4657 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4658 let expr1_0 = MInst::CmpTrapRR { 4659 op: expr0_0, 4660 rn: pattern1_0, 4661 rm: pattern2_0, 4662 cond: pattern3_0.clone(), 4663 trap_code: pattern4_0.clone(), 4664 }; 4665 let expr2_0 = C::emit(ctx, &expr1_0); 4666 let expr3_0 = C::invalid_reg(ctx); 4667 return Some(expr3_0); 4668 } 4669 4670 // Generated as internal constructor for term icmps_simm16_and_trap. 4671 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4672 ctx: &mut C, 4673 arg0: Type, 4674 arg1: Reg, 4675 arg2: i16, 4676 arg3: &Cond, 4677 arg4: &TrapCode, 4678 ) -> Option<Reg> { 4679 let pattern0_0 = arg0; 4680 let pattern1_0 = arg1; 4681 let pattern2_0 = arg2; 4682 let pattern3_0 = arg3; 4683 let pattern4_0 = arg4; 4684 // Rule at src/isa/s390x/inst.isle line 2292. 4685 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4686 let expr1_0 = MInst::CmpTrapRSImm16 { 4687 op: expr0_0, 4688 rn: pattern1_0, 4689 imm: pattern2_0, 4690 cond: pattern3_0.clone(), 4691 trap_code: pattern4_0.clone(), 4692 }; 4693 let expr2_0 = C::emit(ctx, &expr1_0); 4694 let expr3_0 = C::invalid_reg(ctx); 4695 return Some(expr3_0); 4696 } 4697 4698 // Generated as internal constructor for term icmpu_reg_and_trap. 4699 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4700 ctx: &mut C, 4701 arg0: Type, 4702 arg1: Reg, 4703 arg2: Reg, 4704 arg3: &Cond, 4705 arg4: &TrapCode, 4706 ) -> Option<Reg> { 4707 let pattern0_0 = arg0; 4708 let pattern1_0 = arg1; 4709 let pattern2_0 = arg2; 4710 let pattern3_0 = arg3; 4711 let pattern4_0 = arg4; 4712 // Rule at src/isa/s390x/inst.isle line 2298. 4713 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4714 let expr1_0 = MInst::CmpTrapRR { 4715 op: expr0_0, 4716 rn: pattern1_0, 4717 rm: pattern2_0, 4718 cond: pattern3_0.clone(), 4719 trap_code: pattern4_0.clone(), 4720 }; 4721 let expr2_0 = C::emit(ctx, &expr1_0); 4722 let expr3_0 = C::invalid_reg(ctx); 4723 return Some(expr3_0); 4724 } 4725 4726 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4727 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4728 ctx: &mut C, 4729 arg0: Type, 4730 arg1: Reg, 4731 arg2: u16, 4732 arg3: &Cond, 4733 arg4: &TrapCode, 4734 ) -> Option<Reg> { 4735 let pattern0_0 = arg0; 4736 let pattern1_0 = arg1; 4737 let pattern2_0 = arg2; 4738 let pattern3_0 = arg3; 4739 let pattern4_0 = arg4; 4740 // Rule at src/isa/s390x/inst.isle line 2304. 4741 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4742 let expr1_0 = MInst::CmpTrapRUImm16 { 4743 op: expr0_0, 4744 rn: pattern1_0, 4745 imm: pattern2_0, 4746 cond: pattern3_0.clone(), 4747 trap_code: pattern4_0.clone(), 4748 }; 4749 let expr2_0 = C::emit(ctx, &expr1_0); 4750 let expr3_0 = C::invalid_reg(ctx); 4751 return Some(expr3_0); 4752 } 4753 4754 // Generated as internal constructor for term trap_impl. 4755 pub fn constructor_trap_impl<C: Context>( 4756 ctx: &mut C, 4757 arg0: &TrapCode, 4758 ) -> Option<SideEffectNoResult> { 4759 let pattern0_0 = arg0; 4760 // Rule at src/isa/s390x/inst.isle line 2310. 4761 let expr0_0 = MInst::Trap { 4762 trap_code: pattern0_0.clone(), 4763 }; 4764 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4765 return Some(expr1_0); 4766 } 4767 4768 // Generated as internal constructor for term trap_if_impl. 4769 pub fn constructor_trap_if_impl<C: Context>( 4770 ctx: &mut C, 4771 arg0: &Cond, 4772 arg1: &TrapCode, 4773 ) -> Option<SideEffectNoResult> { 4774 let pattern0_0 = arg0; 4775 let pattern1_0 = arg1; 4776 // Rule at src/isa/s390x/inst.isle line 2314. 4777 let expr0_0 = MInst::TrapIf { 4778 cond: pattern0_0.clone(), 4779 trap_code: pattern1_0.clone(), 4780 }; 4781 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4782 return Some(expr1_0); 4783 } 4784 4785 // Generated as internal constructor for term debugtrap_impl. 4786 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4787 // Rule at src/isa/s390x/inst.isle line 2318. 4788 let expr0_0 = MInst::Debugtrap; 4789 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4790 return Some(expr1_0); 4791 } 4792 4793 // Generated as internal constructor for term bool. 4794 pub fn constructor_bool<C: Context>( 4795 ctx: &mut C, 4796 arg0: &ProducesFlags, 4797 arg1: &Cond, 4798 ) -> Option<ProducesBool> { 4799 let pattern0_0 = arg0; 4800 let pattern1_0 = arg1; 4801 // Rule at src/isa/s390x/inst.isle line 2329. 4802 let expr0_0 = ProducesBool::ProducesBool { 4803 producer: pattern0_0.clone(), 4804 cond: pattern1_0.clone(), 4805 }; 4806 return Some(expr0_0); 4807 } 4808 4809 // Generated as internal constructor for term invert_bool. 4810 pub fn constructor_invert_bool<C: Context>( 4811 ctx: &mut C, 4812 arg0: &ProducesBool, 4813 ) -> Option<ProducesBool> { 4814 let pattern0_0 = arg0; 4815 if let &ProducesBool::ProducesBool { 4816 producer: ref pattern1_0, 4817 cond: ref pattern1_1, 4818 } = pattern0_0 4819 { 4820 // Rule at src/isa/s390x/inst.isle line 2333. 4821 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4822 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4823 return Some(expr1_0); 4824 } 4825 return None; 4826 } 4827 4828 // Generated as internal constructor for term emit_producer. 4829 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4830 let pattern0_0 = arg0; 4831 if let &ProducesFlags::ProducesFlagsSideEffect { 4832 inst: ref pattern1_0, 4833 } = pattern0_0 4834 { 4835 // Rule at src/isa/s390x/inst.isle line 2342. 4836 let expr0_0 = C::emit(ctx, pattern1_0); 4837 return Some(expr0_0); 4838 } 4839 return None; 4840 } 4841 4842 // Generated as internal constructor for term emit_consumer. 4843 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4844 let pattern0_0 = arg0; 4845 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4846 inst: ref pattern1_0, 4847 result: pattern1_1, 4848 } = pattern0_0 4849 { 4850 // Rule at src/isa/s390x/inst.isle line 2344. 4851 let expr0_0 = C::emit(ctx, pattern1_0); 4852 return Some(expr0_0); 4853 } 4854 return None; 4855 } 4856 4857 // Generated as internal constructor for term select_bool_reg. 4858 pub fn constructor_select_bool_reg<C: Context>( 4859 ctx: &mut C, 4860 arg0: Type, 4861 arg1: &ProducesBool, 4862 arg2: Reg, 4863 arg3: Reg, 4864 ) -> Option<Reg> { 4865 let pattern0_0 = arg0; 4866 let pattern1_0 = arg1; 4867 if let &ProducesBool::ProducesBool { 4868 producer: ref pattern2_0, 4869 cond: ref pattern2_1, 4870 } = pattern1_0 4871 { 4872 let pattern3_0 = arg2; 4873 let pattern4_0 = arg3; 4874 // Rule at src/isa/s390x/inst.isle line 2348. 4875 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4876 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4877 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4878 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4879 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4880 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4881 return Some(expr5_0); 4882 } 4883 return None; 4884 } 4885 4886 // Generated as internal constructor for term select_bool_imm. 4887 pub fn constructor_select_bool_imm<C: Context>( 4888 ctx: &mut C, 4889 arg0: Type, 4890 arg1: &ProducesBool, 4891 arg2: i16, 4892 arg3: u64, 4893 ) -> Option<Reg> { 4894 let pattern0_0 = arg0; 4895 let pattern1_0 = arg1; 4896 if let &ProducesBool::ProducesBool { 4897 producer: ref pattern2_0, 4898 cond: ref pattern2_1, 4899 } = pattern1_0 4900 { 4901 let pattern3_0 = arg2; 4902 let pattern4_0 = arg3; 4903 // Rule at src/isa/s390x/inst.isle line 2357. 4904 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4905 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4906 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4907 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4908 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4909 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4910 return Some(expr5_0); 4911 } 4912 return None; 4913 } 4914 4915 // Generated as internal constructor for term lower_bool. 4916 pub fn constructor_lower_bool<C: Context>( 4917 ctx: &mut C, 4918 arg0: Type, 4919 arg1: &ProducesBool, 4920 ) -> Option<Reg> { 4921 let pattern0_0 = arg0; 4922 if pattern0_0 == B1 { 4923 let pattern2_0 = arg1; 4924 // Rule at src/isa/s390x/inst.isle line 2367. 4925 let expr0_0: Type = B1; 4926 let expr1_0: i16 = 1; 4927 let expr2_0: u64 = 0; 4928 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4929 return Some(expr3_0); 4930 } 4931 if pattern0_0 == B8 { 4932 let pattern2_0 = arg1; 4933 // Rule at src/isa/s390x/inst.isle line 2368. 4934 let expr0_0: Type = B8; 4935 let expr1_0: i16 = -1; 4936 let expr2_0: u64 = 0; 4937 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4938 return Some(expr3_0); 4939 } 4940 if pattern0_0 == B16 { 4941 let pattern2_0 = arg1; 4942 // Rule at src/isa/s390x/inst.isle line 2369. 4943 let expr0_0: Type = B16; 4944 let expr1_0: i16 = -1; 4945 let expr2_0: u64 = 0; 4946 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4947 return Some(expr3_0); 4948 } 4949 if pattern0_0 == B32 { 4950 let pattern2_0 = arg1; 4951 // Rule at src/isa/s390x/inst.isle line 2370. 4952 let expr0_0: Type = B32; 4953 let expr1_0: i16 = -1; 4954 let expr2_0: u64 = 0; 4955 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4956 return Some(expr3_0); 4957 } 4958 if pattern0_0 == B64 { 4959 let pattern2_0 = arg1; 4960 // Rule at src/isa/s390x/inst.isle line 2371. 4961 let expr0_0: Type = B64; 4962 let expr1_0: i16 = -1; 4963 let expr2_0: u64 = 0; 4964 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4965 return Some(expr3_0); 4966 } 4967 return None; 4968 } 4969 4970 // Generated as internal constructor for term cond_br_bool. 4971 pub fn constructor_cond_br_bool<C: Context>( 4972 ctx: &mut C, 4973 arg0: &ProducesBool, 4974 arg1: MachLabel, 4975 arg2: MachLabel, 4976 ) -> Option<SideEffectNoResult> { 4977 let pattern0_0 = arg0; 4978 if let &ProducesBool::ProducesBool { 4979 producer: ref pattern1_0, 4980 cond: ref pattern1_1, 4981 } = pattern0_0 4982 { 4983 let pattern2_0 = arg1; 4984 let pattern3_0 = arg2; 4985 // Rule at src/isa/s390x/inst.isle line 2375. 4986 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4987 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4988 return Some(expr1_0); 4989 } 4990 return None; 4991 } 4992 4993 // Generated as internal constructor for term oneway_cond_br_bool. 4994 pub fn constructor_oneway_cond_br_bool<C: Context>( 4995 ctx: &mut C, 4996 arg0: &ProducesBool, 4997 arg1: MachLabel, 4998 ) -> Option<SideEffectNoResult> { 4999 let pattern0_0 = arg0; 5000 if let &ProducesBool::ProducesBool { 5001 producer: ref pattern1_0, 5002 cond: ref pattern1_1, 5003 } = pattern0_0 5004 { 5005 let pattern2_0 = arg1; 5006 // Rule at src/isa/s390x/inst.isle line 2381. 5007 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 5008 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 5009 return Some(expr1_0); 5010 } 5011 return None; 5012 } 5013 5014 // Generated as internal constructor for term trap_if_bool. 5015 pub fn constructor_trap_if_bool<C: Context>( 5016 ctx: &mut C, 5017 arg0: &ProducesBool, 5018 arg1: &TrapCode, 5019 ) -> Option<SideEffectNoResult> { 5020 let pattern0_0 = arg0; 5021 if let &ProducesBool::ProducesBool { 5022 producer: ref pattern1_0, 5023 cond: ref pattern1_1, 5024 } = pattern0_0 5025 { 5026 let pattern2_0 = arg1; 5027 // Rule at src/isa/s390x/inst.isle line 2387. 5028 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 5029 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 5030 return Some(expr1_0); 5031 } 5032 return None; 5033 } 5034 5035 // Generated as internal constructor for term casloop_val_reg. 5036 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 5037 // Rule at src/isa/s390x/inst.isle line 2401. 5038 let expr0_0: u8 = 0; 5039 let expr1_0 = C::writable_gpr(ctx, expr0_0); 5040 return Some(expr1_0); 5041 } 5042 5043 // Generated as internal constructor for term casloop_tmp_reg. 5044 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 5045 // Rule at src/isa/s390x/inst.isle line 2405. 5046 let expr0_0: u8 = 1; 5047 let expr1_0 = C::writable_gpr(ctx, expr0_0); 5048 return Some(expr1_0); 5049 } 5050 5051 // Generated as internal constructor for term casloop_emit. 5052 pub fn constructor_casloop_emit<C: Context>( 5053 ctx: &mut C, 5054 arg0: &VecMInstBuilder, 5055 arg1: Type, 5056 arg2: MemFlags, 5057 arg3: Reg, 5058 arg4: Reg, 5059 ) -> Option<Reg> { 5060 let pattern0_0 = arg0; 5061 let pattern1_0 = arg1; 5062 let pattern2_0 = arg2; 5063 let pattern3_0 = arg3; 5064 let pattern4_0 = arg4; 5065 // Rule at src/isa/s390x/inst.isle line 2414. 5066 let expr0_0: i64 = 0; 5067 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 5068 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 5069 let expr3_0 = constructor_casloop_val_reg(ctx)?; 5070 let expr4_0 = 5071 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 5072 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 5073 let expr6_0 = constructor_casloop_val_reg(ctx)?; 5074 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 5075 let expr8_0 = IntCC::NotEqual; 5076 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 5077 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 5078 return Some(expr4_0); 5079 } 5080 5081 // Generated as internal constructor for term casloop_result. 5082 pub fn constructor_casloop_result<C: Context>( 5083 ctx: &mut C, 5084 arg0: Type, 5085 arg1: MemFlags, 5086 arg2: Reg, 5087 ) -> Option<Reg> { 5088 let pattern0_0 = arg0; 5089 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 5090 let pattern2_0 = arg1; 5091 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5092 let pattern4_0 = arg2; 5093 // Rule at src/isa/s390x/inst.isle line 2432. 5094 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 5095 return Some(expr0_0); 5096 } 5097 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5098 let pattern4_0 = arg2; 5099 // Rule at src/isa/s390x/inst.isle line 2430. 5100 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 5101 return Some(expr0_0); 5102 } 5103 } 5104 return None; 5105 } 5106 5107 // Generated as internal constructor for term casloop. 5108 pub fn constructor_casloop<C: Context>( 5109 ctx: &mut C, 5110 arg0: &VecMInstBuilder, 5111 arg1: Type, 5112 arg2: MemFlags, 5113 arg3: Reg, 5114 arg4: Reg, 5115 ) -> Option<Reg> { 5116 let pattern0_0 = arg0; 5117 let pattern1_0 = arg1; 5118 let pattern2_0 = arg2; 5119 let pattern3_0 = arg3; 5120 let pattern4_0 = arg4; 5121 // Rule at src/isa/s390x/inst.isle line 2437. 5122 let expr0_0 = constructor_casloop_emit( 5123 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 5124 )?; 5125 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 5126 return Some(expr1_0); 5127 } 5128 5129 // Generated as internal constructor for term casloop_bitshift. 5130 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 5131 let pattern0_0 = arg0; 5132 // Rule at src/isa/s390x/inst.isle line 2452. 5133 let expr0_0: Type = I32; 5134 let expr1_0: u8 = 3; 5135 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 5136 return Some(expr2_0); 5137 } 5138 5139 // Generated as internal constructor for term casloop_aligned_addr. 5140 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 5141 let pattern0_0 = arg0; 5142 // Rule at src/isa/s390x/inst.isle line 2457. 5143 let expr0_0: Type = I64; 5144 let expr1_0: u16 = 65532; 5145 let expr2_0: u8 = 0; 5146 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 5147 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 5148 return Some(expr4_0); 5149 } 5150 5151 // Generated as internal constructor for term casloop_rotate_in. 5152 pub fn constructor_casloop_rotate_in<C: Context>( 5153 ctx: &mut C, 5154 arg0: &VecMInstBuilder, 5155 arg1: Type, 5156 arg2: MemFlags, 5157 arg3: Reg, 5158 arg4: Reg, 5159 ) -> Option<Reg> { 5160 let pattern0_0 = arg0; 5161 let pattern1_0 = arg1; 5162 if pattern1_0 == I8 { 5163 let pattern3_0 = arg2; 5164 let pattern4_0 = arg3; 5165 let pattern5_0 = arg4; 5166 // Rule at src/isa/s390x/inst.isle line 2467. 5167 let expr0_0: Type = I32; 5168 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5169 let expr2_0: u8 = 0; 5170 let expr3_0 = constructor_push_rot_imm_reg( 5171 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 5172 )?; 5173 return Some(expr3_0); 5174 } 5175 if pattern1_0 == I16 { 5176 let pattern3_0 = arg2; 5177 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5178 let pattern5_0 = arg3; 5179 let pattern6_0 = arg4; 5180 // Rule at src/isa/s390x/inst.isle line 2471. 5181 let expr0_0: Type = I32; 5182 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5183 let expr2_0: u8 = 16; 5184 let expr3_0 = constructor_push_rot_imm_reg( 5185 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5186 )?; 5187 return Some(expr3_0); 5188 } 5189 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5190 let pattern5_0 = arg3; 5191 let pattern6_0 = arg4; 5192 // Rule at src/isa/s390x/inst.isle line 2469. 5193 let expr0_0: Type = I32; 5194 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5195 let expr2_0: u8 = 0; 5196 let expr3_0 = constructor_push_rot_imm_reg( 5197 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5198 )?; 5199 return Some(expr3_0); 5200 } 5201 } 5202 return None; 5203 } 5204 5205 // Generated as internal constructor for term casloop_rotate_out. 5206 pub fn constructor_casloop_rotate_out<C: Context>( 5207 ctx: &mut C, 5208 arg0: &VecMInstBuilder, 5209 arg1: Type, 5210 arg2: MemFlags, 5211 arg3: Reg, 5212 arg4: Reg, 5213 ) -> Option<Reg> { 5214 let pattern0_0 = arg0; 5215 let pattern1_0 = arg1; 5216 if pattern1_0 == I8 { 5217 let pattern3_0 = arg2; 5218 let pattern4_0 = arg3; 5219 let pattern5_0 = arg4; 5220 // Rule at src/isa/s390x/inst.isle line 2480. 5221 let expr0_0: Type = I32; 5222 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5223 let expr2_0: u8 = 0; 5224 let expr3_0: Type = I32; 5225 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5226 let expr5_0 = constructor_push_rot_imm_reg( 5227 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5228 )?; 5229 return Some(expr5_0); 5230 } 5231 if pattern1_0 == I16 { 5232 let pattern3_0 = arg2; 5233 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5234 let pattern5_0 = arg3; 5235 let pattern6_0 = arg4; 5236 // Rule at src/isa/s390x/inst.isle line 2484. 5237 let expr0_0: Type = I32; 5238 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5239 let expr2_0: u8 = 16; 5240 let expr3_0 = constructor_push_rot_imm_reg( 5241 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5242 )?; 5243 return Some(expr3_0); 5244 } 5245 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5246 let pattern5_0 = arg3; 5247 let pattern6_0 = arg4; 5248 // Rule at src/isa/s390x/inst.isle line 2482. 5249 let expr0_0: Type = I32; 5250 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5251 let expr2_0: u8 = 0; 5252 let expr3_0 = constructor_push_rot_imm_reg( 5253 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5254 )?; 5255 return Some(expr3_0); 5256 } 5257 } 5258 return None; 5259 } 5260 5261 // Generated as internal constructor for term casloop_rotate_result. 5262 pub fn constructor_casloop_rotate_result<C: Context>( 5263 ctx: &mut C, 5264 arg0: Type, 5265 arg1: MemFlags, 5266 arg2: Reg, 5267 arg3: Reg, 5268 ) -> Option<Reg> { 5269 let pattern0_0 = arg0; 5270 if pattern0_0 == I8 { 5271 let pattern2_0 = arg1; 5272 let pattern3_0 = arg2; 5273 let pattern4_0 = arg3; 5274 // Rule at src/isa/s390x/inst.isle line 2495. 5275 let expr0_0: Type = I32; 5276 let expr1_0: u8 = 8; 5277 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5278 return Some(expr2_0); 5279 } 5280 if pattern0_0 == I16 { 5281 let pattern2_0 = arg1; 5282 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5283 let pattern4_0 = arg2; 5284 let pattern5_0 = arg3; 5285 // Rule at src/isa/s390x/inst.isle line 2499. 5286 let expr0_0: Type = I32; 5287 let expr1_0: Type = I32; 5288 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5289 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5290 return Some(expr3_0); 5291 } 5292 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5293 let pattern4_0 = arg2; 5294 let pattern5_0 = arg3; 5295 // Rule at src/isa/s390x/inst.isle line 2497. 5296 let expr0_0: Type = I32; 5297 let expr1_0: u8 = 16; 5298 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5299 return Some(expr2_0); 5300 } 5301 } 5302 return None; 5303 } 5304 5305 // Generated as internal constructor for term casloop_subword. 5306 pub fn constructor_casloop_subword<C: Context>( 5307 ctx: &mut C, 5308 arg0: &VecMInstBuilder, 5309 arg1: Type, 5310 arg2: MemFlags, 5311 arg3: Reg, 5312 arg4: Reg, 5313 arg5: Reg, 5314 ) -> Option<Reg> { 5315 let pattern0_0 = arg0; 5316 let pattern1_0 = arg1; 5317 let pattern2_0 = arg2; 5318 let pattern3_0 = arg3; 5319 let pattern4_0 = arg4; 5320 let pattern5_0 = arg5; 5321 // Rule at src/isa/s390x/inst.isle line 2504. 5322 let expr0_0 = constructor_casloop_emit( 5323 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5324 )?; 5325 let expr1_0 = 5326 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5327 return Some(expr1_0); 5328 } 5329 5330 // Generated as internal constructor for term clz_reg. 5331 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5332 let pattern0_0 = arg0; 5333 if pattern0_0 == 64 { 5334 let pattern2_0 = arg1; 5335 // Rule at src/isa/s390x/inst.isle line 2515. 5336 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5337 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5338 let expr2_0 = C::emit(ctx, &expr1_0); 5339 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5340 return Some(expr3_0); 5341 } 5342 let pattern1_0 = arg1; 5343 // Rule at src/isa/s390x/inst.isle line 2524. 5344 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5345 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5346 let expr2_0 = C::emit(ctx, &expr1_0); 5347 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5348 let expr4_0 = IntCC::Equal; 5349 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5350 let expr6_0 = MInst::CMov64SImm16 { 5351 rd: expr3_0, 5352 cond: expr5_0, 5353 imm: pattern0_0, 5354 }; 5355 let expr7_0 = C::emit(ctx, &expr6_0); 5356 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5357 return Some(expr8_0); 5358 } 5359 5360 // Generated as internal constructor for term aluop_add. 5361 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5362 let pattern0_0 = arg0; 5363 if pattern0_0 == I8 { 5364 // Rule at src/isa/s390x/inst.isle line 2535. 5365 let expr0_0 = ALUOp::Add32; 5366 return Some(expr0_0); 5367 } 5368 if pattern0_0 == I16 { 5369 // Rule at src/isa/s390x/inst.isle line 2536. 5370 let expr0_0 = ALUOp::Add32; 5371 return Some(expr0_0); 5372 } 5373 if pattern0_0 == I32 { 5374 // Rule at src/isa/s390x/inst.isle line 2537. 5375 let expr0_0 = ALUOp::Add32; 5376 return Some(expr0_0); 5377 } 5378 if pattern0_0 == I64 { 5379 // Rule at src/isa/s390x/inst.isle line 2538. 5380 let expr0_0 = ALUOp::Add64; 5381 return Some(expr0_0); 5382 } 5383 return None; 5384 } 5385 5386 // Generated as internal constructor for term aluop_add_sext16. 5387 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5388 let pattern0_0 = arg0; 5389 if pattern0_0 == I16 { 5390 // Rule at src/isa/s390x/inst.isle line 2541. 5391 let expr0_0 = ALUOp::Add32Ext16; 5392 return Some(expr0_0); 5393 } 5394 if pattern0_0 == I32 { 5395 // Rule at src/isa/s390x/inst.isle line 2542. 5396 let expr0_0 = ALUOp::Add32Ext16; 5397 return Some(expr0_0); 5398 } 5399 if pattern0_0 == I64 { 5400 // Rule at src/isa/s390x/inst.isle line 2543. 5401 let expr0_0 = ALUOp::Add64Ext16; 5402 return Some(expr0_0); 5403 } 5404 return None; 5405 } 5406 5407 // Generated as internal constructor for term aluop_add_sext32. 5408 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5409 let pattern0_0 = arg0; 5410 if pattern0_0 == I64 { 5411 // Rule at src/isa/s390x/inst.isle line 2546. 5412 let expr0_0 = ALUOp::Add64Ext32; 5413 return Some(expr0_0); 5414 } 5415 return None; 5416 } 5417 5418 // Generated as internal constructor for term add_reg. 5419 pub fn constructor_add_reg<C: Context>( 5420 ctx: &mut C, 5421 arg0: Type, 5422 arg1: Reg, 5423 arg2: Reg, 5424 ) -> Option<Reg> { 5425 let pattern0_0 = arg0; 5426 let pattern1_0 = arg1; 5427 let pattern2_0 = arg2; 5428 // Rule at src/isa/s390x/inst.isle line 2549. 5429 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5430 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5431 return Some(expr1_0); 5432 } 5433 5434 // Generated as internal constructor for term add_reg_sext32. 5435 pub fn constructor_add_reg_sext32<C: Context>( 5436 ctx: &mut C, 5437 arg0: Type, 5438 arg1: Reg, 5439 arg2: Reg, 5440 ) -> Option<Reg> { 5441 let pattern0_0 = arg0; 5442 let pattern1_0 = arg1; 5443 let pattern2_0 = arg2; 5444 // Rule at src/isa/s390x/inst.isle line 2552. 5445 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5446 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5447 return Some(expr1_0); 5448 } 5449 5450 // Generated as internal constructor for term add_simm16. 5451 pub fn constructor_add_simm16<C: Context>( 5452 ctx: &mut C, 5453 arg0: Type, 5454 arg1: Reg, 5455 arg2: i16, 5456 ) -> Option<Reg> { 5457 let pattern0_0 = arg0; 5458 let pattern1_0 = arg1; 5459 let pattern2_0 = arg2; 5460 // Rule at src/isa/s390x/inst.isle line 2555. 5461 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5462 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5463 return Some(expr1_0); 5464 } 5465 5466 // Generated as internal constructor for term add_simm32. 5467 pub fn constructor_add_simm32<C: Context>( 5468 ctx: &mut C, 5469 arg0: Type, 5470 arg1: Reg, 5471 arg2: i32, 5472 ) -> Option<Reg> { 5473 let pattern0_0 = arg0; 5474 let pattern1_0 = arg1; 5475 let pattern2_0 = arg2; 5476 // Rule at src/isa/s390x/inst.isle line 2558. 5477 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5478 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5479 return Some(expr1_0); 5480 } 5481 5482 // Generated as internal constructor for term add_mem. 5483 pub fn constructor_add_mem<C: Context>( 5484 ctx: &mut C, 5485 arg0: Type, 5486 arg1: Reg, 5487 arg2: &MemArg, 5488 ) -> Option<Reg> { 5489 let pattern0_0 = arg0; 5490 let pattern1_0 = arg1; 5491 let pattern2_0 = arg2; 5492 // Rule at src/isa/s390x/inst.isle line 2561. 5493 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5494 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5495 return Some(expr1_0); 5496 } 5497 5498 // Generated as internal constructor for term add_mem_sext16. 5499 pub fn constructor_add_mem_sext16<C: Context>( 5500 ctx: &mut C, 5501 arg0: Type, 5502 arg1: Reg, 5503 arg2: &MemArg, 5504 ) -> Option<Reg> { 5505 let pattern0_0 = arg0; 5506 let pattern1_0 = arg1; 5507 let pattern2_0 = arg2; 5508 // Rule at src/isa/s390x/inst.isle line 2564. 5509 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5510 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5511 return Some(expr1_0); 5512 } 5513 5514 // Generated as internal constructor for term add_mem_sext32. 5515 pub fn constructor_add_mem_sext32<C: Context>( 5516 ctx: &mut C, 5517 arg0: Type, 5518 arg1: Reg, 5519 arg2: &MemArg, 5520 ) -> Option<Reg> { 5521 let pattern0_0 = arg0; 5522 let pattern1_0 = arg1; 5523 let pattern2_0 = arg2; 5524 // Rule at src/isa/s390x/inst.isle line 2567. 5525 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5526 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5527 return Some(expr1_0); 5528 } 5529 5530 // Generated as internal constructor for term aluop_add_logical. 5531 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5532 let pattern0_0 = arg0; 5533 if pattern0_0 == I32 { 5534 // Rule at src/isa/s390x/inst.isle line 2573. 5535 let expr0_0 = ALUOp::AddLogical32; 5536 return Some(expr0_0); 5537 } 5538 if pattern0_0 == I64 { 5539 // Rule at src/isa/s390x/inst.isle line 2574. 5540 let expr0_0 = ALUOp::AddLogical64; 5541 return Some(expr0_0); 5542 } 5543 return None; 5544 } 5545 5546 // Generated as internal constructor for term aluop_add_logical_zext32. 5547 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5548 let pattern0_0 = arg0; 5549 if pattern0_0 == I64 { 5550 // Rule at src/isa/s390x/inst.isle line 2577. 5551 let expr0_0 = ALUOp::AddLogical64Ext32; 5552 return Some(expr0_0); 5553 } 5554 return None; 5555 } 5556 5557 // Generated as internal constructor for term add_logical_reg. 5558 pub fn constructor_add_logical_reg<C: Context>( 5559 ctx: &mut C, 5560 arg0: Type, 5561 arg1: Reg, 5562 arg2: Reg, 5563 ) -> Option<Reg> { 5564 let pattern0_0 = arg0; 5565 let pattern1_0 = arg1; 5566 let pattern2_0 = arg2; 5567 // Rule at src/isa/s390x/inst.isle line 2580. 5568 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5569 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5570 return Some(expr1_0); 5571 } 5572 5573 // Generated as internal constructor for term add_logical_reg_zext32. 5574 pub fn constructor_add_logical_reg_zext32<C: Context>( 5575 ctx: &mut C, 5576 arg0: Type, 5577 arg1: Reg, 5578 arg2: Reg, 5579 ) -> Option<Reg> { 5580 let pattern0_0 = arg0; 5581 let pattern1_0 = arg1; 5582 let pattern2_0 = arg2; 5583 // Rule at src/isa/s390x/inst.isle line 2583. 5584 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5585 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5586 return Some(expr1_0); 5587 } 5588 5589 // Generated as internal constructor for term add_logical_zimm32. 5590 pub fn constructor_add_logical_zimm32<C: Context>( 5591 ctx: &mut C, 5592 arg0: Type, 5593 arg1: Reg, 5594 arg2: u32, 5595 ) -> Option<Reg> { 5596 let pattern0_0 = arg0; 5597 let pattern1_0 = arg1; 5598 let pattern2_0 = arg2; 5599 // Rule at src/isa/s390x/inst.isle line 2586. 5600 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5601 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5602 return Some(expr1_0); 5603 } 5604 5605 // Generated as internal constructor for term add_logical_mem. 5606 pub fn constructor_add_logical_mem<C: Context>( 5607 ctx: &mut C, 5608 arg0: Type, 5609 arg1: Reg, 5610 arg2: &MemArg, 5611 ) -> Option<Reg> { 5612 let pattern0_0 = arg0; 5613 let pattern1_0 = arg1; 5614 let pattern2_0 = arg2; 5615 // Rule at src/isa/s390x/inst.isle line 2589. 5616 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5617 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5618 return Some(expr1_0); 5619 } 5620 5621 // Generated as internal constructor for term add_logical_mem_zext32. 5622 pub fn constructor_add_logical_mem_zext32<C: Context>( 5623 ctx: &mut C, 5624 arg0: Type, 5625 arg1: Reg, 5626 arg2: &MemArg, 5627 ) -> Option<Reg> { 5628 let pattern0_0 = arg0; 5629 let pattern1_0 = arg1; 5630 let pattern2_0 = arg2; 5631 // Rule at src/isa/s390x/inst.isle line 2592. 5632 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5633 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5634 return Some(expr1_0); 5635 } 5636 5637 // Generated as internal constructor for term aluop_sub. 5638 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5639 let pattern0_0 = arg0; 5640 if pattern0_0 == I8 { 5641 // Rule at src/isa/s390x/inst.isle line 2598. 5642 let expr0_0 = ALUOp::Sub32; 5643 return Some(expr0_0); 5644 } 5645 if pattern0_0 == I16 { 5646 // Rule at src/isa/s390x/inst.isle line 2599. 5647 let expr0_0 = ALUOp::Sub32; 5648 return Some(expr0_0); 5649 } 5650 if pattern0_0 == I32 { 5651 // Rule at src/isa/s390x/inst.isle line 2600. 5652 let expr0_0 = ALUOp::Sub32; 5653 return Some(expr0_0); 5654 } 5655 if pattern0_0 == I64 { 5656 // Rule at src/isa/s390x/inst.isle line 2601. 5657 let expr0_0 = ALUOp::Sub64; 5658 return Some(expr0_0); 5659 } 5660 return None; 5661 } 5662 5663 // Generated as internal constructor for term aluop_sub_sext16. 5664 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5665 let pattern0_0 = arg0; 5666 if pattern0_0 == I16 { 5667 // Rule at src/isa/s390x/inst.isle line 2604. 5668 let expr0_0 = ALUOp::Sub32Ext16; 5669 return Some(expr0_0); 5670 } 5671 if pattern0_0 == I32 { 5672 // Rule at src/isa/s390x/inst.isle line 2605. 5673 let expr0_0 = ALUOp::Sub32Ext16; 5674 return Some(expr0_0); 5675 } 5676 if pattern0_0 == I64 { 5677 // Rule at src/isa/s390x/inst.isle line 2606. 5678 let expr0_0 = ALUOp::Sub64Ext16; 5679 return Some(expr0_0); 5680 } 5681 return None; 5682 } 5683 5684 // Generated as internal constructor for term aluop_sub_sext32. 5685 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5686 let pattern0_0 = arg0; 5687 if pattern0_0 == I64 { 5688 // Rule at src/isa/s390x/inst.isle line 2609. 5689 let expr0_0 = ALUOp::Sub64Ext32; 5690 return Some(expr0_0); 5691 } 5692 return None; 5693 } 5694 5695 // Generated as internal constructor for term sub_reg. 5696 pub fn constructor_sub_reg<C: Context>( 5697 ctx: &mut C, 5698 arg0: Type, 5699 arg1: Reg, 5700 arg2: Reg, 5701 ) -> Option<Reg> { 5702 let pattern0_0 = arg0; 5703 let pattern1_0 = arg1; 5704 let pattern2_0 = arg2; 5705 // Rule at src/isa/s390x/inst.isle line 2612. 5706 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5707 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5708 return Some(expr1_0); 5709 } 5710 5711 // Generated as internal constructor for term sub_reg_sext32. 5712 pub fn constructor_sub_reg_sext32<C: Context>( 5713 ctx: &mut C, 5714 arg0: Type, 5715 arg1: Reg, 5716 arg2: Reg, 5717 ) -> Option<Reg> { 5718 let pattern0_0 = arg0; 5719 let pattern1_0 = arg1; 5720 let pattern2_0 = arg2; 5721 // Rule at src/isa/s390x/inst.isle line 2615. 5722 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5723 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5724 return Some(expr1_0); 5725 } 5726 5727 // Generated as internal constructor for term sub_mem. 5728 pub fn constructor_sub_mem<C: Context>( 5729 ctx: &mut C, 5730 arg0: Type, 5731 arg1: Reg, 5732 arg2: &MemArg, 5733 ) -> Option<Reg> { 5734 let pattern0_0 = arg0; 5735 let pattern1_0 = arg1; 5736 let pattern2_0 = arg2; 5737 // Rule at src/isa/s390x/inst.isle line 2618. 5738 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5739 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5740 return Some(expr1_0); 5741 } 5742 5743 // Generated as internal constructor for term sub_mem_sext16. 5744 pub fn constructor_sub_mem_sext16<C: Context>( 5745 ctx: &mut C, 5746 arg0: Type, 5747 arg1: Reg, 5748 arg2: &MemArg, 5749 ) -> Option<Reg> { 5750 let pattern0_0 = arg0; 5751 let pattern1_0 = arg1; 5752 let pattern2_0 = arg2; 5753 // Rule at src/isa/s390x/inst.isle line 2621. 5754 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5755 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5756 return Some(expr1_0); 5757 } 5758 5759 // Generated as internal constructor for term sub_mem_sext32. 5760 pub fn constructor_sub_mem_sext32<C: Context>( 5761 ctx: &mut C, 5762 arg0: Type, 5763 arg1: Reg, 5764 arg2: &MemArg, 5765 ) -> Option<Reg> { 5766 let pattern0_0 = arg0; 5767 let pattern1_0 = arg1; 5768 let pattern2_0 = arg2; 5769 // Rule at src/isa/s390x/inst.isle line 2624. 5770 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5771 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5772 return Some(expr1_0); 5773 } 5774 5775 // Generated as internal constructor for term aluop_sub_logical. 5776 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5777 let pattern0_0 = arg0; 5778 if pattern0_0 == I32 { 5779 // Rule at src/isa/s390x/inst.isle line 2630. 5780 let expr0_0 = ALUOp::SubLogical32; 5781 return Some(expr0_0); 5782 } 5783 if pattern0_0 == I64 { 5784 // Rule at src/isa/s390x/inst.isle line 2631. 5785 let expr0_0 = ALUOp::SubLogical64; 5786 return Some(expr0_0); 5787 } 5788 return None; 5789 } 5790 5791 // Generated as internal constructor for term aluop_sub_logical_zext32. 5792 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5793 let pattern0_0 = arg0; 5794 if pattern0_0 == I64 { 5795 // Rule at src/isa/s390x/inst.isle line 2634. 5796 let expr0_0 = ALUOp::SubLogical64Ext32; 5797 return Some(expr0_0); 5798 } 5799 return None; 5800 } 5801 5802 // Generated as internal constructor for term sub_logical_reg. 5803 pub fn constructor_sub_logical_reg<C: Context>( 5804 ctx: &mut C, 5805 arg0: Type, 5806 arg1: Reg, 5807 arg2: Reg, 5808 ) -> Option<Reg> { 5809 let pattern0_0 = arg0; 5810 let pattern1_0 = arg1; 5811 let pattern2_0 = arg2; 5812 // Rule at src/isa/s390x/inst.isle line 2637. 5813 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5814 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5815 return Some(expr1_0); 5816 } 5817 5818 // Generated as internal constructor for term sub_logical_reg_zext32. 5819 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5820 ctx: &mut C, 5821 arg0: Type, 5822 arg1: Reg, 5823 arg2: Reg, 5824 ) -> Option<Reg> { 5825 let pattern0_0 = arg0; 5826 let pattern1_0 = arg1; 5827 let pattern2_0 = arg2; 5828 // Rule at src/isa/s390x/inst.isle line 2640. 5829 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5830 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5831 return Some(expr1_0); 5832 } 5833 5834 // Generated as internal constructor for term sub_logical_zimm32. 5835 pub fn constructor_sub_logical_zimm32<C: Context>( 5836 ctx: &mut C, 5837 arg0: Type, 5838 arg1: Reg, 5839 arg2: u32, 5840 ) -> Option<Reg> { 5841 let pattern0_0 = arg0; 5842 let pattern1_0 = arg1; 5843 let pattern2_0 = arg2; 5844 // Rule at src/isa/s390x/inst.isle line 2643. 5845 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5846 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5847 return Some(expr1_0); 5848 } 5849 5850 // Generated as internal constructor for term sub_logical_mem. 5851 pub fn constructor_sub_logical_mem<C: Context>( 5852 ctx: &mut C, 5853 arg0: Type, 5854 arg1: Reg, 5855 arg2: &MemArg, 5856 ) -> Option<Reg> { 5857 let pattern0_0 = arg0; 5858 let pattern1_0 = arg1; 5859 let pattern2_0 = arg2; 5860 // Rule at src/isa/s390x/inst.isle line 2646. 5861 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5862 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5863 return Some(expr1_0); 5864 } 5865 5866 // Generated as internal constructor for term sub_logical_mem_zext32. 5867 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5868 ctx: &mut C, 5869 arg0: Type, 5870 arg1: Reg, 5871 arg2: &MemArg, 5872 ) -> Option<Reg> { 5873 let pattern0_0 = arg0; 5874 let pattern1_0 = arg1; 5875 let pattern2_0 = arg2; 5876 // Rule at src/isa/s390x/inst.isle line 2649. 5877 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5878 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5879 return Some(expr1_0); 5880 } 5881 5882 // Generated as internal constructor for term aluop_mul. 5883 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5884 let pattern0_0 = arg0; 5885 if pattern0_0 == I8 { 5886 // Rule at src/isa/s390x/inst.isle line 2655. 5887 let expr0_0 = ALUOp::Mul32; 5888 return Some(expr0_0); 5889 } 5890 if pattern0_0 == I16 { 5891 // Rule at src/isa/s390x/inst.isle line 2656. 5892 let expr0_0 = ALUOp::Mul32; 5893 return Some(expr0_0); 5894 } 5895 if pattern0_0 == I32 { 5896 // Rule at src/isa/s390x/inst.isle line 2657. 5897 let expr0_0 = ALUOp::Mul32; 5898 return Some(expr0_0); 5899 } 5900 if pattern0_0 == I64 { 5901 // Rule at src/isa/s390x/inst.isle line 2658. 5902 let expr0_0 = ALUOp::Mul64; 5903 return Some(expr0_0); 5904 } 5905 return None; 5906 } 5907 5908 // Generated as internal constructor for term aluop_mul_sext16. 5909 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5910 let pattern0_0 = arg0; 5911 if pattern0_0 == I16 { 5912 // Rule at src/isa/s390x/inst.isle line 2661. 5913 let expr0_0 = ALUOp::Mul32Ext16; 5914 return Some(expr0_0); 5915 } 5916 if pattern0_0 == I32 { 5917 // Rule at src/isa/s390x/inst.isle line 2662. 5918 let expr0_0 = ALUOp::Mul32Ext16; 5919 return Some(expr0_0); 5920 } 5921 if pattern0_0 == I64 { 5922 // Rule at src/isa/s390x/inst.isle line 2663. 5923 let expr0_0 = ALUOp::Mul64Ext16; 5924 return Some(expr0_0); 5925 } 5926 return None; 5927 } 5928 5929 // Generated as internal constructor for term aluop_mul_sext32. 5930 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5931 let pattern0_0 = arg0; 5932 if pattern0_0 == I64 { 5933 // Rule at src/isa/s390x/inst.isle line 2666. 5934 let expr0_0 = ALUOp::Mul64Ext32; 5935 return Some(expr0_0); 5936 } 5937 return None; 5938 } 5939 5940 // Generated as internal constructor for term mul_reg. 5941 pub fn constructor_mul_reg<C: Context>( 5942 ctx: &mut C, 5943 arg0: Type, 5944 arg1: Reg, 5945 arg2: Reg, 5946 ) -> Option<Reg> { 5947 let pattern0_0 = arg0; 5948 let pattern1_0 = arg1; 5949 let pattern2_0 = arg2; 5950 // Rule at src/isa/s390x/inst.isle line 2669. 5951 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5952 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5953 return Some(expr1_0); 5954 } 5955 5956 // Generated as internal constructor for term mul_reg_sext32. 5957 pub fn constructor_mul_reg_sext32<C: Context>( 5958 ctx: &mut C, 5959 arg0: Type, 5960 arg1: Reg, 5961 arg2: Reg, 5962 ) -> Option<Reg> { 5963 let pattern0_0 = arg0; 5964 let pattern1_0 = arg1; 5965 let pattern2_0 = arg2; 5966 // Rule at src/isa/s390x/inst.isle line 2672. 5967 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5968 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5969 return Some(expr1_0); 5970 } 5971 5972 // Generated as internal constructor for term mul_simm16. 5973 pub fn constructor_mul_simm16<C: Context>( 5974 ctx: &mut C, 5975 arg0: Type, 5976 arg1: Reg, 5977 arg2: i16, 5978 ) -> Option<Reg> { 5979 let pattern0_0 = arg0; 5980 let pattern1_0 = arg1; 5981 let pattern2_0 = arg2; 5982 // Rule at src/isa/s390x/inst.isle line 2675. 5983 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5984 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5985 return Some(expr1_0); 5986 } 5987 5988 // Generated as internal constructor for term mul_simm32. 5989 pub fn constructor_mul_simm32<C: Context>( 5990 ctx: &mut C, 5991 arg0: Type, 5992 arg1: Reg, 5993 arg2: i32, 5994 ) -> Option<Reg> { 5995 let pattern0_0 = arg0; 5996 let pattern1_0 = arg1; 5997 let pattern2_0 = arg2; 5998 // Rule at src/isa/s390x/inst.isle line 2678. 5999 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 6000 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6001 return Some(expr1_0); 6002 } 6003 6004 // Generated as internal constructor for term mul_mem. 6005 pub fn constructor_mul_mem<C: Context>( 6006 ctx: &mut C, 6007 arg0: Type, 6008 arg1: Reg, 6009 arg2: &MemArg, 6010 ) -> Option<Reg> { 6011 let pattern0_0 = arg0; 6012 let pattern1_0 = arg1; 6013 let pattern2_0 = arg2; 6014 // Rule at src/isa/s390x/inst.isle line 2681. 6015 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 6016 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6017 return Some(expr1_0); 6018 } 6019 6020 // Generated as internal constructor for term mul_mem_sext16. 6021 pub fn constructor_mul_mem_sext16<C: Context>( 6022 ctx: &mut C, 6023 arg0: Type, 6024 arg1: Reg, 6025 arg2: &MemArg, 6026 ) -> Option<Reg> { 6027 let pattern0_0 = arg0; 6028 let pattern1_0 = arg1; 6029 let pattern2_0 = arg2; 6030 // Rule at src/isa/s390x/inst.isle line 2684. 6031 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 6032 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6033 return Some(expr1_0); 6034 } 6035 6036 // Generated as internal constructor for term mul_mem_sext32. 6037 pub fn constructor_mul_mem_sext32<C: Context>( 6038 ctx: &mut C, 6039 arg0: Type, 6040 arg1: Reg, 6041 arg2: &MemArg, 6042 ) -> Option<Reg> { 6043 let pattern0_0 = arg0; 6044 let pattern1_0 = arg1; 6045 let pattern2_0 = arg2; 6046 // Rule at src/isa/s390x/inst.isle line 2687. 6047 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 6048 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6049 return Some(expr1_0); 6050 } 6051 6052 // Generated as internal constructor for term udivmod. 6053 pub fn constructor_udivmod<C: Context>( 6054 ctx: &mut C, 6055 arg0: Type, 6056 arg1: &RegPair, 6057 arg2: Reg, 6058 ) -> Option<RegPair> { 6059 let pattern0_0 = arg0; 6060 if pattern0_0 == I32 { 6061 let pattern2_0 = arg1; 6062 let pattern3_0 = arg2; 6063 // Rule at src/isa/s390x/inst.isle line 2693. 6064 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 6065 return Some(expr0_0); 6066 } 6067 if pattern0_0 == I64 { 6068 let pattern2_0 = arg1; 6069 let pattern3_0 = arg2; 6070 // Rule at src/isa/s390x/inst.isle line 2694. 6071 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 6072 return Some(expr0_0); 6073 } 6074 return None; 6075 } 6076 6077 // Generated as internal constructor for term sdivmod. 6078 pub fn constructor_sdivmod<C: Context>( 6079 ctx: &mut C, 6080 arg0: Type, 6081 arg1: &RegPair, 6082 arg2: Reg, 6083 ) -> Option<RegPair> { 6084 let pattern0_0 = arg0; 6085 if pattern0_0 == I32 { 6086 let pattern2_0 = arg1; 6087 let pattern3_0 = arg2; 6088 // Rule at src/isa/s390x/inst.isle line 2700. 6089 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 6090 return Some(expr0_0); 6091 } 6092 if pattern0_0 == I64 { 6093 let pattern2_0 = arg1; 6094 let pattern3_0 = arg2; 6095 // Rule at src/isa/s390x/inst.isle line 2701. 6096 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 6097 return Some(expr0_0); 6098 } 6099 return None; 6100 } 6101 6102 // Generated as internal constructor for term aluop_and. 6103 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6104 let pattern0_0 = arg0; 6105 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6106 // Rule at src/isa/s390x/inst.isle line 2707. 6107 let expr0_0 = ALUOp::And32; 6108 return Some(expr0_0); 6109 } 6110 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6111 // Rule at src/isa/s390x/inst.isle line 2708. 6112 let expr0_0 = ALUOp::And64; 6113 return Some(expr0_0); 6114 } 6115 return None; 6116 } 6117 6118 // Generated as internal constructor for term and_reg. 6119 pub fn constructor_and_reg<C: Context>( 6120 ctx: &mut C, 6121 arg0: Type, 6122 arg1: Reg, 6123 arg2: Reg, 6124 ) -> Option<Reg> { 6125 let pattern0_0 = arg0; 6126 let pattern1_0 = arg1; 6127 let pattern2_0 = arg2; 6128 // Rule at src/isa/s390x/inst.isle line 2711. 6129 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6130 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6131 return Some(expr1_0); 6132 } 6133 6134 // Generated as internal constructor for term and_uimm16shifted. 6135 pub fn constructor_and_uimm16shifted<C: Context>( 6136 ctx: &mut C, 6137 arg0: Type, 6138 arg1: Reg, 6139 arg2: UImm16Shifted, 6140 ) -> Option<Reg> { 6141 let pattern0_0 = arg0; 6142 let pattern1_0 = arg1; 6143 let pattern2_0 = arg2; 6144 // Rule at src/isa/s390x/inst.isle line 2714. 6145 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6146 let expr1_0 = 6147 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6148 return Some(expr1_0); 6149 } 6150 6151 // Generated as internal constructor for term and_uimm32shifted. 6152 pub fn constructor_and_uimm32shifted<C: Context>( 6153 ctx: &mut C, 6154 arg0: Type, 6155 arg1: Reg, 6156 arg2: UImm32Shifted, 6157 ) -> Option<Reg> { 6158 let pattern0_0 = arg0; 6159 let pattern1_0 = arg1; 6160 let pattern2_0 = arg2; 6161 // Rule at src/isa/s390x/inst.isle line 2717. 6162 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6163 let expr1_0 = 6164 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6165 return Some(expr1_0); 6166 } 6167 6168 // Generated as internal constructor for term and_mem. 6169 pub fn constructor_and_mem<C: Context>( 6170 ctx: &mut C, 6171 arg0: Type, 6172 arg1: Reg, 6173 arg2: &MemArg, 6174 ) -> Option<Reg> { 6175 let pattern0_0 = arg0; 6176 let pattern1_0 = arg1; 6177 let pattern2_0 = arg2; 6178 // Rule at src/isa/s390x/inst.isle line 2720. 6179 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6180 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6181 return Some(expr1_0); 6182 } 6183 6184 // Generated as internal constructor for term aluop_or. 6185 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6186 let pattern0_0 = arg0; 6187 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6188 // Rule at src/isa/s390x/inst.isle line 2726. 6189 let expr0_0 = ALUOp::Orr32; 6190 return Some(expr0_0); 6191 } 6192 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6193 // Rule at src/isa/s390x/inst.isle line 2727. 6194 let expr0_0 = ALUOp::Orr64; 6195 return Some(expr0_0); 6196 } 6197 return None; 6198 } 6199 6200 // Generated as internal constructor for term or_reg. 6201 pub fn constructor_or_reg<C: Context>( 6202 ctx: &mut C, 6203 arg0: Type, 6204 arg1: Reg, 6205 arg2: Reg, 6206 ) -> Option<Reg> { 6207 let pattern0_0 = arg0; 6208 let pattern1_0 = arg1; 6209 let pattern2_0 = arg2; 6210 // Rule at src/isa/s390x/inst.isle line 2730. 6211 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6212 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6213 return Some(expr1_0); 6214 } 6215 6216 // Generated as internal constructor for term or_uimm16shifted. 6217 pub fn constructor_or_uimm16shifted<C: Context>( 6218 ctx: &mut C, 6219 arg0: Type, 6220 arg1: Reg, 6221 arg2: UImm16Shifted, 6222 ) -> Option<Reg> { 6223 let pattern0_0 = arg0; 6224 let pattern1_0 = arg1; 6225 let pattern2_0 = arg2; 6226 // Rule at src/isa/s390x/inst.isle line 2733. 6227 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6228 let expr1_0 = 6229 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6230 return Some(expr1_0); 6231 } 6232 6233 // Generated as internal constructor for term or_uimm32shifted. 6234 pub fn constructor_or_uimm32shifted<C: Context>( 6235 ctx: &mut C, 6236 arg0: Type, 6237 arg1: Reg, 6238 arg2: UImm32Shifted, 6239 ) -> Option<Reg> { 6240 let pattern0_0 = arg0; 6241 let pattern1_0 = arg1; 6242 let pattern2_0 = arg2; 6243 // Rule at src/isa/s390x/inst.isle line 2736. 6244 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6245 let expr1_0 = 6246 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6247 return Some(expr1_0); 6248 } 6249 6250 // Generated as internal constructor for term or_mem. 6251 pub fn constructor_or_mem<C: Context>( 6252 ctx: &mut C, 6253 arg0: Type, 6254 arg1: Reg, 6255 arg2: &MemArg, 6256 ) -> Option<Reg> { 6257 let pattern0_0 = arg0; 6258 let pattern1_0 = arg1; 6259 let pattern2_0 = arg2; 6260 // Rule at src/isa/s390x/inst.isle line 2739. 6261 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6262 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6263 return Some(expr1_0); 6264 } 6265 6266 // Generated as internal constructor for term aluop_xor. 6267 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6268 let pattern0_0 = arg0; 6269 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6270 // Rule at src/isa/s390x/inst.isle line 2745. 6271 let expr0_0 = ALUOp::Xor32; 6272 return Some(expr0_0); 6273 } 6274 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6275 // Rule at src/isa/s390x/inst.isle line 2746. 6276 let expr0_0 = ALUOp::Xor64; 6277 return Some(expr0_0); 6278 } 6279 return None; 6280 } 6281 6282 // Generated as internal constructor for term xor_reg. 6283 pub fn constructor_xor_reg<C: Context>( 6284 ctx: &mut C, 6285 arg0: Type, 6286 arg1: Reg, 6287 arg2: Reg, 6288 ) -> Option<Reg> { 6289 let pattern0_0 = arg0; 6290 let pattern1_0 = arg1; 6291 let pattern2_0 = arg2; 6292 // Rule at src/isa/s390x/inst.isle line 2749. 6293 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6294 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6295 return Some(expr1_0); 6296 } 6297 6298 // Generated as internal constructor for term xor_uimm32shifted. 6299 pub fn constructor_xor_uimm32shifted<C: Context>( 6300 ctx: &mut C, 6301 arg0: Type, 6302 arg1: Reg, 6303 arg2: UImm32Shifted, 6304 ) -> Option<Reg> { 6305 let pattern0_0 = arg0; 6306 let pattern1_0 = arg1; 6307 let pattern2_0 = arg2; 6308 // Rule at src/isa/s390x/inst.isle line 2752. 6309 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6310 let expr1_0 = 6311 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6312 return Some(expr1_0); 6313 } 6314 6315 // Generated as internal constructor for term xor_mem. 6316 pub fn constructor_xor_mem<C: Context>( 6317 ctx: &mut C, 6318 arg0: Type, 6319 arg1: Reg, 6320 arg2: &MemArg, 6321 ) -> Option<Reg> { 6322 let pattern0_0 = arg0; 6323 let pattern1_0 = arg1; 6324 let pattern2_0 = arg2; 6325 // Rule at src/isa/s390x/inst.isle line 2755. 6326 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6327 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6328 return Some(expr1_0); 6329 } 6330 6331 // Generated as internal constructor for term push_xor_uimm32shifted. 6332 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6333 ctx: &mut C, 6334 arg0: &VecMInstBuilder, 6335 arg1: Type, 6336 arg2: WritableReg, 6337 arg3: Reg, 6338 arg4: UImm32Shifted, 6339 ) -> Option<Reg> { 6340 let pattern0_0 = arg0; 6341 let pattern1_0 = arg1; 6342 let pattern2_0 = arg2; 6343 let pattern3_0 = arg3; 6344 let pattern4_0 = arg4; 6345 // Rule at src/isa/s390x/inst.isle line 2758. 6346 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6347 let expr1_0 = constructor_push_alu_uimm32shifted( 6348 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6349 )?; 6350 return Some(expr1_0); 6351 } 6352 6353 // Generated as internal constructor for term not_reg. 6354 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6355 let pattern0_0 = arg0; 6356 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6357 let pattern2_0 = arg1; 6358 // Rule at src/isa/s390x/inst.isle line 2764. 6359 let expr0_0: u32 = 4294967295; 6360 let expr1_0: u8 = 0; 6361 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6362 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6363 return Some(expr3_0); 6364 } 6365 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6366 let pattern2_0 = arg1; 6367 // Rule at src/isa/s390x/inst.isle line 2766. 6368 let expr0_0: u32 = 4294967295; 6369 let expr1_0: u8 = 0; 6370 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6371 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6372 let expr4_0: u32 = 4294967295; 6373 let expr5_0: u8 = 32; 6374 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6375 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6376 return Some(expr7_0); 6377 } 6378 return None; 6379 } 6380 6381 // Generated as internal constructor for term push_not_reg. 6382 pub fn constructor_push_not_reg<C: Context>( 6383 ctx: &mut C, 6384 arg0: &VecMInstBuilder, 6385 arg1: Type, 6386 arg2: WritableReg, 6387 arg3: Reg, 6388 ) -> Option<Reg> { 6389 let pattern0_0 = arg0; 6390 let pattern1_0 = arg1; 6391 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6392 let pattern3_0 = arg2; 6393 let pattern4_0 = arg3; 6394 // Rule at src/isa/s390x/inst.isle line 2772. 6395 let expr0_0: u32 = 4294967295; 6396 let expr1_0: u8 = 0; 6397 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6398 let expr3_0 = constructor_push_xor_uimm32shifted( 6399 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6400 )?; 6401 return Some(expr3_0); 6402 } 6403 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6404 let pattern3_0 = arg2; 6405 let pattern4_0 = arg3; 6406 // Rule at src/isa/s390x/inst.isle line 2774. 6407 let expr0_0: u32 = 4294967295; 6408 let expr1_0: u8 = 0; 6409 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6410 let expr3_0 = constructor_push_xor_uimm32shifted( 6411 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6412 )?; 6413 let expr4_0: u32 = 4294967295; 6414 let expr5_0: u8 = 32; 6415 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6416 let expr7_0 = constructor_push_xor_uimm32shifted( 6417 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6418 )?; 6419 return Some(expr7_0); 6420 } 6421 return None; 6422 } 6423 6424 // Generated as internal constructor for term aluop_and_not. 6425 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6426 let pattern0_0 = arg0; 6427 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6428 // Rule at src/isa/s390x/inst.isle line 2782. 6429 let expr0_0 = ALUOp::AndNot32; 6430 return Some(expr0_0); 6431 } 6432 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6433 // Rule at src/isa/s390x/inst.isle line 2783. 6434 let expr0_0 = ALUOp::AndNot64; 6435 return Some(expr0_0); 6436 } 6437 return None; 6438 } 6439 6440 // Generated as internal constructor for term and_not_reg. 6441 pub fn constructor_and_not_reg<C: Context>( 6442 ctx: &mut C, 6443 arg0: Type, 6444 arg1: Reg, 6445 arg2: Reg, 6446 ) -> Option<Reg> { 6447 let pattern0_0 = arg0; 6448 let pattern1_0 = arg1; 6449 let pattern2_0 = arg2; 6450 // Rule at src/isa/s390x/inst.isle line 2786. 6451 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6452 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6453 return Some(expr1_0); 6454 } 6455 6456 // Generated as internal constructor for term aluop_or_not. 6457 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6458 let pattern0_0 = arg0; 6459 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6460 // Rule at src/isa/s390x/inst.isle line 2792. 6461 let expr0_0 = ALUOp::OrrNot32; 6462 return Some(expr0_0); 6463 } 6464 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6465 // Rule at src/isa/s390x/inst.isle line 2793. 6466 let expr0_0 = ALUOp::OrrNot64; 6467 return Some(expr0_0); 6468 } 6469 return None; 6470 } 6471 6472 // Generated as internal constructor for term or_not_reg. 6473 pub fn constructor_or_not_reg<C: Context>( 6474 ctx: &mut C, 6475 arg0: Type, 6476 arg1: Reg, 6477 arg2: Reg, 6478 ) -> Option<Reg> { 6479 let pattern0_0 = arg0; 6480 let pattern1_0 = arg1; 6481 let pattern2_0 = arg2; 6482 // Rule at src/isa/s390x/inst.isle line 2796. 6483 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6484 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6485 return Some(expr1_0); 6486 } 6487 6488 // Generated as internal constructor for term aluop_xor_not. 6489 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6490 let pattern0_0 = arg0; 6491 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6492 // Rule at src/isa/s390x/inst.isle line 2802. 6493 let expr0_0 = ALUOp::XorNot32; 6494 return Some(expr0_0); 6495 } 6496 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6497 // Rule at src/isa/s390x/inst.isle line 2803. 6498 let expr0_0 = ALUOp::XorNot64; 6499 return Some(expr0_0); 6500 } 6501 return None; 6502 } 6503 6504 // Generated as internal constructor for term xor_not_reg. 6505 pub fn constructor_xor_not_reg<C: Context>( 6506 ctx: &mut C, 6507 arg0: Type, 6508 arg1: Reg, 6509 arg2: Reg, 6510 ) -> Option<Reg> { 6511 let pattern0_0 = arg0; 6512 let pattern1_0 = arg1; 6513 let pattern2_0 = arg2; 6514 // Rule at src/isa/s390x/inst.isle line 2806. 6515 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6516 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6517 return Some(expr1_0); 6518 } 6519 6520 // Generated as internal constructor for term unaryop_abs. 6521 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6522 let pattern0_0 = arg0; 6523 if pattern0_0 == I32 { 6524 // Rule at src/isa/s390x/inst.isle line 2812. 6525 let expr0_0 = UnaryOp::Abs32; 6526 return Some(expr0_0); 6527 } 6528 if pattern0_0 == I64 { 6529 // Rule at src/isa/s390x/inst.isle line 2813. 6530 let expr0_0 = UnaryOp::Abs64; 6531 return Some(expr0_0); 6532 } 6533 return None; 6534 } 6535 6536 // Generated as internal constructor for term unaryop_abs_sext32. 6537 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6538 let pattern0_0 = arg0; 6539 if pattern0_0 == I64 { 6540 // Rule at src/isa/s390x/inst.isle line 2816. 6541 let expr0_0 = UnaryOp::Abs64Ext32; 6542 return Some(expr0_0); 6543 } 6544 return None; 6545 } 6546 6547 // Generated as internal constructor for term abs_reg. 6548 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6549 let pattern0_0 = arg0; 6550 let pattern1_0 = arg1; 6551 // Rule at src/isa/s390x/inst.isle line 2819. 6552 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6553 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6554 return Some(expr1_0); 6555 } 6556 6557 // Generated as internal constructor for term abs_reg_sext32. 6558 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6559 let pattern0_0 = arg0; 6560 let pattern1_0 = arg1; 6561 // Rule at src/isa/s390x/inst.isle line 2822. 6562 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6563 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6564 return Some(expr1_0); 6565 } 6566 6567 // Generated as internal constructor for term unaryop_neg. 6568 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6569 let pattern0_0 = arg0; 6570 if pattern0_0 == I8 { 6571 // Rule at src/isa/s390x/inst.isle line 2828. 6572 let expr0_0 = UnaryOp::Neg32; 6573 return Some(expr0_0); 6574 } 6575 if pattern0_0 == I16 { 6576 // Rule at src/isa/s390x/inst.isle line 2829. 6577 let expr0_0 = UnaryOp::Neg32; 6578 return Some(expr0_0); 6579 } 6580 if pattern0_0 == I32 { 6581 // Rule at src/isa/s390x/inst.isle line 2830. 6582 let expr0_0 = UnaryOp::Neg32; 6583 return Some(expr0_0); 6584 } 6585 if pattern0_0 == I64 { 6586 // Rule at src/isa/s390x/inst.isle line 2831. 6587 let expr0_0 = UnaryOp::Neg64; 6588 return Some(expr0_0); 6589 } 6590 return None; 6591 } 6592 6593 // Generated as internal constructor for term unaryop_neg_sext32. 6594 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6595 let pattern0_0 = arg0; 6596 if pattern0_0 == I64 { 6597 // Rule at src/isa/s390x/inst.isle line 2834. 6598 let expr0_0 = UnaryOp::Neg64Ext32; 6599 return Some(expr0_0); 6600 } 6601 return None; 6602 } 6603 6604 // Generated as internal constructor for term neg_reg. 6605 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6606 let pattern0_0 = arg0; 6607 let pattern1_0 = arg1; 6608 // Rule at src/isa/s390x/inst.isle line 2837. 6609 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6610 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6611 return Some(expr1_0); 6612 } 6613 6614 // Generated as internal constructor for term neg_reg_sext32. 6615 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6616 let pattern0_0 = arg0; 6617 let pattern1_0 = arg1; 6618 // Rule at src/isa/s390x/inst.isle line 2840. 6619 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6620 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6621 return Some(expr1_0); 6622 } 6623 6624 // Generated as internal constructor for term unaryop_bswap. 6625 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6626 let pattern0_0 = arg0; 6627 if pattern0_0 == I32 { 6628 // Rule at src/isa/s390x/inst.isle line 2846. 6629 let expr0_0 = UnaryOp::BSwap32; 6630 return Some(expr0_0); 6631 } 6632 if pattern0_0 == I64 { 6633 // Rule at src/isa/s390x/inst.isle line 2847. 6634 let expr0_0 = UnaryOp::BSwap64; 6635 return Some(expr0_0); 6636 } 6637 return None; 6638 } 6639 6640 // Generated as internal constructor for term bswap_reg. 6641 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6642 let pattern0_0 = arg0; 6643 let pattern1_0 = arg1; 6644 // Rule at src/isa/s390x/inst.isle line 2850. 6645 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6646 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6647 return Some(expr1_0); 6648 } 6649 6650 // Generated as internal constructor for term push_bswap_reg. 6651 pub fn constructor_push_bswap_reg<C: Context>( 6652 ctx: &mut C, 6653 arg0: &VecMInstBuilder, 6654 arg1: Type, 6655 arg2: WritableReg, 6656 arg3: Reg, 6657 ) -> Option<Reg> { 6658 let pattern0_0 = arg0; 6659 let pattern1_0 = arg1; 6660 let pattern2_0 = arg2; 6661 let pattern3_0 = arg3; 6662 // Rule at src/isa/s390x/inst.isle line 2853. 6663 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6664 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6665 return Some(expr1_0); 6666 } 6667 6668 // Generated as internal constructor for term shiftop_rot. 6669 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6670 let pattern0_0 = arg0; 6671 if pattern0_0 == I32 { 6672 // Rule at src/isa/s390x/inst.isle line 2859. 6673 let expr0_0 = ShiftOp::RotL32; 6674 return Some(expr0_0); 6675 } 6676 if pattern0_0 == I64 { 6677 // Rule at src/isa/s390x/inst.isle line 2860. 6678 let expr0_0 = ShiftOp::RotL64; 6679 return Some(expr0_0); 6680 } 6681 return None; 6682 } 6683 6684 // Generated as internal constructor for term rot_reg. 6685 pub fn constructor_rot_reg<C: Context>( 6686 ctx: &mut C, 6687 arg0: Type, 6688 arg1: Reg, 6689 arg2: Reg, 6690 ) -> Option<Reg> { 6691 let pattern0_0 = arg0; 6692 let pattern1_0 = arg1; 6693 let pattern2_0 = arg2; 6694 // Rule at src/isa/s390x/inst.isle line 2863. 6695 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6696 let expr1_0: u8 = 0; 6697 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6698 return Some(expr2_0); 6699 } 6700 6701 // Generated as internal constructor for term rot_imm. 6702 pub fn constructor_rot_imm<C: Context>( 6703 ctx: &mut C, 6704 arg0: Type, 6705 arg1: Reg, 6706 arg2: u8, 6707 ) -> Option<Reg> { 6708 let pattern0_0 = arg0; 6709 let pattern1_0 = arg1; 6710 let pattern2_0 = arg2; 6711 // Rule at src/isa/s390x/inst.isle line 2867. 6712 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6713 let expr1_0 = C::zero_reg(ctx); 6714 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6715 return Some(expr2_0); 6716 } 6717 6718 // Generated as internal constructor for term rot_imm_reg. 6719 pub fn constructor_rot_imm_reg<C: Context>( 6720 ctx: &mut C, 6721 arg0: Type, 6722 arg1: Reg, 6723 arg2: u8, 6724 arg3: Reg, 6725 ) -> Option<Reg> { 6726 let pattern0_0 = arg0; 6727 let pattern1_0 = arg1; 6728 let pattern2_0 = arg2; 6729 let pattern3_0 = arg3; 6730 // Rule at src/isa/s390x/inst.isle line 2871. 6731 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6732 let expr1_0 = constructor_shift_rr( 6733 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6734 )?; 6735 return Some(expr1_0); 6736 } 6737 6738 // Generated as internal constructor for term push_rot_imm_reg. 6739 pub fn constructor_push_rot_imm_reg<C: Context>( 6740 ctx: &mut C, 6741 arg0: &VecMInstBuilder, 6742 arg1: Type, 6743 arg2: WritableReg, 6744 arg3: Reg, 6745 arg4: u8, 6746 arg5: Reg, 6747 ) -> Option<Reg> { 6748 let pattern0_0 = arg0; 6749 let pattern1_0 = arg1; 6750 let pattern2_0 = arg2; 6751 let pattern3_0 = arg3; 6752 let pattern4_0 = arg4; 6753 let pattern5_0 = arg5; 6754 // Rule at src/isa/s390x/inst.isle line 2875. 6755 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6756 let expr1_0 = constructor_push_shift( 6757 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6758 )?; 6759 return Some(expr1_0); 6760 } 6761 6762 // Generated as internal constructor for term shiftop_lshl. 6763 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6764 let pattern0_0 = arg0; 6765 if pattern0_0 == I8 { 6766 // Rule at src/isa/s390x/inst.isle line 2882. 6767 let expr0_0 = ShiftOp::LShL32; 6768 return Some(expr0_0); 6769 } 6770 if pattern0_0 == I16 { 6771 // Rule at src/isa/s390x/inst.isle line 2883. 6772 let expr0_0 = ShiftOp::LShL32; 6773 return Some(expr0_0); 6774 } 6775 if pattern0_0 == I32 { 6776 // Rule at src/isa/s390x/inst.isle line 2884. 6777 let expr0_0 = ShiftOp::LShL32; 6778 return Some(expr0_0); 6779 } 6780 if pattern0_0 == I64 { 6781 // Rule at src/isa/s390x/inst.isle line 2885. 6782 let expr0_0 = ShiftOp::LShL64; 6783 return Some(expr0_0); 6784 } 6785 return None; 6786 } 6787 6788 // Generated as internal constructor for term lshl_reg. 6789 pub fn constructor_lshl_reg<C: Context>( 6790 ctx: &mut C, 6791 arg0: Type, 6792 arg1: Reg, 6793 arg2: Reg, 6794 ) -> Option<Reg> { 6795 let pattern0_0 = arg0; 6796 let pattern1_0 = arg1; 6797 let pattern2_0 = arg2; 6798 // Rule at src/isa/s390x/inst.isle line 2888. 6799 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6800 let expr1_0: u8 = 0; 6801 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6802 return Some(expr2_0); 6803 } 6804 6805 // Generated as internal constructor for term lshl_imm. 6806 pub fn constructor_lshl_imm<C: Context>( 6807 ctx: &mut C, 6808 arg0: Type, 6809 arg1: Reg, 6810 arg2: u8, 6811 ) -> Option<Reg> { 6812 let pattern0_0 = arg0; 6813 let pattern1_0 = arg1; 6814 let pattern2_0 = arg2; 6815 // Rule at src/isa/s390x/inst.isle line 2892. 6816 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6817 let expr1_0 = C::zero_reg(ctx); 6818 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6819 return Some(expr2_0); 6820 } 6821 6822 // Generated as internal constructor for term shiftop_lshr. 6823 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6824 let pattern0_0 = arg0; 6825 if pattern0_0 == I32 { 6826 // Rule at src/isa/s390x/inst.isle line 2899. 6827 let expr0_0 = ShiftOp::LShR32; 6828 return Some(expr0_0); 6829 } 6830 if pattern0_0 == I64 { 6831 // Rule at src/isa/s390x/inst.isle line 2900. 6832 let expr0_0 = ShiftOp::LShR64; 6833 return Some(expr0_0); 6834 } 6835 return None; 6836 } 6837 6838 // Generated as internal constructor for term lshr_reg. 6839 pub fn constructor_lshr_reg<C: Context>( 6840 ctx: &mut C, 6841 arg0: Type, 6842 arg1: Reg, 6843 arg2: Reg, 6844 ) -> Option<Reg> { 6845 let pattern0_0 = arg0; 6846 let pattern1_0 = arg1; 6847 let pattern2_0 = arg2; 6848 // Rule at src/isa/s390x/inst.isle line 2903. 6849 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6850 let expr1_0: u8 = 0; 6851 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6852 return Some(expr2_0); 6853 } 6854 6855 // Generated as internal constructor for term lshr_imm. 6856 pub fn constructor_lshr_imm<C: Context>( 6857 ctx: &mut C, 6858 arg0: Type, 6859 arg1: Reg, 6860 arg2: u8, 6861 ) -> Option<Reg> { 6862 let pattern0_0 = arg0; 6863 let pattern1_0 = arg1; 6864 let pattern2_0 = arg2; 6865 // Rule at src/isa/s390x/inst.isle line 2907. 6866 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6867 let expr1_0 = C::zero_reg(ctx); 6868 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6869 return Some(expr2_0); 6870 } 6871 6872 // Generated as internal constructor for term shiftop_ashr. 6873 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6874 let pattern0_0 = arg0; 6875 if pattern0_0 == I32 { 6876 // Rule at src/isa/s390x/inst.isle line 2914. 6877 let expr0_0 = ShiftOp::AShR32; 6878 return Some(expr0_0); 6879 } 6880 if pattern0_0 == I64 { 6881 // Rule at src/isa/s390x/inst.isle line 2915. 6882 let expr0_0 = ShiftOp::AShR64; 6883 return Some(expr0_0); 6884 } 6885 return None; 6886 } 6887 6888 // Generated as internal constructor for term ashr_reg. 6889 pub fn constructor_ashr_reg<C: Context>( 6890 ctx: &mut C, 6891 arg0: Type, 6892 arg1: Reg, 6893 arg2: Reg, 6894 ) -> Option<Reg> { 6895 let pattern0_0 = arg0; 6896 let pattern1_0 = arg1; 6897 let pattern2_0 = arg2; 6898 // Rule at src/isa/s390x/inst.isle line 2918. 6899 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6900 let expr1_0: u8 = 0; 6901 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6902 return Some(expr2_0); 6903 } 6904 6905 // Generated as internal constructor for term ashr_imm. 6906 pub fn constructor_ashr_imm<C: Context>( 6907 ctx: &mut C, 6908 arg0: Type, 6909 arg1: Reg, 6910 arg2: u8, 6911 ) -> Option<Reg> { 6912 let pattern0_0 = arg0; 6913 let pattern1_0 = arg1; 6914 let pattern2_0 = arg2; 6915 // Rule at src/isa/s390x/inst.isle line 2922. 6916 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6917 let expr1_0 = C::zero_reg(ctx); 6918 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6919 return Some(expr2_0); 6920 } 6921 6922 // Generated as internal constructor for term popcnt_byte. 6923 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6924 let pattern0_0 = arg0; 6925 // Rule at src/isa/s390x/inst.isle line 2929. 6926 let expr0_0: Type = I64; 6927 let expr1_0 = UnaryOp::PopcntByte; 6928 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6929 return Some(expr2_0); 6930 } 6931 6932 // Generated as internal constructor for term popcnt_reg. 6933 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6934 let pattern0_0 = arg0; 6935 // Rule at src/isa/s390x/inst.isle line 2932. 6936 let expr0_0: Type = I64; 6937 let expr1_0 = UnaryOp::PopcntReg; 6938 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6939 return Some(expr2_0); 6940 } 6941 6942 // Generated as internal constructor for term atomic_rmw_and. 6943 pub fn constructor_atomic_rmw_and<C: Context>( 6944 ctx: &mut C, 6945 arg0: Type, 6946 arg1: Reg, 6947 arg2: &MemArg, 6948 ) -> Option<Reg> { 6949 let pattern0_0 = arg0; 6950 if pattern0_0 == I32 { 6951 let pattern2_0 = arg1; 6952 let pattern3_0 = arg2; 6953 // Rule at src/isa/s390x/inst.isle line 2938. 6954 let expr0_0: Type = I32; 6955 let expr1_0 = ALUOp::And32; 6956 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6957 return Some(expr2_0); 6958 } 6959 if pattern0_0 == I64 { 6960 let pattern2_0 = arg1; 6961 let pattern3_0 = arg2; 6962 // Rule at src/isa/s390x/inst.isle line 2939. 6963 let expr0_0: Type = I64; 6964 let expr1_0 = ALUOp::And64; 6965 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6966 return Some(expr2_0); 6967 } 6968 return None; 6969 } 6970 6971 // Generated as internal constructor for term atomic_rmw_or. 6972 pub fn constructor_atomic_rmw_or<C: Context>( 6973 ctx: &mut C, 6974 arg0: Type, 6975 arg1: Reg, 6976 arg2: &MemArg, 6977 ) -> Option<Reg> { 6978 let pattern0_0 = arg0; 6979 if pattern0_0 == I32 { 6980 let pattern2_0 = arg1; 6981 let pattern3_0 = arg2; 6982 // Rule at src/isa/s390x/inst.isle line 2942. 6983 let expr0_0: Type = I32; 6984 let expr1_0 = ALUOp::Orr32; 6985 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6986 return Some(expr2_0); 6987 } 6988 if pattern0_0 == I64 { 6989 let pattern2_0 = arg1; 6990 let pattern3_0 = arg2; 6991 // Rule at src/isa/s390x/inst.isle line 2943. 6992 let expr0_0: Type = I64; 6993 let expr1_0 = ALUOp::Orr64; 6994 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6995 return Some(expr2_0); 6996 } 6997 return None; 6998 } 6999 7000 // Generated as internal constructor for term atomic_rmw_xor. 7001 pub fn constructor_atomic_rmw_xor<C: Context>( 7002 ctx: &mut C, 7003 arg0: Type, 7004 arg1: Reg, 7005 arg2: &MemArg, 7006 ) -> Option<Reg> { 7007 let pattern0_0 = arg0; 7008 if pattern0_0 == I32 { 7009 let pattern2_0 = arg1; 7010 let pattern3_0 = arg2; 7011 // Rule at src/isa/s390x/inst.isle line 2946. 7012 let expr0_0: Type = I32; 7013 let expr1_0 = ALUOp::Xor32; 7014 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 7015 return Some(expr2_0); 7016 } 7017 if pattern0_0 == I64 { 7018 let pattern2_0 = arg1; 7019 let pattern3_0 = arg2; 7020 // Rule at src/isa/s390x/inst.isle line 2947. 7021 let expr0_0: Type = I64; 7022 let expr1_0 = ALUOp::Xor64; 7023 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 7024 return Some(expr2_0); 7025 } 7026 return None; 7027 } 7028 7029 // Generated as internal constructor for term atomic_rmw_add. 7030 pub fn constructor_atomic_rmw_add<C: Context>( 7031 ctx: &mut C, 7032 arg0: Type, 7033 arg1: Reg, 7034 arg2: &MemArg, 7035 ) -> Option<Reg> { 7036 let pattern0_0 = arg0; 7037 if pattern0_0 == I32 { 7038 let pattern2_0 = arg1; 7039 let pattern3_0 = arg2; 7040 // Rule at src/isa/s390x/inst.isle line 2950. 7041 let expr0_0: Type = I32; 7042 let expr1_0 = ALUOp::Add32; 7043 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 7044 return Some(expr2_0); 7045 } 7046 if pattern0_0 == I64 { 7047 let pattern2_0 = arg1; 7048 let pattern3_0 = arg2; 7049 // Rule at src/isa/s390x/inst.isle line 2951. 7050 let expr0_0: Type = I64; 7051 let expr1_0 = ALUOp::Add64; 7052 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 7053 return Some(expr2_0); 7054 } 7055 return None; 7056 } 7057 7058 // Generated as internal constructor for term atomic_cas_impl. 7059 pub fn constructor_atomic_cas_impl<C: Context>( 7060 ctx: &mut C, 7061 arg0: Type, 7062 arg1: Reg, 7063 arg2: Reg, 7064 arg3: &MemArg, 7065 ) -> Option<Reg> { 7066 let pattern0_0 = arg0; 7067 if pattern0_0 == I32 { 7068 let pattern2_0 = arg1; 7069 let pattern3_0 = arg2; 7070 let pattern4_0 = arg3; 7071 // Rule at src/isa/s390x/inst.isle line 2957. 7072 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 7073 return Some(expr0_0); 7074 } 7075 if pattern0_0 == I64 { 7076 let pattern2_0 = arg1; 7077 let pattern3_0 = arg2; 7078 let pattern4_0 = arg3; 7079 // Rule at src/isa/s390x/inst.isle line 2958. 7080 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 7081 return Some(expr0_0); 7082 } 7083 return None; 7084 } 7085 7086 // Generated as internal constructor for term push_atomic_cas. 7087 pub fn constructor_push_atomic_cas<C: Context>( 7088 ctx: &mut C, 7089 arg0: &VecMInstBuilder, 7090 arg1: Type, 7091 arg2: WritableReg, 7092 arg3: Reg, 7093 arg4: &MemArg, 7094 ) -> Option<Reg> { 7095 let pattern0_0 = arg0; 7096 let pattern1_0 = arg1; 7097 if pattern1_0 == I32 { 7098 let pattern3_0 = arg2; 7099 let pattern4_0 = arg3; 7100 let pattern5_0 = arg4; 7101 // Rule at src/isa/s390x/inst.isle line 2961. 7102 let expr0_0 = 7103 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 7104 return Some(expr0_0); 7105 } 7106 if pattern1_0 == I64 { 7107 let pattern3_0 = arg2; 7108 let pattern4_0 = arg3; 7109 let pattern5_0 = arg4; 7110 // Rule at src/isa/s390x/inst.isle line 2962. 7111 let expr0_0 = 7112 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 7113 return Some(expr0_0); 7114 } 7115 return None; 7116 } 7117 7118 // Generated as internal constructor for term fpuop2_add. 7119 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7120 let pattern0_0 = arg0; 7121 if pattern0_0 == F32 { 7122 // Rule at src/isa/s390x/inst.isle line 2968. 7123 let expr0_0 = FPUOp2::Add32; 7124 return Some(expr0_0); 7125 } 7126 if pattern0_0 == F64 { 7127 // Rule at src/isa/s390x/inst.isle line 2969. 7128 let expr0_0 = FPUOp2::Add64; 7129 return Some(expr0_0); 7130 } 7131 return None; 7132 } 7133 7134 // Generated as internal constructor for term fadd_reg. 7135 pub fn constructor_fadd_reg<C: Context>( 7136 ctx: &mut C, 7137 arg0: Type, 7138 arg1: Reg, 7139 arg2: Reg, 7140 ) -> Option<Reg> { 7141 let pattern0_0 = arg0; 7142 let pattern1_0 = arg1; 7143 let pattern2_0 = arg2; 7144 // Rule at src/isa/s390x/inst.isle line 2972. 7145 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 7146 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7147 return Some(expr1_0); 7148 } 7149 7150 // Generated as internal constructor for term fpuop2_sub. 7151 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7152 let pattern0_0 = arg0; 7153 if pattern0_0 == F32 { 7154 // Rule at src/isa/s390x/inst.isle line 2978. 7155 let expr0_0 = FPUOp2::Sub32; 7156 return Some(expr0_0); 7157 } 7158 if pattern0_0 == F64 { 7159 // Rule at src/isa/s390x/inst.isle line 2979. 7160 let expr0_0 = FPUOp2::Sub64; 7161 return Some(expr0_0); 7162 } 7163 return None; 7164 } 7165 7166 // Generated as internal constructor for term fsub_reg. 7167 pub fn constructor_fsub_reg<C: Context>( 7168 ctx: &mut C, 7169 arg0: Type, 7170 arg1: Reg, 7171 arg2: Reg, 7172 ) -> Option<Reg> { 7173 let pattern0_0 = arg0; 7174 let pattern1_0 = arg1; 7175 let pattern2_0 = arg2; 7176 // Rule at src/isa/s390x/inst.isle line 2982. 7177 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7178 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7179 return Some(expr1_0); 7180 } 7181 7182 // Generated as internal constructor for term fpuop2_mul. 7183 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7184 let pattern0_0 = arg0; 7185 if pattern0_0 == F32 { 7186 // Rule at src/isa/s390x/inst.isle line 2988. 7187 let expr0_0 = FPUOp2::Mul32; 7188 return Some(expr0_0); 7189 } 7190 if pattern0_0 == F64 { 7191 // Rule at src/isa/s390x/inst.isle line 2989. 7192 let expr0_0 = FPUOp2::Mul64; 7193 return Some(expr0_0); 7194 } 7195 return None; 7196 } 7197 7198 // Generated as internal constructor for term fmul_reg. 7199 pub fn constructor_fmul_reg<C: Context>( 7200 ctx: &mut C, 7201 arg0: Type, 7202 arg1: Reg, 7203 arg2: Reg, 7204 ) -> Option<Reg> { 7205 let pattern0_0 = arg0; 7206 let pattern1_0 = arg1; 7207 let pattern2_0 = arg2; 7208 // Rule at src/isa/s390x/inst.isle line 2992. 7209 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7210 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7211 return Some(expr1_0); 7212 } 7213 7214 // Generated as internal constructor for term fpuop2_div. 7215 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7216 let pattern0_0 = arg0; 7217 if pattern0_0 == F32 { 7218 // Rule at src/isa/s390x/inst.isle line 2998. 7219 let expr0_0 = FPUOp2::Div32; 7220 return Some(expr0_0); 7221 } 7222 if pattern0_0 == F64 { 7223 // Rule at src/isa/s390x/inst.isle line 2999. 7224 let expr0_0 = FPUOp2::Div64; 7225 return Some(expr0_0); 7226 } 7227 return None; 7228 } 7229 7230 // Generated as internal constructor for term fdiv_reg. 7231 pub fn constructor_fdiv_reg<C: Context>( 7232 ctx: &mut C, 7233 arg0: Type, 7234 arg1: Reg, 7235 arg2: Reg, 7236 ) -> Option<Reg> { 7237 let pattern0_0 = arg0; 7238 let pattern1_0 = arg1; 7239 let pattern2_0 = arg2; 7240 // Rule at src/isa/s390x/inst.isle line 3002. 7241 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7242 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7243 return Some(expr1_0); 7244 } 7245 7246 // Generated as internal constructor for term fpuop2_min. 7247 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7248 let pattern0_0 = arg0; 7249 if pattern0_0 == F32 { 7250 // Rule at src/isa/s390x/inst.isle line 3008. 7251 let expr0_0 = FPUOp2::Min32; 7252 return Some(expr0_0); 7253 } 7254 if pattern0_0 == F64 { 7255 // Rule at src/isa/s390x/inst.isle line 3009. 7256 let expr0_0 = FPUOp2::Min64; 7257 return Some(expr0_0); 7258 } 7259 return None; 7260 } 7261 7262 // Generated as internal constructor for term fmin_reg. 7263 pub fn constructor_fmin_reg<C: Context>( 7264 ctx: &mut C, 7265 arg0: Type, 7266 arg1: Reg, 7267 arg2: Reg, 7268 ) -> Option<Reg> { 7269 let pattern0_0 = arg0; 7270 let pattern1_0 = arg1; 7271 let pattern2_0 = arg2; 7272 // Rule at src/isa/s390x/inst.isle line 3012. 7273 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7274 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7275 return Some(expr1_0); 7276 } 7277 7278 // Generated as internal constructor for term fpuop2_max. 7279 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7280 let pattern0_0 = arg0; 7281 if pattern0_0 == F32 { 7282 // Rule at src/isa/s390x/inst.isle line 3018. 7283 let expr0_0 = FPUOp2::Max32; 7284 return Some(expr0_0); 7285 } 7286 if pattern0_0 == F64 { 7287 // Rule at src/isa/s390x/inst.isle line 3019. 7288 let expr0_0 = FPUOp2::Max64; 7289 return Some(expr0_0); 7290 } 7291 return None; 7292 } 7293 7294 // Generated as internal constructor for term fmax_reg. 7295 pub fn constructor_fmax_reg<C: Context>( 7296 ctx: &mut C, 7297 arg0: Type, 7298 arg1: Reg, 7299 arg2: Reg, 7300 ) -> Option<Reg> { 7301 let pattern0_0 = arg0; 7302 let pattern1_0 = arg1; 7303 let pattern2_0 = arg2; 7304 // Rule at src/isa/s390x/inst.isle line 3022. 7305 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7306 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7307 return Some(expr1_0); 7308 } 7309 7310 // Generated as internal constructor for term fpuop3_fma. 7311 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7312 let pattern0_0 = arg0; 7313 if pattern0_0 == F32 { 7314 // Rule at src/isa/s390x/inst.isle line 3028. 7315 let expr0_0 = FPUOp3::MAdd32; 7316 return Some(expr0_0); 7317 } 7318 if pattern0_0 == F64 { 7319 // Rule at src/isa/s390x/inst.isle line 3029. 7320 let expr0_0 = FPUOp3::MAdd64; 7321 return Some(expr0_0); 7322 } 7323 return None; 7324 } 7325 7326 // Generated as internal constructor for term fma_reg. 7327 pub fn constructor_fma_reg<C: Context>( 7328 ctx: &mut C, 7329 arg0: Type, 7330 arg1: Reg, 7331 arg2: Reg, 7332 arg3: Reg, 7333 ) -> Option<Reg> { 7334 let pattern0_0 = arg0; 7335 let pattern1_0 = arg1; 7336 let pattern2_0 = arg2; 7337 let pattern3_0 = arg3; 7338 // Rule at src/isa/s390x/inst.isle line 3032. 7339 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7340 let expr1_0 = constructor_fpu_rrrr( 7341 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7342 )?; 7343 return Some(expr1_0); 7344 } 7345 7346 // Generated as internal constructor for term fpuop1_sqrt. 7347 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7348 let pattern0_0 = arg0; 7349 if pattern0_0 == F32 { 7350 // Rule at src/isa/s390x/inst.isle line 3038. 7351 let expr0_0 = FPUOp1::Sqrt32; 7352 return Some(expr0_0); 7353 } 7354 if pattern0_0 == F64 { 7355 // Rule at src/isa/s390x/inst.isle line 3039. 7356 let expr0_0 = FPUOp1::Sqrt64; 7357 return Some(expr0_0); 7358 } 7359 return None; 7360 } 7361 7362 // Generated as internal constructor for term sqrt_reg. 7363 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7364 let pattern0_0 = arg0; 7365 let pattern1_0 = arg1; 7366 // Rule at src/isa/s390x/inst.isle line 3042. 7367 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7368 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7369 return Some(expr1_0); 7370 } 7371 7372 // Generated as internal constructor for term fpuop1_neg. 7373 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7374 let pattern0_0 = arg0; 7375 if pattern0_0 == F32 { 7376 // Rule at src/isa/s390x/inst.isle line 3048. 7377 let expr0_0 = FPUOp1::Neg32; 7378 return Some(expr0_0); 7379 } 7380 if pattern0_0 == F64 { 7381 // Rule at src/isa/s390x/inst.isle line 3049. 7382 let expr0_0 = FPUOp1::Neg64; 7383 return Some(expr0_0); 7384 } 7385 return None; 7386 } 7387 7388 // Generated as internal constructor for term fneg_reg. 7389 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7390 let pattern0_0 = arg0; 7391 let pattern1_0 = arg1; 7392 // Rule at src/isa/s390x/inst.isle line 3052. 7393 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7394 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7395 return Some(expr1_0); 7396 } 7397 7398 // Generated as internal constructor for term fpuop1_abs. 7399 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7400 let pattern0_0 = arg0; 7401 if pattern0_0 == F32 { 7402 // Rule at src/isa/s390x/inst.isle line 3058. 7403 let expr0_0 = FPUOp1::Abs32; 7404 return Some(expr0_0); 7405 } 7406 if pattern0_0 == F64 { 7407 // Rule at src/isa/s390x/inst.isle line 3059. 7408 let expr0_0 = FPUOp1::Abs64; 7409 return Some(expr0_0); 7410 } 7411 return None; 7412 } 7413 7414 // Generated as internal constructor for term fabs_reg. 7415 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7416 let pattern0_0 = arg0; 7417 let pattern1_0 = arg1; 7418 // Rule at src/isa/s390x/inst.isle line 3062. 7419 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7420 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7421 return Some(expr1_0); 7422 } 7423 7424 // Generated as internal constructor for term fpuroundmode_ceil. 7425 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7426 let pattern0_0 = arg0; 7427 if pattern0_0 == F32 { 7428 // Rule at src/isa/s390x/inst.isle line 3068. 7429 let expr0_0 = FpuRoundMode::Plus32; 7430 return Some(expr0_0); 7431 } 7432 if pattern0_0 == F64 { 7433 // Rule at src/isa/s390x/inst.isle line 3069. 7434 let expr0_0 = FpuRoundMode::Plus64; 7435 return Some(expr0_0); 7436 } 7437 return None; 7438 } 7439 7440 // Generated as internal constructor for term ceil_reg. 7441 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7442 let pattern0_0 = arg0; 7443 let pattern1_0 = arg1; 7444 // Rule at src/isa/s390x/inst.isle line 3072. 7445 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7446 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7447 return Some(expr1_0); 7448 } 7449 7450 // Generated as internal constructor for term fpuroundmode_floor. 7451 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7452 let pattern0_0 = arg0; 7453 if pattern0_0 == F32 { 7454 // Rule at src/isa/s390x/inst.isle line 3078. 7455 let expr0_0 = FpuRoundMode::Minus32; 7456 return Some(expr0_0); 7457 } 7458 if pattern0_0 == F64 { 7459 // Rule at src/isa/s390x/inst.isle line 3079. 7460 let expr0_0 = FpuRoundMode::Minus64; 7461 return Some(expr0_0); 7462 } 7463 return None; 7464 } 7465 7466 // Generated as internal constructor for term floor_reg. 7467 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7468 let pattern0_0 = arg0; 7469 let pattern1_0 = arg1; 7470 // Rule at src/isa/s390x/inst.isle line 3082. 7471 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7472 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7473 return Some(expr1_0); 7474 } 7475 7476 // Generated as internal constructor for term fpuroundmode_trunc. 7477 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7478 let pattern0_0 = arg0; 7479 if pattern0_0 == F32 { 7480 // Rule at src/isa/s390x/inst.isle line 3088. 7481 let expr0_0 = FpuRoundMode::Zero32; 7482 return Some(expr0_0); 7483 } 7484 if pattern0_0 == F64 { 7485 // Rule at src/isa/s390x/inst.isle line 3089. 7486 let expr0_0 = FpuRoundMode::Zero64; 7487 return Some(expr0_0); 7488 } 7489 return None; 7490 } 7491 7492 // Generated as internal constructor for term trunc_reg. 7493 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7494 let pattern0_0 = arg0; 7495 let pattern1_0 = arg1; 7496 // Rule at src/isa/s390x/inst.isle line 3092. 7497 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7498 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7499 return Some(expr1_0); 7500 } 7501 7502 // Generated as internal constructor for term fpuroundmode_nearest. 7503 pub fn constructor_fpuroundmode_nearest<C: Context>( 7504 ctx: &mut C, 7505 arg0: Type, 7506 ) -> Option<FpuRoundMode> { 7507 let pattern0_0 = arg0; 7508 if pattern0_0 == F32 { 7509 // Rule at src/isa/s390x/inst.isle line 3098. 7510 let expr0_0 = FpuRoundMode::Nearest32; 7511 return Some(expr0_0); 7512 } 7513 if pattern0_0 == F64 { 7514 // Rule at src/isa/s390x/inst.isle line 3099. 7515 let expr0_0 = FpuRoundMode::Nearest64; 7516 return Some(expr0_0); 7517 } 7518 return None; 7519 } 7520 7521 // Generated as internal constructor for term nearest_reg. 7522 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7523 let pattern0_0 = arg0; 7524 let pattern1_0 = arg1; 7525 // Rule at src/isa/s390x/inst.isle line 3102. 7526 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7527 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7528 return Some(expr1_0); 7529 } 7530 7531 // Generated as internal constructor for term fpuop1_promote. 7532 pub fn constructor_fpuop1_promote<C: Context>( 7533 ctx: &mut C, 7534 arg0: Type, 7535 arg1: Type, 7536 ) -> Option<FPUOp1> { 7537 let pattern0_0 = arg0; 7538 if pattern0_0 == F64 { 7539 let pattern2_0 = arg1; 7540 if pattern2_0 == F32 { 7541 // Rule at src/isa/s390x/inst.isle line 3108. 7542 let expr0_0 = FPUOp1::Cvt32To64; 7543 return Some(expr0_0); 7544 } 7545 } 7546 return None; 7547 } 7548 7549 // Generated as internal constructor for term fpromote_reg. 7550 pub fn constructor_fpromote_reg<C: Context>( 7551 ctx: &mut C, 7552 arg0: Type, 7553 arg1: Type, 7554 arg2: Reg, 7555 ) -> Option<Reg> { 7556 let pattern0_0 = arg0; 7557 let pattern1_0 = arg1; 7558 let pattern2_0 = arg2; 7559 // Rule at src/isa/s390x/inst.isle line 3111. 7560 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7561 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7562 return Some(expr1_0); 7563 } 7564 7565 // Generated as internal constructor for term fpuop1_demote. 7566 pub fn constructor_fpuop1_demote<C: Context>( 7567 ctx: &mut C, 7568 arg0: Type, 7569 arg1: Type, 7570 ) -> Option<FPUOp1> { 7571 let pattern0_0 = arg0; 7572 if pattern0_0 == F32 { 7573 let pattern2_0 = arg1; 7574 if pattern2_0 == F64 { 7575 // Rule at src/isa/s390x/inst.isle line 3118. 7576 let expr0_0 = FPUOp1::Cvt64To32; 7577 return Some(expr0_0); 7578 } 7579 } 7580 return None; 7581 } 7582 7583 // Generated as internal constructor for term fdemote_reg. 7584 pub fn constructor_fdemote_reg<C: Context>( 7585 ctx: &mut C, 7586 arg0: Type, 7587 arg1: Type, 7588 arg2: Reg, 7589 ) -> Option<Reg> { 7590 let pattern0_0 = arg0; 7591 let pattern1_0 = arg1; 7592 let pattern2_0 = arg2; 7593 // Rule at src/isa/s390x/inst.isle line 3121. 7594 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7595 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7596 return Some(expr1_0); 7597 } 7598 7599 // Generated as internal constructor for term uint_to_fpu_op. 7600 pub fn constructor_uint_to_fpu_op<C: Context>( 7601 ctx: &mut C, 7602 arg0: Type, 7603 arg1: Type, 7604 ) -> Option<IntToFpuOp> { 7605 let pattern0_0 = arg0; 7606 if pattern0_0 == F32 { 7607 let pattern2_0 = arg1; 7608 if pattern2_0 == I32 { 7609 // Rule at src/isa/s390x/inst.isle line 3128. 7610 let expr0_0 = IntToFpuOp::U32ToF32; 7611 return Some(expr0_0); 7612 } 7613 if pattern2_0 == I64 { 7614 // Rule at src/isa/s390x/inst.isle line 3130. 7615 let expr0_0 = IntToFpuOp::U64ToF32; 7616 return Some(expr0_0); 7617 } 7618 } 7619 if pattern0_0 == F64 { 7620 let pattern2_0 = arg1; 7621 if pattern2_0 == I32 { 7622 // Rule at src/isa/s390x/inst.isle line 3129. 7623 let expr0_0 = IntToFpuOp::U32ToF64; 7624 return Some(expr0_0); 7625 } 7626 if pattern2_0 == I64 { 7627 // Rule at src/isa/s390x/inst.isle line 3131. 7628 let expr0_0 = IntToFpuOp::U64ToF64; 7629 return Some(expr0_0); 7630 } 7631 } 7632 return None; 7633 } 7634 7635 // Generated as internal constructor for term fcvt_from_uint_reg. 7636 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7637 ctx: &mut C, 7638 arg0: Type, 7639 arg1: Type, 7640 arg2: Reg, 7641 ) -> Option<Reg> { 7642 let pattern0_0 = arg0; 7643 let pattern1_0 = arg1; 7644 let pattern2_0 = arg2; 7645 // Rule at src/isa/s390x/inst.isle line 3134. 7646 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7647 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7648 return Some(expr1_0); 7649 } 7650 7651 // Generated as internal constructor for term sint_to_fpu_op. 7652 pub fn constructor_sint_to_fpu_op<C: Context>( 7653 ctx: &mut C, 7654 arg0: Type, 7655 arg1: Type, 7656 ) -> Option<IntToFpuOp> { 7657 let pattern0_0 = arg0; 7658 if pattern0_0 == F32 { 7659 let pattern2_0 = arg1; 7660 if pattern2_0 == I32 { 7661 // Rule at src/isa/s390x/inst.isle line 3141. 7662 let expr0_0 = IntToFpuOp::I32ToF32; 7663 return Some(expr0_0); 7664 } 7665 if pattern2_0 == I64 { 7666 // Rule at src/isa/s390x/inst.isle line 3143. 7667 let expr0_0 = IntToFpuOp::I64ToF32; 7668 return Some(expr0_0); 7669 } 7670 } 7671 if pattern0_0 == F64 { 7672 let pattern2_0 = arg1; 7673 if pattern2_0 == I32 { 7674 // Rule at src/isa/s390x/inst.isle line 3142. 7675 let expr0_0 = IntToFpuOp::I32ToF64; 7676 return Some(expr0_0); 7677 } 7678 if pattern2_0 == I64 { 7679 // Rule at src/isa/s390x/inst.isle line 3144. 7680 let expr0_0 = IntToFpuOp::I64ToF64; 7681 return Some(expr0_0); 7682 } 7683 } 7684 return None; 7685 } 7686 7687 // Generated as internal constructor for term fcvt_from_sint_reg. 7688 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7689 ctx: &mut C, 7690 arg0: Type, 7691 arg1: Type, 7692 arg2: Reg, 7693 ) -> Option<Reg> { 7694 let pattern0_0 = arg0; 7695 let pattern1_0 = arg1; 7696 let pattern2_0 = arg2; 7697 // Rule at src/isa/s390x/inst.isle line 3147. 7698 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7699 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7700 return Some(expr1_0); 7701 } 7702 7703 // Generated as internal constructor for term fpu_to_uint_op. 7704 pub fn constructor_fpu_to_uint_op<C: Context>( 7705 ctx: &mut C, 7706 arg0: Type, 7707 arg1: Type, 7708 ) -> Option<FpuToIntOp> { 7709 let pattern0_0 = arg0; 7710 if pattern0_0 == I32 { 7711 let pattern2_0 = arg1; 7712 if pattern2_0 == F32 { 7713 // Rule at src/isa/s390x/inst.isle line 3154. 7714 let expr0_0 = FpuToIntOp::F32ToU32; 7715 return Some(expr0_0); 7716 } 7717 if pattern2_0 == F64 { 7718 // Rule at src/isa/s390x/inst.isle line 3155. 7719 let expr0_0 = FpuToIntOp::F64ToU32; 7720 return Some(expr0_0); 7721 } 7722 } 7723 if pattern0_0 == I64 { 7724 let pattern2_0 = arg1; 7725 if pattern2_0 == F32 { 7726 // Rule at src/isa/s390x/inst.isle line 3156. 7727 let expr0_0 = FpuToIntOp::F32ToU64; 7728 return Some(expr0_0); 7729 } 7730 if pattern2_0 == F64 { 7731 // Rule at src/isa/s390x/inst.isle line 3157. 7732 let expr0_0 = FpuToIntOp::F64ToU64; 7733 return Some(expr0_0); 7734 } 7735 } 7736 return None; 7737 } 7738 7739 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7740 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7741 ctx: &mut C, 7742 arg0: Type, 7743 arg1: Type, 7744 arg2: Reg, 7745 ) -> Option<ProducesFlags> { 7746 let pattern0_0 = arg0; 7747 let pattern1_0 = arg1; 7748 let pattern2_0 = arg2; 7749 // Rule at src/isa/s390x/inst.isle line 3160. 7750 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7751 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7752 return Some(expr1_0); 7753 } 7754 7755 // Generated as internal constructor for term fcvt_to_uint_reg. 7756 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7757 ctx: &mut C, 7758 arg0: Type, 7759 arg1: Type, 7760 arg2: Reg, 7761 ) -> Option<Reg> { 7762 let pattern0_0 = arg0; 7763 let pattern1_0 = arg1; 7764 let pattern2_0 = arg2; 7765 // Rule at src/isa/s390x/inst.isle line 3164. 7766 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7767 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7768 return Some(expr1_0); 7769 } 7770 7771 // Generated as internal constructor for term fpu_to_sint_op. 7772 pub fn constructor_fpu_to_sint_op<C: Context>( 7773 ctx: &mut C, 7774 arg0: Type, 7775 arg1: Type, 7776 ) -> Option<FpuToIntOp> { 7777 let pattern0_0 = arg0; 7778 if pattern0_0 == I32 { 7779 let pattern2_0 = arg1; 7780 if pattern2_0 == F32 { 7781 // Rule at src/isa/s390x/inst.isle line 3171. 7782 let expr0_0 = FpuToIntOp::F32ToI32; 7783 return Some(expr0_0); 7784 } 7785 if pattern2_0 == F64 { 7786 // Rule at src/isa/s390x/inst.isle line 3172. 7787 let expr0_0 = FpuToIntOp::F64ToI32; 7788 return Some(expr0_0); 7789 } 7790 } 7791 if pattern0_0 == I64 { 7792 let pattern2_0 = arg1; 7793 if pattern2_0 == F32 { 7794 // Rule at src/isa/s390x/inst.isle line 3173. 7795 let expr0_0 = FpuToIntOp::F32ToI64; 7796 return Some(expr0_0); 7797 } 7798 if pattern2_0 == F64 { 7799 // Rule at src/isa/s390x/inst.isle line 3174. 7800 let expr0_0 = FpuToIntOp::F64ToI64; 7801 return Some(expr0_0); 7802 } 7803 } 7804 return None; 7805 } 7806 7807 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7808 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7809 ctx: &mut C, 7810 arg0: Type, 7811 arg1: Type, 7812 arg2: Reg, 7813 ) -> Option<ProducesFlags> { 7814 let pattern0_0 = arg0; 7815 let pattern1_0 = arg1; 7816 let pattern2_0 = arg2; 7817 // Rule at src/isa/s390x/inst.isle line 3177. 7818 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7819 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7820 return Some(expr1_0); 7821 } 7822 7823 // Generated as internal constructor for term fcvt_to_sint_reg. 7824 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7825 ctx: &mut C, 7826 arg0: Type, 7827 arg1: Type, 7828 arg2: Reg, 7829 ) -> Option<Reg> { 7830 let pattern0_0 = arg0; 7831 let pattern1_0 = arg1; 7832 let pattern2_0 = arg2; 7833 // Rule at src/isa/s390x/inst.isle line 3181. 7834 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7835 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7836 return Some(expr1_0); 7837 } 7838 7839 // Generated as internal constructor for term cmpop_cmps. 7840 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7841 let pattern0_0 = arg0; 7842 if pattern0_0 == I32 { 7843 // Rule at src/isa/s390x/inst.isle line 3188. 7844 let expr0_0 = CmpOp::CmpS32; 7845 return Some(expr0_0); 7846 } 7847 if pattern0_0 == I64 { 7848 // Rule at src/isa/s390x/inst.isle line 3189. 7849 let expr0_0 = CmpOp::CmpS64; 7850 return Some(expr0_0); 7851 } 7852 return None; 7853 } 7854 7855 // Generated as internal constructor for term cmpop_cmps_sext16. 7856 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7857 let pattern0_0 = arg0; 7858 if pattern0_0 == I32 { 7859 // Rule at src/isa/s390x/inst.isle line 3192. 7860 let expr0_0 = CmpOp::CmpS32Ext16; 7861 return Some(expr0_0); 7862 } 7863 if pattern0_0 == I64 { 7864 // Rule at src/isa/s390x/inst.isle line 3193. 7865 let expr0_0 = CmpOp::CmpS64Ext16; 7866 return Some(expr0_0); 7867 } 7868 return None; 7869 } 7870 7871 // Generated as internal constructor for term cmpop_cmps_sext32. 7872 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7873 let pattern0_0 = arg0; 7874 if pattern0_0 == I64 { 7875 // Rule at src/isa/s390x/inst.isle line 3196. 7876 let expr0_0 = CmpOp::CmpS64Ext32; 7877 return Some(expr0_0); 7878 } 7879 return None; 7880 } 7881 7882 // Generated as internal constructor for term icmps_reg. 7883 pub fn constructor_icmps_reg<C: Context>( 7884 ctx: &mut C, 7885 arg0: Type, 7886 arg1: Reg, 7887 arg2: Reg, 7888 ) -> Option<ProducesFlags> { 7889 let pattern0_0 = arg0; 7890 let pattern1_0 = arg1; 7891 let pattern2_0 = arg2; 7892 // Rule at src/isa/s390x/inst.isle line 3199. 7893 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7894 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7895 return Some(expr1_0); 7896 } 7897 7898 // Generated as internal constructor for term icmps_reg_sext32. 7899 pub fn constructor_icmps_reg_sext32<C: Context>( 7900 ctx: &mut C, 7901 arg0: Type, 7902 arg1: Reg, 7903 arg2: Reg, 7904 ) -> Option<ProducesFlags> { 7905 let pattern0_0 = arg0; 7906 let pattern1_0 = arg1; 7907 let pattern2_0 = arg2; 7908 // Rule at src/isa/s390x/inst.isle line 3202. 7909 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7910 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7911 return Some(expr1_0); 7912 } 7913 7914 // Generated as internal constructor for term icmps_simm16. 7915 pub fn constructor_icmps_simm16<C: Context>( 7916 ctx: &mut C, 7917 arg0: Type, 7918 arg1: Reg, 7919 arg2: i16, 7920 ) -> Option<ProducesFlags> { 7921 let pattern0_0 = arg0; 7922 let pattern1_0 = arg1; 7923 let pattern2_0 = arg2; 7924 // Rule at src/isa/s390x/inst.isle line 3205. 7925 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7926 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7927 return Some(expr1_0); 7928 } 7929 7930 // Generated as internal constructor for term icmps_simm32. 7931 pub fn constructor_icmps_simm32<C: Context>( 7932 ctx: &mut C, 7933 arg0: Type, 7934 arg1: Reg, 7935 arg2: i32, 7936 ) -> Option<ProducesFlags> { 7937 let pattern0_0 = arg0; 7938 let pattern1_0 = arg1; 7939 let pattern2_0 = arg2; 7940 // Rule at src/isa/s390x/inst.isle line 3208. 7941 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7942 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7943 return Some(expr1_0); 7944 } 7945 7946 // Generated as internal constructor for term icmps_mem. 7947 pub fn constructor_icmps_mem<C: Context>( 7948 ctx: &mut C, 7949 arg0: Type, 7950 arg1: Reg, 7951 arg2: &MemArg, 7952 ) -> Option<ProducesFlags> { 7953 let pattern0_0 = arg0; 7954 let pattern1_0 = arg1; 7955 let pattern2_0 = arg2; 7956 // Rule at src/isa/s390x/inst.isle line 3211. 7957 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7958 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7959 return Some(expr1_0); 7960 } 7961 7962 // Generated as internal constructor for term icmps_mem_sext16. 7963 pub fn constructor_icmps_mem_sext16<C: Context>( 7964 ctx: &mut C, 7965 arg0: Type, 7966 arg1: Reg, 7967 arg2: &MemArg, 7968 ) -> Option<ProducesFlags> { 7969 let pattern0_0 = arg0; 7970 let pattern1_0 = arg1; 7971 let pattern2_0 = arg2; 7972 // Rule at src/isa/s390x/inst.isle line 3214. 7973 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7974 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7975 return Some(expr1_0); 7976 } 7977 7978 // Generated as internal constructor for term icmps_mem_sext32. 7979 pub fn constructor_icmps_mem_sext32<C: Context>( 7980 ctx: &mut C, 7981 arg0: Type, 7982 arg1: Reg, 7983 arg2: &MemArg, 7984 ) -> Option<ProducesFlags> { 7985 let pattern0_0 = arg0; 7986 let pattern1_0 = arg1; 7987 let pattern2_0 = arg2; 7988 // Rule at src/isa/s390x/inst.isle line 3217. 7989 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7990 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7991 return Some(expr1_0); 7992 } 7993 7994 // Generated as internal constructor for term cmpop_cmpu. 7995 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7996 let pattern0_0 = arg0; 7997 if pattern0_0 == I32 { 7998 // Rule at src/isa/s390x/inst.isle line 3223. 7999 let expr0_0 = CmpOp::CmpL32; 8000 return Some(expr0_0); 8001 } 8002 if pattern0_0 == I64 { 8003 // Rule at src/isa/s390x/inst.isle line 3224. 8004 let expr0_0 = CmpOp::CmpL64; 8005 return Some(expr0_0); 8006 } 8007 return None; 8008 } 8009 8010 // Generated as internal constructor for term cmpop_cmpu_zext16. 8011 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 8012 let pattern0_0 = arg0; 8013 if pattern0_0 == I32 { 8014 // Rule at src/isa/s390x/inst.isle line 3227. 8015 let expr0_0 = CmpOp::CmpL32Ext16; 8016 return Some(expr0_0); 8017 } 8018 if pattern0_0 == I64 { 8019 // Rule at src/isa/s390x/inst.isle line 3228. 8020 let expr0_0 = CmpOp::CmpL64Ext16; 8021 return Some(expr0_0); 8022 } 8023 return None; 8024 } 8025 8026 // Generated as internal constructor for term cmpop_cmpu_zext32. 8027 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 8028 let pattern0_0 = arg0; 8029 if pattern0_0 == I64 { 8030 // Rule at src/isa/s390x/inst.isle line 3231. 8031 let expr0_0 = CmpOp::CmpL64Ext32; 8032 return Some(expr0_0); 8033 } 8034 return None; 8035 } 8036 8037 // Generated as internal constructor for term icmpu_reg. 8038 pub fn constructor_icmpu_reg<C: Context>( 8039 ctx: &mut C, 8040 arg0: Type, 8041 arg1: Reg, 8042 arg2: Reg, 8043 ) -> Option<ProducesFlags> { 8044 let pattern0_0 = arg0; 8045 let pattern1_0 = arg1; 8046 let pattern2_0 = arg2; 8047 // Rule at src/isa/s390x/inst.isle line 3234. 8048 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 8049 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8050 return Some(expr1_0); 8051 } 8052 8053 // Generated as internal constructor for term icmpu_reg_zext32. 8054 pub fn constructor_icmpu_reg_zext32<C: Context>( 8055 ctx: &mut C, 8056 arg0: Type, 8057 arg1: Reg, 8058 arg2: Reg, 8059 ) -> Option<ProducesFlags> { 8060 let pattern0_0 = arg0; 8061 let pattern1_0 = arg1; 8062 let pattern2_0 = arg2; 8063 // Rule at src/isa/s390x/inst.isle line 3237. 8064 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 8065 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8066 return Some(expr1_0); 8067 } 8068 8069 // Generated as internal constructor for term icmpu_uimm32. 8070 pub fn constructor_icmpu_uimm32<C: Context>( 8071 ctx: &mut C, 8072 arg0: Type, 8073 arg1: Reg, 8074 arg2: u32, 8075 ) -> Option<ProducesFlags> { 8076 let pattern0_0 = arg0; 8077 let pattern1_0 = arg1; 8078 let pattern2_0 = arg2; 8079 // Rule at src/isa/s390x/inst.isle line 3240. 8080 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 8081 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8082 return Some(expr1_0); 8083 } 8084 8085 // Generated as internal constructor for term icmpu_mem. 8086 pub fn constructor_icmpu_mem<C: Context>( 8087 ctx: &mut C, 8088 arg0: Type, 8089 arg1: Reg, 8090 arg2: &MemArg, 8091 ) -> Option<ProducesFlags> { 8092 let pattern0_0 = arg0; 8093 let pattern1_0 = arg1; 8094 let pattern2_0 = arg2; 8095 // Rule at src/isa/s390x/inst.isle line 3243. 8096 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 8097 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8098 return Some(expr1_0); 8099 } 8100 8101 // Generated as internal constructor for term icmpu_mem_zext16. 8102 pub fn constructor_icmpu_mem_zext16<C: Context>( 8103 ctx: &mut C, 8104 arg0: Type, 8105 arg1: Reg, 8106 arg2: &MemArg, 8107 ) -> Option<ProducesFlags> { 8108 let pattern0_0 = arg0; 8109 let pattern1_0 = arg1; 8110 let pattern2_0 = arg2; 8111 // Rule at src/isa/s390x/inst.isle line 3246. 8112 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 8113 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8114 return Some(expr1_0); 8115 } 8116 8117 // Generated as internal constructor for term icmpu_mem_zext32. 8118 pub fn constructor_icmpu_mem_zext32<C: Context>( 8119 ctx: &mut C, 8120 arg0: Type, 8121 arg1: Reg, 8122 arg2: &MemArg, 8123 ) -> Option<ProducesFlags> { 8124 let pattern0_0 = arg0; 8125 let pattern1_0 = arg1; 8126 let pattern2_0 = arg2; 8127 // Rule at src/isa/s390x/inst.isle line 3249. 8128 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 8129 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 8130 return Some(expr1_0); 8131 } 8132 8133 // Generated as internal constructor for term fcmp_reg. 8134 pub fn constructor_fcmp_reg<C: Context>( 8135 ctx: &mut C, 8136 arg0: Type, 8137 arg1: Reg, 8138 arg2: Reg, 8139 ) -> Option<ProducesFlags> { 8140 let pattern0_0 = arg0; 8141 if pattern0_0 == F32 { 8142 let pattern2_0 = arg1; 8143 let pattern3_0 = arg2; 8144 // Rule at src/isa/s390x/inst.isle line 3255. 8145 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 8146 return Some(expr0_0); 8147 } 8148 if pattern0_0 == F64 { 8149 let pattern2_0 = arg1; 8150 let pattern3_0 = arg2; 8151 // Rule at src/isa/s390x/inst.isle line 3256. 8152 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 8153 return Some(expr0_0); 8154 } 8155 return None; 8156 } 8157 8158 // Generated as internal constructor for term lower. 8159 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 8160 let pattern0_0 = arg0; 8161 let pattern1_0 = C::inst_data(ctx, pattern0_0); 8162 match &pattern1_0 { 8163 &InstructionData::NullAry { 8164 opcode: ref pattern2_0, 8165 } => { 8166 match pattern2_0 { 8167 &Opcode::Debugtrap => { 8168 // Rule at src/isa/s390x/lower.isle line 2176. 8169 let expr0_0 = constructor_debugtrap_impl(ctx)?; 8170 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8171 return Some(expr1_0); 8172 } 8173 &Opcode::Nop => { 8174 // Rule at src/isa/s390x/lower.isle line 47. 8175 let expr0_0 = C::invalid_reg(ctx); 8176 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8177 return Some(expr1_0); 8178 } 8179 &Opcode::Fence => { 8180 // Rule at src/isa/s390x/lower.isle line 1887. 8181 let expr0_0 = constructor_fence_impl(ctx)?; 8182 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8183 return Some(expr1_0); 8184 } 8185 _ => {} 8186 } 8187 } 8188 &InstructionData::FuncAddr { 8189 opcode: ref pattern2_0, 8190 func_ref: pattern2_1, 8191 } => { 8192 if let &Opcode::FuncAddr = pattern2_0 { 8193 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8194 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8195 // Rule at src/isa/s390x/lower.isle line 1163. 8196 let expr0_0: i32 = 0; 8197 let expr1_0 = C::memflags_trusted(ctx); 8198 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8199 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8200 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8201 return Some(expr4_0); 8202 } 8203 // Rule at src/isa/s390x/lower.isle line 1167. 8204 let expr0_0: i64 = 0; 8205 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8206 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8207 return Some(expr2_0); 8208 } 8209 } 8210 &InstructionData::UnaryGlobalValue { 8211 opcode: ref pattern2_0, 8212 global_value: pattern2_1, 8213 } => { 8214 if let &Opcode::SymbolValue = pattern2_0 { 8215 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8216 C::symbol_value_data(ctx, pattern2_1) 8217 { 8218 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8219 let mut closure6 = || { 8220 let expr0_0 = constructor_memarg_symbol_offset(ctx, pattern4_2)?; 8221 return Some(expr0_0); 8222 }; 8223 if let Some(pattern6_0) = closure6() { 8224 // Rule at src/isa/s390x/lower.isle line 1174. 8225 let expr0_0 = C::memflags_trusted(ctx); 8226 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern6_0, expr0_0); 8227 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8228 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8229 return Some(expr3_0); 8230 } 8231 } 8232 // Rule at src/isa/s390x/lower.isle line 1180. 8233 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8234 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8235 return Some(expr1_0); 8236 } 8237 } 8238 } 8239 &InstructionData::UnaryIeee32 { 8240 opcode: ref pattern2_0, 8241 imm: pattern2_1, 8242 } => { 8243 if let &Opcode::F32const = pattern2_0 { 8244 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8245 // Rule at src/isa/s390x/lower.isle line 29. 8246 let expr0_0: Type = F32; 8247 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8248 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8249 return Some(expr2_0); 8250 } 8251 } 8252 &InstructionData::UnaryIeee64 { 8253 opcode: ref pattern2_0, 8254 imm: pattern2_1, 8255 } => { 8256 if let &Opcode::F64const = pattern2_0 { 8257 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8258 // Rule at src/isa/s390x/lower.isle line 35. 8259 let expr0_0: Type = F64; 8260 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8261 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8262 return Some(expr2_0); 8263 } 8264 } 8265 &InstructionData::Trap { 8266 opcode: ref pattern2_0, 8267 code: ref pattern2_1, 8268 } => { 8269 match pattern2_0 { 8270 &Opcode::Trap => { 8271 // Rule at src/isa/s390x/lower.isle line 2146. 8272 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8273 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8274 return Some(expr1_0); 8275 } 8276 &Opcode::ResumableTrap => { 8277 // Rule at src/isa/s390x/lower.isle line 2152. 8278 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8279 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8280 return Some(expr1_0); 8281 } 8282 _ => {} 8283 } 8284 } 8285 &InstructionData::StoreNoOffset { 8286 opcode: ref pattern2_0, 8287 args: ref pattern2_1, 8288 flags: pattern2_2, 8289 } => { 8290 if let &Opcode::AtomicStore = pattern2_0 { 8291 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8292 let pattern5_0 = C::value_type(ctx, pattern4_0); 8293 if pattern5_0 == I8 { 8294 // Rule at src/isa/s390x/lower.isle line 1868. 8295 let expr0_0 = C::zero_offset(ctx); 8296 let expr1_0 = 8297 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8298 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8299 return Some(expr2_0); 8300 } 8301 if pattern5_0 == I16 { 8302 // Rule at src/isa/s390x/lower.isle line 1872. 8303 let expr0_0 = C::zero_offset(ctx); 8304 let expr1_0 = constructor_istore16_impl( 8305 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8306 )?; 8307 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8308 return Some(expr2_0); 8309 } 8310 if pattern5_0 == I32 { 8311 // Rule at src/isa/s390x/lower.isle line 1876. 8312 let expr0_0 = C::zero_offset(ctx); 8313 let expr1_0 = constructor_istore32_impl( 8314 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8315 )?; 8316 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8317 return Some(expr2_0); 8318 } 8319 if pattern5_0 == I64 { 8320 // Rule at src/isa/s390x/lower.isle line 1880. 8321 let expr0_0 = C::zero_offset(ctx); 8322 let expr1_0 = constructor_istore64_impl( 8323 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8324 )?; 8325 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8326 return Some(expr2_0); 8327 } 8328 } 8329 } 8330 &InstructionData::Store { 8331 opcode: ref pattern2_0, 8332 args: ref pattern2_1, 8333 flags: pattern2_2, 8334 offset: pattern2_3, 8335 } => { 8336 match pattern2_0 { 8337 &Opcode::Store => { 8338 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8339 let pattern5_0 = C::value_type(ctx, pattern4_0); 8340 if pattern5_0 == I8 { 8341 // Rule at src/isa/s390x/lower.isle line 1359. 8342 let expr0_0 = constructor_istore8_impl( 8343 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8344 )?; 8345 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8346 return Some(expr1_0); 8347 } 8348 if pattern5_0 == I16 { 8349 // Rule at src/isa/s390x/lower.isle line 1363. 8350 let expr0_0 = constructor_istore16_impl( 8351 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8352 )?; 8353 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8354 return Some(expr1_0); 8355 } 8356 if pattern5_0 == I32 { 8357 // Rule at src/isa/s390x/lower.isle line 1367. 8358 let expr0_0 = constructor_istore32_impl( 8359 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8360 )?; 8361 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8362 return Some(expr1_0); 8363 } 8364 if pattern5_0 == I64 { 8365 // Rule at src/isa/s390x/lower.isle line 1371. 8366 let expr0_0 = constructor_istore64_impl( 8367 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8368 )?; 8369 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8370 return Some(expr1_0); 8371 } 8372 if pattern5_0 == R64 { 8373 // Rule at src/isa/s390x/lower.isle line 1375. 8374 let expr0_0 = constructor_istore64_impl( 8375 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8376 )?; 8377 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8378 return Some(expr1_0); 8379 } 8380 if pattern5_0 == F32 { 8381 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8382 // Rule at src/isa/s390x/lower.isle line 1379. 8383 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8384 let expr1_0 = 8385 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8386 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8387 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8388 return Some(expr3_0); 8389 } 8390 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8391 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8392 // Rule at src/isa/s390x/lower.isle line 1385. 8393 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8394 let expr1_0 = constructor_lower_address( 8395 ctx, pattern2_2, pattern4_1, pattern2_3, 8396 )?; 8397 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8398 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8399 return Some(expr3_0); 8400 } 8401 } 8402 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8403 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8404 // Rule at src/isa/s390x/lower.isle line 1391. 8405 let expr0_0: Type = I64; 8406 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8407 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8408 let expr3_0: u8 = 32; 8409 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8410 let expr5_0 = constructor_lower_address( 8411 ctx, pattern2_2, pattern4_1, pattern2_3, 8412 )?; 8413 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8414 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8415 return Some(expr7_0); 8416 } 8417 } 8418 } 8419 if pattern5_0 == F64 { 8420 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8421 // Rule at src/isa/s390x/lower.isle line 1397. 8422 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8423 let expr1_0 = 8424 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8425 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8426 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8427 return Some(expr3_0); 8428 } 8429 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8430 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8431 // Rule at src/isa/s390x/lower.isle line 1403. 8432 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8433 let expr1_0 = constructor_lower_address( 8434 ctx, pattern2_2, pattern4_1, pattern2_3, 8435 )?; 8436 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8437 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8438 return Some(expr3_0); 8439 } 8440 } 8441 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8442 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8443 // Rule at src/isa/s390x/lower.isle line 1409. 8444 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8445 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8446 let expr2_0 = constructor_lower_address( 8447 ctx, pattern2_2, pattern4_1, pattern2_3, 8448 )?; 8449 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8450 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8451 return Some(expr4_0); 8452 } 8453 } 8454 } 8455 } 8456 &Opcode::Istore8 => { 8457 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8458 // Rule at src/isa/s390x/lower.isle line 1418. 8459 let expr0_0 = constructor_istore8_impl( 8460 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8461 )?; 8462 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8463 return Some(expr1_0); 8464 } 8465 &Opcode::Istore16 => { 8466 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8467 // Rule at src/isa/s390x/lower.isle line 1436. 8468 let expr0_0 = constructor_istore16_impl( 8469 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8470 )?; 8471 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8472 return Some(expr1_0); 8473 } 8474 &Opcode::Istore32 => { 8475 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8476 // Rule at src/isa/s390x/lower.isle line 1462. 8477 let expr0_0 = constructor_istore32_impl( 8478 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8479 )?; 8480 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8481 return Some(expr1_0); 8482 } 8483 _ => {} 8484 } 8485 } 8486 &InstructionData::Unary { 8487 opcode: ref pattern2_0, 8488 arg: pattern2_1, 8489 } => { 8490 match pattern2_0 { 8491 &Opcode::Copy => { 8492 // Rule at src/isa/s390x/lower.isle line 53. 8493 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8494 return Some(expr0_0); 8495 } 8496 &Opcode::Breduce => { 8497 // Rule at src/isa/s390x/lower.isle line 756. 8498 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8499 return Some(expr0_0); 8500 } 8501 &Opcode::Ireduce => { 8502 // Rule at src/isa/s390x/lower.isle line 600. 8503 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8504 return Some(expr0_0); 8505 } 8506 _ => {} 8507 } 8508 } 8509 &InstructionData::IntCondTrap { 8510 opcode: ref pattern2_0, 8511 arg: pattern2_1, 8512 cond: ref pattern2_2, 8513 code: ref pattern2_3, 8514 } => { 8515 if let &Opcode::Trapif = pattern2_0 { 8516 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8517 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8518 if let &InstructionData::Binary { 8519 opcode: ref pattern6_0, 8520 args: ref pattern6_1, 8521 } = &pattern5_0 8522 { 8523 match pattern6_0 { 8524 &Opcode::Ifcmp => { 8525 let (pattern8_0, pattern8_1) = 8526 C::unpack_value_array_2(ctx, pattern6_1); 8527 // Rule at src/isa/s390x/lower.isle line 2188. 8528 let expr0_0: bool = false; 8529 let expr1_0 = constructor_icmp_val( 8530 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8531 )?; 8532 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8533 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8534 return Some(expr3_0); 8535 } 8536 &Opcode::IaddIfcout => { 8537 let (pattern8_0, pattern8_1) = 8538 C::unpack_value_array_2(ctx, pattern6_1); 8539 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8540 // Rule at src/isa/s390x/lower.isle line 2213. 8541 let expr0_0: u8 = 3; 8542 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8543 let expr2_0 = 8544 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8545 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8546 return Some(expr3_0); 8547 } 8548 } 8549 _ => {} 8550 } 8551 } 8552 } 8553 } 8554 } 8555 &InstructionData::CondTrap { 8556 opcode: ref pattern2_0, 8557 arg: pattern2_1, 8558 code: ref pattern2_2, 8559 } => { 8560 match pattern2_0 { 8561 &Opcode::Trapz => { 8562 // Rule at src/isa/s390x/lower.isle line 2158. 8563 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8564 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8565 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8566 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8567 return Some(expr3_0); 8568 } 8569 &Opcode::Trapnz => { 8570 // Rule at src/isa/s390x/lower.isle line 2164. 8571 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8572 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8573 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8574 return Some(expr2_0); 8575 } 8576 &Opcode::ResumableTrapnz => { 8577 // Rule at src/isa/s390x/lower.isle line 2170. 8578 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8579 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8580 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8581 return Some(expr2_0); 8582 } 8583 _ => {} 8584 } 8585 } 8586 _ => {} 8587 } 8588 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8589 let pattern2_0 = C::value_type(ctx, pattern1_0); 8590 if pattern2_0 == B1 { 8591 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8592 if let &InstructionData::Unary { 8593 opcode: ref pattern5_0, 8594 arg: pattern5_1, 8595 } = &pattern4_0 8596 { 8597 match pattern5_0 { 8598 &Opcode::IsNull => { 8599 let pattern7_0 = C::value_type(ctx, pattern5_1); 8600 if pattern7_0 == R64 { 8601 // Rule at src/isa/s390x/lower.isle line 2024. 8602 let expr0_0: Type = B1; 8603 let expr1_0: Type = I64; 8604 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8605 let expr3_0: i16 = 0; 8606 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8607 let expr5_0 = IntCC::Equal; 8608 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8609 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8610 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8611 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8612 return Some(expr9_0); 8613 } 8614 } 8615 &Opcode::IsInvalid => { 8616 let pattern7_0 = C::value_type(ctx, pattern5_1); 8617 if pattern7_0 == R64 { 8618 // Rule at src/isa/s390x/lower.isle line 2030. 8619 let expr0_0: Type = B1; 8620 let expr1_0: Type = I64; 8621 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8622 let expr3_0: i16 = -1; 8623 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8624 let expr5_0 = IntCC::Equal; 8625 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8626 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8627 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8628 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8629 return Some(expr9_0); 8630 } 8631 } 8632 _ => {} 8633 } 8634 } 8635 } 8636 if pattern2_0 == I8 { 8637 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8638 match &pattern4_0 { 8639 &InstructionData::Unary { 8640 opcode: ref pattern5_0, 8641 arg: pattern5_1, 8642 } => { 8643 if let &Opcode::Popcnt = pattern5_0 { 8644 // Rule at src/isa/s390x/lower.isle line 888. 8645 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8646 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8647 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8648 return Some(expr2_0); 8649 } 8650 } 8651 &InstructionData::LoadNoOffset { 8652 opcode: ref pattern5_0, 8653 arg: pattern5_1, 8654 flags: pattern5_2, 8655 } => { 8656 if let &Opcode::AtomicLoad = pattern5_0 { 8657 // Rule at src/isa/s390x/lower.isle line 1831. 8658 let expr0_0: Type = I8; 8659 let expr1_0 = C::zero_offset(ctx); 8660 let expr2_0 = 8661 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8662 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8663 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8664 return Some(expr4_0); 8665 } 8666 } 8667 &InstructionData::Load { 8668 opcode: ref pattern5_0, 8669 arg: pattern5_1, 8670 flags: pattern5_2, 8671 offset: pattern5_3, 8672 } => { 8673 if let &Opcode::Load = pattern5_0 { 8674 // Rule at src/isa/s390x/lower.isle line 1187. 8675 let expr0_0: Type = I8; 8676 let expr1_0 = 8677 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8678 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8679 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8680 return Some(expr3_0); 8681 } 8682 } 8683 _ => {} 8684 } 8685 } 8686 if pattern2_0 == I16 { 8687 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8688 match &pattern4_0 { 8689 &InstructionData::LoadNoOffset { 8690 opcode: ref pattern5_0, 8691 arg: pattern5_1, 8692 flags: pattern5_2, 8693 } => { 8694 if let &Opcode::AtomicLoad = pattern5_0 { 8695 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8696 // Rule at src/isa/s390x/lower.isle line 1839. 8697 let expr0_0 = C::zero_offset(ctx); 8698 let expr1_0 = 8699 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8700 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8701 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8702 return Some(expr3_0); 8703 } 8704 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8705 // Rule at src/isa/s390x/lower.isle line 1835. 8706 let expr0_0: Type = I16; 8707 let expr1_0 = C::zero_offset(ctx); 8708 let expr2_0 = 8709 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8710 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8711 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8712 return Some(expr4_0); 8713 } 8714 } 8715 } 8716 &InstructionData::Load { 8717 opcode: ref pattern5_0, 8718 arg: pattern5_1, 8719 flags: pattern5_2, 8720 offset: pattern5_3, 8721 } => { 8722 if let &Opcode::Load = pattern5_0 { 8723 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8724 // Rule at src/isa/s390x/lower.isle line 1195. 8725 let expr0_0 = 8726 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8727 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8728 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8729 return Some(expr2_0); 8730 } 8731 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8732 // Rule at src/isa/s390x/lower.isle line 1191. 8733 let expr0_0: Type = I16; 8734 let expr1_0 = 8735 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8736 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8737 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8738 return Some(expr3_0); 8739 } 8740 } 8741 } 8742 _ => {} 8743 } 8744 } 8745 if pattern2_0 == I32 { 8746 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8747 match &pattern4_0 { 8748 &InstructionData::Binary { 8749 opcode: ref pattern5_0, 8750 args: ref pattern5_1, 8751 } => { 8752 match pattern5_0 { 8753 &Opcode::Umulhi => { 8754 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8755 // Rule at src/isa/s390x/lower.isle line 252. 8756 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8757 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8758 let expr2_0: Type = I64; 8759 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8760 let expr4_0: Type = I64; 8761 let expr5_0: u8 = 32; 8762 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8763 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8764 return Some(expr7_0); 8765 } 8766 &Opcode::Smulhi => { 8767 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8768 // Rule at src/isa/s390x/lower.isle line 274. 8769 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8770 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8771 let expr2_0: Type = I64; 8772 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8773 let expr4_0: Type = I64; 8774 let expr5_0: u8 = 32; 8775 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8776 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8777 return Some(expr7_0); 8778 } 8779 _ => {} 8780 } 8781 } 8782 &InstructionData::Unary { 8783 opcode: ref pattern5_0, 8784 arg: pattern5_1, 8785 } => { 8786 if let &Opcode::Bitcast = pattern5_0 { 8787 let pattern7_0 = C::value_type(ctx, pattern5_1); 8788 if pattern7_0 == F32 { 8789 // Rule at src/isa/s390x/lower.isle line 1149. 8790 let expr0_0: Type = I64; 8791 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8792 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8793 let expr3_0: u8 = 32; 8794 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8795 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8796 return Some(expr5_0); 8797 } 8798 } 8799 } 8800 &InstructionData::LoadNoOffset { 8801 opcode: ref pattern5_0, 8802 arg: pattern5_1, 8803 flags: pattern5_2, 8804 } => { 8805 if let &Opcode::AtomicLoad = pattern5_0 { 8806 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8807 // Rule at src/isa/s390x/lower.isle line 1847. 8808 let expr0_0 = C::zero_offset(ctx); 8809 let expr1_0 = 8810 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8811 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8812 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8813 return Some(expr3_0); 8814 } 8815 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8816 // Rule at src/isa/s390x/lower.isle line 1843. 8817 let expr0_0 = C::zero_offset(ctx); 8818 let expr1_0 = 8819 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8820 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8821 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8822 return Some(expr3_0); 8823 } 8824 } 8825 } 8826 &InstructionData::Load { 8827 opcode: ref pattern5_0, 8828 arg: pattern5_1, 8829 flags: pattern5_2, 8830 offset: pattern5_3, 8831 } => { 8832 if let &Opcode::Load = pattern5_0 { 8833 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8834 // Rule at src/isa/s390x/lower.isle line 1203. 8835 let expr0_0 = 8836 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8837 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8838 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8839 return Some(expr2_0); 8840 } 8841 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8842 // Rule at src/isa/s390x/lower.isle line 1199. 8843 let expr0_0 = 8844 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8845 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8846 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8847 return Some(expr2_0); 8848 } 8849 } 8850 } 8851 _ => {} 8852 } 8853 } 8854 if pattern2_0 == I64 { 8855 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8856 match &pattern4_0 { 8857 &InstructionData::Binary { 8858 opcode: ref pattern5_0, 8859 args: ref pattern5_1, 8860 } => { 8861 match pattern5_0 { 8862 &Opcode::Umulhi => { 8863 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8864 // Rule at src/isa/s390x/lower.isle line 259. 8865 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8866 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8867 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8868 let expr3_0: Type = I64; 8869 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8870 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8871 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8872 return Some(expr6_0); 8873 } 8874 &Opcode::Smulhi => { 8875 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8876 // Rule at src/isa/s390x/lower.isle line 281. 8877 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8878 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8879 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8880 let expr3_0: Type = I64; 8881 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8882 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8883 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8884 return Some(expr6_0); 8885 } 8886 _ => {} 8887 } 8888 } 8889 &InstructionData::Unary { 8890 opcode: ref pattern5_0, 8891 arg: pattern5_1, 8892 } => { 8893 if let &Opcode::Bitcast = pattern5_0 { 8894 let pattern7_0 = C::value_type(ctx, pattern5_1); 8895 if pattern7_0 == F64 { 8896 // Rule at src/isa/s390x/lower.isle line 1139. 8897 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8898 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8899 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8900 return Some(expr2_0); 8901 } 8902 } 8903 } 8904 &InstructionData::LoadNoOffset { 8905 opcode: ref pattern5_0, 8906 arg: pattern5_1, 8907 flags: pattern5_2, 8908 } => { 8909 if let &Opcode::AtomicLoad = pattern5_0 { 8910 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8911 // Rule at src/isa/s390x/lower.isle line 1855. 8912 let expr0_0 = C::zero_offset(ctx); 8913 let expr1_0 = 8914 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8915 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8916 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8917 return Some(expr3_0); 8918 } 8919 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8920 // Rule at src/isa/s390x/lower.isle line 1851. 8921 let expr0_0 = C::zero_offset(ctx); 8922 let expr1_0 = 8923 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8924 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8925 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8926 return Some(expr3_0); 8927 } 8928 } 8929 } 8930 &InstructionData::Load { 8931 opcode: ref pattern5_0, 8932 arg: pattern5_1, 8933 flags: pattern5_2, 8934 offset: pattern5_3, 8935 } => { 8936 if let &Opcode::Load = pattern5_0 { 8937 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8938 // Rule at src/isa/s390x/lower.isle line 1211. 8939 let expr0_0 = 8940 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8941 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8942 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8943 return Some(expr2_0); 8944 } 8945 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8946 // Rule at src/isa/s390x/lower.isle line 1207. 8947 let expr0_0 = 8948 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8949 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8950 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8951 return Some(expr2_0); 8952 } 8953 } 8954 } 8955 _ => {} 8956 } 8957 } 8958 if pattern2_0 == R64 { 8959 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8960 if let &InstructionData::Load { 8961 opcode: ref pattern5_0, 8962 arg: pattern5_1, 8963 flags: pattern5_2, 8964 offset: pattern5_3, 8965 } = &pattern4_0 8966 { 8967 if let &Opcode::Load = pattern5_0 { 8968 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8969 // Rule at src/isa/s390x/lower.isle line 1219. 8970 let expr0_0 = 8971 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8972 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8973 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8974 return Some(expr2_0); 8975 } 8976 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8977 // Rule at src/isa/s390x/lower.isle line 1215. 8978 let expr0_0 = 8979 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8980 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8981 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8982 return Some(expr2_0); 8983 } 8984 } 8985 } 8986 } 8987 if pattern2_0 == F32 { 8988 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8989 match &pattern4_0 { 8990 &InstructionData::Unary { 8991 opcode: ref pattern5_0, 8992 arg: pattern5_1, 8993 } => { 8994 if let &Opcode::Bitcast = pattern5_0 { 8995 let pattern7_0 = C::value_type(ctx, pattern5_1); 8996 if pattern7_0 == I32 { 8997 // Rule at src/isa/s390x/lower.isle line 1144. 8998 let expr0_0: Type = I64; 8999 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 9000 let expr2_0: u8 = 32; 9001 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 9002 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 9003 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9004 return Some(expr5_0); 9005 } 9006 } 9007 } 9008 &InstructionData::Load { 9009 opcode: ref pattern5_0, 9010 arg: pattern5_1, 9011 flags: pattern5_2, 9012 offset: pattern5_3, 9013 } => { 9014 if let &Opcode::Load = pattern5_0 { 9015 if let Some(()) = C::bigendian(ctx, pattern5_2) { 9016 // Rule at src/isa/s390x/lower.isle line 1223. 9017 let expr0_0 = 9018 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 9019 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 9020 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9021 return Some(expr2_0); 9022 } 9023 } 9024 } 9025 _ => {} 9026 } 9027 } 9028 if pattern2_0 == F64 { 9029 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9030 match &pattern4_0 { 9031 &InstructionData::Unary { 9032 opcode: ref pattern5_0, 9033 arg: pattern5_1, 9034 } => { 9035 if let &Opcode::Bitcast = pattern5_0 { 9036 let pattern7_0 = C::value_type(ctx, pattern5_1); 9037 if pattern7_0 == I64 { 9038 // Rule at src/isa/s390x/lower.isle line 1135. 9039 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9040 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 9041 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9042 return Some(expr2_0); 9043 } 9044 } 9045 } 9046 &InstructionData::Load { 9047 opcode: ref pattern5_0, 9048 arg: pattern5_1, 9049 flags: pattern5_2, 9050 offset: pattern5_3, 9051 } => { 9052 if let &Opcode::Load = pattern5_0 { 9053 if let Some(()) = C::bigendian(ctx, pattern5_2) { 9054 // Rule at src/isa/s390x/lower.isle line 1238. 9055 let expr0_0 = 9056 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 9057 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 9058 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9059 return Some(expr2_0); 9060 } 9061 } 9062 } 9063 _ => {} 9064 } 9065 } 9066 let pattern3_0 = C::inst_data(ctx, pattern0_0); 9067 match &pattern3_0 { 9068 &InstructionData::NullAry { 9069 opcode: ref pattern4_0, 9070 } => { 9071 if let &Opcode::Null = pattern4_0 { 9072 // Rule at src/isa/s390x/lower.isle line 41. 9073 let expr0_0: u64 = 0; 9074 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 9075 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9076 return Some(expr2_0); 9077 } 9078 } 9079 &InstructionData::UnaryImm { 9080 opcode: ref pattern4_0, 9081 imm: pattern4_1, 9082 } => { 9083 if let &Opcode::Iconst = pattern4_0 { 9084 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 9085 // Rule at src/isa/s390x/lower.isle line 15. 9086 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 9087 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9088 return Some(expr1_0); 9089 } 9090 } 9091 &InstructionData::StackLoad { 9092 opcode: ref pattern4_0, 9093 stack_slot: pattern4_1, 9094 offset: pattern4_2, 9095 } => { 9096 if let &Opcode::StackAddr = pattern4_0 { 9097 // Rule at src/isa/s390x/lower.isle line 1156. 9098 let expr0_0 = 9099 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 9100 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9101 return Some(expr1_0); 9102 } 9103 } 9104 &InstructionData::UnaryBool { 9105 opcode: ref pattern4_0, 9106 imm: pattern4_1, 9107 } => { 9108 if let &Opcode::Bconst = pattern4_0 { 9109 if pattern4_1 == true { 9110 // Rule at src/isa/s390x/lower.isle line 23. 9111 let expr0_0: u64 = 1; 9112 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 9113 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9114 return Some(expr2_0); 9115 } 9116 if pattern4_1 == false { 9117 // Rule at src/isa/s390x/lower.isle line 21. 9118 let expr0_0: u64 = 0; 9119 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 9120 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9121 return Some(expr2_0); 9122 } 9123 } 9124 } 9125 &InstructionData::Binary { 9126 opcode: ref pattern4_0, 9127 args: ref pattern4_1, 9128 } => { 9129 match pattern4_0 { 9130 &Opcode::Fadd => { 9131 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9132 // Rule at src/isa/s390x/lower.isle line 924. 9133 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9134 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9135 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9136 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9137 return Some(expr3_0); 9138 } 9139 &Opcode::Fsub => { 9140 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9141 // Rule at src/isa/s390x/lower.isle line 931. 9142 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9143 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9144 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9145 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9146 return Some(expr3_0); 9147 } 9148 &Opcode::Fmul => { 9149 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9150 // Rule at src/isa/s390x/lower.isle line 938. 9151 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9152 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9153 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9154 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9155 return Some(expr3_0); 9156 } 9157 &Opcode::Fdiv => { 9158 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9159 // Rule at src/isa/s390x/lower.isle line 945. 9160 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9161 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9162 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9163 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9164 return Some(expr3_0); 9165 } 9166 &Opcode::Fcopysign => { 9167 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9168 // Rule at src/isa/s390x/lower.isle line 966. 9169 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9170 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9171 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 9172 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9173 return Some(expr3_0); 9174 } 9175 &Opcode::Fmin => { 9176 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9177 // Rule at src/isa/s390x/lower.isle line 952. 9178 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9179 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9180 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9181 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9182 return Some(expr3_0); 9183 } 9184 &Opcode::Fmax => { 9185 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9186 // Rule at src/isa/s390x/lower.isle line 959. 9187 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9188 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9189 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9190 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9191 return Some(expr3_0); 9192 } 9193 _ => {} 9194 } 9195 } 9196 &InstructionData::FloatCompare { 9197 opcode: ref pattern4_0, 9198 args: ref pattern4_1, 9199 cond: ref pattern4_2, 9200 } => { 9201 if let &Opcode::Fcmp = pattern4_0 { 9202 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9203 // Rule at src/isa/s390x/lower.isle line 2011. 9204 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9205 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9206 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9207 return Some(expr2_0); 9208 } 9209 } 9210 &InstructionData::IntCompare { 9211 opcode: ref pattern4_0, 9212 args: ref pattern4_1, 9213 cond: ref pattern4_2, 9214 } => { 9215 if let &Opcode::Icmp = pattern4_0 { 9216 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9217 // Rule at src/isa/s390x/lower.isle line 1920. 9218 let expr0_0: bool = true; 9219 let expr1_0 = 9220 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9221 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9222 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9223 return Some(expr3_0); 9224 } 9225 } 9226 &InstructionData::Ternary { 9227 opcode: ref pattern4_0, 9228 args: ref pattern4_1, 9229 } => { 9230 match pattern4_0 { 9231 &Opcode::Select => { 9232 let (pattern6_0, pattern6_1, pattern6_2) = 9233 C::unpack_value_array_3(ctx, pattern4_1); 9234 // Rule at src/isa/s390x/lower.isle line 2053. 9235 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9236 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9237 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9238 let expr3_0 = constructor_select_bool_reg( 9239 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9240 )?; 9241 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9242 return Some(expr4_0); 9243 } 9244 &Opcode::Fma => { 9245 let (pattern6_0, pattern6_1, pattern6_2) = 9246 C::unpack_value_array_3(ctx, pattern4_1); 9247 // Rule at src/isa/s390x/lower.isle line 973. 9248 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9249 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9250 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9251 let expr3_0 = 9252 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9253 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9254 return Some(expr4_0); 9255 } 9256 _ => {} 9257 } 9258 } 9259 &InstructionData::IntSelect { 9260 opcode: ref pattern4_0, 9261 args: ref pattern4_1, 9262 cond: ref pattern4_2, 9263 } => { 9264 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9265 let (pattern6_0, pattern6_1, pattern6_2) = 9266 C::unpack_value_array_3(ctx, pattern4_1); 9267 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9268 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9269 if let &InstructionData::Binary { 9270 opcode: ref pattern9_0, 9271 args: ref pattern9_1, 9272 } = &pattern8_0 9273 { 9274 if let &Opcode::Ifcmp = pattern9_0 { 9275 let (pattern11_0, pattern11_1) = 9276 C::unpack_value_array_2(ctx, pattern9_1); 9277 // Rule at src/isa/s390x/lower.isle line 2065. 9278 let expr0_0: bool = false; 9279 let expr1_0 = constructor_icmp_val( 9280 ctx, 9281 expr0_0, 9282 pattern4_2, 9283 pattern11_0, 9284 pattern11_1, 9285 )?; 9286 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9287 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9288 let expr4_0 = constructor_select_bool_reg( 9289 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9290 )?; 9291 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9292 return Some(expr5_0); 9293 } 9294 } 9295 } 9296 } 9297 } 9298 &InstructionData::Unary { 9299 opcode: ref pattern4_0, 9300 arg: pattern4_1, 9301 } => { 9302 match pattern4_0 { 9303 &Opcode::Sqrt => { 9304 // Rule at src/isa/s390x/lower.isle line 980. 9305 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9306 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9307 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9308 return Some(expr2_0); 9309 } 9310 &Opcode::Fneg => { 9311 // Rule at src/isa/s390x/lower.isle line 987. 9312 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9313 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9314 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9315 return Some(expr2_0); 9316 } 9317 &Opcode::Fabs => { 9318 // Rule at src/isa/s390x/lower.isle line 994. 9319 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9320 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9321 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9322 return Some(expr2_0); 9323 } 9324 &Opcode::Ceil => { 9325 // Rule at src/isa/s390x/lower.isle line 1001. 9326 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9327 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9328 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9329 return Some(expr2_0); 9330 } 9331 &Opcode::Floor => { 9332 // Rule at src/isa/s390x/lower.isle line 1008. 9333 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9334 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9335 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9336 return Some(expr2_0); 9337 } 9338 &Opcode::Trunc => { 9339 // Rule at src/isa/s390x/lower.isle line 1015. 9340 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9341 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9342 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9343 return Some(expr2_0); 9344 } 9345 &Opcode::Nearest => { 9346 // Rule at src/isa/s390x/lower.isle line 1022. 9347 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9348 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9349 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9350 return Some(expr2_0); 9351 } 9352 &Opcode::Bextend => { 9353 // Rule at src/isa/s390x/lower.isle line 764. 9354 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9355 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9356 return Some(expr1_0); 9357 } 9358 &Opcode::Bmask => { 9359 // Rule at src/isa/s390x/lower.isle line 766. 9360 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9361 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9362 return Some(expr1_0); 9363 } 9364 &Opcode::Fpromote => { 9365 let pattern6_0 = C::value_type(ctx, pattern4_1); 9366 // Rule at src/isa/s390x/lower.isle line 1029. 9367 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9368 let expr1_0 = 9369 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9370 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9371 return Some(expr2_0); 9372 } 9373 &Opcode::Fdemote => { 9374 let pattern6_0 = C::value_type(ctx, pattern4_1); 9375 // Rule at src/isa/s390x/lower.isle line 1036. 9376 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9377 let expr1_0 = 9378 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9379 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9380 return Some(expr2_0); 9381 } 9382 &Opcode::FcvtFromUint => { 9383 let pattern6_0 = C::value_type(ctx, pattern4_1); 9384 // Rule at src/isa/s390x/lower.isle line 1043. 9385 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9386 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9387 let expr2_0 = 9388 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9389 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9390 return Some(expr3_0); 9391 } 9392 &Opcode::FcvtFromSint => { 9393 let pattern6_0 = C::value_type(ctx, pattern4_1); 9394 // Rule at src/isa/s390x/lower.isle line 1051. 9395 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9396 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9397 let expr2_0 = 9398 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9399 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9400 return Some(expr3_0); 9401 } 9402 _ => {} 9403 } 9404 } 9405 _ => {} 9406 } 9407 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9408 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9409 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9410 match &pattern5_0 { 9411 &InstructionData::Binary { 9412 opcode: ref pattern6_0, 9413 args: ref pattern6_1, 9414 } => { 9415 match pattern6_0 { 9416 &Opcode::BandNot => { 9417 let (pattern8_0, pattern8_1) = 9418 C::unpack_value_array_2(ctx, pattern6_1); 9419 // Rule at src/isa/s390x/lower.isle line 706. 9420 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9421 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9422 let expr2_0 = 9423 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9424 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9425 return Some(expr3_0); 9426 } 9427 &Opcode::BorNot => { 9428 let (pattern8_0, pattern8_1) = 9429 C::unpack_value_array_2(ctx, pattern6_1); 9430 // Rule at src/isa/s390x/lower.isle line 717. 9431 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9432 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9433 let expr2_0 = 9434 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9435 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9436 return Some(expr3_0); 9437 } 9438 &Opcode::BxorNot => { 9439 let (pattern8_0, pattern8_1) = 9440 C::unpack_value_array_2(ctx, pattern6_1); 9441 // Rule at src/isa/s390x/lower.isle line 728. 9442 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9443 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9444 let expr2_0 = 9445 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9446 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9447 return Some(expr3_0); 9448 } 9449 _ => {} 9450 } 9451 } 9452 &InstructionData::Ternary { 9453 opcode: ref pattern6_0, 9454 args: ref pattern6_1, 9455 } => { 9456 if let &Opcode::Bitselect = pattern6_0 { 9457 let (pattern8_0, pattern8_1, pattern8_2) = 9458 C::unpack_value_array_3(ctx, pattern6_1); 9459 // Rule at src/isa/s390x/lower.isle line 739. 9460 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9461 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9462 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9463 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9464 let expr4_0 = 9465 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9466 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9467 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9468 return Some(expr6_0); 9469 } 9470 } 9471 &InstructionData::Unary { 9472 opcode: ref pattern6_0, 9473 arg: pattern6_1, 9474 } => { 9475 match pattern6_0 { 9476 &Opcode::Bnot => { 9477 // Rule at src/isa/s390x/lower.isle line 629. 9478 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9479 let expr1_0 = 9480 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9481 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9482 return Some(expr2_0); 9483 } 9484 &Opcode::Popcnt => { 9485 // Rule at src/isa/s390x/lower.isle line 893. 9486 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9487 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9488 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9489 return Some(expr2_0); 9490 } 9491 _ => {} 9492 } 9493 } 9494 _ => {} 9495 } 9496 } 9497 } 9498 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9499 if pattern2_0 == I16 { 9500 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9501 if let &InstructionData::Unary { 9502 opcode: ref pattern6_0, 9503 arg: pattern6_1, 9504 } = &pattern5_0 9505 { 9506 if let &Opcode::Popcnt = pattern6_0 { 9507 // Rule at src/isa/s390x/lower.isle line 902. 9508 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9509 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9510 let expr2_0: Type = I32; 9511 let expr3_0: Type = I32; 9512 let expr4_0: u8 = 8; 9513 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9514 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9515 let expr7_0: Type = I32; 9516 let expr8_0: u8 = 8; 9517 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9518 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9519 return Some(expr10_0); 9520 } 9521 } 9522 } 9523 if pattern2_0 == I32 { 9524 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9525 if let &InstructionData::Unary { 9526 opcode: ref pattern6_0, 9527 arg: pattern6_1, 9528 } = &pattern5_0 9529 { 9530 if let &Opcode::Popcnt = pattern6_0 { 9531 // Rule at src/isa/s390x/lower.isle line 907. 9532 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9533 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9534 let expr2_0: Type = I32; 9535 let expr3_0: Type = I32; 9536 let expr4_0: u8 = 16; 9537 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9538 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9539 let expr7_0: Type = I32; 9540 let expr8_0: Type = I32; 9541 let expr9_0: u8 = 8; 9542 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9543 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9544 let expr12_0: Type = I32; 9545 let expr13_0: u8 = 24; 9546 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9547 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9548 return Some(expr15_0); 9549 } 9550 } 9551 } 9552 if pattern2_0 == I64 { 9553 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9554 if let &InstructionData::Unary { 9555 opcode: ref pattern6_0, 9556 arg: pattern6_1, 9557 } = &pattern5_0 9558 { 9559 if let &Opcode::Popcnt = pattern6_0 { 9560 // Rule at src/isa/s390x/lower.isle line 913. 9561 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9562 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9563 let expr2_0: Type = I64; 9564 let expr3_0: Type = I64; 9565 let expr4_0: u8 = 32; 9566 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9567 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9568 let expr7_0: Type = I64; 9569 let expr8_0: Type = I64; 9570 let expr9_0: u8 = 16; 9571 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9572 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9573 let expr12_0: Type = I64; 9574 let expr13_0: Type = I64; 9575 let expr14_0: u8 = 8; 9576 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9577 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9578 let expr17_0: Type = I64; 9579 let expr18_0: u8 = 56; 9580 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9581 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9582 return Some(expr20_0); 9583 } 9584 } 9585 } 9586 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9587 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9588 match &pattern5_0 { 9589 &InstructionData::Binary { 9590 opcode: ref pattern6_0, 9591 args: ref pattern6_1, 9592 } => { 9593 match pattern6_0 { 9594 &Opcode::BandNot => { 9595 let (pattern8_0, pattern8_1) = 9596 C::unpack_value_array_2(ctx, pattern6_1); 9597 // Rule at src/isa/s390x/lower.isle line 710. 9598 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9599 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9600 let expr2_0 = 9601 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9602 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9603 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9604 return Some(expr4_0); 9605 } 9606 &Opcode::BorNot => { 9607 let (pattern8_0, pattern8_1) = 9608 C::unpack_value_array_2(ctx, pattern6_1); 9609 // Rule at src/isa/s390x/lower.isle line 721. 9610 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9611 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9612 let expr2_0 = 9613 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9614 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9615 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9616 return Some(expr4_0); 9617 } 9618 &Opcode::BxorNot => { 9619 let (pattern8_0, pattern8_1) = 9620 C::unpack_value_array_2(ctx, pattern6_1); 9621 // Rule at src/isa/s390x/lower.isle line 732. 9622 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9623 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9624 let expr2_0 = 9625 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9626 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9627 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9628 return Some(expr4_0); 9629 } 9630 _ => {} 9631 } 9632 } 9633 &InstructionData::Ternary { 9634 opcode: ref pattern6_0, 9635 args: ref pattern6_1, 9636 } => { 9637 if let &Opcode::Bitselect = pattern6_0 { 9638 let (pattern8_0, pattern8_1, pattern8_2) = 9639 C::unpack_value_array_3(ctx, pattern6_1); 9640 // Rule at src/isa/s390x/lower.isle line 746. 9641 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9642 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9643 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9644 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9645 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9646 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9647 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9648 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9649 return Some(expr7_0); 9650 } 9651 } 9652 &InstructionData::Unary { 9653 opcode: ref pattern6_0, 9654 arg: pattern6_1, 9655 } => { 9656 if let &Opcode::Bnot = pattern6_0 { 9657 // Rule at src/isa/s390x/lower.isle line 634. 9658 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9659 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9660 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9661 return Some(expr2_0); 9662 } 9663 } 9664 _ => {} 9665 } 9666 } 9667 } 9668 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9669 if pattern2_0 == F32 { 9670 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9671 if let &InstructionData::Load { 9672 opcode: ref pattern6_0, 9673 arg: pattern6_1, 9674 flags: pattern6_2, 9675 offset: pattern6_3, 9676 } = &pattern5_0 9677 { 9678 if let &Opcode::Load = pattern6_0 { 9679 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9680 // Rule at src/isa/s390x/lower.isle line 1227. 9681 let expr0_0 = 9682 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9683 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9684 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9685 return Some(expr2_0); 9686 } 9687 } 9688 } 9689 } 9690 if pattern2_0 == F64 { 9691 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9692 if let &InstructionData::Load { 9693 opcode: ref pattern6_0, 9694 arg: pattern6_1, 9695 flags: pattern6_2, 9696 offset: pattern6_3, 9697 } = &pattern5_0 9698 { 9699 if let &Opcode::Load = pattern6_0 { 9700 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9701 // Rule at src/isa/s390x/lower.isle line 1242. 9702 let expr0_0 = 9703 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9704 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9705 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9706 return Some(expr2_0); 9707 } 9708 } 9709 } 9710 } 9711 } 9712 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9713 if pattern2_0 == F32 { 9714 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9715 if let &InstructionData::Load { 9716 opcode: ref pattern6_0, 9717 arg: pattern6_1, 9718 flags: pattern6_2, 9719 offset: pattern6_3, 9720 } = &pattern5_0 9721 { 9722 if let &Opcode::Load = pattern6_0 { 9723 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9724 // Rule at src/isa/s390x/lower.isle line 1232. 9725 let expr0_0 = 9726 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9727 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9728 let expr2_0: Type = I64; 9729 let expr3_0: u8 = 32; 9730 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9731 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9732 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9733 return Some(expr6_0); 9734 } 9735 } 9736 } 9737 } 9738 if pattern2_0 == F64 { 9739 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9740 if let &InstructionData::Load { 9741 opcode: ref pattern6_0, 9742 arg: pattern6_1, 9743 flags: pattern6_2, 9744 offset: pattern6_3, 9745 } = &pattern5_0 9746 { 9747 if let &Opcode::Load = pattern6_0 { 9748 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9749 // Rule at src/isa/s390x/lower.isle line 1247. 9750 let expr0_0 = 9751 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9752 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9753 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9754 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9755 return Some(expr3_0); 9756 } 9757 } 9758 } 9759 } 9760 } 9761 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9762 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9763 if let &InstructionData::Unary { 9764 opcode: ref pattern5_0, 9765 arg: pattern5_1, 9766 } = &pattern4_0 9767 { 9768 if let &Opcode::Bint = pattern5_0 { 9769 // Rule at src/isa/s390x/lower.isle line 800. 9770 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9771 let expr1_0: u16 = 1; 9772 let expr2_0: u8 = 0; 9773 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9774 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9775 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9776 return Some(expr5_0); 9777 } 9778 } 9779 } 9780 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9781 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9782 if let &InstructionData::Unary { 9783 opcode: ref pattern5_0, 9784 arg: pattern5_1, 9785 } = &pattern4_0 9786 { 9787 if let &Opcode::Bint = pattern5_0 { 9788 // Rule at src/isa/s390x/lower.isle line 804. 9789 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9790 let expr1_0: u32 = 1; 9791 let expr2_0: u8 = 0; 9792 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9793 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9794 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9795 return Some(expr5_0); 9796 } 9797 } 9798 } 9799 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9800 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9801 match &pattern4_0 { 9802 &InstructionData::Binary { 9803 opcode: ref pattern5_0, 9804 args: ref pattern5_1, 9805 } => { 9806 match pattern5_0 { 9807 &Opcode::Iadd => { 9808 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9809 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9810 // Rule at src/isa/s390x/lower.isle line 72. 9811 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9812 let expr1_0 = 9813 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9814 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9815 return Some(expr2_0); 9816 } 9817 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9818 // Rule at src/isa/s390x/lower.isle line 76. 9819 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9820 let expr1_0 = 9821 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9822 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9823 return Some(expr2_0); 9824 } 9825 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9826 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9827 if let &InstructionData::Unary { 9828 opcode: ref pattern10_0, 9829 arg: pattern10_1, 9830 } = &pattern9_0 9831 { 9832 if let &Opcode::Sextend = pattern10_0 { 9833 let pattern12_0 = C::value_type(ctx, pattern10_1); 9834 if pattern12_0 == I32 { 9835 // Rule at src/isa/s390x/lower.isle line 66. 9836 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9837 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9838 let expr2_0 = constructor_add_reg_sext32( 9839 ctx, pattern3_0, expr0_0, expr1_0, 9840 )?; 9841 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9842 return Some(expr3_0); 9843 } 9844 } 9845 } 9846 } 9847 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9848 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9849 if let &InstructionData::Load { 9850 opcode: ref pattern10_0, 9851 arg: pattern10_1, 9852 flags: pattern10_2, 9853 offset: pattern10_3, 9854 } = &pattern9_0 9855 { 9856 match pattern10_0 { 9857 &Opcode::Sload16 => { 9858 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9859 // Rule at src/isa/s390x/lower.isle line 94. 9860 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9861 let expr1_0 = 9862 constructor_sink_sload16(ctx, pattern8_0)?; 9863 let expr2_0 = constructor_add_mem_sext16( 9864 ctx, pattern3_0, expr0_0, &expr1_0, 9865 )?; 9866 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9867 return Some(expr3_0); 9868 } 9869 } 9870 &Opcode::Sload32 => { 9871 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9872 // Rule at src/isa/s390x/lower.isle line 98. 9873 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9874 let expr1_0 = 9875 constructor_sink_sload32(ctx, pattern8_0)?; 9876 let expr2_0 = constructor_add_mem_sext32( 9877 ctx, pattern3_0, expr0_0, &expr1_0, 9878 )?; 9879 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9880 return Some(expr3_0); 9881 } 9882 } 9883 _ => {} 9884 } 9885 } 9886 } 9887 let pattern8_0 = C::value_type(ctx, pattern7_0); 9888 if pattern8_0 == I16 { 9889 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9890 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9891 if let &InstructionData::Load { 9892 opcode: ref pattern12_0, 9893 arg: pattern12_1, 9894 flags: pattern12_2, 9895 offset: pattern12_3, 9896 } = &pattern11_0 9897 { 9898 if let &Opcode::Load = pattern12_0 { 9899 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9900 // Rule at src/isa/s390x/lower.isle line 88. 9901 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9902 let expr1_0 = 9903 constructor_sink_load(ctx, pattern10_0)?; 9904 let expr2_0 = constructor_add_mem_sext16( 9905 ctx, pattern3_0, expr0_0, &expr1_0, 9906 )?; 9907 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9908 return Some(expr3_0); 9909 } 9910 } 9911 } 9912 } 9913 } 9914 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9915 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9916 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9917 if let &InstructionData::Load { 9918 opcode: ref pattern12_0, 9919 arg: pattern12_1, 9920 flags: pattern12_2, 9921 offset: pattern12_3, 9922 } = &pattern11_0 9923 { 9924 if let &Opcode::Load = pattern12_0 { 9925 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9926 // Rule at src/isa/s390x/lower.isle line 82. 9927 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9928 let expr1_0 = 9929 constructor_sink_load(ctx, pattern10_0)?; 9930 let expr2_0 = constructor_add_mem( 9931 ctx, pattern3_0, expr0_0, &expr1_0, 9932 )?; 9933 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9934 return Some(expr3_0); 9935 } 9936 } 9937 } 9938 } 9939 } 9940 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9941 // Rule at src/isa/s390x/lower.isle line 70. 9942 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9943 let expr1_0 = 9944 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9945 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9946 return Some(expr2_0); 9947 } 9948 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9949 // Rule at src/isa/s390x/lower.isle line 74. 9950 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9951 let expr1_0 = 9952 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9953 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9954 return Some(expr2_0); 9955 } 9956 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9957 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9958 if let &InstructionData::Unary { 9959 opcode: ref pattern10_0, 9960 arg: pattern10_1, 9961 } = &pattern9_0 9962 { 9963 if let &Opcode::Sextend = pattern10_0 { 9964 let pattern12_0 = C::value_type(ctx, pattern10_1); 9965 if pattern12_0 == I32 { 9966 // Rule at src/isa/s390x/lower.isle line 64. 9967 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9968 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9969 let expr2_0 = constructor_add_reg_sext32( 9970 ctx, pattern3_0, expr0_0, expr1_0, 9971 )?; 9972 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9973 return Some(expr3_0); 9974 } 9975 } 9976 } 9977 } 9978 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9979 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9980 if let &InstructionData::Load { 9981 opcode: ref pattern10_0, 9982 arg: pattern10_1, 9983 flags: pattern10_2, 9984 offset: pattern10_3, 9985 } = &pattern9_0 9986 { 9987 match pattern10_0 { 9988 &Opcode::Sload16 => { 9989 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9990 // Rule at src/isa/s390x/lower.isle line 92. 9991 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9992 let expr1_0 = 9993 constructor_sink_sload16(ctx, pattern8_0)?; 9994 let expr2_0 = constructor_add_mem_sext16( 9995 ctx, pattern3_0, expr0_0, &expr1_0, 9996 )?; 9997 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9998 return Some(expr3_0); 9999 } 10000 } 10001 &Opcode::Sload32 => { 10002 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10003 // Rule at src/isa/s390x/lower.isle line 96. 10004 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10005 let expr1_0 = 10006 constructor_sink_sload32(ctx, pattern8_0)?; 10007 let expr2_0 = constructor_add_mem_sext32( 10008 ctx, pattern3_0, expr0_0, &expr1_0, 10009 )?; 10010 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10011 return Some(expr3_0); 10012 } 10013 } 10014 _ => {} 10015 } 10016 } 10017 } 10018 let pattern8_0 = C::value_type(ctx, pattern7_1); 10019 if pattern8_0 == I16 { 10020 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10021 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10022 if let &InstructionData::Load { 10023 opcode: ref pattern12_0, 10024 arg: pattern12_1, 10025 flags: pattern12_2, 10026 offset: pattern12_3, 10027 } = &pattern11_0 10028 { 10029 if let &Opcode::Load = pattern12_0 { 10030 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10031 // Rule at src/isa/s390x/lower.isle line 86. 10032 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10033 let expr1_0 = 10034 constructor_sink_load(ctx, pattern10_0)?; 10035 let expr2_0 = constructor_add_mem_sext16( 10036 ctx, pattern3_0, expr0_0, &expr1_0, 10037 )?; 10038 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10039 return Some(expr3_0); 10040 } 10041 } 10042 } 10043 } 10044 } 10045 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10046 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10047 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10048 if let &InstructionData::Load { 10049 opcode: ref pattern12_0, 10050 arg: pattern12_1, 10051 flags: pattern12_2, 10052 offset: pattern12_3, 10053 } = &pattern11_0 10054 { 10055 if let &Opcode::Load = pattern12_0 { 10056 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10057 // Rule at src/isa/s390x/lower.isle line 80. 10058 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10059 let expr1_0 = 10060 constructor_sink_load(ctx, pattern10_0)?; 10061 let expr2_0 = constructor_add_mem( 10062 ctx, pattern3_0, expr0_0, &expr1_0, 10063 )?; 10064 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10065 return Some(expr3_0); 10066 } 10067 } 10068 } 10069 } 10070 } 10071 // Rule at src/isa/s390x/lower.isle line 60. 10072 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10073 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10074 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10075 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10076 return Some(expr3_0); 10077 } 10078 &Opcode::Isub => { 10079 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10080 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 10081 // Rule at src/isa/s390x/lower.isle line 113. 10082 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10083 let expr1_0 = 10084 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10085 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10086 return Some(expr2_0); 10087 } 10088 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 10089 // Rule at src/isa/s390x/lower.isle line 115. 10090 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10091 let expr1_0 = 10092 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10093 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10094 return Some(expr2_0); 10095 } 10096 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10097 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10098 if let &InstructionData::Unary { 10099 opcode: ref pattern10_0, 10100 arg: pattern10_1, 10101 } = &pattern9_0 10102 { 10103 if let &Opcode::Sextend = pattern10_0 { 10104 let pattern12_0 = C::value_type(ctx, pattern10_1); 10105 if pattern12_0 == I32 { 10106 // Rule at src/isa/s390x/lower.isle line 109. 10107 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10108 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10109 let expr2_0 = constructor_sub_reg_sext32( 10110 ctx, pattern3_0, expr0_0, expr1_0, 10111 )?; 10112 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10113 return Some(expr3_0); 10114 } 10115 } 10116 } 10117 } 10118 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10119 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10120 if let &InstructionData::Load { 10121 opcode: ref pattern10_0, 10122 arg: pattern10_1, 10123 flags: pattern10_2, 10124 offset: pattern10_3, 10125 } = &pattern9_0 10126 { 10127 match pattern10_0 { 10128 &Opcode::Sload16 => { 10129 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10130 // Rule at src/isa/s390x/lower.isle line 127. 10131 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10132 let expr1_0 = 10133 constructor_sink_sload16(ctx, pattern8_0)?; 10134 let expr2_0 = constructor_sub_mem_sext16( 10135 ctx, pattern3_0, expr0_0, &expr1_0, 10136 )?; 10137 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10138 return Some(expr3_0); 10139 } 10140 } 10141 &Opcode::Sload32 => { 10142 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10143 // Rule at src/isa/s390x/lower.isle line 129. 10144 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10145 let expr1_0 = 10146 constructor_sink_sload32(ctx, pattern8_0)?; 10147 let expr2_0 = constructor_sub_mem_sext32( 10148 ctx, pattern3_0, expr0_0, &expr1_0, 10149 )?; 10150 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10151 return Some(expr3_0); 10152 } 10153 } 10154 _ => {} 10155 } 10156 } 10157 } 10158 let pattern8_0 = C::value_type(ctx, pattern7_1); 10159 if pattern8_0 == I16 { 10160 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10161 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10162 if let &InstructionData::Load { 10163 opcode: ref pattern12_0, 10164 arg: pattern12_1, 10165 flags: pattern12_2, 10166 offset: pattern12_3, 10167 } = &pattern11_0 10168 { 10169 if let &Opcode::Load = pattern12_0 { 10170 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10171 // Rule at src/isa/s390x/lower.isle line 123. 10172 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10173 let expr1_0 = 10174 constructor_sink_load(ctx, pattern10_0)?; 10175 let expr2_0 = constructor_sub_mem_sext16( 10176 ctx, pattern3_0, expr0_0, &expr1_0, 10177 )?; 10178 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10179 return Some(expr3_0); 10180 } 10181 } 10182 } 10183 } 10184 } 10185 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10186 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10187 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10188 if let &InstructionData::Load { 10189 opcode: ref pattern12_0, 10190 arg: pattern12_1, 10191 flags: pattern12_2, 10192 offset: pattern12_3, 10193 } = &pattern11_0 10194 { 10195 if let &Opcode::Load = pattern12_0 { 10196 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10197 // Rule at src/isa/s390x/lower.isle line 119. 10198 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10199 let expr1_0 = 10200 constructor_sink_load(ctx, pattern10_0)?; 10201 let expr2_0 = constructor_sub_mem( 10202 ctx, pattern3_0, expr0_0, &expr1_0, 10203 )?; 10204 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10205 return Some(expr3_0); 10206 } 10207 } 10208 } 10209 } 10210 } 10211 // Rule at src/isa/s390x/lower.isle line 105. 10212 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10213 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10214 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10215 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10216 return Some(expr3_0); 10217 } 10218 &Opcode::Imul => { 10219 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10220 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10221 // Rule at src/isa/s390x/lower.isle line 212. 10222 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10223 let expr1_0 = 10224 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10225 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10226 return Some(expr2_0); 10227 } 10228 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10229 // Rule at src/isa/s390x/lower.isle line 216. 10230 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10231 let expr1_0 = 10232 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10233 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10234 return Some(expr2_0); 10235 } 10236 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10237 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10238 if let &InstructionData::Unary { 10239 opcode: ref pattern10_0, 10240 arg: pattern10_1, 10241 } = &pattern9_0 10242 { 10243 if let &Opcode::Sextend = pattern10_0 { 10244 let pattern12_0 = C::value_type(ctx, pattern10_1); 10245 if pattern12_0 == I32 { 10246 // Rule at src/isa/s390x/lower.isle line 206. 10247 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10248 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10249 let expr2_0 = constructor_mul_reg_sext32( 10250 ctx, pattern3_0, expr0_0, expr1_0, 10251 )?; 10252 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10253 return Some(expr3_0); 10254 } 10255 } 10256 } 10257 } 10258 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10259 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10260 if let &InstructionData::Load { 10261 opcode: ref pattern10_0, 10262 arg: pattern10_1, 10263 flags: pattern10_2, 10264 offset: pattern10_3, 10265 } = &pattern9_0 10266 { 10267 match pattern10_0 { 10268 &Opcode::Sload16 => { 10269 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10270 // Rule at src/isa/s390x/lower.isle line 234. 10271 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10272 let expr1_0 = 10273 constructor_sink_sload16(ctx, pattern8_0)?; 10274 let expr2_0 = constructor_mul_mem_sext16( 10275 ctx, pattern3_0, expr0_0, &expr1_0, 10276 )?; 10277 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10278 return Some(expr3_0); 10279 } 10280 } 10281 &Opcode::Sload32 => { 10282 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10283 // Rule at src/isa/s390x/lower.isle line 238. 10284 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10285 let expr1_0 = 10286 constructor_sink_sload32(ctx, pattern8_0)?; 10287 let expr2_0 = constructor_mul_mem_sext32( 10288 ctx, pattern3_0, expr0_0, &expr1_0, 10289 )?; 10290 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10291 return Some(expr3_0); 10292 } 10293 } 10294 _ => {} 10295 } 10296 } 10297 } 10298 let pattern8_0 = C::value_type(ctx, pattern7_0); 10299 if pattern8_0 == I16 { 10300 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10301 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10302 if let &InstructionData::Load { 10303 opcode: ref pattern12_0, 10304 arg: pattern12_1, 10305 flags: pattern12_2, 10306 offset: pattern12_3, 10307 } = &pattern11_0 10308 { 10309 if let &Opcode::Load = pattern12_0 { 10310 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10311 // Rule at src/isa/s390x/lower.isle line 228. 10312 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10313 let expr1_0 = 10314 constructor_sink_load(ctx, pattern10_0)?; 10315 let expr2_0 = constructor_mul_mem_sext16( 10316 ctx, pattern3_0, expr0_0, &expr1_0, 10317 )?; 10318 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10319 return Some(expr3_0); 10320 } 10321 } 10322 } 10323 } 10324 } 10325 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10326 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10327 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10328 if let &InstructionData::Load { 10329 opcode: ref pattern12_0, 10330 arg: pattern12_1, 10331 flags: pattern12_2, 10332 offset: pattern12_3, 10333 } = &pattern11_0 10334 { 10335 if let &Opcode::Load = pattern12_0 { 10336 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10337 // Rule at src/isa/s390x/lower.isle line 222. 10338 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10339 let expr1_0 = 10340 constructor_sink_load(ctx, pattern10_0)?; 10341 let expr2_0 = constructor_mul_mem( 10342 ctx, pattern3_0, expr0_0, &expr1_0, 10343 )?; 10344 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10345 return Some(expr3_0); 10346 } 10347 } 10348 } 10349 } 10350 } 10351 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10352 // Rule at src/isa/s390x/lower.isle line 210. 10353 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10354 let expr1_0 = 10355 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10356 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10357 return Some(expr2_0); 10358 } 10359 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10360 // Rule at src/isa/s390x/lower.isle line 214. 10361 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10362 let expr1_0 = 10363 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10364 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10365 return Some(expr2_0); 10366 } 10367 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10368 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10369 if let &InstructionData::Unary { 10370 opcode: ref pattern10_0, 10371 arg: pattern10_1, 10372 } = &pattern9_0 10373 { 10374 if let &Opcode::Sextend = pattern10_0 { 10375 let pattern12_0 = C::value_type(ctx, pattern10_1); 10376 if pattern12_0 == I32 { 10377 // Rule at src/isa/s390x/lower.isle line 204. 10378 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10379 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10380 let expr2_0 = constructor_mul_reg_sext32( 10381 ctx, pattern3_0, expr0_0, expr1_0, 10382 )?; 10383 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10384 return Some(expr3_0); 10385 } 10386 } 10387 } 10388 } 10389 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10390 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10391 if let &InstructionData::Load { 10392 opcode: ref pattern10_0, 10393 arg: pattern10_1, 10394 flags: pattern10_2, 10395 offset: pattern10_3, 10396 } = &pattern9_0 10397 { 10398 match pattern10_0 { 10399 &Opcode::Sload16 => { 10400 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10401 // Rule at src/isa/s390x/lower.isle line 232. 10402 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10403 let expr1_0 = 10404 constructor_sink_sload16(ctx, pattern8_0)?; 10405 let expr2_0 = constructor_mul_mem_sext16( 10406 ctx, pattern3_0, expr0_0, &expr1_0, 10407 )?; 10408 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10409 return Some(expr3_0); 10410 } 10411 } 10412 &Opcode::Sload32 => { 10413 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10414 // Rule at src/isa/s390x/lower.isle line 236. 10415 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10416 let expr1_0 = 10417 constructor_sink_sload32(ctx, pattern8_0)?; 10418 let expr2_0 = constructor_mul_mem_sext32( 10419 ctx, pattern3_0, expr0_0, &expr1_0, 10420 )?; 10421 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10422 return Some(expr3_0); 10423 } 10424 } 10425 _ => {} 10426 } 10427 } 10428 } 10429 let pattern8_0 = C::value_type(ctx, pattern7_1); 10430 if pattern8_0 == I16 { 10431 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10432 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10433 if let &InstructionData::Load { 10434 opcode: ref pattern12_0, 10435 arg: pattern12_1, 10436 flags: pattern12_2, 10437 offset: pattern12_3, 10438 } = &pattern11_0 10439 { 10440 if let &Opcode::Load = pattern12_0 { 10441 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10442 // Rule at src/isa/s390x/lower.isle line 226. 10443 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10444 let expr1_0 = 10445 constructor_sink_load(ctx, pattern10_0)?; 10446 let expr2_0 = constructor_mul_mem_sext16( 10447 ctx, pattern3_0, expr0_0, &expr1_0, 10448 )?; 10449 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10450 return Some(expr3_0); 10451 } 10452 } 10453 } 10454 } 10455 } 10456 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10457 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10458 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10459 if let &InstructionData::Load { 10460 opcode: ref pattern12_0, 10461 arg: pattern12_1, 10462 flags: pattern12_2, 10463 offset: pattern12_3, 10464 } = &pattern11_0 10465 { 10466 if let &Opcode::Load = pattern12_0 { 10467 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10468 // Rule at src/isa/s390x/lower.isle line 220. 10469 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10470 let expr1_0 = 10471 constructor_sink_load(ctx, pattern10_0)?; 10472 let expr2_0 = constructor_mul_mem( 10473 ctx, pattern3_0, expr0_0, &expr1_0, 10474 )?; 10475 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10476 return Some(expr3_0); 10477 } 10478 } 10479 } 10480 } 10481 } 10482 // Rule at src/isa/s390x/lower.isle line 200. 10483 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10484 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10485 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10486 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10487 return Some(expr3_0); 10488 } 10489 &Opcode::Udiv => { 10490 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10491 // Rule at src/isa/s390x/lower.isle line 303. 10492 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10493 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10494 let expr2_0: u64 = 0; 10495 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10496 let expr4_0 = 10497 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10498 let expr5_0 = 10499 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10500 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10501 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10502 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10503 ctx, expr0_0, expr7_0, expr6_0, 10504 )?; 10505 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10506 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10507 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10508 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10509 return Some(expr12_0); 10510 } 10511 &Opcode::Sdiv => { 10512 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10513 // Rule at src/isa/s390x/lower.isle line 377. 10514 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10515 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10516 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10517 let expr3_0 = 10518 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10519 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10520 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10521 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10522 ctx, expr0_0, expr5_0, expr4_0, 10523 )?; 10524 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10525 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10526 )?; 10527 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10528 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10529 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10530 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10531 return Some(expr11_0); 10532 } 10533 &Opcode::Urem => { 10534 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10535 // Rule at src/isa/s390x/lower.isle line 326. 10536 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10537 let expr1_0: u64 = 0; 10538 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10539 let expr3_0 = 10540 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10541 let expr4_0 = 10542 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10543 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10544 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10545 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10546 ctx, expr0_0, expr6_0, expr5_0, 10547 )?; 10548 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10549 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10550 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10551 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10552 return Some(expr11_0); 10553 } 10554 &Opcode::Srem => { 10555 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10556 // Rule at src/isa/s390x/lower.isle line 400. 10557 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10558 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10559 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10560 let expr3_0 = 10561 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10562 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10563 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10564 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10565 ctx, expr0_0, expr5_0, expr4_0, 10566 )?; 10567 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10568 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10569 )?; 10570 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10571 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10572 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10573 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10574 return Some(expr11_0); 10575 } 10576 &Opcode::IaddIfcout => { 10577 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10578 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10579 // Rule at src/isa/s390x/lower.isle line 170. 10580 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10581 let expr1_0 = constructor_add_logical_zimm32( 10582 ctx, pattern3_0, expr0_0, pattern8_0, 10583 )?; 10584 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10585 return Some(expr2_0); 10586 } 10587 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10588 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10589 if let &InstructionData::Unary { 10590 opcode: ref pattern10_0, 10591 arg: pattern10_1, 10592 } = &pattern9_0 10593 { 10594 if let &Opcode::Uextend = pattern10_0 { 10595 let pattern12_0 = C::value_type(ctx, pattern10_1); 10596 if pattern12_0 == I32 { 10597 // Rule at src/isa/s390x/lower.isle line 164. 10598 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10599 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10600 let expr2_0 = constructor_add_logical_reg_zext32( 10601 ctx, pattern3_0, expr0_0, expr1_0, 10602 )?; 10603 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10604 return Some(expr3_0); 10605 } 10606 } 10607 } 10608 } 10609 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10610 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10611 if let &InstructionData::Load { 10612 opcode: ref pattern10_0, 10613 arg: pattern10_1, 10614 flags: pattern10_2, 10615 offset: pattern10_3, 10616 } = &pattern9_0 10617 { 10618 if let &Opcode::Uload32 = pattern10_0 { 10619 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10620 // Rule at src/isa/s390x/lower.isle line 182. 10621 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10622 let expr1_0 = 10623 constructor_sink_uload32(ctx, pattern8_0)?; 10624 let expr2_0 = constructor_add_logical_mem_zext32( 10625 ctx, pattern3_0, expr0_0, &expr1_0, 10626 )?; 10627 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10628 return Some(expr3_0); 10629 } 10630 } 10631 } 10632 } 10633 let pattern8_0 = C::value_type(ctx, pattern7_0); 10634 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10635 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10636 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10637 if let &InstructionData::Load { 10638 opcode: ref pattern12_0, 10639 arg: pattern12_1, 10640 flags: pattern12_2, 10641 offset: pattern12_3, 10642 } = &pattern11_0 10643 { 10644 if let &Opcode::Load = pattern12_0 { 10645 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10646 // Rule at src/isa/s390x/lower.isle line 176. 10647 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10648 let expr1_0 = 10649 constructor_sink_load(ctx, pattern10_0)?; 10650 let expr2_0 = constructor_add_logical_mem( 10651 ctx, pattern3_0, expr0_0, &expr1_0, 10652 )?; 10653 let expr3_0 = 10654 constructor_output_ifcout(ctx, expr2_0)?; 10655 return Some(expr3_0); 10656 } 10657 } 10658 } 10659 } 10660 } 10661 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10662 // Rule at src/isa/s390x/lower.isle line 168. 10663 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10664 let expr1_0 = constructor_add_logical_zimm32( 10665 ctx, pattern3_0, expr0_0, pattern8_0, 10666 )?; 10667 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10668 return Some(expr2_0); 10669 } 10670 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10671 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10672 if let &InstructionData::Unary { 10673 opcode: ref pattern10_0, 10674 arg: pattern10_1, 10675 } = &pattern9_0 10676 { 10677 if let &Opcode::Uextend = pattern10_0 { 10678 let pattern12_0 = C::value_type(ctx, pattern10_1); 10679 if pattern12_0 == I32 { 10680 // Rule at src/isa/s390x/lower.isle line 162. 10681 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10682 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10683 let expr2_0 = constructor_add_logical_reg_zext32( 10684 ctx, pattern3_0, expr0_0, expr1_0, 10685 )?; 10686 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10687 return Some(expr3_0); 10688 } 10689 } 10690 } 10691 } 10692 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10693 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10694 if let &InstructionData::Load { 10695 opcode: ref pattern10_0, 10696 arg: pattern10_1, 10697 flags: pattern10_2, 10698 offset: pattern10_3, 10699 } = &pattern9_0 10700 { 10701 if let &Opcode::Uload32 = pattern10_0 { 10702 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10703 // Rule at src/isa/s390x/lower.isle line 180. 10704 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10705 let expr1_0 = 10706 constructor_sink_uload32(ctx, pattern8_0)?; 10707 let expr2_0 = constructor_add_logical_mem_zext32( 10708 ctx, pattern3_0, expr0_0, &expr1_0, 10709 )?; 10710 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10711 return Some(expr3_0); 10712 } 10713 } 10714 } 10715 } 10716 let pattern8_0 = C::value_type(ctx, pattern7_1); 10717 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10718 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10719 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10720 if let &InstructionData::Load { 10721 opcode: ref pattern12_0, 10722 arg: pattern12_1, 10723 flags: pattern12_2, 10724 offset: pattern12_3, 10725 } = &pattern11_0 10726 { 10727 if let &Opcode::Load = pattern12_0 { 10728 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10729 // Rule at src/isa/s390x/lower.isle line 174. 10730 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10731 let expr1_0 = 10732 constructor_sink_load(ctx, pattern10_0)?; 10733 let expr2_0 = constructor_add_logical_mem( 10734 ctx, pattern3_0, expr0_0, &expr1_0, 10735 )?; 10736 let expr3_0 = 10737 constructor_output_ifcout(ctx, expr2_0)?; 10738 return Some(expr3_0); 10739 } 10740 } 10741 } 10742 } 10743 } 10744 // Rule at src/isa/s390x/lower.isle line 158. 10745 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10746 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10747 let expr2_0 = 10748 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10749 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10750 return Some(expr3_0); 10751 } 10752 &Opcode::Band => { 10753 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10754 let pattern8_0 = C::value_type(ctx, pattern7_0); 10755 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10756 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10757 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10758 if let &InstructionData::Load { 10759 opcode: ref pattern12_0, 10760 arg: pattern12_1, 10761 flags: pattern12_2, 10762 offset: pattern12_3, 10763 } = &pattern11_0 10764 { 10765 if let &Opcode::Load = pattern12_0 { 10766 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10767 // Rule at src/isa/s390x/lower.isle line 657. 10768 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10769 let expr1_0 = 10770 constructor_sink_load(ctx, pattern10_0)?; 10771 let expr2_0 = constructor_and_mem( 10772 ctx, pattern3_0, expr0_0, &expr1_0, 10773 )?; 10774 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10775 return Some(expr3_0); 10776 } 10777 } 10778 } 10779 } 10780 } 10781 if let Some(pattern8_0) = 10782 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10783 { 10784 // Rule at src/isa/s390x/lower.isle line 651. 10785 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10786 let expr1_0 = constructor_and_uimm32shifted( 10787 ctx, pattern3_0, expr0_0, pattern8_0, 10788 )?; 10789 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10790 return Some(expr2_0); 10791 } 10792 if let Some(pattern8_0) = 10793 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10794 { 10795 // Rule at src/isa/s390x/lower.isle line 647. 10796 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10797 let expr1_0 = constructor_and_uimm16shifted( 10798 ctx, pattern3_0, expr0_0, pattern8_0, 10799 )?; 10800 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10801 return Some(expr2_0); 10802 } 10803 let pattern8_0 = C::value_type(ctx, pattern7_1); 10804 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10805 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10806 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10807 if let &InstructionData::Load { 10808 opcode: ref pattern12_0, 10809 arg: pattern12_1, 10810 flags: pattern12_2, 10811 offset: pattern12_3, 10812 } = &pattern11_0 10813 { 10814 if let &Opcode::Load = pattern12_0 { 10815 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10816 // Rule at src/isa/s390x/lower.isle line 655. 10817 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10818 let expr1_0 = 10819 constructor_sink_load(ctx, pattern10_0)?; 10820 let expr2_0 = constructor_and_mem( 10821 ctx, pattern3_0, expr0_0, &expr1_0, 10822 )?; 10823 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10824 return Some(expr3_0); 10825 } 10826 } 10827 } 10828 } 10829 } 10830 if let Some(pattern8_0) = 10831 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10832 { 10833 // Rule at src/isa/s390x/lower.isle line 649. 10834 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10835 let expr1_0 = constructor_and_uimm32shifted( 10836 ctx, pattern3_0, expr0_0, pattern8_0, 10837 )?; 10838 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10839 return Some(expr2_0); 10840 } 10841 if let Some(pattern8_0) = 10842 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10843 { 10844 // Rule at src/isa/s390x/lower.isle line 645. 10845 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10846 let expr1_0 = constructor_and_uimm16shifted( 10847 ctx, pattern3_0, expr0_0, pattern8_0, 10848 )?; 10849 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10850 return Some(expr2_0); 10851 } 10852 // Rule at src/isa/s390x/lower.isle line 641. 10853 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10854 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10855 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10856 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10857 return Some(expr3_0); 10858 } 10859 &Opcode::Bor => { 10860 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10861 let pattern8_0 = C::value_type(ctx, pattern7_0); 10862 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10863 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10864 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10865 if let &InstructionData::Load { 10866 opcode: ref pattern12_0, 10867 arg: pattern12_1, 10868 flags: pattern12_2, 10869 offset: pattern12_3, 10870 } = &pattern11_0 10871 { 10872 if let &Opcode::Load = pattern12_0 { 10873 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10874 // Rule at src/isa/s390x/lower.isle line 680. 10875 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10876 let expr1_0 = 10877 constructor_sink_load(ctx, pattern10_0)?; 10878 let expr2_0 = constructor_or_mem( 10879 ctx, pattern3_0, expr0_0, &expr1_0, 10880 )?; 10881 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10882 return Some(expr3_0); 10883 } 10884 } 10885 } 10886 } 10887 } 10888 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10889 // Rule at src/isa/s390x/lower.isle line 674. 10890 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10891 let expr1_0 = constructor_or_uimm32shifted( 10892 ctx, pattern3_0, expr0_0, pattern8_0, 10893 )?; 10894 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10895 return Some(expr2_0); 10896 } 10897 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10898 // Rule at src/isa/s390x/lower.isle line 670. 10899 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10900 let expr1_0 = constructor_or_uimm16shifted( 10901 ctx, pattern3_0, expr0_0, pattern8_0, 10902 )?; 10903 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10904 return Some(expr2_0); 10905 } 10906 let pattern8_0 = C::value_type(ctx, pattern7_1); 10907 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10908 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10909 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10910 if let &InstructionData::Load { 10911 opcode: ref pattern12_0, 10912 arg: pattern12_1, 10913 flags: pattern12_2, 10914 offset: pattern12_3, 10915 } = &pattern11_0 10916 { 10917 if let &Opcode::Load = pattern12_0 { 10918 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10919 // Rule at src/isa/s390x/lower.isle line 678. 10920 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10921 let expr1_0 = 10922 constructor_sink_load(ctx, pattern10_0)?; 10923 let expr2_0 = constructor_or_mem( 10924 ctx, pattern3_0, expr0_0, &expr1_0, 10925 )?; 10926 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10927 return Some(expr3_0); 10928 } 10929 } 10930 } 10931 } 10932 } 10933 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10934 // Rule at src/isa/s390x/lower.isle line 672. 10935 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10936 let expr1_0 = constructor_or_uimm32shifted( 10937 ctx, pattern3_0, expr0_0, pattern8_0, 10938 )?; 10939 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10940 return Some(expr2_0); 10941 } 10942 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10943 // Rule at src/isa/s390x/lower.isle line 668. 10944 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10945 let expr1_0 = constructor_or_uimm16shifted( 10946 ctx, pattern3_0, expr0_0, pattern8_0, 10947 )?; 10948 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10949 return Some(expr2_0); 10950 } 10951 // Rule at src/isa/s390x/lower.isle line 664. 10952 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10953 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10954 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10955 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10956 return Some(expr3_0); 10957 } 10958 &Opcode::Bxor => { 10959 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10960 let pattern8_0 = C::value_type(ctx, pattern7_0); 10961 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10962 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10963 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10964 if let &InstructionData::Load { 10965 opcode: ref pattern12_0, 10966 arg: pattern12_1, 10967 flags: pattern12_2, 10968 offset: pattern12_3, 10969 } = &pattern11_0 10970 { 10971 if let &Opcode::Load = pattern12_0 { 10972 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10973 // Rule at src/isa/s390x/lower.isle line 699. 10974 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10975 let expr1_0 = 10976 constructor_sink_load(ctx, pattern10_0)?; 10977 let expr2_0 = constructor_xor_mem( 10978 ctx, pattern3_0, expr0_0, &expr1_0, 10979 )?; 10980 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10981 return Some(expr3_0); 10982 } 10983 } 10984 } 10985 } 10986 } 10987 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10988 // Rule at src/isa/s390x/lower.isle line 693. 10989 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10990 let expr1_0 = constructor_xor_uimm32shifted( 10991 ctx, pattern3_0, expr0_0, pattern8_0, 10992 )?; 10993 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10994 return Some(expr2_0); 10995 } 10996 let pattern8_0 = C::value_type(ctx, pattern7_1); 10997 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10998 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10999 let pattern11_0 = C::inst_data(ctx, pattern10_0); 11000 if let &InstructionData::Load { 11001 opcode: ref pattern12_0, 11002 arg: pattern12_1, 11003 flags: pattern12_2, 11004 offset: pattern12_3, 11005 } = &pattern11_0 11006 { 11007 if let &Opcode::Load = pattern12_0 { 11008 if let Some(()) = C::bigendian(ctx, pattern12_2) { 11009 // Rule at src/isa/s390x/lower.isle line 697. 11010 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11011 let expr1_0 = 11012 constructor_sink_load(ctx, pattern10_0)?; 11013 let expr2_0 = constructor_xor_mem( 11014 ctx, pattern3_0, expr0_0, &expr1_0, 11015 )?; 11016 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11017 return Some(expr3_0); 11018 } 11019 } 11020 } 11021 } 11022 } 11023 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 11024 // Rule at src/isa/s390x/lower.isle line 691. 11025 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11026 let expr1_0 = constructor_xor_uimm32shifted( 11027 ctx, pattern3_0, expr0_0, pattern8_0, 11028 )?; 11029 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11030 return Some(expr2_0); 11031 } 11032 // Rule at src/isa/s390x/lower.isle line 687. 11033 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11034 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11035 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11036 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11037 return Some(expr3_0); 11038 } 11039 &Opcode::Ishl => { 11040 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11041 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11042 // Rule at src/isa/s390x/lower.isle line 486. 11043 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11044 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11045 let expr2_0 = 11046 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11047 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11048 return Some(expr3_0); 11049 } 11050 // Rule at src/isa/s390x/lower.isle line 481. 11051 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11052 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 11053 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11054 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11055 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11056 return Some(expr4_0); 11057 } 11058 &Opcode::Ushr => { 11059 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11060 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11061 // Rule at src/isa/s390x/lower.isle line 502. 11062 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11063 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11064 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11065 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 11066 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11067 return Some(expr4_0); 11068 } 11069 // Rule at src/isa/s390x/lower.isle line 495. 11070 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11071 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11072 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 11073 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11074 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 11075 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11076 return Some(expr5_0); 11077 } 11078 &Opcode::Sshr => { 11079 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11080 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11081 // Rule at src/isa/s390x/lower.isle line 519. 11082 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11083 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11084 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11085 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 11086 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11087 return Some(expr4_0); 11088 } 11089 // Rule at src/isa/s390x/lower.isle line 512. 11090 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11091 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11092 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 11093 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11094 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 11095 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11096 return Some(expr5_0); 11097 } 11098 _ => {} 11099 } 11100 } 11101 &InstructionData::Unary { 11102 opcode: ref pattern5_0, 11103 arg: pattern5_1, 11104 } => { 11105 match pattern5_0 { 11106 &Opcode::Ineg => { 11107 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 11108 let pattern8_0 = C::inst_data(ctx, pattern7_0); 11109 if let &InstructionData::Unary { 11110 opcode: ref pattern9_0, 11111 arg: pattern9_1, 11112 } = &pattern8_0 11113 { 11114 if let &Opcode::Sextend = pattern9_0 { 11115 let pattern11_0 = C::value_type(ctx, pattern9_1); 11116 if pattern11_0 == I32 { 11117 // Rule at src/isa/s390x/lower.isle line 193. 11118 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 11119 let expr1_0 = constructor_neg_reg_sext32( 11120 ctx, pattern3_0, expr0_0, 11121 )?; 11122 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11123 return Some(expr2_0); 11124 } 11125 } 11126 } 11127 } 11128 // Rule at src/isa/s390x/lower.isle line 189. 11129 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11130 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11131 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11132 return Some(expr2_0); 11133 } 11134 &Opcode::Iabs => { 11135 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 11136 let pattern8_0 = C::inst_data(ctx, pattern7_0); 11137 if let &InstructionData::Unary { 11138 opcode: ref pattern9_0, 11139 arg: pattern9_1, 11140 } = &pattern8_0 11141 { 11142 if let &Opcode::Sextend = pattern9_0 { 11143 let pattern11_0 = C::value_type(ctx, pattern9_1); 11144 if pattern11_0 == I32 { 11145 // Rule at src/isa/s390x/lower.isle line 141. 11146 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 11147 let expr1_0 = constructor_abs_reg_sext32( 11148 ctx, pattern3_0, expr0_0, 11149 )?; 11150 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11151 return Some(expr2_0); 11152 } 11153 } 11154 } 11155 } 11156 // Rule at src/isa/s390x/lower.isle line 137. 11157 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11158 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11159 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 11160 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11161 return Some(expr3_0); 11162 } 11163 &Opcode::Clz => { 11164 // Rule at src/isa/s390x/lower.isle line 825. 11165 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11166 let expr1_0: i16 = 64; 11167 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 11168 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 11169 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 11170 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11171 return Some(expr5_0); 11172 } 11173 &Opcode::Cls => { 11174 // Rule at src/isa/s390x/lower.isle line 840. 11175 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11176 let expr1_0: Type = I64; 11177 let expr2_0: u8 = 63; 11178 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11179 let expr4_0: Type = I64; 11180 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11181 let expr6_0: i16 = 64; 11182 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11183 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11184 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11185 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11186 return Some(expr10_0); 11187 } 11188 &Opcode::Bint => { 11189 // Rule at src/isa/s390x/lower.isle line 808. 11190 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11191 let expr1_0: u64 = 1; 11192 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11193 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11194 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11195 return Some(expr4_0); 11196 } 11197 _ => {} 11198 } 11199 } 11200 _ => {} 11201 } 11202 } 11203 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11204 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11205 match &pattern4_0 { 11206 &InstructionData::Binary { 11207 opcode: ref pattern5_0, 11208 args: ref pattern5_1, 11209 } => { 11210 match pattern5_0 { 11211 &Opcode::Rotl => { 11212 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11213 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11214 // Rule at src/isa/s390x/lower.isle line 532. 11215 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11216 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11217 let expr2_0 = 11218 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11219 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11220 return Some(expr3_0); 11221 } 11222 // Rule at src/isa/s390x/lower.isle line 528. 11223 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11224 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11225 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11226 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11227 return Some(expr3_0); 11228 } 11229 &Opcode::Rotr => { 11230 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11231 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11232 // Rule at src/isa/s390x/lower.isle line 570. 11233 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11234 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11235 let expr2_0 = 11236 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11237 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11238 return Some(expr3_0); 11239 } 11240 // Rule at src/isa/s390x/lower.isle line 564. 11241 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11242 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11243 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11244 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11245 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11246 return Some(expr4_0); 11247 } 11248 _ => {} 11249 } 11250 } 11251 &InstructionData::AtomicRmw { 11252 opcode: ref pattern5_0, 11253 args: ref pattern5_1, 11254 flags: pattern5_2, 11255 op: ref pattern5_3, 11256 } => { 11257 if let &Opcode::AtomicRmw = pattern5_0 { 11258 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11259 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11260 match pattern5_3 { 11261 &AtomicRmwOp::And => { 11262 // Rule at src/isa/s390x/lower.isle line 1510. 11263 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11264 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11265 let expr2_0 = C::zero_offset(ctx); 11266 let expr3_0 = constructor_lower_address( 11267 ctx, pattern5_2, pattern7_0, expr2_0, 11268 )?; 11269 let expr4_0 = constructor_atomic_rmw_and( 11270 ctx, pattern3_0, expr1_0, &expr3_0, 11271 )?; 11272 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11273 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11274 return Some(expr6_0); 11275 } 11276 &AtomicRmwOp::Or => { 11277 // Rule at src/isa/s390x/lower.isle line 1522. 11278 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11279 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11280 let expr2_0 = C::zero_offset(ctx); 11281 let expr3_0 = constructor_lower_address( 11282 ctx, pattern5_2, pattern7_0, expr2_0, 11283 )?; 11284 let expr4_0 = constructor_atomic_rmw_or( 11285 ctx, pattern3_0, expr1_0, &expr3_0, 11286 )?; 11287 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11288 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11289 return Some(expr6_0); 11290 } 11291 &AtomicRmwOp::Xor => { 11292 // Rule at src/isa/s390x/lower.isle line 1534. 11293 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11294 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11295 let expr2_0 = C::zero_offset(ctx); 11296 let expr3_0 = constructor_lower_address( 11297 ctx, pattern5_2, pattern7_0, expr2_0, 11298 )?; 11299 let expr4_0 = constructor_atomic_rmw_xor( 11300 ctx, pattern3_0, expr1_0, &expr3_0, 11301 )?; 11302 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11303 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11304 return Some(expr6_0); 11305 } 11306 _ => {} 11307 } 11308 } 11309 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11310 match pattern5_3 { 11311 &AtomicRmwOp::Add => { 11312 // Rule at src/isa/s390x/lower.isle line 1540. 11313 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11314 let expr1_0 = C::zero_offset(ctx); 11315 let expr2_0 = constructor_lower_address( 11316 ctx, pattern5_2, pattern7_0, expr1_0, 11317 )?; 11318 let expr3_0 = constructor_atomic_rmw_add( 11319 ctx, pattern3_0, expr0_0, &expr2_0, 11320 )?; 11321 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11322 return Some(expr4_0); 11323 } 11324 &AtomicRmwOp::And => { 11325 // Rule at src/isa/s390x/lower.isle line 1504. 11326 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11327 let expr1_0 = C::zero_offset(ctx); 11328 let expr2_0 = constructor_lower_address( 11329 ctx, pattern5_2, pattern7_0, expr1_0, 11330 )?; 11331 let expr3_0 = constructor_atomic_rmw_and( 11332 ctx, pattern3_0, expr0_0, &expr2_0, 11333 )?; 11334 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11335 return Some(expr4_0); 11336 } 11337 &AtomicRmwOp::Or => { 11338 // Rule at src/isa/s390x/lower.isle line 1516. 11339 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11340 let expr1_0 = C::zero_offset(ctx); 11341 let expr2_0 = constructor_lower_address( 11342 ctx, pattern5_2, pattern7_0, expr1_0, 11343 )?; 11344 let expr3_0 = constructor_atomic_rmw_or( 11345 ctx, pattern3_0, expr0_0, &expr2_0, 11346 )?; 11347 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11348 return Some(expr4_0); 11349 } 11350 &AtomicRmwOp::Sub => { 11351 // Rule at src/isa/s390x/lower.isle line 1546. 11352 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11353 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11354 let expr2_0 = C::zero_offset(ctx); 11355 let expr3_0 = constructor_lower_address( 11356 ctx, pattern5_2, pattern7_0, expr2_0, 11357 )?; 11358 let expr4_0 = constructor_atomic_rmw_add( 11359 ctx, pattern3_0, expr1_0, &expr3_0, 11360 )?; 11361 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11362 return Some(expr5_0); 11363 } 11364 &AtomicRmwOp::Xor => { 11365 // Rule at src/isa/s390x/lower.isle line 1528. 11366 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11367 let expr1_0 = C::zero_offset(ctx); 11368 let expr2_0 = constructor_lower_address( 11369 ctx, pattern5_2, pattern7_0, expr1_0, 11370 )?; 11371 let expr3_0 = constructor_atomic_rmw_xor( 11372 ctx, pattern3_0, expr0_0, &expr2_0, 11373 )?; 11374 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11375 return Some(expr4_0); 11376 } 11377 _ => {} 11378 } 11379 } 11380 // Rule at src/isa/s390x/lower.isle line 1555. 11381 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11382 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11383 let expr2_0 = C::inst_builder_new(ctx); 11384 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11385 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11386 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11387 let expr6_0 = constructor_atomic_rmw_body( 11388 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11389 expr0_0, 11390 )?; 11391 let expr7_0 = constructor_casloop( 11392 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11393 )?; 11394 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11395 return Some(expr8_0); 11396 } 11397 } 11398 &InstructionData::AtomicCas { 11399 opcode: ref pattern5_0, 11400 args: ref pattern5_1, 11401 flags: pattern5_2, 11402 } => { 11403 if let &Opcode::AtomicCas = pattern5_0 { 11404 let (pattern7_0, pattern7_1, pattern7_2) = 11405 C::unpack_value_array_3(ctx, pattern5_1); 11406 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11407 // Rule at src/isa/s390x/lower.isle line 1767. 11408 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11409 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11410 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11411 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11412 let expr4_0 = C::zero_offset(ctx); 11413 let expr5_0 = 11414 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11415 let expr6_0 = constructor_atomic_cas_impl( 11416 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11417 )?; 11418 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11419 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11420 return Some(expr8_0); 11421 } 11422 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11423 // Rule at src/isa/s390x/lower.isle line 1760. 11424 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11425 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11426 let expr2_0 = C::zero_offset(ctx); 11427 let expr3_0 = 11428 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11429 let expr4_0 = constructor_atomic_cas_impl( 11430 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11431 )?; 11432 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11433 return Some(expr5_0); 11434 } 11435 } 11436 } 11437 &InstructionData::Unary { 11438 opcode: ref pattern5_0, 11439 arg: pattern5_1, 11440 } => { 11441 match pattern5_0 { 11442 &Opcode::FcvtToUint => { 11443 let pattern7_0 = C::value_type(ctx, pattern5_1); 11444 // Rule at src/isa/s390x/lower.isle line 1061. 11445 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11446 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11447 let expr2_0 = FloatCC::Unordered; 11448 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11449 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11450 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11451 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11452 ctx, pattern3_0, pattern7_0, expr0_0, 11453 )?; 11454 let expr7_0 = FloatCC::Unordered; 11455 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11456 let expr9_0 = C::trap_code_integer_overflow(ctx); 11457 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11458 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11459 return Some(expr11_0); 11460 } 11461 &Opcode::FcvtToUintSat => { 11462 let pattern7_0 = C::value_type(ctx, pattern5_1); 11463 // Rule at src/isa/s390x/lower.isle line 1102. 11464 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11465 let expr1_0 = 11466 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11467 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11468 let expr3_0 = FloatCC::Unordered; 11469 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11470 let expr5_0: i16 = 0; 11471 let expr6_0 = 11472 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11473 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11474 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11475 return Some(expr8_0); 11476 } 11477 &Opcode::FcvtToSint => { 11478 let pattern7_0 = C::value_type(ctx, pattern5_1); 11479 // Rule at src/isa/s390x/lower.isle line 1082. 11480 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11481 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11482 let expr2_0 = FloatCC::Unordered; 11483 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11484 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11485 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11486 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11487 ctx, pattern3_0, pattern7_0, expr0_0, 11488 )?; 11489 let expr7_0 = FloatCC::Unordered; 11490 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11491 let expr9_0 = C::trap_code_integer_overflow(ctx); 11492 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11493 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11494 return Some(expr11_0); 11495 } 11496 &Opcode::FcvtToSintSat => { 11497 let pattern7_0 = C::value_type(ctx, pattern5_1); 11498 // Rule at src/isa/s390x/lower.isle line 1119. 11499 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11500 let expr1_0 = 11501 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11502 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11503 let expr3_0 = FloatCC::Unordered; 11504 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11505 let expr5_0: i16 = 0; 11506 let expr6_0 = 11507 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11508 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11509 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11510 return Some(expr8_0); 11511 } 11512 _ => {} 11513 } 11514 } 11515 _ => {} 11516 } 11517 } 11518 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11519 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11520 match &pattern4_0 { 11521 &InstructionData::Binary { 11522 opcode: ref pattern5_0, 11523 args: ref pattern5_1, 11524 } => { 11525 match pattern5_0 { 11526 &Opcode::Umulhi => { 11527 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11528 // Rule at src/isa/s390x/lower.isle line 245. 11529 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11530 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11531 let expr2_0: Type = I32; 11532 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11533 let expr4_0: Type = I32; 11534 let expr5_0 = C::ty_bits(ctx, pattern3_0)?; 11535 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11536 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11537 return Some(expr7_0); 11538 } 11539 &Opcode::Smulhi => { 11540 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11541 // Rule at src/isa/s390x/lower.isle line 267. 11542 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11543 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11544 let expr2_0: Type = I32; 11545 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11546 let expr4_0: Type = I32; 11547 let expr5_0 = C::ty_bits(ctx, pattern3_0)?; 11548 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11549 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11550 return Some(expr7_0); 11551 } 11552 &Opcode::Rotl => { 11553 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11554 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11555 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11556 { 11557 // Rule at src/isa/s390x/lower.isle line 550. 11558 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11559 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11560 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11561 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11562 let expr4_0 = 11563 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11564 let expr5_0 = 11565 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11566 let expr6_0 = 11567 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11568 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11569 return Some(expr7_0); 11570 } 11571 } 11572 // Rule at src/isa/s390x/lower.isle line 538. 11573 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11574 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11575 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11576 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11577 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11578 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11579 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11580 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11581 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11582 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11583 return Some(expr9_0); 11584 } 11585 &Opcode::Rotr => { 11586 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11587 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11588 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11589 { 11590 // Rule at src/isa/s390x/lower.isle line 588. 11591 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11592 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11593 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11594 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11595 let expr4_0 = 11596 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11597 let expr5_0 = 11598 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11599 let expr6_0 = 11600 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11601 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11602 return Some(expr7_0); 11603 } 11604 } 11605 // Rule at src/isa/s390x/lower.isle line 576. 11606 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11607 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11608 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11609 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11610 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11611 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11612 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11613 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11614 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11615 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11616 return Some(expr9_0); 11617 } 11618 _ => {} 11619 } 11620 } 11621 &InstructionData::AtomicRmw { 11622 opcode: ref pattern5_0, 11623 args: ref pattern5_1, 11624 flags: pattern5_2, 11625 op: ref pattern5_3, 11626 } => { 11627 if let &Opcode::AtomicRmw = pattern5_0 { 11628 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11629 // Rule at src/isa/s390x/lower.isle line 1567. 11630 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11631 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11632 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11633 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11634 let expr4_0 = C::inst_builder_new(ctx); 11635 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11636 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11637 let expr7_0 = constructor_casloop_rotate_in( 11638 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11639 )?; 11640 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11641 let expr9_0 = constructor_atomic_rmw_body( 11642 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11643 expr0_0, 11644 )?; 11645 let expr10_0 = constructor_casloop_rotate_out( 11646 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11647 )?; 11648 let expr11_0 = constructor_casloop_subword( 11649 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11650 )?; 11651 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11652 return Some(expr12_0); 11653 } 11654 } 11655 &InstructionData::AtomicCas { 11656 opcode: ref pattern5_0, 11657 args: ref pattern5_1, 11658 flags: pattern5_2, 11659 } => { 11660 if let &Opcode::AtomicCas = pattern5_0 { 11661 let (pattern7_0, pattern7_1, pattern7_2) = 11662 C::unpack_value_array_3(ctx, pattern5_1); 11663 // Rule at src/isa/s390x/lower.isle line 1774. 11664 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11665 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11666 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11667 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11668 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11669 let expr5_0 = C::inst_builder_new(ctx); 11670 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11671 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11672 let expr8_0 = constructor_casloop_rotate_in( 11673 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11674 )?; 11675 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11676 let expr10_0 = constructor_atomic_cas_body( 11677 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11678 expr1_0, 11679 )?; 11680 let expr11_0 = constructor_casloop_rotate_out( 11681 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11682 )?; 11683 let expr12_0 = constructor_casloop_subword( 11684 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11685 )?; 11686 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11687 return Some(expr13_0); 11688 } 11689 } 11690 _ => {} 11691 } 11692 } 11693 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11694 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11695 match &pattern4_0 { 11696 &InstructionData::Unary { 11697 opcode: ref pattern5_0, 11698 arg: pattern5_1, 11699 } => { 11700 match pattern5_0 { 11701 &Opcode::Ctz => { 11702 // Rule at src/isa/s390x/lower.isle line 863. 11703 let expr0_0: Type = I64; 11704 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11705 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11706 let expr3_0 = 11707 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11708 let expr4_0: Type = I64; 11709 let expr5_0: Type = I64; 11710 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11711 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11712 let expr8_0: i16 = 64; 11713 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11714 let expr10_0: u64 = 63; 11715 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11716 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11717 let expr13_0 = 11718 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11719 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11720 return Some(expr14_0); 11721 } 11722 &Opcode::Uextend => { 11723 // Rule at src/isa/s390x/lower.isle line 607. 11724 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11725 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11726 return Some(expr1_0); 11727 } 11728 &Opcode::Sextend => { 11729 // Rule at src/isa/s390x/lower.isle line 618. 11730 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11731 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11732 return Some(expr1_0); 11733 } 11734 _ => {} 11735 } 11736 } 11737 &InstructionData::Load { 11738 opcode: ref pattern5_0, 11739 arg: pattern5_1, 11740 flags: pattern5_2, 11741 offset: pattern5_3, 11742 } => { 11743 match pattern5_0 { 11744 &Opcode::Uload8 => { 11745 // Rule at src/isa/s390x/lower.isle line 1256. 11746 let expr0_0: Type = I8; 11747 let expr1_0 = 11748 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11749 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11750 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11751 return Some(expr3_0); 11752 } 11753 &Opcode::Sload8 => { 11754 // Rule at src/isa/s390x/lower.isle line 1267. 11755 let expr0_0: Type = I8; 11756 let expr1_0 = 11757 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11758 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11759 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11760 return Some(expr3_0); 11761 } 11762 &Opcode::Uload16 => { 11763 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11764 // Rule at src/isa/s390x/lower.isle line 1283. 11765 let expr0_0 = constructor_lower_address( 11766 ctx, pattern5_2, pattern5_1, pattern5_3, 11767 )?; 11768 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11769 let expr2_0: Type = I16; 11770 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11771 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11772 return Some(expr4_0); 11773 } 11774 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11775 // Rule at src/isa/s390x/lower.isle line 1278. 11776 let expr0_0: Type = I16; 11777 let expr1_0 = constructor_lower_address( 11778 ctx, pattern5_2, pattern5_1, pattern5_3, 11779 )?; 11780 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11781 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11782 return Some(expr3_0); 11783 } 11784 } 11785 &Opcode::Sload16 => { 11786 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11787 // Rule at src/isa/s390x/lower.isle line 1308. 11788 let expr0_0 = constructor_lower_address( 11789 ctx, pattern5_2, pattern5_1, pattern5_3, 11790 )?; 11791 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11792 let expr2_0: Type = I16; 11793 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11794 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11795 return Some(expr4_0); 11796 } 11797 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11798 // Rule at src/isa/s390x/lower.isle line 1303. 11799 let expr0_0: Type = I16; 11800 let expr1_0 = constructor_lower_address( 11801 ctx, pattern5_2, pattern5_1, pattern5_3, 11802 )?; 11803 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11804 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11805 return Some(expr3_0); 11806 } 11807 } 11808 _ => {} 11809 } 11810 } 11811 _ => {} 11812 } 11813 } 11814 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11815 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11816 match &pattern4_0 { 11817 &InstructionData::Unary { 11818 opcode: ref pattern5_0, 11819 arg: pattern5_1, 11820 } => { 11821 match pattern5_0 { 11822 &Opcode::Ctz => { 11823 // Rule at src/isa/s390x/lower.isle line 878. 11824 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11825 let expr1_0: Type = I64; 11826 let expr2_0: Type = I64; 11827 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11828 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11829 let expr5_0: i16 = -1; 11830 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11831 let expr7_0: Type = I64; 11832 let expr8_0: Type = I64; 11833 let expr9_0: u64 = 63; 11834 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11835 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11836 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11837 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11838 return Some(expr13_0); 11839 } 11840 &Opcode::Uextend => { 11841 // Rule at src/isa/s390x/lower.isle line 611. 11842 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11843 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11844 return Some(expr1_0); 11845 } 11846 &Opcode::Sextend => { 11847 // Rule at src/isa/s390x/lower.isle line 622. 11848 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11849 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11850 return Some(expr1_0); 11851 } 11852 _ => {} 11853 } 11854 } 11855 &InstructionData::Load { 11856 opcode: ref pattern5_0, 11857 arg: pattern5_1, 11858 flags: pattern5_2, 11859 offset: pattern5_3, 11860 } => { 11861 match pattern5_0 { 11862 &Opcode::Uload8 => { 11863 // Rule at src/isa/s390x/lower.isle line 1260. 11864 let expr0_0: Type = I8; 11865 let expr1_0 = 11866 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11867 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11868 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11869 return Some(expr3_0); 11870 } 11871 &Opcode::Sload8 => { 11872 // Rule at src/isa/s390x/lower.isle line 1271. 11873 let expr0_0: Type = I8; 11874 let expr1_0 = 11875 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11876 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11877 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11878 return Some(expr3_0); 11879 } 11880 &Opcode::Uload16 => { 11881 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11882 // Rule at src/isa/s390x/lower.isle line 1294. 11883 let expr0_0 = constructor_lower_address( 11884 ctx, pattern5_2, pattern5_1, pattern5_3, 11885 )?; 11886 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11887 let expr2_0: Type = I16; 11888 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11889 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11890 return Some(expr4_0); 11891 } 11892 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11893 // Rule at src/isa/s390x/lower.isle line 1289. 11894 let expr0_0: Type = I16; 11895 let expr1_0 = constructor_lower_address( 11896 ctx, pattern5_2, pattern5_1, pattern5_3, 11897 )?; 11898 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11899 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11900 return Some(expr3_0); 11901 } 11902 } 11903 &Opcode::Sload16 => { 11904 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11905 // Rule at src/isa/s390x/lower.isle line 1319. 11906 let expr0_0 = constructor_lower_address( 11907 ctx, pattern5_2, pattern5_1, pattern5_3, 11908 )?; 11909 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11910 let expr2_0: Type = I16; 11911 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11912 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11913 return Some(expr4_0); 11914 } 11915 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11916 // Rule at src/isa/s390x/lower.isle line 1314. 11917 let expr0_0: Type = I16; 11918 let expr1_0 = constructor_lower_address( 11919 ctx, pattern5_2, pattern5_1, pattern5_3, 11920 )?; 11921 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11922 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11923 return Some(expr3_0); 11924 } 11925 } 11926 &Opcode::Uload32 => { 11927 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11928 // Rule at src/isa/s390x/lower.isle line 1333. 11929 let expr0_0 = constructor_lower_address( 11930 ctx, pattern5_2, pattern5_1, pattern5_3, 11931 )?; 11932 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11933 let expr2_0: Type = I32; 11934 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11935 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11936 return Some(expr4_0); 11937 } 11938 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11939 // Rule at src/isa/s390x/lower.isle line 1328. 11940 let expr0_0: Type = I32; 11941 let expr1_0 = constructor_lower_address( 11942 ctx, pattern5_2, pattern5_1, pattern5_3, 11943 )?; 11944 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11945 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11946 return Some(expr3_0); 11947 } 11948 } 11949 &Opcode::Sload32 => { 11950 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11951 // Rule at src/isa/s390x/lower.isle line 1347. 11952 let expr0_0 = constructor_lower_address( 11953 ctx, pattern5_2, pattern5_1, pattern5_3, 11954 )?; 11955 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11956 let expr2_0: Type = I32; 11957 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11958 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11959 return Some(expr4_0); 11960 } 11961 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11962 // Rule at src/isa/s390x/lower.isle line 1342. 11963 let expr0_0: Type = I32; 11964 let expr1_0 = constructor_lower_address( 11965 ctx, pattern5_2, pattern5_1, pattern5_3, 11966 )?; 11967 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11968 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11969 return Some(expr3_0); 11970 } 11971 } 11972 _ => {} 11973 } 11974 } 11975 _ => {} 11976 } 11977 } 11978 } 11979 return None; 11980 } 11981 11982 // Generated as internal constructor for term lower_branch. 11983 pub fn constructor_lower_branch<C: Context>( 11984 ctx: &mut C, 11985 arg0: Inst, 11986 arg1: &VecMachLabel, 11987 ) -> Option<InstOutput> { 11988 let pattern0_0 = arg0; 11989 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11990 match &pattern1_0 { 11991 &InstructionData::BranchTable { 11992 opcode: ref pattern2_0, 11993 arg: pattern2_1, 11994 destination: pattern2_2, 11995 table: pattern2_3, 11996 } => { 11997 if let &Opcode::BrTable = pattern2_0 { 11998 let pattern4_0 = arg1; 11999 // Rule at src/isa/s390x/lower.isle line 2083. 12000 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 12001 let expr1_0: Type = I64; 12002 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 12003 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 12004 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 12005 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12006 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 12007 let expr7_0: u8 = 0; 12008 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 12009 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 12010 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 12011 let expr11_0: Type = I64; 12012 let expr12_0: u8 = 2; 12013 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 12014 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 12015 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 12016 return Some(expr15_0); 12017 } 12018 } 12019 &InstructionData::Branch { 12020 opcode: ref pattern2_0, 12021 args: pattern2_1, 12022 destination: pattern2_2, 12023 } => { 12024 match pattern2_0 { 12025 &Opcode::Brz => { 12026 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 12027 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 12028 let pattern6_0 = arg1; 12029 // Rule at src/isa/s390x/lower.isle line 2116. 12030 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 12031 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 12032 let expr2_0: u8 = 0; 12033 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 12034 let expr4_0: u8 = 1; 12035 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 12036 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 12037 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 12038 return Some(expr7_0); 12039 } 12040 } 12041 &Opcode::Brnz => { 12042 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 12043 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 12044 let pattern6_0 = arg1; 12045 // Rule at src/isa/s390x/lower.isle line 2127. 12046 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 12047 let expr1_0: u8 = 0; 12048 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 12049 let expr3_0: u8 = 1; 12050 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 12051 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 12052 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 12053 return Some(expr6_0); 12054 } 12055 } 12056 _ => {} 12057 } 12058 } 12059 &InstructionData::Jump { 12060 opcode: ref pattern2_0, 12061 args: pattern2_1, 12062 destination: pattern2_2, 12063 } => { 12064 if let &Opcode::Jump = pattern2_0 { 12065 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 12066 let pattern5_0 = arg1; 12067 // Rule at src/isa/s390x/lower.isle line 2075. 12068 let expr0_0: u8 = 0; 12069 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 12070 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 12071 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 12072 return Some(expr3_0); 12073 } 12074 } 12075 &InstructionData::BranchInt { 12076 opcode: ref pattern2_0, 12077 args: pattern2_1, 12078 cond: ref pattern2_2, 12079 destination: pattern2_3, 12080 } => { 12081 if let &Opcode::Brif = pattern2_0 { 12082 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 12083 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 12084 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 12085 let pattern7_0 = C::inst_data(ctx, pattern6_0); 12086 if let &InstructionData::Binary { 12087 opcode: ref pattern8_0, 12088 args: ref pattern8_1, 12089 } = &pattern7_0 12090 { 12091 if let &Opcode::Ifcmp = pattern8_0 { 12092 let (pattern10_0, pattern10_1) = 12093 C::unpack_value_array_2(ctx, pattern8_1); 12094 let pattern11_0 = arg1; 12095 // Rule at src/isa/s390x/lower.isle line 2138. 12096 let expr0_0: bool = false; 12097 let expr1_0 = constructor_icmp_val( 12098 ctx, 12099 expr0_0, 12100 pattern2_2, 12101 pattern10_0, 12102 pattern10_1, 12103 )?; 12104 let expr2_0: u8 = 0; 12105 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 12106 let expr4_0: u8 = 1; 12107 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 12108 let expr6_0 = 12109 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 12110 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 12111 return Some(expr7_0); 12112 } 12113 } 12114 } 12115 } 12116 } 12117 } 12118 _ => {} 12119 } 12120 return None; 12121 } 12122 12123 // Generated as internal constructor for term output_ifcout. 12124 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 12125 let pattern0_0 = arg0; 12126 // Rule at src/isa/s390x/lower.isle line 154. 12127 let expr0_0 = C::value_reg(ctx, pattern0_0); 12128 let expr1_0 = C::value_regs_invalid(ctx); 12129 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 12130 return Some(expr2_0); 12131 } 12132 12133 // Generated as internal constructor for term zero_divisor_check_needed. 12134 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12135 let pattern0_0 = arg0; 12136 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12137 let mut closure2 = || { 12138 let expr0_0 = constructor_i64_nonzero(ctx, pattern1_0)?; 12139 return Some(expr0_0); 12140 }; 12141 if let Some(pattern2_0) = closure2() { 12142 // Rule at src/isa/s390x/lower.isle line 344. 12143 let expr0_0: bool = false; 12144 return Some(expr0_0); 12145 } 12146 } 12147 let pattern1_0 = C::value_type(ctx, pattern0_0); 12148 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 12149 // Rule at src/isa/s390x/lower.isle line 347. 12150 let expr0_0: bool = false; 12151 return Some(expr0_0); 12152 } 12153 // Rule at src/isa/s390x/lower.isle line 348. 12154 let expr0_0: bool = true; 12155 return Some(expr0_0); 12156 } 12157 12158 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 12159 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 12160 ctx: &mut C, 12161 arg0: bool, 12162 arg1: Type, 12163 arg2: Reg, 12164 ) -> Option<Reg> { 12165 let pattern0_0 = arg0; 12166 if pattern0_0 == true { 12167 let pattern2_0 = arg1; 12168 let pattern3_0 = arg2; 12169 // Rule at src/isa/s390x/lower.isle line 354. 12170 let expr0_0: i16 = 0; 12171 let expr1_0 = IntCC::Equal; 12172 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 12173 let expr3_0 = C::trap_code_division_by_zero(ctx); 12174 let expr4_0 = constructor_icmps_simm16_and_trap( 12175 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 12176 )?; 12177 return Some(expr4_0); 12178 } 12179 if pattern0_0 == false { 12180 let pattern2_0 = arg1; 12181 let pattern3_0 = arg2; 12182 // Rule at src/isa/s390x/lower.isle line 353. 12183 let expr0_0 = C::invalid_reg(ctx); 12184 return Some(expr0_0); 12185 } 12186 return None; 12187 } 12188 12189 // Generated as internal constructor for term div_overflow_check_needed. 12190 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12191 let pattern0_0 = arg0; 12192 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12193 let mut closure2 = || { 12194 let expr0_0 = constructor_i64_not_neg1(ctx, pattern1_0)?; 12195 return Some(expr0_0); 12196 }; 12197 if let Some(pattern2_0) = closure2() { 12198 // Rule at src/isa/s390x/lower.isle line 427. 12199 let expr0_0: bool = false; 12200 return Some(expr0_0); 12201 } 12202 } 12203 // Rule at src/isa/s390x/lower.isle line 430. 12204 let expr0_0: bool = true; 12205 return Some(expr0_0); 12206 } 12207 12208 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12209 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12210 ctx: &mut C, 12211 arg0: bool, 12212 arg1: Type, 12213 arg2: Type, 12214 arg3: &RegPair, 12215 arg4: Reg, 12216 ) -> Option<Reg> { 12217 let pattern0_0 = arg0; 12218 if pattern0_0 == true { 12219 let pattern2_0 = arg1; 12220 let pattern3_0 = arg2; 12221 let pattern4_0 = arg3; 12222 let pattern5_0 = arg4; 12223 // Rule at src/isa/s390x/lower.isle line 443. 12224 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12225 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12226 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12227 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12228 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12229 let expr5_0: i16 = -1; 12230 let expr6_0 = IntCC::Equal; 12231 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12232 let expr8_0 = C::trap_code_integer_overflow(ctx); 12233 let expr9_0 = constructor_icmps_simm16_and_trap( 12234 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12235 )?; 12236 return Some(expr9_0); 12237 } 12238 if pattern0_0 == false { 12239 let pattern2_0 = arg1; 12240 let pattern3_0 = arg2; 12241 let pattern4_0 = arg3; 12242 let pattern5_0 = arg4; 12243 // Rule at src/isa/s390x/lower.isle line 442. 12244 let expr0_0 = C::invalid_reg(ctx); 12245 return Some(expr0_0); 12246 } 12247 return None; 12248 } 12249 12250 // Generated as internal constructor for term int_max. 12251 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12252 let pattern0_0 = arg0; 12253 if pattern0_0 == I8 { 12254 // Rule at src/isa/s390x/lower.isle line 451. 12255 let expr0_0: u64 = 127; 12256 return Some(expr0_0); 12257 } 12258 if pattern0_0 == I16 { 12259 // Rule at src/isa/s390x/lower.isle line 452. 12260 let expr0_0: u64 = 32767; 12261 return Some(expr0_0); 12262 } 12263 if pattern0_0 == I32 { 12264 // Rule at src/isa/s390x/lower.isle line 453. 12265 let expr0_0: u64 = 2147483647; 12266 return Some(expr0_0); 12267 } 12268 if pattern0_0 == I64 { 12269 // Rule at src/isa/s390x/lower.isle line 454. 12270 let expr0_0: u64 = 9223372036854775807; 12271 return Some(expr0_0); 12272 } 12273 return None; 12274 } 12275 12276 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12277 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12278 ctx: &mut C, 12279 arg0: bool, 12280 arg1: Type, 12281 arg2: &RegPair, 12282 arg3: Reg, 12283 ) -> Option<RegPair> { 12284 let pattern0_0 = arg0; 12285 if pattern0_0 == true { 12286 let pattern2_0 = arg1; 12287 if pattern2_0 == I32 { 12288 let pattern4_0 = arg2; 12289 let pattern5_0 = arg3; 12290 // Rule at src/isa/s390x/lower.isle line 472. 12291 return Some(pattern4_0.clone()); 12292 } 12293 if pattern2_0 == I64 { 12294 let pattern4_0 = arg2; 12295 let pattern5_0 = arg3; 12296 // Rule at src/isa/s390x/lower.isle line 473. 12297 let expr0_0: Type = I64; 12298 let expr1_0: Type = I64; 12299 let expr2_0: i16 = -1; 12300 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12301 let expr4_0 = IntCC::Equal; 12302 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12303 let expr6_0: i16 = 0; 12304 let expr7_0 = constructor_cmov_imm_regpair_lo( 12305 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12306 )?; 12307 return Some(expr7_0); 12308 } 12309 } 12310 if pattern0_0 == false { 12311 let pattern2_0 = arg1; 12312 let pattern3_0 = arg2; 12313 let pattern4_0 = arg3; 12314 // Rule at src/isa/s390x/lower.isle line 471. 12315 return Some(pattern3_0.clone()); 12316 } 12317 return None; 12318 } 12319 12320 // Generated as internal constructor for term cast_bool. 12321 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12322 let pattern0_0 = arg0; 12323 if pattern0_0 == B1 { 12324 let pattern2_0 = arg1; 12325 let pattern3_0 = C::value_type(ctx, pattern2_0); 12326 if pattern3_0 == B1 { 12327 // Rule at src/isa/s390x/lower.isle line 770. 12328 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12329 return Some(expr0_0); 12330 } 12331 if pattern3_0 == B8 { 12332 // Rule at src/isa/s390x/lower.isle line 771. 12333 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12334 return Some(expr0_0); 12335 } 12336 } 12337 if pattern0_0 == B8 { 12338 let pattern2_0 = arg1; 12339 let pattern3_0 = C::value_type(ctx, pattern2_0); 12340 if pattern3_0 == B8 { 12341 // Rule at src/isa/s390x/lower.isle line 772. 12342 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12343 return Some(expr0_0); 12344 } 12345 } 12346 if pattern0_0 == I8 { 12347 let pattern2_0 = arg1; 12348 let pattern3_0 = C::value_type(ctx, pattern2_0); 12349 if pattern3_0 == B8 { 12350 // Rule at src/isa/s390x/lower.isle line 773. 12351 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12352 return Some(expr0_0); 12353 } 12354 } 12355 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12356 let pattern2_0 = arg1; 12357 let pattern3_0 = C::value_type(ctx, pattern2_0); 12358 if pattern3_0 == B16 { 12359 // Rule at src/isa/s390x/lower.isle line 774. 12360 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12361 return Some(expr0_0); 12362 } 12363 } 12364 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12365 let pattern2_0 = arg1; 12366 let pattern3_0 = C::value_type(ctx, pattern2_0); 12367 if pattern3_0 == B32 { 12368 // Rule at src/isa/s390x/lower.isle line 775. 12369 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12370 return Some(expr0_0); 12371 } 12372 } 12373 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12374 let pattern2_0 = arg1; 12375 let pattern3_0 = C::value_type(ctx, pattern2_0); 12376 if pattern3_0 == B64 { 12377 // Rule at src/isa/s390x/lower.isle line 776. 12378 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12379 return Some(expr0_0); 12380 } 12381 } 12382 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12383 let pattern2_0 = arg1; 12384 let pattern3_0 = C::value_type(ctx, pattern2_0); 12385 if pattern3_0 == B1 { 12386 // Rule at src/isa/s390x/lower.isle line 779. 12387 let expr0_0: Type = I32; 12388 let expr1_0: Type = I32; 12389 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12390 let expr3_0: u8 = 31; 12391 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12392 let expr5_0: u8 = 31; 12393 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12394 return Some(expr6_0); 12395 } 12396 if pattern3_0 == B8 { 12397 // Rule at src/isa/s390x/lower.isle line 785. 12398 let expr0_0: Type = I8; 12399 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12400 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12401 return Some(expr2_0); 12402 } 12403 if pattern3_0 == B16 { 12404 // Rule at src/isa/s390x/lower.isle line 787. 12405 let expr0_0: Type = I16; 12406 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12407 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12408 return Some(expr2_0); 12409 } 12410 } 12411 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12412 let pattern2_0 = arg1; 12413 let pattern3_0 = C::value_type(ctx, pattern2_0); 12414 if pattern3_0 == B1 { 12415 // Rule at src/isa/s390x/lower.isle line 781. 12416 let expr0_0: Type = I64; 12417 let expr1_0: Type = I64; 12418 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12419 let expr3_0: u8 = 63; 12420 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12421 let expr5_0: u8 = 63; 12422 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12423 return Some(expr6_0); 12424 } 12425 if pattern3_0 == B8 { 12426 // Rule at src/isa/s390x/lower.isle line 789. 12427 let expr0_0: Type = I8; 12428 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12429 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12430 return Some(expr2_0); 12431 } 12432 if pattern3_0 == B16 { 12433 // Rule at src/isa/s390x/lower.isle line 791. 12434 let expr0_0: Type = I16; 12435 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12436 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12437 return Some(expr2_0); 12438 } 12439 if pattern3_0 == B32 { 12440 // Rule at src/isa/s390x/lower.isle line 793. 12441 let expr0_0: Type = I32; 12442 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12443 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12444 return Some(expr2_0); 12445 } 12446 } 12447 return None; 12448 } 12449 12450 // Generated as internal constructor for term clz_offset. 12451 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12452 let pattern0_0 = arg0; 12453 if pattern0_0 == I8 { 12454 let pattern2_0 = arg1; 12455 // Rule at src/isa/s390x/lower.isle line 818. 12456 let expr0_0: Type = I8; 12457 let expr1_0: i16 = -56; 12458 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12459 return Some(expr2_0); 12460 } 12461 if pattern0_0 == I16 { 12462 let pattern2_0 = arg1; 12463 // Rule at src/isa/s390x/lower.isle line 819. 12464 let expr0_0: Type = I16; 12465 let expr1_0: i16 = -48; 12466 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12467 return Some(expr2_0); 12468 } 12469 if pattern0_0 == I32 { 12470 let pattern2_0 = arg1; 12471 // Rule at src/isa/s390x/lower.isle line 820. 12472 let expr0_0: Type = I32; 12473 let expr1_0: i16 = -32; 12474 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12475 return Some(expr2_0); 12476 } 12477 if pattern0_0 == I64 { 12478 let pattern2_0 = arg1; 12479 // Rule at src/isa/s390x/lower.isle line 821. 12480 let expr0_0: Type = I64; 12481 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12482 return Some(expr1_0); 12483 } 12484 return None; 12485 } 12486 12487 // Generated as internal constructor for term ctz_guardbit. 12488 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12489 let pattern0_0 = arg0; 12490 if pattern0_0 == I8 { 12491 // Rule at src/isa/s390x/lower.isle line 870. 12492 let expr0_0: u16 = 256; 12493 let expr1_0: u8 = 0; 12494 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12495 return Some(expr2_0); 12496 } 12497 if pattern0_0 == I16 { 12498 // Rule at src/isa/s390x/lower.isle line 871. 12499 let expr0_0: u16 = 1; 12500 let expr1_0: u8 = 16; 12501 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12502 return Some(expr2_0); 12503 } 12504 if pattern0_0 == I32 { 12505 // Rule at src/isa/s390x/lower.isle line 872. 12506 let expr0_0: u16 = 1; 12507 let expr1_0: u8 = 32; 12508 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12509 return Some(expr2_0); 12510 } 12511 return None; 12512 } 12513 12514 // Generated as internal constructor for term istore8_impl. 12515 pub fn constructor_istore8_impl<C: Context>( 12516 ctx: &mut C, 12517 arg0: MemFlags, 12518 arg1: Value, 12519 arg2: Value, 12520 arg3: Offset32, 12521 ) -> Option<SideEffectNoResult> { 12522 let pattern0_0 = arg0; 12523 let pattern1_0 = arg1; 12524 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12525 let pattern3_0 = arg2; 12526 let pattern4_0 = arg3; 12527 // Rule at src/isa/s390x/lower.isle line 1429. 12528 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12529 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12530 return Some(expr1_0); 12531 } 12532 let pattern2_0 = arg2; 12533 let pattern3_0 = arg3; 12534 // Rule at src/isa/s390x/lower.isle line 1425. 12535 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12536 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12537 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12538 return Some(expr2_0); 12539 } 12540 12541 // Generated as internal constructor for term istore16_impl. 12542 pub fn constructor_istore16_impl<C: Context>( 12543 ctx: &mut C, 12544 arg0: MemFlags, 12545 arg1: Value, 12546 arg2: Value, 12547 arg3: Offset32, 12548 ) -> Option<SideEffectNoResult> { 12549 let pattern0_0 = arg0; 12550 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12551 let pattern2_0 = arg1; 12552 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12553 let pattern4_0 = arg2; 12554 let pattern5_0 = arg3; 12555 // Rule at src/isa/s390x/lower.isle line 1455. 12556 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12557 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12558 return Some(expr1_0); 12559 } 12560 let pattern3_0 = arg2; 12561 let pattern4_0 = arg3; 12562 // Rule at src/isa/s390x/lower.isle line 1447. 12563 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12564 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12565 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12566 return Some(expr2_0); 12567 } 12568 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12569 let pattern2_0 = arg1; 12570 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12571 let pattern4_0 = arg2; 12572 let pattern5_0 = arg3; 12573 // Rule at src/isa/s390x/lower.isle line 1451. 12574 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12575 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12576 return Some(expr1_0); 12577 } 12578 let pattern3_0 = arg2; 12579 let pattern4_0 = arg3; 12580 // Rule at src/isa/s390x/lower.isle line 1443. 12581 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12582 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12583 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12584 return Some(expr2_0); 12585 } 12586 return None; 12587 } 12588 12589 // Generated as internal constructor for term istore32_impl. 12590 pub fn constructor_istore32_impl<C: Context>( 12591 ctx: &mut C, 12592 arg0: MemFlags, 12593 arg1: Value, 12594 arg2: Value, 12595 arg3: Offset32, 12596 ) -> Option<SideEffectNoResult> { 12597 let pattern0_0 = arg0; 12598 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12599 let pattern2_0 = arg1; 12600 let pattern3_0 = arg2; 12601 let pattern4_0 = arg3; 12602 // Rule at src/isa/s390x/lower.isle line 1477. 12603 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12604 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12605 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12606 return Some(expr2_0); 12607 } 12608 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12609 let pattern2_0 = arg1; 12610 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12611 let pattern4_0 = arg2; 12612 let pattern5_0 = arg3; 12613 // Rule at src/isa/s390x/lower.isle line 1473. 12614 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12615 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12616 return Some(expr1_0); 12617 } 12618 let pattern3_0 = arg2; 12619 let pattern4_0 = arg3; 12620 // Rule at src/isa/s390x/lower.isle line 1469. 12621 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12622 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12623 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12624 return Some(expr2_0); 12625 } 12626 return None; 12627 } 12628 12629 // Generated as internal constructor for term istore64_impl. 12630 pub fn constructor_istore64_impl<C: Context>( 12631 ctx: &mut C, 12632 arg0: MemFlags, 12633 arg1: Value, 12634 arg2: Value, 12635 arg3: Offset32, 12636 ) -> Option<SideEffectNoResult> { 12637 let pattern0_0 = arg0; 12638 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12639 let pattern2_0 = arg1; 12640 let pattern3_0 = arg2; 12641 let pattern4_0 = arg3; 12642 // Rule at src/isa/s390x/lower.isle line 1495. 12643 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12644 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12645 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12646 return Some(expr2_0); 12647 } 12648 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12649 let pattern2_0 = arg1; 12650 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12651 let pattern4_0 = arg2; 12652 let pattern5_0 = arg3; 12653 // Rule at src/isa/s390x/lower.isle line 1491. 12654 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12655 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12656 return Some(expr1_0); 12657 } 12658 let pattern3_0 = arg2; 12659 let pattern4_0 = arg3; 12660 // Rule at src/isa/s390x/lower.isle line 1487. 12661 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12662 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12663 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12664 return Some(expr2_0); 12665 } 12666 return None; 12667 } 12668 12669 // Generated as internal constructor for term atomic_rmw_body. 12670 pub fn constructor_atomic_rmw_body<C: Context>( 12671 ctx: &mut C, 12672 arg0: &VecMInstBuilder, 12673 arg1: Type, 12674 arg2: MemFlags, 12675 arg3: &AtomicRmwOp, 12676 arg4: WritableReg, 12677 arg5: Reg, 12678 arg6: Reg, 12679 ) -> Option<Reg> { 12680 let pattern0_0 = arg0; 12681 let pattern1_0 = arg1; 12682 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12683 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12684 let pattern4_0 = arg2; 12685 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12686 let pattern6_0 = arg3; 12687 if let &AtomicRmwOp::Nand = pattern6_0 { 12688 let pattern8_0 = arg4; 12689 let pattern9_0 = arg5; 12690 let pattern10_0 = arg6; 12691 // Rule at src/isa/s390x/lower.isle line 1603. 12692 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12693 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12694 let expr2_0 = constructor_push_alu_reg( 12695 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12696 )?; 12697 return Some(expr2_0); 12698 } 12699 } 12700 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12701 let pattern6_0 = arg3; 12702 if let &AtomicRmwOp::Nand = pattern6_0 { 12703 let pattern8_0 = arg4; 12704 let pattern9_0 = arg5; 12705 let pattern10_0 = arg6; 12706 // Rule at src/isa/s390x/lower.isle line 1600. 12707 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12708 let expr1_0 = constructor_push_alu_reg( 12709 ctx, 12710 pattern0_0, 12711 &expr0_0, 12712 pattern8_0, 12713 pattern9_0, 12714 pattern10_0, 12715 )?; 12716 return Some(expr1_0); 12717 } 12718 } 12719 } 12720 } 12721 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12722 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12723 let pattern4_0 = arg2; 12724 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12725 let pattern6_0 = arg3; 12726 if let &AtomicRmwOp::Nand = pattern6_0 { 12727 let pattern8_0 = arg4; 12728 let pattern9_0 = arg5; 12729 let pattern10_0 = arg6; 12730 // Rule at src/isa/s390x/lower.isle line 1610. 12731 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12732 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12733 let expr2_0 = constructor_push_alu_reg( 12734 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12735 )?; 12736 let expr3_0 = 12737 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12738 return Some(expr3_0); 12739 } 12740 } 12741 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12742 let pattern6_0 = arg3; 12743 if let &AtomicRmwOp::Nand = pattern6_0 { 12744 let pattern8_0 = arg4; 12745 let pattern9_0 = arg5; 12746 let pattern10_0 = arg6; 12747 // Rule at src/isa/s390x/lower.isle line 1606. 12748 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12749 let expr1_0 = constructor_push_alu_reg( 12750 ctx, 12751 pattern0_0, 12752 &expr0_0, 12753 pattern8_0, 12754 pattern9_0, 12755 pattern10_0, 12756 )?; 12757 let expr2_0 = 12758 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12759 return Some(expr2_0); 12760 } 12761 } 12762 } 12763 } 12764 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12765 let pattern3_0 = arg2; 12766 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12767 let pattern5_0 = arg3; 12768 if let &AtomicRmwOp::Xchg = pattern5_0 { 12769 let pattern7_0 = arg4; 12770 let pattern8_0 = arg5; 12771 let pattern9_0 = arg6; 12772 // Rule at src/isa/s390x/lower.isle line 1592. 12773 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12774 return Some(expr0_0); 12775 } 12776 } 12777 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12778 let pattern5_0 = arg3; 12779 if let &AtomicRmwOp::Xchg = pattern5_0 { 12780 let pattern7_0 = arg4; 12781 let pattern8_0 = arg5; 12782 let pattern9_0 = arg6; 12783 // Rule at src/isa/s390x/lower.isle line 1589. 12784 return Some(pattern9_0); 12785 } 12786 } 12787 } 12788 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12789 let pattern3_0 = arg2; 12790 let pattern4_0 = arg3; 12791 match pattern4_0 { 12792 &AtomicRmwOp::And => { 12793 let pattern6_0 = arg4; 12794 let pattern7_0 = arg5; 12795 let pattern8_0 = arg6; 12796 // Rule at src/isa/s390x/lower.isle line 1620. 12797 let expr0_0 = RxSBGOp::And; 12798 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12799 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12800 pattern8_0, 12801 )?; 12802 return Some(expr1_0); 12803 } 12804 &AtomicRmwOp::Nand => { 12805 let pattern6_0 = arg4; 12806 let pattern7_0 = arg5; 12807 let pattern8_0 = arg6; 12808 // Rule at src/isa/s390x/lower.isle line 1626. 12809 let expr0_0 = RxSBGOp::And; 12810 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12811 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12812 pattern8_0, 12813 )?; 12814 let expr2_0 = constructor_atomic_rmw_body_invert( 12815 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12816 )?; 12817 return Some(expr2_0); 12818 } 12819 &AtomicRmwOp::Or => { 12820 let pattern6_0 = arg4; 12821 let pattern7_0 = arg5; 12822 let pattern8_0 = arg6; 12823 // Rule at src/isa/s390x/lower.isle line 1622. 12824 let expr0_0 = RxSBGOp::Or; 12825 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12826 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12827 pattern8_0, 12828 )?; 12829 return Some(expr1_0); 12830 } 12831 &AtomicRmwOp::Xchg => { 12832 let pattern6_0 = arg4; 12833 let pattern7_0 = arg5; 12834 let pattern8_0 = arg6; 12835 // Rule at src/isa/s390x/lower.isle line 1618. 12836 let expr0_0 = RxSBGOp::Insert; 12837 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12838 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12839 pattern8_0, 12840 )?; 12841 return Some(expr1_0); 12842 } 12843 &AtomicRmwOp::Xor => { 12844 let pattern6_0 = arg4; 12845 let pattern7_0 = arg5; 12846 let pattern8_0 = arg6; 12847 // Rule at src/isa/s390x/lower.isle line 1624. 12848 let expr0_0 = RxSBGOp::Xor; 12849 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12850 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12851 pattern8_0, 12852 )?; 12853 return Some(expr1_0); 12854 } 12855 _ => {} 12856 } 12857 } 12858 let pattern2_0 = arg2; 12859 let pattern3_0 = arg3; 12860 match pattern3_0 { 12861 &AtomicRmwOp::Add => { 12862 let pattern5_0 = arg4; 12863 let pattern6_0 = arg5; 12864 let pattern7_0 = arg6; 12865 // Rule at src/isa/s390x/lower.isle line 1658. 12866 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12867 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12868 let expr2_0 = constructor_atomic_rmw_body_addsub( 12869 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12870 pattern7_0, 12871 )?; 12872 return Some(expr2_0); 12873 } 12874 &AtomicRmwOp::Smax => { 12875 let pattern5_0 = arg4; 12876 let pattern6_0 = arg5; 12877 let pattern7_0 = arg6; 12878 // Rule at src/isa/s390x/lower.isle line 1699. 12879 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12880 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12881 let expr2_0 = IntCC::SignedGreaterThan; 12882 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12883 let expr4_0 = constructor_atomic_rmw_body_minmax( 12884 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12885 pattern6_0, pattern7_0, 12886 )?; 12887 return Some(expr4_0); 12888 } 12889 &AtomicRmwOp::Smin => { 12890 let pattern5_0 = arg4; 12891 let pattern6_0 = arg5; 12892 let pattern7_0 = arg6; 12893 // Rule at src/isa/s390x/lower.isle line 1696. 12894 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12895 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12896 let expr2_0 = IntCC::SignedLessThan; 12897 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12898 let expr4_0 = constructor_atomic_rmw_body_minmax( 12899 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12900 pattern6_0, pattern7_0, 12901 )?; 12902 return Some(expr4_0); 12903 } 12904 &AtomicRmwOp::Sub => { 12905 let pattern5_0 = arg4; 12906 let pattern6_0 = arg5; 12907 let pattern7_0 = arg6; 12908 // Rule at src/isa/s390x/lower.isle line 1660. 12909 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12910 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12911 let expr2_0 = constructor_atomic_rmw_body_addsub( 12912 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12913 pattern7_0, 12914 )?; 12915 return Some(expr2_0); 12916 } 12917 &AtomicRmwOp::Umax => { 12918 let pattern5_0 = arg4; 12919 let pattern6_0 = arg5; 12920 let pattern7_0 = arg6; 12921 // Rule at src/isa/s390x/lower.isle line 1705. 12922 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12923 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12924 let expr2_0 = IntCC::UnsignedGreaterThan; 12925 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12926 let expr4_0 = constructor_atomic_rmw_body_minmax( 12927 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12928 pattern6_0, pattern7_0, 12929 )?; 12930 return Some(expr4_0); 12931 } 12932 &AtomicRmwOp::Umin => { 12933 let pattern5_0 = arg4; 12934 let pattern6_0 = arg5; 12935 let pattern7_0 = arg6; 12936 // Rule at src/isa/s390x/lower.isle line 1702. 12937 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12938 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12939 let expr2_0 = IntCC::UnsignedLessThan; 12940 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12941 let expr4_0 = constructor_atomic_rmw_body_minmax( 12942 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12943 pattern6_0, pattern7_0, 12944 )?; 12945 return Some(expr4_0); 12946 } 12947 _ => {} 12948 } 12949 return None; 12950 } 12951 12952 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12953 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12954 ctx: &mut C, 12955 arg0: &VecMInstBuilder, 12956 arg1: Type, 12957 arg2: MemFlags, 12958 arg3: &RxSBGOp, 12959 arg4: WritableReg, 12960 arg5: Reg, 12961 arg6: Reg, 12962 ) -> Option<Reg> { 12963 let pattern0_0 = arg0; 12964 let pattern1_0 = arg1; 12965 if pattern1_0 == I8 { 12966 let pattern3_0 = arg2; 12967 let pattern4_0 = arg3; 12968 let pattern5_0 = arg4; 12969 let pattern6_0 = arg5; 12970 let pattern7_0 = arg6; 12971 // Rule at src/isa/s390x/lower.isle line 1634. 12972 let expr0_0: u8 = 32; 12973 let expr1_0: u8 = 40; 12974 let expr2_0: i8 = 24; 12975 let expr3_0 = constructor_push_rxsbg( 12976 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12977 expr2_0, 12978 )?; 12979 return Some(expr3_0); 12980 } 12981 if pattern1_0 == I16 { 12982 let pattern3_0 = arg2; 12983 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12984 let pattern5_0 = arg3; 12985 let pattern6_0 = arg4; 12986 let pattern7_0 = arg5; 12987 let pattern8_0 = arg6; 12988 // Rule at src/isa/s390x/lower.isle line 1642. 12989 let expr0_0: Type = I32; 12990 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12991 let expr2_0: u8 = 48; 12992 let expr3_0: u8 = 64; 12993 let expr4_0: i8 = -16; 12994 let expr5_0 = constructor_push_rxsbg( 12995 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12996 expr4_0, 12997 )?; 12998 return Some(expr5_0); 12999 } 13000 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13001 let pattern5_0 = arg3; 13002 let pattern6_0 = arg4; 13003 let pattern7_0 = arg5; 13004 let pattern8_0 = arg6; 13005 // Rule at src/isa/s390x/lower.isle line 1638. 13006 let expr0_0: u8 = 32; 13007 let expr1_0: u8 = 48; 13008 let expr2_0: i8 = 16; 13009 let expr3_0 = constructor_push_rxsbg( 13010 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 13011 expr2_0, 13012 )?; 13013 return Some(expr3_0); 13014 } 13015 } 13016 return None; 13017 } 13018 13019 // Generated as internal constructor for term atomic_rmw_body_invert. 13020 pub fn constructor_atomic_rmw_body_invert<C: Context>( 13021 ctx: &mut C, 13022 arg0: &VecMInstBuilder, 13023 arg1: Type, 13024 arg2: MemFlags, 13025 arg3: WritableReg, 13026 arg4: Reg, 13027 ) -> Option<Reg> { 13028 let pattern0_0 = arg0; 13029 let pattern1_0 = arg1; 13030 if pattern1_0 == I8 { 13031 let pattern3_0 = arg2; 13032 let pattern4_0 = arg3; 13033 let pattern5_0 = arg4; 13034 // Rule at src/isa/s390x/lower.isle line 1648. 13035 let expr0_0: Type = I32; 13036 let expr1_0: u32 = 4278190080; 13037 let expr2_0: u8 = 0; 13038 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 13039 let expr4_0 = constructor_push_xor_uimm32shifted( 13040 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 13041 )?; 13042 return Some(expr4_0); 13043 } 13044 if pattern1_0 == I16 { 13045 let pattern3_0 = arg2; 13046 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13047 let pattern5_0 = arg3; 13048 let pattern6_0 = arg4; 13049 // Rule at src/isa/s390x/lower.isle line 1654. 13050 let expr0_0: Type = I32; 13051 let expr1_0: u32 = 65535; 13052 let expr2_0: u8 = 0; 13053 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 13054 let expr4_0 = constructor_push_xor_uimm32shifted( 13055 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 13056 )?; 13057 return Some(expr4_0); 13058 } 13059 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13060 let pattern5_0 = arg3; 13061 let pattern6_0 = arg4; 13062 // Rule at src/isa/s390x/lower.isle line 1651. 13063 let expr0_0: Type = I32; 13064 let expr1_0: u32 = 4294901760; 13065 let expr2_0: u8 = 0; 13066 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 13067 let expr4_0 = constructor_push_xor_uimm32shifted( 13068 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 13069 )?; 13070 return Some(expr4_0); 13071 } 13072 } 13073 return None; 13074 } 13075 13076 // Generated as internal constructor for term atomic_rmw_body_addsub. 13077 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 13078 ctx: &mut C, 13079 arg0: &VecMInstBuilder, 13080 arg1: Type, 13081 arg2: MemFlags, 13082 arg3: &ALUOp, 13083 arg4: WritableReg, 13084 arg5: Reg, 13085 arg6: Reg, 13086 ) -> Option<Reg> { 13087 let pattern0_0 = arg0; 13088 let pattern1_0 = arg1; 13089 if pattern1_0 == I8 { 13090 let pattern3_0 = arg2; 13091 let pattern4_0 = arg3; 13092 let pattern5_0 = arg4; 13093 let pattern6_0 = arg5; 13094 let pattern7_0 = arg6; 13095 // Rule at src/isa/s390x/lower.isle line 1677. 13096 let expr0_0: Type = I32; 13097 let expr1_0: u8 = 24; 13098 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 13099 let expr3_0 = 13100 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 13101 return Some(expr3_0); 13102 } 13103 if pattern1_0 == I16 { 13104 let pattern3_0 = arg2; 13105 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13106 let pattern5_0 = arg3; 13107 let pattern6_0 = arg4; 13108 let pattern7_0 = arg5; 13109 let pattern8_0 = arg6; 13110 // Rule at src/isa/s390x/lower.isle line 1689. 13111 let expr0_0: Type = I32; 13112 let expr1_0: u8 = 16; 13113 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13114 let expr3_0: Type = I32; 13115 let expr4_0 = 13116 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 13117 let expr5_0 = constructor_push_alu_reg( 13118 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 13119 )?; 13120 let expr6_0: Type = I32; 13121 let expr7_0 = 13122 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 13123 return Some(expr7_0); 13124 } 13125 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13126 let pattern5_0 = arg3; 13127 let pattern6_0 = arg4; 13128 let pattern7_0 = arg5; 13129 let pattern8_0 = arg6; 13130 // Rule at src/isa/s390x/lower.isle line 1681. 13131 let expr0_0: Type = I32; 13132 let expr1_0: u8 = 16; 13133 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13134 let expr3_0 = constructor_push_alu_reg( 13135 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 13136 )?; 13137 return Some(expr3_0); 13138 } 13139 } 13140 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13141 let pattern3_0 = arg2; 13142 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13143 let pattern5_0 = arg3; 13144 let pattern6_0 = arg4; 13145 let pattern7_0 = arg5; 13146 let pattern8_0 = arg6; 13147 // Rule at src/isa/s390x/lower.isle line 1671. 13148 let expr0_0 = 13149 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 13150 let expr1_0 = constructor_push_alu_reg( 13151 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 13152 )?; 13153 let expr2_0 = 13154 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 13155 return Some(expr2_0); 13156 } 13157 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13158 let pattern5_0 = arg3; 13159 let pattern6_0 = arg4; 13160 let pattern7_0 = arg5; 13161 let pattern8_0 = arg6; 13162 // Rule at src/isa/s390x/lower.isle line 1667. 13163 let expr0_0 = constructor_push_alu_reg( 13164 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 13165 )?; 13166 return Some(expr0_0); 13167 } 13168 } 13169 return None; 13170 } 13171 13172 // Generated as internal constructor for term atomic_rmw_body_minmax. 13173 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 13174 ctx: &mut C, 13175 arg0: &VecMInstBuilder, 13176 arg1: Type, 13177 arg2: MemFlags, 13178 arg3: &CmpOp, 13179 arg4: &Cond, 13180 arg5: WritableReg, 13181 arg6: Reg, 13182 arg7: Reg, 13183 ) -> Option<Reg> { 13184 let pattern0_0 = arg0; 13185 let pattern1_0 = arg1; 13186 if pattern1_0 == I8 { 13187 let pattern3_0 = arg2; 13188 let pattern4_0 = arg3; 13189 let pattern5_0 = arg4; 13190 let pattern6_0 = arg5; 13191 let pattern7_0 = arg6; 13192 let pattern8_0 = arg7; 13193 // Rule at src/isa/s390x/lower.isle line 1734. 13194 let expr0_0: Type = I32; 13195 let expr1_0: u8 = 24; 13196 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13197 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13198 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13199 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13200 let expr6_0 = RxSBGOp::Insert; 13201 let expr7_0: u8 = 32; 13202 let expr8_0: u8 = 40; 13203 let expr9_0: i8 = 0; 13204 let expr10_0 = constructor_push_rxsbg( 13205 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13206 )?; 13207 return Some(expr10_0); 13208 } 13209 if pattern1_0 == I16 { 13210 let pattern3_0 = arg2; 13211 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13212 let pattern5_0 = arg3; 13213 let pattern6_0 = arg4; 13214 let pattern7_0 = arg5; 13215 let pattern8_0 = arg6; 13216 let pattern9_0 = arg7; 13217 // Rule at src/isa/s390x/lower.isle line 1747. 13218 let expr0_0: Type = I32; 13219 let expr1_0: u8 = 16; 13220 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13221 let expr3_0: Type = I32; 13222 let expr4_0 = 13223 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13224 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13225 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13226 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13227 let expr8_0 = RxSBGOp::Insert; 13228 let expr9_0: u8 = 32; 13229 let expr10_0: u8 = 48; 13230 let expr11_0: i8 = 0; 13231 let expr12_0 = constructor_push_rxsbg( 13232 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13233 expr11_0, 13234 )?; 13235 let expr13_0: Type = I32; 13236 let expr14_0 = 13237 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13238 return Some(expr14_0); 13239 } 13240 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13241 let pattern5_0 = arg3; 13242 let pattern6_0 = arg4; 13243 let pattern7_0 = arg5; 13244 let pattern8_0 = arg6; 13245 let pattern9_0 = arg7; 13246 // Rule at src/isa/s390x/lower.isle line 1740. 13247 let expr0_0: Type = I32; 13248 let expr1_0: u8 = 16; 13249 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13250 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13251 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13252 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13253 let expr6_0 = RxSBGOp::Insert; 13254 let expr7_0: u8 = 32; 13255 let expr8_0: u8 = 48; 13256 let expr9_0: i8 = 0; 13257 let expr10_0 = constructor_push_rxsbg( 13258 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13259 expr9_0, 13260 )?; 13261 return Some(expr10_0); 13262 } 13263 } 13264 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13265 let pattern3_0 = arg2; 13266 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13267 let pattern5_0 = arg3; 13268 let pattern6_0 = arg4; 13269 let pattern7_0 = arg5; 13270 let pattern8_0 = arg6; 13271 let pattern9_0 = arg7; 13272 // Rule at src/isa/s390x/lower.isle line 1722. 13273 let expr0_0 = 13274 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13275 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13276 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13277 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13278 let expr4_0 = 13279 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13280 return Some(expr4_0); 13281 } 13282 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13283 let pattern5_0 = arg3; 13284 let pattern6_0 = arg4; 13285 let pattern7_0 = arg5; 13286 let pattern8_0 = arg6; 13287 let pattern9_0 = arg7; 13288 // Rule at src/isa/s390x/lower.isle line 1715. 13289 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13290 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13291 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13292 return Some(pattern9_0); 13293 } 13294 } 13295 return None; 13296 } 13297 13298 // Generated as internal constructor for term atomic_cas_body. 13299 pub fn constructor_atomic_cas_body<C: Context>( 13300 ctx: &mut C, 13301 arg0: &VecMInstBuilder, 13302 arg1: Type, 13303 arg2: MemFlags, 13304 arg3: WritableReg, 13305 arg4: Reg, 13306 arg5: Reg, 13307 arg6: Reg, 13308 ) -> Option<Reg> { 13309 let pattern0_0 = arg0; 13310 let pattern1_0 = arg1; 13311 if pattern1_0 == I8 { 13312 let pattern3_0 = arg2; 13313 let pattern4_0 = arg3; 13314 let pattern5_0 = arg4; 13315 let pattern6_0 = arg5; 13316 let pattern7_0 = arg6; 13317 // Rule at src/isa/s390x/lower.isle line 1799. 13318 let expr0_0 = RxSBGOp::Xor; 13319 let expr1_0: u8 = 32; 13320 let expr2_0: u8 = 40; 13321 let expr3_0: i8 = 24; 13322 let expr4_0 = constructor_rxsbg_test( 13323 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13324 )?; 13325 let expr5_0 = IntCC::NotEqual; 13326 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13327 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13328 let expr8_0 = RxSBGOp::Insert; 13329 let expr9_0: u8 = 32; 13330 let expr10_0: u8 = 40; 13331 let expr11_0: i8 = 24; 13332 let expr12_0 = constructor_push_rxsbg( 13333 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13334 expr11_0, 13335 )?; 13336 return Some(expr12_0); 13337 } 13338 if pattern1_0 == I16 { 13339 let pattern3_0 = arg2; 13340 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13341 let pattern5_0 = arg3; 13342 let pattern6_0 = arg4; 13343 let pattern7_0 = arg5; 13344 let pattern8_0 = arg6; 13345 // Rule at src/isa/s390x/lower.isle line 1817. 13346 let expr0_0: Type = I32; 13347 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13348 let expr2_0: Type = I32; 13349 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13350 let expr4_0 = RxSBGOp::Xor; 13351 let expr5_0: u8 = 48; 13352 let expr6_0: u8 = 64; 13353 let expr7_0: i8 = -16; 13354 let expr8_0 = constructor_rxsbg_test( 13355 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13356 )?; 13357 let expr9_0 = IntCC::NotEqual; 13358 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13359 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13360 let expr12_0 = RxSBGOp::Insert; 13361 let expr13_0: u8 = 48; 13362 let expr14_0: u8 = 64; 13363 let expr15_0: i8 = -16; 13364 let expr16_0 = constructor_push_rxsbg( 13365 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13366 expr15_0, 13367 )?; 13368 return Some(expr16_0); 13369 } 13370 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13371 let pattern5_0 = arg3; 13372 let pattern6_0 = arg4; 13373 let pattern7_0 = arg5; 13374 let pattern8_0 = arg6; 13375 // Rule at src/isa/s390x/lower.isle line 1806. 13376 let expr0_0 = RxSBGOp::Xor; 13377 let expr1_0: u8 = 32; 13378 let expr2_0: u8 = 48; 13379 let expr3_0: i8 = 16; 13380 let expr4_0 = constructor_rxsbg_test( 13381 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13382 )?; 13383 let expr5_0 = IntCC::NotEqual; 13384 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13385 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13386 let expr8_0 = RxSBGOp::Insert; 13387 let expr9_0: u8 = 32; 13388 let expr10_0: u8 = 48; 13389 let expr11_0: i8 = 16; 13390 let expr12_0 = constructor_push_rxsbg( 13391 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13392 expr11_0, 13393 )?; 13394 return Some(expr12_0); 13395 } 13396 } 13397 return None; 13398 } 13399 13400 // Generated as internal constructor for term atomic_store_impl. 13401 pub fn constructor_atomic_store_impl<C: Context>( 13402 ctx: &mut C, 13403 arg0: &SideEffectNoResult, 13404 ) -> Option<InstOutput> { 13405 let pattern0_0 = arg0; 13406 // Rule at src/isa/s390x/lower.isle line 1863. 13407 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13408 let expr1_0 = constructor_fence_impl(ctx)?; 13409 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13410 return Some(expr2_0); 13411 } 13412 13413 // Generated as internal constructor for term icmp_val. 13414 pub fn constructor_icmp_val<C: Context>( 13415 ctx: &mut C, 13416 arg0: bool, 13417 arg1: &IntCC, 13418 arg2: Value, 13419 arg3: Value, 13420 ) -> Option<ProducesBool> { 13421 let pattern0_0 = arg0; 13422 let pattern1_0 = arg1; 13423 if let Some(()) = C::signed(ctx, pattern1_0) { 13424 let pattern3_0 = arg2; 13425 let pattern4_0 = arg3; 13426 // Rule at src/isa/s390x/lower.isle line 1930. 13427 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13428 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13429 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13430 return Some(expr2_0); 13431 } 13432 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13433 let pattern3_0 = arg2; 13434 let pattern4_0 = arg3; 13435 // Rule at src/isa/s390x/lower.isle line 1933. 13436 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13437 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13438 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13439 return Some(expr2_0); 13440 } 13441 return None; 13442 } 13443 13444 // Generated as internal constructor for term icmps_val. 13445 pub fn constructor_icmps_val<C: Context>( 13446 ctx: &mut C, 13447 arg0: bool, 13448 arg1: Value, 13449 arg2: Value, 13450 ) -> Option<ProducesFlags> { 13451 let pattern0_0 = arg0; 13452 if pattern0_0 == true { 13453 let pattern2_0 = arg1; 13454 let pattern3_0 = C::value_type(ctx, pattern2_0); 13455 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13456 let pattern5_0 = arg2; 13457 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13458 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13459 if let &InstructionData::Load { 13460 opcode: ref pattern8_0, 13461 arg: pattern8_1, 13462 flags: pattern8_2, 13463 offset: pattern8_3, 13464 } = &pattern7_0 13465 { 13466 match pattern8_0 { 13467 &Opcode::Sload16 => { 13468 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13469 // Rule at src/isa/s390x/lower.isle line 1963. 13470 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13471 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13472 let expr2_0 = constructor_icmps_mem_sext16( 13473 ctx, pattern4_0, expr0_0, &expr1_0, 13474 )?; 13475 return Some(expr2_0); 13476 } 13477 } 13478 &Opcode::Sload32 => { 13479 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13480 // Rule at src/isa/s390x/lower.isle line 1965. 13481 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13482 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13483 let expr2_0 = constructor_icmps_mem_sext32( 13484 ctx, pattern4_0, expr0_0, &expr1_0, 13485 )?; 13486 return Some(expr2_0); 13487 } 13488 } 13489 _ => {} 13490 } 13491 } 13492 } 13493 let pattern6_0 = C::value_type(ctx, pattern5_0); 13494 if pattern6_0 == I16 { 13495 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13496 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13497 if let &InstructionData::Load { 13498 opcode: ref pattern10_0, 13499 arg: pattern10_1, 13500 flags: pattern10_2, 13501 offset: pattern10_3, 13502 } = &pattern9_0 13503 { 13504 if let &Opcode::Load = pattern10_0 { 13505 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13506 // Rule at src/isa/s390x/lower.isle line 1959. 13507 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13508 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13509 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13510 let expr3_0 = 13511 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13512 return Some(expr3_0); 13513 } 13514 } 13515 } 13516 } 13517 } 13518 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13519 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13520 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13521 if let &InstructionData::Load { 13522 opcode: ref pattern10_0, 13523 arg: pattern10_1, 13524 flags: pattern10_2, 13525 offset: pattern10_3, 13526 } = &pattern9_0 13527 { 13528 if let &Opcode::Load = pattern10_0 { 13529 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13530 // Rule at src/isa/s390x/lower.isle line 1955. 13531 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13532 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13533 let expr2_0 = 13534 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13535 return Some(expr2_0); 13536 } 13537 } 13538 } 13539 } 13540 } 13541 } 13542 } 13543 let pattern1_0 = arg1; 13544 let pattern2_0 = C::value_type(ctx, pattern1_0); 13545 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13546 let pattern4_0 = arg2; 13547 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13548 // Rule at src/isa/s390x/lower.isle line 1949. 13549 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13550 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13551 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13552 return Some(expr2_0); 13553 } 13554 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13555 // Rule at src/isa/s390x/lower.isle line 1951. 13556 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13557 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13558 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13559 return Some(expr2_0); 13560 } 13561 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13562 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13563 if let &InstructionData::Unary { 13564 opcode: ref pattern7_0, 13565 arg: pattern7_1, 13566 } = &pattern6_0 13567 { 13568 if let &Opcode::Sextend = pattern7_0 { 13569 let pattern9_0 = C::value_type(ctx, pattern7_1); 13570 if pattern9_0 == I32 { 13571 // Rule at src/isa/s390x/lower.isle line 1945. 13572 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13573 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13574 let expr2_0 = 13575 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13576 return Some(expr2_0); 13577 } 13578 } 13579 } 13580 } 13581 // Rule at src/isa/s390x/lower.isle line 1941. 13582 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13583 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13584 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13585 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13586 return Some(expr3_0); 13587 } 13588 return None; 13589 } 13590 13591 // Generated as internal constructor for term icmpu_val. 13592 pub fn constructor_icmpu_val<C: Context>( 13593 ctx: &mut C, 13594 arg0: bool, 13595 arg1: Value, 13596 arg2: Value, 13597 ) -> Option<ProducesFlags> { 13598 let pattern0_0 = arg0; 13599 if pattern0_0 == true { 13600 let pattern2_0 = arg1; 13601 let pattern3_0 = C::value_type(ctx, pattern2_0); 13602 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13603 let pattern5_0 = arg2; 13604 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13605 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13606 if let &InstructionData::Load { 13607 opcode: ref pattern8_0, 13608 arg: pattern8_1, 13609 flags: pattern8_2, 13610 offset: pattern8_3, 13611 } = &pattern7_0 13612 { 13613 match pattern8_0 { 13614 &Opcode::Uload16 => { 13615 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13616 let mut closure11 = || { 13617 let expr0_0 = constructor_uload16_sym(ctx, pattern6_0)?; 13618 return Some(expr0_0); 13619 }; 13620 if let Some(pattern11_0) = closure11() { 13621 // Rule at src/isa/s390x/lower.isle line 1999. 13622 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13623 let expr1_0 = constructor_sink_uload16(ctx, pattern11_0)?; 13624 let expr2_0 = constructor_icmpu_mem_zext16( 13625 ctx, pattern4_0, expr0_0, &expr1_0, 13626 )?; 13627 return Some(expr2_0); 13628 } 13629 } 13630 } 13631 &Opcode::Uload32 => { 13632 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13633 // Rule at src/isa/s390x/lower.isle line 2003. 13634 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13635 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13636 let expr2_0 = constructor_icmpu_mem_zext32( 13637 ctx, pattern4_0, expr0_0, &expr1_0, 13638 )?; 13639 return Some(expr2_0); 13640 } 13641 } 13642 _ => {} 13643 } 13644 } 13645 } 13646 let pattern6_0 = C::value_type(ctx, pattern5_0); 13647 if pattern6_0 == I16 { 13648 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13649 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13650 if let &InstructionData::Load { 13651 opcode: ref pattern10_0, 13652 arg: pattern10_1, 13653 flags: pattern10_2, 13654 offset: pattern10_3, 13655 } = &pattern9_0 13656 { 13657 if let &Opcode::Load = pattern10_0 { 13658 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13659 let mut closure13 = || { 13660 let expr0_0 = constructor_load_sym(ctx, pattern8_0)?; 13661 return Some(expr0_0); 13662 }; 13663 if let Some(pattern13_0) = closure13() { 13664 // Rule at src/isa/s390x/lower.isle line 1991. 13665 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13666 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13667 let expr2_0 = constructor_sink_load(ctx, pattern13_0)?; 13668 let expr3_0 = constructor_icmpu_mem_zext16( 13669 ctx, expr0_0, expr1_0, &expr2_0, 13670 )?; 13671 return Some(expr3_0); 13672 } 13673 } 13674 } 13675 } 13676 } 13677 } 13678 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13679 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13680 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13681 if let &InstructionData::Load { 13682 opcode: ref pattern10_0, 13683 arg: pattern10_1, 13684 flags: pattern10_2, 13685 offset: pattern10_3, 13686 } = &pattern9_0 13687 { 13688 if let &Opcode::Load = pattern10_0 { 13689 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13690 // Rule at src/isa/s390x/lower.isle line 1985. 13691 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13692 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13693 let expr2_0 = 13694 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13695 return Some(expr2_0); 13696 } 13697 } 13698 } 13699 } 13700 } 13701 } 13702 } 13703 let pattern1_0 = arg1; 13704 let pattern2_0 = C::value_type(ctx, pattern1_0); 13705 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13706 let pattern4_0 = arg2; 13707 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13708 // Rule at src/isa/s390x/lower.isle line 1981. 13709 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13710 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13711 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13712 return Some(expr2_0); 13713 } 13714 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13715 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13716 if let &InstructionData::Unary { 13717 opcode: ref pattern7_0, 13718 arg: pattern7_1, 13719 } = &pattern6_0 13720 { 13721 if let &Opcode::Uextend = pattern7_0 { 13722 let pattern9_0 = C::value_type(ctx, pattern7_1); 13723 if pattern9_0 == I32 { 13724 // Rule at src/isa/s390x/lower.isle line 1977. 13725 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13726 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13727 let expr2_0 = 13728 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13729 return Some(expr2_0); 13730 } 13731 } 13732 } 13733 } 13734 // Rule at src/isa/s390x/lower.isle line 1973. 13735 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13736 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13737 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13738 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13739 return Some(expr3_0); 13740 } 13741 return None; 13742 } 13743 13744 // Generated as internal constructor for term fcmp_val. 13745 pub fn constructor_fcmp_val<C: Context>( 13746 ctx: &mut C, 13747 arg0: &FloatCC, 13748 arg1: Value, 13749 arg2: Value, 13750 ) -> Option<ProducesBool> { 13751 let pattern0_0 = arg0; 13752 let pattern1_0 = arg1; 13753 let pattern2_0 = C::value_type(ctx, pattern1_0); 13754 let pattern3_0 = arg2; 13755 // Rule at src/isa/s390x/lower.isle line 2016. 13756 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13757 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13758 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13759 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13760 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13761 return Some(expr4_0); 13762 } 13763 13764 // Generated as internal constructor for term value_nonzero. 13765 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13766 let pattern0_0 = arg0; 13767 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13768 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13769 match &pattern2_0 { 13770 &InstructionData::FloatCompare { 13771 opcode: ref pattern3_0, 13772 args: ref pattern3_1, 13773 cond: ref pattern3_2, 13774 } => { 13775 if let &Opcode::Fcmp = pattern3_0 { 13776 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13777 // Rule at src/isa/s390x/lower.isle line 2044. 13778 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13779 return Some(expr0_0); 13780 } 13781 } 13782 &InstructionData::IntCompare { 13783 opcode: ref pattern3_0, 13784 args: ref pattern3_1, 13785 cond: ref pattern3_2, 13786 } => { 13787 if let &Opcode::Icmp = pattern3_0 { 13788 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13789 // Rule at src/isa/s390x/lower.isle line 2043. 13790 let expr0_0: bool = false; 13791 let expr1_0 = 13792 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13793 return Some(expr1_0); 13794 } 13795 } 13796 &InstructionData::Unary { 13797 opcode: ref pattern3_0, 13798 arg: pattern3_1, 13799 } => { 13800 if let &Opcode::Bint = pattern3_0 { 13801 // Rule at src/isa/s390x/lower.isle line 2042. 13802 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13803 return Some(expr0_0); 13804 } 13805 } 13806 _ => {} 13807 } 13808 } 13809 let pattern1_0 = C::value_type(ctx, pattern0_0); 13810 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13811 // Rule at src/isa/s390x/lower.isle line 2045. 13812 let expr0_0: Type = I32; 13813 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13814 let expr2_0: i16 = 0; 13815 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13816 let expr4_0 = IntCC::NotEqual; 13817 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13818 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13819 return Some(expr6_0); 13820 } 13821 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13822 // Rule at src/isa/s390x/lower.isle line 2048. 13823 let expr0_0: Type = I64; 13824 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13825 let expr2_0: i16 = 0; 13826 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13827 let expr4_0 = IntCC::NotEqual; 13828 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13829 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13830 return Some(expr6_0); 13831 } 13832 return None; 13833 } 13834