1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn i64_as_u64(&mut self, arg0: i64) -> u64; 43 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 44 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn ty_bits(&mut self, arg0: Type) -> u8; 47 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 48 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 49 fn ty_mask(&mut self, arg0: Type) -> u64; 50 fn ty_bytes(&mut self, arg0: Type) -> u16; 51 fn lane_type(&mut self, arg0: Type) -> Type; 52 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 53 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 55 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 57 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 58 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 59 fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>; 60 fn ty_vec128(&mut self, arg0: Type) -> Option<Type>; 61 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 62 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 63 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 64 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 65 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 66 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 67 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 68 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 69 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 70 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 71 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 72 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 73 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 74 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 75 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 76 fn value_type(&mut self, arg0: Value) -> Type; 77 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 78 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 79 fn emit(&mut self, arg0: &MInst) -> Unit; 80 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 81 fn trap_code_division_by_zero(&mut self) -> TrapCode; 82 fn trap_code_integer_overflow(&mut self) -> TrapCode; 83 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 84 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 85 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 86 fn symbol_value_data( 87 &mut self, 88 arg0: GlobalValue, 89 ) -> Option<(ExternalName, RelocDistance, i64)>; 90 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 91 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 92 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 93 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 94 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 95 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 96 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 97 fn zero_reg(&mut self) -> Reg; 98 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 99 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 100 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 101 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 102 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 103 fn u8_as_u16(&mut self, arg0: u8) -> u16; 104 fn u64_as_u32(&mut self, arg0: u64) -> u32; 105 fn u64_as_i16(&mut self, arg0: u64) -> i16; 106 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 107 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 108 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 109 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 110 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 111 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 112 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 113 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 114 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 115 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 116 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 117 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 118 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 119 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 120 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 121 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 122 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 123 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 124 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 125 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 126 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 127 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 128 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 129 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 130 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 131 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 132 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 133 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 134 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 135 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 136 fn zero_offset(&mut self) -> Offset32; 137 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 138 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 139 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 140 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 141 fn memflags_trusted(&mut self) -> MemFlags; 142 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 143 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 144 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 145 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 146 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 147 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 148 fn sink_inst(&mut self, arg0: Inst) -> Unit; 149 fn inst_builder_new(&mut self) -> VecMInstBuilder; 150 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 151 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 152 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 153 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 154 } 155 156 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 397. 157 #[derive(Clone, Debug)] 158 pub enum SideEffectNoResult { 159 Inst { inst: MInst }, 160 } 161 162 /// Internal type ProducesFlags: defined at src/prelude.isle line 419. 163 #[derive(Clone, Debug)] 164 pub enum ProducesFlags { 165 ProducesFlagsSideEffect { inst: MInst }, 166 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 167 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 168 } 169 170 /// Internal type ConsumesFlags: defined at src/prelude.isle line 430. 171 #[derive(Clone, Debug)] 172 pub enum ConsumesFlags { 173 ConsumesFlagsReturnsResultWithProducer { 174 inst: MInst, 175 result: Reg, 176 }, 177 ConsumesFlagsReturnsReg { 178 inst: MInst, 179 result: Reg, 180 }, 181 ConsumesFlagsTwiceReturnsValueRegs { 182 inst1: MInst, 183 inst2: MInst, 184 result: ValueRegs, 185 }, 186 ConsumesFlagsFourTimesReturnsValueRegs { 187 inst1: MInst, 188 inst2: MInst, 189 inst3: MInst, 190 inst4: MInst, 191 result: ValueRegs, 192 }, 193 } 194 195 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 196 #[derive(Clone, Debug)] 197 pub enum MInst { 198 Nop0, 199 Nop2, 200 AluRRR { 201 alu_op: ALUOp, 202 rd: WritableReg, 203 rn: Reg, 204 rm: Reg, 205 }, 206 AluRRSImm16 { 207 alu_op: ALUOp, 208 rd: WritableReg, 209 rn: Reg, 210 imm: i16, 211 }, 212 AluRR { 213 alu_op: ALUOp, 214 rd: WritableReg, 215 rm: Reg, 216 }, 217 AluRX { 218 alu_op: ALUOp, 219 rd: WritableReg, 220 mem: MemArg, 221 }, 222 AluRSImm16 { 223 alu_op: ALUOp, 224 rd: WritableReg, 225 imm: i16, 226 }, 227 AluRSImm32 { 228 alu_op: ALUOp, 229 rd: WritableReg, 230 imm: i32, 231 }, 232 AluRUImm32 { 233 alu_op: ALUOp, 234 rd: WritableReg, 235 imm: u32, 236 }, 237 AluRUImm16Shifted { 238 alu_op: ALUOp, 239 rd: WritableReg, 240 imm: UImm16Shifted, 241 }, 242 AluRUImm32Shifted { 243 alu_op: ALUOp, 244 rd: WritableReg, 245 imm: UImm32Shifted, 246 }, 247 SMulWide { 248 rn: Reg, 249 rm: Reg, 250 }, 251 UMulWide { 252 rn: Reg, 253 }, 254 SDivMod32 { 255 rn: Reg, 256 }, 257 SDivMod64 { 258 rn: Reg, 259 }, 260 UDivMod32 { 261 rn: Reg, 262 }, 263 UDivMod64 { 264 rn: Reg, 265 }, 266 Flogr { 267 rn: Reg, 268 }, 269 ShiftRR { 270 shift_op: ShiftOp, 271 rd: WritableReg, 272 rn: Reg, 273 shift_imm: u8, 274 shift_reg: Reg, 275 }, 276 RxSBG { 277 op: RxSBGOp, 278 rd: WritableReg, 279 rn: Reg, 280 start_bit: u8, 281 end_bit: u8, 282 rotate_amt: i8, 283 }, 284 RxSBGTest { 285 op: RxSBGOp, 286 rd: Reg, 287 rn: Reg, 288 start_bit: u8, 289 end_bit: u8, 290 rotate_amt: i8, 291 }, 292 UnaryRR { 293 op: UnaryOp, 294 rd: WritableReg, 295 rn: Reg, 296 }, 297 CmpRR { 298 op: CmpOp, 299 rn: Reg, 300 rm: Reg, 301 }, 302 CmpRX { 303 op: CmpOp, 304 rn: Reg, 305 mem: MemArg, 306 }, 307 CmpRSImm16 { 308 op: CmpOp, 309 rn: Reg, 310 imm: i16, 311 }, 312 CmpRSImm32 { 313 op: CmpOp, 314 rn: Reg, 315 imm: i32, 316 }, 317 CmpRUImm32 { 318 op: CmpOp, 319 rn: Reg, 320 imm: u32, 321 }, 322 CmpTrapRR { 323 op: CmpOp, 324 rn: Reg, 325 rm: Reg, 326 cond: Cond, 327 trap_code: TrapCode, 328 }, 329 CmpTrapRSImm16 { 330 op: CmpOp, 331 rn: Reg, 332 imm: i16, 333 cond: Cond, 334 trap_code: TrapCode, 335 }, 336 CmpTrapRUImm16 { 337 op: CmpOp, 338 rn: Reg, 339 imm: u16, 340 cond: Cond, 341 trap_code: TrapCode, 342 }, 343 AtomicRmw { 344 alu_op: ALUOp, 345 rd: WritableReg, 346 rn: Reg, 347 mem: MemArg, 348 }, 349 AtomicCas32 { 350 rd: WritableReg, 351 rn: Reg, 352 mem: MemArg, 353 }, 354 AtomicCas64 { 355 rd: WritableReg, 356 rn: Reg, 357 mem: MemArg, 358 }, 359 Fence, 360 Load32 { 361 rd: WritableReg, 362 mem: MemArg, 363 }, 364 Load32ZExt8 { 365 rd: WritableReg, 366 mem: MemArg, 367 }, 368 Load32SExt8 { 369 rd: WritableReg, 370 mem: MemArg, 371 }, 372 Load32ZExt16 { 373 rd: WritableReg, 374 mem: MemArg, 375 }, 376 Load32SExt16 { 377 rd: WritableReg, 378 mem: MemArg, 379 }, 380 Load64 { 381 rd: WritableReg, 382 mem: MemArg, 383 }, 384 Load64ZExt8 { 385 rd: WritableReg, 386 mem: MemArg, 387 }, 388 Load64SExt8 { 389 rd: WritableReg, 390 mem: MemArg, 391 }, 392 Load64ZExt16 { 393 rd: WritableReg, 394 mem: MemArg, 395 }, 396 Load64SExt16 { 397 rd: WritableReg, 398 mem: MemArg, 399 }, 400 Load64ZExt32 { 401 rd: WritableReg, 402 mem: MemArg, 403 }, 404 Load64SExt32 { 405 rd: WritableReg, 406 mem: MemArg, 407 }, 408 LoadRev16 { 409 rd: WritableReg, 410 mem: MemArg, 411 }, 412 LoadRev32 { 413 rd: WritableReg, 414 mem: MemArg, 415 }, 416 LoadRev64 { 417 rd: WritableReg, 418 mem: MemArg, 419 }, 420 Store8 { 421 rd: Reg, 422 mem: MemArg, 423 }, 424 Store16 { 425 rd: Reg, 426 mem: MemArg, 427 }, 428 Store32 { 429 rd: Reg, 430 mem: MemArg, 431 }, 432 Store64 { 433 rd: Reg, 434 mem: MemArg, 435 }, 436 StoreImm8 { 437 imm: u8, 438 mem: MemArg, 439 }, 440 StoreImm16 { 441 imm: i16, 442 mem: MemArg, 443 }, 444 StoreImm32SExt16 { 445 imm: i16, 446 mem: MemArg, 447 }, 448 StoreImm64SExt16 { 449 imm: i16, 450 mem: MemArg, 451 }, 452 StoreRev16 { 453 rd: Reg, 454 mem: MemArg, 455 }, 456 StoreRev32 { 457 rd: Reg, 458 mem: MemArg, 459 }, 460 StoreRev64 { 461 rd: Reg, 462 mem: MemArg, 463 }, 464 LoadMultiple64 { 465 rt: WritableReg, 466 rt2: WritableReg, 467 mem: MemArg, 468 }, 469 StoreMultiple64 { 470 rt: Reg, 471 rt2: Reg, 472 mem: MemArg, 473 }, 474 Mov32 { 475 rd: WritableReg, 476 rm: Reg, 477 }, 478 Mov64 { 479 rd: WritableReg, 480 rm: Reg, 481 }, 482 Mov32Imm { 483 rd: WritableReg, 484 imm: u32, 485 }, 486 Mov32SImm16 { 487 rd: WritableReg, 488 imm: i16, 489 }, 490 Mov64SImm16 { 491 rd: WritableReg, 492 imm: i16, 493 }, 494 Mov64SImm32 { 495 rd: WritableReg, 496 imm: i32, 497 }, 498 Mov64UImm16Shifted { 499 rd: WritableReg, 500 imm: UImm16Shifted, 501 }, 502 Mov64UImm32Shifted { 503 rd: WritableReg, 504 imm: UImm32Shifted, 505 }, 506 Insert64UImm16Shifted { 507 rd: WritableReg, 508 imm: UImm16Shifted, 509 }, 510 Insert64UImm32Shifted { 511 rd: WritableReg, 512 imm: UImm32Shifted, 513 }, 514 Extend { 515 rd: WritableReg, 516 rn: Reg, 517 signed: bool, 518 from_bits: u8, 519 to_bits: u8, 520 }, 521 CMov32 { 522 rd: WritableReg, 523 cond: Cond, 524 rm: Reg, 525 }, 526 CMov64 { 527 rd: WritableReg, 528 cond: Cond, 529 rm: Reg, 530 }, 531 CMov32SImm16 { 532 rd: WritableReg, 533 cond: Cond, 534 imm: i16, 535 }, 536 CMov64SImm16 { 537 rd: WritableReg, 538 cond: Cond, 539 imm: i16, 540 }, 541 FpuMove32 { 542 rd: WritableReg, 543 rn: Reg, 544 }, 545 FpuMove64 { 546 rd: WritableReg, 547 rn: Reg, 548 }, 549 FpuCMov32 { 550 rd: WritableReg, 551 cond: Cond, 552 rm: Reg, 553 }, 554 FpuCMov64 { 555 rd: WritableReg, 556 cond: Cond, 557 rm: Reg, 558 }, 559 MovToFpr { 560 rd: WritableReg, 561 rn: Reg, 562 }, 563 MovFromFpr { 564 rd: WritableReg, 565 rn: Reg, 566 }, 567 FpuRR { 568 fpu_op: FPUOp1, 569 rd: WritableReg, 570 rn: Reg, 571 }, 572 FpuRRR { 573 fpu_op: FPUOp2, 574 rd: WritableReg, 575 rm: Reg, 576 }, 577 FpuRRRR { 578 fpu_op: FPUOp3, 579 rd: WritableReg, 580 rn: Reg, 581 rm: Reg, 582 }, 583 FpuCopysign { 584 rd: WritableReg, 585 rn: Reg, 586 rm: Reg, 587 }, 588 FpuCmp32 { 589 rn: Reg, 590 rm: Reg, 591 }, 592 FpuCmp64 { 593 rn: Reg, 594 rm: Reg, 595 }, 596 FpuLoad32 { 597 rd: WritableReg, 598 mem: MemArg, 599 }, 600 FpuStore32 { 601 rd: Reg, 602 mem: MemArg, 603 }, 604 FpuLoad64 { 605 rd: WritableReg, 606 mem: MemArg, 607 }, 608 FpuStore64 { 609 rd: Reg, 610 mem: MemArg, 611 }, 612 FpuLoadRev32 { 613 rd: WritableReg, 614 mem: MemArg, 615 }, 616 FpuStoreRev32 { 617 rd: Reg, 618 mem: MemArg, 619 }, 620 FpuLoadRev64 { 621 rd: WritableReg, 622 mem: MemArg, 623 }, 624 FpuStoreRev64 { 625 rd: Reg, 626 mem: MemArg, 627 }, 628 LoadFpuConst32 { 629 rd: WritableReg, 630 const_data: u32, 631 }, 632 LoadFpuConst64 { 633 rd: WritableReg, 634 const_data: u64, 635 }, 636 FpuToInt { 637 op: FpuToIntOp, 638 rd: WritableReg, 639 rn: Reg, 640 }, 641 IntToFpu { 642 op: IntToFpuOp, 643 rd: WritableReg, 644 rn: Reg, 645 }, 646 FpuRound { 647 op: FpuRoundMode, 648 rd: WritableReg, 649 rn: Reg, 650 }, 651 FpuVecRRR { 652 fpu_op: FPUOp2, 653 rd: WritableReg, 654 rn: Reg, 655 rm: Reg, 656 }, 657 Call { 658 link: WritableReg, 659 info: BoxCallInfo, 660 }, 661 CallInd { 662 link: WritableReg, 663 info: BoxCallIndInfo, 664 }, 665 Ret { 666 link: Reg, 667 }, 668 EpiloguePlaceholder, 669 Jump { 670 dest: MachLabel, 671 }, 672 CondBr { 673 taken: MachLabel, 674 not_taken: MachLabel, 675 cond: Cond, 676 }, 677 TrapIf { 678 cond: Cond, 679 trap_code: TrapCode, 680 }, 681 OneWayCondBr { 682 target: MachLabel, 683 cond: Cond, 684 }, 685 IndirectBr { 686 rn: Reg, 687 targets: VecMachLabel, 688 }, 689 Debugtrap, 690 Trap { 691 trap_code: TrapCode, 692 }, 693 JTSequence { 694 ridx: Reg, 695 targets: VecMachLabel, 696 }, 697 LoadExtNameFar { 698 rd: WritableReg, 699 name: BoxExternalName, 700 offset: i64, 701 }, 702 LoadAddr { 703 rd: WritableReg, 704 mem: MemArg, 705 }, 706 Loop { 707 body: VecMInst, 708 cond: Cond, 709 }, 710 CondBreak { 711 cond: Cond, 712 }, 713 VirtualSPOffsetAdj { 714 offset: i64, 715 }, 716 ValueLabelMarker { 717 reg: Reg, 718 label: ValueLabel, 719 }, 720 Unwind { 721 inst: UnwindInst, 722 }, 723 } 724 725 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 726 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 727 pub enum ALUOp { 728 Add32, 729 Add32Ext16, 730 Add64, 731 Add64Ext16, 732 Add64Ext32, 733 AddLogical32, 734 AddLogical64, 735 AddLogical64Ext32, 736 Sub32, 737 Sub32Ext16, 738 Sub64, 739 Sub64Ext16, 740 Sub64Ext32, 741 SubLogical32, 742 SubLogical64, 743 SubLogical64Ext32, 744 Mul32, 745 Mul32Ext16, 746 Mul64, 747 Mul64Ext16, 748 Mul64Ext32, 749 And32, 750 And64, 751 Orr32, 752 Orr64, 753 Xor32, 754 Xor64, 755 AndNot32, 756 AndNot64, 757 OrrNot32, 758 OrrNot64, 759 XorNot32, 760 XorNot64, 761 } 762 763 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 764 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 765 pub enum UnaryOp { 766 Abs32, 767 Abs64, 768 Abs64Ext32, 769 Neg32, 770 Neg64, 771 Neg64Ext32, 772 PopcntByte, 773 PopcntReg, 774 BSwap32, 775 BSwap64, 776 } 777 778 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 779 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 780 pub enum ShiftOp { 781 RotL32, 782 RotL64, 783 LShL32, 784 LShL64, 785 LShR32, 786 LShR64, 787 AShR32, 788 AShR64, 789 } 790 791 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 792 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 793 pub enum RxSBGOp { 794 Insert, 795 And, 796 Or, 797 Xor, 798 } 799 800 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 801 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 802 pub enum CmpOp { 803 CmpS32, 804 CmpS32Ext16, 805 CmpS64, 806 CmpS64Ext16, 807 CmpS64Ext32, 808 CmpL32, 809 CmpL32Ext16, 810 CmpL64, 811 CmpL64Ext16, 812 CmpL64Ext32, 813 } 814 815 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 816 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 817 pub enum FPUOp1 { 818 Abs32, 819 Abs64, 820 Neg32, 821 Neg64, 822 NegAbs32, 823 NegAbs64, 824 Sqrt32, 825 Sqrt64, 826 Cvt32To64, 827 Cvt64To32, 828 } 829 830 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 831 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 832 pub enum FPUOp2 { 833 Add32, 834 Add64, 835 Sub32, 836 Sub64, 837 Mul32, 838 Mul64, 839 Div32, 840 Div64, 841 Max32, 842 Max64, 843 Min32, 844 Min64, 845 } 846 847 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 848 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 849 pub enum FPUOp3 { 850 MAdd32, 851 MAdd64, 852 MSub32, 853 MSub64, 854 } 855 856 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 857 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 858 pub enum FpuToIntOp { 859 F32ToU32, 860 F32ToI32, 861 F32ToU64, 862 F32ToI64, 863 F64ToU32, 864 F64ToI32, 865 F64ToU64, 866 F64ToI64, 867 } 868 869 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 870 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 871 pub enum IntToFpuOp { 872 U32ToF32, 873 I32ToF32, 874 U32ToF64, 875 I32ToF64, 876 U64ToF32, 877 I64ToF32, 878 U64ToF64, 879 I64ToF64, 880 } 881 882 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 883 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 884 pub enum FpuRoundMode { 885 Minus32, 886 Minus64, 887 Plus32, 888 Plus64, 889 Zero32, 890 Zero64, 891 Nearest32, 892 Nearest64, 893 } 894 895 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 896 #[derive(Clone, Debug)] 897 pub enum WritableRegPair { 898 WritableRegPair { hi: WritableReg, lo: WritableReg }, 899 } 900 901 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 902 #[derive(Clone, Debug)] 903 pub enum RegPair { 904 RegPair { hi: Reg, lo: Reg }, 905 } 906 907 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 908 #[derive(Clone, Debug)] 909 pub enum ProducesBool { 910 ProducesBool { producer: ProducesFlags, cond: Cond }, 911 } 912 913 // Generated as internal constructor for term output_reg. 914 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 915 let pattern0_0 = arg0; 916 // Rule at src/prelude.isle line 86. 917 let expr0_0 = C::value_reg(ctx, pattern0_0); 918 let expr1_0 = C::output(ctx, expr0_0); 919 return Some(expr1_0); 920 } 921 922 // Generated as internal constructor for term output_value. 923 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 924 let pattern0_0 = arg0; 925 // Rule at src/prelude.isle line 90. 926 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 927 let expr1_0 = C::output(ctx, expr0_0); 928 return Some(expr1_0); 929 } 930 931 // Generated as internal constructor for term temp_reg. 932 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 933 let pattern0_0 = arg0; 934 // Rule at src/prelude.isle line 110. 935 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 936 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 937 return Some(expr1_0); 938 } 939 940 // Generated as internal constructor for term lo_reg. 941 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 942 let pattern0_0 = arg0; 943 // Rule at src/prelude.isle line 145. 944 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 945 let expr1_0: usize = 0; 946 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 947 return Some(expr2_0); 948 } 949 950 // Generated as internal constructor for term side_effect. 951 pub fn constructor_side_effect<C: Context>( 952 ctx: &mut C, 953 arg0: &SideEffectNoResult, 954 ) -> Option<InstOutput> { 955 let pattern0_0 = arg0; 956 if let &SideEffectNoResult::Inst { 957 inst: ref pattern1_0, 958 } = pattern0_0 959 { 960 // Rule at src/prelude.isle line 402. 961 let expr0_0 = C::emit(ctx, pattern1_0); 962 let expr1_0 = C::output_none(ctx); 963 return Some(expr1_0); 964 } 965 return None; 966 } 967 968 // Generated as internal constructor for term safepoint. 969 pub fn constructor_safepoint<C: Context>( 970 ctx: &mut C, 971 arg0: &SideEffectNoResult, 972 ) -> Option<InstOutput> { 973 let pattern0_0 = arg0; 974 if let &SideEffectNoResult::Inst { 975 inst: ref pattern1_0, 976 } = pattern0_0 977 { 978 // Rule at src/prelude.isle line 408. 979 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 980 let expr1_0 = C::output_none(ctx); 981 return Some(expr1_0); 982 } 983 return None; 984 } 985 986 // Generated as internal constructor for term produces_flags_get_reg. 987 pub fn constructor_produces_flags_get_reg<C: Context>( 988 ctx: &mut C, 989 arg0: &ProducesFlags, 990 ) -> Option<Reg> { 991 let pattern0_0 = arg0; 992 if let &ProducesFlags::ProducesFlagsReturnsReg { 993 inst: ref pattern1_0, 994 result: pattern1_1, 995 } = pattern0_0 996 { 997 // Rule at src/prelude.isle line 446. 998 return Some(pattern1_1); 999 } 1000 return None; 1001 } 1002 1003 // Generated as internal constructor for term produces_flags_ignore. 1004 pub fn constructor_produces_flags_ignore<C: Context>( 1005 ctx: &mut C, 1006 arg0: &ProducesFlags, 1007 ) -> Option<ProducesFlags> { 1008 let pattern0_0 = arg0; 1009 match pattern0_0 { 1010 &ProducesFlags::ProducesFlagsReturnsReg { 1011 inst: ref pattern1_0, 1012 result: pattern1_1, 1013 } => { 1014 // Rule at src/prelude.isle line 451. 1015 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1016 inst: pattern1_0.clone(), 1017 }; 1018 return Some(expr0_0); 1019 } 1020 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1021 inst: ref pattern1_0, 1022 result: pattern1_1, 1023 } => { 1024 // Rule at src/prelude.isle line 453. 1025 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1026 inst: pattern1_0.clone(), 1027 }; 1028 return Some(expr0_0); 1029 } 1030 _ => {} 1031 } 1032 return None; 1033 } 1034 1035 // Generated as internal constructor for term consumes_flags_concat. 1036 pub fn constructor_consumes_flags_concat<C: Context>( 1037 ctx: &mut C, 1038 arg0: &ConsumesFlags, 1039 arg1: &ConsumesFlags, 1040 ) -> Option<ConsumesFlags> { 1041 let pattern0_0 = arg0; 1042 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1043 inst: ref pattern1_0, 1044 result: pattern1_1, 1045 } = pattern0_0 1046 { 1047 let pattern2_0 = arg1; 1048 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1049 inst: ref pattern3_0, 1050 result: pattern3_1, 1051 } = pattern2_0 1052 { 1053 // Rule at src/prelude.isle line 460. 1054 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1055 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1056 inst1: pattern1_0.clone(), 1057 inst2: pattern3_0.clone(), 1058 result: expr0_0, 1059 }; 1060 return Some(expr1_0); 1061 } 1062 } 1063 return None; 1064 } 1065 1066 // Generated as internal constructor for term with_flags. 1067 pub fn constructor_with_flags<C: Context>( 1068 ctx: &mut C, 1069 arg0: &ProducesFlags, 1070 arg1: &ConsumesFlags, 1071 ) -> Option<ValueRegs> { 1072 let pattern0_0 = arg0; 1073 match pattern0_0 { 1074 &ProducesFlags::ProducesFlagsSideEffect { 1075 inst: ref pattern1_0, 1076 } => { 1077 let pattern2_0 = arg1; 1078 match pattern2_0 { 1079 &ConsumesFlags::ConsumesFlagsReturnsReg { 1080 inst: ref pattern3_0, 1081 result: pattern3_1, 1082 } => { 1083 // Rule at src/prelude.isle line 485. 1084 let expr0_0 = C::emit(ctx, pattern1_0); 1085 let expr1_0 = C::emit(ctx, pattern3_0); 1086 let expr2_0 = C::value_reg(ctx, pattern3_1); 1087 return Some(expr2_0); 1088 } 1089 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1090 inst1: ref pattern3_0, 1091 inst2: ref pattern3_1, 1092 result: pattern3_2, 1093 } => { 1094 // Rule at src/prelude.isle line 491. 1095 let expr0_0 = C::emit(ctx, pattern1_0); 1096 let expr1_0 = C::emit(ctx, pattern3_0); 1097 let expr2_0 = C::emit(ctx, pattern3_1); 1098 return Some(pattern3_2); 1099 } 1100 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1101 inst1: ref pattern3_0, 1102 inst2: ref pattern3_1, 1103 inst3: ref pattern3_2, 1104 inst4: ref pattern3_3, 1105 result: pattern3_4, 1106 } => { 1107 // Rule at src/prelude.isle line 503. 1108 let expr0_0 = C::emit(ctx, pattern1_0); 1109 let expr1_0 = C::emit(ctx, pattern3_0); 1110 let expr2_0 = C::emit(ctx, pattern3_1); 1111 let expr3_0 = C::emit(ctx, pattern3_2); 1112 let expr4_0 = C::emit(ctx, pattern3_3); 1113 return Some(pattern3_4); 1114 } 1115 _ => {} 1116 } 1117 } 1118 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1119 inst: ref pattern1_0, 1120 result: pattern1_1, 1121 } => { 1122 let pattern2_0 = arg1; 1123 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1124 inst: ref pattern3_0, 1125 result: pattern3_1, 1126 } = pattern2_0 1127 { 1128 // Rule at src/prelude.isle line 479. 1129 let expr0_0 = C::emit(ctx, pattern1_0); 1130 let expr1_0 = C::emit(ctx, pattern3_0); 1131 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1132 return Some(expr2_0); 1133 } 1134 } 1135 _ => {} 1136 } 1137 return None; 1138 } 1139 1140 // Generated as internal constructor for term with_flags_reg. 1141 pub fn constructor_with_flags_reg<C: Context>( 1142 ctx: &mut C, 1143 arg0: &ProducesFlags, 1144 arg1: &ConsumesFlags, 1145 ) -> Option<Reg> { 1146 let pattern0_0 = arg0; 1147 let pattern1_0 = arg1; 1148 // Rule at src/prelude.isle line 520. 1149 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1150 let expr1_0: usize = 0; 1151 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1152 return Some(expr2_0); 1153 } 1154 1155 // Generated as internal constructor for term mask_amt_reg. 1156 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1157 let pattern0_0 = arg0; 1158 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1159 let pattern2_0 = arg1; 1160 // Rule at src/isa/s390x/inst.isle line 1040. 1161 let expr0_0: i64 = -1; 1162 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1163 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1164 let expr3_0: u8 = 0; 1165 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1166 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1167 return Some(expr5_0); 1168 } 1169 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1170 let pattern2_0 = arg1; 1171 // Rule at src/isa/s390x/inst.isle line 1043. 1172 return Some(pattern2_0); 1173 } 1174 return None; 1175 } 1176 1177 // Generated as internal constructor for term lower_address. 1178 pub fn constructor_lower_address<C: Context>( 1179 ctx: &mut C, 1180 arg0: MemFlags, 1181 arg1: Value, 1182 arg2: Offset32, 1183 ) -> Option<MemArg> { 1184 let pattern0_0 = arg0; 1185 let pattern1_0 = arg1; 1186 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1187 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1188 match &pattern3_0 { 1189 &InstructionData::UnaryGlobalValue { 1190 opcode: ref pattern4_0, 1191 global_value: pattern4_1, 1192 } => { 1193 if let &Opcode::SymbolValue = pattern4_0 { 1194 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1195 C::symbol_value_data(ctx, pattern4_1) 1196 { 1197 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1198 let pattern8_0 = arg2; 1199 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1200 let closure10 = || { 1201 return Some(pattern6_2); 1202 }; 1203 if let Some(pattern10_0) = closure10() { 1204 if let Some(pattern11_0) = 1205 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1206 { 1207 // Rule at src/isa/s390x/inst.isle line 1136. 1208 let expr0_0 = 1209 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1210 return Some(expr0_0); 1211 } 1212 } 1213 } 1214 } 1215 } 1216 } 1217 &InstructionData::Binary { 1218 opcode: ref pattern4_0, 1219 args: ref pattern4_1, 1220 } => { 1221 if let &Opcode::Iadd = pattern4_0 { 1222 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1223 let pattern7_0 = arg2; 1224 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1225 if pattern8_0 == 0 { 1226 // Rule at src/isa/s390x/inst.isle line 1133. 1227 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1228 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1229 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1230 return Some(expr2_0); 1231 } 1232 } 1233 } 1234 _ => {} 1235 } 1236 } 1237 let pattern2_0 = arg2; 1238 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1239 // Rule at src/isa/s390x/inst.isle line 1130. 1240 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1241 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1242 return Some(expr1_0); 1243 } 1244 1245 // Generated as internal constructor for term stack_addr_impl. 1246 pub fn constructor_stack_addr_impl<C: Context>( 1247 ctx: &mut C, 1248 arg0: Type, 1249 arg1: StackSlot, 1250 arg2: Offset32, 1251 ) -> Option<Reg> { 1252 let pattern0_0 = arg0; 1253 let pattern1_0 = arg1; 1254 let pattern2_0 = arg2; 1255 // Rule at src/isa/s390x/inst.isle line 1163. 1256 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1257 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1258 let expr2_0 = C::emit(ctx, &expr1_0); 1259 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1260 return Some(expr3_0); 1261 } 1262 1263 // Generated as internal constructor for term sink_load. 1264 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1265 let pattern0_0 = arg0; 1266 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1267 if let &InstructionData::Load { 1268 opcode: ref pattern2_0, 1269 arg: pattern2_1, 1270 flags: pattern2_2, 1271 offset: pattern2_3, 1272 } = &pattern1_0 1273 { 1274 if let &Opcode::Load = pattern2_0 { 1275 // Rule at src/isa/s390x/inst.isle line 1233. 1276 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1277 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1278 return Some(expr1_0); 1279 } 1280 } 1281 return None; 1282 } 1283 1284 // Generated as internal constructor for term sink_sload16. 1285 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1286 let pattern0_0 = arg0; 1287 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1288 if let &InstructionData::Load { 1289 opcode: ref pattern2_0, 1290 arg: pattern2_1, 1291 flags: pattern2_2, 1292 offset: pattern2_3, 1293 } = &pattern1_0 1294 { 1295 if let &Opcode::Sload16 = pattern2_0 { 1296 // Rule at src/isa/s390x/inst.isle line 1240. 1297 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1298 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1299 return Some(expr1_0); 1300 } 1301 } 1302 return None; 1303 } 1304 1305 // Generated as internal constructor for term sink_sload32. 1306 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1307 let pattern0_0 = arg0; 1308 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1309 if let &InstructionData::Load { 1310 opcode: ref pattern2_0, 1311 arg: pattern2_1, 1312 flags: pattern2_2, 1313 offset: pattern2_3, 1314 } = &pattern1_0 1315 { 1316 if let &Opcode::Sload32 = pattern2_0 { 1317 // Rule at src/isa/s390x/inst.isle line 1247. 1318 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1319 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1320 return Some(expr1_0); 1321 } 1322 } 1323 return None; 1324 } 1325 1326 // Generated as internal constructor for term sink_uload16. 1327 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1328 let pattern0_0 = arg0; 1329 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1330 if let &InstructionData::Load { 1331 opcode: ref pattern2_0, 1332 arg: pattern2_1, 1333 flags: pattern2_2, 1334 offset: pattern2_3, 1335 } = &pattern1_0 1336 { 1337 if let &Opcode::Uload16 = pattern2_0 { 1338 // Rule at src/isa/s390x/inst.isle line 1254. 1339 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1340 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1341 return Some(expr1_0); 1342 } 1343 } 1344 return None; 1345 } 1346 1347 // Generated as internal constructor for term sink_uload32. 1348 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1349 let pattern0_0 = arg0; 1350 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1351 if let &InstructionData::Load { 1352 opcode: ref pattern2_0, 1353 arg: pattern2_1, 1354 flags: pattern2_2, 1355 offset: pattern2_3, 1356 } = &pattern1_0 1357 { 1358 if let &Opcode::Uload32 = pattern2_0 { 1359 // Rule at src/isa/s390x/inst.isle line 1261. 1360 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1361 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1362 return Some(expr1_0); 1363 } 1364 } 1365 return None; 1366 } 1367 1368 // Generated as internal constructor for term temp_writable_regpair. 1369 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1370 // Rule at src/isa/s390x/inst.isle line 1274. 1371 let expr0_0: u8 = 0; 1372 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1373 let expr2_0: u8 = 1; 1374 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1375 let expr4_0 = WritableRegPair::WritableRegPair { 1376 hi: expr1_0, 1377 lo: expr3_0, 1378 }; 1379 return Some(expr4_0); 1380 } 1381 1382 // Generated as internal constructor for term copy_writable_regpair. 1383 pub fn constructor_copy_writable_regpair<C: Context>( 1384 ctx: &mut C, 1385 arg0: &RegPair, 1386 ) -> Option<WritableRegPair> { 1387 let pattern0_0 = arg0; 1388 // Rule at src/isa/s390x/inst.isle line 1280. 1389 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1390 return Some(expr0_0); 1391 } 1392 1393 // Generated as internal constructor for term writable_regpair_hi. 1394 pub fn constructor_writable_regpair_hi<C: Context>( 1395 ctx: &mut C, 1396 arg0: &WritableRegPair, 1397 ) -> Option<WritableReg> { 1398 let pattern0_0 = arg0; 1399 if let &WritableRegPair::WritableRegPair { 1400 hi: pattern1_0, 1401 lo: pattern1_1, 1402 } = pattern0_0 1403 { 1404 // Rule at src/isa/s390x/inst.isle line 1284. 1405 return Some(pattern1_0); 1406 } 1407 return None; 1408 } 1409 1410 // Generated as internal constructor for term writable_regpair_lo. 1411 pub fn constructor_writable_regpair_lo<C: Context>( 1412 ctx: &mut C, 1413 arg0: &WritableRegPair, 1414 ) -> Option<WritableReg> { 1415 let pattern0_0 = arg0; 1416 if let &WritableRegPair::WritableRegPair { 1417 hi: pattern1_0, 1418 lo: pattern1_1, 1419 } = pattern0_0 1420 { 1421 // Rule at src/isa/s390x/inst.isle line 1288. 1422 return Some(pattern1_1); 1423 } 1424 return None; 1425 } 1426 1427 // Generated as internal constructor for term writable_regpair_to_regpair. 1428 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1429 ctx: &mut C, 1430 arg0: &WritableRegPair, 1431 ) -> Option<RegPair> { 1432 let pattern0_0 = arg0; 1433 if let &WritableRegPair::WritableRegPair { 1434 hi: pattern1_0, 1435 lo: pattern1_1, 1436 } = pattern0_0 1437 { 1438 // Rule at src/isa/s390x/inst.isle line 1295. 1439 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1440 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1441 let expr2_0 = RegPair::RegPair { 1442 hi: expr0_0, 1443 lo: expr1_0, 1444 }; 1445 return Some(expr2_0); 1446 } 1447 return None; 1448 } 1449 1450 // Generated as internal constructor for term uninitialized_regpair. 1451 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1452 // Rule at src/isa/s390x/inst.isle line 1300. 1453 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1454 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1455 return Some(expr1_0); 1456 } 1457 1458 // Generated as internal constructor for term regpair_hi. 1459 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1460 let pattern0_0 = arg0; 1461 if let &RegPair::RegPair { 1462 hi: pattern1_0, 1463 lo: pattern1_1, 1464 } = pattern0_0 1465 { 1466 // Rule at src/isa/s390x/inst.isle line 1305. 1467 return Some(pattern1_0); 1468 } 1469 return None; 1470 } 1471 1472 // Generated as internal constructor for term regpair_lo. 1473 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1474 let pattern0_0 = arg0; 1475 if let &RegPair::RegPair { 1476 hi: pattern1_0, 1477 lo: pattern1_1, 1478 } = pattern0_0 1479 { 1480 // Rule at src/isa/s390x/inst.isle line 1309. 1481 return Some(pattern1_1); 1482 } 1483 return None; 1484 } 1485 1486 // Generated as internal constructor for term alu_rrr. 1487 pub fn constructor_alu_rrr<C: Context>( 1488 ctx: &mut C, 1489 arg0: Type, 1490 arg1: &ALUOp, 1491 arg2: Reg, 1492 arg3: Reg, 1493 ) -> Option<Reg> { 1494 let pattern0_0 = arg0; 1495 let pattern1_0 = arg1; 1496 let pattern2_0 = arg2; 1497 let pattern3_0 = arg3; 1498 // Rule at src/isa/s390x/inst.isle line 1316. 1499 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1500 let expr1_0 = MInst::AluRRR { 1501 alu_op: pattern1_0.clone(), 1502 rd: expr0_0, 1503 rn: pattern2_0, 1504 rm: pattern3_0, 1505 }; 1506 let expr2_0 = C::emit(ctx, &expr1_0); 1507 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1508 return Some(expr3_0); 1509 } 1510 1511 // Generated as internal constructor for term alu_rrsimm16. 1512 pub fn constructor_alu_rrsimm16<C: Context>( 1513 ctx: &mut C, 1514 arg0: Type, 1515 arg1: &ALUOp, 1516 arg2: Reg, 1517 arg3: i16, 1518 ) -> Option<Reg> { 1519 let pattern0_0 = arg0; 1520 let pattern1_0 = arg1; 1521 let pattern2_0 = arg2; 1522 let pattern3_0 = arg3; 1523 // Rule at src/isa/s390x/inst.isle line 1323. 1524 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1525 let expr1_0 = MInst::AluRRSImm16 { 1526 alu_op: pattern1_0.clone(), 1527 rd: expr0_0, 1528 rn: pattern2_0, 1529 imm: pattern3_0, 1530 }; 1531 let expr2_0 = C::emit(ctx, &expr1_0); 1532 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1533 return Some(expr3_0); 1534 } 1535 1536 // Generated as internal constructor for term alu_rr. 1537 pub fn constructor_alu_rr<C: Context>( 1538 ctx: &mut C, 1539 arg0: Type, 1540 arg1: &ALUOp, 1541 arg2: Reg, 1542 arg3: Reg, 1543 ) -> Option<Reg> { 1544 let pattern0_0 = arg0; 1545 let pattern1_0 = arg1; 1546 let pattern2_0 = arg2; 1547 let pattern3_0 = arg3; 1548 // Rule at src/isa/s390x/inst.isle line 1330. 1549 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1550 let expr1_0 = MInst::AluRR { 1551 alu_op: pattern1_0.clone(), 1552 rd: expr0_0, 1553 rm: pattern3_0, 1554 }; 1555 let expr2_0 = C::emit(ctx, &expr1_0); 1556 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1557 return Some(expr3_0); 1558 } 1559 1560 // Generated as internal constructor for term alu_rx. 1561 pub fn constructor_alu_rx<C: Context>( 1562 ctx: &mut C, 1563 arg0: Type, 1564 arg1: &ALUOp, 1565 arg2: Reg, 1566 arg3: &MemArg, 1567 ) -> Option<Reg> { 1568 let pattern0_0 = arg0; 1569 let pattern1_0 = arg1; 1570 let pattern2_0 = arg2; 1571 let pattern3_0 = arg3; 1572 // Rule at src/isa/s390x/inst.isle line 1337. 1573 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1574 let expr1_0 = MInst::AluRX { 1575 alu_op: pattern1_0.clone(), 1576 rd: expr0_0, 1577 mem: pattern3_0.clone(), 1578 }; 1579 let expr2_0 = C::emit(ctx, &expr1_0); 1580 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1581 return Some(expr3_0); 1582 } 1583 1584 // Generated as internal constructor for term alu_rsimm16. 1585 pub fn constructor_alu_rsimm16<C: Context>( 1586 ctx: &mut C, 1587 arg0: Type, 1588 arg1: &ALUOp, 1589 arg2: Reg, 1590 arg3: i16, 1591 ) -> Option<Reg> { 1592 let pattern0_0 = arg0; 1593 let pattern1_0 = arg1; 1594 let pattern2_0 = arg2; 1595 let pattern3_0 = arg3; 1596 // Rule at src/isa/s390x/inst.isle line 1344. 1597 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1598 let expr1_0 = MInst::AluRSImm16 { 1599 alu_op: pattern1_0.clone(), 1600 rd: expr0_0, 1601 imm: pattern3_0, 1602 }; 1603 let expr2_0 = C::emit(ctx, &expr1_0); 1604 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1605 return Some(expr3_0); 1606 } 1607 1608 // Generated as internal constructor for term alu_rsimm32. 1609 pub fn constructor_alu_rsimm32<C: Context>( 1610 ctx: &mut C, 1611 arg0: Type, 1612 arg1: &ALUOp, 1613 arg2: Reg, 1614 arg3: i32, 1615 ) -> Option<Reg> { 1616 let pattern0_0 = arg0; 1617 let pattern1_0 = arg1; 1618 let pattern2_0 = arg2; 1619 let pattern3_0 = arg3; 1620 // Rule at src/isa/s390x/inst.isle line 1351. 1621 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1622 let expr1_0 = MInst::AluRSImm32 { 1623 alu_op: pattern1_0.clone(), 1624 rd: expr0_0, 1625 imm: pattern3_0, 1626 }; 1627 let expr2_0 = C::emit(ctx, &expr1_0); 1628 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1629 return Some(expr3_0); 1630 } 1631 1632 // Generated as internal constructor for term alu_ruimm32. 1633 pub fn constructor_alu_ruimm32<C: Context>( 1634 ctx: &mut C, 1635 arg0: Type, 1636 arg1: &ALUOp, 1637 arg2: Reg, 1638 arg3: u32, 1639 ) -> Option<Reg> { 1640 let pattern0_0 = arg0; 1641 let pattern1_0 = arg1; 1642 let pattern2_0 = arg2; 1643 let pattern3_0 = arg3; 1644 // Rule at src/isa/s390x/inst.isle line 1358. 1645 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1646 let expr1_0 = MInst::AluRUImm32 { 1647 alu_op: pattern1_0.clone(), 1648 rd: expr0_0, 1649 imm: pattern3_0, 1650 }; 1651 let expr2_0 = C::emit(ctx, &expr1_0); 1652 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1653 return Some(expr3_0); 1654 } 1655 1656 // Generated as internal constructor for term alu_ruimm16shifted. 1657 pub fn constructor_alu_ruimm16shifted<C: Context>( 1658 ctx: &mut C, 1659 arg0: Type, 1660 arg1: &ALUOp, 1661 arg2: Reg, 1662 arg3: UImm16Shifted, 1663 ) -> Option<Reg> { 1664 let pattern0_0 = arg0; 1665 let pattern1_0 = arg1; 1666 let pattern2_0 = arg2; 1667 let pattern3_0 = arg3; 1668 // Rule at src/isa/s390x/inst.isle line 1365. 1669 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1670 let expr1_0 = MInst::AluRUImm16Shifted { 1671 alu_op: pattern1_0.clone(), 1672 rd: expr0_0, 1673 imm: pattern3_0, 1674 }; 1675 let expr2_0 = C::emit(ctx, &expr1_0); 1676 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1677 return Some(expr3_0); 1678 } 1679 1680 // Generated as internal constructor for term alu_ruimm32shifted. 1681 pub fn constructor_alu_ruimm32shifted<C: Context>( 1682 ctx: &mut C, 1683 arg0: Type, 1684 arg1: &ALUOp, 1685 arg2: Reg, 1686 arg3: UImm32Shifted, 1687 ) -> Option<Reg> { 1688 let pattern0_0 = arg0; 1689 let pattern1_0 = arg1; 1690 let pattern2_0 = arg2; 1691 let pattern3_0 = arg3; 1692 // Rule at src/isa/s390x/inst.isle line 1372. 1693 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1694 let expr1_0 = MInst::AluRUImm32Shifted { 1695 alu_op: pattern1_0.clone(), 1696 rd: expr0_0, 1697 imm: pattern3_0, 1698 }; 1699 let expr2_0 = C::emit(ctx, &expr1_0); 1700 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1701 return Some(expr3_0); 1702 } 1703 1704 // Generated as internal constructor for term smul_wide. 1705 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1706 let pattern0_0 = arg0; 1707 let pattern1_0 = arg1; 1708 // Rule at src/isa/s390x/inst.isle line 1379. 1709 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1710 let expr1_0 = MInst::SMulWide { 1711 rn: pattern0_0, 1712 rm: pattern1_0, 1713 }; 1714 let expr2_0 = C::emit(ctx, &expr1_0); 1715 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1716 return Some(expr3_0); 1717 } 1718 1719 // Generated as internal constructor for term umul_wide. 1720 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1721 let pattern0_0 = arg0; 1722 let pattern1_0 = arg1; 1723 // Rule at src/isa/s390x/inst.isle line 1386. 1724 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1725 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1726 let expr2_0 = MInst::Mov64 { 1727 rd: expr1_0, 1728 rm: pattern1_0, 1729 }; 1730 let expr3_0 = C::emit(ctx, &expr2_0); 1731 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1732 let expr5_0 = C::emit(ctx, &expr4_0); 1733 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1734 return Some(expr6_0); 1735 } 1736 1737 // Generated as internal constructor for term sdivmod32. 1738 pub fn constructor_sdivmod32<C: Context>( 1739 ctx: &mut C, 1740 arg0: &RegPair, 1741 arg1: Reg, 1742 ) -> Option<RegPair> { 1743 let pattern0_0 = arg0; 1744 let pattern1_0 = arg1; 1745 // Rule at src/isa/s390x/inst.isle line 1394. 1746 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1747 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1748 let expr2_0 = C::emit(ctx, &expr1_0); 1749 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1750 return Some(expr3_0); 1751 } 1752 1753 // Generated as internal constructor for term sdivmod64. 1754 pub fn constructor_sdivmod64<C: Context>( 1755 ctx: &mut C, 1756 arg0: &RegPair, 1757 arg1: Reg, 1758 ) -> Option<RegPair> { 1759 let pattern0_0 = arg0; 1760 let pattern1_0 = arg1; 1761 // Rule at src/isa/s390x/inst.isle line 1401. 1762 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1763 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1764 let expr2_0 = C::emit(ctx, &expr1_0); 1765 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1766 return Some(expr3_0); 1767 } 1768 1769 // Generated as internal constructor for term udivmod32. 1770 pub fn constructor_udivmod32<C: Context>( 1771 ctx: &mut C, 1772 arg0: &RegPair, 1773 arg1: Reg, 1774 ) -> Option<RegPair> { 1775 let pattern0_0 = arg0; 1776 let pattern1_0 = arg1; 1777 // Rule at src/isa/s390x/inst.isle line 1408. 1778 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1779 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1780 let expr2_0 = C::emit(ctx, &expr1_0); 1781 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1782 return Some(expr3_0); 1783 } 1784 1785 // Generated as internal constructor for term udivmod64. 1786 pub fn constructor_udivmod64<C: Context>( 1787 ctx: &mut C, 1788 arg0: &RegPair, 1789 arg1: Reg, 1790 ) -> Option<RegPair> { 1791 let pattern0_0 = arg0; 1792 let pattern1_0 = arg1; 1793 // Rule at src/isa/s390x/inst.isle line 1415. 1794 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1795 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1796 let expr2_0 = C::emit(ctx, &expr1_0); 1797 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1798 return Some(expr3_0); 1799 } 1800 1801 // Generated as internal constructor for term shift_rr. 1802 pub fn constructor_shift_rr<C: Context>( 1803 ctx: &mut C, 1804 arg0: Type, 1805 arg1: &ShiftOp, 1806 arg2: Reg, 1807 arg3: u8, 1808 arg4: Reg, 1809 ) -> Option<Reg> { 1810 let pattern0_0 = arg0; 1811 let pattern1_0 = arg1; 1812 let pattern2_0 = arg2; 1813 let pattern3_0 = arg3; 1814 let pattern4_0 = arg4; 1815 // Rule at src/isa/s390x/inst.isle line 1422. 1816 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1817 let expr1_0 = MInst::ShiftRR { 1818 shift_op: pattern1_0.clone(), 1819 rd: expr0_0, 1820 rn: pattern2_0, 1821 shift_imm: pattern3_0, 1822 shift_reg: pattern4_0, 1823 }; 1824 let expr2_0 = C::emit(ctx, &expr1_0); 1825 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1826 return Some(expr3_0); 1827 } 1828 1829 // Generated as internal constructor for term rxsbg_test. 1830 pub fn constructor_rxsbg_test<C: Context>( 1831 ctx: &mut C, 1832 arg0: &RxSBGOp, 1833 arg1: Reg, 1834 arg2: Reg, 1835 arg3: u8, 1836 arg4: u8, 1837 arg5: i8, 1838 ) -> Option<ProducesFlags> { 1839 let pattern0_0 = arg0; 1840 let pattern1_0 = arg1; 1841 let pattern2_0 = arg2; 1842 let pattern3_0 = arg3; 1843 let pattern4_0 = arg4; 1844 let pattern5_0 = arg5; 1845 // Rule at src/isa/s390x/inst.isle line 1429. 1846 let expr0_0 = MInst::RxSBGTest { 1847 op: pattern0_0.clone(), 1848 rd: pattern1_0, 1849 rn: pattern2_0, 1850 start_bit: pattern3_0, 1851 end_bit: pattern4_0, 1852 rotate_amt: pattern5_0, 1853 }; 1854 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1855 return Some(expr1_0); 1856 } 1857 1858 // Generated as internal constructor for term unary_rr. 1859 pub fn constructor_unary_rr<C: Context>( 1860 ctx: &mut C, 1861 arg0: Type, 1862 arg1: &UnaryOp, 1863 arg2: Reg, 1864 ) -> Option<Reg> { 1865 let pattern0_0 = arg0; 1866 let pattern1_0 = arg1; 1867 let pattern2_0 = arg2; 1868 // Rule at src/isa/s390x/inst.isle line 1435. 1869 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1870 let expr1_0 = MInst::UnaryRR { 1871 op: pattern1_0.clone(), 1872 rd: expr0_0, 1873 rn: pattern2_0, 1874 }; 1875 let expr2_0 = C::emit(ctx, &expr1_0); 1876 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1877 return Some(expr3_0); 1878 } 1879 1880 // Generated as internal constructor for term cmp_rr. 1881 pub fn constructor_cmp_rr<C: Context>( 1882 ctx: &mut C, 1883 arg0: &CmpOp, 1884 arg1: Reg, 1885 arg2: Reg, 1886 ) -> Option<ProducesFlags> { 1887 let pattern0_0 = arg0; 1888 let pattern1_0 = arg1; 1889 let pattern2_0 = arg2; 1890 // Rule at src/isa/s390x/inst.isle line 1442. 1891 let expr0_0 = MInst::CmpRR { 1892 op: pattern0_0.clone(), 1893 rn: pattern1_0, 1894 rm: pattern2_0, 1895 }; 1896 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1897 return Some(expr1_0); 1898 } 1899 1900 // Generated as internal constructor for term cmp_rx. 1901 pub fn constructor_cmp_rx<C: Context>( 1902 ctx: &mut C, 1903 arg0: &CmpOp, 1904 arg1: Reg, 1905 arg2: &MemArg, 1906 ) -> Option<ProducesFlags> { 1907 let pattern0_0 = arg0; 1908 let pattern1_0 = arg1; 1909 let pattern2_0 = arg2; 1910 // Rule at src/isa/s390x/inst.isle line 1447. 1911 let expr0_0 = MInst::CmpRX { 1912 op: pattern0_0.clone(), 1913 rn: pattern1_0, 1914 mem: pattern2_0.clone(), 1915 }; 1916 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1917 return Some(expr1_0); 1918 } 1919 1920 // Generated as internal constructor for term cmp_rsimm16. 1921 pub fn constructor_cmp_rsimm16<C: Context>( 1922 ctx: &mut C, 1923 arg0: &CmpOp, 1924 arg1: Reg, 1925 arg2: i16, 1926 ) -> Option<ProducesFlags> { 1927 let pattern0_0 = arg0; 1928 let pattern1_0 = arg1; 1929 let pattern2_0 = arg2; 1930 // Rule at src/isa/s390x/inst.isle line 1452. 1931 let expr0_0 = MInst::CmpRSImm16 { 1932 op: pattern0_0.clone(), 1933 rn: pattern1_0, 1934 imm: pattern2_0, 1935 }; 1936 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1937 return Some(expr1_0); 1938 } 1939 1940 // Generated as internal constructor for term cmp_rsimm32. 1941 pub fn constructor_cmp_rsimm32<C: Context>( 1942 ctx: &mut C, 1943 arg0: &CmpOp, 1944 arg1: Reg, 1945 arg2: i32, 1946 ) -> Option<ProducesFlags> { 1947 let pattern0_0 = arg0; 1948 let pattern1_0 = arg1; 1949 let pattern2_0 = arg2; 1950 // Rule at src/isa/s390x/inst.isle line 1457. 1951 let expr0_0 = MInst::CmpRSImm32 { 1952 op: pattern0_0.clone(), 1953 rn: pattern1_0, 1954 imm: pattern2_0, 1955 }; 1956 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1957 return Some(expr1_0); 1958 } 1959 1960 // Generated as internal constructor for term cmp_ruimm32. 1961 pub fn constructor_cmp_ruimm32<C: Context>( 1962 ctx: &mut C, 1963 arg0: &CmpOp, 1964 arg1: Reg, 1965 arg2: u32, 1966 ) -> Option<ProducesFlags> { 1967 let pattern0_0 = arg0; 1968 let pattern1_0 = arg1; 1969 let pattern2_0 = arg2; 1970 // Rule at src/isa/s390x/inst.isle line 1462. 1971 let expr0_0 = MInst::CmpRUImm32 { 1972 op: pattern0_0.clone(), 1973 rn: pattern1_0, 1974 imm: pattern2_0, 1975 }; 1976 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1977 return Some(expr1_0); 1978 } 1979 1980 // Generated as internal constructor for term atomic_rmw_impl. 1981 pub fn constructor_atomic_rmw_impl<C: Context>( 1982 ctx: &mut C, 1983 arg0: Type, 1984 arg1: &ALUOp, 1985 arg2: Reg, 1986 arg3: &MemArg, 1987 ) -> Option<Reg> { 1988 let pattern0_0 = arg0; 1989 let pattern1_0 = arg1; 1990 let pattern2_0 = arg2; 1991 let pattern3_0 = arg3; 1992 // Rule at src/isa/s390x/inst.isle line 1467. 1993 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1994 let expr1_0 = MInst::AtomicRmw { 1995 alu_op: pattern1_0.clone(), 1996 rd: expr0_0, 1997 rn: pattern2_0, 1998 mem: pattern3_0.clone(), 1999 }; 2000 let expr2_0 = C::emit(ctx, &expr1_0); 2001 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2002 return Some(expr3_0); 2003 } 2004 2005 // Generated as internal constructor for term atomic_cas32. 2006 pub fn constructor_atomic_cas32<C: Context>( 2007 ctx: &mut C, 2008 arg0: Reg, 2009 arg1: Reg, 2010 arg2: &MemArg, 2011 ) -> Option<Reg> { 2012 let pattern0_0 = arg0; 2013 let pattern1_0 = arg1; 2014 let pattern2_0 = arg2; 2015 // Rule at src/isa/s390x/inst.isle line 1474. 2016 let expr0_0: Type = I32; 2017 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2018 let expr2_0 = MInst::AtomicCas32 { 2019 rd: expr1_0, 2020 rn: pattern1_0, 2021 mem: pattern2_0.clone(), 2022 }; 2023 let expr3_0 = C::emit(ctx, &expr2_0); 2024 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2025 return Some(expr4_0); 2026 } 2027 2028 // Generated as internal constructor for term atomic_cas64. 2029 pub fn constructor_atomic_cas64<C: Context>( 2030 ctx: &mut C, 2031 arg0: Reg, 2032 arg1: Reg, 2033 arg2: &MemArg, 2034 ) -> Option<Reg> { 2035 let pattern0_0 = arg0; 2036 let pattern1_0 = arg1; 2037 let pattern2_0 = arg2; 2038 // Rule at src/isa/s390x/inst.isle line 1481. 2039 let expr0_0: Type = I64; 2040 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2041 let expr2_0 = MInst::AtomicCas64 { 2042 rd: expr1_0, 2043 rn: pattern1_0, 2044 mem: pattern2_0.clone(), 2045 }; 2046 let expr3_0 = C::emit(ctx, &expr2_0); 2047 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2048 return Some(expr4_0); 2049 } 2050 2051 // Generated as internal constructor for term fence_impl. 2052 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2053 // Rule at src/isa/s390x/inst.isle line 1488. 2054 let expr0_0 = MInst::Fence; 2055 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2056 return Some(expr1_0); 2057 } 2058 2059 // Generated as internal constructor for term load32. 2060 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2061 let pattern0_0 = arg0; 2062 // Rule at src/isa/s390x/inst.isle line 1493. 2063 let expr0_0: Type = I32; 2064 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2065 let expr2_0 = MInst::Load32 { 2066 rd: expr1_0, 2067 mem: pattern0_0.clone(), 2068 }; 2069 let expr3_0 = C::emit(ctx, &expr2_0); 2070 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2071 return Some(expr4_0); 2072 } 2073 2074 // Generated as internal constructor for term load64. 2075 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2076 let pattern0_0 = arg0; 2077 // Rule at src/isa/s390x/inst.isle line 1500. 2078 let expr0_0: Type = I64; 2079 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2080 let expr2_0 = MInst::Load64 { 2081 rd: expr1_0, 2082 mem: pattern0_0.clone(), 2083 }; 2084 let expr3_0 = C::emit(ctx, &expr2_0); 2085 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2086 return Some(expr4_0); 2087 } 2088 2089 // Generated as internal constructor for term loadrev16. 2090 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2091 let pattern0_0 = arg0; 2092 // Rule at src/isa/s390x/inst.isle line 1507. 2093 let expr0_0: Type = I32; 2094 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2095 let expr2_0 = MInst::LoadRev16 { 2096 rd: expr1_0, 2097 mem: pattern0_0.clone(), 2098 }; 2099 let expr3_0 = C::emit(ctx, &expr2_0); 2100 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2101 return Some(expr4_0); 2102 } 2103 2104 // Generated as internal constructor for term loadrev32. 2105 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2106 let pattern0_0 = arg0; 2107 // Rule at src/isa/s390x/inst.isle line 1514. 2108 let expr0_0: Type = I32; 2109 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2110 let expr2_0 = MInst::LoadRev32 { 2111 rd: expr1_0, 2112 mem: pattern0_0.clone(), 2113 }; 2114 let expr3_0 = C::emit(ctx, &expr2_0); 2115 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2116 return Some(expr4_0); 2117 } 2118 2119 // Generated as internal constructor for term loadrev64. 2120 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2121 let pattern0_0 = arg0; 2122 // Rule at src/isa/s390x/inst.isle line 1521. 2123 let expr0_0: Type = I64; 2124 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2125 let expr2_0 = MInst::LoadRev64 { 2126 rd: expr1_0, 2127 mem: pattern0_0.clone(), 2128 }; 2129 let expr3_0 = C::emit(ctx, &expr2_0); 2130 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2131 return Some(expr4_0); 2132 } 2133 2134 // Generated as internal constructor for term store8. 2135 pub fn constructor_store8<C: Context>( 2136 ctx: &mut C, 2137 arg0: Reg, 2138 arg1: &MemArg, 2139 ) -> Option<SideEffectNoResult> { 2140 let pattern0_0 = arg0; 2141 let pattern1_0 = arg1; 2142 // Rule at src/isa/s390x/inst.isle line 1528. 2143 let expr0_0 = MInst::Store8 { 2144 rd: pattern0_0, 2145 mem: pattern1_0.clone(), 2146 }; 2147 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2148 return Some(expr1_0); 2149 } 2150 2151 // Generated as internal constructor for term store16. 2152 pub fn constructor_store16<C: Context>( 2153 ctx: &mut C, 2154 arg0: Reg, 2155 arg1: &MemArg, 2156 ) -> Option<SideEffectNoResult> { 2157 let pattern0_0 = arg0; 2158 let pattern1_0 = arg1; 2159 // Rule at src/isa/s390x/inst.isle line 1533. 2160 let expr0_0 = MInst::Store16 { 2161 rd: pattern0_0, 2162 mem: pattern1_0.clone(), 2163 }; 2164 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2165 return Some(expr1_0); 2166 } 2167 2168 // Generated as internal constructor for term store32. 2169 pub fn constructor_store32<C: Context>( 2170 ctx: &mut C, 2171 arg0: Reg, 2172 arg1: &MemArg, 2173 ) -> Option<SideEffectNoResult> { 2174 let pattern0_0 = arg0; 2175 let pattern1_0 = arg1; 2176 // Rule at src/isa/s390x/inst.isle line 1538. 2177 let expr0_0 = MInst::Store32 { 2178 rd: pattern0_0, 2179 mem: pattern1_0.clone(), 2180 }; 2181 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2182 return Some(expr1_0); 2183 } 2184 2185 // Generated as internal constructor for term store64. 2186 pub fn constructor_store64<C: Context>( 2187 ctx: &mut C, 2188 arg0: Reg, 2189 arg1: &MemArg, 2190 ) -> Option<SideEffectNoResult> { 2191 let pattern0_0 = arg0; 2192 let pattern1_0 = arg1; 2193 // Rule at src/isa/s390x/inst.isle line 1543. 2194 let expr0_0 = MInst::Store64 { 2195 rd: pattern0_0, 2196 mem: pattern1_0.clone(), 2197 }; 2198 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2199 return Some(expr1_0); 2200 } 2201 2202 // Generated as internal constructor for term store8_imm. 2203 pub fn constructor_store8_imm<C: Context>( 2204 ctx: &mut C, 2205 arg0: u8, 2206 arg1: &MemArg, 2207 ) -> Option<SideEffectNoResult> { 2208 let pattern0_0 = arg0; 2209 let pattern1_0 = arg1; 2210 // Rule at src/isa/s390x/inst.isle line 1548. 2211 let expr0_0 = MInst::StoreImm8 { 2212 imm: pattern0_0, 2213 mem: pattern1_0.clone(), 2214 }; 2215 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2216 return Some(expr1_0); 2217 } 2218 2219 // Generated as internal constructor for term store16_imm. 2220 pub fn constructor_store16_imm<C: Context>( 2221 ctx: &mut C, 2222 arg0: i16, 2223 arg1: &MemArg, 2224 ) -> Option<SideEffectNoResult> { 2225 let pattern0_0 = arg0; 2226 let pattern1_0 = arg1; 2227 // Rule at src/isa/s390x/inst.isle line 1553. 2228 let expr0_0 = MInst::StoreImm16 { 2229 imm: pattern0_0, 2230 mem: pattern1_0.clone(), 2231 }; 2232 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2233 return Some(expr1_0); 2234 } 2235 2236 // Generated as internal constructor for term store32_simm16. 2237 pub fn constructor_store32_simm16<C: Context>( 2238 ctx: &mut C, 2239 arg0: i16, 2240 arg1: &MemArg, 2241 ) -> Option<SideEffectNoResult> { 2242 let pattern0_0 = arg0; 2243 let pattern1_0 = arg1; 2244 // Rule at src/isa/s390x/inst.isle line 1558. 2245 let expr0_0 = MInst::StoreImm32SExt16 { 2246 imm: pattern0_0, 2247 mem: pattern1_0.clone(), 2248 }; 2249 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2250 return Some(expr1_0); 2251 } 2252 2253 // Generated as internal constructor for term store64_simm16. 2254 pub fn constructor_store64_simm16<C: Context>( 2255 ctx: &mut C, 2256 arg0: i16, 2257 arg1: &MemArg, 2258 ) -> Option<SideEffectNoResult> { 2259 let pattern0_0 = arg0; 2260 let pattern1_0 = arg1; 2261 // Rule at src/isa/s390x/inst.isle line 1563. 2262 let expr0_0 = MInst::StoreImm64SExt16 { 2263 imm: pattern0_0, 2264 mem: pattern1_0.clone(), 2265 }; 2266 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2267 return Some(expr1_0); 2268 } 2269 2270 // Generated as internal constructor for term storerev16. 2271 pub fn constructor_storerev16<C: Context>( 2272 ctx: &mut C, 2273 arg0: Reg, 2274 arg1: &MemArg, 2275 ) -> Option<SideEffectNoResult> { 2276 let pattern0_0 = arg0; 2277 let pattern1_0 = arg1; 2278 // Rule at src/isa/s390x/inst.isle line 1568. 2279 let expr0_0 = MInst::StoreRev16 { 2280 rd: pattern0_0, 2281 mem: pattern1_0.clone(), 2282 }; 2283 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2284 return Some(expr1_0); 2285 } 2286 2287 // Generated as internal constructor for term storerev32. 2288 pub fn constructor_storerev32<C: Context>( 2289 ctx: &mut C, 2290 arg0: Reg, 2291 arg1: &MemArg, 2292 ) -> Option<SideEffectNoResult> { 2293 let pattern0_0 = arg0; 2294 let pattern1_0 = arg1; 2295 // Rule at src/isa/s390x/inst.isle line 1573. 2296 let expr0_0 = MInst::StoreRev32 { 2297 rd: pattern0_0, 2298 mem: pattern1_0.clone(), 2299 }; 2300 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2301 return Some(expr1_0); 2302 } 2303 2304 // Generated as internal constructor for term storerev64. 2305 pub fn constructor_storerev64<C: Context>( 2306 ctx: &mut C, 2307 arg0: Reg, 2308 arg1: &MemArg, 2309 ) -> Option<SideEffectNoResult> { 2310 let pattern0_0 = arg0; 2311 let pattern1_0 = arg1; 2312 // Rule at src/isa/s390x/inst.isle line 1578. 2313 let expr0_0 = MInst::StoreRev64 { 2314 rd: pattern0_0, 2315 mem: pattern1_0.clone(), 2316 }; 2317 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2318 return Some(expr1_0); 2319 } 2320 2321 // Generated as internal constructor for term fpu_rr. 2322 pub fn constructor_fpu_rr<C: Context>( 2323 ctx: &mut C, 2324 arg0: Type, 2325 arg1: &FPUOp1, 2326 arg2: Reg, 2327 ) -> Option<Reg> { 2328 let pattern0_0 = arg0; 2329 let pattern1_0 = arg1; 2330 let pattern2_0 = arg2; 2331 // Rule at src/isa/s390x/inst.isle line 1583. 2332 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2333 let expr1_0 = MInst::FpuRR { 2334 fpu_op: pattern1_0.clone(), 2335 rd: expr0_0, 2336 rn: pattern2_0, 2337 }; 2338 let expr2_0 = C::emit(ctx, &expr1_0); 2339 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2340 return Some(expr3_0); 2341 } 2342 2343 // Generated as internal constructor for term fpu_rrr. 2344 pub fn constructor_fpu_rrr<C: Context>( 2345 ctx: &mut C, 2346 arg0: Type, 2347 arg1: &FPUOp2, 2348 arg2: Reg, 2349 arg3: Reg, 2350 ) -> Option<Reg> { 2351 let pattern0_0 = arg0; 2352 let pattern1_0 = arg1; 2353 let pattern2_0 = arg2; 2354 let pattern3_0 = arg3; 2355 // Rule at src/isa/s390x/inst.isle line 1590. 2356 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2357 let expr1_0 = MInst::FpuRRR { 2358 fpu_op: pattern1_0.clone(), 2359 rd: expr0_0, 2360 rm: pattern3_0, 2361 }; 2362 let expr2_0 = C::emit(ctx, &expr1_0); 2363 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2364 return Some(expr3_0); 2365 } 2366 2367 // Generated as internal constructor for term fpu_rrrr. 2368 pub fn constructor_fpu_rrrr<C: Context>( 2369 ctx: &mut C, 2370 arg0: Type, 2371 arg1: &FPUOp3, 2372 arg2: Reg, 2373 arg3: Reg, 2374 arg4: Reg, 2375 ) -> Option<Reg> { 2376 let pattern0_0 = arg0; 2377 let pattern1_0 = arg1; 2378 let pattern2_0 = arg2; 2379 let pattern3_0 = arg3; 2380 let pattern4_0 = arg4; 2381 // Rule at src/isa/s390x/inst.isle line 1597. 2382 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2383 let expr1_0 = MInst::FpuRRRR { 2384 fpu_op: pattern1_0.clone(), 2385 rd: expr0_0, 2386 rn: pattern3_0, 2387 rm: pattern4_0, 2388 }; 2389 let expr2_0 = C::emit(ctx, &expr1_0); 2390 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2391 return Some(expr3_0); 2392 } 2393 2394 // Generated as internal constructor for term fpu_copysign. 2395 pub fn constructor_fpu_copysign<C: Context>( 2396 ctx: &mut C, 2397 arg0: Type, 2398 arg1: Reg, 2399 arg2: Reg, 2400 ) -> Option<Reg> { 2401 let pattern0_0 = arg0; 2402 let pattern1_0 = arg1; 2403 let pattern2_0 = arg2; 2404 // Rule at src/isa/s390x/inst.isle line 1604. 2405 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2406 let expr1_0 = MInst::FpuCopysign { 2407 rd: expr0_0, 2408 rn: pattern1_0, 2409 rm: pattern2_0, 2410 }; 2411 let expr2_0 = C::emit(ctx, &expr1_0); 2412 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2413 return Some(expr3_0); 2414 } 2415 2416 // Generated as internal constructor for term fpu_cmp32. 2417 pub fn constructor_fpu_cmp32<C: Context>( 2418 ctx: &mut C, 2419 arg0: Reg, 2420 arg1: Reg, 2421 ) -> Option<ProducesFlags> { 2422 let pattern0_0 = arg0; 2423 let pattern1_0 = arg1; 2424 // Rule at src/isa/s390x/inst.isle line 1611. 2425 let expr0_0 = MInst::FpuCmp32 { 2426 rn: pattern0_0, 2427 rm: pattern1_0, 2428 }; 2429 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2430 return Some(expr1_0); 2431 } 2432 2433 // Generated as internal constructor for term fpu_cmp64. 2434 pub fn constructor_fpu_cmp64<C: Context>( 2435 ctx: &mut C, 2436 arg0: Reg, 2437 arg1: Reg, 2438 ) -> Option<ProducesFlags> { 2439 let pattern0_0 = arg0; 2440 let pattern1_0 = arg1; 2441 // Rule at src/isa/s390x/inst.isle line 1616. 2442 let expr0_0 = MInst::FpuCmp64 { 2443 rn: pattern0_0, 2444 rm: pattern1_0, 2445 }; 2446 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2447 return Some(expr1_0); 2448 } 2449 2450 // Generated as internal constructor for term fpu_to_int. 2451 pub fn constructor_fpu_to_int<C: Context>( 2452 ctx: &mut C, 2453 arg0: Type, 2454 arg1: &FpuToIntOp, 2455 arg2: Reg, 2456 ) -> Option<ProducesFlags> { 2457 let pattern0_0 = arg0; 2458 let pattern1_0 = arg1; 2459 let pattern2_0 = arg2; 2460 // Rule at src/isa/s390x/inst.isle line 1621. 2461 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2462 let expr1_0 = MInst::FpuToInt { 2463 op: pattern1_0.clone(), 2464 rd: expr0_0, 2465 rn: pattern2_0, 2466 }; 2467 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2468 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2469 inst: expr1_0, 2470 result: expr2_0, 2471 }; 2472 return Some(expr3_0); 2473 } 2474 2475 // Generated as internal constructor for term int_to_fpu. 2476 pub fn constructor_int_to_fpu<C: Context>( 2477 ctx: &mut C, 2478 arg0: Type, 2479 arg1: &IntToFpuOp, 2480 arg2: Reg, 2481 ) -> Option<Reg> { 2482 let pattern0_0 = arg0; 2483 let pattern1_0 = arg1; 2484 let pattern2_0 = arg2; 2485 // Rule at src/isa/s390x/inst.isle line 1628. 2486 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2487 let expr1_0 = MInst::IntToFpu { 2488 op: pattern1_0.clone(), 2489 rd: expr0_0, 2490 rn: pattern2_0, 2491 }; 2492 let expr2_0 = C::emit(ctx, &expr1_0); 2493 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2494 return Some(expr3_0); 2495 } 2496 2497 // Generated as internal constructor for term fpu_round. 2498 pub fn constructor_fpu_round<C: Context>( 2499 ctx: &mut C, 2500 arg0: Type, 2501 arg1: &FpuRoundMode, 2502 arg2: Reg, 2503 ) -> Option<Reg> { 2504 let pattern0_0 = arg0; 2505 let pattern1_0 = arg1; 2506 let pattern2_0 = arg2; 2507 // Rule at src/isa/s390x/inst.isle line 1635. 2508 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2509 let expr1_0 = MInst::FpuRound { 2510 op: pattern1_0.clone(), 2511 rd: expr0_0, 2512 rn: pattern2_0, 2513 }; 2514 let expr2_0 = C::emit(ctx, &expr1_0); 2515 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2516 return Some(expr3_0); 2517 } 2518 2519 // Generated as internal constructor for term fpuvec_rrr. 2520 pub fn constructor_fpuvec_rrr<C: Context>( 2521 ctx: &mut C, 2522 arg0: Type, 2523 arg1: &FPUOp2, 2524 arg2: Reg, 2525 arg3: Reg, 2526 ) -> Option<Reg> { 2527 let pattern0_0 = arg0; 2528 let pattern1_0 = arg1; 2529 let pattern2_0 = arg2; 2530 let pattern3_0 = arg3; 2531 // Rule at src/isa/s390x/inst.isle line 1642. 2532 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2533 let expr1_0 = MInst::FpuVecRRR { 2534 fpu_op: pattern1_0.clone(), 2535 rd: expr0_0, 2536 rn: pattern2_0, 2537 rm: pattern3_0, 2538 }; 2539 let expr2_0 = C::emit(ctx, &expr1_0); 2540 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2541 return Some(expr3_0); 2542 } 2543 2544 // Generated as internal constructor for term mov_to_fpr. 2545 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2546 let pattern0_0 = arg0; 2547 // Rule at src/isa/s390x/inst.isle line 1649. 2548 let expr0_0: Type = F64; 2549 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2550 let expr2_0 = MInst::MovToFpr { 2551 rd: expr1_0, 2552 rn: pattern0_0, 2553 }; 2554 let expr3_0 = C::emit(ctx, &expr2_0); 2555 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2556 return Some(expr4_0); 2557 } 2558 2559 // Generated as internal constructor for term mov_from_fpr. 2560 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2561 let pattern0_0 = arg0; 2562 // Rule at src/isa/s390x/inst.isle line 1656. 2563 let expr0_0: Type = I64; 2564 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2565 let expr2_0 = MInst::MovFromFpr { 2566 rd: expr1_0, 2567 rn: pattern0_0, 2568 }; 2569 let expr3_0 = C::emit(ctx, &expr2_0); 2570 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2571 return Some(expr4_0); 2572 } 2573 2574 // Generated as internal constructor for term fpu_load32. 2575 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2576 let pattern0_0 = arg0; 2577 // Rule at src/isa/s390x/inst.isle line 1663. 2578 let expr0_0: Type = F32; 2579 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2580 let expr2_0 = MInst::FpuLoad32 { 2581 rd: expr1_0, 2582 mem: pattern0_0.clone(), 2583 }; 2584 let expr3_0 = C::emit(ctx, &expr2_0); 2585 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2586 return Some(expr4_0); 2587 } 2588 2589 // Generated as internal constructor for term fpu_load64. 2590 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2591 let pattern0_0 = arg0; 2592 // Rule at src/isa/s390x/inst.isle line 1670. 2593 let expr0_0: Type = F64; 2594 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2595 let expr2_0 = MInst::FpuLoad64 { 2596 rd: expr1_0, 2597 mem: pattern0_0.clone(), 2598 }; 2599 let expr3_0 = C::emit(ctx, &expr2_0); 2600 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2601 return Some(expr4_0); 2602 } 2603 2604 // Generated as internal constructor for term fpu_loadrev32. 2605 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2606 let pattern0_0 = arg0; 2607 // Rule at src/isa/s390x/inst.isle line 1677. 2608 let expr0_0: Type = F32; 2609 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2610 let expr2_0 = MInst::FpuLoadRev32 { 2611 rd: expr1_0, 2612 mem: pattern0_0.clone(), 2613 }; 2614 let expr3_0 = C::emit(ctx, &expr2_0); 2615 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2616 return Some(expr4_0); 2617 } 2618 2619 // Generated as internal constructor for term fpu_loadrev64. 2620 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2621 let pattern0_0 = arg0; 2622 // Rule at src/isa/s390x/inst.isle line 1684. 2623 let expr0_0: Type = F64; 2624 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2625 let expr2_0 = MInst::FpuLoadRev64 { 2626 rd: expr1_0, 2627 mem: pattern0_0.clone(), 2628 }; 2629 let expr3_0 = C::emit(ctx, &expr2_0); 2630 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2631 return Some(expr4_0); 2632 } 2633 2634 // Generated as internal constructor for term fpu_store32. 2635 pub fn constructor_fpu_store32<C: Context>( 2636 ctx: &mut C, 2637 arg0: Reg, 2638 arg1: &MemArg, 2639 ) -> Option<SideEffectNoResult> { 2640 let pattern0_0 = arg0; 2641 let pattern1_0 = arg1; 2642 // Rule at src/isa/s390x/inst.isle line 1691. 2643 let expr0_0 = MInst::FpuStore32 { 2644 rd: pattern0_0, 2645 mem: pattern1_0.clone(), 2646 }; 2647 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2648 return Some(expr1_0); 2649 } 2650 2651 // Generated as internal constructor for term fpu_store64. 2652 pub fn constructor_fpu_store64<C: Context>( 2653 ctx: &mut C, 2654 arg0: Reg, 2655 arg1: &MemArg, 2656 ) -> Option<SideEffectNoResult> { 2657 let pattern0_0 = arg0; 2658 let pattern1_0 = arg1; 2659 // Rule at src/isa/s390x/inst.isle line 1696. 2660 let expr0_0 = MInst::FpuStore64 { 2661 rd: pattern0_0, 2662 mem: pattern1_0.clone(), 2663 }; 2664 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2665 return Some(expr1_0); 2666 } 2667 2668 // Generated as internal constructor for term fpu_storerev32. 2669 pub fn constructor_fpu_storerev32<C: Context>( 2670 ctx: &mut C, 2671 arg0: Reg, 2672 arg1: &MemArg, 2673 ) -> Option<SideEffectNoResult> { 2674 let pattern0_0 = arg0; 2675 let pattern1_0 = arg1; 2676 // Rule at src/isa/s390x/inst.isle line 1701. 2677 let expr0_0 = MInst::FpuStoreRev32 { 2678 rd: pattern0_0, 2679 mem: pattern1_0.clone(), 2680 }; 2681 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2682 return Some(expr1_0); 2683 } 2684 2685 // Generated as internal constructor for term fpu_storerev64. 2686 pub fn constructor_fpu_storerev64<C: Context>( 2687 ctx: &mut C, 2688 arg0: Reg, 2689 arg1: &MemArg, 2690 ) -> Option<SideEffectNoResult> { 2691 let pattern0_0 = arg0; 2692 let pattern1_0 = arg1; 2693 // Rule at src/isa/s390x/inst.isle line 1706. 2694 let expr0_0 = MInst::FpuStoreRev64 { 2695 rd: pattern0_0, 2696 mem: pattern1_0.clone(), 2697 }; 2698 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2699 return Some(expr1_0); 2700 } 2701 2702 // Generated as internal constructor for term load_ext_name_far. 2703 pub fn constructor_load_ext_name_far<C: Context>( 2704 ctx: &mut C, 2705 arg0: ExternalName, 2706 arg1: i64, 2707 ) -> Option<Reg> { 2708 let pattern0_0 = arg0; 2709 let pattern1_0 = arg1; 2710 // Rule at src/isa/s390x/inst.isle line 1711. 2711 let expr0_0: Type = I64; 2712 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2713 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2714 let expr3_0 = MInst::LoadExtNameFar { 2715 rd: expr1_0, 2716 name: expr2_0, 2717 offset: pattern1_0, 2718 }; 2719 let expr4_0 = C::emit(ctx, &expr3_0); 2720 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2721 return Some(expr5_0); 2722 } 2723 2724 // Generated as internal constructor for term load_addr. 2725 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2726 let pattern0_0 = arg0; 2727 // Rule at src/isa/s390x/inst.isle line 1719. 2728 let expr0_0: Type = I64; 2729 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2730 let expr2_0 = MInst::LoadAddr { 2731 rd: expr1_0, 2732 mem: pattern0_0.clone(), 2733 }; 2734 let expr3_0 = C::emit(ctx, &expr2_0); 2735 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2736 return Some(expr4_0); 2737 } 2738 2739 // Generated as internal constructor for term jump_impl. 2740 pub fn constructor_jump_impl<C: Context>( 2741 ctx: &mut C, 2742 arg0: MachLabel, 2743 ) -> Option<SideEffectNoResult> { 2744 let pattern0_0 = arg0; 2745 // Rule at src/isa/s390x/inst.isle line 1726. 2746 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2747 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2748 return Some(expr1_0); 2749 } 2750 2751 // Generated as internal constructor for term cond_br. 2752 pub fn constructor_cond_br<C: Context>( 2753 ctx: &mut C, 2754 arg0: MachLabel, 2755 arg1: MachLabel, 2756 arg2: &Cond, 2757 ) -> Option<SideEffectNoResult> { 2758 let pattern0_0 = arg0; 2759 let pattern1_0 = arg1; 2760 let pattern2_0 = arg2; 2761 // Rule at src/isa/s390x/inst.isle line 1731. 2762 let expr0_0 = MInst::CondBr { 2763 taken: pattern0_0, 2764 not_taken: pattern1_0, 2765 cond: pattern2_0.clone(), 2766 }; 2767 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2768 return Some(expr1_0); 2769 } 2770 2771 // Generated as internal constructor for term oneway_cond_br. 2772 pub fn constructor_oneway_cond_br<C: Context>( 2773 ctx: &mut C, 2774 arg0: MachLabel, 2775 arg1: &Cond, 2776 ) -> Option<SideEffectNoResult> { 2777 let pattern0_0 = arg0; 2778 let pattern1_0 = arg1; 2779 // Rule at src/isa/s390x/inst.isle line 1736. 2780 let expr0_0 = MInst::OneWayCondBr { 2781 target: pattern0_0, 2782 cond: pattern1_0.clone(), 2783 }; 2784 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2785 return Some(expr1_0); 2786 } 2787 2788 // Generated as internal constructor for term jt_sequence. 2789 pub fn constructor_jt_sequence<C: Context>( 2790 ctx: &mut C, 2791 arg0: Reg, 2792 arg1: &VecMachLabel, 2793 ) -> Option<SideEffectNoResult> { 2794 let pattern0_0 = arg0; 2795 let pattern1_0 = arg1; 2796 // Rule at src/isa/s390x/inst.isle line 1741. 2797 let expr0_0 = MInst::JTSequence { 2798 ridx: pattern0_0, 2799 targets: pattern1_0.clone(), 2800 }; 2801 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2802 return Some(expr1_0); 2803 } 2804 2805 // Generated as internal constructor for term drop_flags. 2806 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2807 let pattern0_0 = arg0; 2808 if let &ProducesFlags::ProducesFlagsReturnsReg { 2809 inst: ref pattern1_0, 2810 result: pattern1_1, 2811 } = pattern0_0 2812 { 2813 // Rule at src/isa/s390x/inst.isle line 1746. 2814 let expr0_0 = C::emit(ctx, pattern1_0); 2815 return Some(pattern1_1); 2816 } 2817 return None; 2818 } 2819 2820 // Generated as internal constructor for term push_alu_reg. 2821 pub fn constructor_push_alu_reg<C: Context>( 2822 ctx: &mut C, 2823 arg0: &VecMInstBuilder, 2824 arg1: &ALUOp, 2825 arg2: WritableReg, 2826 arg3: Reg, 2827 arg4: Reg, 2828 ) -> Option<Reg> { 2829 let pattern0_0 = arg0; 2830 let pattern1_0 = arg1; 2831 let pattern2_0 = arg2; 2832 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2833 let pattern4_0 = arg3; 2834 let pattern5_0 = arg4; 2835 // Rule at src/isa/s390x/inst.isle line 1785. 2836 let expr0_0 = MInst::AluRRR { 2837 alu_op: pattern1_0.clone(), 2838 rd: pattern3_0, 2839 rn: pattern4_0, 2840 rm: pattern5_0, 2841 }; 2842 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2843 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2844 return Some(expr2_0); 2845 } 2846 return None; 2847 } 2848 2849 // Generated as internal constructor for term push_alu_uimm32shifted. 2850 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2851 ctx: &mut C, 2852 arg0: &VecMInstBuilder, 2853 arg1: &ALUOp, 2854 arg2: WritableReg, 2855 arg3: Reg, 2856 arg4: UImm32Shifted, 2857 ) -> Option<Reg> { 2858 let pattern0_0 = arg0; 2859 let pattern1_0 = arg1; 2860 let pattern2_0 = arg2; 2861 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2862 let pattern4_0 = arg3; 2863 let closure5 = || { 2864 return Some(pattern3_0); 2865 }; 2866 if let Some(pattern5_0) = closure5() { 2867 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2868 let pattern7_0 = arg4; 2869 // Rule at src/isa/s390x/inst.isle line 1791. 2870 let expr0_0 = MInst::AluRUImm32Shifted { 2871 alu_op: pattern1_0.clone(), 2872 rd: pattern3_0, 2873 imm: pattern7_0, 2874 }; 2875 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2876 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2877 return Some(expr2_0); 2878 } 2879 } 2880 } 2881 return None; 2882 } 2883 2884 // Generated as internal constructor for term push_shift. 2885 pub fn constructor_push_shift<C: Context>( 2886 ctx: &mut C, 2887 arg0: &VecMInstBuilder, 2888 arg1: &ShiftOp, 2889 arg2: WritableReg, 2890 arg3: Reg, 2891 arg4: u8, 2892 arg5: Reg, 2893 ) -> Option<Reg> { 2894 let pattern0_0 = arg0; 2895 let pattern1_0 = arg1; 2896 let pattern2_0 = arg2; 2897 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2898 let pattern4_0 = arg3; 2899 let pattern5_0 = arg4; 2900 let pattern6_0 = arg5; 2901 // Rule at src/isa/s390x/inst.isle line 1797. 2902 let expr0_0 = MInst::ShiftRR { 2903 shift_op: pattern1_0.clone(), 2904 rd: pattern3_0, 2905 rn: pattern4_0, 2906 shift_imm: pattern5_0, 2907 shift_reg: pattern6_0, 2908 }; 2909 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2910 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2911 return Some(expr2_0); 2912 } 2913 return None; 2914 } 2915 2916 // Generated as internal constructor for term push_rxsbg. 2917 pub fn constructor_push_rxsbg<C: Context>( 2918 ctx: &mut C, 2919 arg0: &VecMInstBuilder, 2920 arg1: &RxSBGOp, 2921 arg2: WritableReg, 2922 arg3: Reg, 2923 arg4: Reg, 2924 arg5: u8, 2925 arg6: u8, 2926 arg7: i8, 2927 ) -> Option<Reg> { 2928 let pattern0_0 = arg0; 2929 let pattern1_0 = arg1; 2930 let pattern2_0 = arg2; 2931 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2932 let pattern4_0 = arg3; 2933 let closure5 = || { 2934 return Some(pattern3_0); 2935 }; 2936 if let Some(pattern5_0) = closure5() { 2937 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2938 let pattern7_0 = arg4; 2939 let pattern8_0 = arg5; 2940 let pattern9_0 = arg6; 2941 let pattern10_0 = arg7; 2942 // Rule at src/isa/s390x/inst.isle line 1804. 2943 let expr0_0 = MInst::RxSBG { 2944 op: pattern1_0.clone(), 2945 rd: pattern3_0, 2946 rn: pattern7_0, 2947 start_bit: pattern8_0, 2948 end_bit: pattern9_0, 2949 rotate_amt: pattern10_0, 2950 }; 2951 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2952 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2953 return Some(expr2_0); 2954 } 2955 } 2956 } 2957 return None; 2958 } 2959 2960 // Generated as internal constructor for term push_unary. 2961 pub fn constructor_push_unary<C: Context>( 2962 ctx: &mut C, 2963 arg0: &VecMInstBuilder, 2964 arg1: &UnaryOp, 2965 arg2: WritableReg, 2966 arg3: Reg, 2967 ) -> Option<Reg> { 2968 let pattern0_0 = arg0; 2969 let pattern1_0 = arg1; 2970 let pattern2_0 = arg2; 2971 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2972 let pattern4_0 = arg3; 2973 // Rule at src/isa/s390x/inst.isle line 1811. 2974 let expr0_0 = MInst::UnaryRR { 2975 op: pattern1_0.clone(), 2976 rd: pattern3_0, 2977 rn: pattern4_0, 2978 }; 2979 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2980 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2981 return Some(expr2_0); 2982 } 2983 return None; 2984 } 2985 2986 // Generated as internal constructor for term push_atomic_cas32. 2987 pub fn constructor_push_atomic_cas32<C: Context>( 2988 ctx: &mut C, 2989 arg0: &VecMInstBuilder, 2990 arg1: WritableReg, 2991 arg2: Reg, 2992 arg3: &MemArg, 2993 ) -> Option<Reg> { 2994 let pattern0_0 = arg0; 2995 let pattern1_0 = arg1; 2996 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2997 let pattern3_0 = arg2; 2998 let pattern4_0 = arg3; 2999 // Rule at src/isa/s390x/inst.isle line 1817. 3000 let expr0_0 = MInst::AtomicCas32 { 3001 rd: pattern2_0, 3002 rn: pattern3_0, 3003 mem: pattern4_0.clone(), 3004 }; 3005 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3006 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3007 return Some(expr2_0); 3008 } 3009 return None; 3010 } 3011 3012 // Generated as internal constructor for term push_atomic_cas64. 3013 pub fn constructor_push_atomic_cas64<C: Context>( 3014 ctx: &mut C, 3015 arg0: &VecMInstBuilder, 3016 arg1: WritableReg, 3017 arg2: Reg, 3018 arg3: &MemArg, 3019 ) -> Option<Reg> { 3020 let pattern0_0 = arg0; 3021 let pattern1_0 = arg1; 3022 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3023 let pattern3_0 = arg2; 3024 let pattern4_0 = arg3; 3025 // Rule at src/isa/s390x/inst.isle line 1823. 3026 let expr0_0 = MInst::AtomicCas64 { 3027 rd: pattern2_0, 3028 rn: pattern3_0, 3029 mem: pattern4_0.clone(), 3030 }; 3031 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3032 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3033 return Some(expr2_0); 3034 } 3035 return None; 3036 } 3037 3038 // Generated as internal constructor for term push_break_if. 3039 pub fn constructor_push_break_if<C: Context>( 3040 ctx: &mut C, 3041 arg0: &VecMInstBuilder, 3042 arg1: &ProducesFlags, 3043 arg2: &Cond, 3044 ) -> Option<Reg> { 3045 let pattern0_0 = arg0; 3046 let pattern1_0 = arg1; 3047 if let &ProducesFlags::ProducesFlagsSideEffect { 3048 inst: ref pattern2_0, 3049 } = pattern1_0 3050 { 3051 let pattern3_0 = arg2; 3052 // Rule at src/isa/s390x/inst.isle line 1829. 3053 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3054 let expr1_0 = MInst::CondBreak { 3055 cond: pattern3_0.clone(), 3056 }; 3057 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3058 let expr3_0 = C::invalid_reg(ctx); 3059 return Some(expr3_0); 3060 } 3061 return None; 3062 } 3063 3064 // Generated as internal constructor for term emit_loop. 3065 pub fn constructor_emit_loop<C: Context>( 3066 ctx: &mut C, 3067 arg0: &VecMInstBuilder, 3068 arg1: &Cond, 3069 ) -> Option<Unit> { 3070 let pattern0_0 = arg0; 3071 let pattern1_0 = arg1; 3072 // Rule at src/isa/s390x/inst.isle line 1836. 3073 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3074 let expr1_0 = MInst::Loop { 3075 body: expr0_0, 3076 cond: pattern1_0.clone(), 3077 }; 3078 let expr2_0 = C::emit(ctx, &expr1_0); 3079 return Some(expr2_0); 3080 } 3081 3082 // Generated as internal constructor for term emit_mov. 3083 pub fn constructor_emit_mov<C: Context>( 3084 ctx: &mut C, 3085 arg0: Type, 3086 arg1: WritableReg, 3087 arg2: Reg, 3088 ) -> Option<Unit> { 3089 let pattern0_0 = arg0; 3090 if pattern0_0 == F32 { 3091 let pattern2_0 = arg1; 3092 let pattern3_0 = arg2; 3093 // Rule at src/isa/s390x/inst.isle line 1851. 3094 let expr0_0 = MInst::FpuMove32 { 3095 rd: pattern2_0, 3096 rn: pattern3_0, 3097 }; 3098 let expr1_0 = C::emit(ctx, &expr0_0); 3099 return Some(expr1_0); 3100 } 3101 if pattern0_0 == F64 { 3102 let pattern2_0 = arg1; 3103 let pattern3_0 = arg2; 3104 // Rule at src/isa/s390x/inst.isle line 1854. 3105 let expr0_0 = MInst::FpuMove64 { 3106 rd: pattern2_0, 3107 rn: pattern3_0, 3108 }; 3109 let expr1_0 = C::emit(ctx, &expr0_0); 3110 return Some(expr1_0); 3111 } 3112 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3113 let pattern2_0 = arg1; 3114 let pattern3_0 = arg2; 3115 // Rule at src/isa/s390x/inst.isle line 1845. 3116 let expr0_0 = MInst::Mov32 { 3117 rd: pattern2_0, 3118 rm: pattern3_0, 3119 }; 3120 let expr1_0 = C::emit(ctx, &expr0_0); 3121 return Some(expr1_0); 3122 } 3123 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3124 let pattern2_0 = arg1; 3125 let pattern3_0 = arg2; 3126 // Rule at src/isa/s390x/inst.isle line 1848. 3127 let expr0_0 = MInst::Mov64 { 3128 rd: pattern2_0, 3129 rm: pattern3_0, 3130 }; 3131 let expr1_0 = C::emit(ctx, &expr0_0); 3132 return Some(expr1_0); 3133 } 3134 return None; 3135 } 3136 3137 // Generated as internal constructor for term copy_writable_reg. 3138 pub fn constructor_copy_writable_reg<C: Context>( 3139 ctx: &mut C, 3140 arg0: Type, 3141 arg1: Reg, 3142 ) -> Option<WritableReg> { 3143 let pattern0_0 = arg0; 3144 let pattern1_0 = arg1; 3145 // Rule at src/isa/s390x/inst.isle line 1859. 3146 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3147 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3148 return Some(expr0_0); 3149 } 3150 3151 // Generated as internal constructor for term copy_reg. 3152 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3153 let pattern0_0 = arg0; 3154 let pattern1_0 = arg1; 3155 // Rule at src/isa/s390x/inst.isle line 1866. 3156 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3157 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3158 return Some(expr1_0); 3159 } 3160 3161 // Generated as internal constructor for term emit_load. 3162 pub fn constructor_emit_load<C: Context>( 3163 ctx: &mut C, 3164 arg0: Type, 3165 arg1: WritableReg, 3166 arg2: &MemArg, 3167 ) -> Option<Unit> { 3168 let pattern0_0 = arg0; 3169 if pattern0_0 == I32 { 3170 let pattern2_0 = arg1; 3171 let pattern3_0 = arg2; 3172 // Rule at src/isa/s390x/inst.isle line 1870. 3173 let expr0_0 = MInst::Load32 { 3174 rd: pattern2_0, 3175 mem: pattern3_0.clone(), 3176 }; 3177 let expr1_0 = C::emit(ctx, &expr0_0); 3178 return Some(expr1_0); 3179 } 3180 if pattern0_0 == I64 { 3181 let pattern2_0 = arg1; 3182 let pattern3_0 = arg2; 3183 // Rule at src/isa/s390x/inst.isle line 1872. 3184 let expr0_0 = MInst::Load64 { 3185 rd: pattern2_0, 3186 mem: pattern3_0.clone(), 3187 }; 3188 let expr1_0 = C::emit(ctx, &expr0_0); 3189 return Some(expr1_0); 3190 } 3191 return None; 3192 } 3193 3194 // Generated as internal constructor for term emit_imm. 3195 pub fn constructor_emit_imm<C: Context>( 3196 ctx: &mut C, 3197 arg0: Type, 3198 arg1: WritableReg, 3199 arg2: u64, 3200 ) -> Option<Unit> { 3201 let pattern0_0 = arg0; 3202 if pattern0_0 == F32 { 3203 let pattern2_0 = arg1; 3204 let pattern3_0 = arg2; 3205 // Rule at src/isa/s390x/inst.isle line 1928. 3206 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3207 let expr1_0 = MInst::LoadFpuConst32 { 3208 rd: pattern2_0, 3209 const_data: expr0_0, 3210 }; 3211 let expr2_0 = C::emit(ctx, &expr1_0); 3212 return Some(expr2_0); 3213 } 3214 if pattern0_0 == F64 { 3215 let pattern2_0 = arg1; 3216 let pattern3_0 = arg2; 3217 // Rule at src/isa/s390x/inst.isle line 1933. 3218 let expr0_0 = MInst::LoadFpuConst64 { 3219 rd: pattern2_0, 3220 const_data: pattern3_0, 3221 }; 3222 let expr1_0 = C::emit(ctx, &expr0_0); 3223 return Some(expr1_0); 3224 } 3225 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3226 let pattern2_0 = arg1; 3227 let pattern3_0 = arg2; 3228 // Rule at src/isa/s390x/inst.isle line 1882. 3229 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3230 let expr1_0 = MInst::Mov32SImm16 { 3231 rd: pattern2_0, 3232 imm: expr0_0, 3233 }; 3234 let expr2_0 = C::emit(ctx, &expr1_0); 3235 return Some(expr2_0); 3236 } 3237 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3238 let pattern2_0 = arg1; 3239 let pattern3_0 = arg2; 3240 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3241 // Rule at src/isa/s390x/inst.isle line 1886. 3242 let expr0_0 = MInst::Mov32SImm16 { 3243 rd: pattern2_0, 3244 imm: pattern4_0, 3245 }; 3246 let expr1_0 = C::emit(ctx, &expr0_0); 3247 return Some(expr1_0); 3248 } 3249 // Rule at src/isa/s390x/inst.isle line 1890. 3250 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3251 let expr1_0 = MInst::Mov32Imm { 3252 rd: pattern2_0, 3253 imm: expr0_0, 3254 }; 3255 let expr2_0 = C::emit(ctx, &expr1_0); 3256 return Some(expr2_0); 3257 } 3258 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3259 let pattern2_0 = arg1; 3260 let pattern3_0 = arg2; 3261 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3262 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3263 // Rule at src/isa/s390x/inst.isle line 1910. 3264 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3265 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3266 return Some(expr1_0); 3267 } 3268 } 3269 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3270 // Rule at src/isa/s390x/inst.isle line 1894. 3271 let expr0_0 = MInst::Mov64SImm16 { 3272 rd: pattern2_0, 3273 imm: pattern4_0, 3274 }; 3275 let expr1_0 = C::emit(ctx, &expr0_0); 3276 return Some(expr1_0); 3277 } 3278 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3279 // Rule at src/isa/s390x/inst.isle line 1898. 3280 let expr0_0 = MInst::Mov64SImm32 { 3281 rd: pattern2_0, 3282 imm: pattern4_0, 3283 }; 3284 let expr1_0 = C::emit(ctx, &expr0_0); 3285 return Some(expr1_0); 3286 } 3287 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3288 // Rule at src/isa/s390x/inst.isle line 1906. 3289 let expr0_0 = MInst::Mov64UImm32Shifted { 3290 rd: pattern2_0, 3291 imm: pattern4_0, 3292 }; 3293 let expr1_0 = C::emit(ctx, &expr0_0); 3294 return Some(expr1_0); 3295 } 3296 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3297 // Rule at src/isa/s390x/inst.isle line 1902. 3298 let expr0_0 = MInst::Mov64UImm16Shifted { 3299 rd: pattern2_0, 3300 imm: pattern4_0, 3301 }; 3302 let expr1_0 = C::emit(ctx, &expr0_0); 3303 return Some(expr1_0); 3304 } 3305 } 3306 return None; 3307 } 3308 3309 // Generated as internal constructor for term emit_insert_imm. 3310 pub fn constructor_emit_insert_imm<C: Context>( 3311 ctx: &mut C, 3312 arg0: WritableReg, 3313 arg1: u64, 3314 ) -> Option<Unit> { 3315 let pattern0_0 = arg0; 3316 let pattern1_0 = arg1; 3317 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3318 // Rule at src/isa/s390x/inst.isle line 1923. 3319 let expr0_0 = MInst::Insert64UImm32Shifted { 3320 rd: pattern0_0, 3321 imm: pattern2_0, 3322 }; 3323 let expr1_0 = C::emit(ctx, &expr0_0); 3324 return Some(expr1_0); 3325 } 3326 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3327 // Rule at src/isa/s390x/inst.isle line 1919. 3328 let expr0_0 = MInst::Insert64UImm16Shifted { 3329 rd: pattern0_0, 3330 imm: pattern2_0, 3331 }; 3332 let expr1_0 = C::emit(ctx, &expr0_0); 3333 return Some(expr1_0); 3334 } 3335 return None; 3336 } 3337 3338 // Generated as internal constructor for term imm. 3339 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3340 let pattern0_0 = arg0; 3341 let pattern1_0 = arg1; 3342 // Rule at src/isa/s390x/inst.isle line 1938. 3343 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3344 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3345 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3346 return Some(expr2_0); 3347 } 3348 3349 // Generated as internal constructor for term imm_regpair_lo. 3350 pub fn constructor_imm_regpair_lo<C: Context>( 3351 ctx: &mut C, 3352 arg0: Type, 3353 arg1: u64, 3354 arg2: &RegPair, 3355 ) -> Option<RegPair> { 3356 let pattern0_0 = arg0; 3357 let pattern1_0 = arg1; 3358 let pattern2_0 = arg2; 3359 // Rule at src/isa/s390x/inst.isle line 1946. 3360 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3361 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3362 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3363 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3364 return Some(expr3_0); 3365 } 3366 3367 // Generated as internal constructor for term imm_regpair_hi. 3368 pub fn constructor_imm_regpair_hi<C: Context>( 3369 ctx: &mut C, 3370 arg0: Type, 3371 arg1: u64, 3372 arg2: &RegPair, 3373 ) -> Option<RegPair> { 3374 let pattern0_0 = arg0; 3375 let pattern1_0 = arg1; 3376 let pattern2_0 = arg2; 3377 // Rule at src/isa/s390x/inst.isle line 1954. 3378 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3379 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3380 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3381 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3382 return Some(expr3_0); 3383 } 3384 3385 // Generated as internal constructor for term ty_ext32. 3386 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3387 let pattern0_0 = arg0; 3388 if pattern0_0 == I8 { 3389 // Rule at src/isa/s390x/inst.isle line 1964. 3390 let expr0_0: Type = I32; 3391 return Some(expr0_0); 3392 } 3393 if pattern0_0 == I16 { 3394 // Rule at src/isa/s390x/inst.isle line 1965. 3395 let expr0_0: Type = I32; 3396 return Some(expr0_0); 3397 } 3398 if pattern0_0 == I32 { 3399 // Rule at src/isa/s390x/inst.isle line 1966. 3400 let expr0_0: Type = I32; 3401 return Some(expr0_0); 3402 } 3403 if pattern0_0 == I64 { 3404 // Rule at src/isa/s390x/inst.isle line 1967. 3405 let expr0_0: Type = I64; 3406 return Some(expr0_0); 3407 } 3408 return None; 3409 } 3410 3411 // Generated as internal constructor for term ty_ext64. 3412 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3413 let pattern0_0 = arg0; 3414 if pattern0_0 == I8 { 3415 // Rule at src/isa/s390x/inst.isle line 1971. 3416 let expr0_0: Type = I64; 3417 return Some(expr0_0); 3418 } 3419 if pattern0_0 == I16 { 3420 // Rule at src/isa/s390x/inst.isle line 1972. 3421 let expr0_0: Type = I64; 3422 return Some(expr0_0); 3423 } 3424 if pattern0_0 == I32 { 3425 // Rule at src/isa/s390x/inst.isle line 1973. 3426 let expr0_0: Type = I64; 3427 return Some(expr0_0); 3428 } 3429 if pattern0_0 == I64 { 3430 // Rule at src/isa/s390x/inst.isle line 1974. 3431 let expr0_0: Type = I64; 3432 return Some(expr0_0); 3433 } 3434 return None; 3435 } 3436 3437 // Generated as internal constructor for term emit_zext32_reg. 3438 pub fn constructor_emit_zext32_reg<C: Context>( 3439 ctx: &mut C, 3440 arg0: WritableReg, 3441 arg1: Type, 3442 arg2: Reg, 3443 ) -> Option<Unit> { 3444 let pattern0_0 = arg0; 3445 let pattern1_0 = arg1; 3446 let pattern2_0 = arg2; 3447 // Rule at src/isa/s390x/inst.isle line 1979. 3448 let expr0_0: bool = false; 3449 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3450 let expr2_0: u8 = 32; 3451 let expr3_0 = MInst::Extend { 3452 rd: pattern0_0, 3453 rn: pattern2_0, 3454 signed: expr0_0, 3455 from_bits: expr1_0, 3456 to_bits: expr2_0, 3457 }; 3458 let expr4_0 = C::emit(ctx, &expr3_0); 3459 return Some(expr4_0); 3460 } 3461 3462 // Generated as internal constructor for term emit_sext32_reg. 3463 pub fn constructor_emit_sext32_reg<C: Context>( 3464 ctx: &mut C, 3465 arg0: WritableReg, 3466 arg1: Type, 3467 arg2: Reg, 3468 ) -> Option<Unit> { 3469 let pattern0_0 = arg0; 3470 let pattern1_0 = arg1; 3471 let pattern2_0 = arg2; 3472 // Rule at src/isa/s390x/inst.isle line 1985. 3473 let expr0_0: bool = true; 3474 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3475 let expr2_0: u8 = 32; 3476 let expr3_0 = MInst::Extend { 3477 rd: pattern0_0, 3478 rn: pattern2_0, 3479 signed: expr0_0, 3480 from_bits: expr1_0, 3481 to_bits: expr2_0, 3482 }; 3483 let expr4_0 = C::emit(ctx, &expr3_0); 3484 return Some(expr4_0); 3485 } 3486 3487 // Generated as internal constructor for term emit_zext64_reg. 3488 pub fn constructor_emit_zext64_reg<C: Context>( 3489 ctx: &mut C, 3490 arg0: WritableReg, 3491 arg1: Type, 3492 arg2: Reg, 3493 ) -> Option<Unit> { 3494 let pattern0_0 = arg0; 3495 let pattern1_0 = arg1; 3496 let pattern2_0 = arg2; 3497 // Rule at src/isa/s390x/inst.isle line 1991. 3498 let expr0_0: bool = false; 3499 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3500 let expr2_0: u8 = 64; 3501 let expr3_0 = MInst::Extend { 3502 rd: pattern0_0, 3503 rn: pattern2_0, 3504 signed: expr0_0, 3505 from_bits: expr1_0, 3506 to_bits: expr2_0, 3507 }; 3508 let expr4_0 = C::emit(ctx, &expr3_0); 3509 return Some(expr4_0); 3510 } 3511 3512 // Generated as internal constructor for term emit_sext64_reg. 3513 pub fn constructor_emit_sext64_reg<C: Context>( 3514 ctx: &mut C, 3515 arg0: WritableReg, 3516 arg1: Type, 3517 arg2: Reg, 3518 ) -> Option<Unit> { 3519 let pattern0_0 = arg0; 3520 let pattern1_0 = arg1; 3521 let pattern2_0 = arg2; 3522 // Rule at src/isa/s390x/inst.isle line 1997. 3523 let expr0_0: bool = true; 3524 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3525 let expr2_0: u8 = 64; 3526 let expr3_0 = MInst::Extend { 3527 rd: pattern0_0, 3528 rn: pattern2_0, 3529 signed: expr0_0, 3530 from_bits: expr1_0, 3531 to_bits: expr2_0, 3532 }; 3533 let expr4_0 = C::emit(ctx, &expr3_0); 3534 return Some(expr4_0); 3535 } 3536 3537 // Generated as internal constructor for term zext32_reg. 3538 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3539 let pattern0_0 = arg0; 3540 let pattern1_0 = arg1; 3541 // Rule at src/isa/s390x/inst.isle line 2003. 3542 let expr0_0: Type = I32; 3543 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3544 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3545 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3546 return Some(expr3_0); 3547 } 3548 3549 // Generated as internal constructor for term sext32_reg. 3550 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3551 let pattern0_0 = arg0; 3552 let pattern1_0 = arg1; 3553 // Rule at src/isa/s390x/inst.isle line 2011. 3554 let expr0_0: Type = I32; 3555 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3556 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3557 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3558 return Some(expr3_0); 3559 } 3560 3561 // Generated as internal constructor for term zext64_reg. 3562 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3563 let pattern0_0 = arg0; 3564 let pattern1_0 = arg1; 3565 // Rule at src/isa/s390x/inst.isle line 2019. 3566 let expr0_0: Type = I64; 3567 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3568 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3569 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3570 return Some(expr3_0); 3571 } 3572 3573 // Generated as internal constructor for term sext64_reg. 3574 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3575 let pattern0_0 = arg0; 3576 let pattern1_0 = arg1; 3577 // Rule at src/isa/s390x/inst.isle line 2027. 3578 let expr0_0: Type = I64; 3579 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3580 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3581 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3582 return Some(expr3_0); 3583 } 3584 3585 // Generated as internal constructor for term emit_zext32_mem. 3586 pub fn constructor_emit_zext32_mem<C: Context>( 3587 ctx: &mut C, 3588 arg0: WritableReg, 3589 arg1: Type, 3590 arg2: &MemArg, 3591 ) -> Option<Unit> { 3592 let pattern0_0 = arg0; 3593 let pattern1_0 = arg1; 3594 if pattern1_0 == I8 { 3595 let pattern3_0 = arg2; 3596 // Rule at src/isa/s390x/inst.isle line 2035. 3597 let expr0_0 = MInst::Load32ZExt8 { 3598 rd: pattern0_0, 3599 mem: pattern3_0.clone(), 3600 }; 3601 let expr1_0 = C::emit(ctx, &expr0_0); 3602 return Some(expr1_0); 3603 } 3604 if pattern1_0 == I16 { 3605 let pattern3_0 = arg2; 3606 // Rule at src/isa/s390x/inst.isle line 2036. 3607 let expr0_0 = MInst::Load32ZExt16 { 3608 rd: pattern0_0, 3609 mem: pattern3_0.clone(), 3610 }; 3611 let expr1_0 = C::emit(ctx, &expr0_0); 3612 return Some(expr1_0); 3613 } 3614 return None; 3615 } 3616 3617 // Generated as internal constructor for term emit_sext32_mem. 3618 pub fn constructor_emit_sext32_mem<C: Context>( 3619 ctx: &mut C, 3620 arg0: WritableReg, 3621 arg1: Type, 3622 arg2: &MemArg, 3623 ) -> Option<Unit> { 3624 let pattern0_0 = arg0; 3625 let pattern1_0 = arg1; 3626 if pattern1_0 == I8 { 3627 let pattern3_0 = arg2; 3628 // Rule at src/isa/s390x/inst.isle line 2040. 3629 let expr0_0 = MInst::Load32SExt8 { 3630 rd: pattern0_0, 3631 mem: pattern3_0.clone(), 3632 }; 3633 let expr1_0 = C::emit(ctx, &expr0_0); 3634 return Some(expr1_0); 3635 } 3636 if pattern1_0 == I16 { 3637 let pattern3_0 = arg2; 3638 // Rule at src/isa/s390x/inst.isle line 2041. 3639 let expr0_0 = MInst::Load32SExt16 { 3640 rd: pattern0_0, 3641 mem: pattern3_0.clone(), 3642 }; 3643 let expr1_0 = C::emit(ctx, &expr0_0); 3644 return Some(expr1_0); 3645 } 3646 return None; 3647 } 3648 3649 // Generated as internal constructor for term emit_zext64_mem. 3650 pub fn constructor_emit_zext64_mem<C: Context>( 3651 ctx: &mut C, 3652 arg0: WritableReg, 3653 arg1: Type, 3654 arg2: &MemArg, 3655 ) -> Option<Unit> { 3656 let pattern0_0 = arg0; 3657 let pattern1_0 = arg1; 3658 if pattern1_0 == I8 { 3659 let pattern3_0 = arg2; 3660 // Rule at src/isa/s390x/inst.isle line 2045. 3661 let expr0_0 = MInst::Load64ZExt8 { 3662 rd: pattern0_0, 3663 mem: pattern3_0.clone(), 3664 }; 3665 let expr1_0 = C::emit(ctx, &expr0_0); 3666 return Some(expr1_0); 3667 } 3668 if pattern1_0 == I16 { 3669 let pattern3_0 = arg2; 3670 // Rule at src/isa/s390x/inst.isle line 2046. 3671 let expr0_0 = MInst::Load64ZExt16 { 3672 rd: pattern0_0, 3673 mem: pattern3_0.clone(), 3674 }; 3675 let expr1_0 = C::emit(ctx, &expr0_0); 3676 return Some(expr1_0); 3677 } 3678 if pattern1_0 == I32 { 3679 let pattern3_0 = arg2; 3680 // Rule at src/isa/s390x/inst.isle line 2047. 3681 let expr0_0 = MInst::Load64ZExt32 { 3682 rd: pattern0_0, 3683 mem: pattern3_0.clone(), 3684 }; 3685 let expr1_0 = C::emit(ctx, &expr0_0); 3686 return Some(expr1_0); 3687 } 3688 return None; 3689 } 3690 3691 // Generated as internal constructor for term emit_sext64_mem. 3692 pub fn constructor_emit_sext64_mem<C: Context>( 3693 ctx: &mut C, 3694 arg0: WritableReg, 3695 arg1: Type, 3696 arg2: &MemArg, 3697 ) -> Option<Unit> { 3698 let pattern0_0 = arg0; 3699 let pattern1_0 = arg1; 3700 if pattern1_0 == I8 { 3701 let pattern3_0 = arg2; 3702 // Rule at src/isa/s390x/inst.isle line 2051. 3703 let expr0_0 = MInst::Load64SExt8 { 3704 rd: pattern0_0, 3705 mem: pattern3_0.clone(), 3706 }; 3707 let expr1_0 = C::emit(ctx, &expr0_0); 3708 return Some(expr1_0); 3709 } 3710 if pattern1_0 == I16 { 3711 let pattern3_0 = arg2; 3712 // Rule at src/isa/s390x/inst.isle line 2052. 3713 let expr0_0 = MInst::Load64SExt16 { 3714 rd: pattern0_0, 3715 mem: pattern3_0.clone(), 3716 }; 3717 let expr1_0 = C::emit(ctx, &expr0_0); 3718 return Some(expr1_0); 3719 } 3720 if pattern1_0 == I32 { 3721 let pattern3_0 = arg2; 3722 // Rule at src/isa/s390x/inst.isle line 2053. 3723 let expr0_0 = MInst::Load64SExt32 { 3724 rd: pattern0_0, 3725 mem: pattern3_0.clone(), 3726 }; 3727 let expr1_0 = C::emit(ctx, &expr0_0); 3728 return Some(expr1_0); 3729 } 3730 return None; 3731 } 3732 3733 // Generated as internal constructor for term zext32_mem. 3734 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3735 let pattern0_0 = arg0; 3736 let pattern1_0 = arg1; 3737 // Rule at src/isa/s390x/inst.isle line 2057. 3738 let expr0_0: Type = I32; 3739 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3740 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3741 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3742 return Some(expr3_0); 3743 } 3744 3745 // Generated as internal constructor for term sext32_mem. 3746 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3747 let pattern0_0 = arg0; 3748 let pattern1_0 = arg1; 3749 // Rule at src/isa/s390x/inst.isle line 2064. 3750 let expr0_0: Type = I32; 3751 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3752 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3753 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3754 return Some(expr3_0); 3755 } 3756 3757 // Generated as internal constructor for term zext64_mem. 3758 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3759 let pattern0_0 = arg0; 3760 let pattern1_0 = arg1; 3761 // Rule at src/isa/s390x/inst.isle line 2071. 3762 let expr0_0: Type = I64; 3763 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3764 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3765 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3766 return Some(expr3_0); 3767 } 3768 3769 // Generated as internal constructor for term sext64_mem. 3770 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3771 let pattern0_0 = arg0; 3772 let pattern1_0 = arg1; 3773 // Rule at src/isa/s390x/inst.isle line 2078. 3774 let expr0_0: Type = I64; 3775 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3776 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3777 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3778 return Some(expr3_0); 3779 } 3780 3781 // Generated as internal constructor for term emit_put_in_reg_zext32. 3782 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3783 ctx: &mut C, 3784 arg0: WritableReg, 3785 arg1: Value, 3786 ) -> Option<Unit> { 3787 let pattern0_0 = arg0; 3788 let pattern1_0 = arg1; 3789 let pattern2_0 = C::value_type(ctx, pattern1_0); 3790 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3791 // Rule at src/isa/s390x/inst.isle line 2086. 3792 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3793 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3794 return Some(expr1_0); 3795 } 3796 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3797 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3798 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3799 if let &InstructionData::Load { 3800 opcode: ref pattern6_0, 3801 arg: pattern6_1, 3802 flags: pattern6_2, 3803 offset: pattern6_3, 3804 } = &pattern5_0 3805 { 3806 if let &Opcode::Load = pattern6_0 { 3807 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3808 // Rule at src/isa/s390x/inst.isle line 2088. 3809 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3810 let expr1_0 = 3811 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3812 return Some(expr1_0); 3813 } 3814 } 3815 } 3816 } 3817 // Rule at src/isa/s390x/inst.isle line 2090. 3818 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3819 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3820 return Some(expr1_0); 3821 } 3822 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3823 // Rule at src/isa/s390x/inst.isle line 2092. 3824 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3825 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3826 return Some(expr1_0); 3827 } 3828 return None; 3829 } 3830 3831 // Generated as internal constructor for term emit_put_in_reg_sext32. 3832 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3833 ctx: &mut C, 3834 arg0: WritableReg, 3835 arg1: Value, 3836 ) -> Option<Unit> { 3837 let pattern0_0 = arg0; 3838 let pattern1_0 = arg1; 3839 let pattern2_0 = C::value_type(ctx, pattern1_0); 3840 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3841 // Rule at src/isa/s390x/inst.isle line 2097. 3842 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3843 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3844 return Some(expr1_0); 3845 } 3846 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3847 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3848 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3849 if let &InstructionData::Load { 3850 opcode: ref pattern6_0, 3851 arg: pattern6_1, 3852 flags: pattern6_2, 3853 offset: pattern6_3, 3854 } = &pattern5_0 3855 { 3856 if let &Opcode::Load = pattern6_0 { 3857 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3858 // Rule at src/isa/s390x/inst.isle line 2099. 3859 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3860 let expr1_0 = 3861 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3862 return Some(expr1_0); 3863 } 3864 } 3865 } 3866 } 3867 // Rule at src/isa/s390x/inst.isle line 2101. 3868 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3869 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3870 return Some(expr1_0); 3871 } 3872 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3873 // Rule at src/isa/s390x/inst.isle line 2103. 3874 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3875 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3876 return Some(expr1_0); 3877 } 3878 return None; 3879 } 3880 3881 // Generated as internal constructor for term emit_put_in_reg_zext64. 3882 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3883 ctx: &mut C, 3884 arg0: WritableReg, 3885 arg1: Value, 3886 ) -> Option<Unit> { 3887 let pattern0_0 = arg0; 3888 let pattern1_0 = arg1; 3889 let pattern2_0 = C::value_type(ctx, pattern1_0); 3890 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3891 // Rule at src/isa/s390x/inst.isle line 2108. 3892 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3893 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3894 return Some(expr1_0); 3895 } 3896 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3897 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3898 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3899 if let &InstructionData::Load { 3900 opcode: ref pattern6_0, 3901 arg: pattern6_1, 3902 flags: pattern6_2, 3903 offset: pattern6_3, 3904 } = &pattern5_0 3905 { 3906 if let &Opcode::Load = pattern6_0 { 3907 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3908 // Rule at src/isa/s390x/inst.isle line 2110. 3909 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3910 let expr1_0 = 3911 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3912 return Some(expr1_0); 3913 } 3914 } 3915 } 3916 } 3917 // Rule at src/isa/s390x/inst.isle line 2112. 3918 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3919 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3920 return Some(expr1_0); 3921 } 3922 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3923 // Rule at src/isa/s390x/inst.isle line 2114. 3924 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3925 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3926 return Some(expr1_0); 3927 } 3928 return None; 3929 } 3930 3931 // Generated as internal constructor for term emit_put_in_reg_sext64. 3932 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3933 ctx: &mut C, 3934 arg0: WritableReg, 3935 arg1: Value, 3936 ) -> Option<Unit> { 3937 let pattern0_0 = arg0; 3938 let pattern1_0 = arg1; 3939 let pattern2_0 = C::value_type(ctx, pattern1_0); 3940 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3941 // Rule at src/isa/s390x/inst.isle line 2119. 3942 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3943 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3944 return Some(expr1_0); 3945 } 3946 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3947 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3948 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3949 if let &InstructionData::Load { 3950 opcode: ref pattern6_0, 3951 arg: pattern6_1, 3952 flags: pattern6_2, 3953 offset: pattern6_3, 3954 } = &pattern5_0 3955 { 3956 if let &Opcode::Load = pattern6_0 { 3957 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3958 // Rule at src/isa/s390x/inst.isle line 2121. 3959 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3960 let expr1_0 = 3961 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3962 return Some(expr1_0); 3963 } 3964 } 3965 } 3966 } 3967 // Rule at src/isa/s390x/inst.isle line 2123. 3968 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3969 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3970 return Some(expr1_0); 3971 } 3972 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3973 // Rule at src/isa/s390x/inst.isle line 2125. 3974 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3975 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3976 return Some(expr1_0); 3977 } 3978 return None; 3979 } 3980 3981 // Generated as internal constructor for term put_in_reg_zext32. 3982 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3983 let pattern0_0 = arg0; 3984 let pattern1_0 = C::value_type(ctx, pattern0_0); 3985 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3986 // Rule at src/isa/s390x/inst.isle line 2130. 3987 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3988 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3989 return Some(expr1_0); 3990 } 3991 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3992 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3993 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3994 if let &InstructionData::Load { 3995 opcode: ref pattern5_0, 3996 arg: pattern5_1, 3997 flags: pattern5_2, 3998 offset: pattern5_3, 3999 } = &pattern4_0 4000 { 4001 if let &Opcode::Load = pattern5_0 { 4002 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4003 // Rule at src/isa/s390x/inst.isle line 2132. 4004 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4005 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4006 return Some(expr1_0); 4007 } 4008 } 4009 } 4010 } 4011 // Rule at src/isa/s390x/inst.isle line 2134. 4012 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4013 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4014 return Some(expr1_0); 4015 } 4016 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4017 // Rule at src/isa/s390x/inst.isle line 2136. 4018 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4019 return Some(expr0_0); 4020 } 4021 return None; 4022 } 4023 4024 // Generated as internal constructor for term put_in_reg_sext32. 4025 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4026 let pattern0_0 = arg0; 4027 let pattern1_0 = C::value_type(ctx, pattern0_0); 4028 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4029 // Rule at src/isa/s390x/inst.isle line 2141. 4030 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4031 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4032 return Some(expr1_0); 4033 } 4034 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4035 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4036 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4037 if let &InstructionData::Load { 4038 opcode: ref pattern5_0, 4039 arg: pattern5_1, 4040 flags: pattern5_2, 4041 offset: pattern5_3, 4042 } = &pattern4_0 4043 { 4044 if let &Opcode::Load = pattern5_0 { 4045 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4046 // Rule at src/isa/s390x/inst.isle line 2143. 4047 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4048 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4049 return Some(expr1_0); 4050 } 4051 } 4052 } 4053 } 4054 // Rule at src/isa/s390x/inst.isle line 2145. 4055 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4056 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4057 return Some(expr1_0); 4058 } 4059 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4060 // Rule at src/isa/s390x/inst.isle line 2147. 4061 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4062 return Some(expr0_0); 4063 } 4064 return None; 4065 } 4066 4067 // Generated as internal constructor for term put_in_reg_zext64. 4068 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4069 let pattern0_0 = arg0; 4070 let pattern1_0 = C::value_type(ctx, pattern0_0); 4071 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4072 // Rule at src/isa/s390x/inst.isle line 2152. 4073 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4074 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4075 return Some(expr1_0); 4076 } 4077 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4078 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4079 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4080 if let &InstructionData::Load { 4081 opcode: ref pattern5_0, 4082 arg: pattern5_1, 4083 flags: pattern5_2, 4084 offset: pattern5_3, 4085 } = &pattern4_0 4086 { 4087 if let &Opcode::Load = pattern5_0 { 4088 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4089 // Rule at src/isa/s390x/inst.isle line 2154. 4090 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4091 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4092 return Some(expr1_0); 4093 } 4094 } 4095 } 4096 } 4097 // Rule at src/isa/s390x/inst.isle line 2156. 4098 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4099 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4100 return Some(expr1_0); 4101 } 4102 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4103 // Rule at src/isa/s390x/inst.isle line 2158. 4104 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4105 return Some(expr0_0); 4106 } 4107 return None; 4108 } 4109 4110 // Generated as internal constructor for term put_in_reg_sext64. 4111 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4112 let pattern0_0 = arg0; 4113 let pattern1_0 = C::value_type(ctx, pattern0_0); 4114 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4115 // Rule at src/isa/s390x/inst.isle line 2163. 4116 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4117 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4118 return Some(expr1_0); 4119 } 4120 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4121 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4122 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4123 if let &InstructionData::Load { 4124 opcode: ref pattern5_0, 4125 arg: pattern5_1, 4126 flags: pattern5_2, 4127 offset: pattern5_3, 4128 } = &pattern4_0 4129 { 4130 if let &Opcode::Load = pattern5_0 { 4131 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4132 // Rule at src/isa/s390x/inst.isle line 2165. 4133 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4134 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4135 return Some(expr1_0); 4136 } 4137 } 4138 } 4139 } 4140 // Rule at src/isa/s390x/inst.isle line 2167. 4141 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4142 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4143 return Some(expr1_0); 4144 } 4145 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4146 // Rule at src/isa/s390x/inst.isle line 2169. 4147 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4148 return Some(expr0_0); 4149 } 4150 return None; 4151 } 4152 4153 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4154 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4155 ctx: &mut C, 4156 arg0: Value, 4157 arg1: &RegPair, 4158 ) -> Option<RegPair> { 4159 let pattern0_0 = arg0; 4160 let pattern1_0 = arg1; 4161 // Rule at src/isa/s390x/inst.isle line 2175. 4162 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4163 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4164 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4165 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4166 return Some(expr3_0); 4167 } 4168 4169 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4170 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4171 ctx: &mut C, 4172 arg0: Value, 4173 arg1: &RegPair, 4174 ) -> Option<RegPair> { 4175 let pattern0_0 = arg0; 4176 let pattern1_0 = arg1; 4177 // Rule at src/isa/s390x/inst.isle line 2183. 4178 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4179 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4180 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4181 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4182 return Some(expr3_0); 4183 } 4184 4185 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4186 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4187 ctx: &mut C, 4188 arg0: Value, 4189 arg1: &RegPair, 4190 ) -> Option<RegPair> { 4191 let pattern0_0 = arg0; 4192 let pattern1_0 = arg1; 4193 // Rule at src/isa/s390x/inst.isle line 2191. 4194 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4195 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4196 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4197 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4198 return Some(expr3_0); 4199 } 4200 4201 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4202 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4203 ctx: &mut C, 4204 arg0: Value, 4205 arg1: &RegPair, 4206 ) -> Option<RegPair> { 4207 let pattern0_0 = arg0; 4208 let pattern1_0 = arg1; 4209 // Rule at src/isa/s390x/inst.isle line 2199. 4210 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4211 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4212 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4213 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4214 return Some(expr3_0); 4215 } 4216 4217 // Generated as internal constructor for term emit_cmov_imm. 4218 pub fn constructor_emit_cmov_imm<C: Context>( 4219 ctx: &mut C, 4220 arg0: Type, 4221 arg1: WritableReg, 4222 arg2: &Cond, 4223 arg3: i16, 4224 ) -> Option<ConsumesFlags> { 4225 let pattern0_0 = arg0; 4226 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4227 let pattern2_0 = arg1; 4228 let pattern3_0 = arg2; 4229 let pattern4_0 = arg3; 4230 // Rule at src/isa/s390x/inst.isle line 2209. 4231 let expr0_0 = MInst::CMov32SImm16 { 4232 rd: pattern2_0, 4233 cond: pattern3_0.clone(), 4234 imm: pattern4_0, 4235 }; 4236 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4237 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4238 inst: expr0_0, 4239 result: expr1_0, 4240 }; 4241 return Some(expr2_0); 4242 } 4243 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4244 let pattern2_0 = arg1; 4245 let pattern3_0 = arg2; 4246 let pattern4_0 = arg3; 4247 // Rule at src/isa/s390x/inst.isle line 2212. 4248 let expr0_0 = MInst::CMov64SImm16 { 4249 rd: pattern2_0, 4250 cond: pattern3_0.clone(), 4251 imm: pattern4_0, 4252 }; 4253 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4254 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4255 inst: expr0_0, 4256 result: expr1_0, 4257 }; 4258 return Some(expr2_0); 4259 } 4260 return None; 4261 } 4262 4263 // Generated as internal constructor for term cmov_imm. 4264 pub fn constructor_cmov_imm<C: Context>( 4265 ctx: &mut C, 4266 arg0: Type, 4267 arg1: &Cond, 4268 arg2: i16, 4269 arg3: Reg, 4270 ) -> Option<ConsumesFlags> { 4271 let pattern0_0 = arg0; 4272 let pattern1_0 = arg1; 4273 let pattern2_0 = arg2; 4274 let pattern3_0 = arg3; 4275 // Rule at src/isa/s390x/inst.isle line 2218. 4276 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4277 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4278 return Some(expr1_0); 4279 } 4280 4281 // Generated as internal constructor for term cmov_imm_regpair_lo. 4282 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4283 ctx: &mut C, 4284 arg0: Type, 4285 arg1: &ProducesFlags, 4286 arg2: &Cond, 4287 arg3: i16, 4288 arg4: &RegPair, 4289 ) -> Option<RegPair> { 4290 let pattern0_0 = arg0; 4291 let pattern1_0 = arg1; 4292 let pattern2_0 = arg2; 4293 let pattern3_0 = arg3; 4294 let pattern4_0 = arg4; 4295 // Rule at src/isa/s390x/inst.isle line 2225. 4296 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4297 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4298 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4299 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4300 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4301 return Some(expr4_0); 4302 } 4303 4304 // Generated as internal constructor for term cmov_imm_regpair_hi. 4305 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4306 ctx: &mut C, 4307 arg0: Type, 4308 arg1: &ProducesFlags, 4309 arg2: &Cond, 4310 arg3: i16, 4311 arg4: &RegPair, 4312 ) -> Option<RegPair> { 4313 let pattern0_0 = arg0; 4314 let pattern1_0 = arg1; 4315 let pattern2_0 = arg2; 4316 let pattern3_0 = arg3; 4317 let pattern4_0 = arg4; 4318 // Rule at src/isa/s390x/inst.isle line 2234. 4319 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4320 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4321 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4322 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4323 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4324 return Some(expr4_0); 4325 } 4326 4327 // Generated as internal constructor for term emit_cmov_reg. 4328 pub fn constructor_emit_cmov_reg<C: Context>( 4329 ctx: &mut C, 4330 arg0: Type, 4331 arg1: WritableReg, 4332 arg2: &Cond, 4333 arg3: Reg, 4334 ) -> Option<ConsumesFlags> { 4335 let pattern0_0 = arg0; 4336 if pattern0_0 == F32 { 4337 let pattern2_0 = arg1; 4338 let pattern3_0 = arg2; 4339 let pattern4_0 = arg3; 4340 // Rule at src/isa/s390x/inst.isle line 2248. 4341 let expr0_0 = MInst::FpuCMov32 { 4342 rd: pattern2_0, 4343 cond: pattern3_0.clone(), 4344 rm: pattern4_0, 4345 }; 4346 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4347 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4348 inst: expr0_0, 4349 result: expr1_0, 4350 }; 4351 return Some(expr2_0); 4352 } 4353 if pattern0_0 == F64 { 4354 let pattern2_0 = arg1; 4355 let pattern3_0 = arg2; 4356 let pattern4_0 = arg3; 4357 // Rule at src/isa/s390x/inst.isle line 2251. 4358 let expr0_0 = MInst::FpuCMov64 { 4359 rd: pattern2_0, 4360 cond: pattern3_0.clone(), 4361 rm: pattern4_0, 4362 }; 4363 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4364 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4365 inst: expr0_0, 4366 result: expr1_0, 4367 }; 4368 return Some(expr2_0); 4369 } 4370 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4371 let pattern2_0 = arg1; 4372 let pattern3_0 = arg2; 4373 let pattern4_0 = arg3; 4374 // Rule at src/isa/s390x/inst.isle line 2242. 4375 let expr0_0 = MInst::CMov32 { 4376 rd: pattern2_0, 4377 cond: pattern3_0.clone(), 4378 rm: pattern4_0, 4379 }; 4380 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4381 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4382 inst: expr0_0, 4383 result: expr1_0, 4384 }; 4385 return Some(expr2_0); 4386 } 4387 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4388 let pattern2_0 = arg1; 4389 let pattern3_0 = arg2; 4390 let pattern4_0 = arg3; 4391 // Rule at src/isa/s390x/inst.isle line 2245. 4392 let expr0_0 = MInst::CMov64 { 4393 rd: pattern2_0, 4394 cond: pattern3_0.clone(), 4395 rm: pattern4_0, 4396 }; 4397 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4398 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4399 inst: expr0_0, 4400 result: expr1_0, 4401 }; 4402 return Some(expr2_0); 4403 } 4404 return None; 4405 } 4406 4407 // Generated as internal constructor for term cmov_reg. 4408 pub fn constructor_cmov_reg<C: Context>( 4409 ctx: &mut C, 4410 arg0: Type, 4411 arg1: &Cond, 4412 arg2: Reg, 4413 arg3: Reg, 4414 ) -> Option<ConsumesFlags> { 4415 let pattern0_0 = arg0; 4416 let pattern1_0 = arg1; 4417 let pattern2_0 = arg2; 4418 let pattern3_0 = arg3; 4419 // Rule at src/isa/s390x/inst.isle line 2257. 4420 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4421 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4422 return Some(expr1_0); 4423 } 4424 4425 // Generated as internal constructor for term trap_if. 4426 pub fn constructor_trap_if<C: Context>( 4427 ctx: &mut C, 4428 arg0: &ProducesFlags, 4429 arg1: &Cond, 4430 arg2: &TrapCode, 4431 ) -> Option<Reg> { 4432 let pattern0_0 = arg0; 4433 match pattern0_0 { 4434 &ProducesFlags::ProducesFlagsSideEffect { 4435 inst: ref pattern1_0, 4436 } => { 4437 let pattern2_0 = arg1; 4438 let pattern3_0 = arg2; 4439 // Rule at src/isa/s390x/inst.isle line 2269. 4440 let expr0_0 = C::emit(ctx, pattern1_0); 4441 let expr1_0 = MInst::TrapIf { 4442 cond: pattern2_0.clone(), 4443 trap_code: pattern3_0.clone(), 4444 }; 4445 let expr2_0 = C::emit(ctx, &expr1_0); 4446 let expr3_0 = C::invalid_reg(ctx); 4447 return Some(expr3_0); 4448 } 4449 &ProducesFlags::ProducesFlagsReturnsReg { 4450 inst: ref pattern1_0, 4451 result: pattern1_1, 4452 } => { 4453 let pattern2_0 = arg1; 4454 let pattern3_0 = arg2; 4455 // Rule at src/isa/s390x/inst.isle line 2265. 4456 let expr0_0 = C::emit(ctx, pattern1_0); 4457 let expr1_0 = MInst::TrapIf { 4458 cond: pattern2_0.clone(), 4459 trap_code: pattern3_0.clone(), 4460 }; 4461 let expr2_0 = C::emit(ctx, &expr1_0); 4462 return Some(pattern1_1); 4463 } 4464 _ => {} 4465 } 4466 return None; 4467 } 4468 4469 // Generated as internal constructor for term icmps_reg_and_trap. 4470 pub fn constructor_icmps_reg_and_trap<C: Context>( 4471 ctx: &mut C, 4472 arg0: Type, 4473 arg1: Reg, 4474 arg2: Reg, 4475 arg3: &Cond, 4476 arg4: &TrapCode, 4477 ) -> Option<Reg> { 4478 let pattern0_0 = arg0; 4479 let pattern1_0 = arg1; 4480 let pattern2_0 = arg2; 4481 let pattern3_0 = arg3; 4482 let pattern4_0 = arg4; 4483 // Rule at src/isa/s390x/inst.isle line 2275. 4484 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4485 let expr1_0 = MInst::CmpTrapRR { 4486 op: expr0_0, 4487 rn: pattern1_0, 4488 rm: pattern2_0, 4489 cond: pattern3_0.clone(), 4490 trap_code: pattern4_0.clone(), 4491 }; 4492 let expr2_0 = C::emit(ctx, &expr1_0); 4493 let expr3_0 = C::invalid_reg(ctx); 4494 return Some(expr3_0); 4495 } 4496 4497 // Generated as internal constructor for term icmps_simm16_and_trap. 4498 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4499 ctx: &mut C, 4500 arg0: Type, 4501 arg1: Reg, 4502 arg2: i16, 4503 arg3: &Cond, 4504 arg4: &TrapCode, 4505 ) -> Option<Reg> { 4506 let pattern0_0 = arg0; 4507 let pattern1_0 = arg1; 4508 let pattern2_0 = arg2; 4509 let pattern3_0 = arg3; 4510 let pattern4_0 = arg4; 4511 // Rule at src/isa/s390x/inst.isle line 2281. 4512 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4513 let expr1_0 = MInst::CmpTrapRSImm16 { 4514 op: expr0_0, 4515 rn: pattern1_0, 4516 imm: pattern2_0, 4517 cond: pattern3_0.clone(), 4518 trap_code: pattern4_0.clone(), 4519 }; 4520 let expr2_0 = C::emit(ctx, &expr1_0); 4521 let expr3_0 = C::invalid_reg(ctx); 4522 return Some(expr3_0); 4523 } 4524 4525 // Generated as internal constructor for term icmpu_reg_and_trap. 4526 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4527 ctx: &mut C, 4528 arg0: Type, 4529 arg1: Reg, 4530 arg2: Reg, 4531 arg3: &Cond, 4532 arg4: &TrapCode, 4533 ) -> Option<Reg> { 4534 let pattern0_0 = arg0; 4535 let pattern1_0 = arg1; 4536 let pattern2_0 = arg2; 4537 let pattern3_0 = arg3; 4538 let pattern4_0 = arg4; 4539 // Rule at src/isa/s390x/inst.isle line 2287. 4540 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4541 let expr1_0 = MInst::CmpTrapRR { 4542 op: expr0_0, 4543 rn: pattern1_0, 4544 rm: pattern2_0, 4545 cond: pattern3_0.clone(), 4546 trap_code: pattern4_0.clone(), 4547 }; 4548 let expr2_0 = C::emit(ctx, &expr1_0); 4549 let expr3_0 = C::invalid_reg(ctx); 4550 return Some(expr3_0); 4551 } 4552 4553 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4554 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4555 ctx: &mut C, 4556 arg0: Type, 4557 arg1: Reg, 4558 arg2: u16, 4559 arg3: &Cond, 4560 arg4: &TrapCode, 4561 ) -> Option<Reg> { 4562 let pattern0_0 = arg0; 4563 let pattern1_0 = arg1; 4564 let pattern2_0 = arg2; 4565 let pattern3_0 = arg3; 4566 let pattern4_0 = arg4; 4567 // Rule at src/isa/s390x/inst.isle line 2293. 4568 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4569 let expr1_0 = MInst::CmpTrapRUImm16 { 4570 op: expr0_0, 4571 rn: pattern1_0, 4572 imm: pattern2_0, 4573 cond: pattern3_0.clone(), 4574 trap_code: pattern4_0.clone(), 4575 }; 4576 let expr2_0 = C::emit(ctx, &expr1_0); 4577 let expr3_0 = C::invalid_reg(ctx); 4578 return Some(expr3_0); 4579 } 4580 4581 // Generated as internal constructor for term trap_impl. 4582 pub fn constructor_trap_impl<C: Context>( 4583 ctx: &mut C, 4584 arg0: &TrapCode, 4585 ) -> Option<SideEffectNoResult> { 4586 let pattern0_0 = arg0; 4587 // Rule at src/isa/s390x/inst.isle line 2299. 4588 let expr0_0 = MInst::Trap { 4589 trap_code: pattern0_0.clone(), 4590 }; 4591 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4592 return Some(expr1_0); 4593 } 4594 4595 // Generated as internal constructor for term trap_if_impl. 4596 pub fn constructor_trap_if_impl<C: Context>( 4597 ctx: &mut C, 4598 arg0: &Cond, 4599 arg1: &TrapCode, 4600 ) -> Option<SideEffectNoResult> { 4601 let pattern0_0 = arg0; 4602 let pattern1_0 = arg1; 4603 // Rule at src/isa/s390x/inst.isle line 2303. 4604 let expr0_0 = MInst::TrapIf { 4605 cond: pattern0_0.clone(), 4606 trap_code: pattern1_0.clone(), 4607 }; 4608 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4609 return Some(expr1_0); 4610 } 4611 4612 // Generated as internal constructor for term debugtrap_impl. 4613 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4614 // Rule at src/isa/s390x/inst.isle line 2307. 4615 let expr0_0 = MInst::Debugtrap; 4616 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4617 return Some(expr1_0); 4618 } 4619 4620 // Generated as internal constructor for term bool. 4621 pub fn constructor_bool<C: Context>( 4622 ctx: &mut C, 4623 arg0: &ProducesFlags, 4624 arg1: &Cond, 4625 ) -> Option<ProducesBool> { 4626 let pattern0_0 = arg0; 4627 let pattern1_0 = arg1; 4628 // Rule at src/isa/s390x/inst.isle line 2318. 4629 let expr0_0 = ProducesBool::ProducesBool { 4630 producer: pattern0_0.clone(), 4631 cond: pattern1_0.clone(), 4632 }; 4633 return Some(expr0_0); 4634 } 4635 4636 // Generated as internal constructor for term invert_bool. 4637 pub fn constructor_invert_bool<C: Context>( 4638 ctx: &mut C, 4639 arg0: &ProducesBool, 4640 ) -> Option<ProducesBool> { 4641 let pattern0_0 = arg0; 4642 if let &ProducesBool::ProducesBool { 4643 producer: ref pattern1_0, 4644 cond: ref pattern1_1, 4645 } = pattern0_0 4646 { 4647 // Rule at src/isa/s390x/inst.isle line 2322. 4648 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4649 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4650 return Some(expr1_0); 4651 } 4652 return None; 4653 } 4654 4655 // Generated as internal constructor for term emit_producer. 4656 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4657 let pattern0_0 = arg0; 4658 if let &ProducesFlags::ProducesFlagsSideEffect { 4659 inst: ref pattern1_0, 4660 } = pattern0_0 4661 { 4662 // Rule at src/isa/s390x/inst.isle line 2331. 4663 let expr0_0 = C::emit(ctx, pattern1_0); 4664 return Some(expr0_0); 4665 } 4666 return None; 4667 } 4668 4669 // Generated as internal constructor for term emit_consumer. 4670 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4671 let pattern0_0 = arg0; 4672 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4673 inst: ref pattern1_0, 4674 result: pattern1_1, 4675 } = pattern0_0 4676 { 4677 // Rule at src/isa/s390x/inst.isle line 2333. 4678 let expr0_0 = C::emit(ctx, pattern1_0); 4679 return Some(expr0_0); 4680 } 4681 return None; 4682 } 4683 4684 // Generated as internal constructor for term select_bool_reg. 4685 pub fn constructor_select_bool_reg<C: Context>( 4686 ctx: &mut C, 4687 arg0: Type, 4688 arg1: &ProducesBool, 4689 arg2: Reg, 4690 arg3: Reg, 4691 ) -> Option<Reg> { 4692 let pattern0_0 = arg0; 4693 let pattern1_0 = arg1; 4694 if let &ProducesBool::ProducesBool { 4695 producer: ref pattern2_0, 4696 cond: ref pattern2_1, 4697 } = pattern1_0 4698 { 4699 let pattern3_0 = arg2; 4700 let pattern4_0 = arg3; 4701 // Rule at src/isa/s390x/inst.isle line 2337. 4702 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4703 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4704 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4705 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4706 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4707 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4708 return Some(expr5_0); 4709 } 4710 return None; 4711 } 4712 4713 // Generated as internal constructor for term select_bool_imm. 4714 pub fn constructor_select_bool_imm<C: Context>( 4715 ctx: &mut C, 4716 arg0: Type, 4717 arg1: &ProducesBool, 4718 arg2: i16, 4719 arg3: u64, 4720 ) -> Option<Reg> { 4721 let pattern0_0 = arg0; 4722 let pattern1_0 = arg1; 4723 if let &ProducesBool::ProducesBool { 4724 producer: ref pattern2_0, 4725 cond: ref pattern2_1, 4726 } = pattern1_0 4727 { 4728 let pattern3_0 = arg2; 4729 let pattern4_0 = arg3; 4730 // Rule at src/isa/s390x/inst.isle line 2346. 4731 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4732 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4733 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4734 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4735 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4736 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4737 return Some(expr5_0); 4738 } 4739 return None; 4740 } 4741 4742 // Generated as internal constructor for term lower_bool. 4743 pub fn constructor_lower_bool<C: Context>( 4744 ctx: &mut C, 4745 arg0: Type, 4746 arg1: &ProducesBool, 4747 ) -> Option<Reg> { 4748 let pattern0_0 = arg0; 4749 if pattern0_0 == B1 { 4750 let pattern2_0 = arg1; 4751 // Rule at src/isa/s390x/inst.isle line 2356. 4752 let expr0_0: Type = B1; 4753 let expr1_0: i16 = 1; 4754 let expr2_0: u64 = 0; 4755 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4756 return Some(expr3_0); 4757 } 4758 if pattern0_0 == B8 { 4759 let pattern2_0 = arg1; 4760 // Rule at src/isa/s390x/inst.isle line 2357. 4761 let expr0_0: Type = B8; 4762 let expr1_0: i16 = -1; 4763 let expr2_0: u64 = 0; 4764 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4765 return Some(expr3_0); 4766 } 4767 if pattern0_0 == B16 { 4768 let pattern2_0 = arg1; 4769 // Rule at src/isa/s390x/inst.isle line 2358. 4770 let expr0_0: Type = B16; 4771 let expr1_0: i16 = -1; 4772 let expr2_0: u64 = 0; 4773 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4774 return Some(expr3_0); 4775 } 4776 if pattern0_0 == B32 { 4777 let pattern2_0 = arg1; 4778 // Rule at src/isa/s390x/inst.isle line 2359. 4779 let expr0_0: Type = B32; 4780 let expr1_0: i16 = -1; 4781 let expr2_0: u64 = 0; 4782 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4783 return Some(expr3_0); 4784 } 4785 if pattern0_0 == B64 { 4786 let pattern2_0 = arg1; 4787 // Rule at src/isa/s390x/inst.isle line 2360. 4788 let expr0_0: Type = B64; 4789 let expr1_0: i16 = -1; 4790 let expr2_0: u64 = 0; 4791 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4792 return Some(expr3_0); 4793 } 4794 return None; 4795 } 4796 4797 // Generated as internal constructor for term cond_br_bool. 4798 pub fn constructor_cond_br_bool<C: Context>( 4799 ctx: &mut C, 4800 arg0: &ProducesBool, 4801 arg1: MachLabel, 4802 arg2: MachLabel, 4803 ) -> Option<SideEffectNoResult> { 4804 let pattern0_0 = arg0; 4805 if let &ProducesBool::ProducesBool { 4806 producer: ref pattern1_0, 4807 cond: ref pattern1_1, 4808 } = pattern0_0 4809 { 4810 let pattern2_0 = arg1; 4811 let pattern3_0 = arg2; 4812 // Rule at src/isa/s390x/inst.isle line 2364. 4813 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4814 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4815 return Some(expr1_0); 4816 } 4817 return None; 4818 } 4819 4820 // Generated as internal constructor for term oneway_cond_br_bool. 4821 pub fn constructor_oneway_cond_br_bool<C: Context>( 4822 ctx: &mut C, 4823 arg0: &ProducesBool, 4824 arg1: MachLabel, 4825 ) -> Option<SideEffectNoResult> { 4826 let pattern0_0 = arg0; 4827 if let &ProducesBool::ProducesBool { 4828 producer: ref pattern1_0, 4829 cond: ref pattern1_1, 4830 } = pattern0_0 4831 { 4832 let pattern2_0 = arg1; 4833 // Rule at src/isa/s390x/inst.isle line 2370. 4834 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4835 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4836 return Some(expr1_0); 4837 } 4838 return None; 4839 } 4840 4841 // Generated as internal constructor for term trap_if_bool. 4842 pub fn constructor_trap_if_bool<C: Context>( 4843 ctx: &mut C, 4844 arg0: &ProducesBool, 4845 arg1: &TrapCode, 4846 ) -> Option<SideEffectNoResult> { 4847 let pattern0_0 = arg0; 4848 if let &ProducesBool::ProducesBool { 4849 producer: ref pattern1_0, 4850 cond: ref pattern1_1, 4851 } = pattern0_0 4852 { 4853 let pattern2_0 = arg1; 4854 // Rule at src/isa/s390x/inst.isle line 2376. 4855 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4856 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4857 return Some(expr1_0); 4858 } 4859 return None; 4860 } 4861 4862 // Generated as internal constructor for term casloop_val_reg. 4863 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4864 // Rule at src/isa/s390x/inst.isle line 2390. 4865 let expr0_0: u8 = 0; 4866 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4867 return Some(expr1_0); 4868 } 4869 4870 // Generated as internal constructor for term casloop_tmp_reg. 4871 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4872 // Rule at src/isa/s390x/inst.isle line 2394. 4873 let expr0_0: u8 = 1; 4874 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4875 return Some(expr1_0); 4876 } 4877 4878 // Generated as internal constructor for term casloop_emit. 4879 pub fn constructor_casloop_emit<C: Context>( 4880 ctx: &mut C, 4881 arg0: &VecMInstBuilder, 4882 arg1: Type, 4883 arg2: MemFlags, 4884 arg3: Reg, 4885 arg4: Reg, 4886 ) -> Option<Reg> { 4887 let pattern0_0 = arg0; 4888 let pattern1_0 = arg1; 4889 let pattern2_0 = arg2; 4890 let pattern3_0 = arg3; 4891 let pattern4_0 = arg4; 4892 // Rule at src/isa/s390x/inst.isle line 2403. 4893 let expr0_0: i64 = 0; 4894 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4895 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4896 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4897 let expr4_0 = 4898 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4899 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4900 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4901 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4902 let expr8_0 = IntCC::NotEqual; 4903 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4904 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4905 return Some(expr4_0); 4906 } 4907 4908 // Generated as internal constructor for term casloop_result. 4909 pub fn constructor_casloop_result<C: Context>( 4910 ctx: &mut C, 4911 arg0: Type, 4912 arg1: MemFlags, 4913 arg2: Reg, 4914 ) -> Option<Reg> { 4915 let pattern0_0 = arg0; 4916 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4917 let pattern2_0 = arg1; 4918 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4919 let pattern4_0 = arg2; 4920 // Rule at src/isa/s390x/inst.isle line 2421. 4921 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4922 return Some(expr0_0); 4923 } 4924 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4925 let pattern4_0 = arg2; 4926 // Rule at src/isa/s390x/inst.isle line 2419. 4927 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4928 return Some(expr0_0); 4929 } 4930 } 4931 return None; 4932 } 4933 4934 // Generated as internal constructor for term casloop. 4935 pub fn constructor_casloop<C: Context>( 4936 ctx: &mut C, 4937 arg0: &VecMInstBuilder, 4938 arg1: Type, 4939 arg2: MemFlags, 4940 arg3: Reg, 4941 arg4: Reg, 4942 ) -> Option<Reg> { 4943 let pattern0_0 = arg0; 4944 let pattern1_0 = arg1; 4945 let pattern2_0 = arg2; 4946 let pattern3_0 = arg3; 4947 let pattern4_0 = arg4; 4948 // Rule at src/isa/s390x/inst.isle line 2426. 4949 let expr0_0 = constructor_casloop_emit( 4950 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4951 )?; 4952 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4953 return Some(expr1_0); 4954 } 4955 4956 // Generated as internal constructor for term casloop_bitshift. 4957 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4958 let pattern0_0 = arg0; 4959 // Rule at src/isa/s390x/inst.isle line 2441. 4960 let expr0_0: Type = I32; 4961 let expr1_0: u8 = 3; 4962 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4963 return Some(expr2_0); 4964 } 4965 4966 // Generated as internal constructor for term casloop_aligned_addr. 4967 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4968 let pattern0_0 = arg0; 4969 // Rule at src/isa/s390x/inst.isle line 2446. 4970 let expr0_0: Type = I64; 4971 let expr1_0: u16 = 65532; 4972 let expr2_0: u8 = 0; 4973 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4974 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4975 return Some(expr4_0); 4976 } 4977 4978 // Generated as internal constructor for term casloop_rotate_in. 4979 pub fn constructor_casloop_rotate_in<C: Context>( 4980 ctx: &mut C, 4981 arg0: &VecMInstBuilder, 4982 arg1: Type, 4983 arg2: MemFlags, 4984 arg3: Reg, 4985 arg4: Reg, 4986 ) -> Option<Reg> { 4987 let pattern0_0 = arg0; 4988 let pattern1_0 = arg1; 4989 if pattern1_0 == I8 { 4990 let pattern3_0 = arg2; 4991 let pattern4_0 = arg3; 4992 let pattern5_0 = arg4; 4993 // Rule at src/isa/s390x/inst.isle line 2456. 4994 let expr0_0: Type = I32; 4995 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4996 let expr2_0: u8 = 0; 4997 let expr3_0 = constructor_push_rot_imm_reg( 4998 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 4999 )?; 5000 return Some(expr3_0); 5001 } 5002 if pattern1_0 == I16 { 5003 let pattern3_0 = arg2; 5004 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5005 let pattern5_0 = arg3; 5006 let pattern6_0 = arg4; 5007 // Rule at src/isa/s390x/inst.isle line 2460. 5008 let expr0_0: Type = I32; 5009 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5010 let expr2_0: u8 = 16; 5011 let expr3_0 = constructor_push_rot_imm_reg( 5012 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5013 )?; 5014 return Some(expr3_0); 5015 } 5016 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5017 let pattern5_0 = arg3; 5018 let pattern6_0 = arg4; 5019 // Rule at src/isa/s390x/inst.isle line 2458. 5020 let expr0_0: Type = I32; 5021 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5022 let expr2_0: u8 = 0; 5023 let expr3_0 = constructor_push_rot_imm_reg( 5024 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5025 )?; 5026 return Some(expr3_0); 5027 } 5028 } 5029 return None; 5030 } 5031 5032 // Generated as internal constructor for term casloop_rotate_out. 5033 pub fn constructor_casloop_rotate_out<C: Context>( 5034 ctx: &mut C, 5035 arg0: &VecMInstBuilder, 5036 arg1: Type, 5037 arg2: MemFlags, 5038 arg3: Reg, 5039 arg4: Reg, 5040 ) -> Option<Reg> { 5041 let pattern0_0 = arg0; 5042 let pattern1_0 = arg1; 5043 if pattern1_0 == I8 { 5044 let pattern3_0 = arg2; 5045 let pattern4_0 = arg3; 5046 let pattern5_0 = arg4; 5047 // Rule at src/isa/s390x/inst.isle line 2469. 5048 let expr0_0: Type = I32; 5049 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5050 let expr2_0: u8 = 0; 5051 let expr3_0: Type = I32; 5052 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5053 let expr5_0 = constructor_push_rot_imm_reg( 5054 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5055 )?; 5056 return Some(expr5_0); 5057 } 5058 if pattern1_0 == I16 { 5059 let pattern3_0 = arg2; 5060 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5061 let pattern5_0 = arg3; 5062 let pattern6_0 = arg4; 5063 // Rule at src/isa/s390x/inst.isle line 2473. 5064 let expr0_0: Type = I32; 5065 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5066 let expr2_0: u8 = 16; 5067 let expr3_0 = constructor_push_rot_imm_reg( 5068 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5069 )?; 5070 return Some(expr3_0); 5071 } 5072 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5073 let pattern5_0 = arg3; 5074 let pattern6_0 = arg4; 5075 // Rule at src/isa/s390x/inst.isle line 2471. 5076 let expr0_0: Type = I32; 5077 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5078 let expr2_0: u8 = 0; 5079 let expr3_0 = constructor_push_rot_imm_reg( 5080 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5081 )?; 5082 return Some(expr3_0); 5083 } 5084 } 5085 return None; 5086 } 5087 5088 // Generated as internal constructor for term casloop_rotate_result. 5089 pub fn constructor_casloop_rotate_result<C: Context>( 5090 ctx: &mut C, 5091 arg0: Type, 5092 arg1: MemFlags, 5093 arg2: Reg, 5094 arg3: Reg, 5095 ) -> Option<Reg> { 5096 let pattern0_0 = arg0; 5097 if pattern0_0 == I8 { 5098 let pattern2_0 = arg1; 5099 let pattern3_0 = arg2; 5100 let pattern4_0 = arg3; 5101 // Rule at src/isa/s390x/inst.isle line 2484. 5102 let expr0_0: Type = I32; 5103 let expr1_0: u8 = 8; 5104 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5105 return Some(expr2_0); 5106 } 5107 if pattern0_0 == I16 { 5108 let pattern2_0 = arg1; 5109 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5110 let pattern4_0 = arg2; 5111 let pattern5_0 = arg3; 5112 // Rule at src/isa/s390x/inst.isle line 2488. 5113 let expr0_0: Type = I32; 5114 let expr1_0: Type = I32; 5115 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5116 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5117 return Some(expr3_0); 5118 } 5119 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5120 let pattern4_0 = arg2; 5121 let pattern5_0 = arg3; 5122 // Rule at src/isa/s390x/inst.isle line 2486. 5123 let expr0_0: Type = I32; 5124 let expr1_0: u8 = 16; 5125 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5126 return Some(expr2_0); 5127 } 5128 } 5129 return None; 5130 } 5131 5132 // Generated as internal constructor for term casloop_subword. 5133 pub fn constructor_casloop_subword<C: Context>( 5134 ctx: &mut C, 5135 arg0: &VecMInstBuilder, 5136 arg1: Type, 5137 arg2: MemFlags, 5138 arg3: Reg, 5139 arg4: Reg, 5140 arg5: Reg, 5141 ) -> Option<Reg> { 5142 let pattern0_0 = arg0; 5143 let pattern1_0 = arg1; 5144 let pattern2_0 = arg2; 5145 let pattern3_0 = arg3; 5146 let pattern4_0 = arg4; 5147 let pattern5_0 = arg5; 5148 // Rule at src/isa/s390x/inst.isle line 2493. 5149 let expr0_0 = constructor_casloop_emit( 5150 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5151 )?; 5152 let expr1_0 = 5153 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5154 return Some(expr1_0); 5155 } 5156 5157 // Generated as internal constructor for term clz_reg. 5158 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5159 let pattern0_0 = arg0; 5160 if pattern0_0 == 64 { 5161 let pattern2_0 = arg1; 5162 // Rule at src/isa/s390x/inst.isle line 2504. 5163 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5164 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5165 let expr2_0 = C::emit(ctx, &expr1_0); 5166 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5167 return Some(expr3_0); 5168 } 5169 let pattern1_0 = arg1; 5170 // Rule at src/isa/s390x/inst.isle line 2513. 5171 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5172 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5173 let expr2_0 = C::emit(ctx, &expr1_0); 5174 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5175 let expr4_0 = IntCC::Equal; 5176 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5177 let expr6_0 = MInst::CMov64SImm16 { 5178 rd: expr3_0, 5179 cond: expr5_0, 5180 imm: pattern0_0, 5181 }; 5182 let expr7_0 = C::emit(ctx, &expr6_0); 5183 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5184 return Some(expr8_0); 5185 } 5186 5187 // Generated as internal constructor for term aluop_add. 5188 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5189 let pattern0_0 = arg0; 5190 if pattern0_0 == I8 { 5191 // Rule at src/isa/s390x/inst.isle line 2524. 5192 let expr0_0 = ALUOp::Add32; 5193 return Some(expr0_0); 5194 } 5195 if pattern0_0 == I16 { 5196 // Rule at src/isa/s390x/inst.isle line 2525. 5197 let expr0_0 = ALUOp::Add32; 5198 return Some(expr0_0); 5199 } 5200 if pattern0_0 == I32 { 5201 // Rule at src/isa/s390x/inst.isle line 2526. 5202 let expr0_0 = ALUOp::Add32; 5203 return Some(expr0_0); 5204 } 5205 if pattern0_0 == I64 { 5206 // Rule at src/isa/s390x/inst.isle line 2527. 5207 let expr0_0 = ALUOp::Add64; 5208 return Some(expr0_0); 5209 } 5210 return None; 5211 } 5212 5213 // Generated as internal constructor for term aluop_add_sext16. 5214 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5215 let pattern0_0 = arg0; 5216 if pattern0_0 == I16 { 5217 // Rule at src/isa/s390x/inst.isle line 2530. 5218 let expr0_0 = ALUOp::Add32Ext16; 5219 return Some(expr0_0); 5220 } 5221 if pattern0_0 == I32 { 5222 // Rule at src/isa/s390x/inst.isle line 2531. 5223 let expr0_0 = ALUOp::Add32Ext16; 5224 return Some(expr0_0); 5225 } 5226 if pattern0_0 == I64 { 5227 // Rule at src/isa/s390x/inst.isle line 2532. 5228 let expr0_0 = ALUOp::Add64Ext16; 5229 return Some(expr0_0); 5230 } 5231 return None; 5232 } 5233 5234 // Generated as internal constructor for term aluop_add_sext32. 5235 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5236 let pattern0_0 = arg0; 5237 if pattern0_0 == I64 { 5238 // Rule at src/isa/s390x/inst.isle line 2535. 5239 let expr0_0 = ALUOp::Add64Ext32; 5240 return Some(expr0_0); 5241 } 5242 return None; 5243 } 5244 5245 // Generated as internal constructor for term add_reg. 5246 pub fn constructor_add_reg<C: Context>( 5247 ctx: &mut C, 5248 arg0: Type, 5249 arg1: Reg, 5250 arg2: Reg, 5251 ) -> Option<Reg> { 5252 let pattern0_0 = arg0; 5253 let pattern1_0 = arg1; 5254 let pattern2_0 = arg2; 5255 // Rule at src/isa/s390x/inst.isle line 2538. 5256 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5257 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5258 return Some(expr1_0); 5259 } 5260 5261 // Generated as internal constructor for term add_reg_sext32. 5262 pub fn constructor_add_reg_sext32<C: Context>( 5263 ctx: &mut C, 5264 arg0: Type, 5265 arg1: Reg, 5266 arg2: Reg, 5267 ) -> Option<Reg> { 5268 let pattern0_0 = arg0; 5269 let pattern1_0 = arg1; 5270 let pattern2_0 = arg2; 5271 // Rule at src/isa/s390x/inst.isle line 2541. 5272 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5273 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5274 return Some(expr1_0); 5275 } 5276 5277 // Generated as internal constructor for term add_simm16. 5278 pub fn constructor_add_simm16<C: Context>( 5279 ctx: &mut C, 5280 arg0: Type, 5281 arg1: Reg, 5282 arg2: i16, 5283 ) -> Option<Reg> { 5284 let pattern0_0 = arg0; 5285 let pattern1_0 = arg1; 5286 let pattern2_0 = arg2; 5287 // Rule at src/isa/s390x/inst.isle line 2544. 5288 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5289 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5290 return Some(expr1_0); 5291 } 5292 5293 // Generated as internal constructor for term add_simm32. 5294 pub fn constructor_add_simm32<C: Context>( 5295 ctx: &mut C, 5296 arg0: Type, 5297 arg1: Reg, 5298 arg2: i32, 5299 ) -> Option<Reg> { 5300 let pattern0_0 = arg0; 5301 let pattern1_0 = arg1; 5302 let pattern2_0 = arg2; 5303 // Rule at src/isa/s390x/inst.isle line 2547. 5304 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5305 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5306 return Some(expr1_0); 5307 } 5308 5309 // Generated as internal constructor for term add_mem. 5310 pub fn constructor_add_mem<C: Context>( 5311 ctx: &mut C, 5312 arg0: Type, 5313 arg1: Reg, 5314 arg2: &MemArg, 5315 ) -> Option<Reg> { 5316 let pattern0_0 = arg0; 5317 let pattern1_0 = arg1; 5318 let pattern2_0 = arg2; 5319 // Rule at src/isa/s390x/inst.isle line 2550. 5320 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5321 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5322 return Some(expr1_0); 5323 } 5324 5325 // Generated as internal constructor for term add_mem_sext16. 5326 pub fn constructor_add_mem_sext16<C: Context>( 5327 ctx: &mut C, 5328 arg0: Type, 5329 arg1: Reg, 5330 arg2: &MemArg, 5331 ) -> Option<Reg> { 5332 let pattern0_0 = arg0; 5333 let pattern1_0 = arg1; 5334 let pattern2_0 = arg2; 5335 // Rule at src/isa/s390x/inst.isle line 2553. 5336 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5337 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5338 return Some(expr1_0); 5339 } 5340 5341 // Generated as internal constructor for term add_mem_sext32. 5342 pub fn constructor_add_mem_sext32<C: Context>( 5343 ctx: &mut C, 5344 arg0: Type, 5345 arg1: Reg, 5346 arg2: &MemArg, 5347 ) -> Option<Reg> { 5348 let pattern0_0 = arg0; 5349 let pattern1_0 = arg1; 5350 let pattern2_0 = arg2; 5351 // Rule at src/isa/s390x/inst.isle line 2556. 5352 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5353 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5354 return Some(expr1_0); 5355 } 5356 5357 // Generated as internal constructor for term aluop_add_logical. 5358 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5359 let pattern0_0 = arg0; 5360 if pattern0_0 == I32 { 5361 // Rule at src/isa/s390x/inst.isle line 2562. 5362 let expr0_0 = ALUOp::AddLogical32; 5363 return Some(expr0_0); 5364 } 5365 if pattern0_0 == I64 { 5366 // Rule at src/isa/s390x/inst.isle line 2563. 5367 let expr0_0 = ALUOp::AddLogical64; 5368 return Some(expr0_0); 5369 } 5370 return None; 5371 } 5372 5373 // Generated as internal constructor for term aluop_add_logical_zext32. 5374 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5375 let pattern0_0 = arg0; 5376 if pattern0_0 == I64 { 5377 // Rule at src/isa/s390x/inst.isle line 2566. 5378 let expr0_0 = ALUOp::AddLogical64Ext32; 5379 return Some(expr0_0); 5380 } 5381 return None; 5382 } 5383 5384 // Generated as internal constructor for term add_logical_reg. 5385 pub fn constructor_add_logical_reg<C: Context>( 5386 ctx: &mut C, 5387 arg0: Type, 5388 arg1: Reg, 5389 arg2: Reg, 5390 ) -> Option<Reg> { 5391 let pattern0_0 = arg0; 5392 let pattern1_0 = arg1; 5393 let pattern2_0 = arg2; 5394 // Rule at src/isa/s390x/inst.isle line 2569. 5395 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5396 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5397 return Some(expr1_0); 5398 } 5399 5400 // Generated as internal constructor for term add_logical_reg_zext32. 5401 pub fn constructor_add_logical_reg_zext32<C: Context>( 5402 ctx: &mut C, 5403 arg0: Type, 5404 arg1: Reg, 5405 arg2: Reg, 5406 ) -> Option<Reg> { 5407 let pattern0_0 = arg0; 5408 let pattern1_0 = arg1; 5409 let pattern2_0 = arg2; 5410 // Rule at src/isa/s390x/inst.isle line 2572. 5411 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5412 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5413 return Some(expr1_0); 5414 } 5415 5416 // Generated as internal constructor for term add_logical_zimm32. 5417 pub fn constructor_add_logical_zimm32<C: Context>( 5418 ctx: &mut C, 5419 arg0: Type, 5420 arg1: Reg, 5421 arg2: u32, 5422 ) -> Option<Reg> { 5423 let pattern0_0 = arg0; 5424 let pattern1_0 = arg1; 5425 let pattern2_0 = arg2; 5426 // Rule at src/isa/s390x/inst.isle line 2575. 5427 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5428 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5429 return Some(expr1_0); 5430 } 5431 5432 // Generated as internal constructor for term add_logical_mem. 5433 pub fn constructor_add_logical_mem<C: Context>( 5434 ctx: &mut C, 5435 arg0: Type, 5436 arg1: Reg, 5437 arg2: &MemArg, 5438 ) -> Option<Reg> { 5439 let pattern0_0 = arg0; 5440 let pattern1_0 = arg1; 5441 let pattern2_0 = arg2; 5442 // Rule at src/isa/s390x/inst.isle line 2578. 5443 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5444 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5445 return Some(expr1_0); 5446 } 5447 5448 // Generated as internal constructor for term add_logical_mem_zext32. 5449 pub fn constructor_add_logical_mem_zext32<C: Context>( 5450 ctx: &mut C, 5451 arg0: Type, 5452 arg1: Reg, 5453 arg2: &MemArg, 5454 ) -> Option<Reg> { 5455 let pattern0_0 = arg0; 5456 let pattern1_0 = arg1; 5457 let pattern2_0 = arg2; 5458 // Rule at src/isa/s390x/inst.isle line 2581. 5459 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5460 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5461 return Some(expr1_0); 5462 } 5463 5464 // Generated as internal constructor for term aluop_sub. 5465 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5466 let pattern0_0 = arg0; 5467 if pattern0_0 == I8 { 5468 // Rule at src/isa/s390x/inst.isle line 2587. 5469 let expr0_0 = ALUOp::Sub32; 5470 return Some(expr0_0); 5471 } 5472 if pattern0_0 == I16 { 5473 // Rule at src/isa/s390x/inst.isle line 2588. 5474 let expr0_0 = ALUOp::Sub32; 5475 return Some(expr0_0); 5476 } 5477 if pattern0_0 == I32 { 5478 // Rule at src/isa/s390x/inst.isle line 2589. 5479 let expr0_0 = ALUOp::Sub32; 5480 return Some(expr0_0); 5481 } 5482 if pattern0_0 == I64 { 5483 // Rule at src/isa/s390x/inst.isle line 2590. 5484 let expr0_0 = ALUOp::Sub64; 5485 return Some(expr0_0); 5486 } 5487 return None; 5488 } 5489 5490 // Generated as internal constructor for term aluop_sub_sext16. 5491 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5492 let pattern0_0 = arg0; 5493 if pattern0_0 == I16 { 5494 // Rule at src/isa/s390x/inst.isle line 2593. 5495 let expr0_0 = ALUOp::Sub32Ext16; 5496 return Some(expr0_0); 5497 } 5498 if pattern0_0 == I32 { 5499 // Rule at src/isa/s390x/inst.isle line 2594. 5500 let expr0_0 = ALUOp::Sub32Ext16; 5501 return Some(expr0_0); 5502 } 5503 if pattern0_0 == I64 { 5504 // Rule at src/isa/s390x/inst.isle line 2595. 5505 let expr0_0 = ALUOp::Sub64Ext16; 5506 return Some(expr0_0); 5507 } 5508 return None; 5509 } 5510 5511 // Generated as internal constructor for term aluop_sub_sext32. 5512 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5513 let pattern0_0 = arg0; 5514 if pattern0_0 == I64 { 5515 // Rule at src/isa/s390x/inst.isle line 2598. 5516 let expr0_0 = ALUOp::Sub64Ext32; 5517 return Some(expr0_0); 5518 } 5519 return None; 5520 } 5521 5522 // Generated as internal constructor for term sub_reg. 5523 pub fn constructor_sub_reg<C: Context>( 5524 ctx: &mut C, 5525 arg0: Type, 5526 arg1: Reg, 5527 arg2: Reg, 5528 ) -> Option<Reg> { 5529 let pattern0_0 = arg0; 5530 let pattern1_0 = arg1; 5531 let pattern2_0 = arg2; 5532 // Rule at src/isa/s390x/inst.isle line 2601. 5533 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5534 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5535 return Some(expr1_0); 5536 } 5537 5538 // Generated as internal constructor for term sub_reg_sext32. 5539 pub fn constructor_sub_reg_sext32<C: Context>( 5540 ctx: &mut C, 5541 arg0: Type, 5542 arg1: Reg, 5543 arg2: Reg, 5544 ) -> Option<Reg> { 5545 let pattern0_0 = arg0; 5546 let pattern1_0 = arg1; 5547 let pattern2_0 = arg2; 5548 // Rule at src/isa/s390x/inst.isle line 2604. 5549 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5550 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5551 return Some(expr1_0); 5552 } 5553 5554 // Generated as internal constructor for term sub_mem. 5555 pub fn constructor_sub_mem<C: Context>( 5556 ctx: &mut C, 5557 arg0: Type, 5558 arg1: Reg, 5559 arg2: &MemArg, 5560 ) -> Option<Reg> { 5561 let pattern0_0 = arg0; 5562 let pattern1_0 = arg1; 5563 let pattern2_0 = arg2; 5564 // Rule at src/isa/s390x/inst.isle line 2607. 5565 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5566 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5567 return Some(expr1_0); 5568 } 5569 5570 // Generated as internal constructor for term sub_mem_sext16. 5571 pub fn constructor_sub_mem_sext16<C: Context>( 5572 ctx: &mut C, 5573 arg0: Type, 5574 arg1: Reg, 5575 arg2: &MemArg, 5576 ) -> Option<Reg> { 5577 let pattern0_0 = arg0; 5578 let pattern1_0 = arg1; 5579 let pattern2_0 = arg2; 5580 // Rule at src/isa/s390x/inst.isle line 2610. 5581 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5582 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5583 return Some(expr1_0); 5584 } 5585 5586 // Generated as internal constructor for term sub_mem_sext32. 5587 pub fn constructor_sub_mem_sext32<C: Context>( 5588 ctx: &mut C, 5589 arg0: Type, 5590 arg1: Reg, 5591 arg2: &MemArg, 5592 ) -> Option<Reg> { 5593 let pattern0_0 = arg0; 5594 let pattern1_0 = arg1; 5595 let pattern2_0 = arg2; 5596 // Rule at src/isa/s390x/inst.isle line 2613. 5597 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5598 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5599 return Some(expr1_0); 5600 } 5601 5602 // Generated as internal constructor for term aluop_sub_logical. 5603 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5604 let pattern0_0 = arg0; 5605 if pattern0_0 == I32 { 5606 // Rule at src/isa/s390x/inst.isle line 2619. 5607 let expr0_0 = ALUOp::SubLogical32; 5608 return Some(expr0_0); 5609 } 5610 if pattern0_0 == I64 { 5611 // Rule at src/isa/s390x/inst.isle line 2620. 5612 let expr0_0 = ALUOp::SubLogical64; 5613 return Some(expr0_0); 5614 } 5615 return None; 5616 } 5617 5618 // Generated as internal constructor for term aluop_sub_logical_zext32. 5619 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5620 let pattern0_0 = arg0; 5621 if pattern0_0 == I64 { 5622 // Rule at src/isa/s390x/inst.isle line 2623. 5623 let expr0_0 = ALUOp::SubLogical64Ext32; 5624 return Some(expr0_0); 5625 } 5626 return None; 5627 } 5628 5629 // Generated as internal constructor for term sub_logical_reg. 5630 pub fn constructor_sub_logical_reg<C: Context>( 5631 ctx: &mut C, 5632 arg0: Type, 5633 arg1: Reg, 5634 arg2: Reg, 5635 ) -> Option<Reg> { 5636 let pattern0_0 = arg0; 5637 let pattern1_0 = arg1; 5638 let pattern2_0 = arg2; 5639 // Rule at src/isa/s390x/inst.isle line 2626. 5640 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5641 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5642 return Some(expr1_0); 5643 } 5644 5645 // Generated as internal constructor for term sub_logical_reg_zext32. 5646 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5647 ctx: &mut C, 5648 arg0: Type, 5649 arg1: Reg, 5650 arg2: Reg, 5651 ) -> Option<Reg> { 5652 let pattern0_0 = arg0; 5653 let pattern1_0 = arg1; 5654 let pattern2_0 = arg2; 5655 // Rule at src/isa/s390x/inst.isle line 2629. 5656 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5657 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5658 return Some(expr1_0); 5659 } 5660 5661 // Generated as internal constructor for term sub_logical_zimm32. 5662 pub fn constructor_sub_logical_zimm32<C: Context>( 5663 ctx: &mut C, 5664 arg0: Type, 5665 arg1: Reg, 5666 arg2: u32, 5667 ) -> Option<Reg> { 5668 let pattern0_0 = arg0; 5669 let pattern1_0 = arg1; 5670 let pattern2_0 = arg2; 5671 // Rule at src/isa/s390x/inst.isle line 2632. 5672 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5673 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5674 return Some(expr1_0); 5675 } 5676 5677 // Generated as internal constructor for term sub_logical_mem. 5678 pub fn constructor_sub_logical_mem<C: Context>( 5679 ctx: &mut C, 5680 arg0: Type, 5681 arg1: Reg, 5682 arg2: &MemArg, 5683 ) -> Option<Reg> { 5684 let pattern0_0 = arg0; 5685 let pattern1_0 = arg1; 5686 let pattern2_0 = arg2; 5687 // Rule at src/isa/s390x/inst.isle line 2635. 5688 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5689 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5690 return Some(expr1_0); 5691 } 5692 5693 // Generated as internal constructor for term sub_logical_mem_zext32. 5694 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5695 ctx: &mut C, 5696 arg0: Type, 5697 arg1: Reg, 5698 arg2: &MemArg, 5699 ) -> Option<Reg> { 5700 let pattern0_0 = arg0; 5701 let pattern1_0 = arg1; 5702 let pattern2_0 = arg2; 5703 // Rule at src/isa/s390x/inst.isle line 2638. 5704 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5705 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5706 return Some(expr1_0); 5707 } 5708 5709 // Generated as internal constructor for term aluop_mul. 5710 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5711 let pattern0_0 = arg0; 5712 if pattern0_0 == I8 { 5713 // Rule at src/isa/s390x/inst.isle line 2644. 5714 let expr0_0 = ALUOp::Mul32; 5715 return Some(expr0_0); 5716 } 5717 if pattern0_0 == I16 { 5718 // Rule at src/isa/s390x/inst.isle line 2645. 5719 let expr0_0 = ALUOp::Mul32; 5720 return Some(expr0_0); 5721 } 5722 if pattern0_0 == I32 { 5723 // Rule at src/isa/s390x/inst.isle line 2646. 5724 let expr0_0 = ALUOp::Mul32; 5725 return Some(expr0_0); 5726 } 5727 if pattern0_0 == I64 { 5728 // Rule at src/isa/s390x/inst.isle line 2647. 5729 let expr0_0 = ALUOp::Mul64; 5730 return Some(expr0_0); 5731 } 5732 return None; 5733 } 5734 5735 // Generated as internal constructor for term aluop_mul_sext16. 5736 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5737 let pattern0_0 = arg0; 5738 if pattern0_0 == I16 { 5739 // Rule at src/isa/s390x/inst.isle line 2650. 5740 let expr0_0 = ALUOp::Mul32Ext16; 5741 return Some(expr0_0); 5742 } 5743 if pattern0_0 == I32 { 5744 // Rule at src/isa/s390x/inst.isle line 2651. 5745 let expr0_0 = ALUOp::Mul32Ext16; 5746 return Some(expr0_0); 5747 } 5748 if pattern0_0 == I64 { 5749 // Rule at src/isa/s390x/inst.isle line 2652. 5750 let expr0_0 = ALUOp::Mul64Ext16; 5751 return Some(expr0_0); 5752 } 5753 return None; 5754 } 5755 5756 // Generated as internal constructor for term aluop_mul_sext32. 5757 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5758 let pattern0_0 = arg0; 5759 if pattern0_0 == I64 { 5760 // Rule at src/isa/s390x/inst.isle line 2655. 5761 let expr0_0 = ALUOp::Mul64Ext32; 5762 return Some(expr0_0); 5763 } 5764 return None; 5765 } 5766 5767 // Generated as internal constructor for term mul_reg. 5768 pub fn constructor_mul_reg<C: Context>( 5769 ctx: &mut C, 5770 arg0: Type, 5771 arg1: Reg, 5772 arg2: Reg, 5773 ) -> Option<Reg> { 5774 let pattern0_0 = arg0; 5775 let pattern1_0 = arg1; 5776 let pattern2_0 = arg2; 5777 // Rule at src/isa/s390x/inst.isle line 2658. 5778 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5779 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5780 return Some(expr1_0); 5781 } 5782 5783 // Generated as internal constructor for term mul_reg_sext32. 5784 pub fn constructor_mul_reg_sext32<C: Context>( 5785 ctx: &mut C, 5786 arg0: Type, 5787 arg1: Reg, 5788 arg2: Reg, 5789 ) -> Option<Reg> { 5790 let pattern0_0 = arg0; 5791 let pattern1_0 = arg1; 5792 let pattern2_0 = arg2; 5793 // Rule at src/isa/s390x/inst.isle line 2661. 5794 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5795 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5796 return Some(expr1_0); 5797 } 5798 5799 // Generated as internal constructor for term mul_simm16. 5800 pub fn constructor_mul_simm16<C: Context>( 5801 ctx: &mut C, 5802 arg0: Type, 5803 arg1: Reg, 5804 arg2: i16, 5805 ) -> Option<Reg> { 5806 let pattern0_0 = arg0; 5807 let pattern1_0 = arg1; 5808 let pattern2_0 = arg2; 5809 // Rule at src/isa/s390x/inst.isle line 2664. 5810 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5811 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5812 return Some(expr1_0); 5813 } 5814 5815 // Generated as internal constructor for term mul_simm32. 5816 pub fn constructor_mul_simm32<C: Context>( 5817 ctx: &mut C, 5818 arg0: Type, 5819 arg1: Reg, 5820 arg2: i32, 5821 ) -> Option<Reg> { 5822 let pattern0_0 = arg0; 5823 let pattern1_0 = arg1; 5824 let pattern2_0 = arg2; 5825 // Rule at src/isa/s390x/inst.isle line 2667. 5826 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5827 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5828 return Some(expr1_0); 5829 } 5830 5831 // Generated as internal constructor for term mul_mem. 5832 pub fn constructor_mul_mem<C: Context>( 5833 ctx: &mut C, 5834 arg0: Type, 5835 arg1: Reg, 5836 arg2: &MemArg, 5837 ) -> Option<Reg> { 5838 let pattern0_0 = arg0; 5839 let pattern1_0 = arg1; 5840 let pattern2_0 = arg2; 5841 // Rule at src/isa/s390x/inst.isle line 2670. 5842 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5843 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5844 return Some(expr1_0); 5845 } 5846 5847 // Generated as internal constructor for term mul_mem_sext16. 5848 pub fn constructor_mul_mem_sext16<C: Context>( 5849 ctx: &mut C, 5850 arg0: Type, 5851 arg1: Reg, 5852 arg2: &MemArg, 5853 ) -> Option<Reg> { 5854 let pattern0_0 = arg0; 5855 let pattern1_0 = arg1; 5856 let pattern2_0 = arg2; 5857 // Rule at src/isa/s390x/inst.isle line 2673. 5858 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5859 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5860 return Some(expr1_0); 5861 } 5862 5863 // Generated as internal constructor for term mul_mem_sext32. 5864 pub fn constructor_mul_mem_sext32<C: Context>( 5865 ctx: &mut C, 5866 arg0: Type, 5867 arg1: Reg, 5868 arg2: &MemArg, 5869 ) -> Option<Reg> { 5870 let pattern0_0 = arg0; 5871 let pattern1_0 = arg1; 5872 let pattern2_0 = arg2; 5873 // Rule at src/isa/s390x/inst.isle line 2676. 5874 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5875 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5876 return Some(expr1_0); 5877 } 5878 5879 // Generated as internal constructor for term udivmod. 5880 pub fn constructor_udivmod<C: Context>( 5881 ctx: &mut C, 5882 arg0: Type, 5883 arg1: &RegPair, 5884 arg2: Reg, 5885 ) -> Option<RegPair> { 5886 let pattern0_0 = arg0; 5887 if pattern0_0 == I32 { 5888 let pattern2_0 = arg1; 5889 let pattern3_0 = arg2; 5890 // Rule at src/isa/s390x/inst.isle line 2682. 5891 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5892 return Some(expr0_0); 5893 } 5894 if pattern0_0 == I64 { 5895 let pattern2_0 = arg1; 5896 let pattern3_0 = arg2; 5897 // Rule at src/isa/s390x/inst.isle line 2683. 5898 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5899 return Some(expr0_0); 5900 } 5901 return None; 5902 } 5903 5904 // Generated as internal constructor for term sdivmod. 5905 pub fn constructor_sdivmod<C: Context>( 5906 ctx: &mut C, 5907 arg0: Type, 5908 arg1: &RegPair, 5909 arg2: Reg, 5910 ) -> Option<RegPair> { 5911 let pattern0_0 = arg0; 5912 if pattern0_0 == I32 { 5913 let pattern2_0 = arg1; 5914 let pattern3_0 = arg2; 5915 // Rule at src/isa/s390x/inst.isle line 2689. 5916 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5917 return Some(expr0_0); 5918 } 5919 if pattern0_0 == I64 { 5920 let pattern2_0 = arg1; 5921 let pattern3_0 = arg2; 5922 // Rule at src/isa/s390x/inst.isle line 2690. 5923 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5924 return Some(expr0_0); 5925 } 5926 return None; 5927 } 5928 5929 // Generated as internal constructor for term aluop_and. 5930 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5931 let pattern0_0 = arg0; 5932 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5933 // Rule at src/isa/s390x/inst.isle line 2696. 5934 let expr0_0 = ALUOp::And32; 5935 return Some(expr0_0); 5936 } 5937 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5938 // Rule at src/isa/s390x/inst.isle line 2697. 5939 let expr0_0 = ALUOp::And64; 5940 return Some(expr0_0); 5941 } 5942 return None; 5943 } 5944 5945 // Generated as internal constructor for term and_reg. 5946 pub fn constructor_and_reg<C: Context>( 5947 ctx: &mut C, 5948 arg0: Type, 5949 arg1: Reg, 5950 arg2: Reg, 5951 ) -> Option<Reg> { 5952 let pattern0_0 = arg0; 5953 let pattern1_0 = arg1; 5954 let pattern2_0 = arg2; 5955 // Rule at src/isa/s390x/inst.isle line 2700. 5956 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5957 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5958 return Some(expr1_0); 5959 } 5960 5961 // Generated as internal constructor for term and_uimm16shifted. 5962 pub fn constructor_and_uimm16shifted<C: Context>( 5963 ctx: &mut C, 5964 arg0: Type, 5965 arg1: Reg, 5966 arg2: UImm16Shifted, 5967 ) -> Option<Reg> { 5968 let pattern0_0 = arg0; 5969 let pattern1_0 = arg1; 5970 let pattern2_0 = arg2; 5971 // Rule at src/isa/s390x/inst.isle line 2703. 5972 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5973 let expr1_0 = 5974 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5975 return Some(expr1_0); 5976 } 5977 5978 // Generated as internal constructor for term and_uimm32shifted. 5979 pub fn constructor_and_uimm32shifted<C: Context>( 5980 ctx: &mut C, 5981 arg0: Type, 5982 arg1: Reg, 5983 arg2: UImm32Shifted, 5984 ) -> Option<Reg> { 5985 let pattern0_0 = arg0; 5986 let pattern1_0 = arg1; 5987 let pattern2_0 = arg2; 5988 // Rule at src/isa/s390x/inst.isle line 2706. 5989 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5990 let expr1_0 = 5991 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5992 return Some(expr1_0); 5993 } 5994 5995 // Generated as internal constructor for term and_mem. 5996 pub fn constructor_and_mem<C: Context>( 5997 ctx: &mut C, 5998 arg0: Type, 5999 arg1: Reg, 6000 arg2: &MemArg, 6001 ) -> Option<Reg> { 6002 let pattern0_0 = arg0; 6003 let pattern1_0 = arg1; 6004 let pattern2_0 = arg2; 6005 // Rule at src/isa/s390x/inst.isle line 2709. 6006 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6007 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6008 return Some(expr1_0); 6009 } 6010 6011 // Generated as internal constructor for term aluop_or. 6012 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6013 let pattern0_0 = arg0; 6014 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6015 // Rule at src/isa/s390x/inst.isle line 2715. 6016 let expr0_0 = ALUOp::Orr32; 6017 return Some(expr0_0); 6018 } 6019 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6020 // Rule at src/isa/s390x/inst.isle line 2716. 6021 let expr0_0 = ALUOp::Orr64; 6022 return Some(expr0_0); 6023 } 6024 return None; 6025 } 6026 6027 // Generated as internal constructor for term or_reg. 6028 pub fn constructor_or_reg<C: Context>( 6029 ctx: &mut C, 6030 arg0: Type, 6031 arg1: Reg, 6032 arg2: Reg, 6033 ) -> Option<Reg> { 6034 let pattern0_0 = arg0; 6035 let pattern1_0 = arg1; 6036 let pattern2_0 = arg2; 6037 // Rule at src/isa/s390x/inst.isle line 2719. 6038 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6039 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6040 return Some(expr1_0); 6041 } 6042 6043 // Generated as internal constructor for term or_uimm16shifted. 6044 pub fn constructor_or_uimm16shifted<C: Context>( 6045 ctx: &mut C, 6046 arg0: Type, 6047 arg1: Reg, 6048 arg2: UImm16Shifted, 6049 ) -> Option<Reg> { 6050 let pattern0_0 = arg0; 6051 let pattern1_0 = arg1; 6052 let pattern2_0 = arg2; 6053 // Rule at src/isa/s390x/inst.isle line 2722. 6054 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6055 let expr1_0 = 6056 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6057 return Some(expr1_0); 6058 } 6059 6060 // Generated as internal constructor for term or_uimm32shifted. 6061 pub fn constructor_or_uimm32shifted<C: Context>( 6062 ctx: &mut C, 6063 arg0: Type, 6064 arg1: Reg, 6065 arg2: UImm32Shifted, 6066 ) -> Option<Reg> { 6067 let pattern0_0 = arg0; 6068 let pattern1_0 = arg1; 6069 let pattern2_0 = arg2; 6070 // Rule at src/isa/s390x/inst.isle line 2725. 6071 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6072 let expr1_0 = 6073 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6074 return Some(expr1_0); 6075 } 6076 6077 // Generated as internal constructor for term or_mem. 6078 pub fn constructor_or_mem<C: Context>( 6079 ctx: &mut C, 6080 arg0: Type, 6081 arg1: Reg, 6082 arg2: &MemArg, 6083 ) -> Option<Reg> { 6084 let pattern0_0 = arg0; 6085 let pattern1_0 = arg1; 6086 let pattern2_0 = arg2; 6087 // Rule at src/isa/s390x/inst.isle line 2728. 6088 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6089 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6090 return Some(expr1_0); 6091 } 6092 6093 // Generated as internal constructor for term aluop_xor. 6094 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6095 let pattern0_0 = arg0; 6096 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6097 // Rule at src/isa/s390x/inst.isle line 2734. 6098 let expr0_0 = ALUOp::Xor32; 6099 return Some(expr0_0); 6100 } 6101 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6102 // Rule at src/isa/s390x/inst.isle line 2735. 6103 let expr0_0 = ALUOp::Xor64; 6104 return Some(expr0_0); 6105 } 6106 return None; 6107 } 6108 6109 // Generated as internal constructor for term xor_reg. 6110 pub fn constructor_xor_reg<C: Context>( 6111 ctx: &mut C, 6112 arg0: Type, 6113 arg1: Reg, 6114 arg2: Reg, 6115 ) -> Option<Reg> { 6116 let pattern0_0 = arg0; 6117 let pattern1_0 = arg1; 6118 let pattern2_0 = arg2; 6119 // Rule at src/isa/s390x/inst.isle line 2738. 6120 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6121 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6122 return Some(expr1_0); 6123 } 6124 6125 // Generated as internal constructor for term xor_uimm32shifted. 6126 pub fn constructor_xor_uimm32shifted<C: Context>( 6127 ctx: &mut C, 6128 arg0: Type, 6129 arg1: Reg, 6130 arg2: UImm32Shifted, 6131 ) -> Option<Reg> { 6132 let pattern0_0 = arg0; 6133 let pattern1_0 = arg1; 6134 let pattern2_0 = arg2; 6135 // Rule at src/isa/s390x/inst.isle line 2741. 6136 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6137 let expr1_0 = 6138 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6139 return Some(expr1_0); 6140 } 6141 6142 // Generated as internal constructor for term xor_mem. 6143 pub fn constructor_xor_mem<C: Context>( 6144 ctx: &mut C, 6145 arg0: Type, 6146 arg1: Reg, 6147 arg2: &MemArg, 6148 ) -> Option<Reg> { 6149 let pattern0_0 = arg0; 6150 let pattern1_0 = arg1; 6151 let pattern2_0 = arg2; 6152 // Rule at src/isa/s390x/inst.isle line 2744. 6153 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6154 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6155 return Some(expr1_0); 6156 } 6157 6158 // Generated as internal constructor for term push_xor_uimm32shifted. 6159 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6160 ctx: &mut C, 6161 arg0: &VecMInstBuilder, 6162 arg1: Type, 6163 arg2: WritableReg, 6164 arg3: Reg, 6165 arg4: UImm32Shifted, 6166 ) -> Option<Reg> { 6167 let pattern0_0 = arg0; 6168 let pattern1_0 = arg1; 6169 let pattern2_0 = arg2; 6170 let pattern3_0 = arg3; 6171 let pattern4_0 = arg4; 6172 // Rule at src/isa/s390x/inst.isle line 2747. 6173 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6174 let expr1_0 = constructor_push_alu_uimm32shifted( 6175 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6176 )?; 6177 return Some(expr1_0); 6178 } 6179 6180 // Generated as internal constructor for term not_reg. 6181 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6182 let pattern0_0 = arg0; 6183 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6184 let pattern2_0 = arg1; 6185 // Rule at src/isa/s390x/inst.isle line 2753. 6186 let expr0_0: u32 = 4294967295; 6187 let expr1_0: u8 = 0; 6188 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6189 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6190 return Some(expr3_0); 6191 } 6192 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6193 let pattern2_0 = arg1; 6194 // Rule at src/isa/s390x/inst.isle line 2755. 6195 let expr0_0: u32 = 4294967295; 6196 let expr1_0: u8 = 0; 6197 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6198 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6199 let expr4_0: u32 = 4294967295; 6200 let expr5_0: u8 = 32; 6201 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6202 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6203 return Some(expr7_0); 6204 } 6205 return None; 6206 } 6207 6208 // Generated as internal constructor for term push_not_reg. 6209 pub fn constructor_push_not_reg<C: Context>( 6210 ctx: &mut C, 6211 arg0: &VecMInstBuilder, 6212 arg1: Type, 6213 arg2: WritableReg, 6214 arg3: Reg, 6215 ) -> Option<Reg> { 6216 let pattern0_0 = arg0; 6217 let pattern1_0 = arg1; 6218 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6219 let pattern3_0 = arg2; 6220 let pattern4_0 = arg3; 6221 // Rule at src/isa/s390x/inst.isle line 2761. 6222 let expr0_0: u32 = 4294967295; 6223 let expr1_0: u8 = 0; 6224 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6225 let expr3_0 = constructor_push_xor_uimm32shifted( 6226 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6227 )?; 6228 return Some(expr3_0); 6229 } 6230 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6231 let pattern3_0 = arg2; 6232 let pattern4_0 = arg3; 6233 // Rule at src/isa/s390x/inst.isle line 2763. 6234 let expr0_0: u32 = 4294967295; 6235 let expr1_0: u8 = 0; 6236 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6237 let expr3_0 = constructor_push_xor_uimm32shifted( 6238 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6239 )?; 6240 let expr4_0: u32 = 4294967295; 6241 let expr5_0: u8 = 32; 6242 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6243 let expr7_0 = constructor_push_xor_uimm32shifted( 6244 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6245 )?; 6246 return Some(expr7_0); 6247 } 6248 return None; 6249 } 6250 6251 // Generated as internal constructor for term aluop_and_not. 6252 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6253 let pattern0_0 = arg0; 6254 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6255 // Rule at src/isa/s390x/inst.isle line 2771. 6256 let expr0_0 = ALUOp::AndNot32; 6257 return Some(expr0_0); 6258 } 6259 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6260 // Rule at src/isa/s390x/inst.isle line 2772. 6261 let expr0_0 = ALUOp::AndNot64; 6262 return Some(expr0_0); 6263 } 6264 return None; 6265 } 6266 6267 // Generated as internal constructor for term and_not_reg. 6268 pub fn constructor_and_not_reg<C: Context>( 6269 ctx: &mut C, 6270 arg0: Type, 6271 arg1: Reg, 6272 arg2: Reg, 6273 ) -> Option<Reg> { 6274 let pattern0_0 = arg0; 6275 let pattern1_0 = arg1; 6276 let pattern2_0 = arg2; 6277 // Rule at src/isa/s390x/inst.isle line 2775. 6278 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6279 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6280 return Some(expr1_0); 6281 } 6282 6283 // Generated as internal constructor for term aluop_or_not. 6284 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6285 let pattern0_0 = arg0; 6286 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6287 // Rule at src/isa/s390x/inst.isle line 2781. 6288 let expr0_0 = ALUOp::OrrNot32; 6289 return Some(expr0_0); 6290 } 6291 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6292 // Rule at src/isa/s390x/inst.isle line 2782. 6293 let expr0_0 = ALUOp::OrrNot64; 6294 return Some(expr0_0); 6295 } 6296 return None; 6297 } 6298 6299 // Generated as internal constructor for term or_not_reg. 6300 pub fn constructor_or_not_reg<C: Context>( 6301 ctx: &mut C, 6302 arg0: Type, 6303 arg1: Reg, 6304 arg2: Reg, 6305 ) -> Option<Reg> { 6306 let pattern0_0 = arg0; 6307 let pattern1_0 = arg1; 6308 let pattern2_0 = arg2; 6309 // Rule at src/isa/s390x/inst.isle line 2785. 6310 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6311 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6312 return Some(expr1_0); 6313 } 6314 6315 // Generated as internal constructor for term aluop_xor_not. 6316 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6317 let pattern0_0 = arg0; 6318 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6319 // Rule at src/isa/s390x/inst.isle line 2791. 6320 let expr0_0 = ALUOp::XorNot32; 6321 return Some(expr0_0); 6322 } 6323 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6324 // Rule at src/isa/s390x/inst.isle line 2792. 6325 let expr0_0 = ALUOp::XorNot64; 6326 return Some(expr0_0); 6327 } 6328 return None; 6329 } 6330 6331 // Generated as internal constructor for term xor_not_reg. 6332 pub fn constructor_xor_not_reg<C: Context>( 6333 ctx: &mut C, 6334 arg0: Type, 6335 arg1: Reg, 6336 arg2: Reg, 6337 ) -> Option<Reg> { 6338 let pattern0_0 = arg0; 6339 let pattern1_0 = arg1; 6340 let pattern2_0 = arg2; 6341 // Rule at src/isa/s390x/inst.isle line 2795. 6342 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6343 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6344 return Some(expr1_0); 6345 } 6346 6347 // Generated as internal constructor for term unaryop_abs. 6348 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6349 let pattern0_0 = arg0; 6350 if pattern0_0 == I32 { 6351 // Rule at src/isa/s390x/inst.isle line 2801. 6352 let expr0_0 = UnaryOp::Abs32; 6353 return Some(expr0_0); 6354 } 6355 if pattern0_0 == I64 { 6356 // Rule at src/isa/s390x/inst.isle line 2802. 6357 let expr0_0 = UnaryOp::Abs64; 6358 return Some(expr0_0); 6359 } 6360 return None; 6361 } 6362 6363 // Generated as internal constructor for term unaryop_abs_sext32. 6364 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6365 let pattern0_0 = arg0; 6366 if pattern0_0 == I64 { 6367 // Rule at src/isa/s390x/inst.isle line 2805. 6368 let expr0_0 = UnaryOp::Abs64Ext32; 6369 return Some(expr0_0); 6370 } 6371 return None; 6372 } 6373 6374 // Generated as internal constructor for term abs_reg. 6375 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6376 let pattern0_0 = arg0; 6377 let pattern1_0 = arg1; 6378 // Rule at src/isa/s390x/inst.isle line 2808. 6379 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6380 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6381 return Some(expr1_0); 6382 } 6383 6384 // Generated as internal constructor for term abs_reg_sext32. 6385 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6386 let pattern0_0 = arg0; 6387 let pattern1_0 = arg1; 6388 // Rule at src/isa/s390x/inst.isle line 2811. 6389 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6390 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6391 return Some(expr1_0); 6392 } 6393 6394 // Generated as internal constructor for term unaryop_neg. 6395 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6396 let pattern0_0 = arg0; 6397 if pattern0_0 == I8 { 6398 // Rule at src/isa/s390x/inst.isle line 2817. 6399 let expr0_0 = UnaryOp::Neg32; 6400 return Some(expr0_0); 6401 } 6402 if pattern0_0 == I16 { 6403 // Rule at src/isa/s390x/inst.isle line 2818. 6404 let expr0_0 = UnaryOp::Neg32; 6405 return Some(expr0_0); 6406 } 6407 if pattern0_0 == I32 { 6408 // Rule at src/isa/s390x/inst.isle line 2819. 6409 let expr0_0 = UnaryOp::Neg32; 6410 return Some(expr0_0); 6411 } 6412 if pattern0_0 == I64 { 6413 // Rule at src/isa/s390x/inst.isle line 2820. 6414 let expr0_0 = UnaryOp::Neg64; 6415 return Some(expr0_0); 6416 } 6417 return None; 6418 } 6419 6420 // Generated as internal constructor for term unaryop_neg_sext32. 6421 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6422 let pattern0_0 = arg0; 6423 if pattern0_0 == I64 { 6424 // Rule at src/isa/s390x/inst.isle line 2823. 6425 let expr0_0 = UnaryOp::Neg64Ext32; 6426 return Some(expr0_0); 6427 } 6428 return None; 6429 } 6430 6431 // Generated as internal constructor for term neg_reg. 6432 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6433 let pattern0_0 = arg0; 6434 let pattern1_0 = arg1; 6435 // Rule at src/isa/s390x/inst.isle line 2826. 6436 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6437 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6438 return Some(expr1_0); 6439 } 6440 6441 // Generated as internal constructor for term neg_reg_sext32. 6442 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6443 let pattern0_0 = arg0; 6444 let pattern1_0 = arg1; 6445 // Rule at src/isa/s390x/inst.isle line 2829. 6446 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6447 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6448 return Some(expr1_0); 6449 } 6450 6451 // Generated as internal constructor for term unaryop_bswap. 6452 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6453 let pattern0_0 = arg0; 6454 if pattern0_0 == I32 { 6455 // Rule at src/isa/s390x/inst.isle line 2835. 6456 let expr0_0 = UnaryOp::BSwap32; 6457 return Some(expr0_0); 6458 } 6459 if pattern0_0 == I64 { 6460 // Rule at src/isa/s390x/inst.isle line 2836. 6461 let expr0_0 = UnaryOp::BSwap64; 6462 return Some(expr0_0); 6463 } 6464 return None; 6465 } 6466 6467 // Generated as internal constructor for term bswap_reg. 6468 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6469 let pattern0_0 = arg0; 6470 let pattern1_0 = arg1; 6471 // Rule at src/isa/s390x/inst.isle line 2839. 6472 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6473 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6474 return Some(expr1_0); 6475 } 6476 6477 // Generated as internal constructor for term push_bswap_reg. 6478 pub fn constructor_push_bswap_reg<C: Context>( 6479 ctx: &mut C, 6480 arg0: &VecMInstBuilder, 6481 arg1: Type, 6482 arg2: WritableReg, 6483 arg3: Reg, 6484 ) -> Option<Reg> { 6485 let pattern0_0 = arg0; 6486 let pattern1_0 = arg1; 6487 let pattern2_0 = arg2; 6488 let pattern3_0 = arg3; 6489 // Rule at src/isa/s390x/inst.isle line 2842. 6490 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6491 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6492 return Some(expr1_0); 6493 } 6494 6495 // Generated as internal constructor for term shiftop_rot. 6496 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6497 let pattern0_0 = arg0; 6498 if pattern0_0 == I32 { 6499 // Rule at src/isa/s390x/inst.isle line 2848. 6500 let expr0_0 = ShiftOp::RotL32; 6501 return Some(expr0_0); 6502 } 6503 if pattern0_0 == I64 { 6504 // Rule at src/isa/s390x/inst.isle line 2849. 6505 let expr0_0 = ShiftOp::RotL64; 6506 return Some(expr0_0); 6507 } 6508 return None; 6509 } 6510 6511 // Generated as internal constructor for term rot_reg. 6512 pub fn constructor_rot_reg<C: Context>( 6513 ctx: &mut C, 6514 arg0: Type, 6515 arg1: Reg, 6516 arg2: Reg, 6517 ) -> Option<Reg> { 6518 let pattern0_0 = arg0; 6519 let pattern1_0 = arg1; 6520 let pattern2_0 = arg2; 6521 // Rule at src/isa/s390x/inst.isle line 2852. 6522 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6523 let expr1_0: u8 = 0; 6524 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6525 return Some(expr2_0); 6526 } 6527 6528 // Generated as internal constructor for term rot_imm. 6529 pub fn constructor_rot_imm<C: Context>( 6530 ctx: &mut C, 6531 arg0: Type, 6532 arg1: Reg, 6533 arg2: u8, 6534 ) -> Option<Reg> { 6535 let pattern0_0 = arg0; 6536 let pattern1_0 = arg1; 6537 let pattern2_0 = arg2; 6538 // Rule at src/isa/s390x/inst.isle line 2856. 6539 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6540 let expr1_0 = C::zero_reg(ctx); 6541 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6542 return Some(expr2_0); 6543 } 6544 6545 // Generated as internal constructor for term rot_imm_reg. 6546 pub fn constructor_rot_imm_reg<C: Context>( 6547 ctx: &mut C, 6548 arg0: Type, 6549 arg1: Reg, 6550 arg2: u8, 6551 arg3: Reg, 6552 ) -> Option<Reg> { 6553 let pattern0_0 = arg0; 6554 let pattern1_0 = arg1; 6555 let pattern2_0 = arg2; 6556 let pattern3_0 = arg3; 6557 // Rule at src/isa/s390x/inst.isle line 2860. 6558 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6559 let expr1_0 = constructor_shift_rr( 6560 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6561 )?; 6562 return Some(expr1_0); 6563 } 6564 6565 // Generated as internal constructor for term push_rot_imm_reg. 6566 pub fn constructor_push_rot_imm_reg<C: Context>( 6567 ctx: &mut C, 6568 arg0: &VecMInstBuilder, 6569 arg1: Type, 6570 arg2: WritableReg, 6571 arg3: Reg, 6572 arg4: u8, 6573 arg5: Reg, 6574 ) -> Option<Reg> { 6575 let pattern0_0 = arg0; 6576 let pattern1_0 = arg1; 6577 let pattern2_0 = arg2; 6578 let pattern3_0 = arg3; 6579 let pattern4_0 = arg4; 6580 let pattern5_0 = arg5; 6581 // Rule at src/isa/s390x/inst.isle line 2864. 6582 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6583 let expr1_0 = constructor_push_shift( 6584 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6585 )?; 6586 return Some(expr1_0); 6587 } 6588 6589 // Generated as internal constructor for term shiftop_lshl. 6590 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6591 let pattern0_0 = arg0; 6592 if pattern0_0 == I8 { 6593 // Rule at src/isa/s390x/inst.isle line 2871. 6594 let expr0_0 = ShiftOp::LShL32; 6595 return Some(expr0_0); 6596 } 6597 if pattern0_0 == I16 { 6598 // Rule at src/isa/s390x/inst.isle line 2872. 6599 let expr0_0 = ShiftOp::LShL32; 6600 return Some(expr0_0); 6601 } 6602 if pattern0_0 == I32 { 6603 // Rule at src/isa/s390x/inst.isle line 2873. 6604 let expr0_0 = ShiftOp::LShL32; 6605 return Some(expr0_0); 6606 } 6607 if pattern0_0 == I64 { 6608 // Rule at src/isa/s390x/inst.isle line 2874. 6609 let expr0_0 = ShiftOp::LShL64; 6610 return Some(expr0_0); 6611 } 6612 return None; 6613 } 6614 6615 // Generated as internal constructor for term lshl_reg. 6616 pub fn constructor_lshl_reg<C: Context>( 6617 ctx: &mut C, 6618 arg0: Type, 6619 arg1: Reg, 6620 arg2: Reg, 6621 ) -> Option<Reg> { 6622 let pattern0_0 = arg0; 6623 let pattern1_0 = arg1; 6624 let pattern2_0 = arg2; 6625 // Rule at src/isa/s390x/inst.isle line 2877. 6626 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6627 let expr1_0: u8 = 0; 6628 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6629 return Some(expr2_0); 6630 } 6631 6632 // Generated as internal constructor for term lshl_imm. 6633 pub fn constructor_lshl_imm<C: Context>( 6634 ctx: &mut C, 6635 arg0: Type, 6636 arg1: Reg, 6637 arg2: u8, 6638 ) -> Option<Reg> { 6639 let pattern0_0 = arg0; 6640 let pattern1_0 = arg1; 6641 let pattern2_0 = arg2; 6642 // Rule at src/isa/s390x/inst.isle line 2881. 6643 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6644 let expr1_0 = C::zero_reg(ctx); 6645 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6646 return Some(expr2_0); 6647 } 6648 6649 // Generated as internal constructor for term shiftop_lshr. 6650 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6651 let pattern0_0 = arg0; 6652 if pattern0_0 == I32 { 6653 // Rule at src/isa/s390x/inst.isle line 2888. 6654 let expr0_0 = ShiftOp::LShR32; 6655 return Some(expr0_0); 6656 } 6657 if pattern0_0 == I64 { 6658 // Rule at src/isa/s390x/inst.isle line 2889. 6659 let expr0_0 = ShiftOp::LShR64; 6660 return Some(expr0_0); 6661 } 6662 return None; 6663 } 6664 6665 // Generated as internal constructor for term lshr_reg. 6666 pub fn constructor_lshr_reg<C: Context>( 6667 ctx: &mut C, 6668 arg0: Type, 6669 arg1: Reg, 6670 arg2: Reg, 6671 ) -> Option<Reg> { 6672 let pattern0_0 = arg0; 6673 let pattern1_0 = arg1; 6674 let pattern2_0 = arg2; 6675 // Rule at src/isa/s390x/inst.isle line 2892. 6676 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6677 let expr1_0: u8 = 0; 6678 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6679 return Some(expr2_0); 6680 } 6681 6682 // Generated as internal constructor for term lshr_imm. 6683 pub fn constructor_lshr_imm<C: Context>( 6684 ctx: &mut C, 6685 arg0: Type, 6686 arg1: Reg, 6687 arg2: u8, 6688 ) -> Option<Reg> { 6689 let pattern0_0 = arg0; 6690 let pattern1_0 = arg1; 6691 let pattern2_0 = arg2; 6692 // Rule at src/isa/s390x/inst.isle line 2896. 6693 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6694 let expr1_0 = C::zero_reg(ctx); 6695 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6696 return Some(expr2_0); 6697 } 6698 6699 // Generated as internal constructor for term shiftop_ashr. 6700 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6701 let pattern0_0 = arg0; 6702 if pattern0_0 == I32 { 6703 // Rule at src/isa/s390x/inst.isle line 2903. 6704 let expr0_0 = ShiftOp::AShR32; 6705 return Some(expr0_0); 6706 } 6707 if pattern0_0 == I64 { 6708 // Rule at src/isa/s390x/inst.isle line 2904. 6709 let expr0_0 = ShiftOp::AShR64; 6710 return Some(expr0_0); 6711 } 6712 return None; 6713 } 6714 6715 // Generated as internal constructor for term ashr_reg. 6716 pub fn constructor_ashr_reg<C: Context>( 6717 ctx: &mut C, 6718 arg0: Type, 6719 arg1: Reg, 6720 arg2: Reg, 6721 ) -> Option<Reg> { 6722 let pattern0_0 = arg0; 6723 let pattern1_0 = arg1; 6724 let pattern2_0 = arg2; 6725 // Rule at src/isa/s390x/inst.isle line 2907. 6726 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6727 let expr1_0: u8 = 0; 6728 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6729 return Some(expr2_0); 6730 } 6731 6732 // Generated as internal constructor for term ashr_imm. 6733 pub fn constructor_ashr_imm<C: Context>( 6734 ctx: &mut C, 6735 arg0: Type, 6736 arg1: Reg, 6737 arg2: u8, 6738 ) -> Option<Reg> { 6739 let pattern0_0 = arg0; 6740 let pattern1_0 = arg1; 6741 let pattern2_0 = arg2; 6742 // Rule at src/isa/s390x/inst.isle line 2911. 6743 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6744 let expr1_0 = C::zero_reg(ctx); 6745 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6746 return Some(expr2_0); 6747 } 6748 6749 // Generated as internal constructor for term popcnt_byte. 6750 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6751 let pattern0_0 = arg0; 6752 // Rule at src/isa/s390x/inst.isle line 2918. 6753 let expr0_0: Type = I64; 6754 let expr1_0 = UnaryOp::PopcntByte; 6755 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6756 return Some(expr2_0); 6757 } 6758 6759 // Generated as internal constructor for term popcnt_reg. 6760 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6761 let pattern0_0 = arg0; 6762 // Rule at src/isa/s390x/inst.isle line 2921. 6763 let expr0_0: Type = I64; 6764 let expr1_0 = UnaryOp::PopcntReg; 6765 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6766 return Some(expr2_0); 6767 } 6768 6769 // Generated as internal constructor for term atomic_rmw_and. 6770 pub fn constructor_atomic_rmw_and<C: Context>( 6771 ctx: &mut C, 6772 arg0: Type, 6773 arg1: Reg, 6774 arg2: &MemArg, 6775 ) -> Option<Reg> { 6776 let pattern0_0 = arg0; 6777 if pattern0_0 == I32 { 6778 let pattern2_0 = arg1; 6779 let pattern3_0 = arg2; 6780 // Rule at src/isa/s390x/inst.isle line 2927. 6781 let expr0_0: Type = I32; 6782 let expr1_0 = ALUOp::And32; 6783 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6784 return Some(expr2_0); 6785 } 6786 if pattern0_0 == I64 { 6787 let pattern2_0 = arg1; 6788 let pattern3_0 = arg2; 6789 // Rule at src/isa/s390x/inst.isle line 2928. 6790 let expr0_0: Type = I64; 6791 let expr1_0 = ALUOp::And64; 6792 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6793 return Some(expr2_0); 6794 } 6795 return None; 6796 } 6797 6798 // Generated as internal constructor for term atomic_rmw_or. 6799 pub fn constructor_atomic_rmw_or<C: Context>( 6800 ctx: &mut C, 6801 arg0: Type, 6802 arg1: Reg, 6803 arg2: &MemArg, 6804 ) -> Option<Reg> { 6805 let pattern0_0 = arg0; 6806 if pattern0_0 == I32 { 6807 let pattern2_0 = arg1; 6808 let pattern3_0 = arg2; 6809 // Rule at src/isa/s390x/inst.isle line 2931. 6810 let expr0_0: Type = I32; 6811 let expr1_0 = ALUOp::Orr32; 6812 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6813 return Some(expr2_0); 6814 } 6815 if pattern0_0 == I64 { 6816 let pattern2_0 = arg1; 6817 let pattern3_0 = arg2; 6818 // Rule at src/isa/s390x/inst.isle line 2932. 6819 let expr0_0: Type = I64; 6820 let expr1_0 = ALUOp::Orr64; 6821 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6822 return Some(expr2_0); 6823 } 6824 return None; 6825 } 6826 6827 // Generated as internal constructor for term atomic_rmw_xor. 6828 pub fn constructor_atomic_rmw_xor<C: Context>( 6829 ctx: &mut C, 6830 arg0: Type, 6831 arg1: Reg, 6832 arg2: &MemArg, 6833 ) -> Option<Reg> { 6834 let pattern0_0 = arg0; 6835 if pattern0_0 == I32 { 6836 let pattern2_0 = arg1; 6837 let pattern3_0 = arg2; 6838 // Rule at src/isa/s390x/inst.isle line 2935. 6839 let expr0_0: Type = I32; 6840 let expr1_0 = ALUOp::Xor32; 6841 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6842 return Some(expr2_0); 6843 } 6844 if pattern0_0 == I64 { 6845 let pattern2_0 = arg1; 6846 let pattern3_0 = arg2; 6847 // Rule at src/isa/s390x/inst.isle line 2936. 6848 let expr0_0: Type = I64; 6849 let expr1_0 = ALUOp::Xor64; 6850 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6851 return Some(expr2_0); 6852 } 6853 return None; 6854 } 6855 6856 // Generated as internal constructor for term atomic_rmw_add. 6857 pub fn constructor_atomic_rmw_add<C: Context>( 6858 ctx: &mut C, 6859 arg0: Type, 6860 arg1: Reg, 6861 arg2: &MemArg, 6862 ) -> Option<Reg> { 6863 let pattern0_0 = arg0; 6864 if pattern0_0 == I32 { 6865 let pattern2_0 = arg1; 6866 let pattern3_0 = arg2; 6867 // Rule at src/isa/s390x/inst.isle line 2939. 6868 let expr0_0: Type = I32; 6869 let expr1_0 = ALUOp::Add32; 6870 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6871 return Some(expr2_0); 6872 } 6873 if pattern0_0 == I64 { 6874 let pattern2_0 = arg1; 6875 let pattern3_0 = arg2; 6876 // Rule at src/isa/s390x/inst.isle line 2940. 6877 let expr0_0: Type = I64; 6878 let expr1_0 = ALUOp::Add64; 6879 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6880 return Some(expr2_0); 6881 } 6882 return None; 6883 } 6884 6885 // Generated as internal constructor for term atomic_cas_impl. 6886 pub fn constructor_atomic_cas_impl<C: Context>( 6887 ctx: &mut C, 6888 arg0: Type, 6889 arg1: Reg, 6890 arg2: Reg, 6891 arg3: &MemArg, 6892 ) -> Option<Reg> { 6893 let pattern0_0 = arg0; 6894 if pattern0_0 == I32 { 6895 let pattern2_0 = arg1; 6896 let pattern3_0 = arg2; 6897 let pattern4_0 = arg3; 6898 // Rule at src/isa/s390x/inst.isle line 2946. 6899 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6900 return Some(expr0_0); 6901 } 6902 if pattern0_0 == I64 { 6903 let pattern2_0 = arg1; 6904 let pattern3_0 = arg2; 6905 let pattern4_0 = arg3; 6906 // Rule at src/isa/s390x/inst.isle line 2947. 6907 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6908 return Some(expr0_0); 6909 } 6910 return None; 6911 } 6912 6913 // Generated as internal constructor for term push_atomic_cas. 6914 pub fn constructor_push_atomic_cas<C: Context>( 6915 ctx: &mut C, 6916 arg0: &VecMInstBuilder, 6917 arg1: Type, 6918 arg2: WritableReg, 6919 arg3: Reg, 6920 arg4: &MemArg, 6921 ) -> Option<Reg> { 6922 let pattern0_0 = arg0; 6923 let pattern1_0 = arg1; 6924 if pattern1_0 == I32 { 6925 let pattern3_0 = arg2; 6926 let pattern4_0 = arg3; 6927 let pattern5_0 = arg4; 6928 // Rule at src/isa/s390x/inst.isle line 2950. 6929 let expr0_0 = 6930 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6931 return Some(expr0_0); 6932 } 6933 if pattern1_0 == I64 { 6934 let pattern3_0 = arg2; 6935 let pattern4_0 = arg3; 6936 let pattern5_0 = arg4; 6937 // Rule at src/isa/s390x/inst.isle line 2951. 6938 let expr0_0 = 6939 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6940 return Some(expr0_0); 6941 } 6942 return None; 6943 } 6944 6945 // Generated as internal constructor for term fpuop2_add. 6946 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6947 let pattern0_0 = arg0; 6948 if pattern0_0 == F32 { 6949 // Rule at src/isa/s390x/inst.isle line 2957. 6950 let expr0_0 = FPUOp2::Add32; 6951 return Some(expr0_0); 6952 } 6953 if pattern0_0 == F64 { 6954 // Rule at src/isa/s390x/inst.isle line 2958. 6955 let expr0_0 = FPUOp2::Add64; 6956 return Some(expr0_0); 6957 } 6958 return None; 6959 } 6960 6961 // Generated as internal constructor for term fadd_reg. 6962 pub fn constructor_fadd_reg<C: Context>( 6963 ctx: &mut C, 6964 arg0: Type, 6965 arg1: Reg, 6966 arg2: Reg, 6967 ) -> Option<Reg> { 6968 let pattern0_0 = arg0; 6969 let pattern1_0 = arg1; 6970 let pattern2_0 = arg2; 6971 // Rule at src/isa/s390x/inst.isle line 2961. 6972 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6973 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6974 return Some(expr1_0); 6975 } 6976 6977 // Generated as internal constructor for term fpuop2_sub. 6978 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6979 let pattern0_0 = arg0; 6980 if pattern0_0 == F32 { 6981 // Rule at src/isa/s390x/inst.isle line 2967. 6982 let expr0_0 = FPUOp2::Sub32; 6983 return Some(expr0_0); 6984 } 6985 if pattern0_0 == F64 { 6986 // Rule at src/isa/s390x/inst.isle line 2968. 6987 let expr0_0 = FPUOp2::Sub64; 6988 return Some(expr0_0); 6989 } 6990 return None; 6991 } 6992 6993 // Generated as internal constructor for term fsub_reg. 6994 pub fn constructor_fsub_reg<C: Context>( 6995 ctx: &mut C, 6996 arg0: Type, 6997 arg1: Reg, 6998 arg2: Reg, 6999 ) -> Option<Reg> { 7000 let pattern0_0 = arg0; 7001 let pattern1_0 = arg1; 7002 let pattern2_0 = arg2; 7003 // Rule at src/isa/s390x/inst.isle line 2971. 7004 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7005 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7006 return Some(expr1_0); 7007 } 7008 7009 // Generated as internal constructor for term fpuop2_mul. 7010 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7011 let pattern0_0 = arg0; 7012 if pattern0_0 == F32 { 7013 // Rule at src/isa/s390x/inst.isle line 2977. 7014 let expr0_0 = FPUOp2::Mul32; 7015 return Some(expr0_0); 7016 } 7017 if pattern0_0 == F64 { 7018 // Rule at src/isa/s390x/inst.isle line 2978. 7019 let expr0_0 = FPUOp2::Mul64; 7020 return Some(expr0_0); 7021 } 7022 return None; 7023 } 7024 7025 // Generated as internal constructor for term fmul_reg. 7026 pub fn constructor_fmul_reg<C: Context>( 7027 ctx: &mut C, 7028 arg0: Type, 7029 arg1: Reg, 7030 arg2: Reg, 7031 ) -> Option<Reg> { 7032 let pattern0_0 = arg0; 7033 let pattern1_0 = arg1; 7034 let pattern2_0 = arg2; 7035 // Rule at src/isa/s390x/inst.isle line 2981. 7036 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7037 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7038 return Some(expr1_0); 7039 } 7040 7041 // Generated as internal constructor for term fpuop2_div. 7042 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7043 let pattern0_0 = arg0; 7044 if pattern0_0 == F32 { 7045 // Rule at src/isa/s390x/inst.isle line 2987. 7046 let expr0_0 = FPUOp2::Div32; 7047 return Some(expr0_0); 7048 } 7049 if pattern0_0 == F64 { 7050 // Rule at src/isa/s390x/inst.isle line 2988. 7051 let expr0_0 = FPUOp2::Div64; 7052 return Some(expr0_0); 7053 } 7054 return None; 7055 } 7056 7057 // Generated as internal constructor for term fdiv_reg. 7058 pub fn constructor_fdiv_reg<C: Context>( 7059 ctx: &mut C, 7060 arg0: Type, 7061 arg1: Reg, 7062 arg2: Reg, 7063 ) -> Option<Reg> { 7064 let pattern0_0 = arg0; 7065 let pattern1_0 = arg1; 7066 let pattern2_0 = arg2; 7067 // Rule at src/isa/s390x/inst.isle line 2991. 7068 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7069 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7070 return Some(expr1_0); 7071 } 7072 7073 // Generated as internal constructor for term fpuop2_min. 7074 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7075 let pattern0_0 = arg0; 7076 if pattern0_0 == F32 { 7077 // Rule at src/isa/s390x/inst.isle line 2997. 7078 let expr0_0 = FPUOp2::Min32; 7079 return Some(expr0_0); 7080 } 7081 if pattern0_0 == F64 { 7082 // Rule at src/isa/s390x/inst.isle line 2998. 7083 let expr0_0 = FPUOp2::Min64; 7084 return Some(expr0_0); 7085 } 7086 return None; 7087 } 7088 7089 // Generated as internal constructor for term fmin_reg. 7090 pub fn constructor_fmin_reg<C: Context>( 7091 ctx: &mut C, 7092 arg0: Type, 7093 arg1: Reg, 7094 arg2: Reg, 7095 ) -> Option<Reg> { 7096 let pattern0_0 = arg0; 7097 let pattern1_0 = arg1; 7098 let pattern2_0 = arg2; 7099 // Rule at src/isa/s390x/inst.isle line 3001. 7100 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7101 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7102 return Some(expr1_0); 7103 } 7104 7105 // Generated as internal constructor for term fpuop2_max. 7106 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7107 let pattern0_0 = arg0; 7108 if pattern0_0 == F32 { 7109 // Rule at src/isa/s390x/inst.isle line 3007. 7110 let expr0_0 = FPUOp2::Max32; 7111 return Some(expr0_0); 7112 } 7113 if pattern0_0 == F64 { 7114 // Rule at src/isa/s390x/inst.isle line 3008. 7115 let expr0_0 = FPUOp2::Max64; 7116 return Some(expr0_0); 7117 } 7118 return None; 7119 } 7120 7121 // Generated as internal constructor for term fmax_reg. 7122 pub fn constructor_fmax_reg<C: Context>( 7123 ctx: &mut C, 7124 arg0: Type, 7125 arg1: Reg, 7126 arg2: Reg, 7127 ) -> Option<Reg> { 7128 let pattern0_0 = arg0; 7129 let pattern1_0 = arg1; 7130 let pattern2_0 = arg2; 7131 // Rule at src/isa/s390x/inst.isle line 3011. 7132 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7133 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7134 return Some(expr1_0); 7135 } 7136 7137 // Generated as internal constructor for term fpuop3_fma. 7138 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7139 let pattern0_0 = arg0; 7140 if pattern0_0 == F32 { 7141 // Rule at src/isa/s390x/inst.isle line 3017. 7142 let expr0_0 = FPUOp3::MAdd32; 7143 return Some(expr0_0); 7144 } 7145 if pattern0_0 == F64 { 7146 // Rule at src/isa/s390x/inst.isle line 3018. 7147 let expr0_0 = FPUOp3::MAdd64; 7148 return Some(expr0_0); 7149 } 7150 return None; 7151 } 7152 7153 // Generated as internal constructor for term fma_reg. 7154 pub fn constructor_fma_reg<C: Context>( 7155 ctx: &mut C, 7156 arg0: Type, 7157 arg1: Reg, 7158 arg2: Reg, 7159 arg3: Reg, 7160 ) -> Option<Reg> { 7161 let pattern0_0 = arg0; 7162 let pattern1_0 = arg1; 7163 let pattern2_0 = arg2; 7164 let pattern3_0 = arg3; 7165 // Rule at src/isa/s390x/inst.isle line 3021. 7166 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7167 let expr1_0 = constructor_fpu_rrrr( 7168 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7169 )?; 7170 return Some(expr1_0); 7171 } 7172 7173 // Generated as internal constructor for term fpuop1_sqrt. 7174 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7175 let pattern0_0 = arg0; 7176 if pattern0_0 == F32 { 7177 // Rule at src/isa/s390x/inst.isle line 3027. 7178 let expr0_0 = FPUOp1::Sqrt32; 7179 return Some(expr0_0); 7180 } 7181 if pattern0_0 == F64 { 7182 // Rule at src/isa/s390x/inst.isle line 3028. 7183 let expr0_0 = FPUOp1::Sqrt64; 7184 return Some(expr0_0); 7185 } 7186 return None; 7187 } 7188 7189 // Generated as internal constructor for term sqrt_reg. 7190 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7191 let pattern0_0 = arg0; 7192 let pattern1_0 = arg1; 7193 // Rule at src/isa/s390x/inst.isle line 3031. 7194 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7195 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7196 return Some(expr1_0); 7197 } 7198 7199 // Generated as internal constructor for term fpuop1_neg. 7200 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7201 let pattern0_0 = arg0; 7202 if pattern0_0 == F32 { 7203 // Rule at src/isa/s390x/inst.isle line 3037. 7204 let expr0_0 = FPUOp1::Neg32; 7205 return Some(expr0_0); 7206 } 7207 if pattern0_0 == F64 { 7208 // Rule at src/isa/s390x/inst.isle line 3038. 7209 let expr0_0 = FPUOp1::Neg64; 7210 return Some(expr0_0); 7211 } 7212 return None; 7213 } 7214 7215 // Generated as internal constructor for term fneg_reg. 7216 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7217 let pattern0_0 = arg0; 7218 let pattern1_0 = arg1; 7219 // Rule at src/isa/s390x/inst.isle line 3041. 7220 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7221 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7222 return Some(expr1_0); 7223 } 7224 7225 // Generated as internal constructor for term fpuop1_abs. 7226 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7227 let pattern0_0 = arg0; 7228 if pattern0_0 == F32 { 7229 // Rule at src/isa/s390x/inst.isle line 3047. 7230 let expr0_0 = FPUOp1::Abs32; 7231 return Some(expr0_0); 7232 } 7233 if pattern0_0 == F64 { 7234 // Rule at src/isa/s390x/inst.isle line 3048. 7235 let expr0_0 = FPUOp1::Abs64; 7236 return Some(expr0_0); 7237 } 7238 return None; 7239 } 7240 7241 // Generated as internal constructor for term fabs_reg. 7242 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7243 let pattern0_0 = arg0; 7244 let pattern1_0 = arg1; 7245 // Rule at src/isa/s390x/inst.isle line 3051. 7246 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7247 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7248 return Some(expr1_0); 7249 } 7250 7251 // Generated as internal constructor for term fpuroundmode_ceil. 7252 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7253 let pattern0_0 = arg0; 7254 if pattern0_0 == F32 { 7255 // Rule at src/isa/s390x/inst.isle line 3057. 7256 let expr0_0 = FpuRoundMode::Plus32; 7257 return Some(expr0_0); 7258 } 7259 if pattern0_0 == F64 { 7260 // Rule at src/isa/s390x/inst.isle line 3058. 7261 let expr0_0 = FpuRoundMode::Plus64; 7262 return Some(expr0_0); 7263 } 7264 return None; 7265 } 7266 7267 // Generated as internal constructor for term ceil_reg. 7268 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7269 let pattern0_0 = arg0; 7270 let pattern1_0 = arg1; 7271 // Rule at src/isa/s390x/inst.isle line 3061. 7272 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7273 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7274 return Some(expr1_0); 7275 } 7276 7277 // Generated as internal constructor for term fpuroundmode_floor. 7278 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7279 let pattern0_0 = arg0; 7280 if pattern0_0 == F32 { 7281 // Rule at src/isa/s390x/inst.isle line 3067. 7282 let expr0_0 = FpuRoundMode::Minus32; 7283 return Some(expr0_0); 7284 } 7285 if pattern0_0 == F64 { 7286 // Rule at src/isa/s390x/inst.isle line 3068. 7287 let expr0_0 = FpuRoundMode::Minus64; 7288 return Some(expr0_0); 7289 } 7290 return None; 7291 } 7292 7293 // Generated as internal constructor for term floor_reg. 7294 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7295 let pattern0_0 = arg0; 7296 let pattern1_0 = arg1; 7297 // Rule at src/isa/s390x/inst.isle line 3071. 7298 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7299 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7300 return Some(expr1_0); 7301 } 7302 7303 // Generated as internal constructor for term fpuroundmode_trunc. 7304 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7305 let pattern0_0 = arg0; 7306 if pattern0_0 == F32 { 7307 // Rule at src/isa/s390x/inst.isle line 3077. 7308 let expr0_0 = FpuRoundMode::Zero32; 7309 return Some(expr0_0); 7310 } 7311 if pattern0_0 == F64 { 7312 // Rule at src/isa/s390x/inst.isle line 3078. 7313 let expr0_0 = FpuRoundMode::Zero64; 7314 return Some(expr0_0); 7315 } 7316 return None; 7317 } 7318 7319 // Generated as internal constructor for term trunc_reg. 7320 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7321 let pattern0_0 = arg0; 7322 let pattern1_0 = arg1; 7323 // Rule at src/isa/s390x/inst.isle line 3081. 7324 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7325 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7326 return Some(expr1_0); 7327 } 7328 7329 // Generated as internal constructor for term fpuroundmode_nearest. 7330 pub fn constructor_fpuroundmode_nearest<C: Context>( 7331 ctx: &mut C, 7332 arg0: Type, 7333 ) -> Option<FpuRoundMode> { 7334 let pattern0_0 = arg0; 7335 if pattern0_0 == F32 { 7336 // Rule at src/isa/s390x/inst.isle line 3087. 7337 let expr0_0 = FpuRoundMode::Nearest32; 7338 return Some(expr0_0); 7339 } 7340 if pattern0_0 == F64 { 7341 // Rule at src/isa/s390x/inst.isle line 3088. 7342 let expr0_0 = FpuRoundMode::Nearest64; 7343 return Some(expr0_0); 7344 } 7345 return None; 7346 } 7347 7348 // Generated as internal constructor for term nearest_reg. 7349 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7350 let pattern0_0 = arg0; 7351 let pattern1_0 = arg1; 7352 // Rule at src/isa/s390x/inst.isle line 3091. 7353 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7354 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7355 return Some(expr1_0); 7356 } 7357 7358 // Generated as internal constructor for term fpuop1_promote. 7359 pub fn constructor_fpuop1_promote<C: Context>( 7360 ctx: &mut C, 7361 arg0: Type, 7362 arg1: Type, 7363 ) -> Option<FPUOp1> { 7364 let pattern0_0 = arg0; 7365 if pattern0_0 == F64 { 7366 let pattern2_0 = arg1; 7367 if pattern2_0 == F32 { 7368 // Rule at src/isa/s390x/inst.isle line 3097. 7369 let expr0_0 = FPUOp1::Cvt32To64; 7370 return Some(expr0_0); 7371 } 7372 } 7373 return None; 7374 } 7375 7376 // Generated as internal constructor for term fpromote_reg. 7377 pub fn constructor_fpromote_reg<C: Context>( 7378 ctx: &mut C, 7379 arg0: Type, 7380 arg1: Type, 7381 arg2: Reg, 7382 ) -> Option<Reg> { 7383 let pattern0_0 = arg0; 7384 let pattern1_0 = arg1; 7385 let pattern2_0 = arg2; 7386 // Rule at src/isa/s390x/inst.isle line 3100. 7387 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7388 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7389 return Some(expr1_0); 7390 } 7391 7392 // Generated as internal constructor for term fpuop1_demote. 7393 pub fn constructor_fpuop1_demote<C: Context>( 7394 ctx: &mut C, 7395 arg0: Type, 7396 arg1: Type, 7397 ) -> Option<FPUOp1> { 7398 let pattern0_0 = arg0; 7399 if pattern0_0 == F32 { 7400 let pattern2_0 = arg1; 7401 if pattern2_0 == F64 { 7402 // Rule at src/isa/s390x/inst.isle line 3107. 7403 let expr0_0 = FPUOp1::Cvt64To32; 7404 return Some(expr0_0); 7405 } 7406 } 7407 return None; 7408 } 7409 7410 // Generated as internal constructor for term fdemote_reg. 7411 pub fn constructor_fdemote_reg<C: Context>( 7412 ctx: &mut C, 7413 arg0: Type, 7414 arg1: Type, 7415 arg2: Reg, 7416 ) -> Option<Reg> { 7417 let pattern0_0 = arg0; 7418 let pattern1_0 = arg1; 7419 let pattern2_0 = arg2; 7420 // Rule at src/isa/s390x/inst.isle line 3110. 7421 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7422 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7423 return Some(expr1_0); 7424 } 7425 7426 // Generated as internal constructor for term uint_to_fpu_op. 7427 pub fn constructor_uint_to_fpu_op<C: Context>( 7428 ctx: &mut C, 7429 arg0: Type, 7430 arg1: Type, 7431 ) -> Option<IntToFpuOp> { 7432 let pattern0_0 = arg0; 7433 if pattern0_0 == F32 { 7434 let pattern2_0 = arg1; 7435 if pattern2_0 == I32 { 7436 // Rule at src/isa/s390x/inst.isle line 3117. 7437 let expr0_0 = IntToFpuOp::U32ToF32; 7438 return Some(expr0_0); 7439 } 7440 if pattern2_0 == I64 { 7441 // Rule at src/isa/s390x/inst.isle line 3119. 7442 let expr0_0 = IntToFpuOp::U64ToF32; 7443 return Some(expr0_0); 7444 } 7445 } 7446 if pattern0_0 == F64 { 7447 let pattern2_0 = arg1; 7448 if pattern2_0 == I32 { 7449 // Rule at src/isa/s390x/inst.isle line 3118. 7450 let expr0_0 = IntToFpuOp::U32ToF64; 7451 return Some(expr0_0); 7452 } 7453 if pattern2_0 == I64 { 7454 // Rule at src/isa/s390x/inst.isle line 3120. 7455 let expr0_0 = IntToFpuOp::U64ToF64; 7456 return Some(expr0_0); 7457 } 7458 } 7459 return None; 7460 } 7461 7462 // Generated as internal constructor for term fcvt_from_uint_reg. 7463 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7464 ctx: &mut C, 7465 arg0: Type, 7466 arg1: Type, 7467 arg2: Reg, 7468 ) -> Option<Reg> { 7469 let pattern0_0 = arg0; 7470 let pattern1_0 = arg1; 7471 let pattern2_0 = arg2; 7472 // Rule at src/isa/s390x/inst.isle line 3123. 7473 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7474 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7475 return Some(expr1_0); 7476 } 7477 7478 // Generated as internal constructor for term sint_to_fpu_op. 7479 pub fn constructor_sint_to_fpu_op<C: Context>( 7480 ctx: &mut C, 7481 arg0: Type, 7482 arg1: Type, 7483 ) -> Option<IntToFpuOp> { 7484 let pattern0_0 = arg0; 7485 if pattern0_0 == F32 { 7486 let pattern2_0 = arg1; 7487 if pattern2_0 == I32 { 7488 // Rule at src/isa/s390x/inst.isle line 3130. 7489 let expr0_0 = IntToFpuOp::I32ToF32; 7490 return Some(expr0_0); 7491 } 7492 if pattern2_0 == I64 { 7493 // Rule at src/isa/s390x/inst.isle line 3132. 7494 let expr0_0 = IntToFpuOp::I64ToF32; 7495 return Some(expr0_0); 7496 } 7497 } 7498 if pattern0_0 == F64 { 7499 let pattern2_0 = arg1; 7500 if pattern2_0 == I32 { 7501 // Rule at src/isa/s390x/inst.isle line 3131. 7502 let expr0_0 = IntToFpuOp::I32ToF64; 7503 return Some(expr0_0); 7504 } 7505 if pattern2_0 == I64 { 7506 // Rule at src/isa/s390x/inst.isle line 3133. 7507 let expr0_0 = IntToFpuOp::I64ToF64; 7508 return Some(expr0_0); 7509 } 7510 } 7511 return None; 7512 } 7513 7514 // Generated as internal constructor for term fcvt_from_sint_reg. 7515 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7516 ctx: &mut C, 7517 arg0: Type, 7518 arg1: Type, 7519 arg2: Reg, 7520 ) -> Option<Reg> { 7521 let pattern0_0 = arg0; 7522 let pattern1_0 = arg1; 7523 let pattern2_0 = arg2; 7524 // Rule at src/isa/s390x/inst.isle line 3136. 7525 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7526 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7527 return Some(expr1_0); 7528 } 7529 7530 // Generated as internal constructor for term fpu_to_uint_op. 7531 pub fn constructor_fpu_to_uint_op<C: Context>( 7532 ctx: &mut C, 7533 arg0: Type, 7534 arg1: Type, 7535 ) -> Option<FpuToIntOp> { 7536 let pattern0_0 = arg0; 7537 if pattern0_0 == I32 { 7538 let pattern2_0 = arg1; 7539 if pattern2_0 == F32 { 7540 // Rule at src/isa/s390x/inst.isle line 3143. 7541 let expr0_0 = FpuToIntOp::F32ToU32; 7542 return Some(expr0_0); 7543 } 7544 if pattern2_0 == F64 { 7545 // Rule at src/isa/s390x/inst.isle line 3144. 7546 let expr0_0 = FpuToIntOp::F64ToU32; 7547 return Some(expr0_0); 7548 } 7549 } 7550 if pattern0_0 == I64 { 7551 let pattern2_0 = arg1; 7552 if pattern2_0 == F32 { 7553 // Rule at src/isa/s390x/inst.isle line 3145. 7554 let expr0_0 = FpuToIntOp::F32ToU64; 7555 return Some(expr0_0); 7556 } 7557 if pattern2_0 == F64 { 7558 // Rule at src/isa/s390x/inst.isle line 3146. 7559 let expr0_0 = FpuToIntOp::F64ToU64; 7560 return Some(expr0_0); 7561 } 7562 } 7563 return None; 7564 } 7565 7566 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7567 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7568 ctx: &mut C, 7569 arg0: Type, 7570 arg1: Type, 7571 arg2: Reg, 7572 ) -> Option<ProducesFlags> { 7573 let pattern0_0 = arg0; 7574 let pattern1_0 = arg1; 7575 let pattern2_0 = arg2; 7576 // Rule at src/isa/s390x/inst.isle line 3149. 7577 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7578 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7579 return Some(expr1_0); 7580 } 7581 7582 // Generated as internal constructor for term fcvt_to_uint_reg. 7583 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7584 ctx: &mut C, 7585 arg0: Type, 7586 arg1: Type, 7587 arg2: Reg, 7588 ) -> Option<Reg> { 7589 let pattern0_0 = arg0; 7590 let pattern1_0 = arg1; 7591 let pattern2_0 = arg2; 7592 // Rule at src/isa/s390x/inst.isle line 3153. 7593 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7594 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7595 return Some(expr1_0); 7596 } 7597 7598 // Generated as internal constructor for term fpu_to_sint_op. 7599 pub fn constructor_fpu_to_sint_op<C: Context>( 7600 ctx: &mut C, 7601 arg0: Type, 7602 arg1: Type, 7603 ) -> Option<FpuToIntOp> { 7604 let pattern0_0 = arg0; 7605 if pattern0_0 == I32 { 7606 let pattern2_0 = arg1; 7607 if pattern2_0 == F32 { 7608 // Rule at src/isa/s390x/inst.isle line 3160. 7609 let expr0_0 = FpuToIntOp::F32ToI32; 7610 return Some(expr0_0); 7611 } 7612 if pattern2_0 == F64 { 7613 // Rule at src/isa/s390x/inst.isle line 3161. 7614 let expr0_0 = FpuToIntOp::F64ToI32; 7615 return Some(expr0_0); 7616 } 7617 } 7618 if pattern0_0 == I64 { 7619 let pattern2_0 = arg1; 7620 if pattern2_0 == F32 { 7621 // Rule at src/isa/s390x/inst.isle line 3162. 7622 let expr0_0 = FpuToIntOp::F32ToI64; 7623 return Some(expr0_0); 7624 } 7625 if pattern2_0 == F64 { 7626 // Rule at src/isa/s390x/inst.isle line 3163. 7627 let expr0_0 = FpuToIntOp::F64ToI64; 7628 return Some(expr0_0); 7629 } 7630 } 7631 return None; 7632 } 7633 7634 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7635 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7636 ctx: &mut C, 7637 arg0: Type, 7638 arg1: Type, 7639 arg2: Reg, 7640 ) -> Option<ProducesFlags> { 7641 let pattern0_0 = arg0; 7642 let pattern1_0 = arg1; 7643 let pattern2_0 = arg2; 7644 // Rule at src/isa/s390x/inst.isle line 3166. 7645 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7646 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7647 return Some(expr1_0); 7648 } 7649 7650 // Generated as internal constructor for term fcvt_to_sint_reg. 7651 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7652 ctx: &mut C, 7653 arg0: Type, 7654 arg1: Type, 7655 arg2: Reg, 7656 ) -> Option<Reg> { 7657 let pattern0_0 = arg0; 7658 let pattern1_0 = arg1; 7659 let pattern2_0 = arg2; 7660 // Rule at src/isa/s390x/inst.isle line 3170. 7661 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7662 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7663 return Some(expr1_0); 7664 } 7665 7666 // Generated as internal constructor for term cmpop_cmps. 7667 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7668 let pattern0_0 = arg0; 7669 if pattern0_0 == I32 { 7670 // Rule at src/isa/s390x/inst.isle line 3177. 7671 let expr0_0 = CmpOp::CmpS32; 7672 return Some(expr0_0); 7673 } 7674 if pattern0_0 == I64 { 7675 // Rule at src/isa/s390x/inst.isle line 3178. 7676 let expr0_0 = CmpOp::CmpS64; 7677 return Some(expr0_0); 7678 } 7679 return None; 7680 } 7681 7682 // Generated as internal constructor for term cmpop_cmps_sext16. 7683 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7684 let pattern0_0 = arg0; 7685 if pattern0_0 == I32 { 7686 // Rule at src/isa/s390x/inst.isle line 3181. 7687 let expr0_0 = CmpOp::CmpS32Ext16; 7688 return Some(expr0_0); 7689 } 7690 if pattern0_0 == I64 { 7691 // Rule at src/isa/s390x/inst.isle line 3182. 7692 let expr0_0 = CmpOp::CmpS64Ext16; 7693 return Some(expr0_0); 7694 } 7695 return None; 7696 } 7697 7698 // Generated as internal constructor for term cmpop_cmps_sext32. 7699 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7700 let pattern0_0 = arg0; 7701 if pattern0_0 == I64 { 7702 // Rule at src/isa/s390x/inst.isle line 3185. 7703 let expr0_0 = CmpOp::CmpS64Ext32; 7704 return Some(expr0_0); 7705 } 7706 return None; 7707 } 7708 7709 // Generated as internal constructor for term icmps_reg. 7710 pub fn constructor_icmps_reg<C: Context>( 7711 ctx: &mut C, 7712 arg0: Type, 7713 arg1: Reg, 7714 arg2: Reg, 7715 ) -> Option<ProducesFlags> { 7716 let pattern0_0 = arg0; 7717 let pattern1_0 = arg1; 7718 let pattern2_0 = arg2; 7719 // Rule at src/isa/s390x/inst.isle line 3188. 7720 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7721 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7722 return Some(expr1_0); 7723 } 7724 7725 // Generated as internal constructor for term icmps_reg_sext32. 7726 pub fn constructor_icmps_reg_sext32<C: Context>( 7727 ctx: &mut C, 7728 arg0: Type, 7729 arg1: Reg, 7730 arg2: Reg, 7731 ) -> Option<ProducesFlags> { 7732 let pattern0_0 = arg0; 7733 let pattern1_0 = arg1; 7734 let pattern2_0 = arg2; 7735 // Rule at src/isa/s390x/inst.isle line 3191. 7736 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7737 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7738 return Some(expr1_0); 7739 } 7740 7741 // Generated as internal constructor for term icmps_simm16. 7742 pub fn constructor_icmps_simm16<C: Context>( 7743 ctx: &mut C, 7744 arg0: Type, 7745 arg1: Reg, 7746 arg2: i16, 7747 ) -> Option<ProducesFlags> { 7748 let pattern0_0 = arg0; 7749 let pattern1_0 = arg1; 7750 let pattern2_0 = arg2; 7751 // Rule at src/isa/s390x/inst.isle line 3194. 7752 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7753 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7754 return Some(expr1_0); 7755 } 7756 7757 // Generated as internal constructor for term icmps_simm32. 7758 pub fn constructor_icmps_simm32<C: Context>( 7759 ctx: &mut C, 7760 arg0: Type, 7761 arg1: Reg, 7762 arg2: i32, 7763 ) -> Option<ProducesFlags> { 7764 let pattern0_0 = arg0; 7765 let pattern1_0 = arg1; 7766 let pattern2_0 = arg2; 7767 // Rule at src/isa/s390x/inst.isle line 3197. 7768 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7769 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7770 return Some(expr1_0); 7771 } 7772 7773 // Generated as internal constructor for term icmps_mem. 7774 pub fn constructor_icmps_mem<C: Context>( 7775 ctx: &mut C, 7776 arg0: Type, 7777 arg1: Reg, 7778 arg2: &MemArg, 7779 ) -> Option<ProducesFlags> { 7780 let pattern0_0 = arg0; 7781 let pattern1_0 = arg1; 7782 let pattern2_0 = arg2; 7783 // Rule at src/isa/s390x/inst.isle line 3200. 7784 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7785 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7786 return Some(expr1_0); 7787 } 7788 7789 // Generated as internal constructor for term icmps_mem_sext16. 7790 pub fn constructor_icmps_mem_sext16<C: Context>( 7791 ctx: &mut C, 7792 arg0: Type, 7793 arg1: Reg, 7794 arg2: &MemArg, 7795 ) -> Option<ProducesFlags> { 7796 let pattern0_0 = arg0; 7797 let pattern1_0 = arg1; 7798 let pattern2_0 = arg2; 7799 // Rule at src/isa/s390x/inst.isle line 3203. 7800 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7801 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7802 return Some(expr1_0); 7803 } 7804 7805 // Generated as internal constructor for term icmps_mem_sext32. 7806 pub fn constructor_icmps_mem_sext32<C: Context>( 7807 ctx: &mut C, 7808 arg0: Type, 7809 arg1: Reg, 7810 arg2: &MemArg, 7811 ) -> Option<ProducesFlags> { 7812 let pattern0_0 = arg0; 7813 let pattern1_0 = arg1; 7814 let pattern2_0 = arg2; 7815 // Rule at src/isa/s390x/inst.isle line 3206. 7816 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7817 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7818 return Some(expr1_0); 7819 } 7820 7821 // Generated as internal constructor for term cmpop_cmpu. 7822 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7823 let pattern0_0 = arg0; 7824 if pattern0_0 == I32 { 7825 // Rule at src/isa/s390x/inst.isle line 3212. 7826 let expr0_0 = CmpOp::CmpL32; 7827 return Some(expr0_0); 7828 } 7829 if pattern0_0 == I64 { 7830 // Rule at src/isa/s390x/inst.isle line 3213. 7831 let expr0_0 = CmpOp::CmpL64; 7832 return Some(expr0_0); 7833 } 7834 return None; 7835 } 7836 7837 // Generated as internal constructor for term cmpop_cmpu_zext16. 7838 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7839 let pattern0_0 = arg0; 7840 if pattern0_0 == I32 { 7841 // Rule at src/isa/s390x/inst.isle line 3216. 7842 let expr0_0 = CmpOp::CmpL32Ext16; 7843 return Some(expr0_0); 7844 } 7845 if pattern0_0 == I64 { 7846 // Rule at src/isa/s390x/inst.isle line 3217. 7847 let expr0_0 = CmpOp::CmpL64Ext16; 7848 return Some(expr0_0); 7849 } 7850 return None; 7851 } 7852 7853 // Generated as internal constructor for term cmpop_cmpu_zext32. 7854 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7855 let pattern0_0 = arg0; 7856 if pattern0_0 == I64 { 7857 // Rule at src/isa/s390x/inst.isle line 3220. 7858 let expr0_0 = CmpOp::CmpL64Ext32; 7859 return Some(expr0_0); 7860 } 7861 return None; 7862 } 7863 7864 // Generated as internal constructor for term icmpu_reg. 7865 pub fn constructor_icmpu_reg<C: Context>( 7866 ctx: &mut C, 7867 arg0: Type, 7868 arg1: Reg, 7869 arg2: Reg, 7870 ) -> Option<ProducesFlags> { 7871 let pattern0_0 = arg0; 7872 let pattern1_0 = arg1; 7873 let pattern2_0 = arg2; 7874 // Rule at src/isa/s390x/inst.isle line 3223. 7875 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7876 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7877 return Some(expr1_0); 7878 } 7879 7880 // Generated as internal constructor for term icmpu_reg_zext32. 7881 pub fn constructor_icmpu_reg_zext32<C: Context>( 7882 ctx: &mut C, 7883 arg0: Type, 7884 arg1: Reg, 7885 arg2: Reg, 7886 ) -> Option<ProducesFlags> { 7887 let pattern0_0 = arg0; 7888 let pattern1_0 = arg1; 7889 let pattern2_0 = arg2; 7890 // Rule at src/isa/s390x/inst.isle line 3226. 7891 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7892 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7893 return Some(expr1_0); 7894 } 7895 7896 // Generated as internal constructor for term icmpu_uimm32. 7897 pub fn constructor_icmpu_uimm32<C: Context>( 7898 ctx: &mut C, 7899 arg0: Type, 7900 arg1: Reg, 7901 arg2: u32, 7902 ) -> Option<ProducesFlags> { 7903 let pattern0_0 = arg0; 7904 let pattern1_0 = arg1; 7905 let pattern2_0 = arg2; 7906 // Rule at src/isa/s390x/inst.isle line 3229. 7907 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7908 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7909 return Some(expr1_0); 7910 } 7911 7912 // Generated as internal constructor for term icmpu_mem. 7913 pub fn constructor_icmpu_mem<C: Context>( 7914 ctx: &mut C, 7915 arg0: Type, 7916 arg1: Reg, 7917 arg2: &MemArg, 7918 ) -> Option<ProducesFlags> { 7919 let pattern0_0 = arg0; 7920 let pattern1_0 = arg1; 7921 let pattern2_0 = arg2; 7922 // Rule at src/isa/s390x/inst.isle line 3232. 7923 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7924 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7925 return Some(expr1_0); 7926 } 7927 7928 // Generated as internal constructor for term icmpu_mem_zext16. 7929 pub fn constructor_icmpu_mem_zext16<C: Context>( 7930 ctx: &mut C, 7931 arg0: Type, 7932 arg1: Reg, 7933 arg2: &MemArg, 7934 ) -> Option<ProducesFlags> { 7935 let pattern0_0 = arg0; 7936 let pattern1_0 = arg1; 7937 let pattern2_0 = arg2; 7938 // Rule at src/isa/s390x/inst.isle line 3235. 7939 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7940 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7941 return Some(expr1_0); 7942 } 7943 7944 // Generated as internal constructor for term icmpu_mem_zext32. 7945 pub fn constructor_icmpu_mem_zext32<C: Context>( 7946 ctx: &mut C, 7947 arg0: Type, 7948 arg1: Reg, 7949 arg2: &MemArg, 7950 ) -> Option<ProducesFlags> { 7951 let pattern0_0 = arg0; 7952 let pattern1_0 = arg1; 7953 let pattern2_0 = arg2; 7954 // Rule at src/isa/s390x/inst.isle line 3238. 7955 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7956 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7957 return Some(expr1_0); 7958 } 7959 7960 // Generated as internal constructor for term fcmp_reg. 7961 pub fn constructor_fcmp_reg<C: Context>( 7962 ctx: &mut C, 7963 arg0: Type, 7964 arg1: Reg, 7965 arg2: Reg, 7966 ) -> Option<ProducesFlags> { 7967 let pattern0_0 = arg0; 7968 if pattern0_0 == F32 { 7969 let pattern2_0 = arg1; 7970 let pattern3_0 = arg2; 7971 // Rule at src/isa/s390x/inst.isle line 3244. 7972 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7973 return Some(expr0_0); 7974 } 7975 if pattern0_0 == F64 { 7976 let pattern2_0 = arg1; 7977 let pattern3_0 = arg2; 7978 // Rule at src/isa/s390x/inst.isle line 3245. 7979 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7980 return Some(expr0_0); 7981 } 7982 return None; 7983 } 7984 7985 // Generated as internal constructor for term lower. 7986 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7987 let pattern0_0 = arg0; 7988 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7989 match &pattern1_0 { 7990 &InstructionData::NullAry { 7991 opcode: ref pattern2_0, 7992 } => { 7993 match pattern2_0 { 7994 &Opcode::Debugtrap => { 7995 // Rule at src/isa/s390x/lower.isle line 2169. 7996 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7997 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7998 return Some(expr1_0); 7999 } 8000 &Opcode::Nop => { 8001 // Rule at src/isa/s390x/lower.isle line 47. 8002 let expr0_0 = C::invalid_reg(ctx); 8003 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8004 return Some(expr1_0); 8005 } 8006 &Opcode::Fence => { 8007 // Rule at src/isa/s390x/lower.isle line 1882. 8008 let expr0_0 = constructor_fence_impl(ctx)?; 8009 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8010 return Some(expr1_0); 8011 } 8012 _ => {} 8013 } 8014 } 8015 &InstructionData::FuncAddr { 8016 opcode: ref pattern2_0, 8017 func_ref: pattern2_1, 8018 } => { 8019 if let &Opcode::FuncAddr = pattern2_0 { 8020 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8021 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8022 // Rule at src/isa/s390x/lower.isle line 1159. 8023 let expr0_0: i32 = 0; 8024 let expr1_0 = C::memflags_trusted(ctx); 8025 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8026 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8027 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8028 return Some(expr4_0); 8029 } 8030 // Rule at src/isa/s390x/lower.isle line 1163. 8031 let expr0_0: i64 = 0; 8032 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8033 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8034 return Some(expr2_0); 8035 } 8036 } 8037 &InstructionData::UnaryGlobalValue { 8038 opcode: ref pattern2_0, 8039 global_value: pattern2_1, 8040 } => { 8041 if let &Opcode::SymbolValue = pattern2_0 { 8042 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8043 C::symbol_value_data(ctx, pattern2_1) 8044 { 8045 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8046 let pattern6_0 = 0; 8047 if let Some(pattern7_0) = 8048 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8049 { 8050 // Rule at src/isa/s390x/lower.isle line 1170. 8051 let expr0_0 = C::memflags_trusted(ctx); 8052 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8053 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8054 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8055 return Some(expr3_0); 8056 } 8057 } 8058 // Rule at src/isa/s390x/lower.isle line 1175. 8059 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8060 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8061 return Some(expr1_0); 8062 } 8063 } 8064 } 8065 &InstructionData::UnaryIeee32 { 8066 opcode: ref pattern2_0, 8067 imm: pattern2_1, 8068 } => { 8069 if let &Opcode::F32const = pattern2_0 { 8070 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8071 // Rule at src/isa/s390x/lower.isle line 29. 8072 let expr0_0: Type = F32; 8073 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8074 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8075 return Some(expr2_0); 8076 } 8077 } 8078 &InstructionData::UnaryIeee64 { 8079 opcode: ref pattern2_0, 8080 imm: pattern2_1, 8081 } => { 8082 if let &Opcode::F64const = pattern2_0 { 8083 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8084 // Rule at src/isa/s390x/lower.isle line 35. 8085 let expr0_0: Type = F64; 8086 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8087 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8088 return Some(expr2_0); 8089 } 8090 } 8091 &InstructionData::Trap { 8092 opcode: ref pattern2_0, 8093 code: ref pattern2_1, 8094 } => { 8095 match pattern2_0 { 8096 &Opcode::Trap => { 8097 // Rule at src/isa/s390x/lower.isle line 2139. 8098 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8099 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8100 return Some(expr1_0); 8101 } 8102 &Opcode::ResumableTrap => { 8103 // Rule at src/isa/s390x/lower.isle line 2145. 8104 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8105 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8106 return Some(expr1_0); 8107 } 8108 _ => {} 8109 } 8110 } 8111 &InstructionData::StoreNoOffset { 8112 opcode: ref pattern2_0, 8113 args: ref pattern2_1, 8114 flags: pattern2_2, 8115 } => { 8116 if let &Opcode::AtomicStore = pattern2_0 { 8117 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8118 let pattern5_0 = C::value_type(ctx, pattern4_0); 8119 if pattern5_0 == I8 { 8120 // Rule at src/isa/s390x/lower.isle line 1863. 8121 let expr0_0 = C::zero_offset(ctx); 8122 let expr1_0 = 8123 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8124 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8125 return Some(expr2_0); 8126 } 8127 if pattern5_0 == I16 { 8128 // Rule at src/isa/s390x/lower.isle line 1867. 8129 let expr0_0 = C::zero_offset(ctx); 8130 let expr1_0 = constructor_istore16_impl( 8131 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8132 )?; 8133 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8134 return Some(expr2_0); 8135 } 8136 if pattern5_0 == I32 { 8137 // Rule at src/isa/s390x/lower.isle line 1871. 8138 let expr0_0 = C::zero_offset(ctx); 8139 let expr1_0 = constructor_istore32_impl( 8140 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8141 )?; 8142 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8143 return Some(expr2_0); 8144 } 8145 if pattern5_0 == I64 { 8146 // Rule at src/isa/s390x/lower.isle line 1875. 8147 let expr0_0 = C::zero_offset(ctx); 8148 let expr1_0 = constructor_istore64_impl( 8149 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8150 )?; 8151 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8152 return Some(expr2_0); 8153 } 8154 } 8155 } 8156 &InstructionData::Store { 8157 opcode: ref pattern2_0, 8158 args: ref pattern2_1, 8159 flags: pattern2_2, 8160 offset: pattern2_3, 8161 } => { 8162 match pattern2_0 { 8163 &Opcode::Store => { 8164 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8165 let pattern5_0 = C::value_type(ctx, pattern4_0); 8166 if pattern5_0 == I8 { 8167 // Rule at src/isa/s390x/lower.isle line 1354. 8168 let expr0_0 = constructor_istore8_impl( 8169 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8170 )?; 8171 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8172 return Some(expr1_0); 8173 } 8174 if pattern5_0 == I16 { 8175 // Rule at src/isa/s390x/lower.isle line 1358. 8176 let expr0_0 = constructor_istore16_impl( 8177 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8178 )?; 8179 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8180 return Some(expr1_0); 8181 } 8182 if pattern5_0 == I32 { 8183 // Rule at src/isa/s390x/lower.isle line 1362. 8184 let expr0_0 = constructor_istore32_impl( 8185 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8186 )?; 8187 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8188 return Some(expr1_0); 8189 } 8190 if pattern5_0 == I64 { 8191 // Rule at src/isa/s390x/lower.isle line 1366. 8192 let expr0_0 = constructor_istore64_impl( 8193 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8194 )?; 8195 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8196 return Some(expr1_0); 8197 } 8198 if pattern5_0 == R64 { 8199 // Rule at src/isa/s390x/lower.isle line 1370. 8200 let expr0_0 = constructor_istore64_impl( 8201 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8202 )?; 8203 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8204 return Some(expr1_0); 8205 } 8206 if pattern5_0 == F32 { 8207 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8208 // Rule at src/isa/s390x/lower.isle line 1374. 8209 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8210 let expr1_0 = 8211 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8212 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8213 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8214 return Some(expr3_0); 8215 } 8216 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8217 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8218 // Rule at src/isa/s390x/lower.isle line 1380. 8219 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8220 let expr1_0 = constructor_lower_address( 8221 ctx, pattern2_2, pattern4_1, pattern2_3, 8222 )?; 8223 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8224 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8225 return Some(expr3_0); 8226 } 8227 } 8228 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8229 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8230 // Rule at src/isa/s390x/lower.isle line 1386. 8231 let expr0_0: Type = I64; 8232 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8233 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8234 let expr3_0: u8 = 32; 8235 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8236 let expr5_0 = constructor_lower_address( 8237 ctx, pattern2_2, pattern4_1, pattern2_3, 8238 )?; 8239 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8240 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8241 return Some(expr7_0); 8242 } 8243 } 8244 } 8245 if pattern5_0 == F64 { 8246 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8247 // Rule at src/isa/s390x/lower.isle line 1392. 8248 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8249 let expr1_0 = 8250 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8251 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8252 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8253 return Some(expr3_0); 8254 } 8255 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8256 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8257 // Rule at src/isa/s390x/lower.isle line 1398. 8258 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8259 let expr1_0 = constructor_lower_address( 8260 ctx, pattern2_2, pattern4_1, pattern2_3, 8261 )?; 8262 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8263 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8264 return Some(expr3_0); 8265 } 8266 } 8267 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8268 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8269 // Rule at src/isa/s390x/lower.isle line 1404. 8270 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8271 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8272 let expr2_0 = constructor_lower_address( 8273 ctx, pattern2_2, pattern4_1, pattern2_3, 8274 )?; 8275 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8276 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8277 return Some(expr4_0); 8278 } 8279 } 8280 } 8281 } 8282 &Opcode::Istore8 => { 8283 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8284 // Rule at src/isa/s390x/lower.isle line 1413. 8285 let expr0_0 = constructor_istore8_impl( 8286 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8287 )?; 8288 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8289 return Some(expr1_0); 8290 } 8291 &Opcode::Istore16 => { 8292 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8293 // Rule at src/isa/s390x/lower.isle line 1431. 8294 let expr0_0 = constructor_istore16_impl( 8295 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8296 )?; 8297 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8298 return Some(expr1_0); 8299 } 8300 &Opcode::Istore32 => { 8301 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8302 // Rule at src/isa/s390x/lower.isle line 1457. 8303 let expr0_0 = constructor_istore32_impl( 8304 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8305 )?; 8306 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8307 return Some(expr1_0); 8308 } 8309 _ => {} 8310 } 8311 } 8312 &InstructionData::Unary { 8313 opcode: ref pattern2_0, 8314 arg: pattern2_1, 8315 } => { 8316 match pattern2_0 { 8317 &Opcode::Copy => { 8318 // Rule at src/isa/s390x/lower.isle line 53. 8319 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8320 return Some(expr0_0); 8321 } 8322 &Opcode::Breduce => { 8323 // Rule at src/isa/s390x/lower.isle line 752. 8324 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8325 return Some(expr0_0); 8326 } 8327 &Opcode::Ireduce => { 8328 // Rule at src/isa/s390x/lower.isle line 596. 8329 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8330 return Some(expr0_0); 8331 } 8332 _ => {} 8333 } 8334 } 8335 &InstructionData::IntCondTrap { 8336 opcode: ref pattern2_0, 8337 arg: pattern2_1, 8338 cond: ref pattern2_2, 8339 code: ref pattern2_3, 8340 } => { 8341 if let &Opcode::Trapif = pattern2_0 { 8342 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8343 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8344 if let &InstructionData::Binary { 8345 opcode: ref pattern6_0, 8346 args: ref pattern6_1, 8347 } = &pattern5_0 8348 { 8349 match pattern6_0 { 8350 &Opcode::Ifcmp => { 8351 let (pattern8_0, pattern8_1) = 8352 C::unpack_value_array_2(ctx, pattern6_1); 8353 // Rule at src/isa/s390x/lower.isle line 2181. 8354 let expr0_0: bool = false; 8355 let expr1_0 = constructor_icmp_val( 8356 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8357 )?; 8358 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8359 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8360 return Some(expr3_0); 8361 } 8362 &Opcode::IaddIfcout => { 8363 let (pattern8_0, pattern8_1) = 8364 C::unpack_value_array_2(ctx, pattern6_1); 8365 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8366 // Rule at src/isa/s390x/lower.isle line 2206. 8367 let expr0_0: u8 = 3; 8368 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8369 let expr2_0 = 8370 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8371 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8372 return Some(expr3_0); 8373 } 8374 } 8375 _ => {} 8376 } 8377 } 8378 } 8379 } 8380 } 8381 &InstructionData::CondTrap { 8382 opcode: ref pattern2_0, 8383 arg: pattern2_1, 8384 code: ref pattern2_2, 8385 } => { 8386 match pattern2_0 { 8387 &Opcode::Trapz => { 8388 // Rule at src/isa/s390x/lower.isle line 2151. 8389 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8390 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8391 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8392 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8393 return Some(expr3_0); 8394 } 8395 &Opcode::Trapnz => { 8396 // Rule at src/isa/s390x/lower.isle line 2157. 8397 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8398 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8399 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8400 return Some(expr2_0); 8401 } 8402 &Opcode::ResumableTrapnz => { 8403 // Rule at src/isa/s390x/lower.isle line 2163. 8404 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8405 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8406 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8407 return Some(expr2_0); 8408 } 8409 _ => {} 8410 } 8411 } 8412 _ => {} 8413 } 8414 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8415 let pattern2_0 = C::value_type(ctx, pattern1_0); 8416 if pattern2_0 == B1 { 8417 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8418 if let &InstructionData::Unary { 8419 opcode: ref pattern5_0, 8420 arg: pattern5_1, 8421 } = &pattern4_0 8422 { 8423 match pattern5_0 { 8424 &Opcode::IsNull => { 8425 let pattern7_0 = C::value_type(ctx, pattern5_1); 8426 if pattern7_0 == R64 { 8427 // Rule at src/isa/s390x/lower.isle line 2017. 8428 let expr0_0: Type = B1; 8429 let expr1_0: Type = I64; 8430 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8431 let expr3_0: i16 = 0; 8432 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8433 let expr5_0 = IntCC::Equal; 8434 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8435 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8436 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8437 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8438 return Some(expr9_0); 8439 } 8440 } 8441 &Opcode::IsInvalid => { 8442 let pattern7_0 = C::value_type(ctx, pattern5_1); 8443 if pattern7_0 == R64 { 8444 // Rule at src/isa/s390x/lower.isle line 2023. 8445 let expr0_0: Type = B1; 8446 let expr1_0: Type = I64; 8447 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8448 let expr3_0: i16 = -1; 8449 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8450 let expr5_0 = IntCC::Equal; 8451 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8452 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8453 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8454 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8455 return Some(expr9_0); 8456 } 8457 } 8458 _ => {} 8459 } 8460 } 8461 } 8462 if pattern2_0 == I8 { 8463 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8464 match &pattern4_0 { 8465 &InstructionData::Unary { 8466 opcode: ref pattern5_0, 8467 arg: pattern5_1, 8468 } => { 8469 if let &Opcode::Popcnt = pattern5_0 { 8470 // Rule at src/isa/s390x/lower.isle line 884. 8471 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8472 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8473 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8474 return Some(expr2_0); 8475 } 8476 } 8477 &InstructionData::LoadNoOffset { 8478 opcode: ref pattern5_0, 8479 arg: pattern5_1, 8480 flags: pattern5_2, 8481 } => { 8482 if let &Opcode::AtomicLoad = pattern5_0 { 8483 // Rule at src/isa/s390x/lower.isle line 1826. 8484 let expr0_0: Type = I8; 8485 let expr1_0 = C::zero_offset(ctx); 8486 let expr2_0 = 8487 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8488 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8489 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8490 return Some(expr4_0); 8491 } 8492 } 8493 &InstructionData::Load { 8494 opcode: ref pattern5_0, 8495 arg: pattern5_1, 8496 flags: pattern5_2, 8497 offset: pattern5_3, 8498 } => { 8499 if let &Opcode::Load = pattern5_0 { 8500 // Rule at src/isa/s390x/lower.isle line 1182. 8501 let expr0_0: Type = I8; 8502 let expr1_0 = 8503 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8504 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8505 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8506 return Some(expr3_0); 8507 } 8508 } 8509 _ => {} 8510 } 8511 } 8512 if pattern2_0 == I16 { 8513 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8514 match &pattern4_0 { 8515 &InstructionData::LoadNoOffset { 8516 opcode: ref pattern5_0, 8517 arg: pattern5_1, 8518 flags: pattern5_2, 8519 } => { 8520 if let &Opcode::AtomicLoad = pattern5_0 { 8521 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8522 // Rule at src/isa/s390x/lower.isle line 1834. 8523 let expr0_0 = C::zero_offset(ctx); 8524 let expr1_0 = 8525 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8526 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8527 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8528 return Some(expr3_0); 8529 } 8530 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8531 // Rule at src/isa/s390x/lower.isle line 1830. 8532 let expr0_0: Type = I16; 8533 let expr1_0 = C::zero_offset(ctx); 8534 let expr2_0 = 8535 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8536 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8537 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8538 return Some(expr4_0); 8539 } 8540 } 8541 } 8542 &InstructionData::Load { 8543 opcode: ref pattern5_0, 8544 arg: pattern5_1, 8545 flags: pattern5_2, 8546 offset: pattern5_3, 8547 } => { 8548 if let &Opcode::Load = pattern5_0 { 8549 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8550 // Rule at src/isa/s390x/lower.isle line 1190. 8551 let expr0_0 = 8552 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8553 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8554 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8555 return Some(expr2_0); 8556 } 8557 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8558 // Rule at src/isa/s390x/lower.isle line 1186. 8559 let expr0_0: Type = I16; 8560 let expr1_0 = 8561 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8562 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8563 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8564 return Some(expr3_0); 8565 } 8566 } 8567 } 8568 _ => {} 8569 } 8570 } 8571 if pattern2_0 == I32 { 8572 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8573 match &pattern4_0 { 8574 &InstructionData::Binary { 8575 opcode: ref pattern5_0, 8576 args: ref pattern5_1, 8577 } => { 8578 match pattern5_0 { 8579 &Opcode::Umulhi => { 8580 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8581 // Rule at src/isa/s390x/lower.isle line 252. 8582 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8583 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8584 let expr2_0: Type = I64; 8585 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8586 let expr4_0: Type = I64; 8587 let expr5_0: u8 = 32; 8588 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8589 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8590 return Some(expr7_0); 8591 } 8592 &Opcode::Smulhi => { 8593 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8594 // Rule at src/isa/s390x/lower.isle line 274. 8595 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8596 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8597 let expr2_0: Type = I64; 8598 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8599 let expr4_0: Type = I64; 8600 let expr5_0: u8 = 32; 8601 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8602 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8603 return Some(expr7_0); 8604 } 8605 _ => {} 8606 } 8607 } 8608 &InstructionData::Unary { 8609 opcode: ref pattern5_0, 8610 arg: pattern5_1, 8611 } => { 8612 if let &Opcode::Bitcast = pattern5_0 { 8613 let pattern7_0 = C::value_type(ctx, pattern5_1); 8614 if pattern7_0 == F32 { 8615 // Rule at src/isa/s390x/lower.isle line 1145. 8616 let expr0_0: Type = I64; 8617 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8618 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8619 let expr3_0: u8 = 32; 8620 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8621 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8622 return Some(expr5_0); 8623 } 8624 } 8625 } 8626 &InstructionData::LoadNoOffset { 8627 opcode: ref pattern5_0, 8628 arg: pattern5_1, 8629 flags: pattern5_2, 8630 } => { 8631 if let &Opcode::AtomicLoad = pattern5_0 { 8632 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8633 // Rule at src/isa/s390x/lower.isle line 1842. 8634 let expr0_0 = C::zero_offset(ctx); 8635 let expr1_0 = 8636 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8637 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8638 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8639 return Some(expr3_0); 8640 } 8641 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8642 // Rule at src/isa/s390x/lower.isle line 1838. 8643 let expr0_0 = C::zero_offset(ctx); 8644 let expr1_0 = 8645 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8646 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8647 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8648 return Some(expr3_0); 8649 } 8650 } 8651 } 8652 &InstructionData::Load { 8653 opcode: ref pattern5_0, 8654 arg: pattern5_1, 8655 flags: pattern5_2, 8656 offset: pattern5_3, 8657 } => { 8658 if let &Opcode::Load = pattern5_0 { 8659 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8660 // Rule at src/isa/s390x/lower.isle line 1198. 8661 let expr0_0 = 8662 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8663 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8664 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8665 return Some(expr2_0); 8666 } 8667 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8668 // Rule at src/isa/s390x/lower.isle line 1194. 8669 let expr0_0 = 8670 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8671 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8672 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8673 return Some(expr2_0); 8674 } 8675 } 8676 } 8677 _ => {} 8678 } 8679 } 8680 if pattern2_0 == I64 { 8681 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8682 match &pattern4_0 { 8683 &InstructionData::Binary { 8684 opcode: ref pattern5_0, 8685 args: ref pattern5_1, 8686 } => { 8687 match pattern5_0 { 8688 &Opcode::Umulhi => { 8689 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8690 // Rule at src/isa/s390x/lower.isle line 259. 8691 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8692 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8693 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8694 let expr3_0: Type = I64; 8695 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8696 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8697 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8698 return Some(expr6_0); 8699 } 8700 &Opcode::Smulhi => { 8701 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8702 // Rule at src/isa/s390x/lower.isle line 281. 8703 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8704 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8705 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8706 let expr3_0: Type = I64; 8707 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8708 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8709 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8710 return Some(expr6_0); 8711 } 8712 _ => {} 8713 } 8714 } 8715 &InstructionData::Unary { 8716 opcode: ref pattern5_0, 8717 arg: pattern5_1, 8718 } => { 8719 if let &Opcode::Bitcast = pattern5_0 { 8720 let pattern7_0 = C::value_type(ctx, pattern5_1); 8721 if pattern7_0 == F64 { 8722 // Rule at src/isa/s390x/lower.isle line 1135. 8723 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8724 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8725 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8726 return Some(expr2_0); 8727 } 8728 } 8729 } 8730 &InstructionData::LoadNoOffset { 8731 opcode: ref pattern5_0, 8732 arg: pattern5_1, 8733 flags: pattern5_2, 8734 } => { 8735 if let &Opcode::AtomicLoad = pattern5_0 { 8736 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8737 // Rule at src/isa/s390x/lower.isle line 1850. 8738 let expr0_0 = C::zero_offset(ctx); 8739 let expr1_0 = 8740 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8741 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8742 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8743 return Some(expr3_0); 8744 } 8745 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8746 // Rule at src/isa/s390x/lower.isle line 1846. 8747 let expr0_0 = C::zero_offset(ctx); 8748 let expr1_0 = 8749 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8750 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8751 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8752 return Some(expr3_0); 8753 } 8754 } 8755 } 8756 &InstructionData::Load { 8757 opcode: ref pattern5_0, 8758 arg: pattern5_1, 8759 flags: pattern5_2, 8760 offset: pattern5_3, 8761 } => { 8762 if let &Opcode::Load = pattern5_0 { 8763 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8764 // Rule at src/isa/s390x/lower.isle line 1206. 8765 let expr0_0 = 8766 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8767 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8768 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8769 return Some(expr2_0); 8770 } 8771 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8772 // Rule at src/isa/s390x/lower.isle line 1202. 8773 let expr0_0 = 8774 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8775 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8776 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8777 return Some(expr2_0); 8778 } 8779 } 8780 } 8781 _ => {} 8782 } 8783 } 8784 if pattern2_0 == R64 { 8785 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8786 if let &InstructionData::Load { 8787 opcode: ref pattern5_0, 8788 arg: pattern5_1, 8789 flags: pattern5_2, 8790 offset: pattern5_3, 8791 } = &pattern4_0 8792 { 8793 if let &Opcode::Load = pattern5_0 { 8794 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8795 // Rule at src/isa/s390x/lower.isle line 1214. 8796 let expr0_0 = 8797 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8798 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8799 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8800 return Some(expr2_0); 8801 } 8802 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8803 // Rule at src/isa/s390x/lower.isle line 1210. 8804 let expr0_0 = 8805 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8806 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8807 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8808 return Some(expr2_0); 8809 } 8810 } 8811 } 8812 } 8813 if pattern2_0 == F32 { 8814 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8815 match &pattern4_0 { 8816 &InstructionData::Unary { 8817 opcode: ref pattern5_0, 8818 arg: pattern5_1, 8819 } => { 8820 if let &Opcode::Bitcast = pattern5_0 { 8821 let pattern7_0 = C::value_type(ctx, pattern5_1); 8822 if pattern7_0 == I32 { 8823 // Rule at src/isa/s390x/lower.isle line 1140. 8824 let expr0_0: Type = I64; 8825 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8826 let expr2_0: u8 = 32; 8827 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8828 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8829 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8830 return Some(expr5_0); 8831 } 8832 } 8833 } 8834 &InstructionData::Load { 8835 opcode: ref pattern5_0, 8836 arg: pattern5_1, 8837 flags: pattern5_2, 8838 offset: pattern5_3, 8839 } => { 8840 if let &Opcode::Load = pattern5_0 { 8841 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8842 // Rule at src/isa/s390x/lower.isle line 1218. 8843 let expr0_0 = 8844 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8845 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8846 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8847 return Some(expr2_0); 8848 } 8849 } 8850 } 8851 _ => {} 8852 } 8853 } 8854 if pattern2_0 == F64 { 8855 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8856 match &pattern4_0 { 8857 &InstructionData::Unary { 8858 opcode: ref pattern5_0, 8859 arg: pattern5_1, 8860 } => { 8861 if let &Opcode::Bitcast = pattern5_0 { 8862 let pattern7_0 = C::value_type(ctx, pattern5_1); 8863 if pattern7_0 == I64 { 8864 // Rule at src/isa/s390x/lower.isle line 1131. 8865 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8866 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8867 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8868 return Some(expr2_0); 8869 } 8870 } 8871 } 8872 &InstructionData::Load { 8873 opcode: ref pattern5_0, 8874 arg: pattern5_1, 8875 flags: pattern5_2, 8876 offset: pattern5_3, 8877 } => { 8878 if let &Opcode::Load = pattern5_0 { 8879 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8880 // Rule at src/isa/s390x/lower.isle line 1233. 8881 let expr0_0 = 8882 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8883 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8884 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8885 return Some(expr2_0); 8886 } 8887 } 8888 } 8889 _ => {} 8890 } 8891 } 8892 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8893 match &pattern3_0 { 8894 &InstructionData::NullAry { 8895 opcode: ref pattern4_0, 8896 } => { 8897 if let &Opcode::Null = pattern4_0 { 8898 // Rule at src/isa/s390x/lower.isle line 41. 8899 let expr0_0: u64 = 0; 8900 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8901 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8902 return Some(expr2_0); 8903 } 8904 } 8905 &InstructionData::UnaryImm { 8906 opcode: ref pattern4_0, 8907 imm: pattern4_1, 8908 } => { 8909 if let &Opcode::Iconst = pattern4_0 { 8910 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8911 // Rule at src/isa/s390x/lower.isle line 15. 8912 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8913 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8914 return Some(expr1_0); 8915 } 8916 } 8917 &InstructionData::StackLoad { 8918 opcode: ref pattern4_0, 8919 stack_slot: pattern4_1, 8920 offset: pattern4_2, 8921 } => { 8922 if let &Opcode::StackAddr = pattern4_0 { 8923 // Rule at src/isa/s390x/lower.isle line 1152. 8924 let expr0_0 = 8925 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8926 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8927 return Some(expr1_0); 8928 } 8929 } 8930 &InstructionData::UnaryBool { 8931 opcode: ref pattern4_0, 8932 imm: pattern4_1, 8933 } => { 8934 if let &Opcode::Bconst = pattern4_0 { 8935 if pattern4_1 == true { 8936 // Rule at src/isa/s390x/lower.isle line 23. 8937 let expr0_0: u64 = 1; 8938 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8939 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8940 return Some(expr2_0); 8941 } 8942 if pattern4_1 == false { 8943 // Rule at src/isa/s390x/lower.isle line 21. 8944 let expr0_0: u64 = 0; 8945 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8946 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8947 return Some(expr2_0); 8948 } 8949 } 8950 } 8951 &InstructionData::Binary { 8952 opcode: ref pattern4_0, 8953 args: ref pattern4_1, 8954 } => { 8955 match pattern4_0 { 8956 &Opcode::Fadd => { 8957 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8958 // Rule at src/isa/s390x/lower.isle line 920. 8959 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8960 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8961 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8962 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8963 return Some(expr3_0); 8964 } 8965 &Opcode::Fsub => { 8966 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8967 // Rule at src/isa/s390x/lower.isle line 927. 8968 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8969 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8970 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8971 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8972 return Some(expr3_0); 8973 } 8974 &Opcode::Fmul => { 8975 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8976 // Rule at src/isa/s390x/lower.isle line 934. 8977 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8978 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8979 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8980 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8981 return Some(expr3_0); 8982 } 8983 &Opcode::Fdiv => { 8984 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8985 // Rule at src/isa/s390x/lower.isle line 941. 8986 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8987 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8988 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8989 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8990 return Some(expr3_0); 8991 } 8992 &Opcode::Fcopysign => { 8993 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8994 // Rule at src/isa/s390x/lower.isle line 962. 8995 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8996 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8997 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8998 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8999 return Some(expr3_0); 9000 } 9001 &Opcode::Fmin => { 9002 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9003 // Rule at src/isa/s390x/lower.isle line 948. 9004 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9005 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9006 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9007 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9008 return Some(expr3_0); 9009 } 9010 &Opcode::Fmax => { 9011 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9012 // Rule at src/isa/s390x/lower.isle line 955. 9013 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9014 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9015 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9016 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9017 return Some(expr3_0); 9018 } 9019 _ => {} 9020 } 9021 } 9022 &InstructionData::FloatCompare { 9023 opcode: ref pattern4_0, 9024 args: ref pattern4_1, 9025 cond: ref pattern4_2, 9026 } => { 9027 if let &Opcode::Fcmp = pattern4_0 { 9028 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9029 // Rule at src/isa/s390x/lower.isle line 2004. 9030 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9031 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9032 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9033 return Some(expr2_0); 9034 } 9035 } 9036 &InstructionData::IntCompare { 9037 opcode: ref pattern4_0, 9038 args: ref pattern4_1, 9039 cond: ref pattern4_2, 9040 } => { 9041 if let &Opcode::Icmp = pattern4_0 { 9042 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9043 // Rule at src/isa/s390x/lower.isle line 1915. 9044 let expr0_0: bool = true; 9045 let expr1_0 = 9046 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9047 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9048 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9049 return Some(expr3_0); 9050 } 9051 } 9052 &InstructionData::Ternary { 9053 opcode: ref pattern4_0, 9054 args: ref pattern4_1, 9055 } => { 9056 match pattern4_0 { 9057 &Opcode::Select => { 9058 let (pattern6_0, pattern6_1, pattern6_2) = 9059 C::unpack_value_array_3(ctx, pattern4_1); 9060 // Rule at src/isa/s390x/lower.isle line 2046. 9061 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9062 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9063 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9064 let expr3_0 = constructor_select_bool_reg( 9065 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9066 )?; 9067 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9068 return Some(expr4_0); 9069 } 9070 &Opcode::Fma => { 9071 let (pattern6_0, pattern6_1, pattern6_2) = 9072 C::unpack_value_array_3(ctx, pattern4_1); 9073 // Rule at src/isa/s390x/lower.isle line 969. 9074 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9075 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9076 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9077 let expr3_0 = 9078 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9079 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9080 return Some(expr4_0); 9081 } 9082 _ => {} 9083 } 9084 } 9085 &InstructionData::IntSelect { 9086 opcode: ref pattern4_0, 9087 args: ref pattern4_1, 9088 cond: ref pattern4_2, 9089 } => { 9090 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9091 let (pattern6_0, pattern6_1, pattern6_2) = 9092 C::unpack_value_array_3(ctx, pattern4_1); 9093 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9094 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9095 if let &InstructionData::Binary { 9096 opcode: ref pattern9_0, 9097 args: ref pattern9_1, 9098 } = &pattern8_0 9099 { 9100 if let &Opcode::Ifcmp = pattern9_0 { 9101 let (pattern11_0, pattern11_1) = 9102 C::unpack_value_array_2(ctx, pattern9_1); 9103 // Rule at src/isa/s390x/lower.isle line 2058. 9104 let expr0_0: bool = false; 9105 let expr1_0 = constructor_icmp_val( 9106 ctx, 9107 expr0_0, 9108 pattern4_2, 9109 pattern11_0, 9110 pattern11_1, 9111 )?; 9112 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9113 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9114 let expr4_0 = constructor_select_bool_reg( 9115 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9116 )?; 9117 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9118 return Some(expr5_0); 9119 } 9120 } 9121 } 9122 } 9123 } 9124 &InstructionData::Unary { 9125 opcode: ref pattern4_0, 9126 arg: pattern4_1, 9127 } => { 9128 match pattern4_0 { 9129 &Opcode::Sqrt => { 9130 // Rule at src/isa/s390x/lower.isle line 976. 9131 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9132 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9133 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9134 return Some(expr2_0); 9135 } 9136 &Opcode::Fneg => { 9137 // Rule at src/isa/s390x/lower.isle line 983. 9138 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9139 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9140 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9141 return Some(expr2_0); 9142 } 9143 &Opcode::Fabs => { 9144 // Rule at src/isa/s390x/lower.isle line 990. 9145 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9146 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9147 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9148 return Some(expr2_0); 9149 } 9150 &Opcode::Ceil => { 9151 // Rule at src/isa/s390x/lower.isle line 997. 9152 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9153 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9154 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9155 return Some(expr2_0); 9156 } 9157 &Opcode::Floor => { 9158 // Rule at src/isa/s390x/lower.isle line 1004. 9159 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9160 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9161 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9162 return Some(expr2_0); 9163 } 9164 &Opcode::Trunc => { 9165 // Rule at src/isa/s390x/lower.isle line 1011. 9166 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9167 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9168 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9169 return Some(expr2_0); 9170 } 9171 &Opcode::Nearest => { 9172 // Rule at src/isa/s390x/lower.isle line 1018. 9173 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9174 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9175 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9176 return Some(expr2_0); 9177 } 9178 &Opcode::Bextend => { 9179 // Rule at src/isa/s390x/lower.isle line 760. 9180 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9181 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9182 return Some(expr1_0); 9183 } 9184 &Opcode::Bmask => { 9185 // Rule at src/isa/s390x/lower.isle line 762. 9186 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9187 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9188 return Some(expr1_0); 9189 } 9190 &Opcode::Fpromote => { 9191 let pattern6_0 = C::value_type(ctx, pattern4_1); 9192 // Rule at src/isa/s390x/lower.isle line 1025. 9193 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9194 let expr1_0 = 9195 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9196 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9197 return Some(expr2_0); 9198 } 9199 &Opcode::Fdemote => { 9200 let pattern6_0 = C::value_type(ctx, pattern4_1); 9201 // Rule at src/isa/s390x/lower.isle line 1032. 9202 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9203 let expr1_0 = 9204 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9205 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9206 return Some(expr2_0); 9207 } 9208 &Opcode::FcvtFromUint => { 9209 let pattern6_0 = C::value_type(ctx, pattern4_1); 9210 // Rule at src/isa/s390x/lower.isle line 1039. 9211 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9212 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9213 let expr2_0 = 9214 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9215 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9216 return Some(expr3_0); 9217 } 9218 &Opcode::FcvtFromSint => { 9219 let pattern6_0 = C::value_type(ctx, pattern4_1); 9220 // Rule at src/isa/s390x/lower.isle line 1047. 9221 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9222 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9223 let expr2_0 = 9224 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9225 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9226 return Some(expr3_0); 9227 } 9228 _ => {} 9229 } 9230 } 9231 _ => {} 9232 } 9233 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9234 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9235 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9236 match &pattern5_0 { 9237 &InstructionData::Binary { 9238 opcode: ref pattern6_0, 9239 args: ref pattern6_1, 9240 } => { 9241 match pattern6_0 { 9242 &Opcode::BandNot => { 9243 let (pattern8_0, pattern8_1) = 9244 C::unpack_value_array_2(ctx, pattern6_1); 9245 // Rule at src/isa/s390x/lower.isle line 702. 9246 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9247 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9248 let expr2_0 = 9249 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9250 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9251 return Some(expr3_0); 9252 } 9253 &Opcode::BorNot => { 9254 let (pattern8_0, pattern8_1) = 9255 C::unpack_value_array_2(ctx, pattern6_1); 9256 // Rule at src/isa/s390x/lower.isle line 713. 9257 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9258 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9259 let expr2_0 = 9260 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9261 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9262 return Some(expr3_0); 9263 } 9264 &Opcode::BxorNot => { 9265 let (pattern8_0, pattern8_1) = 9266 C::unpack_value_array_2(ctx, pattern6_1); 9267 // Rule at src/isa/s390x/lower.isle line 724. 9268 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9269 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9270 let expr2_0 = 9271 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9272 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9273 return Some(expr3_0); 9274 } 9275 _ => {} 9276 } 9277 } 9278 &InstructionData::Ternary { 9279 opcode: ref pattern6_0, 9280 args: ref pattern6_1, 9281 } => { 9282 if let &Opcode::Bitselect = pattern6_0 { 9283 let (pattern8_0, pattern8_1, pattern8_2) = 9284 C::unpack_value_array_3(ctx, pattern6_1); 9285 // Rule at src/isa/s390x/lower.isle line 735. 9286 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9287 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9288 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9289 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9290 let expr4_0 = 9291 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9292 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9293 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9294 return Some(expr6_0); 9295 } 9296 } 9297 &InstructionData::Unary { 9298 opcode: ref pattern6_0, 9299 arg: pattern6_1, 9300 } => { 9301 match pattern6_0 { 9302 &Opcode::Bnot => { 9303 // Rule at src/isa/s390x/lower.isle line 625. 9304 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9305 let expr1_0 = 9306 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9307 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9308 return Some(expr2_0); 9309 } 9310 &Opcode::Popcnt => { 9311 // Rule at src/isa/s390x/lower.isle line 889. 9312 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9313 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9314 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9315 return Some(expr2_0); 9316 } 9317 _ => {} 9318 } 9319 } 9320 _ => {} 9321 } 9322 } 9323 } 9324 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9325 if pattern2_0 == I16 { 9326 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9327 if let &InstructionData::Unary { 9328 opcode: ref pattern6_0, 9329 arg: pattern6_1, 9330 } = &pattern5_0 9331 { 9332 if let &Opcode::Popcnt = pattern6_0 { 9333 // Rule at src/isa/s390x/lower.isle line 898. 9334 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9335 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9336 let expr2_0: Type = I32; 9337 let expr3_0: Type = I32; 9338 let expr4_0: u8 = 8; 9339 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9340 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9341 let expr7_0: Type = I32; 9342 let expr8_0: u8 = 8; 9343 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9344 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9345 return Some(expr10_0); 9346 } 9347 } 9348 } 9349 if pattern2_0 == I32 { 9350 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9351 if let &InstructionData::Unary { 9352 opcode: ref pattern6_0, 9353 arg: pattern6_1, 9354 } = &pattern5_0 9355 { 9356 if let &Opcode::Popcnt = pattern6_0 { 9357 // Rule at src/isa/s390x/lower.isle line 903. 9358 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9359 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9360 let expr2_0: Type = I32; 9361 let expr3_0: Type = I32; 9362 let expr4_0: u8 = 16; 9363 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9364 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9365 let expr7_0: Type = I32; 9366 let expr8_0: Type = I32; 9367 let expr9_0: u8 = 8; 9368 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9369 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9370 let expr12_0: Type = I32; 9371 let expr13_0: u8 = 24; 9372 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9373 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9374 return Some(expr15_0); 9375 } 9376 } 9377 } 9378 if pattern2_0 == I64 { 9379 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9380 if let &InstructionData::Unary { 9381 opcode: ref pattern6_0, 9382 arg: pattern6_1, 9383 } = &pattern5_0 9384 { 9385 if let &Opcode::Popcnt = pattern6_0 { 9386 // Rule at src/isa/s390x/lower.isle line 909. 9387 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9388 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9389 let expr2_0: Type = I64; 9390 let expr3_0: Type = I64; 9391 let expr4_0: u8 = 32; 9392 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9393 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9394 let expr7_0: Type = I64; 9395 let expr8_0: Type = I64; 9396 let expr9_0: u8 = 16; 9397 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9398 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9399 let expr12_0: Type = I64; 9400 let expr13_0: Type = I64; 9401 let expr14_0: u8 = 8; 9402 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9403 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9404 let expr17_0: Type = I64; 9405 let expr18_0: u8 = 56; 9406 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9407 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9408 return Some(expr20_0); 9409 } 9410 } 9411 } 9412 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9413 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9414 match &pattern5_0 { 9415 &InstructionData::Binary { 9416 opcode: ref pattern6_0, 9417 args: ref pattern6_1, 9418 } => { 9419 match pattern6_0 { 9420 &Opcode::BandNot => { 9421 let (pattern8_0, pattern8_1) = 9422 C::unpack_value_array_2(ctx, pattern6_1); 9423 // Rule at src/isa/s390x/lower.isle line 706. 9424 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9425 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9426 let expr2_0 = 9427 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9428 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9429 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9430 return Some(expr4_0); 9431 } 9432 &Opcode::BorNot => { 9433 let (pattern8_0, pattern8_1) = 9434 C::unpack_value_array_2(ctx, pattern6_1); 9435 // Rule at src/isa/s390x/lower.isle line 717. 9436 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9437 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9438 let expr2_0 = 9439 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9440 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9441 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9442 return Some(expr4_0); 9443 } 9444 &Opcode::BxorNot => { 9445 let (pattern8_0, pattern8_1) = 9446 C::unpack_value_array_2(ctx, pattern6_1); 9447 // Rule at src/isa/s390x/lower.isle line 728. 9448 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9449 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9450 let expr2_0 = 9451 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9452 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9453 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9454 return Some(expr4_0); 9455 } 9456 _ => {} 9457 } 9458 } 9459 &InstructionData::Ternary { 9460 opcode: ref pattern6_0, 9461 args: ref pattern6_1, 9462 } => { 9463 if let &Opcode::Bitselect = pattern6_0 { 9464 let (pattern8_0, pattern8_1, pattern8_2) = 9465 C::unpack_value_array_3(ctx, pattern6_1); 9466 // Rule at src/isa/s390x/lower.isle line 742. 9467 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9468 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9469 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9470 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9471 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9472 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9473 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9474 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9475 return Some(expr7_0); 9476 } 9477 } 9478 &InstructionData::Unary { 9479 opcode: ref pattern6_0, 9480 arg: pattern6_1, 9481 } => { 9482 if let &Opcode::Bnot = pattern6_0 { 9483 // Rule at src/isa/s390x/lower.isle line 630. 9484 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9485 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9486 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9487 return Some(expr2_0); 9488 } 9489 } 9490 _ => {} 9491 } 9492 } 9493 } 9494 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9495 if pattern2_0 == F32 { 9496 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9497 if let &InstructionData::Load { 9498 opcode: ref pattern6_0, 9499 arg: pattern6_1, 9500 flags: pattern6_2, 9501 offset: pattern6_3, 9502 } = &pattern5_0 9503 { 9504 if let &Opcode::Load = pattern6_0 { 9505 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9506 // Rule at src/isa/s390x/lower.isle line 1222. 9507 let expr0_0 = 9508 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9509 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9510 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9511 return Some(expr2_0); 9512 } 9513 } 9514 } 9515 } 9516 if pattern2_0 == F64 { 9517 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9518 if let &InstructionData::Load { 9519 opcode: ref pattern6_0, 9520 arg: pattern6_1, 9521 flags: pattern6_2, 9522 offset: pattern6_3, 9523 } = &pattern5_0 9524 { 9525 if let &Opcode::Load = pattern6_0 { 9526 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9527 // Rule at src/isa/s390x/lower.isle line 1237. 9528 let expr0_0 = 9529 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9530 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9531 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9532 return Some(expr2_0); 9533 } 9534 } 9535 } 9536 } 9537 } 9538 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9539 if pattern2_0 == F32 { 9540 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9541 if let &InstructionData::Load { 9542 opcode: ref pattern6_0, 9543 arg: pattern6_1, 9544 flags: pattern6_2, 9545 offset: pattern6_3, 9546 } = &pattern5_0 9547 { 9548 if let &Opcode::Load = pattern6_0 { 9549 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9550 // Rule at src/isa/s390x/lower.isle line 1227. 9551 let expr0_0 = 9552 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9553 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9554 let expr2_0: Type = I64; 9555 let expr3_0: u8 = 32; 9556 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9557 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9558 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9559 return Some(expr6_0); 9560 } 9561 } 9562 } 9563 } 9564 if pattern2_0 == F64 { 9565 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9566 if let &InstructionData::Load { 9567 opcode: ref pattern6_0, 9568 arg: pattern6_1, 9569 flags: pattern6_2, 9570 offset: pattern6_3, 9571 } = &pattern5_0 9572 { 9573 if let &Opcode::Load = pattern6_0 { 9574 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9575 // Rule at src/isa/s390x/lower.isle line 1242. 9576 let expr0_0 = 9577 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9578 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9579 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9580 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9581 return Some(expr3_0); 9582 } 9583 } 9584 } 9585 } 9586 } 9587 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9588 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9589 if let &InstructionData::Unary { 9590 opcode: ref pattern5_0, 9591 arg: pattern5_1, 9592 } = &pattern4_0 9593 { 9594 if let &Opcode::Bint = pattern5_0 { 9595 // Rule at src/isa/s390x/lower.isle line 796. 9596 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9597 let expr1_0: u16 = 1; 9598 let expr2_0: u8 = 0; 9599 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9600 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9601 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9602 return Some(expr5_0); 9603 } 9604 } 9605 } 9606 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9607 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9608 if let &InstructionData::Unary { 9609 opcode: ref pattern5_0, 9610 arg: pattern5_1, 9611 } = &pattern4_0 9612 { 9613 if let &Opcode::Bint = pattern5_0 { 9614 // Rule at src/isa/s390x/lower.isle line 800. 9615 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9616 let expr1_0: u32 = 1; 9617 let expr2_0: u8 = 0; 9618 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9619 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9620 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9621 return Some(expr5_0); 9622 } 9623 } 9624 } 9625 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9626 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9627 match &pattern4_0 { 9628 &InstructionData::Binary { 9629 opcode: ref pattern5_0, 9630 args: ref pattern5_1, 9631 } => { 9632 match pattern5_0 { 9633 &Opcode::Iadd => { 9634 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9635 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9636 // Rule at src/isa/s390x/lower.isle line 72. 9637 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9638 let expr1_0 = 9639 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9640 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9641 return Some(expr2_0); 9642 } 9643 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9644 // Rule at src/isa/s390x/lower.isle line 76. 9645 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9646 let expr1_0 = 9647 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9648 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9649 return Some(expr2_0); 9650 } 9651 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9652 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9653 if let &InstructionData::Unary { 9654 opcode: ref pattern10_0, 9655 arg: pattern10_1, 9656 } = &pattern9_0 9657 { 9658 if let &Opcode::Sextend = pattern10_0 { 9659 let pattern12_0 = C::value_type(ctx, pattern10_1); 9660 if pattern12_0 == I32 { 9661 // Rule at src/isa/s390x/lower.isle line 66. 9662 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9663 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9664 let expr2_0 = constructor_add_reg_sext32( 9665 ctx, pattern3_0, expr0_0, expr1_0, 9666 )?; 9667 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9668 return Some(expr3_0); 9669 } 9670 } 9671 } 9672 } 9673 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9674 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9675 if let &InstructionData::Load { 9676 opcode: ref pattern10_0, 9677 arg: pattern10_1, 9678 flags: pattern10_2, 9679 offset: pattern10_3, 9680 } = &pattern9_0 9681 { 9682 match pattern10_0 { 9683 &Opcode::Sload16 => { 9684 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9685 // Rule at src/isa/s390x/lower.isle line 94. 9686 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9687 let expr1_0 = 9688 constructor_sink_sload16(ctx, pattern8_0)?; 9689 let expr2_0 = constructor_add_mem_sext16( 9690 ctx, pattern3_0, expr0_0, &expr1_0, 9691 )?; 9692 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9693 return Some(expr3_0); 9694 } 9695 } 9696 &Opcode::Sload32 => { 9697 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9698 // Rule at src/isa/s390x/lower.isle line 98. 9699 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9700 let expr1_0 = 9701 constructor_sink_sload32(ctx, pattern8_0)?; 9702 let expr2_0 = constructor_add_mem_sext32( 9703 ctx, pattern3_0, expr0_0, &expr1_0, 9704 )?; 9705 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9706 return Some(expr3_0); 9707 } 9708 } 9709 _ => {} 9710 } 9711 } 9712 } 9713 let pattern8_0 = C::value_type(ctx, pattern7_0); 9714 if pattern8_0 == I16 { 9715 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9716 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9717 if let &InstructionData::Load { 9718 opcode: ref pattern12_0, 9719 arg: pattern12_1, 9720 flags: pattern12_2, 9721 offset: pattern12_3, 9722 } = &pattern11_0 9723 { 9724 if let &Opcode::Load = pattern12_0 { 9725 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9726 // Rule at src/isa/s390x/lower.isle line 88. 9727 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9728 let expr1_0 = 9729 constructor_sink_load(ctx, pattern10_0)?; 9730 let expr2_0 = constructor_add_mem_sext16( 9731 ctx, pattern3_0, expr0_0, &expr1_0, 9732 )?; 9733 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9734 return Some(expr3_0); 9735 } 9736 } 9737 } 9738 } 9739 } 9740 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9741 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9742 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9743 if let &InstructionData::Load { 9744 opcode: ref pattern12_0, 9745 arg: pattern12_1, 9746 flags: pattern12_2, 9747 offset: pattern12_3, 9748 } = &pattern11_0 9749 { 9750 if let &Opcode::Load = pattern12_0 { 9751 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9752 // Rule at src/isa/s390x/lower.isle line 82. 9753 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9754 let expr1_0 = 9755 constructor_sink_load(ctx, pattern10_0)?; 9756 let expr2_0 = constructor_add_mem( 9757 ctx, pattern3_0, expr0_0, &expr1_0, 9758 )?; 9759 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9760 return Some(expr3_0); 9761 } 9762 } 9763 } 9764 } 9765 } 9766 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9767 // Rule at src/isa/s390x/lower.isle line 70. 9768 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9769 let expr1_0 = 9770 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9771 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9772 return Some(expr2_0); 9773 } 9774 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9775 // Rule at src/isa/s390x/lower.isle line 74. 9776 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9777 let expr1_0 = 9778 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9779 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9780 return Some(expr2_0); 9781 } 9782 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9783 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9784 if let &InstructionData::Unary { 9785 opcode: ref pattern10_0, 9786 arg: pattern10_1, 9787 } = &pattern9_0 9788 { 9789 if let &Opcode::Sextend = pattern10_0 { 9790 let pattern12_0 = C::value_type(ctx, pattern10_1); 9791 if pattern12_0 == I32 { 9792 // Rule at src/isa/s390x/lower.isle line 64. 9793 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9794 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9795 let expr2_0 = constructor_add_reg_sext32( 9796 ctx, pattern3_0, expr0_0, expr1_0, 9797 )?; 9798 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9799 return Some(expr3_0); 9800 } 9801 } 9802 } 9803 } 9804 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9805 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9806 if let &InstructionData::Load { 9807 opcode: ref pattern10_0, 9808 arg: pattern10_1, 9809 flags: pattern10_2, 9810 offset: pattern10_3, 9811 } = &pattern9_0 9812 { 9813 match pattern10_0 { 9814 &Opcode::Sload16 => { 9815 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9816 // Rule at src/isa/s390x/lower.isle line 92. 9817 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9818 let expr1_0 = 9819 constructor_sink_sload16(ctx, pattern8_0)?; 9820 let expr2_0 = constructor_add_mem_sext16( 9821 ctx, pattern3_0, expr0_0, &expr1_0, 9822 )?; 9823 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9824 return Some(expr3_0); 9825 } 9826 } 9827 &Opcode::Sload32 => { 9828 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9829 // Rule at src/isa/s390x/lower.isle line 96. 9830 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9831 let expr1_0 = 9832 constructor_sink_sload32(ctx, pattern8_0)?; 9833 let expr2_0 = constructor_add_mem_sext32( 9834 ctx, pattern3_0, expr0_0, &expr1_0, 9835 )?; 9836 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9837 return Some(expr3_0); 9838 } 9839 } 9840 _ => {} 9841 } 9842 } 9843 } 9844 let pattern8_0 = C::value_type(ctx, pattern7_1); 9845 if pattern8_0 == I16 { 9846 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9847 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9848 if let &InstructionData::Load { 9849 opcode: ref pattern12_0, 9850 arg: pattern12_1, 9851 flags: pattern12_2, 9852 offset: pattern12_3, 9853 } = &pattern11_0 9854 { 9855 if let &Opcode::Load = pattern12_0 { 9856 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9857 // Rule at src/isa/s390x/lower.isle line 86. 9858 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9859 let expr1_0 = 9860 constructor_sink_load(ctx, pattern10_0)?; 9861 let expr2_0 = constructor_add_mem_sext16( 9862 ctx, pattern3_0, expr0_0, &expr1_0, 9863 )?; 9864 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9865 return Some(expr3_0); 9866 } 9867 } 9868 } 9869 } 9870 } 9871 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9872 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9873 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9874 if let &InstructionData::Load { 9875 opcode: ref pattern12_0, 9876 arg: pattern12_1, 9877 flags: pattern12_2, 9878 offset: pattern12_3, 9879 } = &pattern11_0 9880 { 9881 if let &Opcode::Load = pattern12_0 { 9882 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9883 // Rule at src/isa/s390x/lower.isle line 80. 9884 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9885 let expr1_0 = 9886 constructor_sink_load(ctx, pattern10_0)?; 9887 let expr2_0 = constructor_add_mem( 9888 ctx, pattern3_0, expr0_0, &expr1_0, 9889 )?; 9890 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9891 return Some(expr3_0); 9892 } 9893 } 9894 } 9895 } 9896 } 9897 // Rule at src/isa/s390x/lower.isle line 60. 9898 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9899 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9900 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9901 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9902 return Some(expr3_0); 9903 } 9904 &Opcode::Isub => { 9905 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9906 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9907 // Rule at src/isa/s390x/lower.isle line 113. 9908 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9909 let expr1_0 = 9910 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9911 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9912 return Some(expr2_0); 9913 } 9914 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9915 // Rule at src/isa/s390x/lower.isle line 115. 9916 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9917 let expr1_0 = 9918 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9919 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9920 return Some(expr2_0); 9921 } 9922 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9923 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9924 if let &InstructionData::Unary { 9925 opcode: ref pattern10_0, 9926 arg: pattern10_1, 9927 } = &pattern9_0 9928 { 9929 if let &Opcode::Sextend = pattern10_0 { 9930 let pattern12_0 = C::value_type(ctx, pattern10_1); 9931 if pattern12_0 == I32 { 9932 // Rule at src/isa/s390x/lower.isle line 109. 9933 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9934 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9935 let expr2_0 = constructor_sub_reg_sext32( 9936 ctx, pattern3_0, expr0_0, expr1_0, 9937 )?; 9938 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9939 return Some(expr3_0); 9940 } 9941 } 9942 } 9943 } 9944 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9945 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9946 if let &InstructionData::Load { 9947 opcode: ref pattern10_0, 9948 arg: pattern10_1, 9949 flags: pattern10_2, 9950 offset: pattern10_3, 9951 } = &pattern9_0 9952 { 9953 match pattern10_0 { 9954 &Opcode::Sload16 => { 9955 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9956 // Rule at src/isa/s390x/lower.isle line 127. 9957 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9958 let expr1_0 = 9959 constructor_sink_sload16(ctx, pattern8_0)?; 9960 let expr2_0 = constructor_sub_mem_sext16( 9961 ctx, pattern3_0, expr0_0, &expr1_0, 9962 )?; 9963 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9964 return Some(expr3_0); 9965 } 9966 } 9967 &Opcode::Sload32 => { 9968 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9969 // Rule at src/isa/s390x/lower.isle line 129. 9970 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9971 let expr1_0 = 9972 constructor_sink_sload32(ctx, pattern8_0)?; 9973 let expr2_0 = constructor_sub_mem_sext32( 9974 ctx, pattern3_0, expr0_0, &expr1_0, 9975 )?; 9976 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9977 return Some(expr3_0); 9978 } 9979 } 9980 _ => {} 9981 } 9982 } 9983 } 9984 let pattern8_0 = C::value_type(ctx, pattern7_1); 9985 if pattern8_0 == I16 { 9986 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9987 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9988 if let &InstructionData::Load { 9989 opcode: ref pattern12_0, 9990 arg: pattern12_1, 9991 flags: pattern12_2, 9992 offset: pattern12_3, 9993 } = &pattern11_0 9994 { 9995 if let &Opcode::Load = pattern12_0 { 9996 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9997 // Rule at src/isa/s390x/lower.isle line 123. 9998 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9999 let expr1_0 = 10000 constructor_sink_load(ctx, pattern10_0)?; 10001 let expr2_0 = constructor_sub_mem_sext16( 10002 ctx, pattern3_0, expr0_0, &expr1_0, 10003 )?; 10004 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10005 return Some(expr3_0); 10006 } 10007 } 10008 } 10009 } 10010 } 10011 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10012 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10013 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10014 if let &InstructionData::Load { 10015 opcode: ref pattern12_0, 10016 arg: pattern12_1, 10017 flags: pattern12_2, 10018 offset: pattern12_3, 10019 } = &pattern11_0 10020 { 10021 if let &Opcode::Load = pattern12_0 { 10022 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10023 // Rule at src/isa/s390x/lower.isle line 119. 10024 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10025 let expr1_0 = 10026 constructor_sink_load(ctx, pattern10_0)?; 10027 let expr2_0 = constructor_sub_mem( 10028 ctx, pattern3_0, expr0_0, &expr1_0, 10029 )?; 10030 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10031 return Some(expr3_0); 10032 } 10033 } 10034 } 10035 } 10036 } 10037 // Rule at src/isa/s390x/lower.isle line 105. 10038 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10039 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10040 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10041 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10042 return Some(expr3_0); 10043 } 10044 &Opcode::Imul => { 10045 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10046 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10047 // Rule at src/isa/s390x/lower.isle line 212. 10048 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10049 let expr1_0 = 10050 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10051 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10052 return Some(expr2_0); 10053 } 10054 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10055 // Rule at src/isa/s390x/lower.isle line 216. 10056 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10057 let expr1_0 = 10058 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10059 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10060 return Some(expr2_0); 10061 } 10062 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10063 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10064 if let &InstructionData::Unary { 10065 opcode: ref pattern10_0, 10066 arg: pattern10_1, 10067 } = &pattern9_0 10068 { 10069 if let &Opcode::Sextend = pattern10_0 { 10070 let pattern12_0 = C::value_type(ctx, pattern10_1); 10071 if pattern12_0 == I32 { 10072 // Rule at src/isa/s390x/lower.isle line 206. 10073 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10074 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10075 let expr2_0 = constructor_mul_reg_sext32( 10076 ctx, pattern3_0, expr0_0, expr1_0, 10077 )?; 10078 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10079 return Some(expr3_0); 10080 } 10081 } 10082 } 10083 } 10084 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10085 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10086 if let &InstructionData::Load { 10087 opcode: ref pattern10_0, 10088 arg: pattern10_1, 10089 flags: pattern10_2, 10090 offset: pattern10_3, 10091 } = &pattern9_0 10092 { 10093 match pattern10_0 { 10094 &Opcode::Sload16 => { 10095 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10096 // Rule at src/isa/s390x/lower.isle line 234. 10097 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10098 let expr1_0 = 10099 constructor_sink_sload16(ctx, pattern8_0)?; 10100 let expr2_0 = constructor_mul_mem_sext16( 10101 ctx, pattern3_0, expr0_0, &expr1_0, 10102 )?; 10103 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10104 return Some(expr3_0); 10105 } 10106 } 10107 &Opcode::Sload32 => { 10108 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10109 // Rule at src/isa/s390x/lower.isle line 238. 10110 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10111 let expr1_0 = 10112 constructor_sink_sload32(ctx, pattern8_0)?; 10113 let expr2_0 = constructor_mul_mem_sext32( 10114 ctx, pattern3_0, expr0_0, &expr1_0, 10115 )?; 10116 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10117 return Some(expr3_0); 10118 } 10119 } 10120 _ => {} 10121 } 10122 } 10123 } 10124 let pattern8_0 = C::value_type(ctx, pattern7_0); 10125 if pattern8_0 == I16 { 10126 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10127 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10128 if let &InstructionData::Load { 10129 opcode: ref pattern12_0, 10130 arg: pattern12_1, 10131 flags: pattern12_2, 10132 offset: pattern12_3, 10133 } = &pattern11_0 10134 { 10135 if let &Opcode::Load = pattern12_0 { 10136 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10137 // Rule at src/isa/s390x/lower.isle line 228. 10138 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10139 let expr1_0 = 10140 constructor_sink_load(ctx, pattern10_0)?; 10141 let expr2_0 = constructor_mul_mem_sext16( 10142 ctx, pattern3_0, expr0_0, &expr1_0, 10143 )?; 10144 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10145 return Some(expr3_0); 10146 } 10147 } 10148 } 10149 } 10150 } 10151 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10152 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10153 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10154 if let &InstructionData::Load { 10155 opcode: ref pattern12_0, 10156 arg: pattern12_1, 10157 flags: pattern12_2, 10158 offset: pattern12_3, 10159 } = &pattern11_0 10160 { 10161 if let &Opcode::Load = pattern12_0 { 10162 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10163 // Rule at src/isa/s390x/lower.isle line 222. 10164 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10165 let expr1_0 = 10166 constructor_sink_load(ctx, pattern10_0)?; 10167 let expr2_0 = constructor_mul_mem( 10168 ctx, pattern3_0, expr0_0, &expr1_0, 10169 )?; 10170 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10171 return Some(expr3_0); 10172 } 10173 } 10174 } 10175 } 10176 } 10177 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10178 // Rule at src/isa/s390x/lower.isle line 210. 10179 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10180 let expr1_0 = 10181 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10182 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10183 return Some(expr2_0); 10184 } 10185 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10186 // Rule at src/isa/s390x/lower.isle line 214. 10187 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10188 let expr1_0 = 10189 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10190 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10191 return Some(expr2_0); 10192 } 10193 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10194 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10195 if let &InstructionData::Unary { 10196 opcode: ref pattern10_0, 10197 arg: pattern10_1, 10198 } = &pattern9_0 10199 { 10200 if let &Opcode::Sextend = pattern10_0 { 10201 let pattern12_0 = C::value_type(ctx, pattern10_1); 10202 if pattern12_0 == I32 { 10203 // Rule at src/isa/s390x/lower.isle line 204. 10204 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10205 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10206 let expr2_0 = constructor_mul_reg_sext32( 10207 ctx, pattern3_0, expr0_0, expr1_0, 10208 )?; 10209 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10210 return Some(expr3_0); 10211 } 10212 } 10213 } 10214 } 10215 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10216 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10217 if let &InstructionData::Load { 10218 opcode: ref pattern10_0, 10219 arg: pattern10_1, 10220 flags: pattern10_2, 10221 offset: pattern10_3, 10222 } = &pattern9_0 10223 { 10224 match pattern10_0 { 10225 &Opcode::Sload16 => { 10226 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10227 // Rule at src/isa/s390x/lower.isle line 232. 10228 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10229 let expr1_0 = 10230 constructor_sink_sload16(ctx, pattern8_0)?; 10231 let expr2_0 = constructor_mul_mem_sext16( 10232 ctx, pattern3_0, expr0_0, &expr1_0, 10233 )?; 10234 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10235 return Some(expr3_0); 10236 } 10237 } 10238 &Opcode::Sload32 => { 10239 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10240 // Rule at src/isa/s390x/lower.isle line 236. 10241 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10242 let expr1_0 = 10243 constructor_sink_sload32(ctx, pattern8_0)?; 10244 let expr2_0 = constructor_mul_mem_sext32( 10245 ctx, pattern3_0, expr0_0, &expr1_0, 10246 )?; 10247 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10248 return Some(expr3_0); 10249 } 10250 } 10251 _ => {} 10252 } 10253 } 10254 } 10255 let pattern8_0 = C::value_type(ctx, pattern7_1); 10256 if pattern8_0 == I16 { 10257 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10258 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10259 if let &InstructionData::Load { 10260 opcode: ref pattern12_0, 10261 arg: pattern12_1, 10262 flags: pattern12_2, 10263 offset: pattern12_3, 10264 } = &pattern11_0 10265 { 10266 if let &Opcode::Load = pattern12_0 { 10267 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10268 // Rule at src/isa/s390x/lower.isle line 226. 10269 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10270 let expr1_0 = 10271 constructor_sink_load(ctx, pattern10_0)?; 10272 let expr2_0 = constructor_mul_mem_sext16( 10273 ctx, pattern3_0, expr0_0, &expr1_0, 10274 )?; 10275 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10276 return Some(expr3_0); 10277 } 10278 } 10279 } 10280 } 10281 } 10282 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10283 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10284 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10285 if let &InstructionData::Load { 10286 opcode: ref pattern12_0, 10287 arg: pattern12_1, 10288 flags: pattern12_2, 10289 offset: pattern12_3, 10290 } = &pattern11_0 10291 { 10292 if let &Opcode::Load = pattern12_0 { 10293 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10294 // Rule at src/isa/s390x/lower.isle line 220. 10295 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10296 let expr1_0 = 10297 constructor_sink_load(ctx, pattern10_0)?; 10298 let expr2_0 = constructor_mul_mem( 10299 ctx, pattern3_0, expr0_0, &expr1_0, 10300 )?; 10301 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10302 return Some(expr3_0); 10303 } 10304 } 10305 } 10306 } 10307 } 10308 // Rule at src/isa/s390x/lower.isle line 200. 10309 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10310 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10311 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10312 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10313 return Some(expr3_0); 10314 } 10315 &Opcode::Udiv => { 10316 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10317 // Rule at src/isa/s390x/lower.isle line 303. 10318 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10319 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10320 let expr2_0: u64 = 0; 10321 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10322 let expr4_0 = 10323 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10324 let expr5_0 = 10325 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10326 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10327 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10328 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10329 ctx, expr0_0, expr7_0, expr6_0, 10330 )?; 10331 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10332 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10333 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10334 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10335 return Some(expr12_0); 10336 } 10337 &Opcode::Sdiv => { 10338 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10339 // Rule at src/isa/s390x/lower.isle line 375. 10340 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10341 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10342 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10343 let expr3_0 = 10344 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10345 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10346 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10347 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10348 ctx, expr0_0, expr5_0, expr4_0, 10349 )?; 10350 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10351 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10352 )?; 10353 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10354 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10355 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10356 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10357 return Some(expr11_0); 10358 } 10359 &Opcode::Urem => { 10360 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10361 // Rule at src/isa/s390x/lower.isle line 326. 10362 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10363 let expr1_0: u64 = 0; 10364 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10365 let expr3_0 = 10366 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10367 let expr4_0 = 10368 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10369 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10370 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10371 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10372 ctx, expr0_0, expr6_0, expr5_0, 10373 )?; 10374 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10375 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10376 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10377 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10378 return Some(expr11_0); 10379 } 10380 &Opcode::Srem => { 10381 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10382 // Rule at src/isa/s390x/lower.isle line 398. 10383 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10384 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10385 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10386 let expr3_0 = 10387 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10388 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10389 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10390 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10391 ctx, expr0_0, expr5_0, expr4_0, 10392 )?; 10393 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10394 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10395 )?; 10396 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10397 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10398 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10399 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10400 return Some(expr11_0); 10401 } 10402 &Opcode::IaddIfcout => { 10403 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10404 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10405 // Rule at src/isa/s390x/lower.isle line 170. 10406 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10407 let expr1_0 = constructor_add_logical_zimm32( 10408 ctx, pattern3_0, expr0_0, pattern8_0, 10409 )?; 10410 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10411 return Some(expr2_0); 10412 } 10413 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10414 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10415 if let &InstructionData::Unary { 10416 opcode: ref pattern10_0, 10417 arg: pattern10_1, 10418 } = &pattern9_0 10419 { 10420 if let &Opcode::Uextend = pattern10_0 { 10421 let pattern12_0 = C::value_type(ctx, pattern10_1); 10422 if pattern12_0 == I32 { 10423 // Rule at src/isa/s390x/lower.isle line 164. 10424 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10425 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10426 let expr2_0 = constructor_add_logical_reg_zext32( 10427 ctx, pattern3_0, expr0_0, expr1_0, 10428 )?; 10429 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10430 return Some(expr3_0); 10431 } 10432 } 10433 } 10434 } 10435 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10436 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10437 if let &InstructionData::Load { 10438 opcode: ref pattern10_0, 10439 arg: pattern10_1, 10440 flags: pattern10_2, 10441 offset: pattern10_3, 10442 } = &pattern9_0 10443 { 10444 if let &Opcode::Uload32 = pattern10_0 { 10445 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10446 // Rule at src/isa/s390x/lower.isle line 182. 10447 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10448 let expr1_0 = 10449 constructor_sink_uload32(ctx, pattern8_0)?; 10450 let expr2_0 = constructor_add_logical_mem_zext32( 10451 ctx, pattern3_0, expr0_0, &expr1_0, 10452 )?; 10453 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10454 return Some(expr3_0); 10455 } 10456 } 10457 } 10458 } 10459 let pattern8_0 = C::value_type(ctx, pattern7_0); 10460 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10461 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10462 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10463 if let &InstructionData::Load { 10464 opcode: ref pattern12_0, 10465 arg: pattern12_1, 10466 flags: pattern12_2, 10467 offset: pattern12_3, 10468 } = &pattern11_0 10469 { 10470 if let &Opcode::Load = pattern12_0 { 10471 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10472 // Rule at src/isa/s390x/lower.isle line 176. 10473 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10474 let expr1_0 = 10475 constructor_sink_load(ctx, pattern10_0)?; 10476 let expr2_0 = constructor_add_logical_mem( 10477 ctx, pattern3_0, expr0_0, &expr1_0, 10478 )?; 10479 let expr3_0 = 10480 constructor_output_ifcout(ctx, expr2_0)?; 10481 return Some(expr3_0); 10482 } 10483 } 10484 } 10485 } 10486 } 10487 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10488 // Rule at src/isa/s390x/lower.isle line 168. 10489 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10490 let expr1_0 = constructor_add_logical_zimm32( 10491 ctx, pattern3_0, expr0_0, pattern8_0, 10492 )?; 10493 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10494 return Some(expr2_0); 10495 } 10496 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10497 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10498 if let &InstructionData::Unary { 10499 opcode: ref pattern10_0, 10500 arg: pattern10_1, 10501 } = &pattern9_0 10502 { 10503 if let &Opcode::Uextend = pattern10_0 { 10504 let pattern12_0 = C::value_type(ctx, pattern10_1); 10505 if pattern12_0 == I32 { 10506 // Rule at src/isa/s390x/lower.isle line 162. 10507 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10508 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10509 let expr2_0 = constructor_add_logical_reg_zext32( 10510 ctx, pattern3_0, expr0_0, expr1_0, 10511 )?; 10512 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10513 return Some(expr3_0); 10514 } 10515 } 10516 } 10517 } 10518 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10519 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10520 if let &InstructionData::Load { 10521 opcode: ref pattern10_0, 10522 arg: pattern10_1, 10523 flags: pattern10_2, 10524 offset: pattern10_3, 10525 } = &pattern9_0 10526 { 10527 if let &Opcode::Uload32 = pattern10_0 { 10528 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10529 // Rule at src/isa/s390x/lower.isle line 180. 10530 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10531 let expr1_0 = 10532 constructor_sink_uload32(ctx, pattern8_0)?; 10533 let expr2_0 = constructor_add_logical_mem_zext32( 10534 ctx, pattern3_0, expr0_0, &expr1_0, 10535 )?; 10536 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10537 return Some(expr3_0); 10538 } 10539 } 10540 } 10541 } 10542 let pattern8_0 = C::value_type(ctx, pattern7_1); 10543 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10544 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10545 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10546 if let &InstructionData::Load { 10547 opcode: ref pattern12_0, 10548 arg: pattern12_1, 10549 flags: pattern12_2, 10550 offset: pattern12_3, 10551 } = &pattern11_0 10552 { 10553 if let &Opcode::Load = pattern12_0 { 10554 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10555 // Rule at src/isa/s390x/lower.isle line 174. 10556 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10557 let expr1_0 = 10558 constructor_sink_load(ctx, pattern10_0)?; 10559 let expr2_0 = constructor_add_logical_mem( 10560 ctx, pattern3_0, expr0_0, &expr1_0, 10561 )?; 10562 let expr3_0 = 10563 constructor_output_ifcout(ctx, expr2_0)?; 10564 return Some(expr3_0); 10565 } 10566 } 10567 } 10568 } 10569 } 10570 // Rule at src/isa/s390x/lower.isle line 158. 10571 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10572 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10573 let expr2_0 = 10574 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10575 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10576 return Some(expr3_0); 10577 } 10578 &Opcode::Band => { 10579 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10580 let pattern8_0 = C::value_type(ctx, pattern7_0); 10581 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10582 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10583 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10584 if let &InstructionData::Load { 10585 opcode: ref pattern12_0, 10586 arg: pattern12_1, 10587 flags: pattern12_2, 10588 offset: pattern12_3, 10589 } = &pattern11_0 10590 { 10591 if let &Opcode::Load = pattern12_0 { 10592 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10593 // Rule at src/isa/s390x/lower.isle line 653. 10594 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10595 let expr1_0 = 10596 constructor_sink_load(ctx, pattern10_0)?; 10597 let expr2_0 = constructor_and_mem( 10598 ctx, pattern3_0, expr0_0, &expr1_0, 10599 )?; 10600 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10601 return Some(expr3_0); 10602 } 10603 } 10604 } 10605 } 10606 } 10607 if let Some(pattern8_0) = 10608 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10609 { 10610 // Rule at src/isa/s390x/lower.isle line 647. 10611 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10612 let expr1_0 = constructor_and_uimm32shifted( 10613 ctx, pattern3_0, expr0_0, pattern8_0, 10614 )?; 10615 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10616 return Some(expr2_0); 10617 } 10618 if let Some(pattern8_0) = 10619 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10620 { 10621 // Rule at src/isa/s390x/lower.isle line 643. 10622 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10623 let expr1_0 = constructor_and_uimm16shifted( 10624 ctx, pattern3_0, expr0_0, pattern8_0, 10625 )?; 10626 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10627 return Some(expr2_0); 10628 } 10629 let pattern8_0 = C::value_type(ctx, pattern7_1); 10630 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10631 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10632 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10633 if let &InstructionData::Load { 10634 opcode: ref pattern12_0, 10635 arg: pattern12_1, 10636 flags: pattern12_2, 10637 offset: pattern12_3, 10638 } = &pattern11_0 10639 { 10640 if let &Opcode::Load = pattern12_0 { 10641 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10642 // Rule at src/isa/s390x/lower.isle line 651. 10643 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10644 let expr1_0 = 10645 constructor_sink_load(ctx, pattern10_0)?; 10646 let expr2_0 = constructor_and_mem( 10647 ctx, pattern3_0, expr0_0, &expr1_0, 10648 )?; 10649 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10650 return Some(expr3_0); 10651 } 10652 } 10653 } 10654 } 10655 } 10656 if let Some(pattern8_0) = 10657 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10658 { 10659 // Rule at src/isa/s390x/lower.isle line 645. 10660 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10661 let expr1_0 = constructor_and_uimm32shifted( 10662 ctx, pattern3_0, expr0_0, pattern8_0, 10663 )?; 10664 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10665 return Some(expr2_0); 10666 } 10667 if let Some(pattern8_0) = 10668 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10669 { 10670 // Rule at src/isa/s390x/lower.isle line 641. 10671 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10672 let expr1_0 = constructor_and_uimm16shifted( 10673 ctx, pattern3_0, expr0_0, pattern8_0, 10674 )?; 10675 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10676 return Some(expr2_0); 10677 } 10678 // Rule at src/isa/s390x/lower.isle line 637. 10679 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10680 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10681 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10682 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10683 return Some(expr3_0); 10684 } 10685 &Opcode::Bor => { 10686 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10687 let pattern8_0 = C::value_type(ctx, pattern7_0); 10688 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10689 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10690 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10691 if let &InstructionData::Load { 10692 opcode: ref pattern12_0, 10693 arg: pattern12_1, 10694 flags: pattern12_2, 10695 offset: pattern12_3, 10696 } = &pattern11_0 10697 { 10698 if let &Opcode::Load = pattern12_0 { 10699 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10700 // Rule at src/isa/s390x/lower.isle line 676. 10701 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10702 let expr1_0 = 10703 constructor_sink_load(ctx, pattern10_0)?; 10704 let expr2_0 = constructor_or_mem( 10705 ctx, pattern3_0, expr0_0, &expr1_0, 10706 )?; 10707 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10708 return Some(expr3_0); 10709 } 10710 } 10711 } 10712 } 10713 } 10714 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10715 // Rule at src/isa/s390x/lower.isle line 670. 10716 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10717 let expr1_0 = constructor_or_uimm32shifted( 10718 ctx, pattern3_0, expr0_0, pattern8_0, 10719 )?; 10720 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10721 return Some(expr2_0); 10722 } 10723 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10724 // Rule at src/isa/s390x/lower.isle line 666. 10725 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10726 let expr1_0 = constructor_or_uimm16shifted( 10727 ctx, pattern3_0, expr0_0, pattern8_0, 10728 )?; 10729 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10730 return Some(expr2_0); 10731 } 10732 let pattern8_0 = C::value_type(ctx, pattern7_1); 10733 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10734 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10735 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10736 if let &InstructionData::Load { 10737 opcode: ref pattern12_0, 10738 arg: pattern12_1, 10739 flags: pattern12_2, 10740 offset: pattern12_3, 10741 } = &pattern11_0 10742 { 10743 if let &Opcode::Load = pattern12_0 { 10744 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10745 // Rule at src/isa/s390x/lower.isle line 674. 10746 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10747 let expr1_0 = 10748 constructor_sink_load(ctx, pattern10_0)?; 10749 let expr2_0 = constructor_or_mem( 10750 ctx, pattern3_0, expr0_0, &expr1_0, 10751 )?; 10752 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10753 return Some(expr3_0); 10754 } 10755 } 10756 } 10757 } 10758 } 10759 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10760 // Rule at src/isa/s390x/lower.isle line 668. 10761 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10762 let expr1_0 = constructor_or_uimm32shifted( 10763 ctx, pattern3_0, expr0_0, pattern8_0, 10764 )?; 10765 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10766 return Some(expr2_0); 10767 } 10768 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10769 // Rule at src/isa/s390x/lower.isle line 664. 10770 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10771 let expr1_0 = constructor_or_uimm16shifted( 10772 ctx, pattern3_0, expr0_0, pattern8_0, 10773 )?; 10774 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10775 return Some(expr2_0); 10776 } 10777 // Rule at src/isa/s390x/lower.isle line 660. 10778 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10779 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10780 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10781 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10782 return Some(expr3_0); 10783 } 10784 &Opcode::Bxor => { 10785 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10786 let pattern8_0 = C::value_type(ctx, pattern7_0); 10787 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10788 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10789 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10790 if let &InstructionData::Load { 10791 opcode: ref pattern12_0, 10792 arg: pattern12_1, 10793 flags: pattern12_2, 10794 offset: pattern12_3, 10795 } = &pattern11_0 10796 { 10797 if let &Opcode::Load = pattern12_0 { 10798 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10799 // Rule at src/isa/s390x/lower.isle line 695. 10800 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10801 let expr1_0 = 10802 constructor_sink_load(ctx, pattern10_0)?; 10803 let expr2_0 = constructor_xor_mem( 10804 ctx, pattern3_0, expr0_0, &expr1_0, 10805 )?; 10806 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10807 return Some(expr3_0); 10808 } 10809 } 10810 } 10811 } 10812 } 10813 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10814 // Rule at src/isa/s390x/lower.isle line 689. 10815 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10816 let expr1_0 = constructor_xor_uimm32shifted( 10817 ctx, pattern3_0, expr0_0, pattern8_0, 10818 )?; 10819 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10820 return Some(expr2_0); 10821 } 10822 let pattern8_0 = C::value_type(ctx, pattern7_1); 10823 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10824 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10825 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10826 if let &InstructionData::Load { 10827 opcode: ref pattern12_0, 10828 arg: pattern12_1, 10829 flags: pattern12_2, 10830 offset: pattern12_3, 10831 } = &pattern11_0 10832 { 10833 if let &Opcode::Load = pattern12_0 { 10834 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10835 // Rule at src/isa/s390x/lower.isle line 693. 10836 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10837 let expr1_0 = 10838 constructor_sink_load(ctx, pattern10_0)?; 10839 let expr2_0 = constructor_xor_mem( 10840 ctx, pattern3_0, expr0_0, &expr1_0, 10841 )?; 10842 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10843 return Some(expr3_0); 10844 } 10845 } 10846 } 10847 } 10848 } 10849 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10850 // Rule at src/isa/s390x/lower.isle line 687. 10851 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10852 let expr1_0 = constructor_xor_uimm32shifted( 10853 ctx, pattern3_0, expr0_0, pattern8_0, 10854 )?; 10855 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10856 return Some(expr2_0); 10857 } 10858 // Rule at src/isa/s390x/lower.isle line 683. 10859 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10860 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10861 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10862 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10863 return Some(expr3_0); 10864 } 10865 &Opcode::Ishl => { 10866 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10867 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10868 // Rule at src/isa/s390x/lower.isle line 482. 10869 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10870 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10871 let expr2_0 = 10872 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10873 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10874 return Some(expr3_0); 10875 } 10876 // Rule at src/isa/s390x/lower.isle line 477. 10877 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10878 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10879 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10880 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10881 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10882 return Some(expr4_0); 10883 } 10884 &Opcode::Ushr => { 10885 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10886 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10887 // Rule at src/isa/s390x/lower.isle line 498. 10888 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10889 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10890 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10891 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10892 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10893 return Some(expr4_0); 10894 } 10895 // Rule at src/isa/s390x/lower.isle line 491. 10896 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10897 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10898 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10899 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10900 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10901 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10902 return Some(expr5_0); 10903 } 10904 &Opcode::Sshr => { 10905 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10906 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10907 // Rule at src/isa/s390x/lower.isle line 515. 10908 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10909 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10910 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10911 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10912 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10913 return Some(expr4_0); 10914 } 10915 // Rule at src/isa/s390x/lower.isle line 508. 10916 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10917 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10918 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10919 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10920 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10921 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10922 return Some(expr5_0); 10923 } 10924 _ => {} 10925 } 10926 } 10927 &InstructionData::Unary { 10928 opcode: ref pattern5_0, 10929 arg: pattern5_1, 10930 } => { 10931 match pattern5_0 { 10932 &Opcode::Ineg => { 10933 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10934 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10935 if let &InstructionData::Unary { 10936 opcode: ref pattern9_0, 10937 arg: pattern9_1, 10938 } = &pattern8_0 10939 { 10940 if let &Opcode::Sextend = pattern9_0 { 10941 let pattern11_0 = C::value_type(ctx, pattern9_1); 10942 if pattern11_0 == I32 { 10943 // Rule at src/isa/s390x/lower.isle line 193. 10944 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10945 let expr1_0 = constructor_neg_reg_sext32( 10946 ctx, pattern3_0, expr0_0, 10947 )?; 10948 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10949 return Some(expr2_0); 10950 } 10951 } 10952 } 10953 } 10954 // Rule at src/isa/s390x/lower.isle line 189. 10955 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10956 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10957 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10958 return Some(expr2_0); 10959 } 10960 &Opcode::Iabs => { 10961 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10962 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10963 if let &InstructionData::Unary { 10964 opcode: ref pattern9_0, 10965 arg: pattern9_1, 10966 } = &pattern8_0 10967 { 10968 if let &Opcode::Sextend = pattern9_0 { 10969 let pattern11_0 = C::value_type(ctx, pattern9_1); 10970 if pattern11_0 == I32 { 10971 // Rule at src/isa/s390x/lower.isle line 141. 10972 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10973 let expr1_0 = constructor_abs_reg_sext32( 10974 ctx, pattern3_0, expr0_0, 10975 )?; 10976 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10977 return Some(expr2_0); 10978 } 10979 } 10980 } 10981 } 10982 // Rule at src/isa/s390x/lower.isle line 137. 10983 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10984 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10985 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10986 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10987 return Some(expr3_0); 10988 } 10989 &Opcode::Clz => { 10990 // Rule at src/isa/s390x/lower.isle line 821. 10991 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10992 let expr1_0: i16 = 64; 10993 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10994 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10995 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10996 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10997 return Some(expr5_0); 10998 } 10999 &Opcode::Cls => { 11000 // Rule at src/isa/s390x/lower.isle line 836. 11001 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11002 let expr1_0: Type = I64; 11003 let expr2_0: u8 = 63; 11004 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11005 let expr4_0: Type = I64; 11006 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11007 let expr6_0: i16 = 64; 11008 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11009 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11010 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11011 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11012 return Some(expr10_0); 11013 } 11014 &Opcode::Bint => { 11015 // Rule at src/isa/s390x/lower.isle line 804. 11016 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11017 let expr1_0: u64 = 1; 11018 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11019 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11020 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11021 return Some(expr4_0); 11022 } 11023 _ => {} 11024 } 11025 } 11026 _ => {} 11027 } 11028 } 11029 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11030 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11031 match &pattern4_0 { 11032 &InstructionData::Binary { 11033 opcode: ref pattern5_0, 11034 args: ref pattern5_1, 11035 } => { 11036 match pattern5_0 { 11037 &Opcode::Rotl => { 11038 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11039 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11040 // Rule at src/isa/s390x/lower.isle line 528. 11041 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11042 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11043 let expr2_0 = 11044 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11045 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11046 return Some(expr3_0); 11047 } 11048 // Rule at src/isa/s390x/lower.isle line 524. 11049 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11050 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11051 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11052 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11053 return Some(expr3_0); 11054 } 11055 &Opcode::Rotr => { 11056 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11057 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11058 // Rule at src/isa/s390x/lower.isle line 566. 11059 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11060 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11061 let expr2_0 = 11062 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11063 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11064 return Some(expr3_0); 11065 } 11066 // Rule at src/isa/s390x/lower.isle line 560. 11067 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11068 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11069 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11070 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11071 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11072 return Some(expr4_0); 11073 } 11074 _ => {} 11075 } 11076 } 11077 &InstructionData::AtomicRmw { 11078 opcode: ref pattern5_0, 11079 args: ref pattern5_1, 11080 flags: pattern5_2, 11081 op: ref pattern5_3, 11082 } => { 11083 if let &Opcode::AtomicRmw = pattern5_0 { 11084 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11085 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11086 match pattern5_3 { 11087 &AtomicRmwOp::And => { 11088 // Rule at src/isa/s390x/lower.isle line 1505. 11089 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11090 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11091 let expr2_0 = C::zero_offset(ctx); 11092 let expr3_0 = constructor_lower_address( 11093 ctx, pattern5_2, pattern7_0, expr2_0, 11094 )?; 11095 let expr4_0 = constructor_atomic_rmw_and( 11096 ctx, pattern3_0, expr1_0, &expr3_0, 11097 )?; 11098 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11099 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11100 return Some(expr6_0); 11101 } 11102 &AtomicRmwOp::Or => { 11103 // Rule at src/isa/s390x/lower.isle line 1517. 11104 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11105 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11106 let expr2_0 = C::zero_offset(ctx); 11107 let expr3_0 = constructor_lower_address( 11108 ctx, pattern5_2, pattern7_0, expr2_0, 11109 )?; 11110 let expr4_0 = constructor_atomic_rmw_or( 11111 ctx, pattern3_0, expr1_0, &expr3_0, 11112 )?; 11113 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11114 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11115 return Some(expr6_0); 11116 } 11117 &AtomicRmwOp::Xor => { 11118 // Rule at src/isa/s390x/lower.isle line 1529. 11119 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11120 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11121 let expr2_0 = C::zero_offset(ctx); 11122 let expr3_0 = constructor_lower_address( 11123 ctx, pattern5_2, pattern7_0, expr2_0, 11124 )?; 11125 let expr4_0 = constructor_atomic_rmw_xor( 11126 ctx, pattern3_0, expr1_0, &expr3_0, 11127 )?; 11128 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11129 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11130 return Some(expr6_0); 11131 } 11132 _ => {} 11133 } 11134 } 11135 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11136 match pattern5_3 { 11137 &AtomicRmwOp::Add => { 11138 // Rule at src/isa/s390x/lower.isle line 1535. 11139 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11140 let expr1_0 = C::zero_offset(ctx); 11141 let expr2_0 = constructor_lower_address( 11142 ctx, pattern5_2, pattern7_0, expr1_0, 11143 )?; 11144 let expr3_0 = constructor_atomic_rmw_add( 11145 ctx, pattern3_0, expr0_0, &expr2_0, 11146 )?; 11147 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11148 return Some(expr4_0); 11149 } 11150 &AtomicRmwOp::And => { 11151 // Rule at src/isa/s390x/lower.isle line 1499. 11152 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11153 let expr1_0 = C::zero_offset(ctx); 11154 let expr2_0 = constructor_lower_address( 11155 ctx, pattern5_2, pattern7_0, expr1_0, 11156 )?; 11157 let expr3_0 = constructor_atomic_rmw_and( 11158 ctx, pattern3_0, expr0_0, &expr2_0, 11159 )?; 11160 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11161 return Some(expr4_0); 11162 } 11163 &AtomicRmwOp::Or => { 11164 // Rule at src/isa/s390x/lower.isle line 1511. 11165 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11166 let expr1_0 = C::zero_offset(ctx); 11167 let expr2_0 = constructor_lower_address( 11168 ctx, pattern5_2, pattern7_0, expr1_0, 11169 )?; 11170 let expr3_0 = constructor_atomic_rmw_or( 11171 ctx, pattern3_0, expr0_0, &expr2_0, 11172 )?; 11173 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11174 return Some(expr4_0); 11175 } 11176 &AtomicRmwOp::Sub => { 11177 // Rule at src/isa/s390x/lower.isle line 1541. 11178 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11179 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11180 let expr2_0 = C::zero_offset(ctx); 11181 let expr3_0 = constructor_lower_address( 11182 ctx, pattern5_2, pattern7_0, expr2_0, 11183 )?; 11184 let expr4_0 = constructor_atomic_rmw_add( 11185 ctx, pattern3_0, expr1_0, &expr3_0, 11186 )?; 11187 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11188 return Some(expr5_0); 11189 } 11190 &AtomicRmwOp::Xor => { 11191 // Rule at src/isa/s390x/lower.isle line 1523. 11192 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11193 let expr1_0 = C::zero_offset(ctx); 11194 let expr2_0 = constructor_lower_address( 11195 ctx, pattern5_2, pattern7_0, expr1_0, 11196 )?; 11197 let expr3_0 = constructor_atomic_rmw_xor( 11198 ctx, pattern3_0, expr0_0, &expr2_0, 11199 )?; 11200 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11201 return Some(expr4_0); 11202 } 11203 _ => {} 11204 } 11205 } 11206 // Rule at src/isa/s390x/lower.isle line 1550. 11207 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11208 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11209 let expr2_0 = C::inst_builder_new(ctx); 11210 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11211 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11212 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11213 let expr6_0 = constructor_atomic_rmw_body( 11214 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11215 expr0_0, 11216 )?; 11217 let expr7_0 = constructor_casloop( 11218 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11219 )?; 11220 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11221 return Some(expr8_0); 11222 } 11223 } 11224 &InstructionData::AtomicCas { 11225 opcode: ref pattern5_0, 11226 args: ref pattern5_1, 11227 flags: pattern5_2, 11228 } => { 11229 if let &Opcode::AtomicCas = pattern5_0 { 11230 let (pattern7_0, pattern7_1, pattern7_2) = 11231 C::unpack_value_array_3(ctx, pattern5_1); 11232 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11233 // Rule at src/isa/s390x/lower.isle line 1762. 11234 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11235 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11236 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11237 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11238 let expr4_0 = C::zero_offset(ctx); 11239 let expr5_0 = 11240 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11241 let expr6_0 = constructor_atomic_cas_impl( 11242 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11243 )?; 11244 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11245 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11246 return Some(expr8_0); 11247 } 11248 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11249 // Rule at src/isa/s390x/lower.isle line 1755. 11250 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11251 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11252 let expr2_0 = C::zero_offset(ctx); 11253 let expr3_0 = 11254 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11255 let expr4_0 = constructor_atomic_cas_impl( 11256 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11257 )?; 11258 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11259 return Some(expr5_0); 11260 } 11261 } 11262 } 11263 &InstructionData::Unary { 11264 opcode: ref pattern5_0, 11265 arg: pattern5_1, 11266 } => { 11267 match pattern5_0 { 11268 &Opcode::FcvtToUint => { 11269 let pattern7_0 = C::value_type(ctx, pattern5_1); 11270 // Rule at src/isa/s390x/lower.isle line 1057. 11271 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11272 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11273 let expr2_0 = FloatCC::Unordered; 11274 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11275 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11276 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11277 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11278 ctx, pattern3_0, pattern7_0, expr0_0, 11279 )?; 11280 let expr7_0 = FloatCC::Unordered; 11281 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11282 let expr9_0 = C::trap_code_integer_overflow(ctx); 11283 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11284 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11285 return Some(expr11_0); 11286 } 11287 &Opcode::FcvtToUintSat => { 11288 let pattern7_0 = C::value_type(ctx, pattern5_1); 11289 // Rule at src/isa/s390x/lower.isle line 1098. 11290 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11291 let expr1_0 = 11292 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11293 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11294 let expr3_0 = FloatCC::Unordered; 11295 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11296 let expr5_0: i16 = 0; 11297 let expr6_0 = 11298 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11299 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11300 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11301 return Some(expr8_0); 11302 } 11303 &Opcode::FcvtToSint => { 11304 let pattern7_0 = C::value_type(ctx, pattern5_1); 11305 // Rule at src/isa/s390x/lower.isle line 1078. 11306 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11307 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11308 let expr2_0 = FloatCC::Unordered; 11309 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11310 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11311 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11312 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11313 ctx, pattern3_0, pattern7_0, expr0_0, 11314 )?; 11315 let expr7_0 = FloatCC::Unordered; 11316 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11317 let expr9_0 = C::trap_code_integer_overflow(ctx); 11318 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11319 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11320 return Some(expr11_0); 11321 } 11322 &Opcode::FcvtToSintSat => { 11323 let pattern7_0 = C::value_type(ctx, pattern5_1); 11324 // Rule at src/isa/s390x/lower.isle line 1115. 11325 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11326 let expr1_0 = 11327 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11328 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11329 let expr3_0 = FloatCC::Unordered; 11330 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11331 let expr5_0: i16 = 0; 11332 let expr6_0 = 11333 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11334 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11335 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11336 return Some(expr8_0); 11337 } 11338 _ => {} 11339 } 11340 } 11341 _ => {} 11342 } 11343 } 11344 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11345 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11346 match &pattern4_0 { 11347 &InstructionData::Binary { 11348 opcode: ref pattern5_0, 11349 args: ref pattern5_1, 11350 } => { 11351 match pattern5_0 { 11352 &Opcode::Umulhi => { 11353 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11354 // Rule at src/isa/s390x/lower.isle line 245. 11355 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11356 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11357 let expr2_0: Type = I32; 11358 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11359 let expr4_0: Type = I32; 11360 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11361 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11362 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11363 return Some(expr7_0); 11364 } 11365 &Opcode::Smulhi => { 11366 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11367 // Rule at src/isa/s390x/lower.isle line 267. 11368 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11369 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11370 let expr2_0: Type = I32; 11371 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11372 let expr4_0: Type = I32; 11373 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11374 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11375 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11376 return Some(expr7_0); 11377 } 11378 &Opcode::Rotl => { 11379 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11380 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11381 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11382 { 11383 // Rule at src/isa/s390x/lower.isle line 546. 11384 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11385 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11386 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11387 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11388 let expr4_0 = 11389 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11390 let expr5_0 = 11391 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11392 let expr6_0 = 11393 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11394 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11395 return Some(expr7_0); 11396 } 11397 } 11398 // Rule at src/isa/s390x/lower.isle line 534. 11399 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11400 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11401 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11402 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11403 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11404 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11405 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11406 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11407 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11408 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11409 return Some(expr9_0); 11410 } 11411 &Opcode::Rotr => { 11412 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11413 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11414 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11415 { 11416 // Rule at src/isa/s390x/lower.isle line 584. 11417 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11418 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11419 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11420 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11421 let expr4_0 = 11422 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11423 let expr5_0 = 11424 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11425 let expr6_0 = 11426 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11427 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11428 return Some(expr7_0); 11429 } 11430 } 11431 // Rule at src/isa/s390x/lower.isle line 572. 11432 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11433 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11434 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11435 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11436 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11437 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11438 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11439 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11440 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11441 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11442 return Some(expr9_0); 11443 } 11444 _ => {} 11445 } 11446 } 11447 &InstructionData::AtomicRmw { 11448 opcode: ref pattern5_0, 11449 args: ref pattern5_1, 11450 flags: pattern5_2, 11451 op: ref pattern5_3, 11452 } => { 11453 if let &Opcode::AtomicRmw = pattern5_0 { 11454 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11455 // Rule at src/isa/s390x/lower.isle line 1562. 11456 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11457 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11458 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11459 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11460 let expr4_0 = C::inst_builder_new(ctx); 11461 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11462 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11463 let expr7_0 = constructor_casloop_rotate_in( 11464 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11465 )?; 11466 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11467 let expr9_0 = constructor_atomic_rmw_body( 11468 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11469 expr0_0, 11470 )?; 11471 let expr10_0 = constructor_casloop_rotate_out( 11472 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11473 )?; 11474 let expr11_0 = constructor_casloop_subword( 11475 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11476 )?; 11477 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11478 return Some(expr12_0); 11479 } 11480 } 11481 &InstructionData::AtomicCas { 11482 opcode: ref pattern5_0, 11483 args: ref pattern5_1, 11484 flags: pattern5_2, 11485 } => { 11486 if let &Opcode::AtomicCas = pattern5_0 { 11487 let (pattern7_0, pattern7_1, pattern7_2) = 11488 C::unpack_value_array_3(ctx, pattern5_1); 11489 // Rule at src/isa/s390x/lower.isle line 1769. 11490 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11491 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11492 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11493 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11494 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11495 let expr5_0 = C::inst_builder_new(ctx); 11496 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11497 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11498 let expr8_0 = constructor_casloop_rotate_in( 11499 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11500 )?; 11501 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11502 let expr10_0 = constructor_atomic_cas_body( 11503 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11504 expr1_0, 11505 )?; 11506 let expr11_0 = constructor_casloop_rotate_out( 11507 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11508 )?; 11509 let expr12_0 = constructor_casloop_subword( 11510 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11511 )?; 11512 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11513 return Some(expr13_0); 11514 } 11515 } 11516 _ => {} 11517 } 11518 } 11519 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11520 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11521 match &pattern4_0 { 11522 &InstructionData::Unary { 11523 opcode: ref pattern5_0, 11524 arg: pattern5_1, 11525 } => { 11526 match pattern5_0 { 11527 &Opcode::Ctz => { 11528 // Rule at src/isa/s390x/lower.isle line 859. 11529 let expr0_0: Type = I64; 11530 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11531 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11532 let expr3_0 = 11533 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11534 let expr4_0: Type = I64; 11535 let expr5_0: Type = I64; 11536 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11537 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11538 let expr8_0: i16 = 64; 11539 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11540 let expr10_0: u64 = 63; 11541 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11542 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11543 let expr13_0 = 11544 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11545 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11546 return Some(expr14_0); 11547 } 11548 &Opcode::Uextend => { 11549 // Rule at src/isa/s390x/lower.isle line 603. 11550 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11551 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11552 return Some(expr1_0); 11553 } 11554 &Opcode::Sextend => { 11555 // Rule at src/isa/s390x/lower.isle line 614. 11556 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11557 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11558 return Some(expr1_0); 11559 } 11560 _ => {} 11561 } 11562 } 11563 &InstructionData::Load { 11564 opcode: ref pattern5_0, 11565 arg: pattern5_1, 11566 flags: pattern5_2, 11567 offset: pattern5_3, 11568 } => { 11569 match pattern5_0 { 11570 &Opcode::Uload8 => { 11571 // Rule at src/isa/s390x/lower.isle line 1251. 11572 let expr0_0: Type = I8; 11573 let expr1_0 = 11574 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11575 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11576 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11577 return Some(expr3_0); 11578 } 11579 &Opcode::Sload8 => { 11580 // Rule at src/isa/s390x/lower.isle line 1262. 11581 let expr0_0: Type = I8; 11582 let expr1_0 = 11583 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11584 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11585 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11586 return Some(expr3_0); 11587 } 11588 &Opcode::Uload16 => { 11589 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11590 // Rule at src/isa/s390x/lower.isle line 1278. 11591 let expr0_0 = constructor_lower_address( 11592 ctx, pattern5_2, pattern5_1, pattern5_3, 11593 )?; 11594 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11595 let expr2_0: Type = I16; 11596 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11597 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11598 return Some(expr4_0); 11599 } 11600 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11601 // Rule at src/isa/s390x/lower.isle line 1273. 11602 let expr0_0: Type = I16; 11603 let expr1_0 = constructor_lower_address( 11604 ctx, pattern5_2, pattern5_1, pattern5_3, 11605 )?; 11606 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11607 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11608 return Some(expr3_0); 11609 } 11610 } 11611 &Opcode::Sload16 => { 11612 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11613 // Rule at src/isa/s390x/lower.isle line 1303. 11614 let expr0_0 = constructor_lower_address( 11615 ctx, pattern5_2, pattern5_1, pattern5_3, 11616 )?; 11617 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11618 let expr2_0: Type = I16; 11619 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11620 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11621 return Some(expr4_0); 11622 } 11623 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11624 // Rule at src/isa/s390x/lower.isle line 1298. 11625 let expr0_0: Type = I16; 11626 let expr1_0 = constructor_lower_address( 11627 ctx, pattern5_2, pattern5_1, pattern5_3, 11628 )?; 11629 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11630 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11631 return Some(expr3_0); 11632 } 11633 } 11634 _ => {} 11635 } 11636 } 11637 _ => {} 11638 } 11639 } 11640 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11641 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11642 match &pattern4_0 { 11643 &InstructionData::Unary { 11644 opcode: ref pattern5_0, 11645 arg: pattern5_1, 11646 } => { 11647 match pattern5_0 { 11648 &Opcode::Ctz => { 11649 // Rule at src/isa/s390x/lower.isle line 874. 11650 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11651 let expr1_0: Type = I64; 11652 let expr2_0: Type = I64; 11653 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11654 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11655 let expr5_0: i16 = -1; 11656 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11657 let expr7_0: Type = I64; 11658 let expr8_0: Type = I64; 11659 let expr9_0: u64 = 63; 11660 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11661 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11662 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11663 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11664 return Some(expr13_0); 11665 } 11666 &Opcode::Uextend => { 11667 // Rule at src/isa/s390x/lower.isle line 607. 11668 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11669 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11670 return Some(expr1_0); 11671 } 11672 &Opcode::Sextend => { 11673 // Rule at src/isa/s390x/lower.isle line 618. 11674 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11675 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11676 return Some(expr1_0); 11677 } 11678 _ => {} 11679 } 11680 } 11681 &InstructionData::Load { 11682 opcode: ref pattern5_0, 11683 arg: pattern5_1, 11684 flags: pattern5_2, 11685 offset: pattern5_3, 11686 } => { 11687 match pattern5_0 { 11688 &Opcode::Uload8 => { 11689 // Rule at src/isa/s390x/lower.isle line 1255. 11690 let expr0_0: Type = I8; 11691 let expr1_0 = 11692 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11693 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11694 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11695 return Some(expr3_0); 11696 } 11697 &Opcode::Sload8 => { 11698 // Rule at src/isa/s390x/lower.isle line 1266. 11699 let expr0_0: Type = I8; 11700 let expr1_0 = 11701 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11702 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11703 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11704 return Some(expr3_0); 11705 } 11706 &Opcode::Uload16 => { 11707 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11708 // Rule at src/isa/s390x/lower.isle line 1289. 11709 let expr0_0 = constructor_lower_address( 11710 ctx, pattern5_2, pattern5_1, pattern5_3, 11711 )?; 11712 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11713 let expr2_0: Type = I16; 11714 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11715 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11716 return Some(expr4_0); 11717 } 11718 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11719 // Rule at src/isa/s390x/lower.isle line 1284. 11720 let expr0_0: Type = I16; 11721 let expr1_0 = constructor_lower_address( 11722 ctx, pattern5_2, pattern5_1, pattern5_3, 11723 )?; 11724 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11725 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11726 return Some(expr3_0); 11727 } 11728 } 11729 &Opcode::Sload16 => { 11730 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11731 // Rule at src/isa/s390x/lower.isle line 1314. 11732 let expr0_0 = constructor_lower_address( 11733 ctx, pattern5_2, pattern5_1, pattern5_3, 11734 )?; 11735 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11736 let expr2_0: Type = I16; 11737 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11738 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11739 return Some(expr4_0); 11740 } 11741 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11742 // Rule at src/isa/s390x/lower.isle line 1309. 11743 let expr0_0: Type = I16; 11744 let expr1_0 = constructor_lower_address( 11745 ctx, pattern5_2, pattern5_1, pattern5_3, 11746 )?; 11747 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11748 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11749 return Some(expr3_0); 11750 } 11751 } 11752 &Opcode::Uload32 => { 11753 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11754 // Rule at src/isa/s390x/lower.isle line 1328. 11755 let expr0_0 = constructor_lower_address( 11756 ctx, pattern5_2, pattern5_1, pattern5_3, 11757 )?; 11758 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11759 let expr2_0: Type = I32; 11760 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11761 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11762 return Some(expr4_0); 11763 } 11764 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11765 // Rule at src/isa/s390x/lower.isle line 1323. 11766 let expr0_0: Type = I32; 11767 let expr1_0 = constructor_lower_address( 11768 ctx, pattern5_2, pattern5_1, pattern5_3, 11769 )?; 11770 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11771 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11772 return Some(expr3_0); 11773 } 11774 } 11775 &Opcode::Sload32 => { 11776 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11777 // Rule at src/isa/s390x/lower.isle line 1342. 11778 let expr0_0 = constructor_lower_address( 11779 ctx, pattern5_2, pattern5_1, pattern5_3, 11780 )?; 11781 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11782 let expr2_0: Type = I32; 11783 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11784 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11785 return Some(expr4_0); 11786 } 11787 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11788 // Rule at src/isa/s390x/lower.isle line 1337. 11789 let expr0_0: Type = I32; 11790 let expr1_0 = constructor_lower_address( 11791 ctx, pattern5_2, pattern5_1, pattern5_3, 11792 )?; 11793 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11794 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11795 return Some(expr3_0); 11796 } 11797 } 11798 _ => {} 11799 } 11800 } 11801 _ => {} 11802 } 11803 } 11804 } 11805 return None; 11806 } 11807 11808 // Generated as internal constructor for term lower_branch. 11809 pub fn constructor_lower_branch<C: Context>( 11810 ctx: &mut C, 11811 arg0: Inst, 11812 arg1: &VecMachLabel, 11813 ) -> Option<InstOutput> { 11814 let pattern0_0 = arg0; 11815 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11816 match &pattern1_0 { 11817 &InstructionData::BranchTable { 11818 opcode: ref pattern2_0, 11819 arg: pattern2_1, 11820 destination: pattern2_2, 11821 table: pattern2_3, 11822 } => { 11823 if let &Opcode::BrTable = pattern2_0 { 11824 let pattern4_0 = arg1; 11825 // Rule at src/isa/s390x/lower.isle line 2076. 11826 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11827 let expr1_0: Type = I64; 11828 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11829 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11830 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11831 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11832 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11833 let expr7_0: u8 = 0; 11834 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11835 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11836 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11837 let expr11_0: Type = I64; 11838 let expr12_0: u8 = 2; 11839 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11840 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11841 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11842 return Some(expr15_0); 11843 } 11844 } 11845 &InstructionData::Branch { 11846 opcode: ref pattern2_0, 11847 args: pattern2_1, 11848 destination: pattern2_2, 11849 } => { 11850 match pattern2_0 { 11851 &Opcode::Brz => { 11852 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11853 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11854 let pattern6_0 = arg1; 11855 // Rule at src/isa/s390x/lower.isle line 2109. 11856 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11857 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11858 let expr2_0: u8 = 0; 11859 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11860 let expr4_0: u8 = 1; 11861 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11862 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11863 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11864 return Some(expr7_0); 11865 } 11866 } 11867 &Opcode::Brnz => { 11868 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11869 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11870 let pattern6_0 = arg1; 11871 // Rule at src/isa/s390x/lower.isle line 2120. 11872 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11873 let expr1_0: u8 = 0; 11874 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11875 let expr3_0: u8 = 1; 11876 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11877 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11878 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11879 return Some(expr6_0); 11880 } 11881 } 11882 _ => {} 11883 } 11884 } 11885 &InstructionData::Jump { 11886 opcode: ref pattern2_0, 11887 args: pattern2_1, 11888 destination: pattern2_2, 11889 } => { 11890 if let &Opcode::Jump = pattern2_0 { 11891 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11892 let pattern5_0 = arg1; 11893 // Rule at src/isa/s390x/lower.isle line 2068. 11894 let expr0_0: u8 = 0; 11895 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11896 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11897 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11898 return Some(expr3_0); 11899 } 11900 } 11901 &InstructionData::BranchInt { 11902 opcode: ref pattern2_0, 11903 args: pattern2_1, 11904 cond: ref pattern2_2, 11905 destination: pattern2_3, 11906 } => { 11907 if let &Opcode::Brif = pattern2_0 { 11908 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11909 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11910 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11911 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11912 if let &InstructionData::Binary { 11913 opcode: ref pattern8_0, 11914 args: ref pattern8_1, 11915 } = &pattern7_0 11916 { 11917 if let &Opcode::Ifcmp = pattern8_0 { 11918 let (pattern10_0, pattern10_1) = 11919 C::unpack_value_array_2(ctx, pattern8_1); 11920 let pattern11_0 = arg1; 11921 // Rule at src/isa/s390x/lower.isle line 2131. 11922 let expr0_0: bool = false; 11923 let expr1_0 = constructor_icmp_val( 11924 ctx, 11925 expr0_0, 11926 pattern2_2, 11927 pattern10_0, 11928 pattern10_1, 11929 )?; 11930 let expr2_0: u8 = 0; 11931 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11932 let expr4_0: u8 = 1; 11933 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11934 let expr6_0 = 11935 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11936 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11937 return Some(expr7_0); 11938 } 11939 } 11940 } 11941 } 11942 } 11943 } 11944 _ => {} 11945 } 11946 return None; 11947 } 11948 11949 // Generated as internal constructor for term output_ifcout. 11950 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11951 let pattern0_0 = arg0; 11952 // Rule at src/isa/s390x/lower.isle line 154. 11953 let expr0_0 = C::value_reg(ctx, pattern0_0); 11954 let expr1_0 = C::value_regs_invalid(ctx); 11955 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11956 return Some(expr2_0); 11957 } 11958 11959 // Generated as internal constructor for term zero_divisor_check_needed. 11960 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11961 let pattern0_0 = arg0; 11962 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11963 let pattern2_0 = 0; 11964 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11965 // Rule at src/isa/s390x/lower.isle line 344. 11966 let expr0_0: bool = false; 11967 return Some(expr0_0); 11968 } 11969 } 11970 let pattern1_0 = C::value_type(ctx, pattern0_0); 11971 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11972 // Rule at src/isa/s390x/lower.isle line 345. 11973 let expr0_0: bool = false; 11974 return Some(expr0_0); 11975 } 11976 // Rule at src/isa/s390x/lower.isle line 346. 11977 let expr0_0: bool = true; 11978 return Some(expr0_0); 11979 } 11980 11981 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11982 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11983 ctx: &mut C, 11984 arg0: bool, 11985 arg1: Type, 11986 arg2: Reg, 11987 ) -> Option<Reg> { 11988 let pattern0_0 = arg0; 11989 if pattern0_0 == true { 11990 let pattern2_0 = arg1; 11991 let pattern3_0 = arg2; 11992 // Rule at src/isa/s390x/lower.isle line 352. 11993 let expr0_0: i16 = 0; 11994 let expr1_0 = IntCC::Equal; 11995 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11996 let expr3_0 = C::trap_code_division_by_zero(ctx); 11997 let expr4_0 = constructor_icmps_simm16_and_trap( 11998 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 11999 )?; 12000 return Some(expr4_0); 12001 } 12002 if pattern0_0 == false { 12003 let pattern2_0 = arg1; 12004 let pattern3_0 = arg2; 12005 // Rule at src/isa/s390x/lower.isle line 351. 12006 let expr0_0 = C::invalid_reg(ctx); 12007 return Some(expr0_0); 12008 } 12009 return None; 12010 } 12011 12012 // Generated as internal constructor for term div_overflow_check_needed. 12013 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12014 let pattern0_0 = arg0; 12015 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12016 let pattern2_0 = -1; 12017 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12018 // Rule at src/isa/s390x/lower.isle line 425. 12019 let expr0_0: bool = false; 12020 return Some(expr0_0); 12021 } 12022 } 12023 // Rule at src/isa/s390x/lower.isle line 426. 12024 let expr0_0: bool = true; 12025 return Some(expr0_0); 12026 } 12027 12028 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12029 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12030 ctx: &mut C, 12031 arg0: bool, 12032 arg1: Type, 12033 arg2: Type, 12034 arg3: &RegPair, 12035 arg4: Reg, 12036 ) -> Option<Reg> { 12037 let pattern0_0 = arg0; 12038 if pattern0_0 == true { 12039 let pattern2_0 = arg1; 12040 let pattern3_0 = arg2; 12041 let pattern4_0 = arg3; 12042 let pattern5_0 = arg4; 12043 // Rule at src/isa/s390x/lower.isle line 439. 12044 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12045 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12046 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12047 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12048 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12049 let expr5_0: i16 = -1; 12050 let expr6_0 = IntCC::Equal; 12051 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12052 let expr8_0 = C::trap_code_integer_overflow(ctx); 12053 let expr9_0 = constructor_icmps_simm16_and_trap( 12054 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12055 )?; 12056 return Some(expr9_0); 12057 } 12058 if pattern0_0 == false { 12059 let pattern2_0 = arg1; 12060 let pattern3_0 = arg2; 12061 let pattern4_0 = arg3; 12062 let pattern5_0 = arg4; 12063 // Rule at src/isa/s390x/lower.isle line 438. 12064 let expr0_0 = C::invalid_reg(ctx); 12065 return Some(expr0_0); 12066 } 12067 return None; 12068 } 12069 12070 // Generated as internal constructor for term int_max. 12071 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12072 let pattern0_0 = arg0; 12073 if pattern0_0 == I8 { 12074 // Rule at src/isa/s390x/lower.isle line 447. 12075 let expr0_0: u64 = 127; 12076 return Some(expr0_0); 12077 } 12078 if pattern0_0 == I16 { 12079 // Rule at src/isa/s390x/lower.isle line 448. 12080 let expr0_0: u64 = 32767; 12081 return Some(expr0_0); 12082 } 12083 if pattern0_0 == I32 { 12084 // Rule at src/isa/s390x/lower.isle line 449. 12085 let expr0_0: u64 = 2147483647; 12086 return Some(expr0_0); 12087 } 12088 if pattern0_0 == I64 { 12089 // Rule at src/isa/s390x/lower.isle line 450. 12090 let expr0_0: u64 = 9223372036854775807; 12091 return Some(expr0_0); 12092 } 12093 return None; 12094 } 12095 12096 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12097 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12098 ctx: &mut C, 12099 arg0: bool, 12100 arg1: Type, 12101 arg2: &RegPair, 12102 arg3: Reg, 12103 ) -> Option<RegPair> { 12104 let pattern0_0 = arg0; 12105 if pattern0_0 == true { 12106 let pattern2_0 = arg1; 12107 if pattern2_0 == I32 { 12108 let pattern4_0 = arg2; 12109 let pattern5_0 = arg3; 12110 // Rule at src/isa/s390x/lower.isle line 468. 12111 return Some(pattern4_0.clone()); 12112 } 12113 if pattern2_0 == I64 { 12114 let pattern4_0 = arg2; 12115 let pattern5_0 = arg3; 12116 // Rule at src/isa/s390x/lower.isle line 469. 12117 let expr0_0: Type = I64; 12118 let expr1_0: Type = I64; 12119 let expr2_0: i16 = -1; 12120 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12121 let expr4_0 = IntCC::Equal; 12122 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12123 let expr6_0: i16 = 0; 12124 let expr7_0 = constructor_cmov_imm_regpair_lo( 12125 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12126 )?; 12127 return Some(expr7_0); 12128 } 12129 } 12130 if pattern0_0 == false { 12131 let pattern2_0 = arg1; 12132 let pattern3_0 = arg2; 12133 let pattern4_0 = arg3; 12134 // Rule at src/isa/s390x/lower.isle line 467. 12135 return Some(pattern3_0.clone()); 12136 } 12137 return None; 12138 } 12139 12140 // Generated as internal constructor for term cast_bool. 12141 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12142 let pattern0_0 = arg0; 12143 if pattern0_0 == B1 { 12144 let pattern2_0 = arg1; 12145 let pattern3_0 = C::value_type(ctx, pattern2_0); 12146 if pattern3_0 == B1 { 12147 // Rule at src/isa/s390x/lower.isle line 766. 12148 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12149 return Some(expr0_0); 12150 } 12151 if pattern3_0 == B8 { 12152 // Rule at src/isa/s390x/lower.isle line 767. 12153 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12154 return Some(expr0_0); 12155 } 12156 } 12157 if pattern0_0 == B8 { 12158 let pattern2_0 = arg1; 12159 let pattern3_0 = C::value_type(ctx, pattern2_0); 12160 if pattern3_0 == B8 { 12161 // Rule at src/isa/s390x/lower.isle line 768. 12162 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12163 return Some(expr0_0); 12164 } 12165 } 12166 if pattern0_0 == I8 { 12167 let pattern2_0 = arg1; 12168 let pattern3_0 = C::value_type(ctx, pattern2_0); 12169 if pattern3_0 == B8 { 12170 // Rule at src/isa/s390x/lower.isle line 769. 12171 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12172 return Some(expr0_0); 12173 } 12174 } 12175 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12176 let pattern2_0 = arg1; 12177 let pattern3_0 = C::value_type(ctx, pattern2_0); 12178 if pattern3_0 == B16 { 12179 // Rule at src/isa/s390x/lower.isle line 770. 12180 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12181 return Some(expr0_0); 12182 } 12183 } 12184 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12185 let pattern2_0 = arg1; 12186 let pattern3_0 = C::value_type(ctx, pattern2_0); 12187 if pattern3_0 == B32 { 12188 // Rule at src/isa/s390x/lower.isle line 771. 12189 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12190 return Some(expr0_0); 12191 } 12192 } 12193 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12194 let pattern2_0 = arg1; 12195 let pattern3_0 = C::value_type(ctx, pattern2_0); 12196 if pattern3_0 == B64 { 12197 // Rule at src/isa/s390x/lower.isle line 772. 12198 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12199 return Some(expr0_0); 12200 } 12201 } 12202 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12203 let pattern2_0 = arg1; 12204 let pattern3_0 = C::value_type(ctx, pattern2_0); 12205 if pattern3_0 == B1 { 12206 // Rule at src/isa/s390x/lower.isle line 775. 12207 let expr0_0: Type = I32; 12208 let expr1_0: Type = I32; 12209 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12210 let expr3_0: u8 = 31; 12211 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12212 let expr5_0: u8 = 31; 12213 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12214 return Some(expr6_0); 12215 } 12216 if pattern3_0 == B8 { 12217 // Rule at src/isa/s390x/lower.isle line 781. 12218 let expr0_0: Type = I8; 12219 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12220 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12221 return Some(expr2_0); 12222 } 12223 if pattern3_0 == B16 { 12224 // Rule at src/isa/s390x/lower.isle line 783. 12225 let expr0_0: Type = I16; 12226 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12227 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12228 return Some(expr2_0); 12229 } 12230 } 12231 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12232 let pattern2_0 = arg1; 12233 let pattern3_0 = C::value_type(ctx, pattern2_0); 12234 if pattern3_0 == B1 { 12235 // Rule at src/isa/s390x/lower.isle line 777. 12236 let expr0_0: Type = I64; 12237 let expr1_0: Type = I64; 12238 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12239 let expr3_0: u8 = 63; 12240 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12241 let expr5_0: u8 = 63; 12242 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12243 return Some(expr6_0); 12244 } 12245 if pattern3_0 == B8 { 12246 // Rule at src/isa/s390x/lower.isle line 785. 12247 let expr0_0: Type = I8; 12248 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12249 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12250 return Some(expr2_0); 12251 } 12252 if pattern3_0 == B16 { 12253 // Rule at src/isa/s390x/lower.isle line 787. 12254 let expr0_0: Type = I16; 12255 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12256 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12257 return Some(expr2_0); 12258 } 12259 if pattern3_0 == B32 { 12260 // Rule at src/isa/s390x/lower.isle line 789. 12261 let expr0_0: Type = I32; 12262 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12263 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12264 return Some(expr2_0); 12265 } 12266 } 12267 return None; 12268 } 12269 12270 // Generated as internal constructor for term clz_offset. 12271 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12272 let pattern0_0 = arg0; 12273 if pattern0_0 == I8 { 12274 let pattern2_0 = arg1; 12275 // Rule at src/isa/s390x/lower.isle line 814. 12276 let expr0_0: Type = I8; 12277 let expr1_0: i16 = -56; 12278 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12279 return Some(expr2_0); 12280 } 12281 if pattern0_0 == I16 { 12282 let pattern2_0 = arg1; 12283 // Rule at src/isa/s390x/lower.isle line 815. 12284 let expr0_0: Type = I16; 12285 let expr1_0: i16 = -48; 12286 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12287 return Some(expr2_0); 12288 } 12289 if pattern0_0 == I32 { 12290 let pattern2_0 = arg1; 12291 // Rule at src/isa/s390x/lower.isle line 816. 12292 let expr0_0: Type = I32; 12293 let expr1_0: i16 = -32; 12294 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12295 return Some(expr2_0); 12296 } 12297 if pattern0_0 == I64 { 12298 let pattern2_0 = arg1; 12299 // Rule at src/isa/s390x/lower.isle line 817. 12300 let expr0_0: Type = I64; 12301 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12302 return Some(expr1_0); 12303 } 12304 return None; 12305 } 12306 12307 // Generated as internal constructor for term ctz_guardbit. 12308 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12309 let pattern0_0 = arg0; 12310 if pattern0_0 == I8 { 12311 // Rule at src/isa/s390x/lower.isle line 866. 12312 let expr0_0: u16 = 256; 12313 let expr1_0: u8 = 0; 12314 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12315 return Some(expr2_0); 12316 } 12317 if pattern0_0 == I16 { 12318 // Rule at src/isa/s390x/lower.isle line 867. 12319 let expr0_0: u16 = 1; 12320 let expr1_0: u8 = 16; 12321 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12322 return Some(expr2_0); 12323 } 12324 if pattern0_0 == I32 { 12325 // Rule at src/isa/s390x/lower.isle line 868. 12326 let expr0_0: u16 = 1; 12327 let expr1_0: u8 = 32; 12328 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12329 return Some(expr2_0); 12330 } 12331 return None; 12332 } 12333 12334 // Generated as internal constructor for term istore8_impl. 12335 pub fn constructor_istore8_impl<C: Context>( 12336 ctx: &mut C, 12337 arg0: MemFlags, 12338 arg1: Value, 12339 arg2: Value, 12340 arg3: Offset32, 12341 ) -> Option<SideEffectNoResult> { 12342 let pattern0_0 = arg0; 12343 let pattern1_0 = arg1; 12344 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12345 let pattern3_0 = arg2; 12346 let pattern4_0 = arg3; 12347 // Rule at src/isa/s390x/lower.isle line 1424. 12348 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12349 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12350 return Some(expr1_0); 12351 } 12352 let pattern2_0 = arg2; 12353 let pattern3_0 = arg3; 12354 // Rule at src/isa/s390x/lower.isle line 1420. 12355 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12356 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12357 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12358 return Some(expr2_0); 12359 } 12360 12361 // Generated as internal constructor for term istore16_impl. 12362 pub fn constructor_istore16_impl<C: Context>( 12363 ctx: &mut C, 12364 arg0: MemFlags, 12365 arg1: Value, 12366 arg2: Value, 12367 arg3: Offset32, 12368 ) -> Option<SideEffectNoResult> { 12369 let pattern0_0 = arg0; 12370 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12371 let pattern2_0 = arg1; 12372 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12373 let pattern4_0 = arg2; 12374 let pattern5_0 = arg3; 12375 // Rule at src/isa/s390x/lower.isle line 1450. 12376 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12377 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12378 return Some(expr1_0); 12379 } 12380 let pattern3_0 = arg2; 12381 let pattern4_0 = arg3; 12382 // Rule at src/isa/s390x/lower.isle line 1442. 12383 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12384 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12385 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12386 return Some(expr2_0); 12387 } 12388 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12389 let pattern2_0 = arg1; 12390 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12391 let pattern4_0 = arg2; 12392 let pattern5_0 = arg3; 12393 // Rule at src/isa/s390x/lower.isle line 1446. 12394 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12395 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12396 return Some(expr1_0); 12397 } 12398 let pattern3_0 = arg2; 12399 let pattern4_0 = arg3; 12400 // Rule at src/isa/s390x/lower.isle line 1438. 12401 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12402 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12403 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12404 return Some(expr2_0); 12405 } 12406 return None; 12407 } 12408 12409 // Generated as internal constructor for term istore32_impl. 12410 pub fn constructor_istore32_impl<C: Context>( 12411 ctx: &mut C, 12412 arg0: MemFlags, 12413 arg1: Value, 12414 arg2: Value, 12415 arg3: Offset32, 12416 ) -> Option<SideEffectNoResult> { 12417 let pattern0_0 = arg0; 12418 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12419 let pattern2_0 = arg1; 12420 let pattern3_0 = arg2; 12421 let pattern4_0 = arg3; 12422 // Rule at src/isa/s390x/lower.isle line 1472. 12423 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12424 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12425 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12426 return Some(expr2_0); 12427 } 12428 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12429 let pattern2_0 = arg1; 12430 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12431 let pattern4_0 = arg2; 12432 let pattern5_0 = arg3; 12433 // Rule at src/isa/s390x/lower.isle line 1468. 12434 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12435 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12436 return Some(expr1_0); 12437 } 12438 let pattern3_0 = arg2; 12439 let pattern4_0 = arg3; 12440 // Rule at src/isa/s390x/lower.isle line 1464. 12441 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12442 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12443 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12444 return Some(expr2_0); 12445 } 12446 return None; 12447 } 12448 12449 // Generated as internal constructor for term istore64_impl. 12450 pub fn constructor_istore64_impl<C: Context>( 12451 ctx: &mut C, 12452 arg0: MemFlags, 12453 arg1: Value, 12454 arg2: Value, 12455 arg3: Offset32, 12456 ) -> Option<SideEffectNoResult> { 12457 let pattern0_0 = arg0; 12458 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12459 let pattern2_0 = arg1; 12460 let pattern3_0 = arg2; 12461 let pattern4_0 = arg3; 12462 // Rule at src/isa/s390x/lower.isle line 1490. 12463 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12464 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12465 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12466 return Some(expr2_0); 12467 } 12468 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12469 let pattern2_0 = arg1; 12470 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12471 let pattern4_0 = arg2; 12472 let pattern5_0 = arg3; 12473 // Rule at src/isa/s390x/lower.isle line 1486. 12474 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12475 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12476 return Some(expr1_0); 12477 } 12478 let pattern3_0 = arg2; 12479 let pattern4_0 = arg3; 12480 // Rule at src/isa/s390x/lower.isle line 1482. 12481 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12482 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12483 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12484 return Some(expr2_0); 12485 } 12486 return None; 12487 } 12488 12489 // Generated as internal constructor for term atomic_rmw_body. 12490 pub fn constructor_atomic_rmw_body<C: Context>( 12491 ctx: &mut C, 12492 arg0: &VecMInstBuilder, 12493 arg1: Type, 12494 arg2: MemFlags, 12495 arg3: &AtomicRmwOp, 12496 arg4: WritableReg, 12497 arg5: Reg, 12498 arg6: Reg, 12499 ) -> Option<Reg> { 12500 let pattern0_0 = arg0; 12501 let pattern1_0 = arg1; 12502 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12503 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12504 let pattern4_0 = arg2; 12505 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12506 let pattern6_0 = arg3; 12507 if let &AtomicRmwOp::Nand = pattern6_0 { 12508 let pattern8_0 = arg4; 12509 let pattern9_0 = arg5; 12510 let pattern10_0 = arg6; 12511 // Rule at src/isa/s390x/lower.isle line 1598. 12512 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12513 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12514 let expr2_0 = constructor_push_alu_reg( 12515 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12516 )?; 12517 return Some(expr2_0); 12518 } 12519 } 12520 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12521 let pattern6_0 = arg3; 12522 if let &AtomicRmwOp::Nand = pattern6_0 { 12523 let pattern8_0 = arg4; 12524 let pattern9_0 = arg5; 12525 let pattern10_0 = arg6; 12526 // Rule at src/isa/s390x/lower.isle line 1595. 12527 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12528 let expr1_0 = constructor_push_alu_reg( 12529 ctx, 12530 pattern0_0, 12531 &expr0_0, 12532 pattern8_0, 12533 pattern9_0, 12534 pattern10_0, 12535 )?; 12536 return Some(expr1_0); 12537 } 12538 } 12539 } 12540 } 12541 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12542 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12543 let pattern4_0 = arg2; 12544 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12545 let pattern6_0 = arg3; 12546 if let &AtomicRmwOp::Nand = pattern6_0 { 12547 let pattern8_0 = arg4; 12548 let pattern9_0 = arg5; 12549 let pattern10_0 = arg6; 12550 // Rule at src/isa/s390x/lower.isle line 1605. 12551 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12552 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12553 let expr2_0 = constructor_push_alu_reg( 12554 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12555 )?; 12556 let expr3_0 = 12557 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12558 return Some(expr3_0); 12559 } 12560 } 12561 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12562 let pattern6_0 = arg3; 12563 if let &AtomicRmwOp::Nand = pattern6_0 { 12564 let pattern8_0 = arg4; 12565 let pattern9_0 = arg5; 12566 let pattern10_0 = arg6; 12567 // Rule at src/isa/s390x/lower.isle line 1601. 12568 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12569 let expr1_0 = constructor_push_alu_reg( 12570 ctx, 12571 pattern0_0, 12572 &expr0_0, 12573 pattern8_0, 12574 pattern9_0, 12575 pattern10_0, 12576 )?; 12577 let expr2_0 = 12578 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12579 return Some(expr2_0); 12580 } 12581 } 12582 } 12583 } 12584 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12585 let pattern3_0 = arg2; 12586 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12587 let pattern5_0 = arg3; 12588 if let &AtomicRmwOp::Xchg = pattern5_0 { 12589 let pattern7_0 = arg4; 12590 let pattern8_0 = arg5; 12591 let pattern9_0 = arg6; 12592 // Rule at src/isa/s390x/lower.isle line 1587. 12593 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12594 return Some(expr0_0); 12595 } 12596 } 12597 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12598 let pattern5_0 = arg3; 12599 if let &AtomicRmwOp::Xchg = pattern5_0 { 12600 let pattern7_0 = arg4; 12601 let pattern8_0 = arg5; 12602 let pattern9_0 = arg6; 12603 // Rule at src/isa/s390x/lower.isle line 1584. 12604 return Some(pattern9_0); 12605 } 12606 } 12607 } 12608 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12609 let pattern3_0 = arg2; 12610 let pattern4_0 = arg3; 12611 match pattern4_0 { 12612 &AtomicRmwOp::And => { 12613 let pattern6_0 = arg4; 12614 let pattern7_0 = arg5; 12615 let pattern8_0 = arg6; 12616 // Rule at src/isa/s390x/lower.isle line 1615. 12617 let expr0_0 = RxSBGOp::And; 12618 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12619 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12620 pattern8_0, 12621 )?; 12622 return Some(expr1_0); 12623 } 12624 &AtomicRmwOp::Nand => { 12625 let pattern6_0 = arg4; 12626 let pattern7_0 = arg5; 12627 let pattern8_0 = arg6; 12628 // Rule at src/isa/s390x/lower.isle line 1621. 12629 let expr0_0 = RxSBGOp::And; 12630 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12631 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12632 pattern8_0, 12633 )?; 12634 let expr2_0 = constructor_atomic_rmw_body_invert( 12635 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12636 )?; 12637 return Some(expr2_0); 12638 } 12639 &AtomicRmwOp::Or => { 12640 let pattern6_0 = arg4; 12641 let pattern7_0 = arg5; 12642 let pattern8_0 = arg6; 12643 // Rule at src/isa/s390x/lower.isle line 1617. 12644 let expr0_0 = RxSBGOp::Or; 12645 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12646 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12647 pattern8_0, 12648 )?; 12649 return Some(expr1_0); 12650 } 12651 &AtomicRmwOp::Xchg => { 12652 let pattern6_0 = arg4; 12653 let pattern7_0 = arg5; 12654 let pattern8_0 = arg6; 12655 // Rule at src/isa/s390x/lower.isle line 1613. 12656 let expr0_0 = RxSBGOp::Insert; 12657 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12658 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12659 pattern8_0, 12660 )?; 12661 return Some(expr1_0); 12662 } 12663 &AtomicRmwOp::Xor => { 12664 let pattern6_0 = arg4; 12665 let pattern7_0 = arg5; 12666 let pattern8_0 = arg6; 12667 // Rule at src/isa/s390x/lower.isle line 1619. 12668 let expr0_0 = RxSBGOp::Xor; 12669 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12670 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12671 pattern8_0, 12672 )?; 12673 return Some(expr1_0); 12674 } 12675 _ => {} 12676 } 12677 } 12678 let pattern2_0 = arg2; 12679 let pattern3_0 = arg3; 12680 match pattern3_0 { 12681 &AtomicRmwOp::Add => { 12682 let pattern5_0 = arg4; 12683 let pattern6_0 = arg5; 12684 let pattern7_0 = arg6; 12685 // Rule at src/isa/s390x/lower.isle line 1653. 12686 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12687 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12688 let expr2_0 = constructor_atomic_rmw_body_addsub( 12689 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12690 pattern7_0, 12691 )?; 12692 return Some(expr2_0); 12693 } 12694 &AtomicRmwOp::Smax => { 12695 let pattern5_0 = arg4; 12696 let pattern6_0 = arg5; 12697 let pattern7_0 = arg6; 12698 // Rule at src/isa/s390x/lower.isle line 1694. 12699 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12700 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12701 let expr2_0 = IntCC::SignedGreaterThan; 12702 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12703 let expr4_0 = constructor_atomic_rmw_body_minmax( 12704 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12705 pattern6_0, pattern7_0, 12706 )?; 12707 return Some(expr4_0); 12708 } 12709 &AtomicRmwOp::Smin => { 12710 let pattern5_0 = arg4; 12711 let pattern6_0 = arg5; 12712 let pattern7_0 = arg6; 12713 // Rule at src/isa/s390x/lower.isle line 1691. 12714 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12715 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12716 let expr2_0 = IntCC::SignedLessThan; 12717 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12718 let expr4_0 = constructor_atomic_rmw_body_minmax( 12719 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12720 pattern6_0, pattern7_0, 12721 )?; 12722 return Some(expr4_0); 12723 } 12724 &AtomicRmwOp::Sub => { 12725 let pattern5_0 = arg4; 12726 let pattern6_0 = arg5; 12727 let pattern7_0 = arg6; 12728 // Rule at src/isa/s390x/lower.isle line 1655. 12729 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12730 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12731 let expr2_0 = constructor_atomic_rmw_body_addsub( 12732 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12733 pattern7_0, 12734 )?; 12735 return Some(expr2_0); 12736 } 12737 &AtomicRmwOp::Umax => { 12738 let pattern5_0 = arg4; 12739 let pattern6_0 = arg5; 12740 let pattern7_0 = arg6; 12741 // Rule at src/isa/s390x/lower.isle line 1700. 12742 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12743 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12744 let expr2_0 = IntCC::UnsignedGreaterThan; 12745 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12746 let expr4_0 = constructor_atomic_rmw_body_minmax( 12747 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12748 pattern6_0, pattern7_0, 12749 )?; 12750 return Some(expr4_0); 12751 } 12752 &AtomicRmwOp::Umin => { 12753 let pattern5_0 = arg4; 12754 let pattern6_0 = arg5; 12755 let pattern7_0 = arg6; 12756 // Rule at src/isa/s390x/lower.isle line 1697. 12757 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12758 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12759 let expr2_0 = IntCC::UnsignedLessThan; 12760 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12761 let expr4_0 = constructor_atomic_rmw_body_minmax( 12762 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12763 pattern6_0, pattern7_0, 12764 )?; 12765 return Some(expr4_0); 12766 } 12767 _ => {} 12768 } 12769 return None; 12770 } 12771 12772 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12773 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12774 ctx: &mut C, 12775 arg0: &VecMInstBuilder, 12776 arg1: Type, 12777 arg2: MemFlags, 12778 arg3: &RxSBGOp, 12779 arg4: WritableReg, 12780 arg5: Reg, 12781 arg6: Reg, 12782 ) -> Option<Reg> { 12783 let pattern0_0 = arg0; 12784 let pattern1_0 = arg1; 12785 if pattern1_0 == I8 { 12786 let pattern3_0 = arg2; 12787 let pattern4_0 = arg3; 12788 let pattern5_0 = arg4; 12789 let pattern6_0 = arg5; 12790 let pattern7_0 = arg6; 12791 // Rule at src/isa/s390x/lower.isle line 1629. 12792 let expr0_0: u8 = 32; 12793 let expr1_0: u8 = 40; 12794 let expr2_0: i8 = 24; 12795 let expr3_0 = constructor_push_rxsbg( 12796 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12797 expr2_0, 12798 )?; 12799 return Some(expr3_0); 12800 } 12801 if pattern1_0 == I16 { 12802 let pattern3_0 = arg2; 12803 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12804 let pattern5_0 = arg3; 12805 let pattern6_0 = arg4; 12806 let pattern7_0 = arg5; 12807 let pattern8_0 = arg6; 12808 // Rule at src/isa/s390x/lower.isle line 1637. 12809 let expr0_0: Type = I32; 12810 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12811 let expr2_0: u8 = 48; 12812 let expr3_0: u8 = 64; 12813 let expr4_0: i8 = -16; 12814 let expr5_0 = constructor_push_rxsbg( 12815 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12816 expr4_0, 12817 )?; 12818 return Some(expr5_0); 12819 } 12820 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12821 let pattern5_0 = arg3; 12822 let pattern6_0 = arg4; 12823 let pattern7_0 = arg5; 12824 let pattern8_0 = arg6; 12825 // Rule at src/isa/s390x/lower.isle line 1633. 12826 let expr0_0: u8 = 32; 12827 let expr1_0: u8 = 48; 12828 let expr2_0: i8 = 16; 12829 let expr3_0 = constructor_push_rxsbg( 12830 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12831 expr2_0, 12832 )?; 12833 return Some(expr3_0); 12834 } 12835 } 12836 return None; 12837 } 12838 12839 // Generated as internal constructor for term atomic_rmw_body_invert. 12840 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12841 ctx: &mut C, 12842 arg0: &VecMInstBuilder, 12843 arg1: Type, 12844 arg2: MemFlags, 12845 arg3: WritableReg, 12846 arg4: Reg, 12847 ) -> Option<Reg> { 12848 let pattern0_0 = arg0; 12849 let pattern1_0 = arg1; 12850 if pattern1_0 == I8 { 12851 let pattern3_0 = arg2; 12852 let pattern4_0 = arg3; 12853 let pattern5_0 = arg4; 12854 // Rule at src/isa/s390x/lower.isle line 1643. 12855 let expr0_0: Type = I32; 12856 let expr1_0: u32 = 4278190080; 12857 let expr2_0: u8 = 0; 12858 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12859 let expr4_0 = constructor_push_xor_uimm32shifted( 12860 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12861 )?; 12862 return Some(expr4_0); 12863 } 12864 if pattern1_0 == I16 { 12865 let pattern3_0 = arg2; 12866 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12867 let pattern5_0 = arg3; 12868 let pattern6_0 = arg4; 12869 // Rule at src/isa/s390x/lower.isle line 1649. 12870 let expr0_0: Type = I32; 12871 let expr1_0: u32 = 65535; 12872 let expr2_0: u8 = 0; 12873 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12874 let expr4_0 = constructor_push_xor_uimm32shifted( 12875 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12876 )?; 12877 return Some(expr4_0); 12878 } 12879 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12880 let pattern5_0 = arg3; 12881 let pattern6_0 = arg4; 12882 // Rule at src/isa/s390x/lower.isle line 1646. 12883 let expr0_0: Type = I32; 12884 let expr1_0: u32 = 4294901760; 12885 let expr2_0: u8 = 0; 12886 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12887 let expr4_0 = constructor_push_xor_uimm32shifted( 12888 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12889 )?; 12890 return Some(expr4_0); 12891 } 12892 } 12893 return None; 12894 } 12895 12896 // Generated as internal constructor for term atomic_rmw_body_addsub. 12897 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12898 ctx: &mut C, 12899 arg0: &VecMInstBuilder, 12900 arg1: Type, 12901 arg2: MemFlags, 12902 arg3: &ALUOp, 12903 arg4: WritableReg, 12904 arg5: Reg, 12905 arg6: Reg, 12906 ) -> Option<Reg> { 12907 let pattern0_0 = arg0; 12908 let pattern1_0 = arg1; 12909 if pattern1_0 == I8 { 12910 let pattern3_0 = arg2; 12911 let pattern4_0 = arg3; 12912 let pattern5_0 = arg4; 12913 let pattern6_0 = arg5; 12914 let pattern7_0 = arg6; 12915 // Rule at src/isa/s390x/lower.isle line 1672. 12916 let expr0_0: Type = I32; 12917 let expr1_0: u8 = 24; 12918 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12919 let expr3_0 = 12920 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12921 return Some(expr3_0); 12922 } 12923 if pattern1_0 == I16 { 12924 let pattern3_0 = arg2; 12925 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12926 let pattern5_0 = arg3; 12927 let pattern6_0 = arg4; 12928 let pattern7_0 = arg5; 12929 let pattern8_0 = arg6; 12930 // Rule at src/isa/s390x/lower.isle line 1684. 12931 let expr0_0: Type = I32; 12932 let expr1_0: u8 = 16; 12933 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12934 let expr3_0: Type = I32; 12935 let expr4_0 = 12936 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12937 let expr5_0 = constructor_push_alu_reg( 12938 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12939 )?; 12940 let expr6_0: Type = I32; 12941 let expr7_0 = 12942 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12943 return Some(expr7_0); 12944 } 12945 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12946 let pattern5_0 = arg3; 12947 let pattern6_0 = arg4; 12948 let pattern7_0 = arg5; 12949 let pattern8_0 = arg6; 12950 // Rule at src/isa/s390x/lower.isle line 1676. 12951 let expr0_0: Type = I32; 12952 let expr1_0: u8 = 16; 12953 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12954 let expr3_0 = constructor_push_alu_reg( 12955 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12956 )?; 12957 return Some(expr3_0); 12958 } 12959 } 12960 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12961 let pattern3_0 = arg2; 12962 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12963 let pattern5_0 = arg3; 12964 let pattern6_0 = arg4; 12965 let pattern7_0 = arg5; 12966 let pattern8_0 = arg6; 12967 // Rule at src/isa/s390x/lower.isle line 1666. 12968 let expr0_0 = 12969 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12970 let expr1_0 = constructor_push_alu_reg( 12971 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12972 )?; 12973 let expr2_0 = 12974 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12975 return Some(expr2_0); 12976 } 12977 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12978 let pattern5_0 = arg3; 12979 let pattern6_0 = arg4; 12980 let pattern7_0 = arg5; 12981 let pattern8_0 = arg6; 12982 // Rule at src/isa/s390x/lower.isle line 1662. 12983 let expr0_0 = constructor_push_alu_reg( 12984 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12985 )?; 12986 return Some(expr0_0); 12987 } 12988 } 12989 return None; 12990 } 12991 12992 // Generated as internal constructor for term atomic_rmw_body_minmax. 12993 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12994 ctx: &mut C, 12995 arg0: &VecMInstBuilder, 12996 arg1: Type, 12997 arg2: MemFlags, 12998 arg3: &CmpOp, 12999 arg4: &Cond, 13000 arg5: WritableReg, 13001 arg6: Reg, 13002 arg7: Reg, 13003 ) -> Option<Reg> { 13004 let pattern0_0 = arg0; 13005 let pattern1_0 = arg1; 13006 if pattern1_0 == I8 { 13007 let pattern3_0 = arg2; 13008 let pattern4_0 = arg3; 13009 let pattern5_0 = arg4; 13010 let pattern6_0 = arg5; 13011 let pattern7_0 = arg6; 13012 let pattern8_0 = arg7; 13013 // Rule at src/isa/s390x/lower.isle line 1729. 13014 let expr0_0: Type = I32; 13015 let expr1_0: u8 = 24; 13016 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13017 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13018 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13019 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13020 let expr6_0 = RxSBGOp::Insert; 13021 let expr7_0: u8 = 32; 13022 let expr8_0: u8 = 40; 13023 let expr9_0: i8 = 0; 13024 let expr10_0 = constructor_push_rxsbg( 13025 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13026 )?; 13027 return Some(expr10_0); 13028 } 13029 if pattern1_0 == I16 { 13030 let pattern3_0 = arg2; 13031 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13032 let pattern5_0 = arg3; 13033 let pattern6_0 = arg4; 13034 let pattern7_0 = arg5; 13035 let pattern8_0 = arg6; 13036 let pattern9_0 = arg7; 13037 // Rule at src/isa/s390x/lower.isle line 1742. 13038 let expr0_0: Type = I32; 13039 let expr1_0: u8 = 16; 13040 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13041 let expr3_0: Type = I32; 13042 let expr4_0 = 13043 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13044 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13045 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13046 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13047 let expr8_0 = RxSBGOp::Insert; 13048 let expr9_0: u8 = 32; 13049 let expr10_0: u8 = 48; 13050 let expr11_0: i8 = 0; 13051 let expr12_0 = constructor_push_rxsbg( 13052 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13053 expr11_0, 13054 )?; 13055 let expr13_0: Type = I32; 13056 let expr14_0 = 13057 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13058 return Some(expr14_0); 13059 } 13060 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13061 let pattern5_0 = arg3; 13062 let pattern6_0 = arg4; 13063 let pattern7_0 = arg5; 13064 let pattern8_0 = arg6; 13065 let pattern9_0 = arg7; 13066 // Rule at src/isa/s390x/lower.isle line 1735. 13067 let expr0_0: Type = I32; 13068 let expr1_0: u8 = 16; 13069 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13070 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13071 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13072 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13073 let expr6_0 = RxSBGOp::Insert; 13074 let expr7_0: u8 = 32; 13075 let expr8_0: u8 = 48; 13076 let expr9_0: i8 = 0; 13077 let expr10_0 = constructor_push_rxsbg( 13078 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13079 expr9_0, 13080 )?; 13081 return Some(expr10_0); 13082 } 13083 } 13084 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13085 let pattern3_0 = arg2; 13086 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13087 let pattern5_0 = arg3; 13088 let pattern6_0 = arg4; 13089 let pattern7_0 = arg5; 13090 let pattern8_0 = arg6; 13091 let pattern9_0 = arg7; 13092 // Rule at src/isa/s390x/lower.isle line 1717. 13093 let expr0_0 = 13094 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13095 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13096 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13097 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13098 let expr4_0 = 13099 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13100 return Some(expr4_0); 13101 } 13102 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13103 let pattern5_0 = arg3; 13104 let pattern6_0 = arg4; 13105 let pattern7_0 = arg5; 13106 let pattern8_0 = arg6; 13107 let pattern9_0 = arg7; 13108 // Rule at src/isa/s390x/lower.isle line 1710. 13109 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13110 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13111 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13112 return Some(pattern9_0); 13113 } 13114 } 13115 return None; 13116 } 13117 13118 // Generated as internal constructor for term atomic_cas_body. 13119 pub fn constructor_atomic_cas_body<C: Context>( 13120 ctx: &mut C, 13121 arg0: &VecMInstBuilder, 13122 arg1: Type, 13123 arg2: MemFlags, 13124 arg3: WritableReg, 13125 arg4: Reg, 13126 arg5: Reg, 13127 arg6: Reg, 13128 ) -> Option<Reg> { 13129 let pattern0_0 = arg0; 13130 let pattern1_0 = arg1; 13131 if pattern1_0 == I8 { 13132 let pattern3_0 = arg2; 13133 let pattern4_0 = arg3; 13134 let pattern5_0 = arg4; 13135 let pattern6_0 = arg5; 13136 let pattern7_0 = arg6; 13137 // Rule at src/isa/s390x/lower.isle line 1794. 13138 let expr0_0 = RxSBGOp::Xor; 13139 let expr1_0: u8 = 32; 13140 let expr2_0: u8 = 40; 13141 let expr3_0: i8 = 24; 13142 let expr4_0 = constructor_rxsbg_test( 13143 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13144 )?; 13145 let expr5_0 = IntCC::NotEqual; 13146 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13147 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13148 let expr8_0 = RxSBGOp::Insert; 13149 let expr9_0: u8 = 32; 13150 let expr10_0: u8 = 40; 13151 let expr11_0: i8 = 24; 13152 let expr12_0 = constructor_push_rxsbg( 13153 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13154 expr11_0, 13155 )?; 13156 return Some(expr12_0); 13157 } 13158 if pattern1_0 == I16 { 13159 let pattern3_0 = arg2; 13160 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13161 let pattern5_0 = arg3; 13162 let pattern6_0 = arg4; 13163 let pattern7_0 = arg5; 13164 let pattern8_0 = arg6; 13165 // Rule at src/isa/s390x/lower.isle line 1812. 13166 let expr0_0: Type = I32; 13167 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13168 let expr2_0: Type = I32; 13169 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13170 let expr4_0 = RxSBGOp::Xor; 13171 let expr5_0: u8 = 48; 13172 let expr6_0: u8 = 64; 13173 let expr7_0: i8 = -16; 13174 let expr8_0 = constructor_rxsbg_test( 13175 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13176 )?; 13177 let expr9_0 = IntCC::NotEqual; 13178 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13179 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13180 let expr12_0 = RxSBGOp::Insert; 13181 let expr13_0: u8 = 48; 13182 let expr14_0: u8 = 64; 13183 let expr15_0: i8 = -16; 13184 let expr16_0 = constructor_push_rxsbg( 13185 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13186 expr15_0, 13187 )?; 13188 return Some(expr16_0); 13189 } 13190 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13191 let pattern5_0 = arg3; 13192 let pattern6_0 = arg4; 13193 let pattern7_0 = arg5; 13194 let pattern8_0 = arg6; 13195 // Rule at src/isa/s390x/lower.isle line 1801. 13196 let expr0_0 = RxSBGOp::Xor; 13197 let expr1_0: u8 = 32; 13198 let expr2_0: u8 = 48; 13199 let expr3_0: i8 = 16; 13200 let expr4_0 = constructor_rxsbg_test( 13201 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13202 )?; 13203 let expr5_0 = IntCC::NotEqual; 13204 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13205 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13206 let expr8_0 = RxSBGOp::Insert; 13207 let expr9_0: u8 = 32; 13208 let expr10_0: u8 = 48; 13209 let expr11_0: i8 = 16; 13210 let expr12_0 = constructor_push_rxsbg( 13211 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13212 expr11_0, 13213 )?; 13214 return Some(expr12_0); 13215 } 13216 } 13217 return None; 13218 } 13219 13220 // Generated as internal constructor for term atomic_store_impl. 13221 pub fn constructor_atomic_store_impl<C: Context>( 13222 ctx: &mut C, 13223 arg0: &SideEffectNoResult, 13224 ) -> Option<InstOutput> { 13225 let pattern0_0 = arg0; 13226 // Rule at src/isa/s390x/lower.isle line 1858. 13227 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13228 let expr1_0 = constructor_fence_impl(ctx)?; 13229 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13230 return Some(expr2_0); 13231 } 13232 13233 // Generated as internal constructor for term icmp_val. 13234 pub fn constructor_icmp_val<C: Context>( 13235 ctx: &mut C, 13236 arg0: bool, 13237 arg1: &IntCC, 13238 arg2: Value, 13239 arg3: Value, 13240 ) -> Option<ProducesBool> { 13241 let pattern0_0 = arg0; 13242 let pattern1_0 = arg1; 13243 if let Some(()) = C::signed(ctx, pattern1_0) { 13244 let pattern3_0 = arg2; 13245 let pattern4_0 = arg3; 13246 // Rule at src/isa/s390x/lower.isle line 1925. 13247 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13248 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13249 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13250 return Some(expr2_0); 13251 } 13252 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13253 let pattern3_0 = arg2; 13254 let pattern4_0 = arg3; 13255 // Rule at src/isa/s390x/lower.isle line 1928. 13256 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13257 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13258 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13259 return Some(expr2_0); 13260 } 13261 return None; 13262 } 13263 13264 // Generated as internal constructor for term icmps_val. 13265 pub fn constructor_icmps_val<C: Context>( 13266 ctx: &mut C, 13267 arg0: bool, 13268 arg1: Value, 13269 arg2: Value, 13270 ) -> Option<ProducesFlags> { 13271 let pattern0_0 = arg0; 13272 if pattern0_0 == true { 13273 let pattern2_0 = arg1; 13274 let pattern3_0 = C::value_type(ctx, pattern2_0); 13275 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13276 let pattern5_0 = arg2; 13277 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13278 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13279 if let &InstructionData::Load { 13280 opcode: ref pattern8_0, 13281 arg: pattern8_1, 13282 flags: pattern8_2, 13283 offset: pattern8_3, 13284 } = &pattern7_0 13285 { 13286 match pattern8_0 { 13287 &Opcode::Sload16 => { 13288 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13289 // Rule at src/isa/s390x/lower.isle line 1958. 13290 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13291 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13292 let expr2_0 = constructor_icmps_mem_sext16( 13293 ctx, pattern4_0, expr0_0, &expr1_0, 13294 )?; 13295 return Some(expr2_0); 13296 } 13297 } 13298 &Opcode::Sload32 => { 13299 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13300 // Rule at src/isa/s390x/lower.isle line 1960. 13301 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13302 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13303 let expr2_0 = constructor_icmps_mem_sext32( 13304 ctx, pattern4_0, expr0_0, &expr1_0, 13305 )?; 13306 return Some(expr2_0); 13307 } 13308 } 13309 _ => {} 13310 } 13311 } 13312 } 13313 let pattern6_0 = C::value_type(ctx, pattern5_0); 13314 if pattern6_0 == I16 { 13315 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13316 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13317 if let &InstructionData::Load { 13318 opcode: ref pattern10_0, 13319 arg: pattern10_1, 13320 flags: pattern10_2, 13321 offset: pattern10_3, 13322 } = &pattern9_0 13323 { 13324 if let &Opcode::Load = pattern10_0 { 13325 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13326 // Rule at src/isa/s390x/lower.isle line 1954. 13327 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13328 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13329 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13330 let expr3_0 = 13331 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13332 return Some(expr3_0); 13333 } 13334 } 13335 } 13336 } 13337 } 13338 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13339 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13340 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13341 if let &InstructionData::Load { 13342 opcode: ref pattern10_0, 13343 arg: pattern10_1, 13344 flags: pattern10_2, 13345 offset: pattern10_3, 13346 } = &pattern9_0 13347 { 13348 if let &Opcode::Load = pattern10_0 { 13349 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13350 // Rule at src/isa/s390x/lower.isle line 1950. 13351 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13352 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13353 let expr2_0 = 13354 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13355 return Some(expr2_0); 13356 } 13357 } 13358 } 13359 } 13360 } 13361 } 13362 } 13363 let pattern1_0 = arg1; 13364 let pattern2_0 = C::value_type(ctx, pattern1_0); 13365 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13366 let pattern4_0 = arg2; 13367 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13368 // Rule at src/isa/s390x/lower.isle line 1944. 13369 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13370 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13371 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13372 return Some(expr2_0); 13373 } 13374 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13375 // Rule at src/isa/s390x/lower.isle line 1946. 13376 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13377 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13378 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13379 return Some(expr2_0); 13380 } 13381 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13382 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13383 if let &InstructionData::Unary { 13384 opcode: ref pattern7_0, 13385 arg: pattern7_1, 13386 } = &pattern6_0 13387 { 13388 if let &Opcode::Sextend = pattern7_0 { 13389 let pattern9_0 = C::value_type(ctx, pattern7_1); 13390 if pattern9_0 == I32 { 13391 // Rule at src/isa/s390x/lower.isle line 1940. 13392 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13393 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13394 let expr2_0 = 13395 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13396 return Some(expr2_0); 13397 } 13398 } 13399 } 13400 } 13401 // Rule at src/isa/s390x/lower.isle line 1936. 13402 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13403 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13404 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13405 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13406 return Some(expr3_0); 13407 } 13408 return None; 13409 } 13410 13411 // Generated as internal constructor for term icmpu_val. 13412 pub fn constructor_icmpu_val<C: Context>( 13413 ctx: &mut C, 13414 arg0: bool, 13415 arg1: Value, 13416 arg2: Value, 13417 ) -> Option<ProducesFlags> { 13418 let pattern0_0 = arg0; 13419 if pattern0_0 == true { 13420 let pattern2_0 = arg1; 13421 let pattern3_0 = C::value_type(ctx, pattern2_0); 13422 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13423 let pattern5_0 = arg2; 13424 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13425 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13426 if let &InstructionData::Load { 13427 opcode: ref pattern8_0, 13428 arg: pattern8_1, 13429 flags: pattern8_2, 13430 offset: pattern8_3, 13431 } = &pattern7_0 13432 { 13433 match pattern8_0 { 13434 &Opcode::Uload16 => { 13435 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13436 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13437 if let &InstructionData::UnaryGlobalValue { 13438 opcode: ref pattern12_0, 13439 global_value: pattern12_1, 13440 } = &pattern11_0 13441 { 13442 if let &Opcode::SymbolValue = pattern12_0 { 13443 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13444 C::symbol_value_data(ctx, pattern12_1) 13445 { 13446 if let Some(()) = 13447 C::reloc_distance_near(ctx, pattern14_1) 13448 { 13449 let pattern16_0 = 13450 C::i64_from_offset(ctx, pattern8_3); 13451 let closure17 = || { 13452 return Some(pattern14_2); 13453 }; 13454 if let Some(pattern17_0) = closure17() { 13455 if let Some(pattern18_0) = 13456 C::memarg_symbol_offset_sum( 13457 ctx, 13458 pattern16_0, 13459 pattern17_0, 13460 ) 13461 { 13462 let pattern19_0 = 13463 C::inst_data(ctx, pattern6_0); 13464 if let &InstructionData::Load { 13465 opcode: ref pattern20_0, 13466 arg: pattern20_1, 13467 flags: pattern20_2, 13468 offset: pattern20_3, 13469 } = &pattern19_0 13470 { 13471 if let &Opcode::Uload16 = pattern20_0 { 13472 if let Some(()) = 13473 C::bigendian(ctx, pattern20_2) 13474 { 13475 // Rule at src/isa/s390x/lower.isle line 1993. 13476 let expr0_0 = C::put_in_reg( 13477 ctx, pattern2_0, 13478 ); 13479 let expr1_0 = 13480 constructor_sink_uload16( 13481 ctx, pattern6_0, 13482 )?; 13483 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13484 return Some(expr2_0); 13485 } 13486 } 13487 } 13488 } 13489 } 13490 } 13491 } 13492 } 13493 } 13494 } 13495 } 13496 &Opcode::Uload32 => { 13497 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13498 // Rule at src/isa/s390x/lower.isle line 1996. 13499 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13500 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13501 let expr2_0 = constructor_icmpu_mem_zext32( 13502 ctx, pattern4_0, expr0_0, &expr1_0, 13503 )?; 13504 return Some(expr2_0); 13505 } 13506 } 13507 _ => {} 13508 } 13509 } 13510 } 13511 let pattern6_0 = C::value_type(ctx, pattern5_0); 13512 if pattern6_0 == I16 { 13513 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13514 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13515 if let &InstructionData::Load { 13516 opcode: ref pattern10_0, 13517 arg: pattern10_1, 13518 flags: pattern10_2, 13519 offset: pattern10_3, 13520 } = &pattern9_0 13521 { 13522 if let &Opcode::Load = pattern10_0 { 13523 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13524 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13525 if let &InstructionData::UnaryGlobalValue { 13526 opcode: ref pattern14_0, 13527 global_value: pattern14_1, 13528 } = &pattern13_0 13529 { 13530 if let &Opcode::SymbolValue = pattern14_0 { 13531 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13532 C::symbol_value_data(ctx, pattern14_1) 13533 { 13534 if let Some(()) = 13535 C::reloc_distance_near(ctx, pattern16_1) 13536 { 13537 let pattern18_0 = 13538 C::i64_from_offset(ctx, pattern10_3); 13539 let closure19 = || { 13540 return Some(pattern16_2); 13541 }; 13542 if let Some(pattern19_0) = closure19() { 13543 if let Some(pattern20_0) = 13544 C::memarg_symbol_offset_sum( 13545 ctx, 13546 pattern18_0, 13547 pattern19_0, 13548 ) 13549 { 13550 let pattern21_0 = 13551 C::inst_data(ctx, pattern8_0); 13552 if let &InstructionData::Load { 13553 opcode: ref pattern22_0, 13554 arg: pattern22_1, 13555 flags: pattern22_2, 13556 offset: pattern22_3, 13557 } = &pattern21_0 13558 { 13559 if let &Opcode::Load = pattern22_0 { 13560 if let Some(()) = 13561 C::bigendian(ctx, pattern22_2) 13562 { 13563 // Rule at src/isa/s390x/lower.isle line 1986. 13564 let expr0_0 = 13565 constructor_ty_ext32( 13566 ctx, pattern4_0, 13567 )?; 13568 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13569 let expr2_0 = 13570 constructor_sink_load( 13571 ctx, pattern8_0, 13572 )?; 13573 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13574 return Some(expr3_0); 13575 } 13576 } 13577 } 13578 } 13579 } 13580 } 13581 } 13582 } 13583 } 13584 } 13585 } 13586 } 13587 } 13588 } 13589 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13590 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13591 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13592 if let &InstructionData::Load { 13593 opcode: ref pattern10_0, 13594 arg: pattern10_1, 13595 flags: pattern10_2, 13596 offset: pattern10_3, 13597 } = &pattern9_0 13598 { 13599 if let &Opcode::Load = pattern10_0 { 13600 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13601 // Rule at src/isa/s390x/lower.isle line 1980. 13602 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13603 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13604 let expr2_0 = 13605 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13606 return Some(expr2_0); 13607 } 13608 } 13609 } 13610 } 13611 } 13612 } 13613 } 13614 let pattern1_0 = arg1; 13615 let pattern2_0 = C::value_type(ctx, pattern1_0); 13616 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13617 let pattern4_0 = arg2; 13618 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13619 // Rule at src/isa/s390x/lower.isle line 1976. 13620 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13621 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13622 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13623 return Some(expr2_0); 13624 } 13625 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13626 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13627 if let &InstructionData::Unary { 13628 opcode: ref pattern7_0, 13629 arg: pattern7_1, 13630 } = &pattern6_0 13631 { 13632 if let &Opcode::Uextend = pattern7_0 { 13633 let pattern9_0 = C::value_type(ctx, pattern7_1); 13634 if pattern9_0 == I32 { 13635 // Rule at src/isa/s390x/lower.isle line 1972. 13636 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13637 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13638 let expr2_0 = 13639 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13640 return Some(expr2_0); 13641 } 13642 } 13643 } 13644 } 13645 // Rule at src/isa/s390x/lower.isle line 1968. 13646 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13647 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13648 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13649 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13650 return Some(expr3_0); 13651 } 13652 return None; 13653 } 13654 13655 // Generated as internal constructor for term fcmp_val. 13656 pub fn constructor_fcmp_val<C: Context>( 13657 ctx: &mut C, 13658 arg0: &FloatCC, 13659 arg1: Value, 13660 arg2: Value, 13661 ) -> Option<ProducesBool> { 13662 let pattern0_0 = arg0; 13663 let pattern1_0 = arg1; 13664 let pattern2_0 = C::value_type(ctx, pattern1_0); 13665 let pattern3_0 = arg2; 13666 // Rule at src/isa/s390x/lower.isle line 2009. 13667 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13668 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13669 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13670 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13671 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13672 return Some(expr4_0); 13673 } 13674 13675 // Generated as internal constructor for term value_nonzero. 13676 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13677 let pattern0_0 = arg0; 13678 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13679 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13680 match &pattern2_0 { 13681 &InstructionData::FloatCompare { 13682 opcode: ref pattern3_0, 13683 args: ref pattern3_1, 13684 cond: ref pattern3_2, 13685 } => { 13686 if let &Opcode::Fcmp = pattern3_0 { 13687 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13688 // Rule at src/isa/s390x/lower.isle line 2037. 13689 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13690 return Some(expr0_0); 13691 } 13692 } 13693 &InstructionData::IntCompare { 13694 opcode: ref pattern3_0, 13695 args: ref pattern3_1, 13696 cond: ref pattern3_2, 13697 } => { 13698 if let &Opcode::Icmp = pattern3_0 { 13699 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13700 // Rule at src/isa/s390x/lower.isle line 2036. 13701 let expr0_0: bool = false; 13702 let expr1_0 = 13703 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13704 return Some(expr1_0); 13705 } 13706 } 13707 &InstructionData::Unary { 13708 opcode: ref pattern3_0, 13709 arg: pattern3_1, 13710 } => { 13711 if let &Opcode::Bint = pattern3_0 { 13712 // Rule at src/isa/s390x/lower.isle line 2035. 13713 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13714 return Some(expr0_0); 13715 } 13716 } 13717 _ => {} 13718 } 13719 } 13720 let pattern1_0 = C::value_type(ctx, pattern0_0); 13721 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13722 // Rule at src/isa/s390x/lower.isle line 2038. 13723 let expr0_0: Type = I32; 13724 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13725 let expr2_0: i16 = 0; 13726 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13727 let expr4_0 = IntCC::NotEqual; 13728 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13729 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13730 return Some(expr6_0); 13731 } 13732 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13733 // Rule at src/isa/s390x/lower.isle line 2041. 13734 let expr0_0: Type = I64; 13735 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13736 let expr2_0: i16 = 0; 13737 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13738 let expr4_0 = IntCC::NotEqual; 13739 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13740 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13741 return Some(expr6_0); 13742 } 13743 return None; 13744 } 13745