1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn ty_bits(&mut self, arg0: Type) -> u8; 43 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 44 fn ty_bytes(&mut self, arg0: Type) -> u16; 45 fn lane_type(&mut self, arg0: Type) -> Type; 46 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 47 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 48 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 49 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 50 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 51 fn vec128(&mut self, arg0: Type) -> Option<Type>; 52 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 53 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 54 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 55 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 56 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 57 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 58 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 59 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 60 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 61 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 62 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 63 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 64 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 65 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 66 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 67 fn value_type(&mut self, arg0: Value) -> Type; 68 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 69 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 70 fn emit(&mut self, arg0: &MInst) -> Unit; 71 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 72 fn trap_code_division_by_zero(&mut self) -> TrapCode; 73 fn trap_code_integer_overflow(&mut self) -> TrapCode; 74 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 75 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 76 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 77 fn symbol_value_data( 78 &mut self, 79 arg0: GlobalValue, 80 ) -> Option<(ExternalName, RelocDistance, i64)>; 81 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 82 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 83 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 84 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 85 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 86 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 87 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 88 fn zero_reg(&mut self) -> Reg; 89 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 90 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 91 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 92 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 93 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 94 fn u8_as_u16(&mut self, arg0: u8) -> u16; 95 fn u64_as_u32(&mut self, arg0: u64) -> u32; 96 fn u64_as_i16(&mut self, arg0: u64) -> i16; 97 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 98 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 99 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 100 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 101 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 102 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 103 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 104 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 105 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 106 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 107 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 108 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 109 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 110 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 111 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 112 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 113 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 114 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 115 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 116 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 117 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 118 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 119 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 120 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 121 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 122 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 123 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 124 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 125 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 126 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 127 fn zero_offset(&mut self) -> Offset32; 128 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 129 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 130 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 131 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 132 fn memflags_trusted(&mut self) -> MemFlags; 133 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 134 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 135 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 136 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 137 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 138 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 139 fn sink_inst(&mut self, arg0: Inst) -> Unit; 140 fn inst_builder_new(&mut self) -> VecMInstBuilder; 141 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 142 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 143 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 144 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 145 } 146 147 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 363. 148 #[derive(Clone, Debug)] 149 pub enum SideEffectNoResult { 150 Inst { inst: MInst }, 151 } 152 153 /// Internal type ProducesFlags: defined at src/prelude.isle line 385. 154 #[derive(Clone, Debug)] 155 pub enum ProducesFlags { 156 ProducesFlagsSideEffect { inst: MInst }, 157 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 158 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 159 } 160 161 /// Internal type ConsumesFlags: defined at src/prelude.isle line 396. 162 #[derive(Clone, Debug)] 163 pub enum ConsumesFlags { 164 ConsumesFlagsReturnsResultWithProducer { 165 inst: MInst, 166 result: Reg, 167 }, 168 ConsumesFlagsReturnsReg { 169 inst: MInst, 170 result: Reg, 171 }, 172 ConsumesFlagsTwiceReturnsValueRegs { 173 inst1: MInst, 174 inst2: MInst, 175 result: ValueRegs, 176 }, 177 } 178 179 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 180 #[derive(Clone, Debug)] 181 pub enum MInst { 182 Nop0, 183 Nop2, 184 AluRRR { 185 alu_op: ALUOp, 186 rd: WritableReg, 187 rn: Reg, 188 rm: Reg, 189 }, 190 AluRRSImm16 { 191 alu_op: ALUOp, 192 rd: WritableReg, 193 rn: Reg, 194 imm: i16, 195 }, 196 AluRR { 197 alu_op: ALUOp, 198 rd: WritableReg, 199 rm: Reg, 200 }, 201 AluRX { 202 alu_op: ALUOp, 203 rd: WritableReg, 204 mem: MemArg, 205 }, 206 AluRSImm16 { 207 alu_op: ALUOp, 208 rd: WritableReg, 209 imm: i16, 210 }, 211 AluRSImm32 { 212 alu_op: ALUOp, 213 rd: WritableReg, 214 imm: i32, 215 }, 216 AluRUImm32 { 217 alu_op: ALUOp, 218 rd: WritableReg, 219 imm: u32, 220 }, 221 AluRUImm16Shifted { 222 alu_op: ALUOp, 223 rd: WritableReg, 224 imm: UImm16Shifted, 225 }, 226 AluRUImm32Shifted { 227 alu_op: ALUOp, 228 rd: WritableReg, 229 imm: UImm32Shifted, 230 }, 231 SMulWide { 232 rn: Reg, 233 rm: Reg, 234 }, 235 UMulWide { 236 rn: Reg, 237 }, 238 SDivMod32 { 239 rn: Reg, 240 }, 241 SDivMod64 { 242 rn: Reg, 243 }, 244 UDivMod32 { 245 rn: Reg, 246 }, 247 UDivMod64 { 248 rn: Reg, 249 }, 250 Flogr { 251 rn: Reg, 252 }, 253 ShiftRR { 254 shift_op: ShiftOp, 255 rd: WritableReg, 256 rn: Reg, 257 shift_imm: u8, 258 shift_reg: Reg, 259 }, 260 RxSBG { 261 op: RxSBGOp, 262 rd: WritableReg, 263 rn: Reg, 264 start_bit: u8, 265 end_bit: u8, 266 rotate_amt: i8, 267 }, 268 RxSBGTest { 269 op: RxSBGOp, 270 rd: Reg, 271 rn: Reg, 272 start_bit: u8, 273 end_bit: u8, 274 rotate_amt: i8, 275 }, 276 UnaryRR { 277 op: UnaryOp, 278 rd: WritableReg, 279 rn: Reg, 280 }, 281 CmpRR { 282 op: CmpOp, 283 rn: Reg, 284 rm: Reg, 285 }, 286 CmpRX { 287 op: CmpOp, 288 rn: Reg, 289 mem: MemArg, 290 }, 291 CmpRSImm16 { 292 op: CmpOp, 293 rn: Reg, 294 imm: i16, 295 }, 296 CmpRSImm32 { 297 op: CmpOp, 298 rn: Reg, 299 imm: i32, 300 }, 301 CmpRUImm32 { 302 op: CmpOp, 303 rn: Reg, 304 imm: u32, 305 }, 306 CmpTrapRR { 307 op: CmpOp, 308 rn: Reg, 309 rm: Reg, 310 cond: Cond, 311 trap_code: TrapCode, 312 }, 313 CmpTrapRSImm16 { 314 op: CmpOp, 315 rn: Reg, 316 imm: i16, 317 cond: Cond, 318 trap_code: TrapCode, 319 }, 320 CmpTrapRUImm16 { 321 op: CmpOp, 322 rn: Reg, 323 imm: u16, 324 cond: Cond, 325 trap_code: TrapCode, 326 }, 327 AtomicRmw { 328 alu_op: ALUOp, 329 rd: WritableReg, 330 rn: Reg, 331 mem: MemArg, 332 }, 333 AtomicCas32 { 334 rd: WritableReg, 335 rn: Reg, 336 mem: MemArg, 337 }, 338 AtomicCas64 { 339 rd: WritableReg, 340 rn: Reg, 341 mem: MemArg, 342 }, 343 Fence, 344 Load32 { 345 rd: WritableReg, 346 mem: MemArg, 347 }, 348 Load32ZExt8 { 349 rd: WritableReg, 350 mem: MemArg, 351 }, 352 Load32SExt8 { 353 rd: WritableReg, 354 mem: MemArg, 355 }, 356 Load32ZExt16 { 357 rd: WritableReg, 358 mem: MemArg, 359 }, 360 Load32SExt16 { 361 rd: WritableReg, 362 mem: MemArg, 363 }, 364 Load64 { 365 rd: WritableReg, 366 mem: MemArg, 367 }, 368 Load64ZExt8 { 369 rd: WritableReg, 370 mem: MemArg, 371 }, 372 Load64SExt8 { 373 rd: WritableReg, 374 mem: MemArg, 375 }, 376 Load64ZExt16 { 377 rd: WritableReg, 378 mem: MemArg, 379 }, 380 Load64SExt16 { 381 rd: WritableReg, 382 mem: MemArg, 383 }, 384 Load64ZExt32 { 385 rd: WritableReg, 386 mem: MemArg, 387 }, 388 Load64SExt32 { 389 rd: WritableReg, 390 mem: MemArg, 391 }, 392 LoadRev16 { 393 rd: WritableReg, 394 mem: MemArg, 395 }, 396 LoadRev32 { 397 rd: WritableReg, 398 mem: MemArg, 399 }, 400 LoadRev64 { 401 rd: WritableReg, 402 mem: MemArg, 403 }, 404 Store8 { 405 rd: Reg, 406 mem: MemArg, 407 }, 408 Store16 { 409 rd: Reg, 410 mem: MemArg, 411 }, 412 Store32 { 413 rd: Reg, 414 mem: MemArg, 415 }, 416 Store64 { 417 rd: Reg, 418 mem: MemArg, 419 }, 420 StoreImm8 { 421 imm: u8, 422 mem: MemArg, 423 }, 424 StoreImm16 { 425 imm: i16, 426 mem: MemArg, 427 }, 428 StoreImm32SExt16 { 429 imm: i16, 430 mem: MemArg, 431 }, 432 StoreImm64SExt16 { 433 imm: i16, 434 mem: MemArg, 435 }, 436 StoreRev16 { 437 rd: Reg, 438 mem: MemArg, 439 }, 440 StoreRev32 { 441 rd: Reg, 442 mem: MemArg, 443 }, 444 StoreRev64 { 445 rd: Reg, 446 mem: MemArg, 447 }, 448 LoadMultiple64 { 449 rt: WritableReg, 450 rt2: WritableReg, 451 mem: MemArg, 452 }, 453 StoreMultiple64 { 454 rt: Reg, 455 rt2: Reg, 456 mem: MemArg, 457 }, 458 Mov32 { 459 rd: WritableReg, 460 rm: Reg, 461 }, 462 Mov64 { 463 rd: WritableReg, 464 rm: Reg, 465 }, 466 Mov32Imm { 467 rd: WritableReg, 468 imm: u32, 469 }, 470 Mov32SImm16 { 471 rd: WritableReg, 472 imm: i16, 473 }, 474 Mov64SImm16 { 475 rd: WritableReg, 476 imm: i16, 477 }, 478 Mov64SImm32 { 479 rd: WritableReg, 480 imm: i32, 481 }, 482 Mov64UImm16Shifted { 483 rd: WritableReg, 484 imm: UImm16Shifted, 485 }, 486 Mov64UImm32Shifted { 487 rd: WritableReg, 488 imm: UImm32Shifted, 489 }, 490 Insert64UImm16Shifted { 491 rd: WritableReg, 492 imm: UImm16Shifted, 493 }, 494 Insert64UImm32Shifted { 495 rd: WritableReg, 496 imm: UImm32Shifted, 497 }, 498 Extend { 499 rd: WritableReg, 500 rn: Reg, 501 signed: bool, 502 from_bits: u8, 503 to_bits: u8, 504 }, 505 CMov32 { 506 rd: WritableReg, 507 cond: Cond, 508 rm: Reg, 509 }, 510 CMov64 { 511 rd: WritableReg, 512 cond: Cond, 513 rm: Reg, 514 }, 515 CMov32SImm16 { 516 rd: WritableReg, 517 cond: Cond, 518 imm: i16, 519 }, 520 CMov64SImm16 { 521 rd: WritableReg, 522 cond: Cond, 523 imm: i16, 524 }, 525 FpuMove32 { 526 rd: WritableReg, 527 rn: Reg, 528 }, 529 FpuMove64 { 530 rd: WritableReg, 531 rn: Reg, 532 }, 533 FpuCMov32 { 534 rd: WritableReg, 535 cond: Cond, 536 rm: Reg, 537 }, 538 FpuCMov64 { 539 rd: WritableReg, 540 cond: Cond, 541 rm: Reg, 542 }, 543 MovToFpr { 544 rd: WritableReg, 545 rn: Reg, 546 }, 547 MovFromFpr { 548 rd: WritableReg, 549 rn: Reg, 550 }, 551 FpuRR { 552 fpu_op: FPUOp1, 553 rd: WritableReg, 554 rn: Reg, 555 }, 556 FpuRRR { 557 fpu_op: FPUOp2, 558 rd: WritableReg, 559 rm: Reg, 560 }, 561 FpuRRRR { 562 fpu_op: FPUOp3, 563 rd: WritableReg, 564 rn: Reg, 565 rm: Reg, 566 }, 567 FpuCopysign { 568 rd: WritableReg, 569 rn: Reg, 570 rm: Reg, 571 }, 572 FpuCmp32 { 573 rn: Reg, 574 rm: Reg, 575 }, 576 FpuCmp64 { 577 rn: Reg, 578 rm: Reg, 579 }, 580 FpuLoad32 { 581 rd: WritableReg, 582 mem: MemArg, 583 }, 584 FpuStore32 { 585 rd: Reg, 586 mem: MemArg, 587 }, 588 FpuLoad64 { 589 rd: WritableReg, 590 mem: MemArg, 591 }, 592 FpuStore64 { 593 rd: Reg, 594 mem: MemArg, 595 }, 596 FpuLoadRev32 { 597 rd: WritableReg, 598 mem: MemArg, 599 }, 600 FpuStoreRev32 { 601 rd: Reg, 602 mem: MemArg, 603 }, 604 FpuLoadRev64 { 605 rd: WritableReg, 606 mem: MemArg, 607 }, 608 FpuStoreRev64 { 609 rd: Reg, 610 mem: MemArg, 611 }, 612 LoadFpuConst32 { 613 rd: WritableReg, 614 const_data: u32, 615 }, 616 LoadFpuConst64 { 617 rd: WritableReg, 618 const_data: u64, 619 }, 620 FpuToInt { 621 op: FpuToIntOp, 622 rd: WritableReg, 623 rn: Reg, 624 }, 625 IntToFpu { 626 op: IntToFpuOp, 627 rd: WritableReg, 628 rn: Reg, 629 }, 630 FpuRound { 631 op: FpuRoundMode, 632 rd: WritableReg, 633 rn: Reg, 634 }, 635 FpuVecRRR { 636 fpu_op: FPUOp2, 637 rd: WritableReg, 638 rn: Reg, 639 rm: Reg, 640 }, 641 Call { 642 link: WritableReg, 643 info: BoxCallInfo, 644 }, 645 CallInd { 646 link: WritableReg, 647 info: BoxCallIndInfo, 648 }, 649 Ret { 650 link: Reg, 651 }, 652 EpiloguePlaceholder, 653 Jump { 654 dest: MachLabel, 655 }, 656 CondBr { 657 taken: MachLabel, 658 not_taken: MachLabel, 659 cond: Cond, 660 }, 661 TrapIf { 662 cond: Cond, 663 trap_code: TrapCode, 664 }, 665 OneWayCondBr { 666 target: MachLabel, 667 cond: Cond, 668 }, 669 IndirectBr { 670 rn: Reg, 671 targets: VecMachLabel, 672 }, 673 Debugtrap, 674 Trap { 675 trap_code: TrapCode, 676 }, 677 JTSequence { 678 ridx: Reg, 679 targets: VecMachLabel, 680 }, 681 LoadExtNameFar { 682 rd: WritableReg, 683 name: BoxExternalName, 684 offset: i64, 685 }, 686 LoadAddr { 687 rd: WritableReg, 688 mem: MemArg, 689 }, 690 Loop { 691 body: VecMInst, 692 cond: Cond, 693 }, 694 CondBreak { 695 cond: Cond, 696 }, 697 VirtualSPOffsetAdj { 698 offset: i64, 699 }, 700 ValueLabelMarker { 701 reg: Reg, 702 label: ValueLabel, 703 }, 704 Unwind { 705 inst: UnwindInst, 706 }, 707 } 708 709 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 710 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 711 pub enum ALUOp { 712 Add32, 713 Add32Ext16, 714 Add64, 715 Add64Ext16, 716 Add64Ext32, 717 AddLogical32, 718 AddLogical64, 719 AddLogical64Ext32, 720 Sub32, 721 Sub32Ext16, 722 Sub64, 723 Sub64Ext16, 724 Sub64Ext32, 725 SubLogical32, 726 SubLogical64, 727 SubLogical64Ext32, 728 Mul32, 729 Mul32Ext16, 730 Mul64, 731 Mul64Ext16, 732 Mul64Ext32, 733 And32, 734 And64, 735 Orr32, 736 Orr64, 737 Xor32, 738 Xor64, 739 AndNot32, 740 AndNot64, 741 OrrNot32, 742 OrrNot64, 743 XorNot32, 744 XorNot64, 745 } 746 747 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 748 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 749 pub enum UnaryOp { 750 Abs32, 751 Abs64, 752 Abs64Ext32, 753 Neg32, 754 Neg64, 755 Neg64Ext32, 756 PopcntByte, 757 PopcntReg, 758 BSwap32, 759 BSwap64, 760 } 761 762 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 763 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 764 pub enum ShiftOp { 765 RotL32, 766 RotL64, 767 LShL32, 768 LShL64, 769 LShR32, 770 LShR64, 771 AShR32, 772 AShR64, 773 } 774 775 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 776 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 777 pub enum RxSBGOp { 778 Insert, 779 And, 780 Or, 781 Xor, 782 } 783 784 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 785 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 786 pub enum CmpOp { 787 CmpS32, 788 CmpS32Ext16, 789 CmpS64, 790 CmpS64Ext16, 791 CmpS64Ext32, 792 CmpL32, 793 CmpL32Ext16, 794 CmpL64, 795 CmpL64Ext16, 796 CmpL64Ext32, 797 } 798 799 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 800 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 801 pub enum FPUOp1 { 802 Abs32, 803 Abs64, 804 Neg32, 805 Neg64, 806 NegAbs32, 807 NegAbs64, 808 Sqrt32, 809 Sqrt64, 810 Cvt32To64, 811 Cvt64To32, 812 } 813 814 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 815 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 816 pub enum FPUOp2 { 817 Add32, 818 Add64, 819 Sub32, 820 Sub64, 821 Mul32, 822 Mul64, 823 Div32, 824 Div64, 825 Max32, 826 Max64, 827 Min32, 828 Min64, 829 } 830 831 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 832 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 833 pub enum FPUOp3 { 834 MAdd32, 835 MAdd64, 836 MSub32, 837 MSub64, 838 } 839 840 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 841 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 842 pub enum FpuToIntOp { 843 F32ToU32, 844 F32ToI32, 845 F32ToU64, 846 F32ToI64, 847 F64ToU32, 848 F64ToI32, 849 F64ToU64, 850 F64ToI64, 851 } 852 853 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 854 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 855 pub enum IntToFpuOp { 856 U32ToF32, 857 I32ToF32, 858 U32ToF64, 859 I32ToF64, 860 U64ToF32, 861 I64ToF32, 862 U64ToF64, 863 I64ToF64, 864 } 865 866 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 867 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 868 pub enum FpuRoundMode { 869 Minus32, 870 Minus64, 871 Plus32, 872 Plus64, 873 Zero32, 874 Zero64, 875 Nearest32, 876 Nearest64, 877 } 878 879 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 880 #[derive(Clone, Debug)] 881 pub enum WritableRegPair { 882 WritableRegPair { hi: WritableReg, lo: WritableReg }, 883 } 884 885 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 886 #[derive(Clone, Debug)] 887 pub enum RegPair { 888 RegPair { hi: Reg, lo: Reg }, 889 } 890 891 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 892 #[derive(Clone, Debug)] 893 pub enum ProducesBool { 894 ProducesBool { producer: ProducesFlags, cond: Cond }, 895 } 896 897 // Generated as internal constructor for term output_reg. 898 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 899 let pattern0_0 = arg0; 900 // Rule at src/prelude.isle line 86. 901 let expr0_0 = C::value_reg(ctx, pattern0_0); 902 let expr1_0 = C::output(ctx, expr0_0); 903 return Some(expr1_0); 904 } 905 906 // Generated as internal constructor for term output_value. 907 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 908 let pattern0_0 = arg0; 909 // Rule at src/prelude.isle line 90. 910 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 911 let expr1_0 = C::output(ctx, expr0_0); 912 return Some(expr1_0); 913 } 914 915 // Generated as internal constructor for term temp_reg. 916 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 917 let pattern0_0 = arg0; 918 // Rule at src/prelude.isle line 110. 919 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 920 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 921 return Some(expr1_0); 922 } 923 924 // Generated as internal constructor for term lo_reg. 925 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 926 let pattern0_0 = arg0; 927 // Rule at src/prelude.isle line 145. 928 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 929 let expr1_0: usize = 0; 930 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 931 return Some(expr2_0); 932 } 933 934 // Generated as internal constructor for term side_effect. 935 pub fn constructor_side_effect<C: Context>( 936 ctx: &mut C, 937 arg0: &SideEffectNoResult, 938 ) -> Option<InstOutput> { 939 let pattern0_0 = arg0; 940 if let &SideEffectNoResult::Inst { 941 inst: ref pattern1_0, 942 } = pattern0_0 943 { 944 // Rule at src/prelude.isle line 368. 945 let expr0_0 = C::emit(ctx, pattern1_0); 946 let expr1_0 = C::output_none(ctx); 947 return Some(expr1_0); 948 } 949 return None; 950 } 951 952 // Generated as internal constructor for term safepoint. 953 pub fn constructor_safepoint<C: Context>( 954 ctx: &mut C, 955 arg0: &SideEffectNoResult, 956 ) -> Option<InstOutput> { 957 let pattern0_0 = arg0; 958 if let &SideEffectNoResult::Inst { 959 inst: ref pattern1_0, 960 } = pattern0_0 961 { 962 // Rule at src/prelude.isle line 374. 963 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 964 let expr1_0 = C::output_none(ctx); 965 return Some(expr1_0); 966 } 967 return None; 968 } 969 970 // Generated as internal constructor for term consumes_flags_concat. 971 pub fn constructor_consumes_flags_concat<C: Context>( 972 ctx: &mut C, 973 arg0: &ConsumesFlags, 974 arg1: &ConsumesFlags, 975 ) -> Option<ConsumesFlags> { 976 let pattern0_0 = arg0; 977 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 978 inst: ref pattern1_0, 979 result: pattern1_1, 980 } = pattern0_0 981 { 982 let pattern2_0 = arg1; 983 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 984 inst: ref pattern3_0, 985 result: pattern3_1, 986 } = pattern2_0 987 { 988 // Rule at src/prelude.isle line 408. 989 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 990 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 991 inst1: pattern1_0.clone(), 992 inst2: pattern3_0.clone(), 993 result: expr0_0, 994 }; 995 return Some(expr1_0); 996 } 997 } 998 return None; 999 } 1000 1001 // Generated as internal constructor for term with_flags. 1002 pub fn constructor_with_flags<C: Context>( 1003 ctx: &mut C, 1004 arg0: &ProducesFlags, 1005 arg1: &ConsumesFlags, 1006 ) -> Option<ValueRegs> { 1007 let pattern0_0 = arg0; 1008 match pattern0_0 { 1009 &ProducesFlags::ProducesFlagsSideEffect { 1010 inst: ref pattern1_0, 1011 } => { 1012 let pattern2_0 = arg1; 1013 match pattern2_0 { 1014 &ConsumesFlags::ConsumesFlagsReturnsReg { 1015 inst: ref pattern3_0, 1016 result: pattern3_1, 1017 } => { 1018 // Rule at src/prelude.isle line 433. 1019 let expr0_0 = C::emit(ctx, pattern1_0); 1020 let expr1_0 = C::emit(ctx, pattern3_0); 1021 let expr2_0 = C::value_reg(ctx, pattern3_1); 1022 return Some(expr2_0); 1023 } 1024 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1025 inst1: ref pattern3_0, 1026 inst2: ref pattern3_1, 1027 result: pattern3_2, 1028 } => { 1029 // Rule at src/prelude.isle line 439. 1030 let expr0_0 = C::emit(ctx, pattern1_0); 1031 let expr1_0 = C::emit(ctx, pattern3_1); 1032 let expr2_0 = C::emit(ctx, pattern3_0); 1033 return Some(pattern3_2); 1034 } 1035 _ => {} 1036 } 1037 } 1038 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1039 inst: ref pattern1_0, 1040 result: pattern1_1, 1041 } => { 1042 let pattern2_0 = arg1; 1043 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1044 inst: ref pattern3_0, 1045 result: pattern3_1, 1046 } = pattern2_0 1047 { 1048 // Rule at src/prelude.isle line 427. 1049 let expr0_0 = C::emit(ctx, pattern1_0); 1050 let expr1_0 = C::emit(ctx, pattern3_0); 1051 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1052 return Some(expr2_0); 1053 } 1054 } 1055 _ => {} 1056 } 1057 return None; 1058 } 1059 1060 // Generated as internal constructor for term with_flags_reg. 1061 pub fn constructor_with_flags_reg<C: Context>( 1062 ctx: &mut C, 1063 arg0: &ProducesFlags, 1064 arg1: &ConsumesFlags, 1065 ) -> Option<Reg> { 1066 let pattern0_0 = arg0; 1067 let pattern1_0 = arg1; 1068 // Rule at src/prelude.isle line 452. 1069 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1070 let expr1_0: usize = 0; 1071 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1072 return Some(expr2_0); 1073 } 1074 1075 // Generated as internal constructor for term mask_amt_reg. 1076 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1077 let pattern0_0 = arg0; 1078 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1079 let pattern2_0 = arg1; 1080 // Rule at src/isa/s390x/inst.isle line 1040. 1081 let expr0_0: i64 = -1; 1082 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1083 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1084 let expr3_0: u8 = 0; 1085 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1086 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1087 return Some(expr5_0); 1088 } 1089 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1090 let pattern2_0 = arg1; 1091 // Rule at src/isa/s390x/inst.isle line 1043. 1092 return Some(pattern2_0); 1093 } 1094 return None; 1095 } 1096 1097 // Generated as internal constructor for term lower_address. 1098 pub fn constructor_lower_address<C: Context>( 1099 ctx: &mut C, 1100 arg0: MemFlags, 1101 arg1: Value, 1102 arg2: Offset32, 1103 ) -> Option<MemArg> { 1104 let pattern0_0 = arg0; 1105 let pattern1_0 = arg1; 1106 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1107 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1108 match &pattern3_0 { 1109 &InstructionData::UnaryGlobalValue { 1110 opcode: ref pattern4_0, 1111 global_value: pattern4_1, 1112 } => { 1113 if let &Opcode::SymbolValue = pattern4_0 { 1114 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1115 C::symbol_value_data(ctx, pattern4_1) 1116 { 1117 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1118 let pattern8_0 = arg2; 1119 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1120 let closure10 = || { 1121 return Some(pattern6_2); 1122 }; 1123 if let Some(pattern10_0) = closure10() { 1124 if let Some(pattern11_0) = 1125 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1126 { 1127 // Rule at src/isa/s390x/inst.isle line 1136. 1128 let expr0_0 = 1129 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1130 return Some(expr0_0); 1131 } 1132 } 1133 } 1134 } 1135 } 1136 } 1137 &InstructionData::Binary { 1138 opcode: ref pattern4_0, 1139 args: ref pattern4_1, 1140 } => { 1141 if let &Opcode::Iadd = pattern4_0 { 1142 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1143 let pattern7_0 = arg2; 1144 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1145 if pattern8_0 == 0 { 1146 // Rule at src/isa/s390x/inst.isle line 1133. 1147 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1148 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1149 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1150 return Some(expr2_0); 1151 } 1152 } 1153 } 1154 _ => {} 1155 } 1156 } 1157 let pattern2_0 = arg2; 1158 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1159 // Rule at src/isa/s390x/inst.isle line 1130. 1160 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1161 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1162 return Some(expr1_0); 1163 } 1164 1165 // Generated as internal constructor for term stack_addr_impl. 1166 pub fn constructor_stack_addr_impl<C: Context>( 1167 ctx: &mut C, 1168 arg0: Type, 1169 arg1: StackSlot, 1170 arg2: Offset32, 1171 ) -> Option<Reg> { 1172 let pattern0_0 = arg0; 1173 let pattern1_0 = arg1; 1174 let pattern2_0 = arg2; 1175 // Rule at src/isa/s390x/inst.isle line 1163. 1176 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1177 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1178 let expr2_0 = C::emit(ctx, &expr1_0); 1179 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1180 return Some(expr3_0); 1181 } 1182 1183 // Generated as internal constructor for term sink_load. 1184 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1185 let pattern0_0 = arg0; 1186 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1187 if let &InstructionData::Load { 1188 opcode: ref pattern2_0, 1189 arg: pattern2_1, 1190 flags: pattern2_2, 1191 offset: pattern2_3, 1192 } = &pattern1_0 1193 { 1194 if let &Opcode::Load = pattern2_0 { 1195 // Rule at src/isa/s390x/inst.isle line 1233. 1196 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1197 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1198 return Some(expr1_0); 1199 } 1200 } 1201 return None; 1202 } 1203 1204 // Generated as internal constructor for term sink_sload16. 1205 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1206 let pattern0_0 = arg0; 1207 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1208 if let &InstructionData::Load { 1209 opcode: ref pattern2_0, 1210 arg: pattern2_1, 1211 flags: pattern2_2, 1212 offset: pattern2_3, 1213 } = &pattern1_0 1214 { 1215 if let &Opcode::Sload16 = pattern2_0 { 1216 // Rule at src/isa/s390x/inst.isle line 1240. 1217 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1218 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1219 return Some(expr1_0); 1220 } 1221 } 1222 return None; 1223 } 1224 1225 // Generated as internal constructor for term sink_sload32. 1226 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1227 let pattern0_0 = arg0; 1228 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1229 if let &InstructionData::Load { 1230 opcode: ref pattern2_0, 1231 arg: pattern2_1, 1232 flags: pattern2_2, 1233 offset: pattern2_3, 1234 } = &pattern1_0 1235 { 1236 if let &Opcode::Sload32 = pattern2_0 { 1237 // Rule at src/isa/s390x/inst.isle line 1247. 1238 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1239 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1240 return Some(expr1_0); 1241 } 1242 } 1243 return None; 1244 } 1245 1246 // Generated as internal constructor for term sink_uload16. 1247 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1248 let pattern0_0 = arg0; 1249 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1250 if let &InstructionData::Load { 1251 opcode: ref pattern2_0, 1252 arg: pattern2_1, 1253 flags: pattern2_2, 1254 offset: pattern2_3, 1255 } = &pattern1_0 1256 { 1257 if let &Opcode::Uload16 = pattern2_0 { 1258 // Rule at src/isa/s390x/inst.isle line 1254. 1259 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1260 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1261 return Some(expr1_0); 1262 } 1263 } 1264 return None; 1265 } 1266 1267 // Generated as internal constructor for term sink_uload32. 1268 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1269 let pattern0_0 = arg0; 1270 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1271 if let &InstructionData::Load { 1272 opcode: ref pattern2_0, 1273 arg: pattern2_1, 1274 flags: pattern2_2, 1275 offset: pattern2_3, 1276 } = &pattern1_0 1277 { 1278 if let &Opcode::Uload32 = pattern2_0 { 1279 // Rule at src/isa/s390x/inst.isle line 1261. 1280 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1281 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1282 return Some(expr1_0); 1283 } 1284 } 1285 return None; 1286 } 1287 1288 // Generated as internal constructor for term temp_writable_regpair. 1289 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1290 // Rule at src/isa/s390x/inst.isle line 1274. 1291 let expr0_0: u8 = 0; 1292 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1293 let expr2_0: u8 = 1; 1294 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1295 let expr4_0 = WritableRegPair::WritableRegPair { 1296 hi: expr1_0, 1297 lo: expr3_0, 1298 }; 1299 return Some(expr4_0); 1300 } 1301 1302 // Generated as internal constructor for term copy_writable_regpair. 1303 pub fn constructor_copy_writable_regpair<C: Context>( 1304 ctx: &mut C, 1305 arg0: &RegPair, 1306 ) -> Option<WritableRegPair> { 1307 let pattern0_0 = arg0; 1308 // Rule at src/isa/s390x/inst.isle line 1280. 1309 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1310 return Some(expr0_0); 1311 } 1312 1313 // Generated as internal constructor for term writable_regpair_hi. 1314 pub fn constructor_writable_regpair_hi<C: Context>( 1315 ctx: &mut C, 1316 arg0: &WritableRegPair, 1317 ) -> Option<WritableReg> { 1318 let pattern0_0 = arg0; 1319 if let &WritableRegPair::WritableRegPair { 1320 hi: pattern1_0, 1321 lo: pattern1_1, 1322 } = pattern0_0 1323 { 1324 // Rule at src/isa/s390x/inst.isle line 1284. 1325 return Some(pattern1_0); 1326 } 1327 return None; 1328 } 1329 1330 // Generated as internal constructor for term writable_regpair_lo. 1331 pub fn constructor_writable_regpair_lo<C: Context>( 1332 ctx: &mut C, 1333 arg0: &WritableRegPair, 1334 ) -> Option<WritableReg> { 1335 let pattern0_0 = arg0; 1336 if let &WritableRegPair::WritableRegPair { 1337 hi: pattern1_0, 1338 lo: pattern1_1, 1339 } = pattern0_0 1340 { 1341 // Rule at src/isa/s390x/inst.isle line 1288. 1342 return Some(pattern1_1); 1343 } 1344 return None; 1345 } 1346 1347 // Generated as internal constructor for term writable_regpair_to_regpair. 1348 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1349 ctx: &mut C, 1350 arg0: &WritableRegPair, 1351 ) -> Option<RegPair> { 1352 let pattern0_0 = arg0; 1353 if let &WritableRegPair::WritableRegPair { 1354 hi: pattern1_0, 1355 lo: pattern1_1, 1356 } = pattern0_0 1357 { 1358 // Rule at src/isa/s390x/inst.isle line 1295. 1359 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1360 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1361 let expr2_0 = RegPair::RegPair { 1362 hi: expr0_0, 1363 lo: expr1_0, 1364 }; 1365 return Some(expr2_0); 1366 } 1367 return None; 1368 } 1369 1370 // Generated as internal constructor for term uninitialized_regpair. 1371 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1372 // Rule at src/isa/s390x/inst.isle line 1300. 1373 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1374 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1375 return Some(expr1_0); 1376 } 1377 1378 // Generated as internal constructor for term regpair_hi. 1379 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1380 let pattern0_0 = arg0; 1381 if let &RegPair::RegPair { 1382 hi: pattern1_0, 1383 lo: pattern1_1, 1384 } = pattern0_0 1385 { 1386 // Rule at src/isa/s390x/inst.isle line 1305. 1387 return Some(pattern1_0); 1388 } 1389 return None; 1390 } 1391 1392 // Generated as internal constructor for term regpair_lo. 1393 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1394 let pattern0_0 = arg0; 1395 if let &RegPair::RegPair { 1396 hi: pattern1_0, 1397 lo: pattern1_1, 1398 } = pattern0_0 1399 { 1400 // Rule at src/isa/s390x/inst.isle line 1309. 1401 return Some(pattern1_1); 1402 } 1403 return None; 1404 } 1405 1406 // Generated as internal constructor for term alu_rrr. 1407 pub fn constructor_alu_rrr<C: Context>( 1408 ctx: &mut C, 1409 arg0: Type, 1410 arg1: &ALUOp, 1411 arg2: Reg, 1412 arg3: Reg, 1413 ) -> Option<Reg> { 1414 let pattern0_0 = arg0; 1415 let pattern1_0 = arg1; 1416 let pattern2_0 = arg2; 1417 let pattern3_0 = arg3; 1418 // Rule at src/isa/s390x/inst.isle line 1316. 1419 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1420 let expr1_0 = MInst::AluRRR { 1421 alu_op: pattern1_0.clone(), 1422 rd: expr0_0, 1423 rn: pattern2_0, 1424 rm: pattern3_0, 1425 }; 1426 let expr2_0 = C::emit(ctx, &expr1_0); 1427 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1428 return Some(expr3_0); 1429 } 1430 1431 // Generated as internal constructor for term alu_rrsimm16. 1432 pub fn constructor_alu_rrsimm16<C: Context>( 1433 ctx: &mut C, 1434 arg0: Type, 1435 arg1: &ALUOp, 1436 arg2: Reg, 1437 arg3: i16, 1438 ) -> Option<Reg> { 1439 let pattern0_0 = arg0; 1440 let pattern1_0 = arg1; 1441 let pattern2_0 = arg2; 1442 let pattern3_0 = arg3; 1443 // Rule at src/isa/s390x/inst.isle line 1323. 1444 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1445 let expr1_0 = MInst::AluRRSImm16 { 1446 alu_op: pattern1_0.clone(), 1447 rd: expr0_0, 1448 rn: pattern2_0, 1449 imm: pattern3_0, 1450 }; 1451 let expr2_0 = C::emit(ctx, &expr1_0); 1452 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1453 return Some(expr3_0); 1454 } 1455 1456 // Generated as internal constructor for term alu_rr. 1457 pub fn constructor_alu_rr<C: Context>( 1458 ctx: &mut C, 1459 arg0: Type, 1460 arg1: &ALUOp, 1461 arg2: Reg, 1462 arg3: Reg, 1463 ) -> Option<Reg> { 1464 let pattern0_0 = arg0; 1465 let pattern1_0 = arg1; 1466 let pattern2_0 = arg2; 1467 let pattern3_0 = arg3; 1468 // Rule at src/isa/s390x/inst.isle line 1330. 1469 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1470 let expr1_0 = MInst::AluRR { 1471 alu_op: pattern1_0.clone(), 1472 rd: expr0_0, 1473 rm: pattern3_0, 1474 }; 1475 let expr2_0 = C::emit(ctx, &expr1_0); 1476 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1477 return Some(expr3_0); 1478 } 1479 1480 // Generated as internal constructor for term alu_rx. 1481 pub fn constructor_alu_rx<C: Context>( 1482 ctx: &mut C, 1483 arg0: Type, 1484 arg1: &ALUOp, 1485 arg2: Reg, 1486 arg3: &MemArg, 1487 ) -> Option<Reg> { 1488 let pattern0_0 = arg0; 1489 let pattern1_0 = arg1; 1490 let pattern2_0 = arg2; 1491 let pattern3_0 = arg3; 1492 // Rule at src/isa/s390x/inst.isle line 1337. 1493 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1494 let expr1_0 = MInst::AluRX { 1495 alu_op: pattern1_0.clone(), 1496 rd: expr0_0, 1497 mem: pattern3_0.clone(), 1498 }; 1499 let expr2_0 = C::emit(ctx, &expr1_0); 1500 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1501 return Some(expr3_0); 1502 } 1503 1504 // Generated as internal constructor for term alu_rsimm16. 1505 pub fn constructor_alu_rsimm16<C: Context>( 1506 ctx: &mut C, 1507 arg0: Type, 1508 arg1: &ALUOp, 1509 arg2: Reg, 1510 arg3: i16, 1511 ) -> Option<Reg> { 1512 let pattern0_0 = arg0; 1513 let pattern1_0 = arg1; 1514 let pattern2_0 = arg2; 1515 let pattern3_0 = arg3; 1516 // Rule at src/isa/s390x/inst.isle line 1344. 1517 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1518 let expr1_0 = MInst::AluRSImm16 { 1519 alu_op: pattern1_0.clone(), 1520 rd: expr0_0, 1521 imm: pattern3_0, 1522 }; 1523 let expr2_0 = C::emit(ctx, &expr1_0); 1524 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1525 return Some(expr3_0); 1526 } 1527 1528 // Generated as internal constructor for term alu_rsimm32. 1529 pub fn constructor_alu_rsimm32<C: Context>( 1530 ctx: &mut C, 1531 arg0: Type, 1532 arg1: &ALUOp, 1533 arg2: Reg, 1534 arg3: i32, 1535 ) -> Option<Reg> { 1536 let pattern0_0 = arg0; 1537 let pattern1_0 = arg1; 1538 let pattern2_0 = arg2; 1539 let pattern3_0 = arg3; 1540 // Rule at src/isa/s390x/inst.isle line 1351. 1541 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1542 let expr1_0 = MInst::AluRSImm32 { 1543 alu_op: pattern1_0.clone(), 1544 rd: expr0_0, 1545 imm: pattern3_0, 1546 }; 1547 let expr2_0 = C::emit(ctx, &expr1_0); 1548 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1549 return Some(expr3_0); 1550 } 1551 1552 // Generated as internal constructor for term alu_ruimm32. 1553 pub fn constructor_alu_ruimm32<C: Context>( 1554 ctx: &mut C, 1555 arg0: Type, 1556 arg1: &ALUOp, 1557 arg2: Reg, 1558 arg3: u32, 1559 ) -> Option<Reg> { 1560 let pattern0_0 = arg0; 1561 let pattern1_0 = arg1; 1562 let pattern2_0 = arg2; 1563 let pattern3_0 = arg3; 1564 // Rule at src/isa/s390x/inst.isle line 1358. 1565 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1566 let expr1_0 = MInst::AluRUImm32 { 1567 alu_op: pattern1_0.clone(), 1568 rd: expr0_0, 1569 imm: pattern3_0, 1570 }; 1571 let expr2_0 = C::emit(ctx, &expr1_0); 1572 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1573 return Some(expr3_0); 1574 } 1575 1576 // Generated as internal constructor for term alu_ruimm16shifted. 1577 pub fn constructor_alu_ruimm16shifted<C: Context>( 1578 ctx: &mut C, 1579 arg0: Type, 1580 arg1: &ALUOp, 1581 arg2: Reg, 1582 arg3: UImm16Shifted, 1583 ) -> Option<Reg> { 1584 let pattern0_0 = arg0; 1585 let pattern1_0 = arg1; 1586 let pattern2_0 = arg2; 1587 let pattern3_0 = arg3; 1588 // Rule at src/isa/s390x/inst.isle line 1365. 1589 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1590 let expr1_0 = MInst::AluRUImm16Shifted { 1591 alu_op: pattern1_0.clone(), 1592 rd: expr0_0, 1593 imm: pattern3_0, 1594 }; 1595 let expr2_0 = C::emit(ctx, &expr1_0); 1596 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1597 return Some(expr3_0); 1598 } 1599 1600 // Generated as internal constructor for term alu_ruimm32shifted. 1601 pub fn constructor_alu_ruimm32shifted<C: Context>( 1602 ctx: &mut C, 1603 arg0: Type, 1604 arg1: &ALUOp, 1605 arg2: Reg, 1606 arg3: UImm32Shifted, 1607 ) -> Option<Reg> { 1608 let pattern0_0 = arg0; 1609 let pattern1_0 = arg1; 1610 let pattern2_0 = arg2; 1611 let pattern3_0 = arg3; 1612 // Rule at src/isa/s390x/inst.isle line 1372. 1613 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1614 let expr1_0 = MInst::AluRUImm32Shifted { 1615 alu_op: pattern1_0.clone(), 1616 rd: expr0_0, 1617 imm: pattern3_0, 1618 }; 1619 let expr2_0 = C::emit(ctx, &expr1_0); 1620 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1621 return Some(expr3_0); 1622 } 1623 1624 // Generated as internal constructor for term smul_wide. 1625 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1626 let pattern0_0 = arg0; 1627 let pattern1_0 = arg1; 1628 // Rule at src/isa/s390x/inst.isle line 1379. 1629 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1630 let expr1_0 = MInst::SMulWide { 1631 rn: pattern0_0, 1632 rm: pattern1_0, 1633 }; 1634 let expr2_0 = C::emit(ctx, &expr1_0); 1635 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1636 return Some(expr3_0); 1637 } 1638 1639 // Generated as internal constructor for term umul_wide. 1640 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1641 let pattern0_0 = arg0; 1642 let pattern1_0 = arg1; 1643 // Rule at src/isa/s390x/inst.isle line 1386. 1644 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1645 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1646 let expr2_0 = MInst::Mov64 { 1647 rd: expr1_0, 1648 rm: pattern1_0, 1649 }; 1650 let expr3_0 = C::emit(ctx, &expr2_0); 1651 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1652 let expr5_0 = C::emit(ctx, &expr4_0); 1653 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1654 return Some(expr6_0); 1655 } 1656 1657 // Generated as internal constructor for term sdivmod32. 1658 pub fn constructor_sdivmod32<C: Context>( 1659 ctx: &mut C, 1660 arg0: &RegPair, 1661 arg1: Reg, 1662 ) -> Option<RegPair> { 1663 let pattern0_0 = arg0; 1664 let pattern1_0 = arg1; 1665 // Rule at src/isa/s390x/inst.isle line 1394. 1666 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1667 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1668 let expr2_0 = C::emit(ctx, &expr1_0); 1669 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1670 return Some(expr3_0); 1671 } 1672 1673 // Generated as internal constructor for term sdivmod64. 1674 pub fn constructor_sdivmod64<C: Context>( 1675 ctx: &mut C, 1676 arg0: &RegPair, 1677 arg1: Reg, 1678 ) -> Option<RegPair> { 1679 let pattern0_0 = arg0; 1680 let pattern1_0 = arg1; 1681 // Rule at src/isa/s390x/inst.isle line 1401. 1682 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1683 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1684 let expr2_0 = C::emit(ctx, &expr1_0); 1685 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1686 return Some(expr3_0); 1687 } 1688 1689 // Generated as internal constructor for term udivmod32. 1690 pub fn constructor_udivmod32<C: Context>( 1691 ctx: &mut C, 1692 arg0: &RegPair, 1693 arg1: Reg, 1694 ) -> Option<RegPair> { 1695 let pattern0_0 = arg0; 1696 let pattern1_0 = arg1; 1697 // Rule at src/isa/s390x/inst.isle line 1408. 1698 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1699 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1700 let expr2_0 = C::emit(ctx, &expr1_0); 1701 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1702 return Some(expr3_0); 1703 } 1704 1705 // Generated as internal constructor for term udivmod64. 1706 pub fn constructor_udivmod64<C: Context>( 1707 ctx: &mut C, 1708 arg0: &RegPair, 1709 arg1: Reg, 1710 ) -> Option<RegPair> { 1711 let pattern0_0 = arg0; 1712 let pattern1_0 = arg1; 1713 // Rule at src/isa/s390x/inst.isle line 1415. 1714 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1715 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1716 let expr2_0 = C::emit(ctx, &expr1_0); 1717 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1718 return Some(expr3_0); 1719 } 1720 1721 // Generated as internal constructor for term shift_rr. 1722 pub fn constructor_shift_rr<C: Context>( 1723 ctx: &mut C, 1724 arg0: Type, 1725 arg1: &ShiftOp, 1726 arg2: Reg, 1727 arg3: u8, 1728 arg4: Reg, 1729 ) -> Option<Reg> { 1730 let pattern0_0 = arg0; 1731 let pattern1_0 = arg1; 1732 let pattern2_0 = arg2; 1733 let pattern3_0 = arg3; 1734 let pattern4_0 = arg4; 1735 // Rule at src/isa/s390x/inst.isle line 1422. 1736 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1737 let expr1_0 = MInst::ShiftRR { 1738 shift_op: pattern1_0.clone(), 1739 rd: expr0_0, 1740 rn: pattern2_0, 1741 shift_imm: pattern3_0, 1742 shift_reg: pattern4_0, 1743 }; 1744 let expr2_0 = C::emit(ctx, &expr1_0); 1745 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1746 return Some(expr3_0); 1747 } 1748 1749 // Generated as internal constructor for term rxsbg_test. 1750 pub fn constructor_rxsbg_test<C: Context>( 1751 ctx: &mut C, 1752 arg0: &RxSBGOp, 1753 arg1: Reg, 1754 arg2: Reg, 1755 arg3: u8, 1756 arg4: u8, 1757 arg5: i8, 1758 ) -> Option<ProducesFlags> { 1759 let pattern0_0 = arg0; 1760 let pattern1_0 = arg1; 1761 let pattern2_0 = arg2; 1762 let pattern3_0 = arg3; 1763 let pattern4_0 = arg4; 1764 let pattern5_0 = arg5; 1765 // Rule at src/isa/s390x/inst.isle line 1429. 1766 let expr0_0 = MInst::RxSBGTest { 1767 op: pattern0_0.clone(), 1768 rd: pattern1_0, 1769 rn: pattern2_0, 1770 start_bit: pattern3_0, 1771 end_bit: pattern4_0, 1772 rotate_amt: pattern5_0, 1773 }; 1774 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1775 return Some(expr1_0); 1776 } 1777 1778 // Generated as internal constructor for term unary_rr. 1779 pub fn constructor_unary_rr<C: Context>( 1780 ctx: &mut C, 1781 arg0: Type, 1782 arg1: &UnaryOp, 1783 arg2: Reg, 1784 ) -> Option<Reg> { 1785 let pattern0_0 = arg0; 1786 let pattern1_0 = arg1; 1787 let pattern2_0 = arg2; 1788 // Rule at src/isa/s390x/inst.isle line 1435. 1789 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1790 let expr1_0 = MInst::UnaryRR { 1791 op: pattern1_0.clone(), 1792 rd: expr0_0, 1793 rn: pattern2_0, 1794 }; 1795 let expr2_0 = C::emit(ctx, &expr1_0); 1796 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1797 return Some(expr3_0); 1798 } 1799 1800 // Generated as internal constructor for term cmp_rr. 1801 pub fn constructor_cmp_rr<C: Context>( 1802 ctx: &mut C, 1803 arg0: &CmpOp, 1804 arg1: Reg, 1805 arg2: Reg, 1806 ) -> Option<ProducesFlags> { 1807 let pattern0_0 = arg0; 1808 let pattern1_0 = arg1; 1809 let pattern2_0 = arg2; 1810 // Rule at src/isa/s390x/inst.isle line 1442. 1811 let expr0_0 = MInst::CmpRR { 1812 op: pattern0_0.clone(), 1813 rn: pattern1_0, 1814 rm: pattern2_0, 1815 }; 1816 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1817 return Some(expr1_0); 1818 } 1819 1820 // Generated as internal constructor for term cmp_rx. 1821 pub fn constructor_cmp_rx<C: Context>( 1822 ctx: &mut C, 1823 arg0: &CmpOp, 1824 arg1: Reg, 1825 arg2: &MemArg, 1826 ) -> Option<ProducesFlags> { 1827 let pattern0_0 = arg0; 1828 let pattern1_0 = arg1; 1829 let pattern2_0 = arg2; 1830 // Rule at src/isa/s390x/inst.isle line 1447. 1831 let expr0_0 = MInst::CmpRX { 1832 op: pattern0_0.clone(), 1833 rn: pattern1_0, 1834 mem: pattern2_0.clone(), 1835 }; 1836 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1837 return Some(expr1_0); 1838 } 1839 1840 // Generated as internal constructor for term cmp_rsimm16. 1841 pub fn constructor_cmp_rsimm16<C: Context>( 1842 ctx: &mut C, 1843 arg0: &CmpOp, 1844 arg1: Reg, 1845 arg2: i16, 1846 ) -> Option<ProducesFlags> { 1847 let pattern0_0 = arg0; 1848 let pattern1_0 = arg1; 1849 let pattern2_0 = arg2; 1850 // Rule at src/isa/s390x/inst.isle line 1452. 1851 let expr0_0 = MInst::CmpRSImm16 { 1852 op: pattern0_0.clone(), 1853 rn: pattern1_0, 1854 imm: pattern2_0, 1855 }; 1856 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1857 return Some(expr1_0); 1858 } 1859 1860 // Generated as internal constructor for term cmp_rsimm32. 1861 pub fn constructor_cmp_rsimm32<C: Context>( 1862 ctx: &mut C, 1863 arg0: &CmpOp, 1864 arg1: Reg, 1865 arg2: i32, 1866 ) -> Option<ProducesFlags> { 1867 let pattern0_0 = arg0; 1868 let pattern1_0 = arg1; 1869 let pattern2_0 = arg2; 1870 // Rule at src/isa/s390x/inst.isle line 1457. 1871 let expr0_0 = MInst::CmpRSImm32 { 1872 op: pattern0_0.clone(), 1873 rn: pattern1_0, 1874 imm: pattern2_0, 1875 }; 1876 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1877 return Some(expr1_0); 1878 } 1879 1880 // Generated as internal constructor for term cmp_ruimm32. 1881 pub fn constructor_cmp_ruimm32<C: Context>( 1882 ctx: &mut C, 1883 arg0: &CmpOp, 1884 arg1: Reg, 1885 arg2: u32, 1886 ) -> Option<ProducesFlags> { 1887 let pattern0_0 = arg0; 1888 let pattern1_0 = arg1; 1889 let pattern2_0 = arg2; 1890 // Rule at src/isa/s390x/inst.isle line 1462. 1891 let expr0_0 = MInst::CmpRUImm32 { 1892 op: pattern0_0.clone(), 1893 rn: pattern1_0, 1894 imm: pattern2_0, 1895 }; 1896 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1897 return Some(expr1_0); 1898 } 1899 1900 // Generated as internal constructor for term atomic_rmw_impl. 1901 pub fn constructor_atomic_rmw_impl<C: Context>( 1902 ctx: &mut C, 1903 arg0: Type, 1904 arg1: &ALUOp, 1905 arg2: Reg, 1906 arg3: &MemArg, 1907 ) -> Option<Reg> { 1908 let pattern0_0 = arg0; 1909 let pattern1_0 = arg1; 1910 let pattern2_0 = arg2; 1911 let pattern3_0 = arg3; 1912 // Rule at src/isa/s390x/inst.isle line 1467. 1913 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1914 let expr1_0 = MInst::AtomicRmw { 1915 alu_op: pattern1_0.clone(), 1916 rd: expr0_0, 1917 rn: pattern2_0, 1918 mem: pattern3_0.clone(), 1919 }; 1920 let expr2_0 = C::emit(ctx, &expr1_0); 1921 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1922 return Some(expr3_0); 1923 } 1924 1925 // Generated as internal constructor for term atomic_cas32. 1926 pub fn constructor_atomic_cas32<C: Context>( 1927 ctx: &mut C, 1928 arg0: Reg, 1929 arg1: Reg, 1930 arg2: &MemArg, 1931 ) -> Option<Reg> { 1932 let pattern0_0 = arg0; 1933 let pattern1_0 = arg1; 1934 let pattern2_0 = arg2; 1935 // Rule at src/isa/s390x/inst.isle line 1474. 1936 let expr0_0: Type = I32; 1937 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1938 let expr2_0 = MInst::AtomicCas32 { 1939 rd: expr1_0, 1940 rn: pattern1_0, 1941 mem: pattern2_0.clone(), 1942 }; 1943 let expr3_0 = C::emit(ctx, &expr2_0); 1944 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1945 return Some(expr4_0); 1946 } 1947 1948 // Generated as internal constructor for term atomic_cas64. 1949 pub fn constructor_atomic_cas64<C: Context>( 1950 ctx: &mut C, 1951 arg0: Reg, 1952 arg1: Reg, 1953 arg2: &MemArg, 1954 ) -> Option<Reg> { 1955 let pattern0_0 = arg0; 1956 let pattern1_0 = arg1; 1957 let pattern2_0 = arg2; 1958 // Rule at src/isa/s390x/inst.isle line 1481. 1959 let expr0_0: Type = I64; 1960 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1961 let expr2_0 = MInst::AtomicCas64 { 1962 rd: expr1_0, 1963 rn: pattern1_0, 1964 mem: pattern2_0.clone(), 1965 }; 1966 let expr3_0 = C::emit(ctx, &expr2_0); 1967 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1968 return Some(expr4_0); 1969 } 1970 1971 // Generated as internal constructor for term fence_impl. 1972 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 1973 // Rule at src/isa/s390x/inst.isle line 1488. 1974 let expr0_0 = MInst::Fence; 1975 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1976 return Some(expr1_0); 1977 } 1978 1979 // Generated as internal constructor for term load32. 1980 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1981 let pattern0_0 = arg0; 1982 // Rule at src/isa/s390x/inst.isle line 1493. 1983 let expr0_0: Type = I32; 1984 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1985 let expr2_0 = MInst::Load32 { 1986 rd: expr1_0, 1987 mem: pattern0_0.clone(), 1988 }; 1989 let expr3_0 = C::emit(ctx, &expr2_0); 1990 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1991 return Some(expr4_0); 1992 } 1993 1994 // Generated as internal constructor for term load64. 1995 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1996 let pattern0_0 = arg0; 1997 // Rule at src/isa/s390x/inst.isle line 1500. 1998 let expr0_0: Type = I64; 1999 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2000 let expr2_0 = MInst::Load64 { 2001 rd: expr1_0, 2002 mem: pattern0_0.clone(), 2003 }; 2004 let expr3_0 = C::emit(ctx, &expr2_0); 2005 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2006 return Some(expr4_0); 2007 } 2008 2009 // Generated as internal constructor for term loadrev16. 2010 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2011 let pattern0_0 = arg0; 2012 // Rule at src/isa/s390x/inst.isle line 1507. 2013 let expr0_0: Type = I32; 2014 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2015 let expr2_0 = MInst::LoadRev16 { 2016 rd: expr1_0, 2017 mem: pattern0_0.clone(), 2018 }; 2019 let expr3_0 = C::emit(ctx, &expr2_0); 2020 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2021 return Some(expr4_0); 2022 } 2023 2024 // Generated as internal constructor for term loadrev32. 2025 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2026 let pattern0_0 = arg0; 2027 // Rule at src/isa/s390x/inst.isle line 1514. 2028 let expr0_0: Type = I32; 2029 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2030 let expr2_0 = MInst::LoadRev32 { 2031 rd: expr1_0, 2032 mem: pattern0_0.clone(), 2033 }; 2034 let expr3_0 = C::emit(ctx, &expr2_0); 2035 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2036 return Some(expr4_0); 2037 } 2038 2039 // Generated as internal constructor for term loadrev64. 2040 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2041 let pattern0_0 = arg0; 2042 // Rule at src/isa/s390x/inst.isle line 1521. 2043 let expr0_0: Type = I64; 2044 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2045 let expr2_0 = MInst::LoadRev64 { 2046 rd: expr1_0, 2047 mem: pattern0_0.clone(), 2048 }; 2049 let expr3_0 = C::emit(ctx, &expr2_0); 2050 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2051 return Some(expr4_0); 2052 } 2053 2054 // Generated as internal constructor for term store8. 2055 pub fn constructor_store8<C: Context>( 2056 ctx: &mut C, 2057 arg0: Reg, 2058 arg1: &MemArg, 2059 ) -> Option<SideEffectNoResult> { 2060 let pattern0_0 = arg0; 2061 let pattern1_0 = arg1; 2062 // Rule at src/isa/s390x/inst.isle line 1528. 2063 let expr0_0 = MInst::Store8 { 2064 rd: pattern0_0, 2065 mem: pattern1_0.clone(), 2066 }; 2067 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2068 return Some(expr1_0); 2069 } 2070 2071 // Generated as internal constructor for term store16. 2072 pub fn constructor_store16<C: Context>( 2073 ctx: &mut C, 2074 arg0: Reg, 2075 arg1: &MemArg, 2076 ) -> Option<SideEffectNoResult> { 2077 let pattern0_0 = arg0; 2078 let pattern1_0 = arg1; 2079 // Rule at src/isa/s390x/inst.isle line 1533. 2080 let expr0_0 = MInst::Store16 { 2081 rd: pattern0_0, 2082 mem: pattern1_0.clone(), 2083 }; 2084 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2085 return Some(expr1_0); 2086 } 2087 2088 // Generated as internal constructor for term store32. 2089 pub fn constructor_store32<C: Context>( 2090 ctx: &mut C, 2091 arg0: Reg, 2092 arg1: &MemArg, 2093 ) -> Option<SideEffectNoResult> { 2094 let pattern0_0 = arg0; 2095 let pattern1_0 = arg1; 2096 // Rule at src/isa/s390x/inst.isle line 1538. 2097 let expr0_0 = MInst::Store32 { 2098 rd: pattern0_0, 2099 mem: pattern1_0.clone(), 2100 }; 2101 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2102 return Some(expr1_0); 2103 } 2104 2105 // Generated as internal constructor for term store64. 2106 pub fn constructor_store64<C: Context>( 2107 ctx: &mut C, 2108 arg0: Reg, 2109 arg1: &MemArg, 2110 ) -> Option<SideEffectNoResult> { 2111 let pattern0_0 = arg0; 2112 let pattern1_0 = arg1; 2113 // Rule at src/isa/s390x/inst.isle line 1543. 2114 let expr0_0 = MInst::Store64 { 2115 rd: pattern0_0, 2116 mem: pattern1_0.clone(), 2117 }; 2118 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2119 return Some(expr1_0); 2120 } 2121 2122 // Generated as internal constructor for term store8_imm. 2123 pub fn constructor_store8_imm<C: Context>( 2124 ctx: &mut C, 2125 arg0: u8, 2126 arg1: &MemArg, 2127 ) -> Option<SideEffectNoResult> { 2128 let pattern0_0 = arg0; 2129 let pattern1_0 = arg1; 2130 // Rule at src/isa/s390x/inst.isle line 1548. 2131 let expr0_0 = MInst::StoreImm8 { 2132 imm: pattern0_0, 2133 mem: pattern1_0.clone(), 2134 }; 2135 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2136 return Some(expr1_0); 2137 } 2138 2139 // Generated as internal constructor for term store16_imm. 2140 pub fn constructor_store16_imm<C: Context>( 2141 ctx: &mut C, 2142 arg0: i16, 2143 arg1: &MemArg, 2144 ) -> Option<SideEffectNoResult> { 2145 let pattern0_0 = arg0; 2146 let pattern1_0 = arg1; 2147 // Rule at src/isa/s390x/inst.isle line 1553. 2148 let expr0_0 = MInst::StoreImm16 { 2149 imm: pattern0_0, 2150 mem: pattern1_0.clone(), 2151 }; 2152 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2153 return Some(expr1_0); 2154 } 2155 2156 // Generated as internal constructor for term store32_simm16. 2157 pub fn constructor_store32_simm16<C: Context>( 2158 ctx: &mut C, 2159 arg0: i16, 2160 arg1: &MemArg, 2161 ) -> Option<SideEffectNoResult> { 2162 let pattern0_0 = arg0; 2163 let pattern1_0 = arg1; 2164 // Rule at src/isa/s390x/inst.isle line 1558. 2165 let expr0_0 = MInst::StoreImm32SExt16 { 2166 imm: pattern0_0, 2167 mem: pattern1_0.clone(), 2168 }; 2169 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2170 return Some(expr1_0); 2171 } 2172 2173 // Generated as internal constructor for term store64_simm16. 2174 pub fn constructor_store64_simm16<C: Context>( 2175 ctx: &mut C, 2176 arg0: i16, 2177 arg1: &MemArg, 2178 ) -> Option<SideEffectNoResult> { 2179 let pattern0_0 = arg0; 2180 let pattern1_0 = arg1; 2181 // Rule at src/isa/s390x/inst.isle line 1563. 2182 let expr0_0 = MInst::StoreImm64SExt16 { 2183 imm: pattern0_0, 2184 mem: pattern1_0.clone(), 2185 }; 2186 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2187 return Some(expr1_0); 2188 } 2189 2190 // Generated as internal constructor for term storerev16. 2191 pub fn constructor_storerev16<C: Context>( 2192 ctx: &mut C, 2193 arg0: Reg, 2194 arg1: &MemArg, 2195 ) -> Option<SideEffectNoResult> { 2196 let pattern0_0 = arg0; 2197 let pattern1_0 = arg1; 2198 // Rule at src/isa/s390x/inst.isle line 1568. 2199 let expr0_0 = MInst::StoreRev16 { 2200 rd: pattern0_0, 2201 mem: pattern1_0.clone(), 2202 }; 2203 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2204 return Some(expr1_0); 2205 } 2206 2207 // Generated as internal constructor for term storerev32. 2208 pub fn constructor_storerev32<C: Context>( 2209 ctx: &mut C, 2210 arg0: Reg, 2211 arg1: &MemArg, 2212 ) -> Option<SideEffectNoResult> { 2213 let pattern0_0 = arg0; 2214 let pattern1_0 = arg1; 2215 // Rule at src/isa/s390x/inst.isle line 1573. 2216 let expr0_0 = MInst::StoreRev32 { 2217 rd: pattern0_0, 2218 mem: pattern1_0.clone(), 2219 }; 2220 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2221 return Some(expr1_0); 2222 } 2223 2224 // Generated as internal constructor for term storerev64. 2225 pub fn constructor_storerev64<C: Context>( 2226 ctx: &mut C, 2227 arg0: Reg, 2228 arg1: &MemArg, 2229 ) -> Option<SideEffectNoResult> { 2230 let pattern0_0 = arg0; 2231 let pattern1_0 = arg1; 2232 // Rule at src/isa/s390x/inst.isle line 1578. 2233 let expr0_0 = MInst::StoreRev64 { 2234 rd: pattern0_0, 2235 mem: pattern1_0.clone(), 2236 }; 2237 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2238 return Some(expr1_0); 2239 } 2240 2241 // Generated as internal constructor for term fpu_rr. 2242 pub fn constructor_fpu_rr<C: Context>( 2243 ctx: &mut C, 2244 arg0: Type, 2245 arg1: &FPUOp1, 2246 arg2: Reg, 2247 ) -> Option<Reg> { 2248 let pattern0_0 = arg0; 2249 let pattern1_0 = arg1; 2250 let pattern2_0 = arg2; 2251 // Rule at src/isa/s390x/inst.isle line 1583. 2252 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2253 let expr1_0 = MInst::FpuRR { 2254 fpu_op: pattern1_0.clone(), 2255 rd: expr0_0, 2256 rn: pattern2_0, 2257 }; 2258 let expr2_0 = C::emit(ctx, &expr1_0); 2259 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2260 return Some(expr3_0); 2261 } 2262 2263 // Generated as internal constructor for term fpu_rrr. 2264 pub fn constructor_fpu_rrr<C: Context>( 2265 ctx: &mut C, 2266 arg0: Type, 2267 arg1: &FPUOp2, 2268 arg2: Reg, 2269 arg3: Reg, 2270 ) -> Option<Reg> { 2271 let pattern0_0 = arg0; 2272 let pattern1_0 = arg1; 2273 let pattern2_0 = arg2; 2274 let pattern3_0 = arg3; 2275 // Rule at src/isa/s390x/inst.isle line 1590. 2276 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2277 let expr1_0 = MInst::FpuRRR { 2278 fpu_op: pattern1_0.clone(), 2279 rd: expr0_0, 2280 rm: pattern3_0, 2281 }; 2282 let expr2_0 = C::emit(ctx, &expr1_0); 2283 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2284 return Some(expr3_0); 2285 } 2286 2287 // Generated as internal constructor for term fpu_rrrr. 2288 pub fn constructor_fpu_rrrr<C: Context>( 2289 ctx: &mut C, 2290 arg0: Type, 2291 arg1: &FPUOp3, 2292 arg2: Reg, 2293 arg3: Reg, 2294 arg4: Reg, 2295 ) -> Option<Reg> { 2296 let pattern0_0 = arg0; 2297 let pattern1_0 = arg1; 2298 let pattern2_0 = arg2; 2299 let pattern3_0 = arg3; 2300 let pattern4_0 = arg4; 2301 // Rule at src/isa/s390x/inst.isle line 1597. 2302 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2303 let expr1_0 = MInst::FpuRRRR { 2304 fpu_op: pattern1_0.clone(), 2305 rd: expr0_0, 2306 rn: pattern3_0, 2307 rm: pattern4_0, 2308 }; 2309 let expr2_0 = C::emit(ctx, &expr1_0); 2310 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2311 return Some(expr3_0); 2312 } 2313 2314 // Generated as internal constructor for term fpu_copysign. 2315 pub fn constructor_fpu_copysign<C: Context>( 2316 ctx: &mut C, 2317 arg0: Type, 2318 arg1: Reg, 2319 arg2: Reg, 2320 ) -> Option<Reg> { 2321 let pattern0_0 = arg0; 2322 let pattern1_0 = arg1; 2323 let pattern2_0 = arg2; 2324 // Rule at src/isa/s390x/inst.isle line 1604. 2325 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2326 let expr1_0 = MInst::FpuCopysign { 2327 rd: expr0_0, 2328 rn: pattern1_0, 2329 rm: pattern2_0, 2330 }; 2331 let expr2_0 = C::emit(ctx, &expr1_0); 2332 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2333 return Some(expr3_0); 2334 } 2335 2336 // Generated as internal constructor for term fpu_cmp32. 2337 pub fn constructor_fpu_cmp32<C: Context>( 2338 ctx: &mut C, 2339 arg0: Reg, 2340 arg1: Reg, 2341 ) -> Option<ProducesFlags> { 2342 let pattern0_0 = arg0; 2343 let pattern1_0 = arg1; 2344 // Rule at src/isa/s390x/inst.isle line 1611. 2345 let expr0_0 = MInst::FpuCmp32 { 2346 rn: pattern0_0, 2347 rm: pattern1_0, 2348 }; 2349 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2350 return Some(expr1_0); 2351 } 2352 2353 // Generated as internal constructor for term fpu_cmp64. 2354 pub fn constructor_fpu_cmp64<C: Context>( 2355 ctx: &mut C, 2356 arg0: Reg, 2357 arg1: Reg, 2358 ) -> Option<ProducesFlags> { 2359 let pattern0_0 = arg0; 2360 let pattern1_0 = arg1; 2361 // Rule at src/isa/s390x/inst.isle line 1616. 2362 let expr0_0 = MInst::FpuCmp64 { 2363 rn: pattern0_0, 2364 rm: pattern1_0, 2365 }; 2366 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2367 return Some(expr1_0); 2368 } 2369 2370 // Generated as internal constructor for term fpu_to_int. 2371 pub fn constructor_fpu_to_int<C: Context>( 2372 ctx: &mut C, 2373 arg0: Type, 2374 arg1: &FpuToIntOp, 2375 arg2: Reg, 2376 ) -> Option<ProducesFlags> { 2377 let pattern0_0 = arg0; 2378 let pattern1_0 = arg1; 2379 let pattern2_0 = arg2; 2380 // Rule at src/isa/s390x/inst.isle line 1621. 2381 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2382 let expr1_0 = MInst::FpuToInt { 2383 op: pattern1_0.clone(), 2384 rd: expr0_0, 2385 rn: pattern2_0, 2386 }; 2387 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2388 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2389 inst: expr1_0, 2390 result: expr2_0, 2391 }; 2392 return Some(expr3_0); 2393 } 2394 2395 // Generated as internal constructor for term int_to_fpu. 2396 pub fn constructor_int_to_fpu<C: Context>( 2397 ctx: &mut C, 2398 arg0: Type, 2399 arg1: &IntToFpuOp, 2400 arg2: Reg, 2401 ) -> Option<Reg> { 2402 let pattern0_0 = arg0; 2403 let pattern1_0 = arg1; 2404 let pattern2_0 = arg2; 2405 // Rule at src/isa/s390x/inst.isle line 1628. 2406 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2407 let expr1_0 = MInst::IntToFpu { 2408 op: pattern1_0.clone(), 2409 rd: expr0_0, 2410 rn: pattern2_0, 2411 }; 2412 let expr2_0 = C::emit(ctx, &expr1_0); 2413 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2414 return Some(expr3_0); 2415 } 2416 2417 // Generated as internal constructor for term fpu_round. 2418 pub fn constructor_fpu_round<C: Context>( 2419 ctx: &mut C, 2420 arg0: Type, 2421 arg1: &FpuRoundMode, 2422 arg2: Reg, 2423 ) -> Option<Reg> { 2424 let pattern0_0 = arg0; 2425 let pattern1_0 = arg1; 2426 let pattern2_0 = arg2; 2427 // Rule at src/isa/s390x/inst.isle line 1635. 2428 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2429 let expr1_0 = MInst::FpuRound { 2430 op: pattern1_0.clone(), 2431 rd: expr0_0, 2432 rn: pattern2_0, 2433 }; 2434 let expr2_0 = C::emit(ctx, &expr1_0); 2435 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2436 return Some(expr3_0); 2437 } 2438 2439 // Generated as internal constructor for term fpuvec_rrr. 2440 pub fn constructor_fpuvec_rrr<C: Context>( 2441 ctx: &mut C, 2442 arg0: Type, 2443 arg1: &FPUOp2, 2444 arg2: Reg, 2445 arg3: Reg, 2446 ) -> Option<Reg> { 2447 let pattern0_0 = arg0; 2448 let pattern1_0 = arg1; 2449 let pattern2_0 = arg2; 2450 let pattern3_0 = arg3; 2451 // Rule at src/isa/s390x/inst.isle line 1642. 2452 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2453 let expr1_0 = MInst::FpuVecRRR { 2454 fpu_op: pattern1_0.clone(), 2455 rd: expr0_0, 2456 rn: pattern2_0, 2457 rm: pattern3_0, 2458 }; 2459 let expr2_0 = C::emit(ctx, &expr1_0); 2460 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2461 return Some(expr3_0); 2462 } 2463 2464 // Generated as internal constructor for term mov_to_fpr. 2465 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2466 let pattern0_0 = arg0; 2467 // Rule at src/isa/s390x/inst.isle line 1649. 2468 let expr0_0: Type = F64; 2469 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2470 let expr2_0 = MInst::MovToFpr { 2471 rd: expr1_0, 2472 rn: pattern0_0, 2473 }; 2474 let expr3_0 = C::emit(ctx, &expr2_0); 2475 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2476 return Some(expr4_0); 2477 } 2478 2479 // Generated as internal constructor for term mov_from_fpr. 2480 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2481 let pattern0_0 = arg0; 2482 // Rule at src/isa/s390x/inst.isle line 1656. 2483 let expr0_0: Type = I64; 2484 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2485 let expr2_0 = MInst::MovFromFpr { 2486 rd: expr1_0, 2487 rn: pattern0_0, 2488 }; 2489 let expr3_0 = C::emit(ctx, &expr2_0); 2490 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2491 return Some(expr4_0); 2492 } 2493 2494 // Generated as internal constructor for term fpu_load32. 2495 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2496 let pattern0_0 = arg0; 2497 // Rule at src/isa/s390x/inst.isle line 1663. 2498 let expr0_0: Type = F32; 2499 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2500 let expr2_0 = MInst::FpuLoad32 { 2501 rd: expr1_0, 2502 mem: pattern0_0.clone(), 2503 }; 2504 let expr3_0 = C::emit(ctx, &expr2_0); 2505 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2506 return Some(expr4_0); 2507 } 2508 2509 // Generated as internal constructor for term fpu_load64. 2510 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2511 let pattern0_0 = arg0; 2512 // Rule at src/isa/s390x/inst.isle line 1670. 2513 let expr0_0: Type = F64; 2514 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2515 let expr2_0 = MInst::FpuLoad64 { 2516 rd: expr1_0, 2517 mem: pattern0_0.clone(), 2518 }; 2519 let expr3_0 = C::emit(ctx, &expr2_0); 2520 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2521 return Some(expr4_0); 2522 } 2523 2524 // Generated as internal constructor for term fpu_loadrev32. 2525 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2526 let pattern0_0 = arg0; 2527 // Rule at src/isa/s390x/inst.isle line 1677. 2528 let expr0_0: Type = F32; 2529 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2530 let expr2_0 = MInst::FpuLoadRev32 { 2531 rd: expr1_0, 2532 mem: pattern0_0.clone(), 2533 }; 2534 let expr3_0 = C::emit(ctx, &expr2_0); 2535 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2536 return Some(expr4_0); 2537 } 2538 2539 // Generated as internal constructor for term fpu_loadrev64. 2540 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2541 let pattern0_0 = arg0; 2542 // Rule at src/isa/s390x/inst.isle line 1684. 2543 let expr0_0: Type = F64; 2544 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2545 let expr2_0 = MInst::FpuLoadRev64 { 2546 rd: expr1_0, 2547 mem: pattern0_0.clone(), 2548 }; 2549 let expr3_0 = C::emit(ctx, &expr2_0); 2550 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2551 return Some(expr4_0); 2552 } 2553 2554 // Generated as internal constructor for term fpu_store32. 2555 pub fn constructor_fpu_store32<C: Context>( 2556 ctx: &mut C, 2557 arg0: Reg, 2558 arg1: &MemArg, 2559 ) -> Option<SideEffectNoResult> { 2560 let pattern0_0 = arg0; 2561 let pattern1_0 = arg1; 2562 // Rule at src/isa/s390x/inst.isle line 1691. 2563 let expr0_0 = MInst::FpuStore32 { 2564 rd: pattern0_0, 2565 mem: pattern1_0.clone(), 2566 }; 2567 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2568 return Some(expr1_0); 2569 } 2570 2571 // Generated as internal constructor for term fpu_store64. 2572 pub fn constructor_fpu_store64<C: Context>( 2573 ctx: &mut C, 2574 arg0: Reg, 2575 arg1: &MemArg, 2576 ) -> Option<SideEffectNoResult> { 2577 let pattern0_0 = arg0; 2578 let pattern1_0 = arg1; 2579 // Rule at src/isa/s390x/inst.isle line 1696. 2580 let expr0_0 = MInst::FpuStore64 { 2581 rd: pattern0_0, 2582 mem: pattern1_0.clone(), 2583 }; 2584 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2585 return Some(expr1_0); 2586 } 2587 2588 // Generated as internal constructor for term fpu_storerev32. 2589 pub fn constructor_fpu_storerev32<C: Context>( 2590 ctx: &mut C, 2591 arg0: Reg, 2592 arg1: &MemArg, 2593 ) -> Option<SideEffectNoResult> { 2594 let pattern0_0 = arg0; 2595 let pattern1_0 = arg1; 2596 // Rule at src/isa/s390x/inst.isle line 1701. 2597 let expr0_0 = MInst::FpuStoreRev32 { 2598 rd: pattern0_0, 2599 mem: pattern1_0.clone(), 2600 }; 2601 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2602 return Some(expr1_0); 2603 } 2604 2605 // Generated as internal constructor for term fpu_storerev64. 2606 pub fn constructor_fpu_storerev64<C: Context>( 2607 ctx: &mut C, 2608 arg0: Reg, 2609 arg1: &MemArg, 2610 ) -> Option<SideEffectNoResult> { 2611 let pattern0_0 = arg0; 2612 let pattern1_0 = arg1; 2613 // Rule at src/isa/s390x/inst.isle line 1706. 2614 let expr0_0 = MInst::FpuStoreRev64 { 2615 rd: pattern0_0, 2616 mem: pattern1_0.clone(), 2617 }; 2618 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2619 return Some(expr1_0); 2620 } 2621 2622 // Generated as internal constructor for term load_ext_name_far. 2623 pub fn constructor_load_ext_name_far<C: Context>( 2624 ctx: &mut C, 2625 arg0: ExternalName, 2626 arg1: i64, 2627 ) -> Option<Reg> { 2628 let pattern0_0 = arg0; 2629 let pattern1_0 = arg1; 2630 // Rule at src/isa/s390x/inst.isle line 1711. 2631 let expr0_0: Type = I64; 2632 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2633 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2634 let expr3_0 = MInst::LoadExtNameFar { 2635 rd: expr1_0, 2636 name: expr2_0, 2637 offset: pattern1_0, 2638 }; 2639 let expr4_0 = C::emit(ctx, &expr3_0); 2640 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2641 return Some(expr5_0); 2642 } 2643 2644 // Generated as internal constructor for term load_addr. 2645 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2646 let pattern0_0 = arg0; 2647 // Rule at src/isa/s390x/inst.isle line 1719. 2648 let expr0_0: Type = I64; 2649 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2650 let expr2_0 = MInst::LoadAddr { 2651 rd: expr1_0, 2652 mem: pattern0_0.clone(), 2653 }; 2654 let expr3_0 = C::emit(ctx, &expr2_0); 2655 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2656 return Some(expr4_0); 2657 } 2658 2659 // Generated as internal constructor for term jump_impl. 2660 pub fn constructor_jump_impl<C: Context>( 2661 ctx: &mut C, 2662 arg0: MachLabel, 2663 ) -> Option<SideEffectNoResult> { 2664 let pattern0_0 = arg0; 2665 // Rule at src/isa/s390x/inst.isle line 1726. 2666 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2667 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2668 return Some(expr1_0); 2669 } 2670 2671 // Generated as internal constructor for term cond_br. 2672 pub fn constructor_cond_br<C: Context>( 2673 ctx: &mut C, 2674 arg0: MachLabel, 2675 arg1: MachLabel, 2676 arg2: &Cond, 2677 ) -> Option<SideEffectNoResult> { 2678 let pattern0_0 = arg0; 2679 let pattern1_0 = arg1; 2680 let pattern2_0 = arg2; 2681 // Rule at src/isa/s390x/inst.isle line 1731. 2682 let expr0_0 = MInst::CondBr { 2683 taken: pattern0_0, 2684 not_taken: pattern1_0, 2685 cond: pattern2_0.clone(), 2686 }; 2687 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2688 return Some(expr1_0); 2689 } 2690 2691 // Generated as internal constructor for term oneway_cond_br. 2692 pub fn constructor_oneway_cond_br<C: Context>( 2693 ctx: &mut C, 2694 arg0: MachLabel, 2695 arg1: &Cond, 2696 ) -> Option<SideEffectNoResult> { 2697 let pattern0_0 = arg0; 2698 let pattern1_0 = arg1; 2699 // Rule at src/isa/s390x/inst.isle line 1736. 2700 let expr0_0 = MInst::OneWayCondBr { 2701 target: pattern0_0, 2702 cond: pattern1_0.clone(), 2703 }; 2704 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2705 return Some(expr1_0); 2706 } 2707 2708 // Generated as internal constructor for term jt_sequence. 2709 pub fn constructor_jt_sequence<C: Context>( 2710 ctx: &mut C, 2711 arg0: Reg, 2712 arg1: &VecMachLabel, 2713 ) -> Option<SideEffectNoResult> { 2714 let pattern0_0 = arg0; 2715 let pattern1_0 = arg1; 2716 // Rule at src/isa/s390x/inst.isle line 1741. 2717 let expr0_0 = MInst::JTSequence { 2718 ridx: pattern0_0, 2719 targets: pattern1_0.clone(), 2720 }; 2721 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2722 return Some(expr1_0); 2723 } 2724 2725 // Generated as internal constructor for term drop_flags. 2726 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2727 let pattern0_0 = arg0; 2728 if let &ProducesFlags::ProducesFlagsReturnsReg { 2729 inst: ref pattern1_0, 2730 result: pattern1_1, 2731 } = pattern0_0 2732 { 2733 // Rule at src/isa/s390x/inst.isle line 1746. 2734 let expr0_0 = C::emit(ctx, pattern1_0); 2735 return Some(pattern1_1); 2736 } 2737 return None; 2738 } 2739 2740 // Generated as internal constructor for term push_alu_reg. 2741 pub fn constructor_push_alu_reg<C: Context>( 2742 ctx: &mut C, 2743 arg0: &VecMInstBuilder, 2744 arg1: &ALUOp, 2745 arg2: WritableReg, 2746 arg3: Reg, 2747 arg4: Reg, 2748 ) -> Option<Reg> { 2749 let pattern0_0 = arg0; 2750 let pattern1_0 = arg1; 2751 let pattern2_0 = arg2; 2752 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2753 let pattern4_0 = arg3; 2754 let pattern5_0 = arg4; 2755 // Rule at src/isa/s390x/inst.isle line 1785. 2756 let expr0_0 = MInst::AluRRR { 2757 alu_op: pattern1_0.clone(), 2758 rd: pattern3_0, 2759 rn: pattern4_0, 2760 rm: pattern5_0, 2761 }; 2762 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2763 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2764 return Some(expr2_0); 2765 } 2766 return None; 2767 } 2768 2769 // Generated as internal constructor for term push_alu_uimm32shifted. 2770 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2771 ctx: &mut C, 2772 arg0: &VecMInstBuilder, 2773 arg1: &ALUOp, 2774 arg2: WritableReg, 2775 arg3: Reg, 2776 arg4: UImm32Shifted, 2777 ) -> Option<Reg> { 2778 let pattern0_0 = arg0; 2779 let pattern1_0 = arg1; 2780 let pattern2_0 = arg2; 2781 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2782 let pattern4_0 = arg3; 2783 let closure5 = || { 2784 return Some(pattern3_0); 2785 }; 2786 if let Some(pattern5_0) = closure5() { 2787 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2788 let pattern7_0 = arg4; 2789 // Rule at src/isa/s390x/inst.isle line 1791. 2790 let expr0_0 = MInst::AluRUImm32Shifted { 2791 alu_op: pattern1_0.clone(), 2792 rd: pattern3_0, 2793 imm: pattern7_0, 2794 }; 2795 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2796 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2797 return Some(expr2_0); 2798 } 2799 } 2800 } 2801 return None; 2802 } 2803 2804 // Generated as internal constructor for term push_shift. 2805 pub fn constructor_push_shift<C: Context>( 2806 ctx: &mut C, 2807 arg0: &VecMInstBuilder, 2808 arg1: &ShiftOp, 2809 arg2: WritableReg, 2810 arg3: Reg, 2811 arg4: u8, 2812 arg5: Reg, 2813 ) -> Option<Reg> { 2814 let pattern0_0 = arg0; 2815 let pattern1_0 = arg1; 2816 let pattern2_0 = arg2; 2817 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2818 let pattern4_0 = arg3; 2819 let pattern5_0 = arg4; 2820 let pattern6_0 = arg5; 2821 // Rule at src/isa/s390x/inst.isle line 1797. 2822 let expr0_0 = MInst::ShiftRR { 2823 shift_op: pattern1_0.clone(), 2824 rd: pattern3_0, 2825 rn: pattern4_0, 2826 shift_imm: pattern5_0, 2827 shift_reg: pattern6_0, 2828 }; 2829 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2830 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2831 return Some(expr2_0); 2832 } 2833 return None; 2834 } 2835 2836 // Generated as internal constructor for term push_rxsbg. 2837 pub fn constructor_push_rxsbg<C: Context>( 2838 ctx: &mut C, 2839 arg0: &VecMInstBuilder, 2840 arg1: &RxSBGOp, 2841 arg2: WritableReg, 2842 arg3: Reg, 2843 arg4: Reg, 2844 arg5: u8, 2845 arg6: u8, 2846 arg7: i8, 2847 ) -> Option<Reg> { 2848 let pattern0_0 = arg0; 2849 let pattern1_0 = arg1; 2850 let pattern2_0 = arg2; 2851 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2852 let pattern4_0 = arg3; 2853 let closure5 = || { 2854 return Some(pattern3_0); 2855 }; 2856 if let Some(pattern5_0) = closure5() { 2857 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2858 let pattern7_0 = arg4; 2859 let pattern8_0 = arg5; 2860 let pattern9_0 = arg6; 2861 let pattern10_0 = arg7; 2862 // Rule at src/isa/s390x/inst.isle line 1804. 2863 let expr0_0 = MInst::RxSBG { 2864 op: pattern1_0.clone(), 2865 rd: pattern3_0, 2866 rn: pattern7_0, 2867 start_bit: pattern8_0, 2868 end_bit: pattern9_0, 2869 rotate_amt: pattern10_0, 2870 }; 2871 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2872 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2873 return Some(expr2_0); 2874 } 2875 } 2876 } 2877 return None; 2878 } 2879 2880 // Generated as internal constructor for term push_unary. 2881 pub fn constructor_push_unary<C: Context>( 2882 ctx: &mut C, 2883 arg0: &VecMInstBuilder, 2884 arg1: &UnaryOp, 2885 arg2: WritableReg, 2886 arg3: Reg, 2887 ) -> Option<Reg> { 2888 let pattern0_0 = arg0; 2889 let pattern1_0 = arg1; 2890 let pattern2_0 = arg2; 2891 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2892 let pattern4_0 = arg3; 2893 // Rule at src/isa/s390x/inst.isle line 1811. 2894 let expr0_0 = MInst::UnaryRR { 2895 op: pattern1_0.clone(), 2896 rd: pattern3_0, 2897 rn: pattern4_0, 2898 }; 2899 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2900 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2901 return Some(expr2_0); 2902 } 2903 return None; 2904 } 2905 2906 // Generated as internal constructor for term push_atomic_cas32. 2907 pub fn constructor_push_atomic_cas32<C: Context>( 2908 ctx: &mut C, 2909 arg0: &VecMInstBuilder, 2910 arg1: WritableReg, 2911 arg2: Reg, 2912 arg3: &MemArg, 2913 ) -> Option<Reg> { 2914 let pattern0_0 = arg0; 2915 let pattern1_0 = arg1; 2916 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2917 let pattern3_0 = arg2; 2918 let pattern4_0 = arg3; 2919 // Rule at src/isa/s390x/inst.isle line 1817. 2920 let expr0_0 = MInst::AtomicCas32 { 2921 rd: pattern2_0, 2922 rn: pattern3_0, 2923 mem: pattern4_0.clone(), 2924 }; 2925 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2926 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 2927 return Some(expr2_0); 2928 } 2929 return None; 2930 } 2931 2932 // Generated as internal constructor for term push_atomic_cas64. 2933 pub fn constructor_push_atomic_cas64<C: Context>( 2934 ctx: &mut C, 2935 arg0: &VecMInstBuilder, 2936 arg1: WritableReg, 2937 arg2: Reg, 2938 arg3: &MemArg, 2939 ) -> Option<Reg> { 2940 let pattern0_0 = arg0; 2941 let pattern1_0 = arg1; 2942 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2943 let pattern3_0 = arg2; 2944 let pattern4_0 = arg3; 2945 // Rule at src/isa/s390x/inst.isle line 1823. 2946 let expr0_0 = MInst::AtomicCas64 { 2947 rd: pattern2_0, 2948 rn: pattern3_0, 2949 mem: pattern4_0.clone(), 2950 }; 2951 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2952 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 2953 return Some(expr2_0); 2954 } 2955 return None; 2956 } 2957 2958 // Generated as internal constructor for term push_break_if. 2959 pub fn constructor_push_break_if<C: Context>( 2960 ctx: &mut C, 2961 arg0: &VecMInstBuilder, 2962 arg1: &ProducesFlags, 2963 arg2: &Cond, 2964 ) -> Option<Reg> { 2965 let pattern0_0 = arg0; 2966 let pattern1_0 = arg1; 2967 if let &ProducesFlags::ProducesFlagsSideEffect { 2968 inst: ref pattern2_0, 2969 } = pattern1_0 2970 { 2971 let pattern3_0 = arg2; 2972 // Rule at src/isa/s390x/inst.isle line 1829. 2973 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 2974 let expr1_0 = MInst::CondBreak { 2975 cond: pattern3_0.clone(), 2976 }; 2977 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 2978 let expr3_0 = C::invalid_reg(ctx); 2979 return Some(expr3_0); 2980 } 2981 return None; 2982 } 2983 2984 // Generated as internal constructor for term emit_loop. 2985 pub fn constructor_emit_loop<C: Context>( 2986 ctx: &mut C, 2987 arg0: &VecMInstBuilder, 2988 arg1: &Cond, 2989 ) -> Option<Unit> { 2990 let pattern0_0 = arg0; 2991 let pattern1_0 = arg1; 2992 // Rule at src/isa/s390x/inst.isle line 1836. 2993 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 2994 let expr1_0 = MInst::Loop { 2995 body: expr0_0, 2996 cond: pattern1_0.clone(), 2997 }; 2998 let expr2_0 = C::emit(ctx, &expr1_0); 2999 return Some(expr2_0); 3000 } 3001 3002 // Generated as internal constructor for term emit_mov. 3003 pub fn constructor_emit_mov<C: Context>( 3004 ctx: &mut C, 3005 arg0: Type, 3006 arg1: WritableReg, 3007 arg2: Reg, 3008 ) -> Option<Unit> { 3009 let pattern0_0 = arg0; 3010 if pattern0_0 == F32 { 3011 let pattern2_0 = arg1; 3012 let pattern3_0 = arg2; 3013 // Rule at src/isa/s390x/inst.isle line 1851. 3014 let expr0_0 = MInst::FpuMove32 { 3015 rd: pattern2_0, 3016 rn: pattern3_0, 3017 }; 3018 let expr1_0 = C::emit(ctx, &expr0_0); 3019 return Some(expr1_0); 3020 } 3021 if pattern0_0 == F64 { 3022 let pattern2_0 = arg1; 3023 let pattern3_0 = arg2; 3024 // Rule at src/isa/s390x/inst.isle line 1854. 3025 let expr0_0 = MInst::FpuMove64 { 3026 rd: pattern2_0, 3027 rn: pattern3_0, 3028 }; 3029 let expr1_0 = C::emit(ctx, &expr0_0); 3030 return Some(expr1_0); 3031 } 3032 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3033 let pattern2_0 = arg1; 3034 let pattern3_0 = arg2; 3035 // Rule at src/isa/s390x/inst.isle line 1845. 3036 let expr0_0 = MInst::Mov32 { 3037 rd: pattern2_0, 3038 rm: pattern3_0, 3039 }; 3040 let expr1_0 = C::emit(ctx, &expr0_0); 3041 return Some(expr1_0); 3042 } 3043 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3044 let pattern2_0 = arg1; 3045 let pattern3_0 = arg2; 3046 // Rule at src/isa/s390x/inst.isle line 1848. 3047 let expr0_0 = MInst::Mov64 { 3048 rd: pattern2_0, 3049 rm: pattern3_0, 3050 }; 3051 let expr1_0 = C::emit(ctx, &expr0_0); 3052 return Some(expr1_0); 3053 } 3054 return None; 3055 } 3056 3057 // Generated as internal constructor for term copy_writable_reg. 3058 pub fn constructor_copy_writable_reg<C: Context>( 3059 ctx: &mut C, 3060 arg0: Type, 3061 arg1: Reg, 3062 ) -> Option<WritableReg> { 3063 let pattern0_0 = arg0; 3064 let pattern1_0 = arg1; 3065 // Rule at src/isa/s390x/inst.isle line 1859. 3066 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3067 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3068 return Some(expr0_0); 3069 } 3070 3071 // Generated as internal constructor for term copy_reg. 3072 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3073 let pattern0_0 = arg0; 3074 let pattern1_0 = arg1; 3075 // Rule at src/isa/s390x/inst.isle line 1866. 3076 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3077 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3078 return Some(expr1_0); 3079 } 3080 3081 // Generated as internal constructor for term emit_load. 3082 pub fn constructor_emit_load<C: Context>( 3083 ctx: &mut C, 3084 arg0: Type, 3085 arg1: WritableReg, 3086 arg2: &MemArg, 3087 ) -> Option<Unit> { 3088 let pattern0_0 = arg0; 3089 if pattern0_0 == I32 { 3090 let pattern2_0 = arg1; 3091 let pattern3_0 = arg2; 3092 // Rule at src/isa/s390x/inst.isle line 1870. 3093 let expr0_0 = MInst::Load32 { 3094 rd: pattern2_0, 3095 mem: pattern3_0.clone(), 3096 }; 3097 let expr1_0 = C::emit(ctx, &expr0_0); 3098 return Some(expr1_0); 3099 } 3100 if pattern0_0 == I64 { 3101 let pattern2_0 = arg1; 3102 let pattern3_0 = arg2; 3103 // Rule at src/isa/s390x/inst.isle line 1872. 3104 let expr0_0 = MInst::Load64 { 3105 rd: pattern2_0, 3106 mem: pattern3_0.clone(), 3107 }; 3108 let expr1_0 = C::emit(ctx, &expr0_0); 3109 return Some(expr1_0); 3110 } 3111 return None; 3112 } 3113 3114 // Generated as internal constructor for term emit_imm. 3115 pub fn constructor_emit_imm<C: Context>( 3116 ctx: &mut C, 3117 arg0: Type, 3118 arg1: WritableReg, 3119 arg2: u64, 3120 ) -> Option<Unit> { 3121 let pattern0_0 = arg0; 3122 if pattern0_0 == F32 { 3123 let pattern2_0 = arg1; 3124 let pattern3_0 = arg2; 3125 // Rule at src/isa/s390x/inst.isle line 1928. 3126 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3127 let expr1_0 = MInst::LoadFpuConst32 { 3128 rd: pattern2_0, 3129 const_data: expr0_0, 3130 }; 3131 let expr2_0 = C::emit(ctx, &expr1_0); 3132 return Some(expr2_0); 3133 } 3134 if pattern0_0 == F64 { 3135 let pattern2_0 = arg1; 3136 let pattern3_0 = arg2; 3137 // Rule at src/isa/s390x/inst.isle line 1933. 3138 let expr0_0 = MInst::LoadFpuConst64 { 3139 rd: pattern2_0, 3140 const_data: pattern3_0, 3141 }; 3142 let expr1_0 = C::emit(ctx, &expr0_0); 3143 return Some(expr1_0); 3144 } 3145 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3146 let pattern2_0 = arg1; 3147 let pattern3_0 = arg2; 3148 // Rule at src/isa/s390x/inst.isle line 1882. 3149 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3150 let expr1_0 = MInst::Mov32SImm16 { 3151 rd: pattern2_0, 3152 imm: expr0_0, 3153 }; 3154 let expr2_0 = C::emit(ctx, &expr1_0); 3155 return Some(expr2_0); 3156 } 3157 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3158 let pattern2_0 = arg1; 3159 let pattern3_0 = arg2; 3160 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3161 // Rule at src/isa/s390x/inst.isle line 1886. 3162 let expr0_0 = MInst::Mov32SImm16 { 3163 rd: pattern2_0, 3164 imm: pattern4_0, 3165 }; 3166 let expr1_0 = C::emit(ctx, &expr0_0); 3167 return Some(expr1_0); 3168 } 3169 // Rule at src/isa/s390x/inst.isle line 1890. 3170 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3171 let expr1_0 = MInst::Mov32Imm { 3172 rd: pattern2_0, 3173 imm: expr0_0, 3174 }; 3175 let expr2_0 = C::emit(ctx, &expr1_0); 3176 return Some(expr2_0); 3177 } 3178 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3179 let pattern2_0 = arg1; 3180 let pattern3_0 = arg2; 3181 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3182 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3183 // Rule at src/isa/s390x/inst.isle line 1910. 3184 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3185 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3186 return Some(expr1_0); 3187 } 3188 } 3189 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3190 // Rule at src/isa/s390x/inst.isle line 1894. 3191 let expr0_0 = MInst::Mov64SImm16 { 3192 rd: pattern2_0, 3193 imm: pattern4_0, 3194 }; 3195 let expr1_0 = C::emit(ctx, &expr0_0); 3196 return Some(expr1_0); 3197 } 3198 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3199 // Rule at src/isa/s390x/inst.isle line 1898. 3200 let expr0_0 = MInst::Mov64SImm32 { 3201 rd: pattern2_0, 3202 imm: pattern4_0, 3203 }; 3204 let expr1_0 = C::emit(ctx, &expr0_0); 3205 return Some(expr1_0); 3206 } 3207 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3208 // Rule at src/isa/s390x/inst.isle line 1906. 3209 let expr0_0 = MInst::Mov64UImm32Shifted { 3210 rd: pattern2_0, 3211 imm: pattern4_0, 3212 }; 3213 let expr1_0 = C::emit(ctx, &expr0_0); 3214 return Some(expr1_0); 3215 } 3216 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3217 // Rule at src/isa/s390x/inst.isle line 1902. 3218 let expr0_0 = MInst::Mov64UImm16Shifted { 3219 rd: pattern2_0, 3220 imm: pattern4_0, 3221 }; 3222 let expr1_0 = C::emit(ctx, &expr0_0); 3223 return Some(expr1_0); 3224 } 3225 } 3226 return None; 3227 } 3228 3229 // Generated as internal constructor for term emit_insert_imm. 3230 pub fn constructor_emit_insert_imm<C: Context>( 3231 ctx: &mut C, 3232 arg0: WritableReg, 3233 arg1: u64, 3234 ) -> Option<Unit> { 3235 let pattern0_0 = arg0; 3236 let pattern1_0 = arg1; 3237 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3238 // Rule at src/isa/s390x/inst.isle line 1923. 3239 let expr0_0 = MInst::Insert64UImm32Shifted { 3240 rd: pattern0_0, 3241 imm: pattern2_0, 3242 }; 3243 let expr1_0 = C::emit(ctx, &expr0_0); 3244 return Some(expr1_0); 3245 } 3246 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3247 // Rule at src/isa/s390x/inst.isle line 1919. 3248 let expr0_0 = MInst::Insert64UImm16Shifted { 3249 rd: pattern0_0, 3250 imm: pattern2_0, 3251 }; 3252 let expr1_0 = C::emit(ctx, &expr0_0); 3253 return Some(expr1_0); 3254 } 3255 return None; 3256 } 3257 3258 // Generated as internal constructor for term imm. 3259 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3260 let pattern0_0 = arg0; 3261 let pattern1_0 = arg1; 3262 // Rule at src/isa/s390x/inst.isle line 1938. 3263 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3264 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3265 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3266 return Some(expr2_0); 3267 } 3268 3269 // Generated as internal constructor for term imm_regpair_lo. 3270 pub fn constructor_imm_regpair_lo<C: Context>( 3271 ctx: &mut C, 3272 arg0: Type, 3273 arg1: u64, 3274 arg2: &RegPair, 3275 ) -> Option<RegPair> { 3276 let pattern0_0 = arg0; 3277 let pattern1_0 = arg1; 3278 let pattern2_0 = arg2; 3279 // Rule at src/isa/s390x/inst.isle line 1946. 3280 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3281 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3282 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3283 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3284 return Some(expr3_0); 3285 } 3286 3287 // Generated as internal constructor for term imm_regpair_hi. 3288 pub fn constructor_imm_regpair_hi<C: Context>( 3289 ctx: &mut C, 3290 arg0: Type, 3291 arg1: u64, 3292 arg2: &RegPair, 3293 ) -> Option<RegPair> { 3294 let pattern0_0 = arg0; 3295 let pattern1_0 = arg1; 3296 let pattern2_0 = arg2; 3297 // Rule at src/isa/s390x/inst.isle line 1954. 3298 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3299 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3300 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3301 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3302 return Some(expr3_0); 3303 } 3304 3305 // Generated as internal constructor for term ty_ext32. 3306 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3307 let pattern0_0 = arg0; 3308 if pattern0_0 == I8 { 3309 // Rule at src/isa/s390x/inst.isle line 1964. 3310 let expr0_0: Type = I32; 3311 return Some(expr0_0); 3312 } 3313 if pattern0_0 == I16 { 3314 // Rule at src/isa/s390x/inst.isle line 1965. 3315 let expr0_0: Type = I32; 3316 return Some(expr0_0); 3317 } 3318 if pattern0_0 == I32 { 3319 // Rule at src/isa/s390x/inst.isle line 1966. 3320 let expr0_0: Type = I32; 3321 return Some(expr0_0); 3322 } 3323 if pattern0_0 == I64 { 3324 // Rule at src/isa/s390x/inst.isle line 1967. 3325 let expr0_0: Type = I64; 3326 return Some(expr0_0); 3327 } 3328 return None; 3329 } 3330 3331 // Generated as internal constructor for term ty_ext64. 3332 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3333 let pattern0_0 = arg0; 3334 if pattern0_0 == I8 { 3335 // Rule at src/isa/s390x/inst.isle line 1971. 3336 let expr0_0: Type = I64; 3337 return Some(expr0_0); 3338 } 3339 if pattern0_0 == I16 { 3340 // Rule at src/isa/s390x/inst.isle line 1972. 3341 let expr0_0: Type = I64; 3342 return Some(expr0_0); 3343 } 3344 if pattern0_0 == I32 { 3345 // Rule at src/isa/s390x/inst.isle line 1973. 3346 let expr0_0: Type = I64; 3347 return Some(expr0_0); 3348 } 3349 if pattern0_0 == I64 { 3350 // Rule at src/isa/s390x/inst.isle line 1974. 3351 let expr0_0: Type = I64; 3352 return Some(expr0_0); 3353 } 3354 return None; 3355 } 3356 3357 // Generated as internal constructor for term emit_zext32_reg. 3358 pub fn constructor_emit_zext32_reg<C: Context>( 3359 ctx: &mut C, 3360 arg0: WritableReg, 3361 arg1: Type, 3362 arg2: Reg, 3363 ) -> Option<Unit> { 3364 let pattern0_0 = arg0; 3365 let pattern1_0 = arg1; 3366 let pattern2_0 = arg2; 3367 // Rule at src/isa/s390x/inst.isle line 1979. 3368 let expr0_0: bool = false; 3369 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3370 let expr2_0: u8 = 32; 3371 let expr3_0 = MInst::Extend { 3372 rd: pattern0_0, 3373 rn: pattern2_0, 3374 signed: expr0_0, 3375 from_bits: expr1_0, 3376 to_bits: expr2_0, 3377 }; 3378 let expr4_0 = C::emit(ctx, &expr3_0); 3379 return Some(expr4_0); 3380 } 3381 3382 // Generated as internal constructor for term emit_sext32_reg. 3383 pub fn constructor_emit_sext32_reg<C: Context>( 3384 ctx: &mut C, 3385 arg0: WritableReg, 3386 arg1: Type, 3387 arg2: Reg, 3388 ) -> Option<Unit> { 3389 let pattern0_0 = arg0; 3390 let pattern1_0 = arg1; 3391 let pattern2_0 = arg2; 3392 // Rule at src/isa/s390x/inst.isle line 1985. 3393 let expr0_0: bool = true; 3394 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3395 let expr2_0: u8 = 32; 3396 let expr3_0 = MInst::Extend { 3397 rd: pattern0_0, 3398 rn: pattern2_0, 3399 signed: expr0_0, 3400 from_bits: expr1_0, 3401 to_bits: expr2_0, 3402 }; 3403 let expr4_0 = C::emit(ctx, &expr3_0); 3404 return Some(expr4_0); 3405 } 3406 3407 // Generated as internal constructor for term emit_zext64_reg. 3408 pub fn constructor_emit_zext64_reg<C: Context>( 3409 ctx: &mut C, 3410 arg0: WritableReg, 3411 arg1: Type, 3412 arg2: Reg, 3413 ) -> Option<Unit> { 3414 let pattern0_0 = arg0; 3415 let pattern1_0 = arg1; 3416 let pattern2_0 = arg2; 3417 // Rule at src/isa/s390x/inst.isle line 1991. 3418 let expr0_0: bool = false; 3419 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3420 let expr2_0: u8 = 64; 3421 let expr3_0 = MInst::Extend { 3422 rd: pattern0_0, 3423 rn: pattern2_0, 3424 signed: expr0_0, 3425 from_bits: expr1_0, 3426 to_bits: expr2_0, 3427 }; 3428 let expr4_0 = C::emit(ctx, &expr3_0); 3429 return Some(expr4_0); 3430 } 3431 3432 // Generated as internal constructor for term emit_sext64_reg. 3433 pub fn constructor_emit_sext64_reg<C: Context>( 3434 ctx: &mut C, 3435 arg0: WritableReg, 3436 arg1: Type, 3437 arg2: Reg, 3438 ) -> Option<Unit> { 3439 let pattern0_0 = arg0; 3440 let pattern1_0 = arg1; 3441 let pattern2_0 = arg2; 3442 // Rule at src/isa/s390x/inst.isle line 1997. 3443 let expr0_0: bool = true; 3444 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3445 let expr2_0: u8 = 64; 3446 let expr3_0 = MInst::Extend { 3447 rd: pattern0_0, 3448 rn: pattern2_0, 3449 signed: expr0_0, 3450 from_bits: expr1_0, 3451 to_bits: expr2_0, 3452 }; 3453 let expr4_0 = C::emit(ctx, &expr3_0); 3454 return Some(expr4_0); 3455 } 3456 3457 // Generated as internal constructor for term zext32_reg. 3458 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3459 let pattern0_0 = arg0; 3460 let pattern1_0 = arg1; 3461 // Rule at src/isa/s390x/inst.isle line 2003. 3462 let expr0_0: Type = I32; 3463 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3464 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3465 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3466 return Some(expr3_0); 3467 } 3468 3469 // Generated as internal constructor for term sext32_reg. 3470 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3471 let pattern0_0 = arg0; 3472 let pattern1_0 = arg1; 3473 // Rule at src/isa/s390x/inst.isle line 2011. 3474 let expr0_0: Type = I32; 3475 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3476 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3477 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3478 return Some(expr3_0); 3479 } 3480 3481 // Generated as internal constructor for term zext64_reg. 3482 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3483 let pattern0_0 = arg0; 3484 let pattern1_0 = arg1; 3485 // Rule at src/isa/s390x/inst.isle line 2019. 3486 let expr0_0: Type = I64; 3487 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3488 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3489 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3490 return Some(expr3_0); 3491 } 3492 3493 // Generated as internal constructor for term sext64_reg. 3494 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3495 let pattern0_0 = arg0; 3496 let pattern1_0 = arg1; 3497 // Rule at src/isa/s390x/inst.isle line 2027. 3498 let expr0_0: Type = I64; 3499 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3500 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3501 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3502 return Some(expr3_0); 3503 } 3504 3505 // Generated as internal constructor for term emit_zext32_mem. 3506 pub fn constructor_emit_zext32_mem<C: Context>( 3507 ctx: &mut C, 3508 arg0: WritableReg, 3509 arg1: Type, 3510 arg2: &MemArg, 3511 ) -> Option<Unit> { 3512 let pattern0_0 = arg0; 3513 let pattern1_0 = arg1; 3514 if pattern1_0 == I8 { 3515 let pattern3_0 = arg2; 3516 // Rule at src/isa/s390x/inst.isle line 2035. 3517 let expr0_0 = MInst::Load32ZExt8 { 3518 rd: pattern0_0, 3519 mem: pattern3_0.clone(), 3520 }; 3521 let expr1_0 = C::emit(ctx, &expr0_0); 3522 return Some(expr1_0); 3523 } 3524 if pattern1_0 == I16 { 3525 let pattern3_0 = arg2; 3526 // Rule at src/isa/s390x/inst.isle line 2036. 3527 let expr0_0 = MInst::Load32ZExt16 { 3528 rd: pattern0_0, 3529 mem: pattern3_0.clone(), 3530 }; 3531 let expr1_0 = C::emit(ctx, &expr0_0); 3532 return Some(expr1_0); 3533 } 3534 return None; 3535 } 3536 3537 // Generated as internal constructor for term emit_sext32_mem. 3538 pub fn constructor_emit_sext32_mem<C: Context>( 3539 ctx: &mut C, 3540 arg0: WritableReg, 3541 arg1: Type, 3542 arg2: &MemArg, 3543 ) -> Option<Unit> { 3544 let pattern0_0 = arg0; 3545 let pattern1_0 = arg1; 3546 if pattern1_0 == I8 { 3547 let pattern3_0 = arg2; 3548 // Rule at src/isa/s390x/inst.isle line 2040. 3549 let expr0_0 = MInst::Load32SExt8 { 3550 rd: pattern0_0, 3551 mem: pattern3_0.clone(), 3552 }; 3553 let expr1_0 = C::emit(ctx, &expr0_0); 3554 return Some(expr1_0); 3555 } 3556 if pattern1_0 == I16 { 3557 let pattern3_0 = arg2; 3558 // Rule at src/isa/s390x/inst.isle line 2041. 3559 let expr0_0 = MInst::Load32SExt16 { 3560 rd: pattern0_0, 3561 mem: pattern3_0.clone(), 3562 }; 3563 let expr1_0 = C::emit(ctx, &expr0_0); 3564 return Some(expr1_0); 3565 } 3566 return None; 3567 } 3568 3569 // Generated as internal constructor for term emit_zext64_mem. 3570 pub fn constructor_emit_zext64_mem<C: Context>( 3571 ctx: &mut C, 3572 arg0: WritableReg, 3573 arg1: Type, 3574 arg2: &MemArg, 3575 ) -> Option<Unit> { 3576 let pattern0_0 = arg0; 3577 let pattern1_0 = arg1; 3578 if pattern1_0 == I8 { 3579 let pattern3_0 = arg2; 3580 // Rule at src/isa/s390x/inst.isle line 2045. 3581 let expr0_0 = MInst::Load64ZExt8 { 3582 rd: pattern0_0, 3583 mem: pattern3_0.clone(), 3584 }; 3585 let expr1_0 = C::emit(ctx, &expr0_0); 3586 return Some(expr1_0); 3587 } 3588 if pattern1_0 == I16 { 3589 let pattern3_0 = arg2; 3590 // Rule at src/isa/s390x/inst.isle line 2046. 3591 let expr0_0 = MInst::Load64ZExt16 { 3592 rd: pattern0_0, 3593 mem: pattern3_0.clone(), 3594 }; 3595 let expr1_0 = C::emit(ctx, &expr0_0); 3596 return Some(expr1_0); 3597 } 3598 if pattern1_0 == I32 { 3599 let pattern3_0 = arg2; 3600 // Rule at src/isa/s390x/inst.isle line 2047. 3601 let expr0_0 = MInst::Load64ZExt32 { 3602 rd: pattern0_0, 3603 mem: pattern3_0.clone(), 3604 }; 3605 let expr1_0 = C::emit(ctx, &expr0_0); 3606 return Some(expr1_0); 3607 } 3608 return None; 3609 } 3610 3611 // Generated as internal constructor for term emit_sext64_mem. 3612 pub fn constructor_emit_sext64_mem<C: Context>( 3613 ctx: &mut C, 3614 arg0: WritableReg, 3615 arg1: Type, 3616 arg2: &MemArg, 3617 ) -> Option<Unit> { 3618 let pattern0_0 = arg0; 3619 let pattern1_0 = arg1; 3620 if pattern1_0 == I8 { 3621 let pattern3_0 = arg2; 3622 // Rule at src/isa/s390x/inst.isle line 2051. 3623 let expr0_0 = MInst::Load64SExt8 { 3624 rd: pattern0_0, 3625 mem: pattern3_0.clone(), 3626 }; 3627 let expr1_0 = C::emit(ctx, &expr0_0); 3628 return Some(expr1_0); 3629 } 3630 if pattern1_0 == I16 { 3631 let pattern3_0 = arg2; 3632 // Rule at src/isa/s390x/inst.isle line 2052. 3633 let expr0_0 = MInst::Load64SExt16 { 3634 rd: pattern0_0, 3635 mem: pattern3_0.clone(), 3636 }; 3637 let expr1_0 = C::emit(ctx, &expr0_0); 3638 return Some(expr1_0); 3639 } 3640 if pattern1_0 == I32 { 3641 let pattern3_0 = arg2; 3642 // Rule at src/isa/s390x/inst.isle line 2053. 3643 let expr0_0 = MInst::Load64SExt32 { 3644 rd: pattern0_0, 3645 mem: pattern3_0.clone(), 3646 }; 3647 let expr1_0 = C::emit(ctx, &expr0_0); 3648 return Some(expr1_0); 3649 } 3650 return None; 3651 } 3652 3653 // Generated as internal constructor for term zext32_mem. 3654 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3655 let pattern0_0 = arg0; 3656 let pattern1_0 = arg1; 3657 // Rule at src/isa/s390x/inst.isle line 2057. 3658 let expr0_0: Type = I32; 3659 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3660 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3661 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3662 return Some(expr3_0); 3663 } 3664 3665 // Generated as internal constructor for term sext32_mem. 3666 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3667 let pattern0_0 = arg0; 3668 let pattern1_0 = arg1; 3669 // Rule at src/isa/s390x/inst.isle line 2064. 3670 let expr0_0: Type = I32; 3671 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3672 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3673 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3674 return Some(expr3_0); 3675 } 3676 3677 // Generated as internal constructor for term zext64_mem. 3678 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3679 let pattern0_0 = arg0; 3680 let pattern1_0 = arg1; 3681 // Rule at src/isa/s390x/inst.isle line 2071. 3682 let expr0_0: Type = I64; 3683 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3684 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3685 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3686 return Some(expr3_0); 3687 } 3688 3689 // Generated as internal constructor for term sext64_mem. 3690 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3691 let pattern0_0 = arg0; 3692 let pattern1_0 = arg1; 3693 // Rule at src/isa/s390x/inst.isle line 2078. 3694 let expr0_0: Type = I64; 3695 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3696 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3697 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3698 return Some(expr3_0); 3699 } 3700 3701 // Generated as internal constructor for term emit_put_in_reg_zext32. 3702 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3703 ctx: &mut C, 3704 arg0: WritableReg, 3705 arg1: Value, 3706 ) -> Option<Unit> { 3707 let pattern0_0 = arg0; 3708 let pattern1_0 = arg1; 3709 let pattern2_0 = C::value_type(ctx, pattern1_0); 3710 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3711 // Rule at src/isa/s390x/inst.isle line 2086. 3712 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3713 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3714 return Some(expr1_0); 3715 } 3716 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3717 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3718 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3719 if let &InstructionData::Load { 3720 opcode: ref pattern6_0, 3721 arg: pattern6_1, 3722 flags: pattern6_2, 3723 offset: pattern6_3, 3724 } = &pattern5_0 3725 { 3726 if let &Opcode::Load = pattern6_0 { 3727 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3728 // Rule at src/isa/s390x/inst.isle line 2088. 3729 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3730 let expr1_0 = 3731 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3732 return Some(expr1_0); 3733 } 3734 } 3735 } 3736 } 3737 // Rule at src/isa/s390x/inst.isle line 2090. 3738 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3739 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3740 return Some(expr1_0); 3741 } 3742 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3743 // Rule at src/isa/s390x/inst.isle line 2092. 3744 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3745 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3746 return Some(expr1_0); 3747 } 3748 return None; 3749 } 3750 3751 // Generated as internal constructor for term emit_put_in_reg_sext32. 3752 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3753 ctx: &mut C, 3754 arg0: WritableReg, 3755 arg1: Value, 3756 ) -> Option<Unit> { 3757 let pattern0_0 = arg0; 3758 let pattern1_0 = arg1; 3759 let pattern2_0 = C::value_type(ctx, pattern1_0); 3760 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3761 // Rule at src/isa/s390x/inst.isle line 2097. 3762 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3763 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3764 return Some(expr1_0); 3765 } 3766 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3767 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3768 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3769 if let &InstructionData::Load { 3770 opcode: ref pattern6_0, 3771 arg: pattern6_1, 3772 flags: pattern6_2, 3773 offset: pattern6_3, 3774 } = &pattern5_0 3775 { 3776 if let &Opcode::Load = pattern6_0 { 3777 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3778 // Rule at src/isa/s390x/inst.isle line 2099. 3779 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3780 let expr1_0 = 3781 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3782 return Some(expr1_0); 3783 } 3784 } 3785 } 3786 } 3787 // Rule at src/isa/s390x/inst.isle line 2101. 3788 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3789 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3790 return Some(expr1_0); 3791 } 3792 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3793 // Rule at src/isa/s390x/inst.isle line 2103. 3794 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3795 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3796 return Some(expr1_0); 3797 } 3798 return None; 3799 } 3800 3801 // Generated as internal constructor for term emit_put_in_reg_zext64. 3802 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3803 ctx: &mut C, 3804 arg0: WritableReg, 3805 arg1: Value, 3806 ) -> Option<Unit> { 3807 let pattern0_0 = arg0; 3808 let pattern1_0 = arg1; 3809 let pattern2_0 = C::value_type(ctx, pattern1_0); 3810 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3811 // Rule at src/isa/s390x/inst.isle line 2108. 3812 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3813 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3814 return Some(expr1_0); 3815 } 3816 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3817 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3818 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3819 if let &InstructionData::Load { 3820 opcode: ref pattern6_0, 3821 arg: pattern6_1, 3822 flags: pattern6_2, 3823 offset: pattern6_3, 3824 } = &pattern5_0 3825 { 3826 if let &Opcode::Load = pattern6_0 { 3827 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3828 // Rule at src/isa/s390x/inst.isle line 2110. 3829 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3830 let expr1_0 = 3831 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3832 return Some(expr1_0); 3833 } 3834 } 3835 } 3836 } 3837 // Rule at src/isa/s390x/inst.isle line 2112. 3838 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3839 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3840 return Some(expr1_0); 3841 } 3842 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3843 // Rule at src/isa/s390x/inst.isle line 2114. 3844 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3845 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3846 return Some(expr1_0); 3847 } 3848 return None; 3849 } 3850 3851 // Generated as internal constructor for term emit_put_in_reg_sext64. 3852 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3853 ctx: &mut C, 3854 arg0: WritableReg, 3855 arg1: Value, 3856 ) -> Option<Unit> { 3857 let pattern0_0 = arg0; 3858 let pattern1_0 = arg1; 3859 let pattern2_0 = C::value_type(ctx, pattern1_0); 3860 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3861 // Rule at src/isa/s390x/inst.isle line 2119. 3862 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3863 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3864 return Some(expr1_0); 3865 } 3866 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3867 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3868 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3869 if let &InstructionData::Load { 3870 opcode: ref pattern6_0, 3871 arg: pattern6_1, 3872 flags: pattern6_2, 3873 offset: pattern6_3, 3874 } = &pattern5_0 3875 { 3876 if let &Opcode::Load = pattern6_0 { 3877 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3878 // Rule at src/isa/s390x/inst.isle line 2121. 3879 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3880 let expr1_0 = 3881 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3882 return Some(expr1_0); 3883 } 3884 } 3885 } 3886 } 3887 // Rule at src/isa/s390x/inst.isle line 2123. 3888 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3889 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3890 return Some(expr1_0); 3891 } 3892 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3893 // Rule at src/isa/s390x/inst.isle line 2125. 3894 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3895 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3896 return Some(expr1_0); 3897 } 3898 return None; 3899 } 3900 3901 // Generated as internal constructor for term put_in_reg_zext32. 3902 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3903 let pattern0_0 = arg0; 3904 let pattern1_0 = C::value_type(ctx, pattern0_0); 3905 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3906 // Rule at src/isa/s390x/inst.isle line 2130. 3907 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3908 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3909 return Some(expr1_0); 3910 } 3911 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3912 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3913 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3914 if let &InstructionData::Load { 3915 opcode: ref pattern5_0, 3916 arg: pattern5_1, 3917 flags: pattern5_2, 3918 offset: pattern5_3, 3919 } = &pattern4_0 3920 { 3921 if let &Opcode::Load = pattern5_0 { 3922 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3923 // Rule at src/isa/s390x/inst.isle line 2132. 3924 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3925 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 3926 return Some(expr1_0); 3927 } 3928 } 3929 } 3930 } 3931 // Rule at src/isa/s390x/inst.isle line 2134. 3932 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3933 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 3934 return Some(expr1_0); 3935 } 3936 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3937 // Rule at src/isa/s390x/inst.isle line 2136. 3938 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3939 return Some(expr0_0); 3940 } 3941 return None; 3942 } 3943 3944 // Generated as internal constructor for term put_in_reg_sext32. 3945 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3946 let pattern0_0 = arg0; 3947 let pattern1_0 = C::value_type(ctx, pattern0_0); 3948 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 3949 // Rule at src/isa/s390x/inst.isle line 2141. 3950 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3951 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3952 return Some(expr1_0); 3953 } 3954 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3955 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3956 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3957 if let &InstructionData::Load { 3958 opcode: ref pattern5_0, 3959 arg: pattern5_1, 3960 flags: pattern5_2, 3961 offset: pattern5_3, 3962 } = &pattern4_0 3963 { 3964 if let &Opcode::Load = pattern5_0 { 3965 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3966 // Rule at src/isa/s390x/inst.isle line 2143. 3967 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3968 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 3969 return Some(expr1_0); 3970 } 3971 } 3972 } 3973 } 3974 // Rule at src/isa/s390x/inst.isle line 2145. 3975 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3976 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 3977 return Some(expr1_0); 3978 } 3979 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3980 // Rule at src/isa/s390x/inst.isle line 2147. 3981 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3982 return Some(expr0_0); 3983 } 3984 return None; 3985 } 3986 3987 // Generated as internal constructor for term put_in_reg_zext64. 3988 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3989 let pattern0_0 = arg0; 3990 let pattern1_0 = C::value_type(ctx, pattern0_0); 3991 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3992 // Rule at src/isa/s390x/inst.isle line 2152. 3993 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 3994 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3995 return Some(expr1_0); 3996 } 3997 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 3998 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3999 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4000 if let &InstructionData::Load { 4001 opcode: ref pattern5_0, 4002 arg: pattern5_1, 4003 flags: pattern5_2, 4004 offset: pattern5_3, 4005 } = &pattern4_0 4006 { 4007 if let &Opcode::Load = pattern5_0 { 4008 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4009 // Rule at src/isa/s390x/inst.isle line 2154. 4010 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4011 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4012 return Some(expr1_0); 4013 } 4014 } 4015 } 4016 } 4017 // Rule at src/isa/s390x/inst.isle line 2156. 4018 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4019 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4020 return Some(expr1_0); 4021 } 4022 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4023 // Rule at src/isa/s390x/inst.isle line 2158. 4024 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4025 return Some(expr0_0); 4026 } 4027 return None; 4028 } 4029 4030 // Generated as internal constructor for term put_in_reg_sext64. 4031 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4032 let pattern0_0 = arg0; 4033 let pattern1_0 = C::value_type(ctx, pattern0_0); 4034 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4035 // Rule at src/isa/s390x/inst.isle line 2163. 4036 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4037 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4038 return Some(expr1_0); 4039 } 4040 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4041 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4042 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4043 if let &InstructionData::Load { 4044 opcode: ref pattern5_0, 4045 arg: pattern5_1, 4046 flags: pattern5_2, 4047 offset: pattern5_3, 4048 } = &pattern4_0 4049 { 4050 if let &Opcode::Load = pattern5_0 { 4051 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4052 // Rule at src/isa/s390x/inst.isle line 2165. 4053 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4054 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4055 return Some(expr1_0); 4056 } 4057 } 4058 } 4059 } 4060 // Rule at src/isa/s390x/inst.isle line 2167. 4061 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4062 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4063 return Some(expr1_0); 4064 } 4065 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4066 // Rule at src/isa/s390x/inst.isle line 2169. 4067 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4068 return Some(expr0_0); 4069 } 4070 return None; 4071 } 4072 4073 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4074 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4075 ctx: &mut C, 4076 arg0: Value, 4077 arg1: &RegPair, 4078 ) -> Option<RegPair> { 4079 let pattern0_0 = arg0; 4080 let pattern1_0 = arg1; 4081 // Rule at src/isa/s390x/inst.isle line 2175. 4082 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4083 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4084 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4085 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4086 return Some(expr3_0); 4087 } 4088 4089 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4090 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4091 ctx: &mut C, 4092 arg0: Value, 4093 arg1: &RegPair, 4094 ) -> Option<RegPair> { 4095 let pattern0_0 = arg0; 4096 let pattern1_0 = arg1; 4097 // Rule at src/isa/s390x/inst.isle line 2183. 4098 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4099 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4100 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4101 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4102 return Some(expr3_0); 4103 } 4104 4105 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4106 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4107 ctx: &mut C, 4108 arg0: Value, 4109 arg1: &RegPair, 4110 ) -> Option<RegPair> { 4111 let pattern0_0 = arg0; 4112 let pattern1_0 = arg1; 4113 // Rule at src/isa/s390x/inst.isle line 2191. 4114 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4115 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4116 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4117 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4118 return Some(expr3_0); 4119 } 4120 4121 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4122 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4123 ctx: &mut C, 4124 arg0: Value, 4125 arg1: &RegPair, 4126 ) -> Option<RegPair> { 4127 let pattern0_0 = arg0; 4128 let pattern1_0 = arg1; 4129 // Rule at src/isa/s390x/inst.isle line 2199. 4130 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4131 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4132 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4133 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4134 return Some(expr3_0); 4135 } 4136 4137 // Generated as internal constructor for term emit_cmov_imm. 4138 pub fn constructor_emit_cmov_imm<C: Context>( 4139 ctx: &mut C, 4140 arg0: Type, 4141 arg1: WritableReg, 4142 arg2: &Cond, 4143 arg3: i16, 4144 ) -> Option<ConsumesFlags> { 4145 let pattern0_0 = arg0; 4146 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4147 let pattern2_0 = arg1; 4148 let pattern3_0 = arg2; 4149 let pattern4_0 = arg3; 4150 // Rule at src/isa/s390x/inst.isle line 2209. 4151 let expr0_0 = MInst::CMov32SImm16 { 4152 rd: pattern2_0, 4153 cond: pattern3_0.clone(), 4154 imm: pattern4_0, 4155 }; 4156 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4157 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4158 inst: expr0_0, 4159 result: expr1_0, 4160 }; 4161 return Some(expr2_0); 4162 } 4163 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4164 let pattern2_0 = arg1; 4165 let pattern3_0 = arg2; 4166 let pattern4_0 = arg3; 4167 // Rule at src/isa/s390x/inst.isle line 2212. 4168 let expr0_0 = MInst::CMov64SImm16 { 4169 rd: pattern2_0, 4170 cond: pattern3_0.clone(), 4171 imm: pattern4_0, 4172 }; 4173 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4174 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4175 inst: expr0_0, 4176 result: expr1_0, 4177 }; 4178 return Some(expr2_0); 4179 } 4180 return None; 4181 } 4182 4183 // Generated as internal constructor for term cmov_imm. 4184 pub fn constructor_cmov_imm<C: Context>( 4185 ctx: &mut C, 4186 arg0: Type, 4187 arg1: &Cond, 4188 arg2: i16, 4189 arg3: Reg, 4190 ) -> Option<ConsumesFlags> { 4191 let pattern0_0 = arg0; 4192 let pattern1_0 = arg1; 4193 let pattern2_0 = arg2; 4194 let pattern3_0 = arg3; 4195 // Rule at src/isa/s390x/inst.isle line 2218. 4196 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4197 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4198 return Some(expr1_0); 4199 } 4200 4201 // Generated as internal constructor for term cmov_imm_regpair_lo. 4202 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4203 ctx: &mut C, 4204 arg0: Type, 4205 arg1: &ProducesFlags, 4206 arg2: &Cond, 4207 arg3: i16, 4208 arg4: &RegPair, 4209 ) -> Option<RegPair> { 4210 let pattern0_0 = arg0; 4211 let pattern1_0 = arg1; 4212 let pattern2_0 = arg2; 4213 let pattern3_0 = arg3; 4214 let pattern4_0 = arg4; 4215 // Rule at src/isa/s390x/inst.isle line 2225. 4216 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4217 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4218 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4219 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4220 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4221 return Some(expr4_0); 4222 } 4223 4224 // Generated as internal constructor for term cmov_imm_regpair_hi. 4225 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4226 ctx: &mut C, 4227 arg0: Type, 4228 arg1: &ProducesFlags, 4229 arg2: &Cond, 4230 arg3: i16, 4231 arg4: &RegPair, 4232 ) -> Option<RegPair> { 4233 let pattern0_0 = arg0; 4234 let pattern1_0 = arg1; 4235 let pattern2_0 = arg2; 4236 let pattern3_0 = arg3; 4237 let pattern4_0 = arg4; 4238 // Rule at src/isa/s390x/inst.isle line 2234. 4239 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4240 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4241 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4242 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4243 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4244 return Some(expr4_0); 4245 } 4246 4247 // Generated as internal constructor for term emit_cmov_reg. 4248 pub fn constructor_emit_cmov_reg<C: Context>( 4249 ctx: &mut C, 4250 arg0: Type, 4251 arg1: WritableReg, 4252 arg2: &Cond, 4253 arg3: Reg, 4254 ) -> Option<ConsumesFlags> { 4255 let pattern0_0 = arg0; 4256 if pattern0_0 == F32 { 4257 let pattern2_0 = arg1; 4258 let pattern3_0 = arg2; 4259 let pattern4_0 = arg3; 4260 // Rule at src/isa/s390x/inst.isle line 2248. 4261 let expr0_0 = MInst::FpuCMov32 { 4262 rd: pattern2_0, 4263 cond: pattern3_0.clone(), 4264 rm: pattern4_0, 4265 }; 4266 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4267 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4268 inst: expr0_0, 4269 result: expr1_0, 4270 }; 4271 return Some(expr2_0); 4272 } 4273 if pattern0_0 == F64 { 4274 let pattern2_0 = arg1; 4275 let pattern3_0 = arg2; 4276 let pattern4_0 = arg3; 4277 // Rule at src/isa/s390x/inst.isle line 2251. 4278 let expr0_0 = MInst::FpuCMov64 { 4279 rd: pattern2_0, 4280 cond: pattern3_0.clone(), 4281 rm: pattern4_0, 4282 }; 4283 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4284 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4285 inst: expr0_0, 4286 result: expr1_0, 4287 }; 4288 return Some(expr2_0); 4289 } 4290 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4291 let pattern2_0 = arg1; 4292 let pattern3_0 = arg2; 4293 let pattern4_0 = arg3; 4294 // Rule at src/isa/s390x/inst.isle line 2242. 4295 let expr0_0 = MInst::CMov32 { 4296 rd: pattern2_0, 4297 cond: pattern3_0.clone(), 4298 rm: pattern4_0, 4299 }; 4300 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4301 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4302 inst: expr0_0, 4303 result: expr1_0, 4304 }; 4305 return Some(expr2_0); 4306 } 4307 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4308 let pattern2_0 = arg1; 4309 let pattern3_0 = arg2; 4310 let pattern4_0 = arg3; 4311 // Rule at src/isa/s390x/inst.isle line 2245. 4312 let expr0_0 = MInst::CMov64 { 4313 rd: pattern2_0, 4314 cond: pattern3_0.clone(), 4315 rm: pattern4_0, 4316 }; 4317 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4318 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4319 inst: expr0_0, 4320 result: expr1_0, 4321 }; 4322 return Some(expr2_0); 4323 } 4324 return None; 4325 } 4326 4327 // Generated as internal constructor for term cmov_reg. 4328 pub fn constructor_cmov_reg<C: Context>( 4329 ctx: &mut C, 4330 arg0: Type, 4331 arg1: &Cond, 4332 arg2: Reg, 4333 arg3: Reg, 4334 ) -> Option<ConsumesFlags> { 4335 let pattern0_0 = arg0; 4336 let pattern1_0 = arg1; 4337 let pattern2_0 = arg2; 4338 let pattern3_0 = arg3; 4339 // Rule at src/isa/s390x/inst.isle line 2257. 4340 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4341 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4342 return Some(expr1_0); 4343 } 4344 4345 // Generated as internal constructor for term trap_if. 4346 pub fn constructor_trap_if<C: Context>( 4347 ctx: &mut C, 4348 arg0: &ProducesFlags, 4349 arg1: &Cond, 4350 arg2: &TrapCode, 4351 ) -> Option<Reg> { 4352 let pattern0_0 = arg0; 4353 match pattern0_0 { 4354 &ProducesFlags::ProducesFlagsSideEffect { 4355 inst: ref pattern1_0, 4356 } => { 4357 let pattern2_0 = arg1; 4358 let pattern3_0 = arg2; 4359 // Rule at src/isa/s390x/inst.isle line 2269. 4360 let expr0_0 = C::emit(ctx, pattern1_0); 4361 let expr1_0 = MInst::TrapIf { 4362 cond: pattern2_0.clone(), 4363 trap_code: pattern3_0.clone(), 4364 }; 4365 let expr2_0 = C::emit(ctx, &expr1_0); 4366 let expr3_0 = C::invalid_reg(ctx); 4367 return Some(expr3_0); 4368 } 4369 &ProducesFlags::ProducesFlagsReturnsReg { 4370 inst: ref pattern1_0, 4371 result: pattern1_1, 4372 } => { 4373 let pattern2_0 = arg1; 4374 let pattern3_0 = arg2; 4375 // Rule at src/isa/s390x/inst.isle line 2265. 4376 let expr0_0 = C::emit(ctx, pattern1_0); 4377 let expr1_0 = MInst::TrapIf { 4378 cond: pattern2_0.clone(), 4379 trap_code: pattern3_0.clone(), 4380 }; 4381 let expr2_0 = C::emit(ctx, &expr1_0); 4382 return Some(pattern1_1); 4383 } 4384 _ => {} 4385 } 4386 return None; 4387 } 4388 4389 // Generated as internal constructor for term icmps_reg_and_trap. 4390 pub fn constructor_icmps_reg_and_trap<C: Context>( 4391 ctx: &mut C, 4392 arg0: Type, 4393 arg1: Reg, 4394 arg2: Reg, 4395 arg3: &Cond, 4396 arg4: &TrapCode, 4397 ) -> Option<Reg> { 4398 let pattern0_0 = arg0; 4399 let pattern1_0 = arg1; 4400 let pattern2_0 = arg2; 4401 let pattern3_0 = arg3; 4402 let pattern4_0 = arg4; 4403 // Rule at src/isa/s390x/inst.isle line 2275. 4404 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4405 let expr1_0 = MInst::CmpTrapRR { 4406 op: expr0_0, 4407 rn: pattern1_0, 4408 rm: pattern2_0, 4409 cond: pattern3_0.clone(), 4410 trap_code: pattern4_0.clone(), 4411 }; 4412 let expr2_0 = C::emit(ctx, &expr1_0); 4413 let expr3_0 = C::invalid_reg(ctx); 4414 return Some(expr3_0); 4415 } 4416 4417 // Generated as internal constructor for term icmps_simm16_and_trap. 4418 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4419 ctx: &mut C, 4420 arg0: Type, 4421 arg1: Reg, 4422 arg2: i16, 4423 arg3: &Cond, 4424 arg4: &TrapCode, 4425 ) -> Option<Reg> { 4426 let pattern0_0 = arg0; 4427 let pattern1_0 = arg1; 4428 let pattern2_0 = arg2; 4429 let pattern3_0 = arg3; 4430 let pattern4_0 = arg4; 4431 // Rule at src/isa/s390x/inst.isle line 2281. 4432 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4433 let expr1_0 = MInst::CmpTrapRSImm16 { 4434 op: expr0_0, 4435 rn: pattern1_0, 4436 imm: pattern2_0, 4437 cond: pattern3_0.clone(), 4438 trap_code: pattern4_0.clone(), 4439 }; 4440 let expr2_0 = C::emit(ctx, &expr1_0); 4441 let expr3_0 = C::invalid_reg(ctx); 4442 return Some(expr3_0); 4443 } 4444 4445 // Generated as internal constructor for term icmpu_reg_and_trap. 4446 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4447 ctx: &mut C, 4448 arg0: Type, 4449 arg1: Reg, 4450 arg2: Reg, 4451 arg3: &Cond, 4452 arg4: &TrapCode, 4453 ) -> Option<Reg> { 4454 let pattern0_0 = arg0; 4455 let pattern1_0 = arg1; 4456 let pattern2_0 = arg2; 4457 let pattern3_0 = arg3; 4458 let pattern4_0 = arg4; 4459 // Rule at src/isa/s390x/inst.isle line 2287. 4460 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4461 let expr1_0 = MInst::CmpTrapRR { 4462 op: expr0_0, 4463 rn: pattern1_0, 4464 rm: pattern2_0, 4465 cond: pattern3_0.clone(), 4466 trap_code: pattern4_0.clone(), 4467 }; 4468 let expr2_0 = C::emit(ctx, &expr1_0); 4469 let expr3_0 = C::invalid_reg(ctx); 4470 return Some(expr3_0); 4471 } 4472 4473 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4474 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4475 ctx: &mut C, 4476 arg0: Type, 4477 arg1: Reg, 4478 arg2: u16, 4479 arg3: &Cond, 4480 arg4: &TrapCode, 4481 ) -> Option<Reg> { 4482 let pattern0_0 = arg0; 4483 let pattern1_0 = arg1; 4484 let pattern2_0 = arg2; 4485 let pattern3_0 = arg3; 4486 let pattern4_0 = arg4; 4487 // Rule at src/isa/s390x/inst.isle line 2293. 4488 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4489 let expr1_0 = MInst::CmpTrapRUImm16 { 4490 op: expr0_0, 4491 rn: pattern1_0, 4492 imm: pattern2_0, 4493 cond: pattern3_0.clone(), 4494 trap_code: pattern4_0.clone(), 4495 }; 4496 let expr2_0 = C::emit(ctx, &expr1_0); 4497 let expr3_0 = C::invalid_reg(ctx); 4498 return Some(expr3_0); 4499 } 4500 4501 // Generated as internal constructor for term trap_impl. 4502 pub fn constructor_trap_impl<C: Context>( 4503 ctx: &mut C, 4504 arg0: &TrapCode, 4505 ) -> Option<SideEffectNoResult> { 4506 let pattern0_0 = arg0; 4507 // Rule at src/isa/s390x/inst.isle line 2299. 4508 let expr0_0 = MInst::Trap { 4509 trap_code: pattern0_0.clone(), 4510 }; 4511 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4512 return Some(expr1_0); 4513 } 4514 4515 // Generated as internal constructor for term trap_if_impl. 4516 pub fn constructor_trap_if_impl<C: Context>( 4517 ctx: &mut C, 4518 arg0: &Cond, 4519 arg1: &TrapCode, 4520 ) -> Option<SideEffectNoResult> { 4521 let pattern0_0 = arg0; 4522 let pattern1_0 = arg1; 4523 // Rule at src/isa/s390x/inst.isle line 2303. 4524 let expr0_0 = MInst::TrapIf { 4525 cond: pattern0_0.clone(), 4526 trap_code: pattern1_0.clone(), 4527 }; 4528 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4529 return Some(expr1_0); 4530 } 4531 4532 // Generated as internal constructor for term debugtrap_impl. 4533 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4534 // Rule at src/isa/s390x/inst.isle line 2307. 4535 let expr0_0 = MInst::Debugtrap; 4536 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4537 return Some(expr1_0); 4538 } 4539 4540 // Generated as internal constructor for term bool. 4541 pub fn constructor_bool<C: Context>( 4542 ctx: &mut C, 4543 arg0: &ProducesFlags, 4544 arg1: &Cond, 4545 ) -> Option<ProducesBool> { 4546 let pattern0_0 = arg0; 4547 let pattern1_0 = arg1; 4548 // Rule at src/isa/s390x/inst.isle line 2318. 4549 let expr0_0 = ProducesBool::ProducesBool { 4550 producer: pattern0_0.clone(), 4551 cond: pattern1_0.clone(), 4552 }; 4553 return Some(expr0_0); 4554 } 4555 4556 // Generated as internal constructor for term invert_bool. 4557 pub fn constructor_invert_bool<C: Context>( 4558 ctx: &mut C, 4559 arg0: &ProducesBool, 4560 ) -> Option<ProducesBool> { 4561 let pattern0_0 = arg0; 4562 if let &ProducesBool::ProducesBool { 4563 producer: ref pattern1_0, 4564 cond: ref pattern1_1, 4565 } = pattern0_0 4566 { 4567 // Rule at src/isa/s390x/inst.isle line 2322. 4568 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4569 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4570 return Some(expr1_0); 4571 } 4572 return None; 4573 } 4574 4575 // Generated as internal constructor for term emit_producer. 4576 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4577 let pattern0_0 = arg0; 4578 if let &ProducesFlags::ProducesFlagsSideEffect { 4579 inst: ref pattern1_0, 4580 } = pattern0_0 4581 { 4582 // Rule at src/isa/s390x/inst.isle line 2331. 4583 let expr0_0 = C::emit(ctx, pattern1_0); 4584 return Some(expr0_0); 4585 } 4586 return None; 4587 } 4588 4589 // Generated as internal constructor for term emit_consumer. 4590 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4591 let pattern0_0 = arg0; 4592 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4593 inst: ref pattern1_0, 4594 result: pattern1_1, 4595 } = pattern0_0 4596 { 4597 // Rule at src/isa/s390x/inst.isle line 2333. 4598 let expr0_0 = C::emit(ctx, pattern1_0); 4599 return Some(expr0_0); 4600 } 4601 return None; 4602 } 4603 4604 // Generated as internal constructor for term select_bool_reg. 4605 pub fn constructor_select_bool_reg<C: Context>( 4606 ctx: &mut C, 4607 arg0: Type, 4608 arg1: &ProducesBool, 4609 arg2: Reg, 4610 arg3: Reg, 4611 ) -> Option<Reg> { 4612 let pattern0_0 = arg0; 4613 let pattern1_0 = arg1; 4614 if let &ProducesBool::ProducesBool { 4615 producer: ref pattern2_0, 4616 cond: ref pattern2_1, 4617 } = pattern1_0 4618 { 4619 let pattern3_0 = arg2; 4620 let pattern4_0 = arg3; 4621 // Rule at src/isa/s390x/inst.isle line 2337. 4622 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4623 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4624 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4625 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4626 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4627 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4628 return Some(expr5_0); 4629 } 4630 return None; 4631 } 4632 4633 // Generated as internal constructor for term select_bool_imm. 4634 pub fn constructor_select_bool_imm<C: Context>( 4635 ctx: &mut C, 4636 arg0: Type, 4637 arg1: &ProducesBool, 4638 arg2: i16, 4639 arg3: u64, 4640 ) -> Option<Reg> { 4641 let pattern0_0 = arg0; 4642 let pattern1_0 = arg1; 4643 if let &ProducesBool::ProducesBool { 4644 producer: ref pattern2_0, 4645 cond: ref pattern2_1, 4646 } = pattern1_0 4647 { 4648 let pattern3_0 = arg2; 4649 let pattern4_0 = arg3; 4650 // Rule at src/isa/s390x/inst.isle line 2346. 4651 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4652 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4653 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4654 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4655 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4656 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4657 return Some(expr5_0); 4658 } 4659 return None; 4660 } 4661 4662 // Generated as internal constructor for term lower_bool. 4663 pub fn constructor_lower_bool<C: Context>( 4664 ctx: &mut C, 4665 arg0: Type, 4666 arg1: &ProducesBool, 4667 ) -> Option<Reg> { 4668 let pattern0_0 = arg0; 4669 if pattern0_0 == B1 { 4670 let pattern2_0 = arg1; 4671 // Rule at src/isa/s390x/inst.isle line 2356. 4672 let expr0_0: Type = B1; 4673 let expr1_0: i16 = 1; 4674 let expr2_0: u64 = 0; 4675 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4676 return Some(expr3_0); 4677 } 4678 if pattern0_0 == B8 { 4679 let pattern2_0 = arg1; 4680 // Rule at src/isa/s390x/inst.isle line 2357. 4681 let expr0_0: Type = B8; 4682 let expr1_0: i16 = -1; 4683 let expr2_0: u64 = 0; 4684 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4685 return Some(expr3_0); 4686 } 4687 if pattern0_0 == B16 { 4688 let pattern2_0 = arg1; 4689 // Rule at src/isa/s390x/inst.isle line 2358. 4690 let expr0_0: Type = B16; 4691 let expr1_0: i16 = -1; 4692 let expr2_0: u64 = 0; 4693 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4694 return Some(expr3_0); 4695 } 4696 if pattern0_0 == B32 { 4697 let pattern2_0 = arg1; 4698 // Rule at src/isa/s390x/inst.isle line 2359. 4699 let expr0_0: Type = B32; 4700 let expr1_0: i16 = -1; 4701 let expr2_0: u64 = 0; 4702 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4703 return Some(expr3_0); 4704 } 4705 if pattern0_0 == B64 { 4706 let pattern2_0 = arg1; 4707 // Rule at src/isa/s390x/inst.isle line 2360. 4708 let expr0_0: Type = B64; 4709 let expr1_0: i16 = -1; 4710 let expr2_0: u64 = 0; 4711 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4712 return Some(expr3_0); 4713 } 4714 return None; 4715 } 4716 4717 // Generated as internal constructor for term cond_br_bool. 4718 pub fn constructor_cond_br_bool<C: Context>( 4719 ctx: &mut C, 4720 arg0: &ProducesBool, 4721 arg1: MachLabel, 4722 arg2: MachLabel, 4723 ) -> Option<SideEffectNoResult> { 4724 let pattern0_0 = arg0; 4725 if let &ProducesBool::ProducesBool { 4726 producer: ref pattern1_0, 4727 cond: ref pattern1_1, 4728 } = pattern0_0 4729 { 4730 let pattern2_0 = arg1; 4731 let pattern3_0 = arg2; 4732 // Rule at src/isa/s390x/inst.isle line 2364. 4733 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4734 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4735 return Some(expr1_0); 4736 } 4737 return None; 4738 } 4739 4740 // Generated as internal constructor for term oneway_cond_br_bool. 4741 pub fn constructor_oneway_cond_br_bool<C: Context>( 4742 ctx: &mut C, 4743 arg0: &ProducesBool, 4744 arg1: MachLabel, 4745 ) -> Option<SideEffectNoResult> { 4746 let pattern0_0 = arg0; 4747 if let &ProducesBool::ProducesBool { 4748 producer: ref pattern1_0, 4749 cond: ref pattern1_1, 4750 } = pattern0_0 4751 { 4752 let pattern2_0 = arg1; 4753 // Rule at src/isa/s390x/inst.isle line 2370. 4754 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4755 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4756 return Some(expr1_0); 4757 } 4758 return None; 4759 } 4760 4761 // Generated as internal constructor for term trap_if_bool. 4762 pub fn constructor_trap_if_bool<C: Context>( 4763 ctx: &mut C, 4764 arg0: &ProducesBool, 4765 arg1: &TrapCode, 4766 ) -> Option<SideEffectNoResult> { 4767 let pattern0_0 = arg0; 4768 if let &ProducesBool::ProducesBool { 4769 producer: ref pattern1_0, 4770 cond: ref pattern1_1, 4771 } = pattern0_0 4772 { 4773 let pattern2_0 = arg1; 4774 // Rule at src/isa/s390x/inst.isle line 2376. 4775 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4776 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4777 return Some(expr1_0); 4778 } 4779 return None; 4780 } 4781 4782 // Generated as internal constructor for term casloop_val_reg. 4783 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4784 // Rule at src/isa/s390x/inst.isle line 2390. 4785 let expr0_0: u8 = 0; 4786 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4787 return Some(expr1_0); 4788 } 4789 4790 // Generated as internal constructor for term casloop_tmp_reg. 4791 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4792 // Rule at src/isa/s390x/inst.isle line 2394. 4793 let expr0_0: u8 = 1; 4794 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4795 return Some(expr1_0); 4796 } 4797 4798 // Generated as internal constructor for term casloop_emit. 4799 pub fn constructor_casloop_emit<C: Context>( 4800 ctx: &mut C, 4801 arg0: &VecMInstBuilder, 4802 arg1: Type, 4803 arg2: MemFlags, 4804 arg3: Reg, 4805 arg4: Reg, 4806 ) -> Option<Reg> { 4807 let pattern0_0 = arg0; 4808 let pattern1_0 = arg1; 4809 let pattern2_0 = arg2; 4810 let pattern3_0 = arg3; 4811 let pattern4_0 = arg4; 4812 // Rule at src/isa/s390x/inst.isle line 2403. 4813 let expr0_0: i64 = 0; 4814 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4815 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4816 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4817 let expr4_0 = 4818 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4819 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4820 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4821 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4822 let expr8_0 = IntCC::NotEqual; 4823 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4824 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4825 return Some(expr4_0); 4826 } 4827 4828 // Generated as internal constructor for term casloop_result. 4829 pub fn constructor_casloop_result<C: Context>( 4830 ctx: &mut C, 4831 arg0: Type, 4832 arg1: MemFlags, 4833 arg2: Reg, 4834 ) -> Option<Reg> { 4835 let pattern0_0 = arg0; 4836 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4837 let pattern2_0 = arg1; 4838 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4839 let pattern4_0 = arg2; 4840 // Rule at src/isa/s390x/inst.isle line 2421. 4841 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4842 return Some(expr0_0); 4843 } 4844 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4845 let pattern4_0 = arg2; 4846 // Rule at src/isa/s390x/inst.isle line 2419. 4847 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4848 return Some(expr0_0); 4849 } 4850 } 4851 return None; 4852 } 4853 4854 // Generated as internal constructor for term casloop. 4855 pub fn constructor_casloop<C: Context>( 4856 ctx: &mut C, 4857 arg0: &VecMInstBuilder, 4858 arg1: Type, 4859 arg2: MemFlags, 4860 arg3: Reg, 4861 arg4: Reg, 4862 ) -> Option<Reg> { 4863 let pattern0_0 = arg0; 4864 let pattern1_0 = arg1; 4865 let pattern2_0 = arg2; 4866 let pattern3_0 = arg3; 4867 let pattern4_0 = arg4; 4868 // Rule at src/isa/s390x/inst.isle line 2426. 4869 let expr0_0 = constructor_casloop_emit( 4870 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4871 )?; 4872 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4873 return Some(expr1_0); 4874 } 4875 4876 // Generated as internal constructor for term casloop_bitshift. 4877 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4878 let pattern0_0 = arg0; 4879 // Rule at src/isa/s390x/inst.isle line 2441. 4880 let expr0_0: Type = I32; 4881 let expr1_0: u8 = 3; 4882 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4883 return Some(expr2_0); 4884 } 4885 4886 // Generated as internal constructor for term casloop_aligned_addr. 4887 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4888 let pattern0_0 = arg0; 4889 // Rule at src/isa/s390x/inst.isle line 2446. 4890 let expr0_0: Type = I64; 4891 let expr1_0: u16 = 65532; 4892 let expr2_0: u8 = 0; 4893 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4894 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4895 return Some(expr4_0); 4896 } 4897 4898 // Generated as internal constructor for term casloop_rotate_in. 4899 pub fn constructor_casloop_rotate_in<C: Context>( 4900 ctx: &mut C, 4901 arg0: &VecMInstBuilder, 4902 arg1: Type, 4903 arg2: MemFlags, 4904 arg3: Reg, 4905 arg4: Reg, 4906 ) -> Option<Reg> { 4907 let pattern0_0 = arg0; 4908 let pattern1_0 = arg1; 4909 if pattern1_0 == I8 { 4910 let pattern3_0 = arg2; 4911 let pattern4_0 = arg3; 4912 let pattern5_0 = arg4; 4913 // Rule at src/isa/s390x/inst.isle line 2456. 4914 let expr0_0: Type = I32; 4915 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4916 let expr2_0: u8 = 0; 4917 let expr3_0 = constructor_push_rot_imm_reg( 4918 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 4919 )?; 4920 return Some(expr3_0); 4921 } 4922 if pattern1_0 == I16 { 4923 let pattern3_0 = arg2; 4924 if let Some(()) = C::littleendian(ctx, pattern3_0) { 4925 let pattern5_0 = arg3; 4926 let pattern6_0 = arg4; 4927 // Rule at src/isa/s390x/inst.isle line 2460. 4928 let expr0_0: Type = I32; 4929 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4930 let expr2_0: u8 = 16; 4931 let expr3_0 = constructor_push_rot_imm_reg( 4932 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4933 )?; 4934 return Some(expr3_0); 4935 } 4936 if let Some(()) = C::bigendian(ctx, pattern3_0) { 4937 let pattern5_0 = arg3; 4938 let pattern6_0 = arg4; 4939 // Rule at src/isa/s390x/inst.isle line 2458. 4940 let expr0_0: Type = I32; 4941 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4942 let expr2_0: u8 = 0; 4943 let expr3_0 = constructor_push_rot_imm_reg( 4944 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4945 )?; 4946 return Some(expr3_0); 4947 } 4948 } 4949 return None; 4950 } 4951 4952 // Generated as internal constructor for term casloop_rotate_out. 4953 pub fn constructor_casloop_rotate_out<C: Context>( 4954 ctx: &mut C, 4955 arg0: &VecMInstBuilder, 4956 arg1: Type, 4957 arg2: MemFlags, 4958 arg3: Reg, 4959 arg4: Reg, 4960 ) -> Option<Reg> { 4961 let pattern0_0 = arg0; 4962 let pattern1_0 = arg1; 4963 if pattern1_0 == I8 { 4964 let pattern3_0 = arg2; 4965 let pattern4_0 = arg3; 4966 let pattern5_0 = arg4; 4967 // Rule at src/isa/s390x/inst.isle line 2469. 4968 let expr0_0: Type = I32; 4969 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4970 let expr2_0: u8 = 0; 4971 let expr3_0: Type = I32; 4972 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 4973 let expr5_0 = constructor_push_rot_imm_reg( 4974 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 4975 )?; 4976 return Some(expr5_0); 4977 } 4978 if pattern1_0 == I16 { 4979 let pattern3_0 = arg2; 4980 if let Some(()) = C::littleendian(ctx, pattern3_0) { 4981 let pattern5_0 = arg3; 4982 let pattern6_0 = arg4; 4983 // Rule at src/isa/s390x/inst.isle line 2473. 4984 let expr0_0: Type = I32; 4985 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4986 let expr2_0: u8 = 16; 4987 let expr3_0 = constructor_push_rot_imm_reg( 4988 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4989 )?; 4990 return Some(expr3_0); 4991 } 4992 if let Some(()) = C::bigendian(ctx, pattern3_0) { 4993 let pattern5_0 = arg3; 4994 let pattern6_0 = arg4; 4995 // Rule at src/isa/s390x/inst.isle line 2471. 4996 let expr0_0: Type = I32; 4997 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4998 let expr2_0: u8 = 0; 4999 let expr3_0 = constructor_push_rot_imm_reg( 5000 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5001 )?; 5002 return Some(expr3_0); 5003 } 5004 } 5005 return None; 5006 } 5007 5008 // Generated as internal constructor for term casloop_rotate_result. 5009 pub fn constructor_casloop_rotate_result<C: Context>( 5010 ctx: &mut C, 5011 arg0: Type, 5012 arg1: MemFlags, 5013 arg2: Reg, 5014 arg3: Reg, 5015 ) -> Option<Reg> { 5016 let pattern0_0 = arg0; 5017 if pattern0_0 == I8 { 5018 let pattern2_0 = arg1; 5019 let pattern3_0 = arg2; 5020 let pattern4_0 = arg3; 5021 // Rule at src/isa/s390x/inst.isle line 2484. 5022 let expr0_0: Type = I32; 5023 let expr1_0: u8 = 8; 5024 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5025 return Some(expr2_0); 5026 } 5027 if pattern0_0 == I16 { 5028 let pattern2_0 = arg1; 5029 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5030 let pattern4_0 = arg2; 5031 let pattern5_0 = arg3; 5032 // Rule at src/isa/s390x/inst.isle line 2488. 5033 let expr0_0: Type = I32; 5034 let expr1_0: Type = I32; 5035 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5036 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5037 return Some(expr3_0); 5038 } 5039 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5040 let pattern4_0 = arg2; 5041 let pattern5_0 = arg3; 5042 // Rule at src/isa/s390x/inst.isle line 2486. 5043 let expr0_0: Type = I32; 5044 let expr1_0: u8 = 16; 5045 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5046 return Some(expr2_0); 5047 } 5048 } 5049 return None; 5050 } 5051 5052 // Generated as internal constructor for term casloop_subword. 5053 pub fn constructor_casloop_subword<C: Context>( 5054 ctx: &mut C, 5055 arg0: &VecMInstBuilder, 5056 arg1: Type, 5057 arg2: MemFlags, 5058 arg3: Reg, 5059 arg4: Reg, 5060 arg5: Reg, 5061 ) -> Option<Reg> { 5062 let pattern0_0 = arg0; 5063 let pattern1_0 = arg1; 5064 let pattern2_0 = arg2; 5065 let pattern3_0 = arg3; 5066 let pattern4_0 = arg4; 5067 let pattern5_0 = arg5; 5068 // Rule at src/isa/s390x/inst.isle line 2493. 5069 let expr0_0 = constructor_casloop_emit( 5070 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5071 )?; 5072 let expr1_0 = 5073 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5074 return Some(expr1_0); 5075 } 5076 5077 // Generated as internal constructor for term clz_reg. 5078 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5079 let pattern0_0 = arg0; 5080 if pattern0_0 == 64 { 5081 let pattern2_0 = arg1; 5082 // Rule at src/isa/s390x/inst.isle line 2504. 5083 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5084 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5085 let expr2_0 = C::emit(ctx, &expr1_0); 5086 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5087 return Some(expr3_0); 5088 } 5089 let pattern1_0 = arg1; 5090 // Rule at src/isa/s390x/inst.isle line 2513. 5091 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5092 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5093 let expr2_0 = C::emit(ctx, &expr1_0); 5094 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5095 let expr4_0 = IntCC::Equal; 5096 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5097 let expr6_0 = MInst::CMov64SImm16 { 5098 rd: expr3_0, 5099 cond: expr5_0, 5100 imm: pattern0_0, 5101 }; 5102 let expr7_0 = C::emit(ctx, &expr6_0); 5103 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5104 return Some(expr8_0); 5105 } 5106 5107 // Generated as internal constructor for term aluop_add. 5108 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5109 let pattern0_0 = arg0; 5110 if pattern0_0 == I8 { 5111 // Rule at src/isa/s390x/inst.isle line 2524. 5112 let expr0_0 = ALUOp::Add32; 5113 return Some(expr0_0); 5114 } 5115 if pattern0_0 == I16 { 5116 // Rule at src/isa/s390x/inst.isle line 2525. 5117 let expr0_0 = ALUOp::Add32; 5118 return Some(expr0_0); 5119 } 5120 if pattern0_0 == I32 { 5121 // Rule at src/isa/s390x/inst.isle line 2526. 5122 let expr0_0 = ALUOp::Add32; 5123 return Some(expr0_0); 5124 } 5125 if pattern0_0 == I64 { 5126 // Rule at src/isa/s390x/inst.isle line 2527. 5127 let expr0_0 = ALUOp::Add64; 5128 return Some(expr0_0); 5129 } 5130 return None; 5131 } 5132 5133 // Generated as internal constructor for term aluop_add_sext16. 5134 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5135 let pattern0_0 = arg0; 5136 if pattern0_0 == I16 { 5137 // Rule at src/isa/s390x/inst.isle line 2530. 5138 let expr0_0 = ALUOp::Add32Ext16; 5139 return Some(expr0_0); 5140 } 5141 if pattern0_0 == I32 { 5142 // Rule at src/isa/s390x/inst.isle line 2531. 5143 let expr0_0 = ALUOp::Add32Ext16; 5144 return Some(expr0_0); 5145 } 5146 if pattern0_0 == I64 { 5147 // Rule at src/isa/s390x/inst.isle line 2532. 5148 let expr0_0 = ALUOp::Add64Ext16; 5149 return Some(expr0_0); 5150 } 5151 return None; 5152 } 5153 5154 // Generated as internal constructor for term aluop_add_sext32. 5155 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5156 let pattern0_0 = arg0; 5157 if pattern0_0 == I64 { 5158 // Rule at src/isa/s390x/inst.isle line 2535. 5159 let expr0_0 = ALUOp::Add64Ext32; 5160 return Some(expr0_0); 5161 } 5162 return None; 5163 } 5164 5165 // Generated as internal constructor for term add_reg. 5166 pub fn constructor_add_reg<C: Context>( 5167 ctx: &mut C, 5168 arg0: Type, 5169 arg1: Reg, 5170 arg2: Reg, 5171 ) -> Option<Reg> { 5172 let pattern0_0 = arg0; 5173 let pattern1_0 = arg1; 5174 let pattern2_0 = arg2; 5175 // Rule at src/isa/s390x/inst.isle line 2538. 5176 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5177 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5178 return Some(expr1_0); 5179 } 5180 5181 // Generated as internal constructor for term add_reg_sext32. 5182 pub fn constructor_add_reg_sext32<C: Context>( 5183 ctx: &mut C, 5184 arg0: Type, 5185 arg1: Reg, 5186 arg2: Reg, 5187 ) -> Option<Reg> { 5188 let pattern0_0 = arg0; 5189 let pattern1_0 = arg1; 5190 let pattern2_0 = arg2; 5191 // Rule at src/isa/s390x/inst.isle line 2541. 5192 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5193 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5194 return Some(expr1_0); 5195 } 5196 5197 // Generated as internal constructor for term add_simm16. 5198 pub fn constructor_add_simm16<C: Context>( 5199 ctx: &mut C, 5200 arg0: Type, 5201 arg1: Reg, 5202 arg2: i16, 5203 ) -> Option<Reg> { 5204 let pattern0_0 = arg0; 5205 let pattern1_0 = arg1; 5206 let pattern2_0 = arg2; 5207 // Rule at src/isa/s390x/inst.isle line 2544. 5208 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5209 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5210 return Some(expr1_0); 5211 } 5212 5213 // Generated as internal constructor for term add_simm32. 5214 pub fn constructor_add_simm32<C: Context>( 5215 ctx: &mut C, 5216 arg0: Type, 5217 arg1: Reg, 5218 arg2: i32, 5219 ) -> Option<Reg> { 5220 let pattern0_0 = arg0; 5221 let pattern1_0 = arg1; 5222 let pattern2_0 = arg2; 5223 // Rule at src/isa/s390x/inst.isle line 2547. 5224 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5225 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5226 return Some(expr1_0); 5227 } 5228 5229 // Generated as internal constructor for term add_mem. 5230 pub fn constructor_add_mem<C: Context>( 5231 ctx: &mut C, 5232 arg0: Type, 5233 arg1: Reg, 5234 arg2: &MemArg, 5235 ) -> Option<Reg> { 5236 let pattern0_0 = arg0; 5237 let pattern1_0 = arg1; 5238 let pattern2_0 = arg2; 5239 // Rule at src/isa/s390x/inst.isle line 2550. 5240 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5241 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5242 return Some(expr1_0); 5243 } 5244 5245 // Generated as internal constructor for term add_mem_sext16. 5246 pub fn constructor_add_mem_sext16<C: Context>( 5247 ctx: &mut C, 5248 arg0: Type, 5249 arg1: Reg, 5250 arg2: &MemArg, 5251 ) -> Option<Reg> { 5252 let pattern0_0 = arg0; 5253 let pattern1_0 = arg1; 5254 let pattern2_0 = arg2; 5255 // Rule at src/isa/s390x/inst.isle line 2553. 5256 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5257 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5258 return Some(expr1_0); 5259 } 5260 5261 // Generated as internal constructor for term add_mem_sext32. 5262 pub fn constructor_add_mem_sext32<C: Context>( 5263 ctx: &mut C, 5264 arg0: Type, 5265 arg1: Reg, 5266 arg2: &MemArg, 5267 ) -> Option<Reg> { 5268 let pattern0_0 = arg0; 5269 let pattern1_0 = arg1; 5270 let pattern2_0 = arg2; 5271 // Rule at src/isa/s390x/inst.isle line 2556. 5272 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5273 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5274 return Some(expr1_0); 5275 } 5276 5277 // Generated as internal constructor for term aluop_add_logical. 5278 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5279 let pattern0_0 = arg0; 5280 if pattern0_0 == I32 { 5281 // Rule at src/isa/s390x/inst.isle line 2562. 5282 let expr0_0 = ALUOp::AddLogical32; 5283 return Some(expr0_0); 5284 } 5285 if pattern0_0 == I64 { 5286 // Rule at src/isa/s390x/inst.isle line 2563. 5287 let expr0_0 = ALUOp::AddLogical64; 5288 return Some(expr0_0); 5289 } 5290 return None; 5291 } 5292 5293 // Generated as internal constructor for term aluop_add_logical_zext32. 5294 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5295 let pattern0_0 = arg0; 5296 if pattern0_0 == I64 { 5297 // Rule at src/isa/s390x/inst.isle line 2566. 5298 let expr0_0 = ALUOp::AddLogical64Ext32; 5299 return Some(expr0_0); 5300 } 5301 return None; 5302 } 5303 5304 // Generated as internal constructor for term add_logical_reg. 5305 pub fn constructor_add_logical_reg<C: Context>( 5306 ctx: &mut C, 5307 arg0: Type, 5308 arg1: Reg, 5309 arg2: Reg, 5310 ) -> Option<Reg> { 5311 let pattern0_0 = arg0; 5312 let pattern1_0 = arg1; 5313 let pattern2_0 = arg2; 5314 // Rule at src/isa/s390x/inst.isle line 2569. 5315 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5316 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5317 return Some(expr1_0); 5318 } 5319 5320 // Generated as internal constructor for term add_logical_reg_zext32. 5321 pub fn constructor_add_logical_reg_zext32<C: Context>( 5322 ctx: &mut C, 5323 arg0: Type, 5324 arg1: Reg, 5325 arg2: Reg, 5326 ) -> Option<Reg> { 5327 let pattern0_0 = arg0; 5328 let pattern1_0 = arg1; 5329 let pattern2_0 = arg2; 5330 // Rule at src/isa/s390x/inst.isle line 2572. 5331 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5332 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5333 return Some(expr1_0); 5334 } 5335 5336 // Generated as internal constructor for term add_logical_zimm32. 5337 pub fn constructor_add_logical_zimm32<C: Context>( 5338 ctx: &mut C, 5339 arg0: Type, 5340 arg1: Reg, 5341 arg2: u32, 5342 ) -> Option<Reg> { 5343 let pattern0_0 = arg0; 5344 let pattern1_0 = arg1; 5345 let pattern2_0 = arg2; 5346 // Rule at src/isa/s390x/inst.isle line 2575. 5347 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5348 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5349 return Some(expr1_0); 5350 } 5351 5352 // Generated as internal constructor for term add_logical_mem. 5353 pub fn constructor_add_logical_mem<C: Context>( 5354 ctx: &mut C, 5355 arg0: Type, 5356 arg1: Reg, 5357 arg2: &MemArg, 5358 ) -> Option<Reg> { 5359 let pattern0_0 = arg0; 5360 let pattern1_0 = arg1; 5361 let pattern2_0 = arg2; 5362 // Rule at src/isa/s390x/inst.isle line 2578. 5363 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5364 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5365 return Some(expr1_0); 5366 } 5367 5368 // Generated as internal constructor for term add_logical_mem_zext32. 5369 pub fn constructor_add_logical_mem_zext32<C: Context>( 5370 ctx: &mut C, 5371 arg0: Type, 5372 arg1: Reg, 5373 arg2: &MemArg, 5374 ) -> Option<Reg> { 5375 let pattern0_0 = arg0; 5376 let pattern1_0 = arg1; 5377 let pattern2_0 = arg2; 5378 // Rule at src/isa/s390x/inst.isle line 2581. 5379 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5380 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5381 return Some(expr1_0); 5382 } 5383 5384 // Generated as internal constructor for term aluop_sub. 5385 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5386 let pattern0_0 = arg0; 5387 if pattern0_0 == I8 { 5388 // Rule at src/isa/s390x/inst.isle line 2587. 5389 let expr0_0 = ALUOp::Sub32; 5390 return Some(expr0_0); 5391 } 5392 if pattern0_0 == I16 { 5393 // Rule at src/isa/s390x/inst.isle line 2588. 5394 let expr0_0 = ALUOp::Sub32; 5395 return Some(expr0_0); 5396 } 5397 if pattern0_0 == I32 { 5398 // Rule at src/isa/s390x/inst.isle line 2589. 5399 let expr0_0 = ALUOp::Sub32; 5400 return Some(expr0_0); 5401 } 5402 if pattern0_0 == I64 { 5403 // Rule at src/isa/s390x/inst.isle line 2590. 5404 let expr0_0 = ALUOp::Sub64; 5405 return Some(expr0_0); 5406 } 5407 return None; 5408 } 5409 5410 // Generated as internal constructor for term aluop_sub_sext16. 5411 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5412 let pattern0_0 = arg0; 5413 if pattern0_0 == I16 { 5414 // Rule at src/isa/s390x/inst.isle line 2593. 5415 let expr0_0 = ALUOp::Sub32Ext16; 5416 return Some(expr0_0); 5417 } 5418 if pattern0_0 == I32 { 5419 // Rule at src/isa/s390x/inst.isle line 2594. 5420 let expr0_0 = ALUOp::Sub32Ext16; 5421 return Some(expr0_0); 5422 } 5423 if pattern0_0 == I64 { 5424 // Rule at src/isa/s390x/inst.isle line 2595. 5425 let expr0_0 = ALUOp::Sub64Ext16; 5426 return Some(expr0_0); 5427 } 5428 return None; 5429 } 5430 5431 // Generated as internal constructor for term aluop_sub_sext32. 5432 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5433 let pattern0_0 = arg0; 5434 if pattern0_0 == I64 { 5435 // Rule at src/isa/s390x/inst.isle line 2598. 5436 let expr0_0 = ALUOp::Sub64Ext32; 5437 return Some(expr0_0); 5438 } 5439 return None; 5440 } 5441 5442 // Generated as internal constructor for term sub_reg. 5443 pub fn constructor_sub_reg<C: Context>( 5444 ctx: &mut C, 5445 arg0: Type, 5446 arg1: Reg, 5447 arg2: Reg, 5448 ) -> Option<Reg> { 5449 let pattern0_0 = arg0; 5450 let pattern1_0 = arg1; 5451 let pattern2_0 = arg2; 5452 // Rule at src/isa/s390x/inst.isle line 2601. 5453 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5454 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5455 return Some(expr1_0); 5456 } 5457 5458 // Generated as internal constructor for term sub_reg_sext32. 5459 pub fn constructor_sub_reg_sext32<C: Context>( 5460 ctx: &mut C, 5461 arg0: Type, 5462 arg1: Reg, 5463 arg2: Reg, 5464 ) -> Option<Reg> { 5465 let pattern0_0 = arg0; 5466 let pattern1_0 = arg1; 5467 let pattern2_0 = arg2; 5468 // Rule at src/isa/s390x/inst.isle line 2604. 5469 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5470 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5471 return Some(expr1_0); 5472 } 5473 5474 // Generated as internal constructor for term sub_mem. 5475 pub fn constructor_sub_mem<C: Context>( 5476 ctx: &mut C, 5477 arg0: Type, 5478 arg1: Reg, 5479 arg2: &MemArg, 5480 ) -> Option<Reg> { 5481 let pattern0_0 = arg0; 5482 let pattern1_0 = arg1; 5483 let pattern2_0 = arg2; 5484 // Rule at src/isa/s390x/inst.isle line 2607. 5485 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5486 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5487 return Some(expr1_0); 5488 } 5489 5490 // Generated as internal constructor for term sub_mem_sext16. 5491 pub fn constructor_sub_mem_sext16<C: Context>( 5492 ctx: &mut C, 5493 arg0: Type, 5494 arg1: Reg, 5495 arg2: &MemArg, 5496 ) -> Option<Reg> { 5497 let pattern0_0 = arg0; 5498 let pattern1_0 = arg1; 5499 let pattern2_0 = arg2; 5500 // Rule at src/isa/s390x/inst.isle line 2610. 5501 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5502 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5503 return Some(expr1_0); 5504 } 5505 5506 // Generated as internal constructor for term sub_mem_sext32. 5507 pub fn constructor_sub_mem_sext32<C: Context>( 5508 ctx: &mut C, 5509 arg0: Type, 5510 arg1: Reg, 5511 arg2: &MemArg, 5512 ) -> Option<Reg> { 5513 let pattern0_0 = arg0; 5514 let pattern1_0 = arg1; 5515 let pattern2_0 = arg2; 5516 // Rule at src/isa/s390x/inst.isle line 2613. 5517 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5518 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5519 return Some(expr1_0); 5520 } 5521 5522 // Generated as internal constructor for term aluop_sub_logical. 5523 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5524 let pattern0_0 = arg0; 5525 if pattern0_0 == I32 { 5526 // Rule at src/isa/s390x/inst.isle line 2619. 5527 let expr0_0 = ALUOp::SubLogical32; 5528 return Some(expr0_0); 5529 } 5530 if pattern0_0 == I64 { 5531 // Rule at src/isa/s390x/inst.isle line 2620. 5532 let expr0_0 = ALUOp::SubLogical64; 5533 return Some(expr0_0); 5534 } 5535 return None; 5536 } 5537 5538 // Generated as internal constructor for term aluop_sub_logical_zext32. 5539 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5540 let pattern0_0 = arg0; 5541 if pattern0_0 == I64 { 5542 // Rule at src/isa/s390x/inst.isle line 2623. 5543 let expr0_0 = ALUOp::SubLogical64Ext32; 5544 return Some(expr0_0); 5545 } 5546 return None; 5547 } 5548 5549 // Generated as internal constructor for term sub_logical_reg. 5550 pub fn constructor_sub_logical_reg<C: Context>( 5551 ctx: &mut C, 5552 arg0: Type, 5553 arg1: Reg, 5554 arg2: Reg, 5555 ) -> Option<Reg> { 5556 let pattern0_0 = arg0; 5557 let pattern1_0 = arg1; 5558 let pattern2_0 = arg2; 5559 // Rule at src/isa/s390x/inst.isle line 2626. 5560 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5561 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5562 return Some(expr1_0); 5563 } 5564 5565 // Generated as internal constructor for term sub_logical_reg_zext32. 5566 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5567 ctx: &mut C, 5568 arg0: Type, 5569 arg1: Reg, 5570 arg2: Reg, 5571 ) -> Option<Reg> { 5572 let pattern0_0 = arg0; 5573 let pattern1_0 = arg1; 5574 let pattern2_0 = arg2; 5575 // Rule at src/isa/s390x/inst.isle line 2629. 5576 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5577 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5578 return Some(expr1_0); 5579 } 5580 5581 // Generated as internal constructor for term sub_logical_zimm32. 5582 pub fn constructor_sub_logical_zimm32<C: Context>( 5583 ctx: &mut C, 5584 arg0: Type, 5585 arg1: Reg, 5586 arg2: u32, 5587 ) -> Option<Reg> { 5588 let pattern0_0 = arg0; 5589 let pattern1_0 = arg1; 5590 let pattern2_0 = arg2; 5591 // Rule at src/isa/s390x/inst.isle line 2632. 5592 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5593 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5594 return Some(expr1_0); 5595 } 5596 5597 // Generated as internal constructor for term sub_logical_mem. 5598 pub fn constructor_sub_logical_mem<C: Context>( 5599 ctx: &mut C, 5600 arg0: Type, 5601 arg1: Reg, 5602 arg2: &MemArg, 5603 ) -> Option<Reg> { 5604 let pattern0_0 = arg0; 5605 let pattern1_0 = arg1; 5606 let pattern2_0 = arg2; 5607 // Rule at src/isa/s390x/inst.isle line 2635. 5608 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5609 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5610 return Some(expr1_0); 5611 } 5612 5613 // Generated as internal constructor for term sub_logical_mem_zext32. 5614 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5615 ctx: &mut C, 5616 arg0: Type, 5617 arg1: Reg, 5618 arg2: &MemArg, 5619 ) -> Option<Reg> { 5620 let pattern0_0 = arg0; 5621 let pattern1_0 = arg1; 5622 let pattern2_0 = arg2; 5623 // Rule at src/isa/s390x/inst.isle line 2638. 5624 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5625 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5626 return Some(expr1_0); 5627 } 5628 5629 // Generated as internal constructor for term aluop_mul. 5630 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5631 let pattern0_0 = arg0; 5632 if pattern0_0 == I8 { 5633 // Rule at src/isa/s390x/inst.isle line 2644. 5634 let expr0_0 = ALUOp::Mul32; 5635 return Some(expr0_0); 5636 } 5637 if pattern0_0 == I16 { 5638 // Rule at src/isa/s390x/inst.isle line 2645. 5639 let expr0_0 = ALUOp::Mul32; 5640 return Some(expr0_0); 5641 } 5642 if pattern0_0 == I32 { 5643 // Rule at src/isa/s390x/inst.isle line 2646. 5644 let expr0_0 = ALUOp::Mul32; 5645 return Some(expr0_0); 5646 } 5647 if pattern0_0 == I64 { 5648 // Rule at src/isa/s390x/inst.isle line 2647. 5649 let expr0_0 = ALUOp::Mul64; 5650 return Some(expr0_0); 5651 } 5652 return None; 5653 } 5654 5655 // Generated as internal constructor for term aluop_mul_sext16. 5656 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5657 let pattern0_0 = arg0; 5658 if pattern0_0 == I16 { 5659 // Rule at src/isa/s390x/inst.isle line 2650. 5660 let expr0_0 = ALUOp::Mul32Ext16; 5661 return Some(expr0_0); 5662 } 5663 if pattern0_0 == I32 { 5664 // Rule at src/isa/s390x/inst.isle line 2651. 5665 let expr0_0 = ALUOp::Mul32Ext16; 5666 return Some(expr0_0); 5667 } 5668 if pattern0_0 == I64 { 5669 // Rule at src/isa/s390x/inst.isle line 2652. 5670 let expr0_0 = ALUOp::Mul64Ext16; 5671 return Some(expr0_0); 5672 } 5673 return None; 5674 } 5675 5676 // Generated as internal constructor for term aluop_mul_sext32. 5677 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5678 let pattern0_0 = arg0; 5679 if pattern0_0 == I64 { 5680 // Rule at src/isa/s390x/inst.isle line 2655. 5681 let expr0_0 = ALUOp::Mul64Ext32; 5682 return Some(expr0_0); 5683 } 5684 return None; 5685 } 5686 5687 // Generated as internal constructor for term mul_reg. 5688 pub fn constructor_mul_reg<C: Context>( 5689 ctx: &mut C, 5690 arg0: Type, 5691 arg1: Reg, 5692 arg2: Reg, 5693 ) -> Option<Reg> { 5694 let pattern0_0 = arg0; 5695 let pattern1_0 = arg1; 5696 let pattern2_0 = arg2; 5697 // Rule at src/isa/s390x/inst.isle line 2658. 5698 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5699 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5700 return Some(expr1_0); 5701 } 5702 5703 // Generated as internal constructor for term mul_reg_sext32. 5704 pub fn constructor_mul_reg_sext32<C: Context>( 5705 ctx: &mut C, 5706 arg0: Type, 5707 arg1: Reg, 5708 arg2: Reg, 5709 ) -> Option<Reg> { 5710 let pattern0_0 = arg0; 5711 let pattern1_0 = arg1; 5712 let pattern2_0 = arg2; 5713 // Rule at src/isa/s390x/inst.isle line 2661. 5714 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5715 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5716 return Some(expr1_0); 5717 } 5718 5719 // Generated as internal constructor for term mul_simm16. 5720 pub fn constructor_mul_simm16<C: Context>( 5721 ctx: &mut C, 5722 arg0: Type, 5723 arg1: Reg, 5724 arg2: i16, 5725 ) -> Option<Reg> { 5726 let pattern0_0 = arg0; 5727 let pattern1_0 = arg1; 5728 let pattern2_0 = arg2; 5729 // Rule at src/isa/s390x/inst.isle line 2664. 5730 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5731 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5732 return Some(expr1_0); 5733 } 5734 5735 // Generated as internal constructor for term mul_simm32. 5736 pub fn constructor_mul_simm32<C: Context>( 5737 ctx: &mut C, 5738 arg0: Type, 5739 arg1: Reg, 5740 arg2: i32, 5741 ) -> Option<Reg> { 5742 let pattern0_0 = arg0; 5743 let pattern1_0 = arg1; 5744 let pattern2_0 = arg2; 5745 // Rule at src/isa/s390x/inst.isle line 2667. 5746 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5747 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5748 return Some(expr1_0); 5749 } 5750 5751 // Generated as internal constructor for term mul_mem. 5752 pub fn constructor_mul_mem<C: Context>( 5753 ctx: &mut C, 5754 arg0: Type, 5755 arg1: Reg, 5756 arg2: &MemArg, 5757 ) -> Option<Reg> { 5758 let pattern0_0 = arg0; 5759 let pattern1_0 = arg1; 5760 let pattern2_0 = arg2; 5761 // Rule at src/isa/s390x/inst.isle line 2670. 5762 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5763 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5764 return Some(expr1_0); 5765 } 5766 5767 // Generated as internal constructor for term mul_mem_sext16. 5768 pub fn constructor_mul_mem_sext16<C: Context>( 5769 ctx: &mut C, 5770 arg0: Type, 5771 arg1: Reg, 5772 arg2: &MemArg, 5773 ) -> Option<Reg> { 5774 let pattern0_0 = arg0; 5775 let pattern1_0 = arg1; 5776 let pattern2_0 = arg2; 5777 // Rule at src/isa/s390x/inst.isle line 2673. 5778 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5779 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5780 return Some(expr1_0); 5781 } 5782 5783 // Generated as internal constructor for term mul_mem_sext32. 5784 pub fn constructor_mul_mem_sext32<C: Context>( 5785 ctx: &mut C, 5786 arg0: Type, 5787 arg1: Reg, 5788 arg2: &MemArg, 5789 ) -> Option<Reg> { 5790 let pattern0_0 = arg0; 5791 let pattern1_0 = arg1; 5792 let pattern2_0 = arg2; 5793 // Rule at src/isa/s390x/inst.isle line 2676. 5794 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5795 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5796 return Some(expr1_0); 5797 } 5798 5799 // Generated as internal constructor for term udivmod. 5800 pub fn constructor_udivmod<C: Context>( 5801 ctx: &mut C, 5802 arg0: Type, 5803 arg1: &RegPair, 5804 arg2: Reg, 5805 ) -> Option<RegPair> { 5806 let pattern0_0 = arg0; 5807 if pattern0_0 == I32 { 5808 let pattern2_0 = arg1; 5809 let pattern3_0 = arg2; 5810 // Rule at src/isa/s390x/inst.isle line 2682. 5811 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5812 return Some(expr0_0); 5813 } 5814 if pattern0_0 == I64 { 5815 let pattern2_0 = arg1; 5816 let pattern3_0 = arg2; 5817 // Rule at src/isa/s390x/inst.isle line 2683. 5818 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5819 return Some(expr0_0); 5820 } 5821 return None; 5822 } 5823 5824 // Generated as internal constructor for term sdivmod. 5825 pub fn constructor_sdivmod<C: Context>( 5826 ctx: &mut C, 5827 arg0: Type, 5828 arg1: &RegPair, 5829 arg2: Reg, 5830 ) -> Option<RegPair> { 5831 let pattern0_0 = arg0; 5832 if pattern0_0 == I32 { 5833 let pattern2_0 = arg1; 5834 let pattern3_0 = arg2; 5835 // Rule at src/isa/s390x/inst.isle line 2689. 5836 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5837 return Some(expr0_0); 5838 } 5839 if pattern0_0 == I64 { 5840 let pattern2_0 = arg1; 5841 let pattern3_0 = arg2; 5842 // Rule at src/isa/s390x/inst.isle line 2690. 5843 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5844 return Some(expr0_0); 5845 } 5846 return None; 5847 } 5848 5849 // Generated as internal constructor for term aluop_and. 5850 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5851 let pattern0_0 = arg0; 5852 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5853 // Rule at src/isa/s390x/inst.isle line 2696. 5854 let expr0_0 = ALUOp::And32; 5855 return Some(expr0_0); 5856 } 5857 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5858 // Rule at src/isa/s390x/inst.isle line 2697. 5859 let expr0_0 = ALUOp::And64; 5860 return Some(expr0_0); 5861 } 5862 return None; 5863 } 5864 5865 // Generated as internal constructor for term and_reg. 5866 pub fn constructor_and_reg<C: Context>( 5867 ctx: &mut C, 5868 arg0: Type, 5869 arg1: Reg, 5870 arg2: Reg, 5871 ) -> Option<Reg> { 5872 let pattern0_0 = arg0; 5873 let pattern1_0 = arg1; 5874 let pattern2_0 = arg2; 5875 // Rule at src/isa/s390x/inst.isle line 2700. 5876 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5877 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5878 return Some(expr1_0); 5879 } 5880 5881 // Generated as internal constructor for term and_uimm16shifted. 5882 pub fn constructor_and_uimm16shifted<C: Context>( 5883 ctx: &mut C, 5884 arg0: Type, 5885 arg1: Reg, 5886 arg2: UImm16Shifted, 5887 ) -> Option<Reg> { 5888 let pattern0_0 = arg0; 5889 let pattern1_0 = arg1; 5890 let pattern2_0 = arg2; 5891 // Rule at src/isa/s390x/inst.isle line 2703. 5892 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5893 let expr1_0 = 5894 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5895 return Some(expr1_0); 5896 } 5897 5898 // Generated as internal constructor for term and_uimm32shifted. 5899 pub fn constructor_and_uimm32shifted<C: Context>( 5900 ctx: &mut C, 5901 arg0: Type, 5902 arg1: Reg, 5903 arg2: UImm32Shifted, 5904 ) -> Option<Reg> { 5905 let pattern0_0 = arg0; 5906 let pattern1_0 = arg1; 5907 let pattern2_0 = arg2; 5908 // Rule at src/isa/s390x/inst.isle line 2706. 5909 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5910 let expr1_0 = 5911 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5912 return Some(expr1_0); 5913 } 5914 5915 // Generated as internal constructor for term and_mem. 5916 pub fn constructor_and_mem<C: Context>( 5917 ctx: &mut C, 5918 arg0: Type, 5919 arg1: Reg, 5920 arg2: &MemArg, 5921 ) -> Option<Reg> { 5922 let pattern0_0 = arg0; 5923 let pattern1_0 = arg1; 5924 let pattern2_0 = arg2; 5925 // Rule at src/isa/s390x/inst.isle line 2709. 5926 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5927 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5928 return Some(expr1_0); 5929 } 5930 5931 // Generated as internal constructor for term aluop_or. 5932 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5933 let pattern0_0 = arg0; 5934 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5935 // Rule at src/isa/s390x/inst.isle line 2715. 5936 let expr0_0 = ALUOp::Orr32; 5937 return Some(expr0_0); 5938 } 5939 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5940 // Rule at src/isa/s390x/inst.isle line 2716. 5941 let expr0_0 = ALUOp::Orr64; 5942 return Some(expr0_0); 5943 } 5944 return None; 5945 } 5946 5947 // Generated as internal constructor for term or_reg. 5948 pub fn constructor_or_reg<C: Context>( 5949 ctx: &mut C, 5950 arg0: Type, 5951 arg1: Reg, 5952 arg2: Reg, 5953 ) -> Option<Reg> { 5954 let pattern0_0 = arg0; 5955 let pattern1_0 = arg1; 5956 let pattern2_0 = arg2; 5957 // Rule at src/isa/s390x/inst.isle line 2719. 5958 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5959 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5960 return Some(expr1_0); 5961 } 5962 5963 // Generated as internal constructor for term or_uimm16shifted. 5964 pub fn constructor_or_uimm16shifted<C: Context>( 5965 ctx: &mut C, 5966 arg0: Type, 5967 arg1: Reg, 5968 arg2: UImm16Shifted, 5969 ) -> Option<Reg> { 5970 let pattern0_0 = arg0; 5971 let pattern1_0 = arg1; 5972 let pattern2_0 = arg2; 5973 // Rule at src/isa/s390x/inst.isle line 2722. 5974 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5975 let expr1_0 = 5976 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5977 return Some(expr1_0); 5978 } 5979 5980 // Generated as internal constructor for term or_uimm32shifted. 5981 pub fn constructor_or_uimm32shifted<C: Context>( 5982 ctx: &mut C, 5983 arg0: Type, 5984 arg1: Reg, 5985 arg2: UImm32Shifted, 5986 ) -> Option<Reg> { 5987 let pattern0_0 = arg0; 5988 let pattern1_0 = arg1; 5989 let pattern2_0 = arg2; 5990 // Rule at src/isa/s390x/inst.isle line 2725. 5991 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5992 let expr1_0 = 5993 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5994 return Some(expr1_0); 5995 } 5996 5997 // Generated as internal constructor for term or_mem. 5998 pub fn constructor_or_mem<C: Context>( 5999 ctx: &mut C, 6000 arg0: Type, 6001 arg1: Reg, 6002 arg2: &MemArg, 6003 ) -> Option<Reg> { 6004 let pattern0_0 = arg0; 6005 let pattern1_0 = arg1; 6006 let pattern2_0 = arg2; 6007 // Rule at src/isa/s390x/inst.isle line 2728. 6008 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6009 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6010 return Some(expr1_0); 6011 } 6012 6013 // Generated as internal constructor for term aluop_xor. 6014 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6015 let pattern0_0 = arg0; 6016 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6017 // Rule at src/isa/s390x/inst.isle line 2734. 6018 let expr0_0 = ALUOp::Xor32; 6019 return Some(expr0_0); 6020 } 6021 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6022 // Rule at src/isa/s390x/inst.isle line 2735. 6023 let expr0_0 = ALUOp::Xor64; 6024 return Some(expr0_0); 6025 } 6026 return None; 6027 } 6028 6029 // Generated as internal constructor for term xor_reg. 6030 pub fn constructor_xor_reg<C: Context>( 6031 ctx: &mut C, 6032 arg0: Type, 6033 arg1: Reg, 6034 arg2: Reg, 6035 ) -> Option<Reg> { 6036 let pattern0_0 = arg0; 6037 let pattern1_0 = arg1; 6038 let pattern2_0 = arg2; 6039 // Rule at src/isa/s390x/inst.isle line 2738. 6040 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6041 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6042 return Some(expr1_0); 6043 } 6044 6045 // Generated as internal constructor for term xor_uimm32shifted. 6046 pub fn constructor_xor_uimm32shifted<C: Context>( 6047 ctx: &mut C, 6048 arg0: Type, 6049 arg1: Reg, 6050 arg2: UImm32Shifted, 6051 ) -> Option<Reg> { 6052 let pattern0_0 = arg0; 6053 let pattern1_0 = arg1; 6054 let pattern2_0 = arg2; 6055 // Rule at src/isa/s390x/inst.isle line 2741. 6056 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6057 let expr1_0 = 6058 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6059 return Some(expr1_0); 6060 } 6061 6062 // Generated as internal constructor for term xor_mem. 6063 pub fn constructor_xor_mem<C: Context>( 6064 ctx: &mut C, 6065 arg0: Type, 6066 arg1: Reg, 6067 arg2: &MemArg, 6068 ) -> Option<Reg> { 6069 let pattern0_0 = arg0; 6070 let pattern1_0 = arg1; 6071 let pattern2_0 = arg2; 6072 // Rule at src/isa/s390x/inst.isle line 2744. 6073 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6074 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6075 return Some(expr1_0); 6076 } 6077 6078 // Generated as internal constructor for term push_xor_uimm32shifted. 6079 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6080 ctx: &mut C, 6081 arg0: &VecMInstBuilder, 6082 arg1: Type, 6083 arg2: WritableReg, 6084 arg3: Reg, 6085 arg4: UImm32Shifted, 6086 ) -> Option<Reg> { 6087 let pattern0_0 = arg0; 6088 let pattern1_0 = arg1; 6089 let pattern2_0 = arg2; 6090 let pattern3_0 = arg3; 6091 let pattern4_0 = arg4; 6092 // Rule at src/isa/s390x/inst.isle line 2747. 6093 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6094 let expr1_0 = constructor_push_alu_uimm32shifted( 6095 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6096 )?; 6097 return Some(expr1_0); 6098 } 6099 6100 // Generated as internal constructor for term not_reg. 6101 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6102 let pattern0_0 = arg0; 6103 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6104 let pattern2_0 = arg1; 6105 // Rule at src/isa/s390x/inst.isle line 2753. 6106 let expr0_0: u32 = 4294967295; 6107 let expr1_0: u8 = 0; 6108 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6109 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6110 return Some(expr3_0); 6111 } 6112 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6113 let pattern2_0 = arg1; 6114 // Rule at src/isa/s390x/inst.isle line 2755. 6115 let expr0_0: u32 = 4294967295; 6116 let expr1_0: u8 = 0; 6117 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6118 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6119 let expr4_0: u32 = 4294967295; 6120 let expr5_0: u8 = 32; 6121 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6122 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6123 return Some(expr7_0); 6124 } 6125 return None; 6126 } 6127 6128 // Generated as internal constructor for term push_not_reg. 6129 pub fn constructor_push_not_reg<C: Context>( 6130 ctx: &mut C, 6131 arg0: &VecMInstBuilder, 6132 arg1: Type, 6133 arg2: WritableReg, 6134 arg3: Reg, 6135 ) -> Option<Reg> { 6136 let pattern0_0 = arg0; 6137 let pattern1_0 = arg1; 6138 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6139 let pattern3_0 = arg2; 6140 let pattern4_0 = arg3; 6141 // Rule at src/isa/s390x/inst.isle line 2761. 6142 let expr0_0: u32 = 4294967295; 6143 let expr1_0: u8 = 0; 6144 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6145 let expr3_0 = constructor_push_xor_uimm32shifted( 6146 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6147 )?; 6148 return Some(expr3_0); 6149 } 6150 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6151 let pattern3_0 = arg2; 6152 let pattern4_0 = arg3; 6153 // Rule at src/isa/s390x/inst.isle line 2763. 6154 let expr0_0: u32 = 4294967295; 6155 let expr1_0: u8 = 0; 6156 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6157 let expr3_0 = constructor_push_xor_uimm32shifted( 6158 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6159 )?; 6160 let expr4_0: u32 = 4294967295; 6161 let expr5_0: u8 = 32; 6162 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6163 let expr7_0 = constructor_push_xor_uimm32shifted( 6164 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6165 )?; 6166 return Some(expr7_0); 6167 } 6168 return None; 6169 } 6170 6171 // Generated as internal constructor for term aluop_and_not. 6172 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6173 let pattern0_0 = arg0; 6174 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6175 // Rule at src/isa/s390x/inst.isle line 2771. 6176 let expr0_0 = ALUOp::AndNot32; 6177 return Some(expr0_0); 6178 } 6179 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6180 // Rule at src/isa/s390x/inst.isle line 2772. 6181 let expr0_0 = ALUOp::AndNot64; 6182 return Some(expr0_0); 6183 } 6184 return None; 6185 } 6186 6187 // Generated as internal constructor for term and_not_reg. 6188 pub fn constructor_and_not_reg<C: Context>( 6189 ctx: &mut C, 6190 arg0: Type, 6191 arg1: Reg, 6192 arg2: Reg, 6193 ) -> Option<Reg> { 6194 let pattern0_0 = arg0; 6195 let pattern1_0 = arg1; 6196 let pattern2_0 = arg2; 6197 // Rule at src/isa/s390x/inst.isle line 2775. 6198 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6199 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6200 return Some(expr1_0); 6201 } 6202 6203 // Generated as internal constructor for term aluop_or_not. 6204 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6205 let pattern0_0 = arg0; 6206 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6207 // Rule at src/isa/s390x/inst.isle line 2781. 6208 let expr0_0 = ALUOp::OrrNot32; 6209 return Some(expr0_0); 6210 } 6211 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6212 // Rule at src/isa/s390x/inst.isle line 2782. 6213 let expr0_0 = ALUOp::OrrNot64; 6214 return Some(expr0_0); 6215 } 6216 return None; 6217 } 6218 6219 // Generated as internal constructor for term or_not_reg. 6220 pub fn constructor_or_not_reg<C: Context>( 6221 ctx: &mut C, 6222 arg0: Type, 6223 arg1: Reg, 6224 arg2: Reg, 6225 ) -> Option<Reg> { 6226 let pattern0_0 = arg0; 6227 let pattern1_0 = arg1; 6228 let pattern2_0 = arg2; 6229 // Rule at src/isa/s390x/inst.isle line 2785. 6230 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6231 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6232 return Some(expr1_0); 6233 } 6234 6235 // Generated as internal constructor for term aluop_xor_not. 6236 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6237 let pattern0_0 = arg0; 6238 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6239 // Rule at src/isa/s390x/inst.isle line 2791. 6240 let expr0_0 = ALUOp::XorNot32; 6241 return Some(expr0_0); 6242 } 6243 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6244 // Rule at src/isa/s390x/inst.isle line 2792. 6245 let expr0_0 = ALUOp::XorNot64; 6246 return Some(expr0_0); 6247 } 6248 return None; 6249 } 6250 6251 // Generated as internal constructor for term xor_not_reg. 6252 pub fn constructor_xor_not_reg<C: Context>( 6253 ctx: &mut C, 6254 arg0: Type, 6255 arg1: Reg, 6256 arg2: Reg, 6257 ) -> Option<Reg> { 6258 let pattern0_0 = arg0; 6259 let pattern1_0 = arg1; 6260 let pattern2_0 = arg2; 6261 // Rule at src/isa/s390x/inst.isle line 2795. 6262 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6263 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6264 return Some(expr1_0); 6265 } 6266 6267 // Generated as internal constructor for term unaryop_abs. 6268 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6269 let pattern0_0 = arg0; 6270 if pattern0_0 == I32 { 6271 // Rule at src/isa/s390x/inst.isle line 2801. 6272 let expr0_0 = UnaryOp::Abs32; 6273 return Some(expr0_0); 6274 } 6275 if pattern0_0 == I64 { 6276 // Rule at src/isa/s390x/inst.isle line 2802. 6277 let expr0_0 = UnaryOp::Abs64; 6278 return Some(expr0_0); 6279 } 6280 return None; 6281 } 6282 6283 // Generated as internal constructor for term unaryop_abs_sext32. 6284 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6285 let pattern0_0 = arg0; 6286 if pattern0_0 == I64 { 6287 // Rule at src/isa/s390x/inst.isle line 2805. 6288 let expr0_0 = UnaryOp::Abs64Ext32; 6289 return Some(expr0_0); 6290 } 6291 return None; 6292 } 6293 6294 // Generated as internal constructor for term abs_reg. 6295 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6296 let pattern0_0 = arg0; 6297 let pattern1_0 = arg1; 6298 // Rule at src/isa/s390x/inst.isle line 2808. 6299 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6300 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6301 return Some(expr1_0); 6302 } 6303 6304 // Generated as internal constructor for term abs_reg_sext32. 6305 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6306 let pattern0_0 = arg0; 6307 let pattern1_0 = arg1; 6308 // Rule at src/isa/s390x/inst.isle line 2811. 6309 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6310 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6311 return Some(expr1_0); 6312 } 6313 6314 // Generated as internal constructor for term unaryop_neg. 6315 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6316 let pattern0_0 = arg0; 6317 if pattern0_0 == I8 { 6318 // Rule at src/isa/s390x/inst.isle line 2817. 6319 let expr0_0 = UnaryOp::Neg32; 6320 return Some(expr0_0); 6321 } 6322 if pattern0_0 == I16 { 6323 // Rule at src/isa/s390x/inst.isle line 2818. 6324 let expr0_0 = UnaryOp::Neg32; 6325 return Some(expr0_0); 6326 } 6327 if pattern0_0 == I32 { 6328 // Rule at src/isa/s390x/inst.isle line 2819. 6329 let expr0_0 = UnaryOp::Neg32; 6330 return Some(expr0_0); 6331 } 6332 if pattern0_0 == I64 { 6333 // Rule at src/isa/s390x/inst.isle line 2820. 6334 let expr0_0 = UnaryOp::Neg64; 6335 return Some(expr0_0); 6336 } 6337 return None; 6338 } 6339 6340 // Generated as internal constructor for term unaryop_neg_sext32. 6341 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6342 let pattern0_0 = arg0; 6343 if pattern0_0 == I64 { 6344 // Rule at src/isa/s390x/inst.isle line 2823. 6345 let expr0_0 = UnaryOp::Neg64Ext32; 6346 return Some(expr0_0); 6347 } 6348 return None; 6349 } 6350 6351 // Generated as internal constructor for term neg_reg. 6352 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6353 let pattern0_0 = arg0; 6354 let pattern1_0 = arg1; 6355 // Rule at src/isa/s390x/inst.isle line 2826. 6356 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6357 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6358 return Some(expr1_0); 6359 } 6360 6361 // Generated as internal constructor for term neg_reg_sext32. 6362 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6363 let pattern0_0 = arg0; 6364 let pattern1_0 = arg1; 6365 // Rule at src/isa/s390x/inst.isle line 2829. 6366 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6367 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6368 return Some(expr1_0); 6369 } 6370 6371 // Generated as internal constructor for term unaryop_bswap. 6372 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6373 let pattern0_0 = arg0; 6374 if pattern0_0 == I32 { 6375 // Rule at src/isa/s390x/inst.isle line 2835. 6376 let expr0_0 = UnaryOp::BSwap32; 6377 return Some(expr0_0); 6378 } 6379 if pattern0_0 == I64 { 6380 // Rule at src/isa/s390x/inst.isle line 2836. 6381 let expr0_0 = UnaryOp::BSwap64; 6382 return Some(expr0_0); 6383 } 6384 return None; 6385 } 6386 6387 // Generated as internal constructor for term bswap_reg. 6388 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6389 let pattern0_0 = arg0; 6390 let pattern1_0 = arg1; 6391 // Rule at src/isa/s390x/inst.isle line 2839. 6392 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6393 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6394 return Some(expr1_0); 6395 } 6396 6397 // Generated as internal constructor for term push_bswap_reg. 6398 pub fn constructor_push_bswap_reg<C: Context>( 6399 ctx: &mut C, 6400 arg0: &VecMInstBuilder, 6401 arg1: Type, 6402 arg2: WritableReg, 6403 arg3: Reg, 6404 ) -> Option<Reg> { 6405 let pattern0_0 = arg0; 6406 let pattern1_0 = arg1; 6407 let pattern2_0 = arg2; 6408 let pattern3_0 = arg3; 6409 // Rule at src/isa/s390x/inst.isle line 2842. 6410 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6411 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6412 return Some(expr1_0); 6413 } 6414 6415 // Generated as internal constructor for term shiftop_rot. 6416 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6417 let pattern0_0 = arg0; 6418 if pattern0_0 == I32 { 6419 // Rule at src/isa/s390x/inst.isle line 2848. 6420 let expr0_0 = ShiftOp::RotL32; 6421 return Some(expr0_0); 6422 } 6423 if pattern0_0 == I64 { 6424 // Rule at src/isa/s390x/inst.isle line 2849. 6425 let expr0_0 = ShiftOp::RotL64; 6426 return Some(expr0_0); 6427 } 6428 return None; 6429 } 6430 6431 // Generated as internal constructor for term rot_reg. 6432 pub fn constructor_rot_reg<C: Context>( 6433 ctx: &mut C, 6434 arg0: Type, 6435 arg1: Reg, 6436 arg2: Reg, 6437 ) -> Option<Reg> { 6438 let pattern0_0 = arg0; 6439 let pattern1_0 = arg1; 6440 let pattern2_0 = arg2; 6441 // Rule at src/isa/s390x/inst.isle line 2852. 6442 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6443 let expr1_0: u8 = 0; 6444 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6445 return Some(expr2_0); 6446 } 6447 6448 // Generated as internal constructor for term rot_imm. 6449 pub fn constructor_rot_imm<C: Context>( 6450 ctx: &mut C, 6451 arg0: Type, 6452 arg1: Reg, 6453 arg2: u8, 6454 ) -> Option<Reg> { 6455 let pattern0_0 = arg0; 6456 let pattern1_0 = arg1; 6457 let pattern2_0 = arg2; 6458 // Rule at src/isa/s390x/inst.isle line 2856. 6459 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6460 let expr1_0 = C::zero_reg(ctx); 6461 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6462 return Some(expr2_0); 6463 } 6464 6465 // Generated as internal constructor for term rot_imm_reg. 6466 pub fn constructor_rot_imm_reg<C: Context>( 6467 ctx: &mut C, 6468 arg0: Type, 6469 arg1: Reg, 6470 arg2: u8, 6471 arg3: Reg, 6472 ) -> Option<Reg> { 6473 let pattern0_0 = arg0; 6474 let pattern1_0 = arg1; 6475 let pattern2_0 = arg2; 6476 let pattern3_0 = arg3; 6477 // Rule at src/isa/s390x/inst.isle line 2860. 6478 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6479 let expr1_0 = constructor_shift_rr( 6480 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6481 )?; 6482 return Some(expr1_0); 6483 } 6484 6485 // Generated as internal constructor for term push_rot_imm_reg. 6486 pub fn constructor_push_rot_imm_reg<C: Context>( 6487 ctx: &mut C, 6488 arg0: &VecMInstBuilder, 6489 arg1: Type, 6490 arg2: WritableReg, 6491 arg3: Reg, 6492 arg4: u8, 6493 arg5: Reg, 6494 ) -> Option<Reg> { 6495 let pattern0_0 = arg0; 6496 let pattern1_0 = arg1; 6497 let pattern2_0 = arg2; 6498 let pattern3_0 = arg3; 6499 let pattern4_0 = arg4; 6500 let pattern5_0 = arg5; 6501 // Rule at src/isa/s390x/inst.isle line 2864. 6502 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6503 let expr1_0 = constructor_push_shift( 6504 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6505 )?; 6506 return Some(expr1_0); 6507 } 6508 6509 // Generated as internal constructor for term shiftop_lshl. 6510 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6511 let pattern0_0 = arg0; 6512 if pattern0_0 == I8 { 6513 // Rule at src/isa/s390x/inst.isle line 2871. 6514 let expr0_0 = ShiftOp::LShL32; 6515 return Some(expr0_0); 6516 } 6517 if pattern0_0 == I16 { 6518 // Rule at src/isa/s390x/inst.isle line 2872. 6519 let expr0_0 = ShiftOp::LShL32; 6520 return Some(expr0_0); 6521 } 6522 if pattern0_0 == I32 { 6523 // Rule at src/isa/s390x/inst.isle line 2873. 6524 let expr0_0 = ShiftOp::LShL32; 6525 return Some(expr0_0); 6526 } 6527 if pattern0_0 == I64 { 6528 // Rule at src/isa/s390x/inst.isle line 2874. 6529 let expr0_0 = ShiftOp::LShL64; 6530 return Some(expr0_0); 6531 } 6532 return None; 6533 } 6534 6535 // Generated as internal constructor for term lshl_reg. 6536 pub fn constructor_lshl_reg<C: Context>( 6537 ctx: &mut C, 6538 arg0: Type, 6539 arg1: Reg, 6540 arg2: Reg, 6541 ) -> Option<Reg> { 6542 let pattern0_0 = arg0; 6543 let pattern1_0 = arg1; 6544 let pattern2_0 = arg2; 6545 // Rule at src/isa/s390x/inst.isle line 2877. 6546 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6547 let expr1_0: u8 = 0; 6548 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6549 return Some(expr2_0); 6550 } 6551 6552 // Generated as internal constructor for term lshl_imm. 6553 pub fn constructor_lshl_imm<C: Context>( 6554 ctx: &mut C, 6555 arg0: Type, 6556 arg1: Reg, 6557 arg2: u8, 6558 ) -> Option<Reg> { 6559 let pattern0_0 = arg0; 6560 let pattern1_0 = arg1; 6561 let pattern2_0 = arg2; 6562 // Rule at src/isa/s390x/inst.isle line 2881. 6563 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6564 let expr1_0 = C::zero_reg(ctx); 6565 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6566 return Some(expr2_0); 6567 } 6568 6569 // Generated as internal constructor for term shiftop_lshr. 6570 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6571 let pattern0_0 = arg0; 6572 if pattern0_0 == I32 { 6573 // Rule at src/isa/s390x/inst.isle line 2888. 6574 let expr0_0 = ShiftOp::LShR32; 6575 return Some(expr0_0); 6576 } 6577 if pattern0_0 == I64 { 6578 // Rule at src/isa/s390x/inst.isle line 2889. 6579 let expr0_0 = ShiftOp::LShR64; 6580 return Some(expr0_0); 6581 } 6582 return None; 6583 } 6584 6585 // Generated as internal constructor for term lshr_reg. 6586 pub fn constructor_lshr_reg<C: Context>( 6587 ctx: &mut C, 6588 arg0: Type, 6589 arg1: Reg, 6590 arg2: Reg, 6591 ) -> Option<Reg> { 6592 let pattern0_0 = arg0; 6593 let pattern1_0 = arg1; 6594 let pattern2_0 = arg2; 6595 // Rule at src/isa/s390x/inst.isle line 2892. 6596 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6597 let expr1_0: u8 = 0; 6598 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6599 return Some(expr2_0); 6600 } 6601 6602 // Generated as internal constructor for term lshr_imm. 6603 pub fn constructor_lshr_imm<C: Context>( 6604 ctx: &mut C, 6605 arg0: Type, 6606 arg1: Reg, 6607 arg2: u8, 6608 ) -> Option<Reg> { 6609 let pattern0_0 = arg0; 6610 let pattern1_0 = arg1; 6611 let pattern2_0 = arg2; 6612 // Rule at src/isa/s390x/inst.isle line 2896. 6613 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6614 let expr1_0 = C::zero_reg(ctx); 6615 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6616 return Some(expr2_0); 6617 } 6618 6619 // Generated as internal constructor for term shiftop_ashr. 6620 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6621 let pattern0_0 = arg0; 6622 if pattern0_0 == I32 { 6623 // Rule at src/isa/s390x/inst.isle line 2903. 6624 let expr0_0 = ShiftOp::AShR32; 6625 return Some(expr0_0); 6626 } 6627 if pattern0_0 == I64 { 6628 // Rule at src/isa/s390x/inst.isle line 2904. 6629 let expr0_0 = ShiftOp::AShR64; 6630 return Some(expr0_0); 6631 } 6632 return None; 6633 } 6634 6635 // Generated as internal constructor for term ashr_reg. 6636 pub fn constructor_ashr_reg<C: Context>( 6637 ctx: &mut C, 6638 arg0: Type, 6639 arg1: Reg, 6640 arg2: Reg, 6641 ) -> Option<Reg> { 6642 let pattern0_0 = arg0; 6643 let pattern1_0 = arg1; 6644 let pattern2_0 = arg2; 6645 // Rule at src/isa/s390x/inst.isle line 2907. 6646 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6647 let expr1_0: u8 = 0; 6648 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6649 return Some(expr2_0); 6650 } 6651 6652 // Generated as internal constructor for term ashr_imm. 6653 pub fn constructor_ashr_imm<C: Context>( 6654 ctx: &mut C, 6655 arg0: Type, 6656 arg1: Reg, 6657 arg2: u8, 6658 ) -> Option<Reg> { 6659 let pattern0_0 = arg0; 6660 let pattern1_0 = arg1; 6661 let pattern2_0 = arg2; 6662 // Rule at src/isa/s390x/inst.isle line 2911. 6663 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6664 let expr1_0 = C::zero_reg(ctx); 6665 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6666 return Some(expr2_0); 6667 } 6668 6669 // Generated as internal constructor for term popcnt_byte. 6670 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6671 let pattern0_0 = arg0; 6672 // Rule at src/isa/s390x/inst.isle line 2918. 6673 let expr0_0: Type = I64; 6674 let expr1_0 = UnaryOp::PopcntByte; 6675 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6676 return Some(expr2_0); 6677 } 6678 6679 // Generated as internal constructor for term popcnt_reg. 6680 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6681 let pattern0_0 = arg0; 6682 // Rule at src/isa/s390x/inst.isle line 2921. 6683 let expr0_0: Type = I64; 6684 let expr1_0 = UnaryOp::PopcntReg; 6685 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6686 return Some(expr2_0); 6687 } 6688 6689 // Generated as internal constructor for term atomic_rmw_and. 6690 pub fn constructor_atomic_rmw_and<C: Context>( 6691 ctx: &mut C, 6692 arg0: Type, 6693 arg1: Reg, 6694 arg2: &MemArg, 6695 ) -> Option<Reg> { 6696 let pattern0_0 = arg0; 6697 if pattern0_0 == I32 { 6698 let pattern2_0 = arg1; 6699 let pattern3_0 = arg2; 6700 // Rule at src/isa/s390x/inst.isle line 2927. 6701 let expr0_0: Type = I32; 6702 let expr1_0 = ALUOp::And32; 6703 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6704 return Some(expr2_0); 6705 } 6706 if pattern0_0 == I64 { 6707 let pattern2_0 = arg1; 6708 let pattern3_0 = arg2; 6709 // Rule at src/isa/s390x/inst.isle line 2928. 6710 let expr0_0: Type = I64; 6711 let expr1_0 = ALUOp::And64; 6712 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6713 return Some(expr2_0); 6714 } 6715 return None; 6716 } 6717 6718 // Generated as internal constructor for term atomic_rmw_or. 6719 pub fn constructor_atomic_rmw_or<C: Context>( 6720 ctx: &mut C, 6721 arg0: Type, 6722 arg1: Reg, 6723 arg2: &MemArg, 6724 ) -> Option<Reg> { 6725 let pattern0_0 = arg0; 6726 if pattern0_0 == I32 { 6727 let pattern2_0 = arg1; 6728 let pattern3_0 = arg2; 6729 // Rule at src/isa/s390x/inst.isle line 2931. 6730 let expr0_0: Type = I32; 6731 let expr1_0 = ALUOp::Orr32; 6732 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6733 return Some(expr2_0); 6734 } 6735 if pattern0_0 == I64 { 6736 let pattern2_0 = arg1; 6737 let pattern3_0 = arg2; 6738 // Rule at src/isa/s390x/inst.isle line 2932. 6739 let expr0_0: Type = I64; 6740 let expr1_0 = ALUOp::Orr64; 6741 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6742 return Some(expr2_0); 6743 } 6744 return None; 6745 } 6746 6747 // Generated as internal constructor for term atomic_rmw_xor. 6748 pub fn constructor_atomic_rmw_xor<C: Context>( 6749 ctx: &mut C, 6750 arg0: Type, 6751 arg1: Reg, 6752 arg2: &MemArg, 6753 ) -> Option<Reg> { 6754 let pattern0_0 = arg0; 6755 if pattern0_0 == I32 { 6756 let pattern2_0 = arg1; 6757 let pattern3_0 = arg2; 6758 // Rule at src/isa/s390x/inst.isle line 2935. 6759 let expr0_0: Type = I32; 6760 let expr1_0 = ALUOp::Xor32; 6761 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6762 return Some(expr2_0); 6763 } 6764 if pattern0_0 == I64 { 6765 let pattern2_0 = arg1; 6766 let pattern3_0 = arg2; 6767 // Rule at src/isa/s390x/inst.isle line 2936. 6768 let expr0_0: Type = I64; 6769 let expr1_0 = ALUOp::Xor64; 6770 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6771 return Some(expr2_0); 6772 } 6773 return None; 6774 } 6775 6776 // Generated as internal constructor for term atomic_rmw_add. 6777 pub fn constructor_atomic_rmw_add<C: Context>( 6778 ctx: &mut C, 6779 arg0: Type, 6780 arg1: Reg, 6781 arg2: &MemArg, 6782 ) -> Option<Reg> { 6783 let pattern0_0 = arg0; 6784 if pattern0_0 == I32 { 6785 let pattern2_0 = arg1; 6786 let pattern3_0 = arg2; 6787 // Rule at src/isa/s390x/inst.isle line 2939. 6788 let expr0_0: Type = I32; 6789 let expr1_0 = ALUOp::Add32; 6790 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6791 return Some(expr2_0); 6792 } 6793 if pattern0_0 == I64 { 6794 let pattern2_0 = arg1; 6795 let pattern3_0 = arg2; 6796 // Rule at src/isa/s390x/inst.isle line 2940. 6797 let expr0_0: Type = I64; 6798 let expr1_0 = ALUOp::Add64; 6799 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6800 return Some(expr2_0); 6801 } 6802 return None; 6803 } 6804 6805 // Generated as internal constructor for term atomic_cas_impl. 6806 pub fn constructor_atomic_cas_impl<C: Context>( 6807 ctx: &mut C, 6808 arg0: Type, 6809 arg1: Reg, 6810 arg2: Reg, 6811 arg3: &MemArg, 6812 ) -> Option<Reg> { 6813 let pattern0_0 = arg0; 6814 if pattern0_0 == I32 { 6815 let pattern2_0 = arg1; 6816 let pattern3_0 = arg2; 6817 let pattern4_0 = arg3; 6818 // Rule at src/isa/s390x/inst.isle line 2946. 6819 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6820 return Some(expr0_0); 6821 } 6822 if pattern0_0 == I64 { 6823 let pattern2_0 = arg1; 6824 let pattern3_0 = arg2; 6825 let pattern4_0 = arg3; 6826 // Rule at src/isa/s390x/inst.isle line 2947. 6827 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6828 return Some(expr0_0); 6829 } 6830 return None; 6831 } 6832 6833 // Generated as internal constructor for term push_atomic_cas. 6834 pub fn constructor_push_atomic_cas<C: Context>( 6835 ctx: &mut C, 6836 arg0: &VecMInstBuilder, 6837 arg1: Type, 6838 arg2: WritableReg, 6839 arg3: Reg, 6840 arg4: &MemArg, 6841 ) -> Option<Reg> { 6842 let pattern0_0 = arg0; 6843 let pattern1_0 = arg1; 6844 if pattern1_0 == I32 { 6845 let pattern3_0 = arg2; 6846 let pattern4_0 = arg3; 6847 let pattern5_0 = arg4; 6848 // Rule at src/isa/s390x/inst.isle line 2950. 6849 let expr0_0 = 6850 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6851 return Some(expr0_0); 6852 } 6853 if pattern1_0 == I64 { 6854 let pattern3_0 = arg2; 6855 let pattern4_0 = arg3; 6856 let pattern5_0 = arg4; 6857 // Rule at src/isa/s390x/inst.isle line 2951. 6858 let expr0_0 = 6859 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6860 return Some(expr0_0); 6861 } 6862 return None; 6863 } 6864 6865 // Generated as internal constructor for term fpuop2_add. 6866 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6867 let pattern0_0 = arg0; 6868 if pattern0_0 == F32 { 6869 // Rule at src/isa/s390x/inst.isle line 2957. 6870 let expr0_0 = FPUOp2::Add32; 6871 return Some(expr0_0); 6872 } 6873 if pattern0_0 == F64 { 6874 // Rule at src/isa/s390x/inst.isle line 2958. 6875 let expr0_0 = FPUOp2::Add64; 6876 return Some(expr0_0); 6877 } 6878 return None; 6879 } 6880 6881 // Generated as internal constructor for term fadd_reg. 6882 pub fn constructor_fadd_reg<C: Context>( 6883 ctx: &mut C, 6884 arg0: Type, 6885 arg1: Reg, 6886 arg2: Reg, 6887 ) -> Option<Reg> { 6888 let pattern0_0 = arg0; 6889 let pattern1_0 = arg1; 6890 let pattern2_0 = arg2; 6891 // Rule at src/isa/s390x/inst.isle line 2961. 6892 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6893 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6894 return Some(expr1_0); 6895 } 6896 6897 // Generated as internal constructor for term fpuop2_sub. 6898 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6899 let pattern0_0 = arg0; 6900 if pattern0_0 == F32 { 6901 // Rule at src/isa/s390x/inst.isle line 2967. 6902 let expr0_0 = FPUOp2::Sub32; 6903 return Some(expr0_0); 6904 } 6905 if pattern0_0 == F64 { 6906 // Rule at src/isa/s390x/inst.isle line 2968. 6907 let expr0_0 = FPUOp2::Sub64; 6908 return Some(expr0_0); 6909 } 6910 return None; 6911 } 6912 6913 // Generated as internal constructor for term fsub_reg. 6914 pub fn constructor_fsub_reg<C: Context>( 6915 ctx: &mut C, 6916 arg0: Type, 6917 arg1: Reg, 6918 arg2: Reg, 6919 ) -> Option<Reg> { 6920 let pattern0_0 = arg0; 6921 let pattern1_0 = arg1; 6922 let pattern2_0 = arg2; 6923 // Rule at src/isa/s390x/inst.isle line 2971. 6924 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 6925 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6926 return Some(expr1_0); 6927 } 6928 6929 // Generated as internal constructor for term fpuop2_mul. 6930 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6931 let pattern0_0 = arg0; 6932 if pattern0_0 == F32 { 6933 // Rule at src/isa/s390x/inst.isle line 2977. 6934 let expr0_0 = FPUOp2::Mul32; 6935 return Some(expr0_0); 6936 } 6937 if pattern0_0 == F64 { 6938 // Rule at src/isa/s390x/inst.isle line 2978. 6939 let expr0_0 = FPUOp2::Mul64; 6940 return Some(expr0_0); 6941 } 6942 return None; 6943 } 6944 6945 // Generated as internal constructor for term fmul_reg. 6946 pub fn constructor_fmul_reg<C: Context>( 6947 ctx: &mut C, 6948 arg0: Type, 6949 arg1: Reg, 6950 arg2: Reg, 6951 ) -> Option<Reg> { 6952 let pattern0_0 = arg0; 6953 let pattern1_0 = arg1; 6954 let pattern2_0 = arg2; 6955 // Rule at src/isa/s390x/inst.isle line 2981. 6956 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 6957 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6958 return Some(expr1_0); 6959 } 6960 6961 // Generated as internal constructor for term fpuop2_div. 6962 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6963 let pattern0_0 = arg0; 6964 if pattern0_0 == F32 { 6965 // Rule at src/isa/s390x/inst.isle line 2987. 6966 let expr0_0 = FPUOp2::Div32; 6967 return Some(expr0_0); 6968 } 6969 if pattern0_0 == F64 { 6970 // Rule at src/isa/s390x/inst.isle line 2988. 6971 let expr0_0 = FPUOp2::Div64; 6972 return Some(expr0_0); 6973 } 6974 return None; 6975 } 6976 6977 // Generated as internal constructor for term fdiv_reg. 6978 pub fn constructor_fdiv_reg<C: Context>( 6979 ctx: &mut C, 6980 arg0: Type, 6981 arg1: Reg, 6982 arg2: Reg, 6983 ) -> Option<Reg> { 6984 let pattern0_0 = arg0; 6985 let pattern1_0 = arg1; 6986 let pattern2_0 = arg2; 6987 // Rule at src/isa/s390x/inst.isle line 2991. 6988 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 6989 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6990 return Some(expr1_0); 6991 } 6992 6993 // Generated as internal constructor for term fpuop2_min. 6994 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6995 let pattern0_0 = arg0; 6996 if pattern0_0 == F32 { 6997 // Rule at src/isa/s390x/inst.isle line 2997. 6998 let expr0_0 = FPUOp2::Min32; 6999 return Some(expr0_0); 7000 } 7001 if pattern0_0 == F64 { 7002 // Rule at src/isa/s390x/inst.isle line 2998. 7003 let expr0_0 = FPUOp2::Min64; 7004 return Some(expr0_0); 7005 } 7006 return None; 7007 } 7008 7009 // Generated as internal constructor for term fmin_reg. 7010 pub fn constructor_fmin_reg<C: Context>( 7011 ctx: &mut C, 7012 arg0: Type, 7013 arg1: Reg, 7014 arg2: Reg, 7015 ) -> Option<Reg> { 7016 let pattern0_0 = arg0; 7017 let pattern1_0 = arg1; 7018 let pattern2_0 = arg2; 7019 // Rule at src/isa/s390x/inst.isle line 3001. 7020 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7021 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7022 return Some(expr1_0); 7023 } 7024 7025 // Generated as internal constructor for term fpuop2_max. 7026 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7027 let pattern0_0 = arg0; 7028 if pattern0_0 == F32 { 7029 // Rule at src/isa/s390x/inst.isle line 3007. 7030 let expr0_0 = FPUOp2::Max32; 7031 return Some(expr0_0); 7032 } 7033 if pattern0_0 == F64 { 7034 // Rule at src/isa/s390x/inst.isle line 3008. 7035 let expr0_0 = FPUOp2::Max64; 7036 return Some(expr0_0); 7037 } 7038 return None; 7039 } 7040 7041 // Generated as internal constructor for term fmax_reg. 7042 pub fn constructor_fmax_reg<C: Context>( 7043 ctx: &mut C, 7044 arg0: Type, 7045 arg1: Reg, 7046 arg2: Reg, 7047 ) -> Option<Reg> { 7048 let pattern0_0 = arg0; 7049 let pattern1_0 = arg1; 7050 let pattern2_0 = arg2; 7051 // Rule at src/isa/s390x/inst.isle line 3011. 7052 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7053 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7054 return Some(expr1_0); 7055 } 7056 7057 // Generated as internal constructor for term fpuop3_fma. 7058 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7059 let pattern0_0 = arg0; 7060 if pattern0_0 == F32 { 7061 // Rule at src/isa/s390x/inst.isle line 3017. 7062 let expr0_0 = FPUOp3::MAdd32; 7063 return Some(expr0_0); 7064 } 7065 if pattern0_0 == F64 { 7066 // Rule at src/isa/s390x/inst.isle line 3018. 7067 let expr0_0 = FPUOp3::MAdd64; 7068 return Some(expr0_0); 7069 } 7070 return None; 7071 } 7072 7073 // Generated as internal constructor for term fma_reg. 7074 pub fn constructor_fma_reg<C: Context>( 7075 ctx: &mut C, 7076 arg0: Type, 7077 arg1: Reg, 7078 arg2: Reg, 7079 arg3: Reg, 7080 ) -> Option<Reg> { 7081 let pattern0_0 = arg0; 7082 let pattern1_0 = arg1; 7083 let pattern2_0 = arg2; 7084 let pattern3_0 = arg3; 7085 // Rule at src/isa/s390x/inst.isle line 3021. 7086 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7087 let expr1_0 = constructor_fpu_rrrr( 7088 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7089 )?; 7090 return Some(expr1_0); 7091 } 7092 7093 // Generated as internal constructor for term fpuop1_sqrt. 7094 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7095 let pattern0_0 = arg0; 7096 if pattern0_0 == F32 { 7097 // Rule at src/isa/s390x/inst.isle line 3027. 7098 let expr0_0 = FPUOp1::Sqrt32; 7099 return Some(expr0_0); 7100 } 7101 if pattern0_0 == F64 { 7102 // Rule at src/isa/s390x/inst.isle line 3028. 7103 let expr0_0 = FPUOp1::Sqrt64; 7104 return Some(expr0_0); 7105 } 7106 return None; 7107 } 7108 7109 // Generated as internal constructor for term sqrt_reg. 7110 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7111 let pattern0_0 = arg0; 7112 let pattern1_0 = arg1; 7113 // Rule at src/isa/s390x/inst.isle line 3031. 7114 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7115 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7116 return Some(expr1_0); 7117 } 7118 7119 // Generated as internal constructor for term fpuop1_neg. 7120 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7121 let pattern0_0 = arg0; 7122 if pattern0_0 == F32 { 7123 // Rule at src/isa/s390x/inst.isle line 3037. 7124 let expr0_0 = FPUOp1::Neg32; 7125 return Some(expr0_0); 7126 } 7127 if pattern0_0 == F64 { 7128 // Rule at src/isa/s390x/inst.isle line 3038. 7129 let expr0_0 = FPUOp1::Neg64; 7130 return Some(expr0_0); 7131 } 7132 return None; 7133 } 7134 7135 // Generated as internal constructor for term fneg_reg. 7136 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7137 let pattern0_0 = arg0; 7138 let pattern1_0 = arg1; 7139 // Rule at src/isa/s390x/inst.isle line 3041. 7140 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7141 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7142 return Some(expr1_0); 7143 } 7144 7145 // Generated as internal constructor for term fpuop1_abs. 7146 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7147 let pattern0_0 = arg0; 7148 if pattern0_0 == F32 { 7149 // Rule at src/isa/s390x/inst.isle line 3047. 7150 let expr0_0 = FPUOp1::Abs32; 7151 return Some(expr0_0); 7152 } 7153 if pattern0_0 == F64 { 7154 // Rule at src/isa/s390x/inst.isle line 3048. 7155 let expr0_0 = FPUOp1::Abs64; 7156 return Some(expr0_0); 7157 } 7158 return None; 7159 } 7160 7161 // Generated as internal constructor for term fabs_reg. 7162 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7163 let pattern0_0 = arg0; 7164 let pattern1_0 = arg1; 7165 // Rule at src/isa/s390x/inst.isle line 3051. 7166 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7167 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7168 return Some(expr1_0); 7169 } 7170 7171 // Generated as internal constructor for term fpuroundmode_ceil. 7172 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7173 let pattern0_0 = arg0; 7174 if pattern0_0 == F32 { 7175 // Rule at src/isa/s390x/inst.isle line 3057. 7176 let expr0_0 = FpuRoundMode::Plus32; 7177 return Some(expr0_0); 7178 } 7179 if pattern0_0 == F64 { 7180 // Rule at src/isa/s390x/inst.isle line 3058. 7181 let expr0_0 = FpuRoundMode::Plus64; 7182 return Some(expr0_0); 7183 } 7184 return None; 7185 } 7186 7187 // Generated as internal constructor for term ceil_reg. 7188 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7189 let pattern0_0 = arg0; 7190 let pattern1_0 = arg1; 7191 // Rule at src/isa/s390x/inst.isle line 3061. 7192 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7193 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7194 return Some(expr1_0); 7195 } 7196 7197 // Generated as internal constructor for term fpuroundmode_floor. 7198 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7199 let pattern0_0 = arg0; 7200 if pattern0_0 == F32 { 7201 // Rule at src/isa/s390x/inst.isle line 3067. 7202 let expr0_0 = FpuRoundMode::Minus32; 7203 return Some(expr0_0); 7204 } 7205 if pattern0_0 == F64 { 7206 // Rule at src/isa/s390x/inst.isle line 3068. 7207 let expr0_0 = FpuRoundMode::Minus64; 7208 return Some(expr0_0); 7209 } 7210 return None; 7211 } 7212 7213 // Generated as internal constructor for term floor_reg. 7214 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7215 let pattern0_0 = arg0; 7216 let pattern1_0 = arg1; 7217 // Rule at src/isa/s390x/inst.isle line 3071. 7218 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7219 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7220 return Some(expr1_0); 7221 } 7222 7223 // Generated as internal constructor for term fpuroundmode_trunc. 7224 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7225 let pattern0_0 = arg0; 7226 if pattern0_0 == F32 { 7227 // Rule at src/isa/s390x/inst.isle line 3077. 7228 let expr0_0 = FpuRoundMode::Zero32; 7229 return Some(expr0_0); 7230 } 7231 if pattern0_0 == F64 { 7232 // Rule at src/isa/s390x/inst.isle line 3078. 7233 let expr0_0 = FpuRoundMode::Zero64; 7234 return Some(expr0_0); 7235 } 7236 return None; 7237 } 7238 7239 // Generated as internal constructor for term trunc_reg. 7240 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7241 let pattern0_0 = arg0; 7242 let pattern1_0 = arg1; 7243 // Rule at src/isa/s390x/inst.isle line 3081. 7244 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7245 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7246 return Some(expr1_0); 7247 } 7248 7249 // Generated as internal constructor for term fpuroundmode_nearest. 7250 pub fn constructor_fpuroundmode_nearest<C: Context>( 7251 ctx: &mut C, 7252 arg0: Type, 7253 ) -> Option<FpuRoundMode> { 7254 let pattern0_0 = arg0; 7255 if pattern0_0 == F32 { 7256 // Rule at src/isa/s390x/inst.isle line 3087. 7257 let expr0_0 = FpuRoundMode::Nearest32; 7258 return Some(expr0_0); 7259 } 7260 if pattern0_0 == F64 { 7261 // Rule at src/isa/s390x/inst.isle line 3088. 7262 let expr0_0 = FpuRoundMode::Nearest64; 7263 return Some(expr0_0); 7264 } 7265 return None; 7266 } 7267 7268 // Generated as internal constructor for term nearest_reg. 7269 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7270 let pattern0_0 = arg0; 7271 let pattern1_0 = arg1; 7272 // Rule at src/isa/s390x/inst.isle line 3091. 7273 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7274 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7275 return Some(expr1_0); 7276 } 7277 7278 // Generated as internal constructor for term fpuop1_promote. 7279 pub fn constructor_fpuop1_promote<C: Context>( 7280 ctx: &mut C, 7281 arg0: Type, 7282 arg1: Type, 7283 ) -> Option<FPUOp1> { 7284 let pattern0_0 = arg0; 7285 if pattern0_0 == F64 { 7286 let pattern2_0 = arg1; 7287 if pattern2_0 == F32 { 7288 // Rule at src/isa/s390x/inst.isle line 3097. 7289 let expr0_0 = FPUOp1::Cvt32To64; 7290 return Some(expr0_0); 7291 } 7292 } 7293 return None; 7294 } 7295 7296 // Generated as internal constructor for term fpromote_reg. 7297 pub fn constructor_fpromote_reg<C: Context>( 7298 ctx: &mut C, 7299 arg0: Type, 7300 arg1: Type, 7301 arg2: Reg, 7302 ) -> Option<Reg> { 7303 let pattern0_0 = arg0; 7304 let pattern1_0 = arg1; 7305 let pattern2_0 = arg2; 7306 // Rule at src/isa/s390x/inst.isle line 3100. 7307 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7308 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7309 return Some(expr1_0); 7310 } 7311 7312 // Generated as internal constructor for term fpuop1_demote. 7313 pub fn constructor_fpuop1_demote<C: Context>( 7314 ctx: &mut C, 7315 arg0: Type, 7316 arg1: Type, 7317 ) -> Option<FPUOp1> { 7318 let pattern0_0 = arg0; 7319 if pattern0_0 == F32 { 7320 let pattern2_0 = arg1; 7321 if pattern2_0 == F64 { 7322 // Rule at src/isa/s390x/inst.isle line 3107. 7323 let expr0_0 = FPUOp1::Cvt64To32; 7324 return Some(expr0_0); 7325 } 7326 } 7327 return None; 7328 } 7329 7330 // Generated as internal constructor for term fdemote_reg. 7331 pub fn constructor_fdemote_reg<C: Context>( 7332 ctx: &mut C, 7333 arg0: Type, 7334 arg1: Type, 7335 arg2: Reg, 7336 ) -> Option<Reg> { 7337 let pattern0_0 = arg0; 7338 let pattern1_0 = arg1; 7339 let pattern2_0 = arg2; 7340 // Rule at src/isa/s390x/inst.isle line 3110. 7341 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7342 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7343 return Some(expr1_0); 7344 } 7345 7346 // Generated as internal constructor for term uint_to_fpu_op. 7347 pub fn constructor_uint_to_fpu_op<C: Context>( 7348 ctx: &mut C, 7349 arg0: Type, 7350 arg1: Type, 7351 ) -> Option<IntToFpuOp> { 7352 let pattern0_0 = arg0; 7353 if pattern0_0 == F32 { 7354 let pattern2_0 = arg1; 7355 if pattern2_0 == I32 { 7356 // Rule at src/isa/s390x/inst.isle line 3117. 7357 let expr0_0 = IntToFpuOp::U32ToF32; 7358 return Some(expr0_0); 7359 } 7360 if pattern2_0 == I64 { 7361 // Rule at src/isa/s390x/inst.isle line 3119. 7362 let expr0_0 = IntToFpuOp::U64ToF32; 7363 return Some(expr0_0); 7364 } 7365 } 7366 if pattern0_0 == F64 { 7367 let pattern2_0 = arg1; 7368 if pattern2_0 == I32 { 7369 // Rule at src/isa/s390x/inst.isle line 3118. 7370 let expr0_0 = IntToFpuOp::U32ToF64; 7371 return Some(expr0_0); 7372 } 7373 if pattern2_0 == I64 { 7374 // Rule at src/isa/s390x/inst.isle line 3120. 7375 let expr0_0 = IntToFpuOp::U64ToF64; 7376 return Some(expr0_0); 7377 } 7378 } 7379 return None; 7380 } 7381 7382 // Generated as internal constructor for term fcvt_from_uint_reg. 7383 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7384 ctx: &mut C, 7385 arg0: Type, 7386 arg1: Type, 7387 arg2: Reg, 7388 ) -> Option<Reg> { 7389 let pattern0_0 = arg0; 7390 let pattern1_0 = arg1; 7391 let pattern2_0 = arg2; 7392 // Rule at src/isa/s390x/inst.isle line 3123. 7393 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7394 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7395 return Some(expr1_0); 7396 } 7397 7398 // Generated as internal constructor for term sint_to_fpu_op. 7399 pub fn constructor_sint_to_fpu_op<C: Context>( 7400 ctx: &mut C, 7401 arg0: Type, 7402 arg1: Type, 7403 ) -> Option<IntToFpuOp> { 7404 let pattern0_0 = arg0; 7405 if pattern0_0 == F32 { 7406 let pattern2_0 = arg1; 7407 if pattern2_0 == I32 { 7408 // Rule at src/isa/s390x/inst.isle line 3130. 7409 let expr0_0 = IntToFpuOp::I32ToF32; 7410 return Some(expr0_0); 7411 } 7412 if pattern2_0 == I64 { 7413 // Rule at src/isa/s390x/inst.isle line 3132. 7414 let expr0_0 = IntToFpuOp::I64ToF32; 7415 return Some(expr0_0); 7416 } 7417 } 7418 if pattern0_0 == F64 { 7419 let pattern2_0 = arg1; 7420 if pattern2_0 == I32 { 7421 // Rule at src/isa/s390x/inst.isle line 3131. 7422 let expr0_0 = IntToFpuOp::I32ToF64; 7423 return Some(expr0_0); 7424 } 7425 if pattern2_0 == I64 { 7426 // Rule at src/isa/s390x/inst.isle line 3133. 7427 let expr0_0 = IntToFpuOp::I64ToF64; 7428 return Some(expr0_0); 7429 } 7430 } 7431 return None; 7432 } 7433 7434 // Generated as internal constructor for term fcvt_from_sint_reg. 7435 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7436 ctx: &mut C, 7437 arg0: Type, 7438 arg1: Type, 7439 arg2: Reg, 7440 ) -> Option<Reg> { 7441 let pattern0_0 = arg0; 7442 let pattern1_0 = arg1; 7443 let pattern2_0 = arg2; 7444 // Rule at src/isa/s390x/inst.isle line 3136. 7445 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7446 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7447 return Some(expr1_0); 7448 } 7449 7450 // Generated as internal constructor for term fpu_to_uint_op. 7451 pub fn constructor_fpu_to_uint_op<C: Context>( 7452 ctx: &mut C, 7453 arg0: Type, 7454 arg1: Type, 7455 ) -> Option<FpuToIntOp> { 7456 let pattern0_0 = arg0; 7457 if pattern0_0 == I32 { 7458 let pattern2_0 = arg1; 7459 if pattern2_0 == F32 { 7460 // Rule at src/isa/s390x/inst.isle line 3143. 7461 let expr0_0 = FpuToIntOp::F32ToU32; 7462 return Some(expr0_0); 7463 } 7464 if pattern2_0 == F64 { 7465 // Rule at src/isa/s390x/inst.isle line 3144. 7466 let expr0_0 = FpuToIntOp::F64ToU32; 7467 return Some(expr0_0); 7468 } 7469 } 7470 if pattern0_0 == I64 { 7471 let pattern2_0 = arg1; 7472 if pattern2_0 == F32 { 7473 // Rule at src/isa/s390x/inst.isle line 3145. 7474 let expr0_0 = FpuToIntOp::F32ToU64; 7475 return Some(expr0_0); 7476 } 7477 if pattern2_0 == F64 { 7478 // Rule at src/isa/s390x/inst.isle line 3146. 7479 let expr0_0 = FpuToIntOp::F64ToU64; 7480 return Some(expr0_0); 7481 } 7482 } 7483 return None; 7484 } 7485 7486 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7487 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7488 ctx: &mut C, 7489 arg0: Type, 7490 arg1: Type, 7491 arg2: Reg, 7492 ) -> Option<ProducesFlags> { 7493 let pattern0_0 = arg0; 7494 let pattern1_0 = arg1; 7495 let pattern2_0 = arg2; 7496 // Rule at src/isa/s390x/inst.isle line 3149. 7497 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7498 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7499 return Some(expr1_0); 7500 } 7501 7502 // Generated as internal constructor for term fcvt_to_uint_reg. 7503 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7504 ctx: &mut C, 7505 arg0: Type, 7506 arg1: Type, 7507 arg2: Reg, 7508 ) -> Option<Reg> { 7509 let pattern0_0 = arg0; 7510 let pattern1_0 = arg1; 7511 let pattern2_0 = arg2; 7512 // Rule at src/isa/s390x/inst.isle line 3153. 7513 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7514 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7515 return Some(expr1_0); 7516 } 7517 7518 // Generated as internal constructor for term fpu_to_sint_op. 7519 pub fn constructor_fpu_to_sint_op<C: Context>( 7520 ctx: &mut C, 7521 arg0: Type, 7522 arg1: Type, 7523 ) -> Option<FpuToIntOp> { 7524 let pattern0_0 = arg0; 7525 if pattern0_0 == I32 { 7526 let pattern2_0 = arg1; 7527 if pattern2_0 == F32 { 7528 // Rule at src/isa/s390x/inst.isle line 3160. 7529 let expr0_0 = FpuToIntOp::F32ToI32; 7530 return Some(expr0_0); 7531 } 7532 if pattern2_0 == F64 { 7533 // Rule at src/isa/s390x/inst.isle line 3161. 7534 let expr0_0 = FpuToIntOp::F64ToI32; 7535 return Some(expr0_0); 7536 } 7537 } 7538 if pattern0_0 == I64 { 7539 let pattern2_0 = arg1; 7540 if pattern2_0 == F32 { 7541 // Rule at src/isa/s390x/inst.isle line 3162. 7542 let expr0_0 = FpuToIntOp::F32ToI64; 7543 return Some(expr0_0); 7544 } 7545 if pattern2_0 == F64 { 7546 // Rule at src/isa/s390x/inst.isle line 3163. 7547 let expr0_0 = FpuToIntOp::F64ToI64; 7548 return Some(expr0_0); 7549 } 7550 } 7551 return None; 7552 } 7553 7554 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7555 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7556 ctx: &mut C, 7557 arg0: Type, 7558 arg1: Type, 7559 arg2: Reg, 7560 ) -> Option<ProducesFlags> { 7561 let pattern0_0 = arg0; 7562 let pattern1_0 = arg1; 7563 let pattern2_0 = arg2; 7564 // Rule at src/isa/s390x/inst.isle line 3166. 7565 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7566 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7567 return Some(expr1_0); 7568 } 7569 7570 // Generated as internal constructor for term fcvt_to_sint_reg. 7571 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7572 ctx: &mut C, 7573 arg0: Type, 7574 arg1: Type, 7575 arg2: Reg, 7576 ) -> Option<Reg> { 7577 let pattern0_0 = arg0; 7578 let pattern1_0 = arg1; 7579 let pattern2_0 = arg2; 7580 // Rule at src/isa/s390x/inst.isle line 3170. 7581 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7582 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7583 return Some(expr1_0); 7584 } 7585 7586 // Generated as internal constructor for term cmpop_cmps. 7587 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7588 let pattern0_0 = arg0; 7589 if pattern0_0 == I32 { 7590 // Rule at src/isa/s390x/inst.isle line 3177. 7591 let expr0_0 = CmpOp::CmpS32; 7592 return Some(expr0_0); 7593 } 7594 if pattern0_0 == I64 { 7595 // Rule at src/isa/s390x/inst.isle line 3178. 7596 let expr0_0 = CmpOp::CmpS64; 7597 return Some(expr0_0); 7598 } 7599 return None; 7600 } 7601 7602 // Generated as internal constructor for term cmpop_cmps_sext16. 7603 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7604 let pattern0_0 = arg0; 7605 if pattern0_0 == I32 { 7606 // Rule at src/isa/s390x/inst.isle line 3181. 7607 let expr0_0 = CmpOp::CmpS32Ext16; 7608 return Some(expr0_0); 7609 } 7610 if pattern0_0 == I64 { 7611 // Rule at src/isa/s390x/inst.isle line 3182. 7612 let expr0_0 = CmpOp::CmpS64Ext16; 7613 return Some(expr0_0); 7614 } 7615 return None; 7616 } 7617 7618 // Generated as internal constructor for term cmpop_cmps_sext32. 7619 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7620 let pattern0_0 = arg0; 7621 if pattern0_0 == I64 { 7622 // Rule at src/isa/s390x/inst.isle line 3185. 7623 let expr0_0 = CmpOp::CmpS64Ext32; 7624 return Some(expr0_0); 7625 } 7626 return None; 7627 } 7628 7629 // Generated as internal constructor for term icmps_reg. 7630 pub fn constructor_icmps_reg<C: Context>( 7631 ctx: &mut C, 7632 arg0: Type, 7633 arg1: Reg, 7634 arg2: Reg, 7635 ) -> Option<ProducesFlags> { 7636 let pattern0_0 = arg0; 7637 let pattern1_0 = arg1; 7638 let pattern2_0 = arg2; 7639 // Rule at src/isa/s390x/inst.isle line 3188. 7640 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7641 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7642 return Some(expr1_0); 7643 } 7644 7645 // Generated as internal constructor for term icmps_reg_sext32. 7646 pub fn constructor_icmps_reg_sext32<C: Context>( 7647 ctx: &mut C, 7648 arg0: Type, 7649 arg1: Reg, 7650 arg2: Reg, 7651 ) -> Option<ProducesFlags> { 7652 let pattern0_0 = arg0; 7653 let pattern1_0 = arg1; 7654 let pattern2_0 = arg2; 7655 // Rule at src/isa/s390x/inst.isle line 3191. 7656 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7657 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7658 return Some(expr1_0); 7659 } 7660 7661 // Generated as internal constructor for term icmps_simm16. 7662 pub fn constructor_icmps_simm16<C: Context>( 7663 ctx: &mut C, 7664 arg0: Type, 7665 arg1: Reg, 7666 arg2: i16, 7667 ) -> Option<ProducesFlags> { 7668 let pattern0_0 = arg0; 7669 let pattern1_0 = arg1; 7670 let pattern2_0 = arg2; 7671 // Rule at src/isa/s390x/inst.isle line 3194. 7672 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7673 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7674 return Some(expr1_0); 7675 } 7676 7677 // Generated as internal constructor for term icmps_simm32. 7678 pub fn constructor_icmps_simm32<C: Context>( 7679 ctx: &mut C, 7680 arg0: Type, 7681 arg1: Reg, 7682 arg2: i32, 7683 ) -> Option<ProducesFlags> { 7684 let pattern0_0 = arg0; 7685 let pattern1_0 = arg1; 7686 let pattern2_0 = arg2; 7687 // Rule at src/isa/s390x/inst.isle line 3197. 7688 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7689 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7690 return Some(expr1_0); 7691 } 7692 7693 // Generated as internal constructor for term icmps_mem. 7694 pub fn constructor_icmps_mem<C: Context>( 7695 ctx: &mut C, 7696 arg0: Type, 7697 arg1: Reg, 7698 arg2: &MemArg, 7699 ) -> Option<ProducesFlags> { 7700 let pattern0_0 = arg0; 7701 let pattern1_0 = arg1; 7702 let pattern2_0 = arg2; 7703 // Rule at src/isa/s390x/inst.isle line 3200. 7704 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7705 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7706 return Some(expr1_0); 7707 } 7708 7709 // Generated as internal constructor for term icmps_mem_sext16. 7710 pub fn constructor_icmps_mem_sext16<C: Context>( 7711 ctx: &mut C, 7712 arg0: Type, 7713 arg1: Reg, 7714 arg2: &MemArg, 7715 ) -> Option<ProducesFlags> { 7716 let pattern0_0 = arg0; 7717 let pattern1_0 = arg1; 7718 let pattern2_0 = arg2; 7719 // Rule at src/isa/s390x/inst.isle line 3203. 7720 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7721 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7722 return Some(expr1_0); 7723 } 7724 7725 // Generated as internal constructor for term icmps_mem_sext32. 7726 pub fn constructor_icmps_mem_sext32<C: Context>( 7727 ctx: &mut C, 7728 arg0: Type, 7729 arg1: Reg, 7730 arg2: &MemArg, 7731 ) -> Option<ProducesFlags> { 7732 let pattern0_0 = arg0; 7733 let pattern1_0 = arg1; 7734 let pattern2_0 = arg2; 7735 // Rule at src/isa/s390x/inst.isle line 3206. 7736 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7737 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7738 return Some(expr1_0); 7739 } 7740 7741 // Generated as internal constructor for term cmpop_cmpu. 7742 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7743 let pattern0_0 = arg0; 7744 if pattern0_0 == I32 { 7745 // Rule at src/isa/s390x/inst.isle line 3212. 7746 let expr0_0 = CmpOp::CmpL32; 7747 return Some(expr0_0); 7748 } 7749 if pattern0_0 == I64 { 7750 // Rule at src/isa/s390x/inst.isle line 3213. 7751 let expr0_0 = CmpOp::CmpL64; 7752 return Some(expr0_0); 7753 } 7754 return None; 7755 } 7756 7757 // Generated as internal constructor for term cmpop_cmpu_zext16. 7758 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7759 let pattern0_0 = arg0; 7760 if pattern0_0 == I32 { 7761 // Rule at src/isa/s390x/inst.isle line 3216. 7762 let expr0_0 = CmpOp::CmpL32Ext16; 7763 return Some(expr0_0); 7764 } 7765 if pattern0_0 == I64 { 7766 // Rule at src/isa/s390x/inst.isle line 3217. 7767 let expr0_0 = CmpOp::CmpL64Ext16; 7768 return Some(expr0_0); 7769 } 7770 return None; 7771 } 7772 7773 // Generated as internal constructor for term cmpop_cmpu_zext32. 7774 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7775 let pattern0_0 = arg0; 7776 if pattern0_0 == I64 { 7777 // Rule at src/isa/s390x/inst.isle line 3220. 7778 let expr0_0 = CmpOp::CmpL64Ext32; 7779 return Some(expr0_0); 7780 } 7781 return None; 7782 } 7783 7784 // Generated as internal constructor for term icmpu_reg. 7785 pub fn constructor_icmpu_reg<C: Context>( 7786 ctx: &mut C, 7787 arg0: Type, 7788 arg1: Reg, 7789 arg2: Reg, 7790 ) -> Option<ProducesFlags> { 7791 let pattern0_0 = arg0; 7792 let pattern1_0 = arg1; 7793 let pattern2_0 = arg2; 7794 // Rule at src/isa/s390x/inst.isle line 3223. 7795 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7796 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7797 return Some(expr1_0); 7798 } 7799 7800 // Generated as internal constructor for term icmpu_reg_zext32. 7801 pub fn constructor_icmpu_reg_zext32<C: Context>( 7802 ctx: &mut C, 7803 arg0: Type, 7804 arg1: Reg, 7805 arg2: Reg, 7806 ) -> Option<ProducesFlags> { 7807 let pattern0_0 = arg0; 7808 let pattern1_0 = arg1; 7809 let pattern2_0 = arg2; 7810 // Rule at src/isa/s390x/inst.isle line 3226. 7811 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7812 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7813 return Some(expr1_0); 7814 } 7815 7816 // Generated as internal constructor for term icmpu_uimm32. 7817 pub fn constructor_icmpu_uimm32<C: Context>( 7818 ctx: &mut C, 7819 arg0: Type, 7820 arg1: Reg, 7821 arg2: u32, 7822 ) -> Option<ProducesFlags> { 7823 let pattern0_0 = arg0; 7824 let pattern1_0 = arg1; 7825 let pattern2_0 = arg2; 7826 // Rule at src/isa/s390x/inst.isle line 3229. 7827 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7828 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7829 return Some(expr1_0); 7830 } 7831 7832 // Generated as internal constructor for term icmpu_mem. 7833 pub fn constructor_icmpu_mem<C: Context>( 7834 ctx: &mut C, 7835 arg0: Type, 7836 arg1: Reg, 7837 arg2: &MemArg, 7838 ) -> Option<ProducesFlags> { 7839 let pattern0_0 = arg0; 7840 let pattern1_0 = arg1; 7841 let pattern2_0 = arg2; 7842 // Rule at src/isa/s390x/inst.isle line 3232. 7843 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7844 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7845 return Some(expr1_0); 7846 } 7847 7848 // Generated as internal constructor for term icmpu_mem_zext16. 7849 pub fn constructor_icmpu_mem_zext16<C: Context>( 7850 ctx: &mut C, 7851 arg0: Type, 7852 arg1: Reg, 7853 arg2: &MemArg, 7854 ) -> Option<ProducesFlags> { 7855 let pattern0_0 = arg0; 7856 let pattern1_0 = arg1; 7857 let pattern2_0 = arg2; 7858 // Rule at src/isa/s390x/inst.isle line 3235. 7859 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7860 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7861 return Some(expr1_0); 7862 } 7863 7864 // Generated as internal constructor for term icmpu_mem_zext32. 7865 pub fn constructor_icmpu_mem_zext32<C: Context>( 7866 ctx: &mut C, 7867 arg0: Type, 7868 arg1: Reg, 7869 arg2: &MemArg, 7870 ) -> Option<ProducesFlags> { 7871 let pattern0_0 = arg0; 7872 let pattern1_0 = arg1; 7873 let pattern2_0 = arg2; 7874 // Rule at src/isa/s390x/inst.isle line 3238. 7875 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7876 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7877 return Some(expr1_0); 7878 } 7879 7880 // Generated as internal constructor for term fcmp_reg. 7881 pub fn constructor_fcmp_reg<C: Context>( 7882 ctx: &mut C, 7883 arg0: Type, 7884 arg1: Reg, 7885 arg2: Reg, 7886 ) -> Option<ProducesFlags> { 7887 let pattern0_0 = arg0; 7888 if pattern0_0 == F32 { 7889 let pattern2_0 = arg1; 7890 let pattern3_0 = arg2; 7891 // Rule at src/isa/s390x/inst.isle line 3244. 7892 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7893 return Some(expr0_0); 7894 } 7895 if pattern0_0 == F64 { 7896 let pattern2_0 = arg1; 7897 let pattern3_0 = arg2; 7898 // Rule at src/isa/s390x/inst.isle line 3245. 7899 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7900 return Some(expr0_0); 7901 } 7902 return None; 7903 } 7904 7905 // Generated as internal constructor for term lower. 7906 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7907 let pattern0_0 = arg0; 7908 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7909 match &pattern1_0 { 7910 &InstructionData::NullAry { 7911 opcode: ref pattern2_0, 7912 } => { 7913 match pattern2_0 { 7914 &Opcode::Debugtrap => { 7915 // Rule at src/isa/s390x/lower.isle line 2169. 7916 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7917 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7918 return Some(expr1_0); 7919 } 7920 &Opcode::Nop => { 7921 // Rule at src/isa/s390x/lower.isle line 47. 7922 let expr0_0 = C::invalid_reg(ctx); 7923 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 7924 return Some(expr1_0); 7925 } 7926 &Opcode::Fence => { 7927 // Rule at src/isa/s390x/lower.isle line 1882. 7928 let expr0_0 = constructor_fence_impl(ctx)?; 7929 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7930 return Some(expr1_0); 7931 } 7932 _ => {} 7933 } 7934 } 7935 &InstructionData::FuncAddr { 7936 opcode: ref pattern2_0, 7937 func_ref: pattern2_1, 7938 } => { 7939 if let &Opcode::FuncAddr = pattern2_0 { 7940 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 7941 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 7942 // Rule at src/isa/s390x/lower.isle line 1159. 7943 let expr0_0: i32 = 0; 7944 let expr1_0 = C::memflags_trusted(ctx); 7945 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 7946 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 7947 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 7948 return Some(expr4_0); 7949 } 7950 // Rule at src/isa/s390x/lower.isle line 1163. 7951 let expr0_0: i64 = 0; 7952 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 7953 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 7954 return Some(expr2_0); 7955 } 7956 } 7957 &InstructionData::UnaryGlobalValue { 7958 opcode: ref pattern2_0, 7959 global_value: pattern2_1, 7960 } => { 7961 if let &Opcode::SymbolValue = pattern2_0 { 7962 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 7963 C::symbol_value_data(ctx, pattern2_1) 7964 { 7965 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 7966 let pattern6_0 = 0; 7967 if let Some(pattern7_0) = 7968 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 7969 { 7970 // Rule at src/isa/s390x/lower.isle line 1170. 7971 let expr0_0 = C::memflags_trusted(ctx); 7972 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 7973 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 7974 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 7975 return Some(expr3_0); 7976 } 7977 } 7978 // Rule at src/isa/s390x/lower.isle line 1175. 7979 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 7980 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 7981 return Some(expr1_0); 7982 } 7983 } 7984 } 7985 &InstructionData::UnaryIeee32 { 7986 opcode: ref pattern2_0, 7987 imm: pattern2_1, 7988 } => { 7989 if let &Opcode::F32const = pattern2_0 { 7990 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 7991 // Rule at src/isa/s390x/lower.isle line 29. 7992 let expr0_0: Type = F32; 7993 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 7994 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 7995 return Some(expr2_0); 7996 } 7997 } 7998 &InstructionData::UnaryIeee64 { 7999 opcode: ref pattern2_0, 8000 imm: pattern2_1, 8001 } => { 8002 if let &Opcode::F64const = pattern2_0 { 8003 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8004 // Rule at src/isa/s390x/lower.isle line 35. 8005 let expr0_0: Type = F64; 8006 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8007 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8008 return Some(expr2_0); 8009 } 8010 } 8011 &InstructionData::Trap { 8012 opcode: ref pattern2_0, 8013 code: ref pattern2_1, 8014 } => { 8015 match pattern2_0 { 8016 &Opcode::Trap => { 8017 // Rule at src/isa/s390x/lower.isle line 2139. 8018 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8019 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8020 return Some(expr1_0); 8021 } 8022 &Opcode::ResumableTrap => { 8023 // Rule at src/isa/s390x/lower.isle line 2145. 8024 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8025 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8026 return Some(expr1_0); 8027 } 8028 _ => {} 8029 } 8030 } 8031 &InstructionData::StoreNoOffset { 8032 opcode: ref pattern2_0, 8033 args: ref pattern2_1, 8034 flags: pattern2_2, 8035 } => { 8036 if let &Opcode::AtomicStore = pattern2_0 { 8037 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8038 let pattern5_0 = C::value_type(ctx, pattern4_0); 8039 if pattern5_0 == I8 { 8040 // Rule at src/isa/s390x/lower.isle line 1863. 8041 let expr0_0 = C::zero_offset(ctx); 8042 let expr1_0 = 8043 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8044 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8045 return Some(expr2_0); 8046 } 8047 if pattern5_0 == I16 { 8048 // Rule at src/isa/s390x/lower.isle line 1867. 8049 let expr0_0 = C::zero_offset(ctx); 8050 let expr1_0 = constructor_istore16_impl( 8051 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8052 )?; 8053 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8054 return Some(expr2_0); 8055 } 8056 if pattern5_0 == I32 { 8057 // Rule at src/isa/s390x/lower.isle line 1871. 8058 let expr0_0 = C::zero_offset(ctx); 8059 let expr1_0 = constructor_istore32_impl( 8060 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8061 )?; 8062 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8063 return Some(expr2_0); 8064 } 8065 if pattern5_0 == I64 { 8066 // Rule at src/isa/s390x/lower.isle line 1875. 8067 let expr0_0 = C::zero_offset(ctx); 8068 let expr1_0 = constructor_istore64_impl( 8069 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8070 )?; 8071 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8072 return Some(expr2_0); 8073 } 8074 } 8075 } 8076 &InstructionData::Store { 8077 opcode: ref pattern2_0, 8078 args: ref pattern2_1, 8079 flags: pattern2_2, 8080 offset: pattern2_3, 8081 } => { 8082 match pattern2_0 { 8083 &Opcode::Store => { 8084 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8085 let pattern5_0 = C::value_type(ctx, pattern4_0); 8086 if pattern5_0 == I8 { 8087 // Rule at src/isa/s390x/lower.isle line 1354. 8088 let expr0_0 = constructor_istore8_impl( 8089 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8090 )?; 8091 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8092 return Some(expr1_0); 8093 } 8094 if pattern5_0 == I16 { 8095 // Rule at src/isa/s390x/lower.isle line 1358. 8096 let expr0_0 = constructor_istore16_impl( 8097 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8098 )?; 8099 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8100 return Some(expr1_0); 8101 } 8102 if pattern5_0 == I32 { 8103 // Rule at src/isa/s390x/lower.isle line 1362. 8104 let expr0_0 = constructor_istore32_impl( 8105 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8106 )?; 8107 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8108 return Some(expr1_0); 8109 } 8110 if pattern5_0 == I64 { 8111 // Rule at src/isa/s390x/lower.isle line 1366. 8112 let expr0_0 = constructor_istore64_impl( 8113 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8114 )?; 8115 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8116 return Some(expr1_0); 8117 } 8118 if pattern5_0 == R64 { 8119 // Rule at src/isa/s390x/lower.isle line 1370. 8120 let expr0_0 = constructor_istore64_impl( 8121 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8122 )?; 8123 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8124 return Some(expr1_0); 8125 } 8126 if pattern5_0 == F32 { 8127 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8128 // Rule at src/isa/s390x/lower.isle line 1374. 8129 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8130 let expr1_0 = 8131 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8132 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8133 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8134 return Some(expr3_0); 8135 } 8136 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8137 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8138 // Rule at src/isa/s390x/lower.isle line 1380. 8139 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8140 let expr1_0 = constructor_lower_address( 8141 ctx, pattern2_2, pattern4_1, pattern2_3, 8142 )?; 8143 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8144 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8145 return Some(expr3_0); 8146 } 8147 } 8148 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8149 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8150 // Rule at src/isa/s390x/lower.isle line 1386. 8151 let expr0_0: Type = I64; 8152 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8153 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8154 let expr3_0: u8 = 32; 8155 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8156 let expr5_0 = constructor_lower_address( 8157 ctx, pattern2_2, pattern4_1, pattern2_3, 8158 )?; 8159 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8160 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8161 return Some(expr7_0); 8162 } 8163 } 8164 } 8165 if pattern5_0 == F64 { 8166 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8167 // Rule at src/isa/s390x/lower.isle line 1392. 8168 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8169 let expr1_0 = 8170 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8171 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8172 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8173 return Some(expr3_0); 8174 } 8175 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8176 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8177 // Rule at src/isa/s390x/lower.isle line 1398. 8178 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8179 let expr1_0 = constructor_lower_address( 8180 ctx, pattern2_2, pattern4_1, pattern2_3, 8181 )?; 8182 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8183 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8184 return Some(expr3_0); 8185 } 8186 } 8187 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8188 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8189 // Rule at src/isa/s390x/lower.isle line 1404. 8190 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8191 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8192 let expr2_0 = constructor_lower_address( 8193 ctx, pattern2_2, pattern4_1, pattern2_3, 8194 )?; 8195 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8196 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8197 return Some(expr4_0); 8198 } 8199 } 8200 } 8201 } 8202 &Opcode::Istore8 => { 8203 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8204 // Rule at src/isa/s390x/lower.isle line 1413. 8205 let expr0_0 = constructor_istore8_impl( 8206 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8207 )?; 8208 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8209 return Some(expr1_0); 8210 } 8211 &Opcode::Istore16 => { 8212 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8213 // Rule at src/isa/s390x/lower.isle line 1431. 8214 let expr0_0 = constructor_istore16_impl( 8215 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8216 )?; 8217 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8218 return Some(expr1_0); 8219 } 8220 &Opcode::Istore32 => { 8221 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8222 // Rule at src/isa/s390x/lower.isle line 1457. 8223 let expr0_0 = constructor_istore32_impl( 8224 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8225 )?; 8226 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8227 return Some(expr1_0); 8228 } 8229 _ => {} 8230 } 8231 } 8232 &InstructionData::Unary { 8233 opcode: ref pattern2_0, 8234 arg: pattern2_1, 8235 } => { 8236 match pattern2_0 { 8237 &Opcode::Copy => { 8238 // Rule at src/isa/s390x/lower.isle line 53. 8239 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8240 return Some(expr0_0); 8241 } 8242 &Opcode::Breduce => { 8243 // Rule at src/isa/s390x/lower.isle line 752. 8244 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8245 return Some(expr0_0); 8246 } 8247 &Opcode::Ireduce => { 8248 // Rule at src/isa/s390x/lower.isle line 596. 8249 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8250 return Some(expr0_0); 8251 } 8252 _ => {} 8253 } 8254 } 8255 &InstructionData::IntCondTrap { 8256 opcode: ref pattern2_0, 8257 arg: pattern2_1, 8258 cond: ref pattern2_2, 8259 code: ref pattern2_3, 8260 } => { 8261 if let &Opcode::Trapif = pattern2_0 { 8262 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8263 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8264 if let &InstructionData::Binary { 8265 opcode: ref pattern6_0, 8266 args: ref pattern6_1, 8267 } = &pattern5_0 8268 { 8269 match pattern6_0 { 8270 &Opcode::Ifcmp => { 8271 let (pattern8_0, pattern8_1) = 8272 C::unpack_value_array_2(ctx, pattern6_1); 8273 // Rule at src/isa/s390x/lower.isle line 2181. 8274 let expr0_0: bool = false; 8275 let expr1_0 = constructor_icmp_val( 8276 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8277 )?; 8278 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8279 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8280 return Some(expr3_0); 8281 } 8282 &Opcode::IaddIfcout => { 8283 let (pattern8_0, pattern8_1) = 8284 C::unpack_value_array_2(ctx, pattern6_1); 8285 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8286 // Rule at src/isa/s390x/lower.isle line 2206. 8287 let expr0_0: u8 = 3; 8288 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8289 let expr2_0 = 8290 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8291 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8292 return Some(expr3_0); 8293 } 8294 } 8295 _ => {} 8296 } 8297 } 8298 } 8299 } 8300 } 8301 &InstructionData::CondTrap { 8302 opcode: ref pattern2_0, 8303 arg: pattern2_1, 8304 code: ref pattern2_2, 8305 } => { 8306 match pattern2_0 { 8307 &Opcode::Trapz => { 8308 // Rule at src/isa/s390x/lower.isle line 2151. 8309 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8310 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8311 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8312 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8313 return Some(expr3_0); 8314 } 8315 &Opcode::Trapnz => { 8316 // Rule at src/isa/s390x/lower.isle line 2157. 8317 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8318 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8319 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8320 return Some(expr2_0); 8321 } 8322 &Opcode::ResumableTrapnz => { 8323 // Rule at src/isa/s390x/lower.isle line 2163. 8324 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8325 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8326 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8327 return Some(expr2_0); 8328 } 8329 _ => {} 8330 } 8331 } 8332 _ => {} 8333 } 8334 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8335 let pattern2_0 = C::value_type(ctx, pattern1_0); 8336 if pattern2_0 == B1 { 8337 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8338 if let &InstructionData::Unary { 8339 opcode: ref pattern5_0, 8340 arg: pattern5_1, 8341 } = &pattern4_0 8342 { 8343 match pattern5_0 { 8344 &Opcode::IsNull => { 8345 let pattern7_0 = C::value_type(ctx, pattern5_1); 8346 if pattern7_0 == R64 { 8347 // Rule at src/isa/s390x/lower.isle line 2017. 8348 let expr0_0: Type = B1; 8349 let expr1_0: Type = I64; 8350 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8351 let expr3_0: i16 = 0; 8352 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8353 let expr5_0 = IntCC::Equal; 8354 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8355 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8356 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8357 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8358 return Some(expr9_0); 8359 } 8360 } 8361 &Opcode::IsInvalid => { 8362 let pattern7_0 = C::value_type(ctx, pattern5_1); 8363 if pattern7_0 == R64 { 8364 // Rule at src/isa/s390x/lower.isle line 2023. 8365 let expr0_0: Type = B1; 8366 let expr1_0: Type = I64; 8367 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8368 let expr3_0: i16 = -1; 8369 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8370 let expr5_0 = IntCC::Equal; 8371 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8372 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8373 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8374 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8375 return Some(expr9_0); 8376 } 8377 } 8378 _ => {} 8379 } 8380 } 8381 } 8382 if pattern2_0 == I8 { 8383 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8384 match &pattern4_0 { 8385 &InstructionData::Unary { 8386 opcode: ref pattern5_0, 8387 arg: pattern5_1, 8388 } => { 8389 if let &Opcode::Popcnt = pattern5_0 { 8390 // Rule at src/isa/s390x/lower.isle line 884. 8391 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8392 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8393 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8394 return Some(expr2_0); 8395 } 8396 } 8397 &InstructionData::LoadNoOffset { 8398 opcode: ref pattern5_0, 8399 arg: pattern5_1, 8400 flags: pattern5_2, 8401 } => { 8402 if let &Opcode::AtomicLoad = pattern5_0 { 8403 // Rule at src/isa/s390x/lower.isle line 1826. 8404 let expr0_0: Type = I8; 8405 let expr1_0 = C::zero_offset(ctx); 8406 let expr2_0 = 8407 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8408 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8409 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8410 return Some(expr4_0); 8411 } 8412 } 8413 &InstructionData::Load { 8414 opcode: ref pattern5_0, 8415 arg: pattern5_1, 8416 flags: pattern5_2, 8417 offset: pattern5_3, 8418 } => { 8419 if let &Opcode::Load = pattern5_0 { 8420 // Rule at src/isa/s390x/lower.isle line 1182. 8421 let expr0_0: Type = I8; 8422 let expr1_0 = 8423 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8424 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8425 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8426 return Some(expr3_0); 8427 } 8428 } 8429 _ => {} 8430 } 8431 } 8432 if pattern2_0 == I16 { 8433 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8434 match &pattern4_0 { 8435 &InstructionData::LoadNoOffset { 8436 opcode: ref pattern5_0, 8437 arg: pattern5_1, 8438 flags: pattern5_2, 8439 } => { 8440 if let &Opcode::AtomicLoad = pattern5_0 { 8441 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8442 // Rule at src/isa/s390x/lower.isle line 1834. 8443 let expr0_0 = C::zero_offset(ctx); 8444 let expr1_0 = 8445 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8446 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8447 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8448 return Some(expr3_0); 8449 } 8450 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8451 // Rule at src/isa/s390x/lower.isle line 1830. 8452 let expr0_0: Type = I16; 8453 let expr1_0 = C::zero_offset(ctx); 8454 let expr2_0 = 8455 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8456 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8457 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8458 return Some(expr4_0); 8459 } 8460 } 8461 } 8462 &InstructionData::Load { 8463 opcode: ref pattern5_0, 8464 arg: pattern5_1, 8465 flags: pattern5_2, 8466 offset: pattern5_3, 8467 } => { 8468 if let &Opcode::Load = pattern5_0 { 8469 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8470 // Rule at src/isa/s390x/lower.isle line 1190. 8471 let expr0_0 = 8472 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8473 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8474 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8475 return Some(expr2_0); 8476 } 8477 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8478 // Rule at src/isa/s390x/lower.isle line 1186. 8479 let expr0_0: Type = I16; 8480 let expr1_0 = 8481 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8482 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8483 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8484 return Some(expr3_0); 8485 } 8486 } 8487 } 8488 _ => {} 8489 } 8490 } 8491 if pattern2_0 == I32 { 8492 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8493 match &pattern4_0 { 8494 &InstructionData::Binary { 8495 opcode: ref pattern5_0, 8496 args: ref pattern5_1, 8497 } => { 8498 match pattern5_0 { 8499 &Opcode::Umulhi => { 8500 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8501 // Rule at src/isa/s390x/lower.isle line 252. 8502 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8503 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8504 let expr2_0: Type = I64; 8505 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8506 let expr4_0: Type = I64; 8507 let expr5_0: u8 = 32; 8508 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8509 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8510 return Some(expr7_0); 8511 } 8512 &Opcode::Smulhi => { 8513 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8514 // Rule at src/isa/s390x/lower.isle line 274. 8515 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8516 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8517 let expr2_0: Type = I64; 8518 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8519 let expr4_0: Type = I64; 8520 let expr5_0: u8 = 32; 8521 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8522 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8523 return Some(expr7_0); 8524 } 8525 _ => {} 8526 } 8527 } 8528 &InstructionData::Unary { 8529 opcode: ref pattern5_0, 8530 arg: pattern5_1, 8531 } => { 8532 if let &Opcode::Bitcast = pattern5_0 { 8533 let pattern7_0 = C::value_type(ctx, pattern5_1); 8534 if pattern7_0 == F32 { 8535 // Rule at src/isa/s390x/lower.isle line 1145. 8536 let expr0_0: Type = I64; 8537 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8538 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8539 let expr3_0: u8 = 32; 8540 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8541 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8542 return Some(expr5_0); 8543 } 8544 } 8545 } 8546 &InstructionData::LoadNoOffset { 8547 opcode: ref pattern5_0, 8548 arg: pattern5_1, 8549 flags: pattern5_2, 8550 } => { 8551 if let &Opcode::AtomicLoad = pattern5_0 { 8552 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8553 // Rule at src/isa/s390x/lower.isle line 1842. 8554 let expr0_0 = C::zero_offset(ctx); 8555 let expr1_0 = 8556 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8557 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8558 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8559 return Some(expr3_0); 8560 } 8561 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8562 // Rule at src/isa/s390x/lower.isle line 1838. 8563 let expr0_0 = C::zero_offset(ctx); 8564 let expr1_0 = 8565 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8566 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8567 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8568 return Some(expr3_0); 8569 } 8570 } 8571 } 8572 &InstructionData::Load { 8573 opcode: ref pattern5_0, 8574 arg: pattern5_1, 8575 flags: pattern5_2, 8576 offset: pattern5_3, 8577 } => { 8578 if let &Opcode::Load = pattern5_0 { 8579 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8580 // Rule at src/isa/s390x/lower.isle line 1198. 8581 let expr0_0 = 8582 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8583 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8584 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8585 return Some(expr2_0); 8586 } 8587 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8588 // Rule at src/isa/s390x/lower.isle line 1194. 8589 let expr0_0 = 8590 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8591 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8592 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8593 return Some(expr2_0); 8594 } 8595 } 8596 } 8597 _ => {} 8598 } 8599 } 8600 if pattern2_0 == I64 { 8601 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8602 match &pattern4_0 { 8603 &InstructionData::Binary { 8604 opcode: ref pattern5_0, 8605 args: ref pattern5_1, 8606 } => { 8607 match pattern5_0 { 8608 &Opcode::Umulhi => { 8609 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8610 // Rule at src/isa/s390x/lower.isle line 259. 8611 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8612 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8613 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8614 let expr3_0: Type = I64; 8615 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8616 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8617 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8618 return Some(expr6_0); 8619 } 8620 &Opcode::Smulhi => { 8621 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8622 // Rule at src/isa/s390x/lower.isle line 281. 8623 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8624 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8625 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8626 let expr3_0: Type = I64; 8627 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8628 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8629 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8630 return Some(expr6_0); 8631 } 8632 _ => {} 8633 } 8634 } 8635 &InstructionData::Unary { 8636 opcode: ref pattern5_0, 8637 arg: pattern5_1, 8638 } => { 8639 if let &Opcode::Bitcast = pattern5_0 { 8640 let pattern7_0 = C::value_type(ctx, pattern5_1); 8641 if pattern7_0 == F64 { 8642 // Rule at src/isa/s390x/lower.isle line 1135. 8643 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8644 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8645 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8646 return Some(expr2_0); 8647 } 8648 } 8649 } 8650 &InstructionData::LoadNoOffset { 8651 opcode: ref pattern5_0, 8652 arg: pattern5_1, 8653 flags: pattern5_2, 8654 } => { 8655 if let &Opcode::AtomicLoad = pattern5_0 { 8656 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8657 // Rule at src/isa/s390x/lower.isle line 1850. 8658 let expr0_0 = C::zero_offset(ctx); 8659 let expr1_0 = 8660 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8661 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8662 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8663 return Some(expr3_0); 8664 } 8665 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8666 // Rule at src/isa/s390x/lower.isle line 1846. 8667 let expr0_0 = C::zero_offset(ctx); 8668 let expr1_0 = 8669 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8670 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8671 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8672 return Some(expr3_0); 8673 } 8674 } 8675 } 8676 &InstructionData::Load { 8677 opcode: ref pattern5_0, 8678 arg: pattern5_1, 8679 flags: pattern5_2, 8680 offset: pattern5_3, 8681 } => { 8682 if let &Opcode::Load = pattern5_0 { 8683 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8684 // Rule at src/isa/s390x/lower.isle line 1206. 8685 let expr0_0 = 8686 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8687 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8688 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8689 return Some(expr2_0); 8690 } 8691 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8692 // Rule at src/isa/s390x/lower.isle line 1202. 8693 let expr0_0 = 8694 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8695 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8696 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8697 return Some(expr2_0); 8698 } 8699 } 8700 } 8701 _ => {} 8702 } 8703 } 8704 if pattern2_0 == R64 { 8705 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8706 if let &InstructionData::Load { 8707 opcode: ref pattern5_0, 8708 arg: pattern5_1, 8709 flags: pattern5_2, 8710 offset: pattern5_3, 8711 } = &pattern4_0 8712 { 8713 if let &Opcode::Load = pattern5_0 { 8714 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8715 // Rule at src/isa/s390x/lower.isle line 1214. 8716 let expr0_0 = 8717 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8718 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8719 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8720 return Some(expr2_0); 8721 } 8722 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8723 // Rule at src/isa/s390x/lower.isle line 1210. 8724 let expr0_0 = 8725 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8726 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8727 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8728 return Some(expr2_0); 8729 } 8730 } 8731 } 8732 } 8733 if pattern2_0 == F32 { 8734 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8735 match &pattern4_0 { 8736 &InstructionData::Unary { 8737 opcode: ref pattern5_0, 8738 arg: pattern5_1, 8739 } => { 8740 if let &Opcode::Bitcast = pattern5_0 { 8741 let pattern7_0 = C::value_type(ctx, pattern5_1); 8742 if pattern7_0 == I32 { 8743 // Rule at src/isa/s390x/lower.isle line 1140. 8744 let expr0_0: Type = I64; 8745 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8746 let expr2_0: u8 = 32; 8747 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8748 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8749 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8750 return Some(expr5_0); 8751 } 8752 } 8753 } 8754 &InstructionData::Load { 8755 opcode: ref pattern5_0, 8756 arg: pattern5_1, 8757 flags: pattern5_2, 8758 offset: pattern5_3, 8759 } => { 8760 if let &Opcode::Load = pattern5_0 { 8761 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8762 // Rule at src/isa/s390x/lower.isle line 1218. 8763 let expr0_0 = 8764 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8765 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8766 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8767 return Some(expr2_0); 8768 } 8769 } 8770 } 8771 _ => {} 8772 } 8773 } 8774 if pattern2_0 == F64 { 8775 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8776 match &pattern4_0 { 8777 &InstructionData::Unary { 8778 opcode: ref pattern5_0, 8779 arg: pattern5_1, 8780 } => { 8781 if let &Opcode::Bitcast = pattern5_0 { 8782 let pattern7_0 = C::value_type(ctx, pattern5_1); 8783 if pattern7_0 == I64 { 8784 // Rule at src/isa/s390x/lower.isle line 1131. 8785 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8786 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8787 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8788 return Some(expr2_0); 8789 } 8790 } 8791 } 8792 &InstructionData::Load { 8793 opcode: ref pattern5_0, 8794 arg: pattern5_1, 8795 flags: pattern5_2, 8796 offset: pattern5_3, 8797 } => { 8798 if let &Opcode::Load = pattern5_0 { 8799 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8800 // Rule at src/isa/s390x/lower.isle line 1233. 8801 let expr0_0 = 8802 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8803 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8804 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8805 return Some(expr2_0); 8806 } 8807 } 8808 } 8809 _ => {} 8810 } 8811 } 8812 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8813 match &pattern3_0 { 8814 &InstructionData::NullAry { 8815 opcode: ref pattern4_0, 8816 } => { 8817 if let &Opcode::Null = pattern4_0 { 8818 // Rule at src/isa/s390x/lower.isle line 41. 8819 let expr0_0: u64 = 0; 8820 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8821 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8822 return Some(expr2_0); 8823 } 8824 } 8825 &InstructionData::UnaryImm { 8826 opcode: ref pattern4_0, 8827 imm: pattern4_1, 8828 } => { 8829 if let &Opcode::Iconst = pattern4_0 { 8830 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8831 // Rule at src/isa/s390x/lower.isle line 15. 8832 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8833 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8834 return Some(expr1_0); 8835 } 8836 } 8837 &InstructionData::StackLoad { 8838 opcode: ref pattern4_0, 8839 stack_slot: pattern4_1, 8840 offset: pattern4_2, 8841 } => { 8842 if let &Opcode::StackAddr = pattern4_0 { 8843 // Rule at src/isa/s390x/lower.isle line 1152. 8844 let expr0_0 = 8845 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8846 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8847 return Some(expr1_0); 8848 } 8849 } 8850 &InstructionData::UnaryBool { 8851 opcode: ref pattern4_0, 8852 imm: pattern4_1, 8853 } => { 8854 if let &Opcode::Bconst = pattern4_0 { 8855 if pattern4_1 == true { 8856 // Rule at src/isa/s390x/lower.isle line 23. 8857 let expr0_0: u64 = 1; 8858 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8859 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8860 return Some(expr2_0); 8861 } 8862 if pattern4_1 == false { 8863 // Rule at src/isa/s390x/lower.isle line 21. 8864 let expr0_0: u64 = 0; 8865 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8866 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8867 return Some(expr2_0); 8868 } 8869 } 8870 } 8871 &InstructionData::Binary { 8872 opcode: ref pattern4_0, 8873 args: ref pattern4_1, 8874 } => { 8875 match pattern4_0 { 8876 &Opcode::Fadd => { 8877 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8878 // Rule at src/isa/s390x/lower.isle line 920. 8879 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8880 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8881 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8882 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8883 return Some(expr3_0); 8884 } 8885 &Opcode::Fsub => { 8886 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8887 // Rule at src/isa/s390x/lower.isle line 927. 8888 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8889 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8890 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8891 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8892 return Some(expr3_0); 8893 } 8894 &Opcode::Fmul => { 8895 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8896 // Rule at src/isa/s390x/lower.isle line 934. 8897 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8898 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8899 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8900 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8901 return Some(expr3_0); 8902 } 8903 &Opcode::Fdiv => { 8904 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8905 // Rule at src/isa/s390x/lower.isle line 941. 8906 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8907 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8908 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8909 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8910 return Some(expr3_0); 8911 } 8912 &Opcode::Fcopysign => { 8913 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8914 // Rule at src/isa/s390x/lower.isle line 962. 8915 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8916 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8917 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8918 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8919 return Some(expr3_0); 8920 } 8921 &Opcode::Fmin => { 8922 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8923 // Rule at src/isa/s390x/lower.isle line 948. 8924 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8925 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8926 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8927 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8928 return Some(expr3_0); 8929 } 8930 &Opcode::Fmax => { 8931 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8932 // Rule at src/isa/s390x/lower.isle line 955. 8933 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8934 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8935 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8936 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8937 return Some(expr3_0); 8938 } 8939 _ => {} 8940 } 8941 } 8942 &InstructionData::FloatCompare { 8943 opcode: ref pattern4_0, 8944 args: ref pattern4_1, 8945 cond: ref pattern4_2, 8946 } => { 8947 if let &Opcode::Fcmp = pattern4_0 { 8948 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8949 // Rule at src/isa/s390x/lower.isle line 2004. 8950 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 8951 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 8952 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8953 return Some(expr2_0); 8954 } 8955 } 8956 &InstructionData::IntCompare { 8957 opcode: ref pattern4_0, 8958 args: ref pattern4_1, 8959 cond: ref pattern4_2, 8960 } => { 8961 if let &Opcode::Icmp = pattern4_0 { 8962 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8963 // Rule at src/isa/s390x/lower.isle line 1915. 8964 let expr0_0: bool = true; 8965 let expr1_0 = 8966 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 8967 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 8968 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8969 return Some(expr3_0); 8970 } 8971 } 8972 &InstructionData::Ternary { 8973 opcode: ref pattern4_0, 8974 args: ref pattern4_1, 8975 } => { 8976 match pattern4_0 { 8977 &Opcode::Select => { 8978 let (pattern6_0, pattern6_1, pattern6_2) = 8979 C::unpack_value_array_3(ctx, pattern4_1); 8980 // Rule at src/isa/s390x/lower.isle line 2046. 8981 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 8982 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8983 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8984 let expr3_0 = constructor_select_bool_reg( 8985 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 8986 )?; 8987 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8988 return Some(expr4_0); 8989 } 8990 &Opcode::Fma => { 8991 let (pattern6_0, pattern6_1, pattern6_2) = 8992 C::unpack_value_array_3(ctx, pattern4_1); 8993 // Rule at src/isa/s390x/lower.isle line 969. 8994 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8995 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8996 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8997 let expr3_0 = 8998 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 8999 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9000 return Some(expr4_0); 9001 } 9002 _ => {} 9003 } 9004 } 9005 &InstructionData::IntSelect { 9006 opcode: ref pattern4_0, 9007 args: ref pattern4_1, 9008 cond: ref pattern4_2, 9009 } => { 9010 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9011 let (pattern6_0, pattern6_1, pattern6_2) = 9012 C::unpack_value_array_3(ctx, pattern4_1); 9013 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9014 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9015 if let &InstructionData::Binary { 9016 opcode: ref pattern9_0, 9017 args: ref pattern9_1, 9018 } = &pattern8_0 9019 { 9020 if let &Opcode::Ifcmp = pattern9_0 { 9021 let (pattern11_0, pattern11_1) = 9022 C::unpack_value_array_2(ctx, pattern9_1); 9023 // Rule at src/isa/s390x/lower.isle line 2058. 9024 let expr0_0: bool = false; 9025 let expr1_0 = constructor_icmp_val( 9026 ctx, 9027 expr0_0, 9028 pattern4_2, 9029 pattern11_0, 9030 pattern11_1, 9031 )?; 9032 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9033 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9034 let expr4_0 = constructor_select_bool_reg( 9035 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9036 )?; 9037 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9038 return Some(expr5_0); 9039 } 9040 } 9041 } 9042 } 9043 } 9044 &InstructionData::Unary { 9045 opcode: ref pattern4_0, 9046 arg: pattern4_1, 9047 } => { 9048 match pattern4_0 { 9049 &Opcode::Sqrt => { 9050 // Rule at src/isa/s390x/lower.isle line 976. 9051 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9052 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9053 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9054 return Some(expr2_0); 9055 } 9056 &Opcode::Fneg => { 9057 // Rule at src/isa/s390x/lower.isle line 983. 9058 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9059 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9060 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9061 return Some(expr2_0); 9062 } 9063 &Opcode::Fabs => { 9064 // Rule at src/isa/s390x/lower.isle line 990. 9065 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9066 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9067 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9068 return Some(expr2_0); 9069 } 9070 &Opcode::Ceil => { 9071 // Rule at src/isa/s390x/lower.isle line 997. 9072 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9073 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9074 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9075 return Some(expr2_0); 9076 } 9077 &Opcode::Floor => { 9078 // Rule at src/isa/s390x/lower.isle line 1004. 9079 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9080 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9081 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9082 return Some(expr2_0); 9083 } 9084 &Opcode::Trunc => { 9085 // Rule at src/isa/s390x/lower.isle line 1011. 9086 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9087 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9088 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9089 return Some(expr2_0); 9090 } 9091 &Opcode::Nearest => { 9092 // Rule at src/isa/s390x/lower.isle line 1018. 9093 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9094 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9095 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9096 return Some(expr2_0); 9097 } 9098 &Opcode::Bextend => { 9099 // Rule at src/isa/s390x/lower.isle line 760. 9100 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9101 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9102 return Some(expr1_0); 9103 } 9104 &Opcode::Bmask => { 9105 // Rule at src/isa/s390x/lower.isle line 762. 9106 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9107 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9108 return Some(expr1_0); 9109 } 9110 &Opcode::Fpromote => { 9111 let pattern6_0 = C::value_type(ctx, pattern4_1); 9112 // Rule at src/isa/s390x/lower.isle line 1025. 9113 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9114 let expr1_0 = 9115 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9116 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9117 return Some(expr2_0); 9118 } 9119 &Opcode::Fdemote => { 9120 let pattern6_0 = C::value_type(ctx, pattern4_1); 9121 // Rule at src/isa/s390x/lower.isle line 1032. 9122 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9123 let expr1_0 = 9124 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9125 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9126 return Some(expr2_0); 9127 } 9128 &Opcode::FcvtFromUint => { 9129 let pattern6_0 = C::value_type(ctx, pattern4_1); 9130 // Rule at src/isa/s390x/lower.isle line 1039. 9131 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9132 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9133 let expr2_0 = 9134 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9135 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9136 return Some(expr3_0); 9137 } 9138 &Opcode::FcvtFromSint => { 9139 let pattern6_0 = C::value_type(ctx, pattern4_1); 9140 // Rule at src/isa/s390x/lower.isle line 1047. 9141 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9142 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9143 let expr2_0 = 9144 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9145 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9146 return Some(expr3_0); 9147 } 9148 _ => {} 9149 } 9150 } 9151 _ => {} 9152 } 9153 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9154 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9155 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9156 match &pattern5_0 { 9157 &InstructionData::Binary { 9158 opcode: ref pattern6_0, 9159 args: ref pattern6_1, 9160 } => { 9161 match pattern6_0 { 9162 &Opcode::BandNot => { 9163 let (pattern8_0, pattern8_1) = 9164 C::unpack_value_array_2(ctx, pattern6_1); 9165 // Rule at src/isa/s390x/lower.isle line 702. 9166 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9167 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9168 let expr2_0 = 9169 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9170 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9171 return Some(expr3_0); 9172 } 9173 &Opcode::BorNot => { 9174 let (pattern8_0, pattern8_1) = 9175 C::unpack_value_array_2(ctx, pattern6_1); 9176 // Rule at src/isa/s390x/lower.isle line 713. 9177 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9178 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9179 let expr2_0 = 9180 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9181 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9182 return Some(expr3_0); 9183 } 9184 &Opcode::BxorNot => { 9185 let (pattern8_0, pattern8_1) = 9186 C::unpack_value_array_2(ctx, pattern6_1); 9187 // Rule at src/isa/s390x/lower.isle line 724. 9188 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9189 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9190 let expr2_0 = 9191 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9192 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9193 return Some(expr3_0); 9194 } 9195 _ => {} 9196 } 9197 } 9198 &InstructionData::Ternary { 9199 opcode: ref pattern6_0, 9200 args: ref pattern6_1, 9201 } => { 9202 if let &Opcode::Bitselect = pattern6_0 { 9203 let (pattern8_0, pattern8_1, pattern8_2) = 9204 C::unpack_value_array_3(ctx, pattern6_1); 9205 // Rule at src/isa/s390x/lower.isle line 735. 9206 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9207 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9208 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9209 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9210 let expr4_0 = 9211 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9212 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9213 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9214 return Some(expr6_0); 9215 } 9216 } 9217 &InstructionData::Unary { 9218 opcode: ref pattern6_0, 9219 arg: pattern6_1, 9220 } => { 9221 match pattern6_0 { 9222 &Opcode::Bnot => { 9223 // Rule at src/isa/s390x/lower.isle line 625. 9224 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9225 let expr1_0 = 9226 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9227 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9228 return Some(expr2_0); 9229 } 9230 &Opcode::Popcnt => { 9231 // Rule at src/isa/s390x/lower.isle line 889. 9232 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9233 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9234 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9235 return Some(expr2_0); 9236 } 9237 _ => {} 9238 } 9239 } 9240 _ => {} 9241 } 9242 } 9243 } 9244 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9245 if pattern2_0 == I16 { 9246 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9247 if let &InstructionData::Unary { 9248 opcode: ref pattern6_0, 9249 arg: pattern6_1, 9250 } = &pattern5_0 9251 { 9252 if let &Opcode::Popcnt = pattern6_0 { 9253 // Rule at src/isa/s390x/lower.isle line 898. 9254 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9255 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9256 let expr2_0: Type = I32; 9257 let expr3_0: Type = I32; 9258 let expr4_0: u8 = 8; 9259 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9260 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9261 let expr7_0: Type = I32; 9262 let expr8_0: u8 = 8; 9263 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9264 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9265 return Some(expr10_0); 9266 } 9267 } 9268 } 9269 if pattern2_0 == I32 { 9270 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9271 if let &InstructionData::Unary { 9272 opcode: ref pattern6_0, 9273 arg: pattern6_1, 9274 } = &pattern5_0 9275 { 9276 if let &Opcode::Popcnt = pattern6_0 { 9277 // Rule at src/isa/s390x/lower.isle line 903. 9278 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9279 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9280 let expr2_0: Type = I32; 9281 let expr3_0: Type = I32; 9282 let expr4_0: u8 = 16; 9283 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9284 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9285 let expr7_0: Type = I32; 9286 let expr8_0: Type = I32; 9287 let expr9_0: u8 = 8; 9288 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9289 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9290 let expr12_0: Type = I32; 9291 let expr13_0: u8 = 24; 9292 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9293 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9294 return Some(expr15_0); 9295 } 9296 } 9297 } 9298 if pattern2_0 == I64 { 9299 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9300 if let &InstructionData::Unary { 9301 opcode: ref pattern6_0, 9302 arg: pattern6_1, 9303 } = &pattern5_0 9304 { 9305 if let &Opcode::Popcnt = pattern6_0 { 9306 // Rule at src/isa/s390x/lower.isle line 909. 9307 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9308 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9309 let expr2_0: Type = I64; 9310 let expr3_0: Type = I64; 9311 let expr4_0: u8 = 32; 9312 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9313 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9314 let expr7_0: Type = I64; 9315 let expr8_0: Type = I64; 9316 let expr9_0: u8 = 16; 9317 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9318 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9319 let expr12_0: Type = I64; 9320 let expr13_0: Type = I64; 9321 let expr14_0: u8 = 8; 9322 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9323 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9324 let expr17_0: Type = I64; 9325 let expr18_0: u8 = 56; 9326 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9327 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9328 return Some(expr20_0); 9329 } 9330 } 9331 } 9332 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9333 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9334 match &pattern5_0 { 9335 &InstructionData::Binary { 9336 opcode: ref pattern6_0, 9337 args: ref pattern6_1, 9338 } => { 9339 match pattern6_0 { 9340 &Opcode::BandNot => { 9341 let (pattern8_0, pattern8_1) = 9342 C::unpack_value_array_2(ctx, pattern6_1); 9343 // Rule at src/isa/s390x/lower.isle line 706. 9344 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9345 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9346 let expr2_0 = 9347 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9348 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9349 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9350 return Some(expr4_0); 9351 } 9352 &Opcode::BorNot => { 9353 let (pattern8_0, pattern8_1) = 9354 C::unpack_value_array_2(ctx, pattern6_1); 9355 // Rule at src/isa/s390x/lower.isle line 717. 9356 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9357 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9358 let expr2_0 = 9359 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9360 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9361 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9362 return Some(expr4_0); 9363 } 9364 &Opcode::BxorNot => { 9365 let (pattern8_0, pattern8_1) = 9366 C::unpack_value_array_2(ctx, pattern6_1); 9367 // Rule at src/isa/s390x/lower.isle line 728. 9368 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9369 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9370 let expr2_0 = 9371 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9372 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9373 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9374 return Some(expr4_0); 9375 } 9376 _ => {} 9377 } 9378 } 9379 &InstructionData::Ternary { 9380 opcode: ref pattern6_0, 9381 args: ref pattern6_1, 9382 } => { 9383 if let &Opcode::Bitselect = pattern6_0 { 9384 let (pattern8_0, pattern8_1, pattern8_2) = 9385 C::unpack_value_array_3(ctx, pattern6_1); 9386 // Rule at src/isa/s390x/lower.isle line 742. 9387 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9388 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9389 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9390 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9391 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9392 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9393 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9394 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9395 return Some(expr7_0); 9396 } 9397 } 9398 &InstructionData::Unary { 9399 opcode: ref pattern6_0, 9400 arg: pattern6_1, 9401 } => { 9402 if let &Opcode::Bnot = pattern6_0 { 9403 // Rule at src/isa/s390x/lower.isle line 630. 9404 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9405 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9406 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9407 return Some(expr2_0); 9408 } 9409 } 9410 _ => {} 9411 } 9412 } 9413 } 9414 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9415 if pattern2_0 == F32 { 9416 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9417 if let &InstructionData::Load { 9418 opcode: ref pattern6_0, 9419 arg: pattern6_1, 9420 flags: pattern6_2, 9421 offset: pattern6_3, 9422 } = &pattern5_0 9423 { 9424 if let &Opcode::Load = pattern6_0 { 9425 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9426 // Rule at src/isa/s390x/lower.isle line 1222. 9427 let expr0_0 = 9428 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9429 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9430 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9431 return Some(expr2_0); 9432 } 9433 } 9434 } 9435 } 9436 if pattern2_0 == F64 { 9437 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9438 if let &InstructionData::Load { 9439 opcode: ref pattern6_0, 9440 arg: pattern6_1, 9441 flags: pattern6_2, 9442 offset: pattern6_3, 9443 } = &pattern5_0 9444 { 9445 if let &Opcode::Load = pattern6_0 { 9446 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9447 // Rule at src/isa/s390x/lower.isle line 1237. 9448 let expr0_0 = 9449 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9450 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9451 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9452 return Some(expr2_0); 9453 } 9454 } 9455 } 9456 } 9457 } 9458 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9459 if pattern2_0 == F32 { 9460 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9461 if let &InstructionData::Load { 9462 opcode: ref pattern6_0, 9463 arg: pattern6_1, 9464 flags: pattern6_2, 9465 offset: pattern6_3, 9466 } = &pattern5_0 9467 { 9468 if let &Opcode::Load = pattern6_0 { 9469 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9470 // Rule at src/isa/s390x/lower.isle line 1227. 9471 let expr0_0 = 9472 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9473 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9474 let expr2_0: Type = I64; 9475 let expr3_0: u8 = 32; 9476 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9477 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9478 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9479 return Some(expr6_0); 9480 } 9481 } 9482 } 9483 } 9484 if pattern2_0 == F64 { 9485 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9486 if let &InstructionData::Load { 9487 opcode: ref pattern6_0, 9488 arg: pattern6_1, 9489 flags: pattern6_2, 9490 offset: pattern6_3, 9491 } = &pattern5_0 9492 { 9493 if let &Opcode::Load = pattern6_0 { 9494 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9495 // Rule at src/isa/s390x/lower.isle line 1242. 9496 let expr0_0 = 9497 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9498 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9499 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9500 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9501 return Some(expr3_0); 9502 } 9503 } 9504 } 9505 } 9506 } 9507 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9508 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9509 if let &InstructionData::Unary { 9510 opcode: ref pattern5_0, 9511 arg: pattern5_1, 9512 } = &pattern4_0 9513 { 9514 if let &Opcode::Bint = pattern5_0 { 9515 // Rule at src/isa/s390x/lower.isle line 796. 9516 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9517 let expr1_0: u16 = 1; 9518 let expr2_0: u8 = 0; 9519 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9520 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9521 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9522 return Some(expr5_0); 9523 } 9524 } 9525 } 9526 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9527 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9528 if let &InstructionData::Unary { 9529 opcode: ref pattern5_0, 9530 arg: pattern5_1, 9531 } = &pattern4_0 9532 { 9533 if let &Opcode::Bint = pattern5_0 { 9534 // Rule at src/isa/s390x/lower.isle line 800. 9535 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9536 let expr1_0: u32 = 1; 9537 let expr2_0: u8 = 0; 9538 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9539 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9540 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9541 return Some(expr5_0); 9542 } 9543 } 9544 } 9545 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9546 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9547 match &pattern4_0 { 9548 &InstructionData::Binary { 9549 opcode: ref pattern5_0, 9550 args: ref pattern5_1, 9551 } => { 9552 match pattern5_0 { 9553 &Opcode::Iadd => { 9554 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9555 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9556 // Rule at src/isa/s390x/lower.isle line 72. 9557 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9558 let expr1_0 = 9559 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9560 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9561 return Some(expr2_0); 9562 } 9563 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9564 // Rule at src/isa/s390x/lower.isle line 76. 9565 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9566 let expr1_0 = 9567 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9568 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9569 return Some(expr2_0); 9570 } 9571 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9572 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9573 if let &InstructionData::Unary { 9574 opcode: ref pattern10_0, 9575 arg: pattern10_1, 9576 } = &pattern9_0 9577 { 9578 if let &Opcode::Sextend = pattern10_0 { 9579 let pattern12_0 = C::value_type(ctx, pattern10_1); 9580 if pattern12_0 == I32 { 9581 // Rule at src/isa/s390x/lower.isle line 66. 9582 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9583 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9584 let expr2_0 = constructor_add_reg_sext32( 9585 ctx, pattern3_0, expr0_0, expr1_0, 9586 )?; 9587 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9588 return Some(expr3_0); 9589 } 9590 } 9591 } 9592 } 9593 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9594 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9595 if let &InstructionData::Load { 9596 opcode: ref pattern10_0, 9597 arg: pattern10_1, 9598 flags: pattern10_2, 9599 offset: pattern10_3, 9600 } = &pattern9_0 9601 { 9602 match pattern10_0 { 9603 &Opcode::Sload16 => { 9604 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9605 // Rule at src/isa/s390x/lower.isle line 94. 9606 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9607 let expr1_0 = 9608 constructor_sink_sload16(ctx, pattern8_0)?; 9609 let expr2_0 = constructor_add_mem_sext16( 9610 ctx, pattern3_0, expr0_0, &expr1_0, 9611 )?; 9612 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9613 return Some(expr3_0); 9614 } 9615 } 9616 &Opcode::Sload32 => { 9617 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9618 // Rule at src/isa/s390x/lower.isle line 98. 9619 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9620 let expr1_0 = 9621 constructor_sink_sload32(ctx, pattern8_0)?; 9622 let expr2_0 = constructor_add_mem_sext32( 9623 ctx, pattern3_0, expr0_0, &expr1_0, 9624 )?; 9625 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9626 return Some(expr3_0); 9627 } 9628 } 9629 _ => {} 9630 } 9631 } 9632 } 9633 let pattern8_0 = C::value_type(ctx, pattern7_0); 9634 if pattern8_0 == I16 { 9635 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9636 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9637 if let &InstructionData::Load { 9638 opcode: ref pattern12_0, 9639 arg: pattern12_1, 9640 flags: pattern12_2, 9641 offset: pattern12_3, 9642 } = &pattern11_0 9643 { 9644 if let &Opcode::Load = pattern12_0 { 9645 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9646 // Rule at src/isa/s390x/lower.isle line 88. 9647 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9648 let expr1_0 = 9649 constructor_sink_load(ctx, pattern10_0)?; 9650 let expr2_0 = constructor_add_mem_sext16( 9651 ctx, pattern3_0, expr0_0, &expr1_0, 9652 )?; 9653 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9654 return Some(expr3_0); 9655 } 9656 } 9657 } 9658 } 9659 } 9660 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9661 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9662 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9663 if let &InstructionData::Load { 9664 opcode: ref pattern12_0, 9665 arg: pattern12_1, 9666 flags: pattern12_2, 9667 offset: pattern12_3, 9668 } = &pattern11_0 9669 { 9670 if let &Opcode::Load = pattern12_0 { 9671 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9672 // Rule at src/isa/s390x/lower.isle line 82. 9673 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9674 let expr1_0 = 9675 constructor_sink_load(ctx, pattern10_0)?; 9676 let expr2_0 = constructor_add_mem( 9677 ctx, pattern3_0, expr0_0, &expr1_0, 9678 )?; 9679 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9680 return Some(expr3_0); 9681 } 9682 } 9683 } 9684 } 9685 } 9686 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9687 // Rule at src/isa/s390x/lower.isle line 70. 9688 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9689 let expr1_0 = 9690 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9691 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9692 return Some(expr2_0); 9693 } 9694 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9695 // Rule at src/isa/s390x/lower.isle line 74. 9696 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9697 let expr1_0 = 9698 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9699 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9700 return Some(expr2_0); 9701 } 9702 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9703 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9704 if let &InstructionData::Unary { 9705 opcode: ref pattern10_0, 9706 arg: pattern10_1, 9707 } = &pattern9_0 9708 { 9709 if let &Opcode::Sextend = pattern10_0 { 9710 let pattern12_0 = C::value_type(ctx, pattern10_1); 9711 if pattern12_0 == I32 { 9712 // Rule at src/isa/s390x/lower.isle line 64. 9713 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9714 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9715 let expr2_0 = constructor_add_reg_sext32( 9716 ctx, pattern3_0, expr0_0, expr1_0, 9717 )?; 9718 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9719 return Some(expr3_0); 9720 } 9721 } 9722 } 9723 } 9724 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9725 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9726 if let &InstructionData::Load { 9727 opcode: ref pattern10_0, 9728 arg: pattern10_1, 9729 flags: pattern10_2, 9730 offset: pattern10_3, 9731 } = &pattern9_0 9732 { 9733 match pattern10_0 { 9734 &Opcode::Sload16 => { 9735 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9736 // Rule at src/isa/s390x/lower.isle line 92. 9737 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9738 let expr1_0 = 9739 constructor_sink_sload16(ctx, pattern8_0)?; 9740 let expr2_0 = constructor_add_mem_sext16( 9741 ctx, pattern3_0, expr0_0, &expr1_0, 9742 )?; 9743 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9744 return Some(expr3_0); 9745 } 9746 } 9747 &Opcode::Sload32 => { 9748 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9749 // Rule at src/isa/s390x/lower.isle line 96. 9750 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9751 let expr1_0 = 9752 constructor_sink_sload32(ctx, pattern8_0)?; 9753 let expr2_0 = constructor_add_mem_sext32( 9754 ctx, pattern3_0, expr0_0, &expr1_0, 9755 )?; 9756 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9757 return Some(expr3_0); 9758 } 9759 } 9760 _ => {} 9761 } 9762 } 9763 } 9764 let pattern8_0 = C::value_type(ctx, pattern7_1); 9765 if pattern8_0 == I16 { 9766 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9767 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9768 if let &InstructionData::Load { 9769 opcode: ref pattern12_0, 9770 arg: pattern12_1, 9771 flags: pattern12_2, 9772 offset: pattern12_3, 9773 } = &pattern11_0 9774 { 9775 if let &Opcode::Load = pattern12_0 { 9776 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9777 // Rule at src/isa/s390x/lower.isle line 86. 9778 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9779 let expr1_0 = 9780 constructor_sink_load(ctx, pattern10_0)?; 9781 let expr2_0 = constructor_add_mem_sext16( 9782 ctx, pattern3_0, expr0_0, &expr1_0, 9783 )?; 9784 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9785 return Some(expr3_0); 9786 } 9787 } 9788 } 9789 } 9790 } 9791 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9792 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9793 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9794 if let &InstructionData::Load { 9795 opcode: ref pattern12_0, 9796 arg: pattern12_1, 9797 flags: pattern12_2, 9798 offset: pattern12_3, 9799 } = &pattern11_0 9800 { 9801 if let &Opcode::Load = pattern12_0 { 9802 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9803 // Rule at src/isa/s390x/lower.isle line 80. 9804 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9805 let expr1_0 = 9806 constructor_sink_load(ctx, pattern10_0)?; 9807 let expr2_0 = constructor_add_mem( 9808 ctx, pattern3_0, expr0_0, &expr1_0, 9809 )?; 9810 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9811 return Some(expr3_0); 9812 } 9813 } 9814 } 9815 } 9816 } 9817 // Rule at src/isa/s390x/lower.isle line 60. 9818 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9819 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9820 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9821 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9822 return Some(expr3_0); 9823 } 9824 &Opcode::Isub => { 9825 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9826 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9827 // Rule at src/isa/s390x/lower.isle line 113. 9828 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9829 let expr1_0 = 9830 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9831 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9832 return Some(expr2_0); 9833 } 9834 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9835 // Rule at src/isa/s390x/lower.isle line 115. 9836 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9837 let expr1_0 = 9838 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9839 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9840 return Some(expr2_0); 9841 } 9842 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9843 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9844 if let &InstructionData::Unary { 9845 opcode: ref pattern10_0, 9846 arg: pattern10_1, 9847 } = &pattern9_0 9848 { 9849 if let &Opcode::Sextend = pattern10_0 { 9850 let pattern12_0 = C::value_type(ctx, pattern10_1); 9851 if pattern12_0 == I32 { 9852 // Rule at src/isa/s390x/lower.isle line 109. 9853 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9854 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9855 let expr2_0 = constructor_sub_reg_sext32( 9856 ctx, pattern3_0, expr0_0, expr1_0, 9857 )?; 9858 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9859 return Some(expr3_0); 9860 } 9861 } 9862 } 9863 } 9864 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9865 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9866 if let &InstructionData::Load { 9867 opcode: ref pattern10_0, 9868 arg: pattern10_1, 9869 flags: pattern10_2, 9870 offset: pattern10_3, 9871 } = &pattern9_0 9872 { 9873 match pattern10_0 { 9874 &Opcode::Sload16 => { 9875 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9876 // Rule at src/isa/s390x/lower.isle line 127. 9877 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9878 let expr1_0 = 9879 constructor_sink_sload16(ctx, pattern8_0)?; 9880 let expr2_0 = constructor_sub_mem_sext16( 9881 ctx, pattern3_0, expr0_0, &expr1_0, 9882 )?; 9883 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9884 return Some(expr3_0); 9885 } 9886 } 9887 &Opcode::Sload32 => { 9888 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9889 // Rule at src/isa/s390x/lower.isle line 129. 9890 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9891 let expr1_0 = 9892 constructor_sink_sload32(ctx, pattern8_0)?; 9893 let expr2_0 = constructor_sub_mem_sext32( 9894 ctx, pattern3_0, expr0_0, &expr1_0, 9895 )?; 9896 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9897 return Some(expr3_0); 9898 } 9899 } 9900 _ => {} 9901 } 9902 } 9903 } 9904 let pattern8_0 = C::value_type(ctx, pattern7_1); 9905 if pattern8_0 == I16 { 9906 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9907 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9908 if let &InstructionData::Load { 9909 opcode: ref pattern12_0, 9910 arg: pattern12_1, 9911 flags: pattern12_2, 9912 offset: pattern12_3, 9913 } = &pattern11_0 9914 { 9915 if let &Opcode::Load = pattern12_0 { 9916 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9917 // Rule at src/isa/s390x/lower.isle line 123. 9918 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9919 let expr1_0 = 9920 constructor_sink_load(ctx, pattern10_0)?; 9921 let expr2_0 = constructor_sub_mem_sext16( 9922 ctx, pattern3_0, expr0_0, &expr1_0, 9923 )?; 9924 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9925 return Some(expr3_0); 9926 } 9927 } 9928 } 9929 } 9930 } 9931 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9932 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9933 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9934 if let &InstructionData::Load { 9935 opcode: ref pattern12_0, 9936 arg: pattern12_1, 9937 flags: pattern12_2, 9938 offset: pattern12_3, 9939 } = &pattern11_0 9940 { 9941 if let &Opcode::Load = pattern12_0 { 9942 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9943 // Rule at src/isa/s390x/lower.isle line 119. 9944 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9945 let expr1_0 = 9946 constructor_sink_load(ctx, pattern10_0)?; 9947 let expr2_0 = constructor_sub_mem( 9948 ctx, pattern3_0, expr0_0, &expr1_0, 9949 )?; 9950 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9951 return Some(expr3_0); 9952 } 9953 } 9954 } 9955 } 9956 } 9957 // Rule at src/isa/s390x/lower.isle line 105. 9958 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9959 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9960 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9961 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9962 return Some(expr3_0); 9963 } 9964 &Opcode::Imul => { 9965 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9966 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9967 // Rule at src/isa/s390x/lower.isle line 212. 9968 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9969 let expr1_0 = 9970 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9971 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9972 return Some(expr2_0); 9973 } 9974 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9975 // Rule at src/isa/s390x/lower.isle line 216. 9976 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9977 let expr1_0 = 9978 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9979 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9980 return Some(expr2_0); 9981 } 9982 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9983 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9984 if let &InstructionData::Unary { 9985 opcode: ref pattern10_0, 9986 arg: pattern10_1, 9987 } = &pattern9_0 9988 { 9989 if let &Opcode::Sextend = pattern10_0 { 9990 let pattern12_0 = C::value_type(ctx, pattern10_1); 9991 if pattern12_0 == I32 { 9992 // Rule at src/isa/s390x/lower.isle line 206. 9993 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9994 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9995 let expr2_0 = constructor_mul_reg_sext32( 9996 ctx, pattern3_0, expr0_0, expr1_0, 9997 )?; 9998 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9999 return Some(expr3_0); 10000 } 10001 } 10002 } 10003 } 10004 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10005 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10006 if let &InstructionData::Load { 10007 opcode: ref pattern10_0, 10008 arg: pattern10_1, 10009 flags: pattern10_2, 10010 offset: pattern10_3, 10011 } = &pattern9_0 10012 { 10013 match pattern10_0 { 10014 &Opcode::Sload16 => { 10015 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10016 // Rule at src/isa/s390x/lower.isle line 234. 10017 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10018 let expr1_0 = 10019 constructor_sink_sload16(ctx, pattern8_0)?; 10020 let expr2_0 = constructor_mul_mem_sext16( 10021 ctx, pattern3_0, expr0_0, &expr1_0, 10022 )?; 10023 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10024 return Some(expr3_0); 10025 } 10026 } 10027 &Opcode::Sload32 => { 10028 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10029 // Rule at src/isa/s390x/lower.isle line 238. 10030 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10031 let expr1_0 = 10032 constructor_sink_sload32(ctx, pattern8_0)?; 10033 let expr2_0 = constructor_mul_mem_sext32( 10034 ctx, pattern3_0, expr0_0, &expr1_0, 10035 )?; 10036 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10037 return Some(expr3_0); 10038 } 10039 } 10040 _ => {} 10041 } 10042 } 10043 } 10044 let pattern8_0 = C::value_type(ctx, pattern7_0); 10045 if pattern8_0 == I16 { 10046 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10047 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10048 if let &InstructionData::Load { 10049 opcode: ref pattern12_0, 10050 arg: pattern12_1, 10051 flags: pattern12_2, 10052 offset: pattern12_3, 10053 } = &pattern11_0 10054 { 10055 if let &Opcode::Load = pattern12_0 { 10056 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10057 // Rule at src/isa/s390x/lower.isle line 228. 10058 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10059 let expr1_0 = 10060 constructor_sink_load(ctx, pattern10_0)?; 10061 let expr2_0 = constructor_mul_mem_sext16( 10062 ctx, pattern3_0, expr0_0, &expr1_0, 10063 )?; 10064 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10065 return Some(expr3_0); 10066 } 10067 } 10068 } 10069 } 10070 } 10071 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10072 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10073 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10074 if let &InstructionData::Load { 10075 opcode: ref pattern12_0, 10076 arg: pattern12_1, 10077 flags: pattern12_2, 10078 offset: pattern12_3, 10079 } = &pattern11_0 10080 { 10081 if let &Opcode::Load = pattern12_0 { 10082 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10083 // Rule at src/isa/s390x/lower.isle line 222. 10084 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10085 let expr1_0 = 10086 constructor_sink_load(ctx, pattern10_0)?; 10087 let expr2_0 = constructor_mul_mem( 10088 ctx, pattern3_0, expr0_0, &expr1_0, 10089 )?; 10090 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10091 return Some(expr3_0); 10092 } 10093 } 10094 } 10095 } 10096 } 10097 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10098 // Rule at src/isa/s390x/lower.isle line 210. 10099 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10100 let expr1_0 = 10101 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10102 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10103 return Some(expr2_0); 10104 } 10105 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10106 // Rule at src/isa/s390x/lower.isle line 214. 10107 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10108 let expr1_0 = 10109 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10110 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10111 return Some(expr2_0); 10112 } 10113 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10114 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10115 if let &InstructionData::Unary { 10116 opcode: ref pattern10_0, 10117 arg: pattern10_1, 10118 } = &pattern9_0 10119 { 10120 if let &Opcode::Sextend = pattern10_0 { 10121 let pattern12_0 = C::value_type(ctx, pattern10_1); 10122 if pattern12_0 == I32 { 10123 // Rule at src/isa/s390x/lower.isle line 204. 10124 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10125 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10126 let expr2_0 = constructor_mul_reg_sext32( 10127 ctx, pattern3_0, expr0_0, expr1_0, 10128 )?; 10129 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10130 return Some(expr3_0); 10131 } 10132 } 10133 } 10134 } 10135 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10136 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10137 if let &InstructionData::Load { 10138 opcode: ref pattern10_0, 10139 arg: pattern10_1, 10140 flags: pattern10_2, 10141 offset: pattern10_3, 10142 } = &pattern9_0 10143 { 10144 match pattern10_0 { 10145 &Opcode::Sload16 => { 10146 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10147 // Rule at src/isa/s390x/lower.isle line 232. 10148 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10149 let expr1_0 = 10150 constructor_sink_sload16(ctx, pattern8_0)?; 10151 let expr2_0 = constructor_mul_mem_sext16( 10152 ctx, pattern3_0, expr0_0, &expr1_0, 10153 )?; 10154 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10155 return Some(expr3_0); 10156 } 10157 } 10158 &Opcode::Sload32 => { 10159 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10160 // Rule at src/isa/s390x/lower.isle line 236. 10161 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10162 let expr1_0 = 10163 constructor_sink_sload32(ctx, pattern8_0)?; 10164 let expr2_0 = constructor_mul_mem_sext32( 10165 ctx, pattern3_0, expr0_0, &expr1_0, 10166 )?; 10167 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10168 return Some(expr3_0); 10169 } 10170 } 10171 _ => {} 10172 } 10173 } 10174 } 10175 let pattern8_0 = C::value_type(ctx, pattern7_1); 10176 if pattern8_0 == I16 { 10177 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10178 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10179 if let &InstructionData::Load { 10180 opcode: ref pattern12_0, 10181 arg: pattern12_1, 10182 flags: pattern12_2, 10183 offset: pattern12_3, 10184 } = &pattern11_0 10185 { 10186 if let &Opcode::Load = pattern12_0 { 10187 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10188 // Rule at src/isa/s390x/lower.isle line 226. 10189 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10190 let expr1_0 = 10191 constructor_sink_load(ctx, pattern10_0)?; 10192 let expr2_0 = constructor_mul_mem_sext16( 10193 ctx, pattern3_0, expr0_0, &expr1_0, 10194 )?; 10195 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10196 return Some(expr3_0); 10197 } 10198 } 10199 } 10200 } 10201 } 10202 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10203 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10204 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10205 if let &InstructionData::Load { 10206 opcode: ref pattern12_0, 10207 arg: pattern12_1, 10208 flags: pattern12_2, 10209 offset: pattern12_3, 10210 } = &pattern11_0 10211 { 10212 if let &Opcode::Load = pattern12_0 { 10213 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10214 // Rule at src/isa/s390x/lower.isle line 220. 10215 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10216 let expr1_0 = 10217 constructor_sink_load(ctx, pattern10_0)?; 10218 let expr2_0 = constructor_mul_mem( 10219 ctx, pattern3_0, expr0_0, &expr1_0, 10220 )?; 10221 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10222 return Some(expr3_0); 10223 } 10224 } 10225 } 10226 } 10227 } 10228 // Rule at src/isa/s390x/lower.isle line 200. 10229 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10230 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10231 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10232 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10233 return Some(expr3_0); 10234 } 10235 &Opcode::Udiv => { 10236 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10237 // Rule at src/isa/s390x/lower.isle line 303. 10238 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10239 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10240 let expr2_0: u64 = 0; 10241 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10242 let expr4_0 = 10243 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10244 let expr5_0 = 10245 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10246 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10247 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10248 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10249 ctx, expr0_0, expr7_0, expr6_0, 10250 )?; 10251 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10252 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10253 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10254 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10255 return Some(expr12_0); 10256 } 10257 &Opcode::Sdiv => { 10258 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10259 // Rule at src/isa/s390x/lower.isle line 375. 10260 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10261 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10262 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10263 let expr3_0 = 10264 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10265 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10266 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10267 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10268 ctx, expr0_0, expr5_0, expr4_0, 10269 )?; 10270 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10271 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10272 )?; 10273 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10274 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10275 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10276 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10277 return Some(expr11_0); 10278 } 10279 &Opcode::Urem => { 10280 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10281 // Rule at src/isa/s390x/lower.isle line 326. 10282 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10283 let expr1_0: u64 = 0; 10284 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10285 let expr3_0 = 10286 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10287 let expr4_0 = 10288 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10289 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10290 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10291 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10292 ctx, expr0_0, expr6_0, expr5_0, 10293 )?; 10294 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10295 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10296 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10297 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10298 return Some(expr11_0); 10299 } 10300 &Opcode::Srem => { 10301 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10302 // Rule at src/isa/s390x/lower.isle line 398. 10303 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10304 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10305 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10306 let expr3_0 = 10307 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10308 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10309 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10310 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10311 ctx, expr0_0, expr5_0, expr4_0, 10312 )?; 10313 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10314 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10315 )?; 10316 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10317 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10318 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10319 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10320 return Some(expr11_0); 10321 } 10322 &Opcode::IaddIfcout => { 10323 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10324 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10325 // Rule at src/isa/s390x/lower.isle line 170. 10326 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10327 let expr1_0 = constructor_add_logical_zimm32( 10328 ctx, pattern3_0, expr0_0, pattern8_0, 10329 )?; 10330 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10331 return Some(expr2_0); 10332 } 10333 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10334 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10335 if let &InstructionData::Unary { 10336 opcode: ref pattern10_0, 10337 arg: pattern10_1, 10338 } = &pattern9_0 10339 { 10340 if let &Opcode::Uextend = pattern10_0 { 10341 let pattern12_0 = C::value_type(ctx, pattern10_1); 10342 if pattern12_0 == I32 { 10343 // Rule at src/isa/s390x/lower.isle line 164. 10344 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10345 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10346 let expr2_0 = constructor_add_logical_reg_zext32( 10347 ctx, pattern3_0, expr0_0, expr1_0, 10348 )?; 10349 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10350 return Some(expr3_0); 10351 } 10352 } 10353 } 10354 } 10355 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10356 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10357 if let &InstructionData::Load { 10358 opcode: ref pattern10_0, 10359 arg: pattern10_1, 10360 flags: pattern10_2, 10361 offset: pattern10_3, 10362 } = &pattern9_0 10363 { 10364 if let &Opcode::Uload32 = pattern10_0 { 10365 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10366 // Rule at src/isa/s390x/lower.isle line 182. 10367 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10368 let expr1_0 = 10369 constructor_sink_uload32(ctx, pattern8_0)?; 10370 let expr2_0 = constructor_add_logical_mem_zext32( 10371 ctx, pattern3_0, expr0_0, &expr1_0, 10372 )?; 10373 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10374 return Some(expr3_0); 10375 } 10376 } 10377 } 10378 } 10379 let pattern8_0 = C::value_type(ctx, pattern7_0); 10380 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10381 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10382 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10383 if let &InstructionData::Load { 10384 opcode: ref pattern12_0, 10385 arg: pattern12_1, 10386 flags: pattern12_2, 10387 offset: pattern12_3, 10388 } = &pattern11_0 10389 { 10390 if let &Opcode::Load = pattern12_0 { 10391 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10392 // Rule at src/isa/s390x/lower.isle line 176. 10393 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10394 let expr1_0 = 10395 constructor_sink_load(ctx, pattern10_0)?; 10396 let expr2_0 = constructor_add_logical_mem( 10397 ctx, pattern3_0, expr0_0, &expr1_0, 10398 )?; 10399 let expr3_0 = 10400 constructor_output_ifcout(ctx, expr2_0)?; 10401 return Some(expr3_0); 10402 } 10403 } 10404 } 10405 } 10406 } 10407 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10408 // Rule at src/isa/s390x/lower.isle line 168. 10409 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10410 let expr1_0 = constructor_add_logical_zimm32( 10411 ctx, pattern3_0, expr0_0, pattern8_0, 10412 )?; 10413 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10414 return Some(expr2_0); 10415 } 10416 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10417 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10418 if let &InstructionData::Unary { 10419 opcode: ref pattern10_0, 10420 arg: pattern10_1, 10421 } = &pattern9_0 10422 { 10423 if let &Opcode::Uextend = pattern10_0 { 10424 let pattern12_0 = C::value_type(ctx, pattern10_1); 10425 if pattern12_0 == I32 { 10426 // Rule at src/isa/s390x/lower.isle line 162. 10427 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10428 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10429 let expr2_0 = constructor_add_logical_reg_zext32( 10430 ctx, pattern3_0, expr0_0, expr1_0, 10431 )?; 10432 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10433 return Some(expr3_0); 10434 } 10435 } 10436 } 10437 } 10438 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10439 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10440 if let &InstructionData::Load { 10441 opcode: ref pattern10_0, 10442 arg: pattern10_1, 10443 flags: pattern10_2, 10444 offset: pattern10_3, 10445 } = &pattern9_0 10446 { 10447 if let &Opcode::Uload32 = pattern10_0 { 10448 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10449 // Rule at src/isa/s390x/lower.isle line 180. 10450 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10451 let expr1_0 = 10452 constructor_sink_uload32(ctx, pattern8_0)?; 10453 let expr2_0 = constructor_add_logical_mem_zext32( 10454 ctx, pattern3_0, expr0_0, &expr1_0, 10455 )?; 10456 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10457 return Some(expr3_0); 10458 } 10459 } 10460 } 10461 } 10462 let pattern8_0 = C::value_type(ctx, pattern7_1); 10463 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10464 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10465 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10466 if let &InstructionData::Load { 10467 opcode: ref pattern12_0, 10468 arg: pattern12_1, 10469 flags: pattern12_2, 10470 offset: pattern12_3, 10471 } = &pattern11_0 10472 { 10473 if let &Opcode::Load = pattern12_0 { 10474 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10475 // Rule at src/isa/s390x/lower.isle line 174. 10476 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10477 let expr1_0 = 10478 constructor_sink_load(ctx, pattern10_0)?; 10479 let expr2_0 = constructor_add_logical_mem( 10480 ctx, pattern3_0, expr0_0, &expr1_0, 10481 )?; 10482 let expr3_0 = 10483 constructor_output_ifcout(ctx, expr2_0)?; 10484 return Some(expr3_0); 10485 } 10486 } 10487 } 10488 } 10489 } 10490 // Rule at src/isa/s390x/lower.isle line 158. 10491 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10492 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10493 let expr2_0 = 10494 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10495 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10496 return Some(expr3_0); 10497 } 10498 &Opcode::Band => { 10499 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10500 let pattern8_0 = C::value_type(ctx, pattern7_0); 10501 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10502 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10503 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10504 if let &InstructionData::Load { 10505 opcode: ref pattern12_0, 10506 arg: pattern12_1, 10507 flags: pattern12_2, 10508 offset: pattern12_3, 10509 } = &pattern11_0 10510 { 10511 if let &Opcode::Load = pattern12_0 { 10512 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10513 // Rule at src/isa/s390x/lower.isle line 653. 10514 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10515 let expr1_0 = 10516 constructor_sink_load(ctx, pattern10_0)?; 10517 let expr2_0 = constructor_and_mem( 10518 ctx, pattern3_0, expr0_0, &expr1_0, 10519 )?; 10520 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10521 return Some(expr3_0); 10522 } 10523 } 10524 } 10525 } 10526 } 10527 if let Some(pattern8_0) = 10528 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10529 { 10530 // Rule at src/isa/s390x/lower.isle line 647. 10531 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10532 let expr1_0 = constructor_and_uimm32shifted( 10533 ctx, pattern3_0, expr0_0, pattern8_0, 10534 )?; 10535 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10536 return Some(expr2_0); 10537 } 10538 if let Some(pattern8_0) = 10539 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10540 { 10541 // Rule at src/isa/s390x/lower.isle line 643. 10542 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10543 let expr1_0 = constructor_and_uimm16shifted( 10544 ctx, pattern3_0, expr0_0, pattern8_0, 10545 )?; 10546 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10547 return Some(expr2_0); 10548 } 10549 let pattern8_0 = C::value_type(ctx, pattern7_1); 10550 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10551 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10552 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10553 if let &InstructionData::Load { 10554 opcode: ref pattern12_0, 10555 arg: pattern12_1, 10556 flags: pattern12_2, 10557 offset: pattern12_3, 10558 } = &pattern11_0 10559 { 10560 if let &Opcode::Load = pattern12_0 { 10561 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10562 // Rule at src/isa/s390x/lower.isle line 651. 10563 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10564 let expr1_0 = 10565 constructor_sink_load(ctx, pattern10_0)?; 10566 let expr2_0 = constructor_and_mem( 10567 ctx, pattern3_0, expr0_0, &expr1_0, 10568 )?; 10569 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10570 return Some(expr3_0); 10571 } 10572 } 10573 } 10574 } 10575 } 10576 if let Some(pattern8_0) = 10577 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10578 { 10579 // Rule at src/isa/s390x/lower.isle line 645. 10580 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10581 let expr1_0 = constructor_and_uimm32shifted( 10582 ctx, pattern3_0, expr0_0, pattern8_0, 10583 )?; 10584 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10585 return Some(expr2_0); 10586 } 10587 if let Some(pattern8_0) = 10588 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10589 { 10590 // Rule at src/isa/s390x/lower.isle line 641. 10591 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10592 let expr1_0 = constructor_and_uimm16shifted( 10593 ctx, pattern3_0, expr0_0, pattern8_0, 10594 )?; 10595 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10596 return Some(expr2_0); 10597 } 10598 // Rule at src/isa/s390x/lower.isle line 637. 10599 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10600 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10601 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10602 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10603 return Some(expr3_0); 10604 } 10605 &Opcode::Bor => { 10606 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10607 let pattern8_0 = C::value_type(ctx, pattern7_0); 10608 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10609 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10610 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10611 if let &InstructionData::Load { 10612 opcode: ref pattern12_0, 10613 arg: pattern12_1, 10614 flags: pattern12_2, 10615 offset: pattern12_3, 10616 } = &pattern11_0 10617 { 10618 if let &Opcode::Load = pattern12_0 { 10619 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10620 // Rule at src/isa/s390x/lower.isle line 676. 10621 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10622 let expr1_0 = 10623 constructor_sink_load(ctx, pattern10_0)?; 10624 let expr2_0 = constructor_or_mem( 10625 ctx, pattern3_0, expr0_0, &expr1_0, 10626 )?; 10627 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10628 return Some(expr3_0); 10629 } 10630 } 10631 } 10632 } 10633 } 10634 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10635 // Rule at src/isa/s390x/lower.isle line 670. 10636 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10637 let expr1_0 = constructor_or_uimm32shifted( 10638 ctx, pattern3_0, expr0_0, pattern8_0, 10639 )?; 10640 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10641 return Some(expr2_0); 10642 } 10643 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10644 // Rule at src/isa/s390x/lower.isle line 666. 10645 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10646 let expr1_0 = constructor_or_uimm16shifted( 10647 ctx, pattern3_0, expr0_0, pattern8_0, 10648 )?; 10649 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10650 return Some(expr2_0); 10651 } 10652 let pattern8_0 = C::value_type(ctx, pattern7_1); 10653 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10654 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10655 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10656 if let &InstructionData::Load { 10657 opcode: ref pattern12_0, 10658 arg: pattern12_1, 10659 flags: pattern12_2, 10660 offset: pattern12_3, 10661 } = &pattern11_0 10662 { 10663 if let &Opcode::Load = pattern12_0 { 10664 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10665 // Rule at src/isa/s390x/lower.isle line 674. 10666 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10667 let expr1_0 = 10668 constructor_sink_load(ctx, pattern10_0)?; 10669 let expr2_0 = constructor_or_mem( 10670 ctx, pattern3_0, expr0_0, &expr1_0, 10671 )?; 10672 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10673 return Some(expr3_0); 10674 } 10675 } 10676 } 10677 } 10678 } 10679 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10680 // Rule at src/isa/s390x/lower.isle line 668. 10681 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10682 let expr1_0 = constructor_or_uimm32shifted( 10683 ctx, pattern3_0, expr0_0, pattern8_0, 10684 )?; 10685 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10686 return Some(expr2_0); 10687 } 10688 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10689 // Rule at src/isa/s390x/lower.isle line 664. 10690 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10691 let expr1_0 = constructor_or_uimm16shifted( 10692 ctx, pattern3_0, expr0_0, pattern8_0, 10693 )?; 10694 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10695 return Some(expr2_0); 10696 } 10697 // Rule at src/isa/s390x/lower.isle line 660. 10698 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10699 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10700 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10701 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10702 return Some(expr3_0); 10703 } 10704 &Opcode::Bxor => { 10705 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10706 let pattern8_0 = C::value_type(ctx, pattern7_0); 10707 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10708 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10709 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10710 if let &InstructionData::Load { 10711 opcode: ref pattern12_0, 10712 arg: pattern12_1, 10713 flags: pattern12_2, 10714 offset: pattern12_3, 10715 } = &pattern11_0 10716 { 10717 if let &Opcode::Load = pattern12_0 { 10718 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10719 // Rule at src/isa/s390x/lower.isle line 695. 10720 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10721 let expr1_0 = 10722 constructor_sink_load(ctx, pattern10_0)?; 10723 let expr2_0 = constructor_xor_mem( 10724 ctx, pattern3_0, expr0_0, &expr1_0, 10725 )?; 10726 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10727 return Some(expr3_0); 10728 } 10729 } 10730 } 10731 } 10732 } 10733 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10734 // Rule at src/isa/s390x/lower.isle line 689. 10735 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10736 let expr1_0 = constructor_xor_uimm32shifted( 10737 ctx, pattern3_0, expr0_0, pattern8_0, 10738 )?; 10739 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10740 return Some(expr2_0); 10741 } 10742 let pattern8_0 = C::value_type(ctx, pattern7_1); 10743 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10744 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10745 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10746 if let &InstructionData::Load { 10747 opcode: ref pattern12_0, 10748 arg: pattern12_1, 10749 flags: pattern12_2, 10750 offset: pattern12_3, 10751 } = &pattern11_0 10752 { 10753 if let &Opcode::Load = pattern12_0 { 10754 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10755 // Rule at src/isa/s390x/lower.isle line 693. 10756 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10757 let expr1_0 = 10758 constructor_sink_load(ctx, pattern10_0)?; 10759 let expr2_0 = constructor_xor_mem( 10760 ctx, pattern3_0, expr0_0, &expr1_0, 10761 )?; 10762 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10763 return Some(expr3_0); 10764 } 10765 } 10766 } 10767 } 10768 } 10769 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10770 // Rule at src/isa/s390x/lower.isle line 687. 10771 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10772 let expr1_0 = constructor_xor_uimm32shifted( 10773 ctx, pattern3_0, expr0_0, pattern8_0, 10774 )?; 10775 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10776 return Some(expr2_0); 10777 } 10778 // Rule at src/isa/s390x/lower.isle line 683. 10779 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10780 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10781 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10782 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10783 return Some(expr3_0); 10784 } 10785 &Opcode::Ishl => { 10786 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10787 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10788 // Rule at src/isa/s390x/lower.isle line 482. 10789 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10790 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10791 let expr2_0 = 10792 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10793 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10794 return Some(expr3_0); 10795 } 10796 // Rule at src/isa/s390x/lower.isle line 477. 10797 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10798 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10799 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10800 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10801 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10802 return Some(expr4_0); 10803 } 10804 &Opcode::Ushr => { 10805 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10806 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10807 // Rule at src/isa/s390x/lower.isle line 498. 10808 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10809 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10810 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10811 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10812 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10813 return Some(expr4_0); 10814 } 10815 // Rule at src/isa/s390x/lower.isle line 491. 10816 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10817 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10818 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10819 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10820 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10821 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10822 return Some(expr5_0); 10823 } 10824 &Opcode::Sshr => { 10825 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10826 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10827 // Rule at src/isa/s390x/lower.isle line 515. 10828 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10829 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10830 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10831 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10832 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10833 return Some(expr4_0); 10834 } 10835 // Rule at src/isa/s390x/lower.isle line 508. 10836 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10837 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10838 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10839 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10840 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10841 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10842 return Some(expr5_0); 10843 } 10844 _ => {} 10845 } 10846 } 10847 &InstructionData::Unary { 10848 opcode: ref pattern5_0, 10849 arg: pattern5_1, 10850 } => { 10851 match pattern5_0 { 10852 &Opcode::Ineg => { 10853 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10854 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10855 if let &InstructionData::Unary { 10856 opcode: ref pattern9_0, 10857 arg: pattern9_1, 10858 } = &pattern8_0 10859 { 10860 if let &Opcode::Sextend = pattern9_0 { 10861 let pattern11_0 = C::value_type(ctx, pattern9_1); 10862 if pattern11_0 == I32 { 10863 // Rule at src/isa/s390x/lower.isle line 193. 10864 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10865 let expr1_0 = constructor_neg_reg_sext32( 10866 ctx, pattern3_0, expr0_0, 10867 )?; 10868 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10869 return Some(expr2_0); 10870 } 10871 } 10872 } 10873 } 10874 // Rule at src/isa/s390x/lower.isle line 189. 10875 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10876 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10877 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10878 return Some(expr2_0); 10879 } 10880 &Opcode::Iabs => { 10881 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10882 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10883 if let &InstructionData::Unary { 10884 opcode: ref pattern9_0, 10885 arg: pattern9_1, 10886 } = &pattern8_0 10887 { 10888 if let &Opcode::Sextend = pattern9_0 { 10889 let pattern11_0 = C::value_type(ctx, pattern9_1); 10890 if pattern11_0 == I32 { 10891 // Rule at src/isa/s390x/lower.isle line 141. 10892 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10893 let expr1_0 = constructor_abs_reg_sext32( 10894 ctx, pattern3_0, expr0_0, 10895 )?; 10896 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10897 return Some(expr2_0); 10898 } 10899 } 10900 } 10901 } 10902 // Rule at src/isa/s390x/lower.isle line 137. 10903 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10904 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10905 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10906 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10907 return Some(expr3_0); 10908 } 10909 &Opcode::Clz => { 10910 // Rule at src/isa/s390x/lower.isle line 821. 10911 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10912 let expr1_0: i16 = 64; 10913 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10914 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10915 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10916 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10917 return Some(expr5_0); 10918 } 10919 &Opcode::Cls => { 10920 // Rule at src/isa/s390x/lower.isle line 836. 10921 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 10922 let expr1_0: Type = I64; 10923 let expr2_0: u8 = 63; 10924 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 10925 let expr4_0: Type = I64; 10926 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 10927 let expr6_0: i16 = 64; 10928 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 10929 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 10930 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 10931 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 10932 return Some(expr10_0); 10933 } 10934 &Opcode::Bint => { 10935 // Rule at src/isa/s390x/lower.isle line 804. 10936 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10937 let expr1_0: u64 = 1; 10938 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 10939 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 10940 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10941 return Some(expr4_0); 10942 } 10943 _ => {} 10944 } 10945 } 10946 _ => {} 10947 } 10948 } 10949 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 10950 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10951 match &pattern4_0 { 10952 &InstructionData::Binary { 10953 opcode: ref pattern5_0, 10954 args: ref pattern5_1, 10955 } => { 10956 match pattern5_0 { 10957 &Opcode::Rotl => { 10958 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10959 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10960 // Rule at src/isa/s390x/lower.isle line 528. 10961 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10962 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10963 let expr2_0 = 10964 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10965 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10966 return Some(expr3_0); 10967 } 10968 // Rule at src/isa/s390x/lower.isle line 524. 10969 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10970 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10971 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10972 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10973 return Some(expr3_0); 10974 } 10975 &Opcode::Rotr => { 10976 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10977 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 10978 // Rule at src/isa/s390x/lower.isle line 566. 10979 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10980 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10981 let expr2_0 = 10982 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10983 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10984 return Some(expr3_0); 10985 } 10986 // Rule at src/isa/s390x/lower.isle line 560. 10987 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10988 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10989 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10990 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10991 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10992 return Some(expr4_0); 10993 } 10994 _ => {} 10995 } 10996 } 10997 &InstructionData::AtomicRmw { 10998 opcode: ref pattern5_0, 10999 args: ref pattern5_1, 11000 flags: pattern5_2, 11001 op: ref pattern5_3, 11002 } => { 11003 if let &Opcode::AtomicRmw = pattern5_0 { 11004 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11005 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11006 match pattern5_3 { 11007 &AtomicRmwOp::And => { 11008 // Rule at src/isa/s390x/lower.isle line 1505. 11009 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11010 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11011 let expr2_0 = C::zero_offset(ctx); 11012 let expr3_0 = constructor_lower_address( 11013 ctx, pattern5_2, pattern7_0, expr2_0, 11014 )?; 11015 let expr4_0 = constructor_atomic_rmw_and( 11016 ctx, pattern3_0, expr1_0, &expr3_0, 11017 )?; 11018 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11019 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11020 return Some(expr6_0); 11021 } 11022 &AtomicRmwOp::Or => { 11023 // Rule at src/isa/s390x/lower.isle line 1517. 11024 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11025 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11026 let expr2_0 = C::zero_offset(ctx); 11027 let expr3_0 = constructor_lower_address( 11028 ctx, pattern5_2, pattern7_0, expr2_0, 11029 )?; 11030 let expr4_0 = constructor_atomic_rmw_or( 11031 ctx, pattern3_0, expr1_0, &expr3_0, 11032 )?; 11033 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11034 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11035 return Some(expr6_0); 11036 } 11037 &AtomicRmwOp::Xor => { 11038 // Rule at src/isa/s390x/lower.isle line 1529. 11039 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11040 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11041 let expr2_0 = C::zero_offset(ctx); 11042 let expr3_0 = constructor_lower_address( 11043 ctx, pattern5_2, pattern7_0, expr2_0, 11044 )?; 11045 let expr4_0 = constructor_atomic_rmw_xor( 11046 ctx, pattern3_0, expr1_0, &expr3_0, 11047 )?; 11048 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11049 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11050 return Some(expr6_0); 11051 } 11052 _ => {} 11053 } 11054 } 11055 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11056 match pattern5_3 { 11057 &AtomicRmwOp::Add => { 11058 // Rule at src/isa/s390x/lower.isle line 1535. 11059 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11060 let expr1_0 = C::zero_offset(ctx); 11061 let expr2_0 = constructor_lower_address( 11062 ctx, pattern5_2, pattern7_0, expr1_0, 11063 )?; 11064 let expr3_0 = constructor_atomic_rmw_add( 11065 ctx, pattern3_0, expr0_0, &expr2_0, 11066 )?; 11067 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11068 return Some(expr4_0); 11069 } 11070 &AtomicRmwOp::And => { 11071 // Rule at src/isa/s390x/lower.isle line 1499. 11072 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11073 let expr1_0 = C::zero_offset(ctx); 11074 let expr2_0 = constructor_lower_address( 11075 ctx, pattern5_2, pattern7_0, expr1_0, 11076 )?; 11077 let expr3_0 = constructor_atomic_rmw_and( 11078 ctx, pattern3_0, expr0_0, &expr2_0, 11079 )?; 11080 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11081 return Some(expr4_0); 11082 } 11083 &AtomicRmwOp::Or => { 11084 // Rule at src/isa/s390x/lower.isle line 1511. 11085 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11086 let expr1_0 = C::zero_offset(ctx); 11087 let expr2_0 = constructor_lower_address( 11088 ctx, pattern5_2, pattern7_0, expr1_0, 11089 )?; 11090 let expr3_0 = constructor_atomic_rmw_or( 11091 ctx, pattern3_0, expr0_0, &expr2_0, 11092 )?; 11093 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11094 return Some(expr4_0); 11095 } 11096 &AtomicRmwOp::Sub => { 11097 // Rule at src/isa/s390x/lower.isle line 1541. 11098 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11099 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11100 let expr2_0 = C::zero_offset(ctx); 11101 let expr3_0 = constructor_lower_address( 11102 ctx, pattern5_2, pattern7_0, expr2_0, 11103 )?; 11104 let expr4_0 = constructor_atomic_rmw_add( 11105 ctx, pattern3_0, expr1_0, &expr3_0, 11106 )?; 11107 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11108 return Some(expr5_0); 11109 } 11110 &AtomicRmwOp::Xor => { 11111 // Rule at src/isa/s390x/lower.isle line 1523. 11112 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11113 let expr1_0 = C::zero_offset(ctx); 11114 let expr2_0 = constructor_lower_address( 11115 ctx, pattern5_2, pattern7_0, expr1_0, 11116 )?; 11117 let expr3_0 = constructor_atomic_rmw_xor( 11118 ctx, pattern3_0, expr0_0, &expr2_0, 11119 )?; 11120 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11121 return Some(expr4_0); 11122 } 11123 _ => {} 11124 } 11125 } 11126 // Rule at src/isa/s390x/lower.isle line 1550. 11127 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11128 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11129 let expr2_0 = C::inst_builder_new(ctx); 11130 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11131 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11132 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11133 let expr6_0 = constructor_atomic_rmw_body( 11134 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11135 expr0_0, 11136 )?; 11137 let expr7_0 = constructor_casloop( 11138 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11139 )?; 11140 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11141 return Some(expr8_0); 11142 } 11143 } 11144 &InstructionData::AtomicCas { 11145 opcode: ref pattern5_0, 11146 args: ref pattern5_1, 11147 flags: pattern5_2, 11148 } => { 11149 if let &Opcode::AtomicCas = pattern5_0 { 11150 let (pattern7_0, pattern7_1, pattern7_2) = 11151 C::unpack_value_array_3(ctx, pattern5_1); 11152 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11153 // Rule at src/isa/s390x/lower.isle line 1762. 11154 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11155 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11156 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11157 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11158 let expr4_0 = C::zero_offset(ctx); 11159 let expr5_0 = 11160 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11161 let expr6_0 = constructor_atomic_cas_impl( 11162 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11163 )?; 11164 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11165 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11166 return Some(expr8_0); 11167 } 11168 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11169 // Rule at src/isa/s390x/lower.isle line 1755. 11170 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11171 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11172 let expr2_0 = C::zero_offset(ctx); 11173 let expr3_0 = 11174 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11175 let expr4_0 = constructor_atomic_cas_impl( 11176 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11177 )?; 11178 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11179 return Some(expr5_0); 11180 } 11181 } 11182 } 11183 &InstructionData::Unary { 11184 opcode: ref pattern5_0, 11185 arg: pattern5_1, 11186 } => { 11187 match pattern5_0 { 11188 &Opcode::FcvtToUint => { 11189 let pattern7_0 = C::value_type(ctx, pattern5_1); 11190 // Rule at src/isa/s390x/lower.isle line 1057. 11191 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11192 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11193 let expr2_0 = FloatCC::Unordered; 11194 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11195 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11196 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11197 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11198 ctx, pattern3_0, pattern7_0, expr0_0, 11199 )?; 11200 let expr7_0 = FloatCC::Unordered; 11201 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11202 let expr9_0 = C::trap_code_integer_overflow(ctx); 11203 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11204 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11205 return Some(expr11_0); 11206 } 11207 &Opcode::FcvtToUintSat => { 11208 let pattern7_0 = C::value_type(ctx, pattern5_1); 11209 // Rule at src/isa/s390x/lower.isle line 1098. 11210 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11211 let expr1_0 = 11212 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11213 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11214 let expr3_0 = FloatCC::Unordered; 11215 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11216 let expr5_0: i16 = 0; 11217 let expr6_0 = 11218 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11219 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11220 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11221 return Some(expr8_0); 11222 } 11223 &Opcode::FcvtToSint => { 11224 let pattern7_0 = C::value_type(ctx, pattern5_1); 11225 // Rule at src/isa/s390x/lower.isle line 1078. 11226 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11227 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11228 let expr2_0 = FloatCC::Unordered; 11229 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11230 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11231 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11232 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11233 ctx, pattern3_0, pattern7_0, expr0_0, 11234 )?; 11235 let expr7_0 = FloatCC::Unordered; 11236 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11237 let expr9_0 = C::trap_code_integer_overflow(ctx); 11238 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11239 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11240 return Some(expr11_0); 11241 } 11242 &Opcode::FcvtToSintSat => { 11243 let pattern7_0 = C::value_type(ctx, pattern5_1); 11244 // Rule at src/isa/s390x/lower.isle line 1115. 11245 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11246 let expr1_0 = 11247 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11248 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11249 let expr3_0 = FloatCC::Unordered; 11250 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11251 let expr5_0: i16 = 0; 11252 let expr6_0 = 11253 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11254 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11255 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11256 return Some(expr8_0); 11257 } 11258 _ => {} 11259 } 11260 } 11261 _ => {} 11262 } 11263 } 11264 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11265 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11266 match &pattern4_0 { 11267 &InstructionData::Binary { 11268 opcode: ref pattern5_0, 11269 args: ref pattern5_1, 11270 } => { 11271 match pattern5_0 { 11272 &Opcode::Umulhi => { 11273 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11274 // Rule at src/isa/s390x/lower.isle line 245. 11275 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11276 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11277 let expr2_0: Type = I32; 11278 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11279 let expr4_0: Type = I32; 11280 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11281 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11282 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11283 return Some(expr7_0); 11284 } 11285 &Opcode::Smulhi => { 11286 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11287 // Rule at src/isa/s390x/lower.isle line 267. 11288 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11289 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11290 let expr2_0: Type = I32; 11291 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11292 let expr4_0: Type = I32; 11293 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11294 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11295 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11296 return Some(expr7_0); 11297 } 11298 &Opcode::Rotl => { 11299 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11300 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11301 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11302 { 11303 // Rule at src/isa/s390x/lower.isle line 546. 11304 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11305 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11306 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11307 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11308 let expr4_0 = 11309 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11310 let expr5_0 = 11311 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11312 let expr6_0 = 11313 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11314 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11315 return Some(expr7_0); 11316 } 11317 } 11318 // Rule at src/isa/s390x/lower.isle line 534. 11319 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11320 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11321 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11322 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11323 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11324 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11325 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11326 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11327 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11328 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11329 return Some(expr9_0); 11330 } 11331 &Opcode::Rotr => { 11332 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11333 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11334 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11335 { 11336 // Rule at src/isa/s390x/lower.isle line 584. 11337 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11338 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11339 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11340 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11341 let expr4_0 = 11342 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11343 let expr5_0 = 11344 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11345 let expr6_0 = 11346 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11347 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11348 return Some(expr7_0); 11349 } 11350 } 11351 // Rule at src/isa/s390x/lower.isle line 572. 11352 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11353 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11354 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11355 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11356 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11357 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11358 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11359 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11360 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11361 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11362 return Some(expr9_0); 11363 } 11364 _ => {} 11365 } 11366 } 11367 &InstructionData::AtomicRmw { 11368 opcode: ref pattern5_0, 11369 args: ref pattern5_1, 11370 flags: pattern5_2, 11371 op: ref pattern5_3, 11372 } => { 11373 if let &Opcode::AtomicRmw = pattern5_0 { 11374 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11375 // Rule at src/isa/s390x/lower.isle line 1562. 11376 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11377 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11378 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11379 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11380 let expr4_0 = C::inst_builder_new(ctx); 11381 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11382 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11383 let expr7_0 = constructor_casloop_rotate_in( 11384 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11385 )?; 11386 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11387 let expr9_0 = constructor_atomic_rmw_body( 11388 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11389 expr0_0, 11390 )?; 11391 let expr10_0 = constructor_casloop_rotate_out( 11392 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11393 )?; 11394 let expr11_0 = constructor_casloop_subword( 11395 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11396 )?; 11397 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11398 return Some(expr12_0); 11399 } 11400 } 11401 &InstructionData::AtomicCas { 11402 opcode: ref pattern5_0, 11403 args: ref pattern5_1, 11404 flags: pattern5_2, 11405 } => { 11406 if let &Opcode::AtomicCas = pattern5_0 { 11407 let (pattern7_0, pattern7_1, pattern7_2) = 11408 C::unpack_value_array_3(ctx, pattern5_1); 11409 // Rule at src/isa/s390x/lower.isle line 1769. 11410 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11411 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11412 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11413 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11414 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11415 let expr5_0 = C::inst_builder_new(ctx); 11416 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11417 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11418 let expr8_0 = constructor_casloop_rotate_in( 11419 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11420 )?; 11421 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11422 let expr10_0 = constructor_atomic_cas_body( 11423 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11424 expr1_0, 11425 )?; 11426 let expr11_0 = constructor_casloop_rotate_out( 11427 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11428 )?; 11429 let expr12_0 = constructor_casloop_subword( 11430 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11431 )?; 11432 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11433 return Some(expr13_0); 11434 } 11435 } 11436 _ => {} 11437 } 11438 } 11439 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11440 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11441 match &pattern4_0 { 11442 &InstructionData::Unary { 11443 opcode: ref pattern5_0, 11444 arg: pattern5_1, 11445 } => { 11446 match pattern5_0 { 11447 &Opcode::Ctz => { 11448 // Rule at src/isa/s390x/lower.isle line 859. 11449 let expr0_0: Type = I64; 11450 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11451 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11452 let expr3_0 = 11453 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11454 let expr4_0: Type = I64; 11455 let expr5_0: Type = I64; 11456 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11457 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11458 let expr8_0: i16 = 64; 11459 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11460 let expr10_0: u64 = 63; 11461 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11462 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11463 let expr13_0 = 11464 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11465 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11466 return Some(expr14_0); 11467 } 11468 &Opcode::Uextend => { 11469 // Rule at src/isa/s390x/lower.isle line 603. 11470 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11471 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11472 return Some(expr1_0); 11473 } 11474 &Opcode::Sextend => { 11475 // Rule at src/isa/s390x/lower.isle line 614. 11476 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11477 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11478 return Some(expr1_0); 11479 } 11480 _ => {} 11481 } 11482 } 11483 &InstructionData::Load { 11484 opcode: ref pattern5_0, 11485 arg: pattern5_1, 11486 flags: pattern5_2, 11487 offset: pattern5_3, 11488 } => { 11489 match pattern5_0 { 11490 &Opcode::Uload8 => { 11491 // Rule at src/isa/s390x/lower.isle line 1251. 11492 let expr0_0: Type = I8; 11493 let expr1_0 = 11494 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11495 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11496 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11497 return Some(expr3_0); 11498 } 11499 &Opcode::Sload8 => { 11500 // Rule at src/isa/s390x/lower.isle line 1262. 11501 let expr0_0: Type = I8; 11502 let expr1_0 = 11503 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11504 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11505 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11506 return Some(expr3_0); 11507 } 11508 &Opcode::Uload16 => { 11509 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11510 // Rule at src/isa/s390x/lower.isle line 1278. 11511 let expr0_0 = constructor_lower_address( 11512 ctx, pattern5_2, pattern5_1, pattern5_3, 11513 )?; 11514 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11515 let expr2_0: Type = I16; 11516 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11517 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11518 return Some(expr4_0); 11519 } 11520 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11521 // Rule at src/isa/s390x/lower.isle line 1273. 11522 let expr0_0: Type = I16; 11523 let expr1_0 = constructor_lower_address( 11524 ctx, pattern5_2, pattern5_1, pattern5_3, 11525 )?; 11526 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11527 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11528 return Some(expr3_0); 11529 } 11530 } 11531 &Opcode::Sload16 => { 11532 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11533 // Rule at src/isa/s390x/lower.isle line 1303. 11534 let expr0_0 = constructor_lower_address( 11535 ctx, pattern5_2, pattern5_1, pattern5_3, 11536 )?; 11537 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11538 let expr2_0: Type = I16; 11539 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11540 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11541 return Some(expr4_0); 11542 } 11543 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11544 // Rule at src/isa/s390x/lower.isle line 1298. 11545 let expr0_0: Type = I16; 11546 let expr1_0 = constructor_lower_address( 11547 ctx, pattern5_2, pattern5_1, pattern5_3, 11548 )?; 11549 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11550 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11551 return Some(expr3_0); 11552 } 11553 } 11554 _ => {} 11555 } 11556 } 11557 _ => {} 11558 } 11559 } 11560 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11561 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11562 match &pattern4_0 { 11563 &InstructionData::Unary { 11564 opcode: ref pattern5_0, 11565 arg: pattern5_1, 11566 } => { 11567 match pattern5_0 { 11568 &Opcode::Ctz => { 11569 // Rule at src/isa/s390x/lower.isle line 874. 11570 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11571 let expr1_0: Type = I64; 11572 let expr2_0: Type = I64; 11573 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11574 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11575 let expr5_0: i16 = -1; 11576 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11577 let expr7_0: Type = I64; 11578 let expr8_0: Type = I64; 11579 let expr9_0: u64 = 63; 11580 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11581 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11582 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11583 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11584 return Some(expr13_0); 11585 } 11586 &Opcode::Uextend => { 11587 // Rule at src/isa/s390x/lower.isle line 607. 11588 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11589 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11590 return Some(expr1_0); 11591 } 11592 &Opcode::Sextend => { 11593 // Rule at src/isa/s390x/lower.isle line 618. 11594 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11595 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11596 return Some(expr1_0); 11597 } 11598 _ => {} 11599 } 11600 } 11601 &InstructionData::Load { 11602 opcode: ref pattern5_0, 11603 arg: pattern5_1, 11604 flags: pattern5_2, 11605 offset: pattern5_3, 11606 } => { 11607 match pattern5_0 { 11608 &Opcode::Uload8 => { 11609 // Rule at src/isa/s390x/lower.isle line 1255. 11610 let expr0_0: Type = I8; 11611 let expr1_0 = 11612 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11613 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11614 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11615 return Some(expr3_0); 11616 } 11617 &Opcode::Sload8 => { 11618 // Rule at src/isa/s390x/lower.isle line 1266. 11619 let expr0_0: Type = I8; 11620 let expr1_0 = 11621 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11622 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11623 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11624 return Some(expr3_0); 11625 } 11626 &Opcode::Uload16 => { 11627 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11628 // Rule at src/isa/s390x/lower.isle line 1289. 11629 let expr0_0 = constructor_lower_address( 11630 ctx, pattern5_2, pattern5_1, pattern5_3, 11631 )?; 11632 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11633 let expr2_0: Type = I16; 11634 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11635 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11636 return Some(expr4_0); 11637 } 11638 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11639 // Rule at src/isa/s390x/lower.isle line 1284. 11640 let expr0_0: Type = I16; 11641 let expr1_0 = constructor_lower_address( 11642 ctx, pattern5_2, pattern5_1, pattern5_3, 11643 )?; 11644 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11645 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11646 return Some(expr3_0); 11647 } 11648 } 11649 &Opcode::Sload16 => { 11650 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11651 // Rule at src/isa/s390x/lower.isle line 1314. 11652 let expr0_0 = constructor_lower_address( 11653 ctx, pattern5_2, pattern5_1, pattern5_3, 11654 )?; 11655 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11656 let expr2_0: Type = I16; 11657 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11658 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11659 return Some(expr4_0); 11660 } 11661 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11662 // Rule at src/isa/s390x/lower.isle line 1309. 11663 let expr0_0: Type = I16; 11664 let expr1_0 = constructor_lower_address( 11665 ctx, pattern5_2, pattern5_1, pattern5_3, 11666 )?; 11667 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11668 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11669 return Some(expr3_0); 11670 } 11671 } 11672 &Opcode::Uload32 => { 11673 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11674 // Rule at src/isa/s390x/lower.isle line 1328. 11675 let expr0_0 = constructor_lower_address( 11676 ctx, pattern5_2, pattern5_1, pattern5_3, 11677 )?; 11678 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11679 let expr2_0: Type = I32; 11680 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11681 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11682 return Some(expr4_0); 11683 } 11684 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11685 // Rule at src/isa/s390x/lower.isle line 1323. 11686 let expr0_0: Type = I32; 11687 let expr1_0 = constructor_lower_address( 11688 ctx, pattern5_2, pattern5_1, pattern5_3, 11689 )?; 11690 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11691 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11692 return Some(expr3_0); 11693 } 11694 } 11695 &Opcode::Sload32 => { 11696 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11697 // Rule at src/isa/s390x/lower.isle line 1342. 11698 let expr0_0 = constructor_lower_address( 11699 ctx, pattern5_2, pattern5_1, pattern5_3, 11700 )?; 11701 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11702 let expr2_0: Type = I32; 11703 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11704 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11705 return Some(expr4_0); 11706 } 11707 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11708 // Rule at src/isa/s390x/lower.isle line 1337. 11709 let expr0_0: Type = I32; 11710 let expr1_0 = constructor_lower_address( 11711 ctx, pattern5_2, pattern5_1, pattern5_3, 11712 )?; 11713 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11714 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11715 return Some(expr3_0); 11716 } 11717 } 11718 _ => {} 11719 } 11720 } 11721 _ => {} 11722 } 11723 } 11724 } 11725 return None; 11726 } 11727 11728 // Generated as internal constructor for term lower_branch. 11729 pub fn constructor_lower_branch<C: Context>( 11730 ctx: &mut C, 11731 arg0: Inst, 11732 arg1: &VecMachLabel, 11733 ) -> Option<InstOutput> { 11734 let pattern0_0 = arg0; 11735 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11736 match &pattern1_0 { 11737 &InstructionData::BranchTable { 11738 opcode: ref pattern2_0, 11739 arg: pattern2_1, 11740 destination: pattern2_2, 11741 table: pattern2_3, 11742 } => { 11743 if let &Opcode::BrTable = pattern2_0 { 11744 let pattern4_0 = arg1; 11745 // Rule at src/isa/s390x/lower.isle line 2076. 11746 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11747 let expr1_0: Type = I64; 11748 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11749 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11750 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11751 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11752 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11753 let expr7_0: u8 = 0; 11754 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11755 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11756 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11757 let expr11_0: Type = I64; 11758 let expr12_0: u8 = 2; 11759 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11760 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11761 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11762 return Some(expr15_0); 11763 } 11764 } 11765 &InstructionData::Branch { 11766 opcode: ref pattern2_0, 11767 args: pattern2_1, 11768 destination: pattern2_2, 11769 } => { 11770 match pattern2_0 { 11771 &Opcode::Brz => { 11772 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11773 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11774 let pattern6_0 = arg1; 11775 // Rule at src/isa/s390x/lower.isle line 2109. 11776 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11777 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11778 let expr2_0: u8 = 0; 11779 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11780 let expr4_0: u8 = 1; 11781 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11782 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11783 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11784 return Some(expr7_0); 11785 } 11786 } 11787 &Opcode::Brnz => { 11788 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11789 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11790 let pattern6_0 = arg1; 11791 // Rule at src/isa/s390x/lower.isle line 2120. 11792 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11793 let expr1_0: u8 = 0; 11794 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11795 let expr3_0: u8 = 1; 11796 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11797 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11798 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11799 return Some(expr6_0); 11800 } 11801 } 11802 _ => {} 11803 } 11804 } 11805 &InstructionData::Jump { 11806 opcode: ref pattern2_0, 11807 args: pattern2_1, 11808 destination: pattern2_2, 11809 } => { 11810 if let &Opcode::Jump = pattern2_0 { 11811 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11812 let pattern5_0 = arg1; 11813 // Rule at src/isa/s390x/lower.isle line 2068. 11814 let expr0_0: u8 = 0; 11815 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11816 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11817 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11818 return Some(expr3_0); 11819 } 11820 } 11821 &InstructionData::BranchInt { 11822 opcode: ref pattern2_0, 11823 args: pattern2_1, 11824 cond: ref pattern2_2, 11825 destination: pattern2_3, 11826 } => { 11827 if let &Opcode::Brif = pattern2_0 { 11828 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11829 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11830 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11831 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11832 if let &InstructionData::Binary { 11833 opcode: ref pattern8_0, 11834 args: ref pattern8_1, 11835 } = &pattern7_0 11836 { 11837 if let &Opcode::Ifcmp = pattern8_0 { 11838 let (pattern10_0, pattern10_1) = 11839 C::unpack_value_array_2(ctx, pattern8_1); 11840 let pattern11_0 = arg1; 11841 // Rule at src/isa/s390x/lower.isle line 2131. 11842 let expr0_0: bool = false; 11843 let expr1_0 = constructor_icmp_val( 11844 ctx, 11845 expr0_0, 11846 pattern2_2, 11847 pattern10_0, 11848 pattern10_1, 11849 )?; 11850 let expr2_0: u8 = 0; 11851 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11852 let expr4_0: u8 = 1; 11853 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11854 let expr6_0 = 11855 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11856 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11857 return Some(expr7_0); 11858 } 11859 } 11860 } 11861 } 11862 } 11863 } 11864 _ => {} 11865 } 11866 return None; 11867 } 11868 11869 // Generated as internal constructor for term output_ifcout. 11870 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11871 let pattern0_0 = arg0; 11872 // Rule at src/isa/s390x/lower.isle line 154. 11873 let expr0_0 = C::value_reg(ctx, pattern0_0); 11874 let expr1_0 = C::value_regs_invalid(ctx); 11875 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11876 return Some(expr2_0); 11877 } 11878 11879 // Generated as internal constructor for term zero_divisor_check_needed. 11880 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11881 let pattern0_0 = arg0; 11882 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11883 let pattern2_0 = 0; 11884 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11885 // Rule at src/isa/s390x/lower.isle line 344. 11886 let expr0_0: bool = false; 11887 return Some(expr0_0); 11888 } 11889 } 11890 let pattern1_0 = C::value_type(ctx, pattern0_0); 11891 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11892 // Rule at src/isa/s390x/lower.isle line 345. 11893 let expr0_0: bool = false; 11894 return Some(expr0_0); 11895 } 11896 // Rule at src/isa/s390x/lower.isle line 346. 11897 let expr0_0: bool = true; 11898 return Some(expr0_0); 11899 } 11900 11901 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11902 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11903 ctx: &mut C, 11904 arg0: bool, 11905 arg1: Type, 11906 arg2: Reg, 11907 ) -> Option<Reg> { 11908 let pattern0_0 = arg0; 11909 if pattern0_0 == true { 11910 let pattern2_0 = arg1; 11911 let pattern3_0 = arg2; 11912 // Rule at src/isa/s390x/lower.isle line 352. 11913 let expr0_0: i16 = 0; 11914 let expr1_0 = IntCC::Equal; 11915 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11916 let expr3_0 = C::trap_code_division_by_zero(ctx); 11917 let expr4_0 = constructor_icmps_simm16_and_trap( 11918 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 11919 )?; 11920 return Some(expr4_0); 11921 } 11922 if pattern0_0 == false { 11923 let pattern2_0 = arg1; 11924 let pattern3_0 = arg2; 11925 // Rule at src/isa/s390x/lower.isle line 351. 11926 let expr0_0 = C::invalid_reg(ctx); 11927 return Some(expr0_0); 11928 } 11929 return None; 11930 } 11931 11932 // Generated as internal constructor for term div_overflow_check_needed. 11933 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11934 let pattern0_0 = arg0; 11935 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11936 let pattern2_0 = -1; 11937 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11938 // Rule at src/isa/s390x/lower.isle line 425. 11939 let expr0_0: bool = false; 11940 return Some(expr0_0); 11941 } 11942 } 11943 // Rule at src/isa/s390x/lower.isle line 426. 11944 let expr0_0: bool = true; 11945 return Some(expr0_0); 11946 } 11947 11948 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 11949 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 11950 ctx: &mut C, 11951 arg0: bool, 11952 arg1: Type, 11953 arg2: Type, 11954 arg3: &RegPair, 11955 arg4: Reg, 11956 ) -> Option<Reg> { 11957 let pattern0_0 = arg0; 11958 if pattern0_0 == true { 11959 let pattern2_0 = arg1; 11960 let pattern3_0 = arg2; 11961 let pattern4_0 = arg3; 11962 let pattern5_0 = arg4; 11963 // Rule at src/isa/s390x/lower.isle line 439. 11964 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 11965 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 11966 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 11967 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 11968 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 11969 let expr5_0: i16 = -1; 11970 let expr6_0 = IntCC::Equal; 11971 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 11972 let expr8_0 = C::trap_code_integer_overflow(ctx); 11973 let expr9_0 = constructor_icmps_simm16_and_trap( 11974 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 11975 )?; 11976 return Some(expr9_0); 11977 } 11978 if pattern0_0 == false { 11979 let pattern2_0 = arg1; 11980 let pattern3_0 = arg2; 11981 let pattern4_0 = arg3; 11982 let pattern5_0 = arg4; 11983 // Rule at src/isa/s390x/lower.isle line 438. 11984 let expr0_0 = C::invalid_reg(ctx); 11985 return Some(expr0_0); 11986 } 11987 return None; 11988 } 11989 11990 // Generated as internal constructor for term int_max. 11991 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 11992 let pattern0_0 = arg0; 11993 if pattern0_0 == I8 { 11994 // Rule at src/isa/s390x/lower.isle line 447. 11995 let expr0_0: u64 = 127; 11996 return Some(expr0_0); 11997 } 11998 if pattern0_0 == I16 { 11999 // Rule at src/isa/s390x/lower.isle line 448. 12000 let expr0_0: u64 = 32767; 12001 return Some(expr0_0); 12002 } 12003 if pattern0_0 == I32 { 12004 // Rule at src/isa/s390x/lower.isle line 449. 12005 let expr0_0: u64 = 2147483647; 12006 return Some(expr0_0); 12007 } 12008 if pattern0_0 == I64 { 12009 // Rule at src/isa/s390x/lower.isle line 450. 12010 let expr0_0: u64 = 9223372036854775807; 12011 return Some(expr0_0); 12012 } 12013 return None; 12014 } 12015 12016 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12017 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12018 ctx: &mut C, 12019 arg0: bool, 12020 arg1: Type, 12021 arg2: &RegPair, 12022 arg3: Reg, 12023 ) -> Option<RegPair> { 12024 let pattern0_0 = arg0; 12025 if pattern0_0 == true { 12026 let pattern2_0 = arg1; 12027 if pattern2_0 == I32 { 12028 let pattern4_0 = arg2; 12029 let pattern5_0 = arg3; 12030 // Rule at src/isa/s390x/lower.isle line 468. 12031 return Some(pattern4_0.clone()); 12032 } 12033 if pattern2_0 == I64 { 12034 let pattern4_0 = arg2; 12035 let pattern5_0 = arg3; 12036 // Rule at src/isa/s390x/lower.isle line 469. 12037 let expr0_0: Type = I64; 12038 let expr1_0: Type = I64; 12039 let expr2_0: i16 = -1; 12040 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12041 let expr4_0 = IntCC::Equal; 12042 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12043 let expr6_0: i16 = 0; 12044 let expr7_0 = constructor_cmov_imm_regpair_lo( 12045 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12046 )?; 12047 return Some(expr7_0); 12048 } 12049 } 12050 if pattern0_0 == false { 12051 let pattern2_0 = arg1; 12052 let pattern3_0 = arg2; 12053 let pattern4_0 = arg3; 12054 // Rule at src/isa/s390x/lower.isle line 467. 12055 return Some(pattern3_0.clone()); 12056 } 12057 return None; 12058 } 12059 12060 // Generated as internal constructor for term cast_bool. 12061 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12062 let pattern0_0 = arg0; 12063 if pattern0_0 == B1 { 12064 let pattern2_0 = arg1; 12065 let pattern3_0 = C::value_type(ctx, pattern2_0); 12066 if pattern3_0 == B1 { 12067 // Rule at src/isa/s390x/lower.isle line 766. 12068 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12069 return Some(expr0_0); 12070 } 12071 if pattern3_0 == B8 { 12072 // Rule at src/isa/s390x/lower.isle line 767. 12073 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12074 return Some(expr0_0); 12075 } 12076 } 12077 if pattern0_0 == B8 { 12078 let pattern2_0 = arg1; 12079 let pattern3_0 = C::value_type(ctx, pattern2_0); 12080 if pattern3_0 == B8 { 12081 // Rule at src/isa/s390x/lower.isle line 768. 12082 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12083 return Some(expr0_0); 12084 } 12085 } 12086 if pattern0_0 == I8 { 12087 let pattern2_0 = arg1; 12088 let pattern3_0 = C::value_type(ctx, pattern2_0); 12089 if pattern3_0 == B8 { 12090 // Rule at src/isa/s390x/lower.isle line 769. 12091 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12092 return Some(expr0_0); 12093 } 12094 } 12095 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12096 let pattern2_0 = arg1; 12097 let pattern3_0 = C::value_type(ctx, pattern2_0); 12098 if pattern3_0 == B16 { 12099 // Rule at src/isa/s390x/lower.isle line 770. 12100 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12101 return Some(expr0_0); 12102 } 12103 } 12104 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12105 let pattern2_0 = arg1; 12106 let pattern3_0 = C::value_type(ctx, pattern2_0); 12107 if pattern3_0 == B32 { 12108 // Rule at src/isa/s390x/lower.isle line 771. 12109 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12110 return Some(expr0_0); 12111 } 12112 } 12113 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12114 let pattern2_0 = arg1; 12115 let pattern3_0 = C::value_type(ctx, pattern2_0); 12116 if pattern3_0 == B64 { 12117 // Rule at src/isa/s390x/lower.isle line 772. 12118 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12119 return Some(expr0_0); 12120 } 12121 } 12122 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12123 let pattern2_0 = arg1; 12124 let pattern3_0 = C::value_type(ctx, pattern2_0); 12125 if pattern3_0 == B1 { 12126 // Rule at src/isa/s390x/lower.isle line 775. 12127 let expr0_0: Type = I32; 12128 let expr1_0: Type = I32; 12129 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12130 let expr3_0: u8 = 31; 12131 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12132 let expr5_0: u8 = 31; 12133 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12134 return Some(expr6_0); 12135 } 12136 if pattern3_0 == B8 { 12137 // Rule at src/isa/s390x/lower.isle line 781. 12138 let expr0_0: Type = I8; 12139 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12140 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12141 return Some(expr2_0); 12142 } 12143 if pattern3_0 == B16 { 12144 // Rule at src/isa/s390x/lower.isle line 783. 12145 let expr0_0: Type = I16; 12146 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12147 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12148 return Some(expr2_0); 12149 } 12150 } 12151 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12152 let pattern2_0 = arg1; 12153 let pattern3_0 = C::value_type(ctx, pattern2_0); 12154 if pattern3_0 == B1 { 12155 // Rule at src/isa/s390x/lower.isle line 777. 12156 let expr0_0: Type = I64; 12157 let expr1_0: Type = I64; 12158 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12159 let expr3_0: u8 = 63; 12160 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12161 let expr5_0: u8 = 63; 12162 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12163 return Some(expr6_0); 12164 } 12165 if pattern3_0 == B8 { 12166 // Rule at src/isa/s390x/lower.isle line 785. 12167 let expr0_0: Type = I8; 12168 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12169 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12170 return Some(expr2_0); 12171 } 12172 if pattern3_0 == B16 { 12173 // Rule at src/isa/s390x/lower.isle line 787. 12174 let expr0_0: Type = I16; 12175 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12176 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12177 return Some(expr2_0); 12178 } 12179 if pattern3_0 == B32 { 12180 // Rule at src/isa/s390x/lower.isle line 789. 12181 let expr0_0: Type = I32; 12182 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12183 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12184 return Some(expr2_0); 12185 } 12186 } 12187 return None; 12188 } 12189 12190 // Generated as internal constructor for term clz_offset. 12191 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12192 let pattern0_0 = arg0; 12193 if pattern0_0 == I8 { 12194 let pattern2_0 = arg1; 12195 // Rule at src/isa/s390x/lower.isle line 814. 12196 let expr0_0: Type = I8; 12197 let expr1_0: i16 = -56; 12198 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12199 return Some(expr2_0); 12200 } 12201 if pattern0_0 == I16 { 12202 let pattern2_0 = arg1; 12203 // Rule at src/isa/s390x/lower.isle line 815. 12204 let expr0_0: Type = I16; 12205 let expr1_0: i16 = -48; 12206 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12207 return Some(expr2_0); 12208 } 12209 if pattern0_0 == I32 { 12210 let pattern2_0 = arg1; 12211 // Rule at src/isa/s390x/lower.isle line 816. 12212 let expr0_0: Type = I32; 12213 let expr1_0: i16 = -32; 12214 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12215 return Some(expr2_0); 12216 } 12217 if pattern0_0 == I64 { 12218 let pattern2_0 = arg1; 12219 // Rule at src/isa/s390x/lower.isle line 817. 12220 let expr0_0: Type = I64; 12221 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12222 return Some(expr1_0); 12223 } 12224 return None; 12225 } 12226 12227 // Generated as internal constructor for term ctz_guardbit. 12228 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12229 let pattern0_0 = arg0; 12230 if pattern0_0 == I8 { 12231 // Rule at src/isa/s390x/lower.isle line 866. 12232 let expr0_0: u16 = 256; 12233 let expr1_0: u8 = 0; 12234 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12235 return Some(expr2_0); 12236 } 12237 if pattern0_0 == I16 { 12238 // Rule at src/isa/s390x/lower.isle line 867. 12239 let expr0_0: u16 = 1; 12240 let expr1_0: u8 = 16; 12241 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12242 return Some(expr2_0); 12243 } 12244 if pattern0_0 == I32 { 12245 // Rule at src/isa/s390x/lower.isle line 868. 12246 let expr0_0: u16 = 1; 12247 let expr1_0: u8 = 32; 12248 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12249 return Some(expr2_0); 12250 } 12251 return None; 12252 } 12253 12254 // Generated as internal constructor for term istore8_impl. 12255 pub fn constructor_istore8_impl<C: Context>( 12256 ctx: &mut C, 12257 arg0: MemFlags, 12258 arg1: Value, 12259 arg2: Value, 12260 arg3: Offset32, 12261 ) -> Option<SideEffectNoResult> { 12262 let pattern0_0 = arg0; 12263 let pattern1_0 = arg1; 12264 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12265 let pattern3_0 = arg2; 12266 let pattern4_0 = arg3; 12267 // Rule at src/isa/s390x/lower.isle line 1424. 12268 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12269 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12270 return Some(expr1_0); 12271 } 12272 let pattern2_0 = arg2; 12273 let pattern3_0 = arg3; 12274 // Rule at src/isa/s390x/lower.isle line 1420. 12275 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12276 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12277 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12278 return Some(expr2_0); 12279 } 12280 12281 // Generated as internal constructor for term istore16_impl. 12282 pub fn constructor_istore16_impl<C: Context>( 12283 ctx: &mut C, 12284 arg0: MemFlags, 12285 arg1: Value, 12286 arg2: Value, 12287 arg3: Offset32, 12288 ) -> Option<SideEffectNoResult> { 12289 let pattern0_0 = arg0; 12290 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12291 let pattern2_0 = arg1; 12292 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12293 let pattern4_0 = arg2; 12294 let pattern5_0 = arg3; 12295 // Rule at src/isa/s390x/lower.isle line 1450. 12296 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12297 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12298 return Some(expr1_0); 12299 } 12300 let pattern3_0 = arg2; 12301 let pattern4_0 = arg3; 12302 // Rule at src/isa/s390x/lower.isle line 1442. 12303 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12304 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12305 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12306 return Some(expr2_0); 12307 } 12308 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12309 let pattern2_0 = arg1; 12310 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12311 let pattern4_0 = arg2; 12312 let pattern5_0 = arg3; 12313 // Rule at src/isa/s390x/lower.isle line 1446. 12314 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12315 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12316 return Some(expr1_0); 12317 } 12318 let pattern3_0 = arg2; 12319 let pattern4_0 = arg3; 12320 // Rule at src/isa/s390x/lower.isle line 1438. 12321 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12322 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12323 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12324 return Some(expr2_0); 12325 } 12326 return None; 12327 } 12328 12329 // Generated as internal constructor for term istore32_impl. 12330 pub fn constructor_istore32_impl<C: Context>( 12331 ctx: &mut C, 12332 arg0: MemFlags, 12333 arg1: Value, 12334 arg2: Value, 12335 arg3: Offset32, 12336 ) -> Option<SideEffectNoResult> { 12337 let pattern0_0 = arg0; 12338 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12339 let pattern2_0 = arg1; 12340 let pattern3_0 = arg2; 12341 let pattern4_0 = arg3; 12342 // Rule at src/isa/s390x/lower.isle line 1472. 12343 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12344 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12345 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12346 return Some(expr2_0); 12347 } 12348 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12349 let pattern2_0 = arg1; 12350 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12351 let pattern4_0 = arg2; 12352 let pattern5_0 = arg3; 12353 // Rule at src/isa/s390x/lower.isle line 1468. 12354 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12355 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12356 return Some(expr1_0); 12357 } 12358 let pattern3_0 = arg2; 12359 let pattern4_0 = arg3; 12360 // Rule at src/isa/s390x/lower.isle line 1464. 12361 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12362 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12363 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12364 return Some(expr2_0); 12365 } 12366 return None; 12367 } 12368 12369 // Generated as internal constructor for term istore64_impl. 12370 pub fn constructor_istore64_impl<C: Context>( 12371 ctx: &mut C, 12372 arg0: MemFlags, 12373 arg1: Value, 12374 arg2: Value, 12375 arg3: Offset32, 12376 ) -> Option<SideEffectNoResult> { 12377 let pattern0_0 = arg0; 12378 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12379 let pattern2_0 = arg1; 12380 let pattern3_0 = arg2; 12381 let pattern4_0 = arg3; 12382 // Rule at src/isa/s390x/lower.isle line 1490. 12383 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12384 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12385 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12386 return Some(expr2_0); 12387 } 12388 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12389 let pattern2_0 = arg1; 12390 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12391 let pattern4_0 = arg2; 12392 let pattern5_0 = arg3; 12393 // Rule at src/isa/s390x/lower.isle line 1486. 12394 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12395 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12396 return Some(expr1_0); 12397 } 12398 let pattern3_0 = arg2; 12399 let pattern4_0 = arg3; 12400 // Rule at src/isa/s390x/lower.isle line 1482. 12401 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12402 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12403 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12404 return Some(expr2_0); 12405 } 12406 return None; 12407 } 12408 12409 // Generated as internal constructor for term atomic_rmw_body. 12410 pub fn constructor_atomic_rmw_body<C: Context>( 12411 ctx: &mut C, 12412 arg0: &VecMInstBuilder, 12413 arg1: Type, 12414 arg2: MemFlags, 12415 arg3: &AtomicRmwOp, 12416 arg4: WritableReg, 12417 arg5: Reg, 12418 arg6: Reg, 12419 ) -> Option<Reg> { 12420 let pattern0_0 = arg0; 12421 let pattern1_0 = arg1; 12422 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12423 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12424 let pattern4_0 = arg2; 12425 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12426 let pattern6_0 = arg3; 12427 if let &AtomicRmwOp::Nand = pattern6_0 { 12428 let pattern8_0 = arg4; 12429 let pattern9_0 = arg5; 12430 let pattern10_0 = arg6; 12431 // Rule at src/isa/s390x/lower.isle line 1598. 12432 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12433 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12434 let expr2_0 = constructor_push_alu_reg( 12435 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12436 )?; 12437 return Some(expr2_0); 12438 } 12439 } 12440 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12441 let pattern6_0 = arg3; 12442 if let &AtomicRmwOp::Nand = pattern6_0 { 12443 let pattern8_0 = arg4; 12444 let pattern9_0 = arg5; 12445 let pattern10_0 = arg6; 12446 // Rule at src/isa/s390x/lower.isle line 1595. 12447 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12448 let expr1_0 = constructor_push_alu_reg( 12449 ctx, 12450 pattern0_0, 12451 &expr0_0, 12452 pattern8_0, 12453 pattern9_0, 12454 pattern10_0, 12455 )?; 12456 return Some(expr1_0); 12457 } 12458 } 12459 } 12460 } 12461 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12462 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12463 let pattern4_0 = arg2; 12464 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12465 let pattern6_0 = arg3; 12466 if let &AtomicRmwOp::Nand = pattern6_0 { 12467 let pattern8_0 = arg4; 12468 let pattern9_0 = arg5; 12469 let pattern10_0 = arg6; 12470 // Rule at src/isa/s390x/lower.isle line 1605. 12471 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12472 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12473 let expr2_0 = constructor_push_alu_reg( 12474 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12475 )?; 12476 let expr3_0 = 12477 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12478 return Some(expr3_0); 12479 } 12480 } 12481 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12482 let pattern6_0 = arg3; 12483 if let &AtomicRmwOp::Nand = pattern6_0 { 12484 let pattern8_0 = arg4; 12485 let pattern9_0 = arg5; 12486 let pattern10_0 = arg6; 12487 // Rule at src/isa/s390x/lower.isle line 1601. 12488 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12489 let expr1_0 = constructor_push_alu_reg( 12490 ctx, 12491 pattern0_0, 12492 &expr0_0, 12493 pattern8_0, 12494 pattern9_0, 12495 pattern10_0, 12496 )?; 12497 let expr2_0 = 12498 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12499 return Some(expr2_0); 12500 } 12501 } 12502 } 12503 } 12504 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12505 let pattern3_0 = arg2; 12506 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12507 let pattern5_0 = arg3; 12508 if let &AtomicRmwOp::Xchg = pattern5_0 { 12509 let pattern7_0 = arg4; 12510 let pattern8_0 = arg5; 12511 let pattern9_0 = arg6; 12512 // Rule at src/isa/s390x/lower.isle line 1587. 12513 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12514 return Some(expr0_0); 12515 } 12516 } 12517 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12518 let pattern5_0 = arg3; 12519 if let &AtomicRmwOp::Xchg = pattern5_0 { 12520 let pattern7_0 = arg4; 12521 let pattern8_0 = arg5; 12522 let pattern9_0 = arg6; 12523 // Rule at src/isa/s390x/lower.isle line 1584. 12524 return Some(pattern9_0); 12525 } 12526 } 12527 } 12528 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12529 let pattern3_0 = arg2; 12530 let pattern4_0 = arg3; 12531 match pattern4_0 { 12532 &AtomicRmwOp::And => { 12533 let pattern6_0 = arg4; 12534 let pattern7_0 = arg5; 12535 let pattern8_0 = arg6; 12536 // Rule at src/isa/s390x/lower.isle line 1615. 12537 let expr0_0 = RxSBGOp::And; 12538 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12539 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12540 pattern8_0, 12541 )?; 12542 return Some(expr1_0); 12543 } 12544 &AtomicRmwOp::Nand => { 12545 let pattern6_0 = arg4; 12546 let pattern7_0 = arg5; 12547 let pattern8_0 = arg6; 12548 // Rule at src/isa/s390x/lower.isle line 1621. 12549 let expr0_0 = RxSBGOp::And; 12550 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12551 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12552 pattern8_0, 12553 )?; 12554 let expr2_0 = constructor_atomic_rmw_body_invert( 12555 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12556 )?; 12557 return Some(expr2_0); 12558 } 12559 &AtomicRmwOp::Or => { 12560 let pattern6_0 = arg4; 12561 let pattern7_0 = arg5; 12562 let pattern8_0 = arg6; 12563 // Rule at src/isa/s390x/lower.isle line 1617. 12564 let expr0_0 = RxSBGOp::Or; 12565 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12566 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12567 pattern8_0, 12568 )?; 12569 return Some(expr1_0); 12570 } 12571 &AtomicRmwOp::Xchg => { 12572 let pattern6_0 = arg4; 12573 let pattern7_0 = arg5; 12574 let pattern8_0 = arg6; 12575 // Rule at src/isa/s390x/lower.isle line 1613. 12576 let expr0_0 = RxSBGOp::Insert; 12577 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12578 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12579 pattern8_0, 12580 )?; 12581 return Some(expr1_0); 12582 } 12583 &AtomicRmwOp::Xor => { 12584 let pattern6_0 = arg4; 12585 let pattern7_0 = arg5; 12586 let pattern8_0 = arg6; 12587 // Rule at src/isa/s390x/lower.isle line 1619. 12588 let expr0_0 = RxSBGOp::Xor; 12589 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12590 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12591 pattern8_0, 12592 )?; 12593 return Some(expr1_0); 12594 } 12595 _ => {} 12596 } 12597 } 12598 let pattern2_0 = arg2; 12599 let pattern3_0 = arg3; 12600 match pattern3_0 { 12601 &AtomicRmwOp::Add => { 12602 let pattern5_0 = arg4; 12603 let pattern6_0 = arg5; 12604 let pattern7_0 = arg6; 12605 // Rule at src/isa/s390x/lower.isle line 1653. 12606 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12607 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12608 let expr2_0 = constructor_atomic_rmw_body_addsub( 12609 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12610 pattern7_0, 12611 )?; 12612 return Some(expr2_0); 12613 } 12614 &AtomicRmwOp::Smax => { 12615 let pattern5_0 = arg4; 12616 let pattern6_0 = arg5; 12617 let pattern7_0 = arg6; 12618 // Rule at src/isa/s390x/lower.isle line 1694. 12619 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12620 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12621 let expr2_0 = IntCC::SignedGreaterThan; 12622 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12623 let expr4_0 = constructor_atomic_rmw_body_minmax( 12624 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12625 pattern6_0, pattern7_0, 12626 )?; 12627 return Some(expr4_0); 12628 } 12629 &AtomicRmwOp::Smin => { 12630 let pattern5_0 = arg4; 12631 let pattern6_0 = arg5; 12632 let pattern7_0 = arg6; 12633 // Rule at src/isa/s390x/lower.isle line 1691. 12634 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12635 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12636 let expr2_0 = IntCC::SignedLessThan; 12637 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12638 let expr4_0 = constructor_atomic_rmw_body_minmax( 12639 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12640 pattern6_0, pattern7_0, 12641 )?; 12642 return Some(expr4_0); 12643 } 12644 &AtomicRmwOp::Sub => { 12645 let pattern5_0 = arg4; 12646 let pattern6_0 = arg5; 12647 let pattern7_0 = arg6; 12648 // Rule at src/isa/s390x/lower.isle line 1655. 12649 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12650 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12651 let expr2_0 = constructor_atomic_rmw_body_addsub( 12652 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12653 pattern7_0, 12654 )?; 12655 return Some(expr2_0); 12656 } 12657 &AtomicRmwOp::Umax => { 12658 let pattern5_0 = arg4; 12659 let pattern6_0 = arg5; 12660 let pattern7_0 = arg6; 12661 // Rule at src/isa/s390x/lower.isle line 1700. 12662 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12663 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12664 let expr2_0 = IntCC::UnsignedGreaterThan; 12665 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12666 let expr4_0 = constructor_atomic_rmw_body_minmax( 12667 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12668 pattern6_0, pattern7_0, 12669 )?; 12670 return Some(expr4_0); 12671 } 12672 &AtomicRmwOp::Umin => { 12673 let pattern5_0 = arg4; 12674 let pattern6_0 = arg5; 12675 let pattern7_0 = arg6; 12676 // Rule at src/isa/s390x/lower.isle line 1697. 12677 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12678 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12679 let expr2_0 = IntCC::UnsignedLessThan; 12680 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12681 let expr4_0 = constructor_atomic_rmw_body_minmax( 12682 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12683 pattern6_0, pattern7_0, 12684 )?; 12685 return Some(expr4_0); 12686 } 12687 _ => {} 12688 } 12689 return None; 12690 } 12691 12692 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12693 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12694 ctx: &mut C, 12695 arg0: &VecMInstBuilder, 12696 arg1: Type, 12697 arg2: MemFlags, 12698 arg3: &RxSBGOp, 12699 arg4: WritableReg, 12700 arg5: Reg, 12701 arg6: Reg, 12702 ) -> Option<Reg> { 12703 let pattern0_0 = arg0; 12704 let pattern1_0 = arg1; 12705 if pattern1_0 == I8 { 12706 let pattern3_0 = arg2; 12707 let pattern4_0 = arg3; 12708 let pattern5_0 = arg4; 12709 let pattern6_0 = arg5; 12710 let pattern7_0 = arg6; 12711 // Rule at src/isa/s390x/lower.isle line 1629. 12712 let expr0_0: u8 = 32; 12713 let expr1_0: u8 = 40; 12714 let expr2_0: i8 = 24; 12715 let expr3_0 = constructor_push_rxsbg( 12716 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12717 expr2_0, 12718 )?; 12719 return Some(expr3_0); 12720 } 12721 if pattern1_0 == I16 { 12722 let pattern3_0 = arg2; 12723 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12724 let pattern5_0 = arg3; 12725 let pattern6_0 = arg4; 12726 let pattern7_0 = arg5; 12727 let pattern8_0 = arg6; 12728 // Rule at src/isa/s390x/lower.isle line 1637. 12729 let expr0_0: Type = I32; 12730 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12731 let expr2_0: u8 = 48; 12732 let expr3_0: u8 = 64; 12733 let expr4_0: i8 = -16; 12734 let expr5_0 = constructor_push_rxsbg( 12735 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12736 expr4_0, 12737 )?; 12738 return Some(expr5_0); 12739 } 12740 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12741 let pattern5_0 = arg3; 12742 let pattern6_0 = arg4; 12743 let pattern7_0 = arg5; 12744 let pattern8_0 = arg6; 12745 // Rule at src/isa/s390x/lower.isle line 1633. 12746 let expr0_0: u8 = 32; 12747 let expr1_0: u8 = 48; 12748 let expr2_0: i8 = 16; 12749 let expr3_0 = constructor_push_rxsbg( 12750 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12751 expr2_0, 12752 )?; 12753 return Some(expr3_0); 12754 } 12755 } 12756 return None; 12757 } 12758 12759 // Generated as internal constructor for term atomic_rmw_body_invert. 12760 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12761 ctx: &mut C, 12762 arg0: &VecMInstBuilder, 12763 arg1: Type, 12764 arg2: MemFlags, 12765 arg3: WritableReg, 12766 arg4: Reg, 12767 ) -> Option<Reg> { 12768 let pattern0_0 = arg0; 12769 let pattern1_0 = arg1; 12770 if pattern1_0 == I8 { 12771 let pattern3_0 = arg2; 12772 let pattern4_0 = arg3; 12773 let pattern5_0 = arg4; 12774 // Rule at src/isa/s390x/lower.isle line 1643. 12775 let expr0_0: Type = I32; 12776 let expr1_0: u32 = 4278190080; 12777 let expr2_0: u8 = 0; 12778 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12779 let expr4_0 = constructor_push_xor_uimm32shifted( 12780 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12781 )?; 12782 return Some(expr4_0); 12783 } 12784 if pattern1_0 == I16 { 12785 let pattern3_0 = arg2; 12786 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12787 let pattern5_0 = arg3; 12788 let pattern6_0 = arg4; 12789 // Rule at src/isa/s390x/lower.isle line 1649. 12790 let expr0_0: Type = I32; 12791 let expr1_0: u32 = 65535; 12792 let expr2_0: u8 = 0; 12793 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12794 let expr4_0 = constructor_push_xor_uimm32shifted( 12795 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12796 )?; 12797 return Some(expr4_0); 12798 } 12799 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12800 let pattern5_0 = arg3; 12801 let pattern6_0 = arg4; 12802 // Rule at src/isa/s390x/lower.isle line 1646. 12803 let expr0_0: Type = I32; 12804 let expr1_0: u32 = 4294901760; 12805 let expr2_0: u8 = 0; 12806 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12807 let expr4_0 = constructor_push_xor_uimm32shifted( 12808 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12809 )?; 12810 return Some(expr4_0); 12811 } 12812 } 12813 return None; 12814 } 12815 12816 // Generated as internal constructor for term atomic_rmw_body_addsub. 12817 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12818 ctx: &mut C, 12819 arg0: &VecMInstBuilder, 12820 arg1: Type, 12821 arg2: MemFlags, 12822 arg3: &ALUOp, 12823 arg4: WritableReg, 12824 arg5: Reg, 12825 arg6: Reg, 12826 ) -> Option<Reg> { 12827 let pattern0_0 = arg0; 12828 let pattern1_0 = arg1; 12829 if pattern1_0 == I8 { 12830 let pattern3_0 = arg2; 12831 let pattern4_0 = arg3; 12832 let pattern5_0 = arg4; 12833 let pattern6_0 = arg5; 12834 let pattern7_0 = arg6; 12835 // Rule at src/isa/s390x/lower.isle line 1672. 12836 let expr0_0: Type = I32; 12837 let expr1_0: u8 = 24; 12838 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12839 let expr3_0 = 12840 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12841 return Some(expr3_0); 12842 } 12843 if pattern1_0 == I16 { 12844 let pattern3_0 = arg2; 12845 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12846 let pattern5_0 = arg3; 12847 let pattern6_0 = arg4; 12848 let pattern7_0 = arg5; 12849 let pattern8_0 = arg6; 12850 // Rule at src/isa/s390x/lower.isle line 1684. 12851 let expr0_0: Type = I32; 12852 let expr1_0: u8 = 16; 12853 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12854 let expr3_0: Type = I32; 12855 let expr4_0 = 12856 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12857 let expr5_0 = constructor_push_alu_reg( 12858 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12859 )?; 12860 let expr6_0: Type = I32; 12861 let expr7_0 = 12862 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12863 return Some(expr7_0); 12864 } 12865 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12866 let pattern5_0 = arg3; 12867 let pattern6_0 = arg4; 12868 let pattern7_0 = arg5; 12869 let pattern8_0 = arg6; 12870 // Rule at src/isa/s390x/lower.isle line 1676. 12871 let expr0_0: Type = I32; 12872 let expr1_0: u8 = 16; 12873 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12874 let expr3_0 = constructor_push_alu_reg( 12875 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12876 )?; 12877 return Some(expr3_0); 12878 } 12879 } 12880 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12881 let pattern3_0 = arg2; 12882 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12883 let pattern5_0 = arg3; 12884 let pattern6_0 = arg4; 12885 let pattern7_0 = arg5; 12886 let pattern8_0 = arg6; 12887 // Rule at src/isa/s390x/lower.isle line 1666. 12888 let expr0_0 = 12889 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12890 let expr1_0 = constructor_push_alu_reg( 12891 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12892 )?; 12893 let expr2_0 = 12894 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12895 return Some(expr2_0); 12896 } 12897 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12898 let pattern5_0 = arg3; 12899 let pattern6_0 = arg4; 12900 let pattern7_0 = arg5; 12901 let pattern8_0 = arg6; 12902 // Rule at src/isa/s390x/lower.isle line 1662. 12903 let expr0_0 = constructor_push_alu_reg( 12904 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12905 )?; 12906 return Some(expr0_0); 12907 } 12908 } 12909 return None; 12910 } 12911 12912 // Generated as internal constructor for term atomic_rmw_body_minmax. 12913 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12914 ctx: &mut C, 12915 arg0: &VecMInstBuilder, 12916 arg1: Type, 12917 arg2: MemFlags, 12918 arg3: &CmpOp, 12919 arg4: &Cond, 12920 arg5: WritableReg, 12921 arg6: Reg, 12922 arg7: Reg, 12923 ) -> Option<Reg> { 12924 let pattern0_0 = arg0; 12925 let pattern1_0 = arg1; 12926 if pattern1_0 == I8 { 12927 let pattern3_0 = arg2; 12928 let pattern4_0 = arg3; 12929 let pattern5_0 = arg4; 12930 let pattern6_0 = arg5; 12931 let pattern7_0 = arg6; 12932 let pattern8_0 = arg7; 12933 // Rule at src/isa/s390x/lower.isle line 1729. 12934 let expr0_0: Type = I32; 12935 let expr1_0: u8 = 24; 12936 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12937 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 12938 let expr4_0 = C::invert_cond(ctx, pattern5_0); 12939 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 12940 let expr6_0 = RxSBGOp::Insert; 12941 let expr7_0: u8 = 32; 12942 let expr8_0: u8 = 40; 12943 let expr9_0: i8 = 0; 12944 let expr10_0 = constructor_push_rxsbg( 12945 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 12946 )?; 12947 return Some(expr10_0); 12948 } 12949 if pattern1_0 == I16 { 12950 let pattern3_0 = arg2; 12951 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12952 let pattern5_0 = arg3; 12953 let pattern6_0 = arg4; 12954 let pattern7_0 = arg5; 12955 let pattern8_0 = arg6; 12956 let pattern9_0 = arg7; 12957 // Rule at src/isa/s390x/lower.isle line 1742. 12958 let expr0_0: Type = I32; 12959 let expr1_0: u8 = 16; 12960 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 12961 let expr3_0: Type = I32; 12962 let expr4_0 = 12963 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 12964 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 12965 let expr6_0 = C::invert_cond(ctx, pattern6_0); 12966 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 12967 let expr8_0 = RxSBGOp::Insert; 12968 let expr9_0: u8 = 32; 12969 let expr10_0: u8 = 48; 12970 let expr11_0: i8 = 0; 12971 let expr12_0 = constructor_push_rxsbg( 12972 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 12973 expr11_0, 12974 )?; 12975 let expr13_0: Type = I32; 12976 let expr14_0 = 12977 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 12978 return Some(expr14_0); 12979 } 12980 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12981 let pattern5_0 = arg3; 12982 let pattern6_0 = arg4; 12983 let pattern7_0 = arg5; 12984 let pattern8_0 = arg6; 12985 let pattern9_0 = arg7; 12986 // Rule at src/isa/s390x/lower.isle line 1735. 12987 let expr0_0: Type = I32; 12988 let expr1_0: u8 = 16; 12989 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 12990 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 12991 let expr4_0 = C::invert_cond(ctx, pattern6_0); 12992 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 12993 let expr6_0 = RxSBGOp::Insert; 12994 let expr7_0: u8 = 32; 12995 let expr8_0: u8 = 48; 12996 let expr9_0: i8 = 0; 12997 let expr10_0 = constructor_push_rxsbg( 12998 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 12999 expr9_0, 13000 )?; 13001 return Some(expr10_0); 13002 } 13003 } 13004 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13005 let pattern3_0 = arg2; 13006 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13007 let pattern5_0 = arg3; 13008 let pattern6_0 = arg4; 13009 let pattern7_0 = arg5; 13010 let pattern8_0 = arg6; 13011 let pattern9_0 = arg7; 13012 // Rule at src/isa/s390x/lower.isle line 1717. 13013 let expr0_0 = 13014 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13015 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13016 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13017 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13018 let expr4_0 = 13019 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13020 return Some(expr4_0); 13021 } 13022 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13023 let pattern5_0 = arg3; 13024 let pattern6_0 = arg4; 13025 let pattern7_0 = arg5; 13026 let pattern8_0 = arg6; 13027 let pattern9_0 = arg7; 13028 // Rule at src/isa/s390x/lower.isle line 1710. 13029 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13030 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13031 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13032 return Some(pattern9_0); 13033 } 13034 } 13035 return None; 13036 } 13037 13038 // Generated as internal constructor for term atomic_cas_body. 13039 pub fn constructor_atomic_cas_body<C: Context>( 13040 ctx: &mut C, 13041 arg0: &VecMInstBuilder, 13042 arg1: Type, 13043 arg2: MemFlags, 13044 arg3: WritableReg, 13045 arg4: Reg, 13046 arg5: Reg, 13047 arg6: Reg, 13048 ) -> Option<Reg> { 13049 let pattern0_0 = arg0; 13050 let pattern1_0 = arg1; 13051 if pattern1_0 == I8 { 13052 let pattern3_0 = arg2; 13053 let pattern4_0 = arg3; 13054 let pattern5_0 = arg4; 13055 let pattern6_0 = arg5; 13056 let pattern7_0 = arg6; 13057 // Rule at src/isa/s390x/lower.isle line 1794. 13058 let expr0_0 = RxSBGOp::Xor; 13059 let expr1_0: u8 = 32; 13060 let expr2_0: u8 = 40; 13061 let expr3_0: i8 = 24; 13062 let expr4_0 = constructor_rxsbg_test( 13063 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13064 )?; 13065 let expr5_0 = IntCC::NotEqual; 13066 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13067 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13068 let expr8_0 = RxSBGOp::Insert; 13069 let expr9_0: u8 = 32; 13070 let expr10_0: u8 = 40; 13071 let expr11_0: i8 = 24; 13072 let expr12_0 = constructor_push_rxsbg( 13073 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13074 expr11_0, 13075 )?; 13076 return Some(expr12_0); 13077 } 13078 if pattern1_0 == I16 { 13079 let pattern3_0 = arg2; 13080 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13081 let pattern5_0 = arg3; 13082 let pattern6_0 = arg4; 13083 let pattern7_0 = arg5; 13084 let pattern8_0 = arg6; 13085 // Rule at src/isa/s390x/lower.isle line 1812. 13086 let expr0_0: Type = I32; 13087 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13088 let expr2_0: Type = I32; 13089 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13090 let expr4_0 = RxSBGOp::Xor; 13091 let expr5_0: u8 = 48; 13092 let expr6_0: u8 = 64; 13093 let expr7_0: i8 = -16; 13094 let expr8_0 = constructor_rxsbg_test( 13095 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13096 )?; 13097 let expr9_0 = IntCC::NotEqual; 13098 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13099 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13100 let expr12_0 = RxSBGOp::Insert; 13101 let expr13_0: u8 = 48; 13102 let expr14_0: u8 = 64; 13103 let expr15_0: i8 = -16; 13104 let expr16_0 = constructor_push_rxsbg( 13105 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13106 expr15_0, 13107 )?; 13108 return Some(expr16_0); 13109 } 13110 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13111 let pattern5_0 = arg3; 13112 let pattern6_0 = arg4; 13113 let pattern7_0 = arg5; 13114 let pattern8_0 = arg6; 13115 // Rule at src/isa/s390x/lower.isle line 1801. 13116 let expr0_0 = RxSBGOp::Xor; 13117 let expr1_0: u8 = 32; 13118 let expr2_0: u8 = 48; 13119 let expr3_0: i8 = 16; 13120 let expr4_0 = constructor_rxsbg_test( 13121 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13122 )?; 13123 let expr5_0 = IntCC::NotEqual; 13124 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13125 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13126 let expr8_0 = RxSBGOp::Insert; 13127 let expr9_0: u8 = 32; 13128 let expr10_0: u8 = 48; 13129 let expr11_0: i8 = 16; 13130 let expr12_0 = constructor_push_rxsbg( 13131 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13132 expr11_0, 13133 )?; 13134 return Some(expr12_0); 13135 } 13136 } 13137 return None; 13138 } 13139 13140 // Generated as internal constructor for term atomic_store_impl. 13141 pub fn constructor_atomic_store_impl<C: Context>( 13142 ctx: &mut C, 13143 arg0: &SideEffectNoResult, 13144 ) -> Option<InstOutput> { 13145 let pattern0_0 = arg0; 13146 // Rule at src/isa/s390x/lower.isle line 1858. 13147 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13148 let expr1_0 = constructor_fence_impl(ctx)?; 13149 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13150 return Some(expr2_0); 13151 } 13152 13153 // Generated as internal constructor for term icmp_val. 13154 pub fn constructor_icmp_val<C: Context>( 13155 ctx: &mut C, 13156 arg0: bool, 13157 arg1: &IntCC, 13158 arg2: Value, 13159 arg3: Value, 13160 ) -> Option<ProducesBool> { 13161 let pattern0_0 = arg0; 13162 let pattern1_0 = arg1; 13163 if let Some(()) = C::signed(ctx, pattern1_0) { 13164 let pattern3_0 = arg2; 13165 let pattern4_0 = arg3; 13166 // Rule at src/isa/s390x/lower.isle line 1925. 13167 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13168 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13169 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13170 return Some(expr2_0); 13171 } 13172 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13173 let pattern3_0 = arg2; 13174 let pattern4_0 = arg3; 13175 // Rule at src/isa/s390x/lower.isle line 1928. 13176 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13177 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13178 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13179 return Some(expr2_0); 13180 } 13181 return None; 13182 } 13183 13184 // Generated as internal constructor for term icmps_val. 13185 pub fn constructor_icmps_val<C: Context>( 13186 ctx: &mut C, 13187 arg0: bool, 13188 arg1: Value, 13189 arg2: Value, 13190 ) -> Option<ProducesFlags> { 13191 let pattern0_0 = arg0; 13192 if pattern0_0 == true { 13193 let pattern2_0 = arg1; 13194 let pattern3_0 = C::value_type(ctx, pattern2_0); 13195 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13196 let pattern5_0 = arg2; 13197 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13198 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13199 if let &InstructionData::Load { 13200 opcode: ref pattern8_0, 13201 arg: pattern8_1, 13202 flags: pattern8_2, 13203 offset: pattern8_3, 13204 } = &pattern7_0 13205 { 13206 match pattern8_0 { 13207 &Opcode::Sload16 => { 13208 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13209 // Rule at src/isa/s390x/lower.isle line 1958. 13210 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13211 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13212 let expr2_0 = constructor_icmps_mem_sext16( 13213 ctx, pattern4_0, expr0_0, &expr1_0, 13214 )?; 13215 return Some(expr2_0); 13216 } 13217 } 13218 &Opcode::Sload32 => { 13219 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13220 // Rule at src/isa/s390x/lower.isle line 1960. 13221 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13222 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13223 let expr2_0 = constructor_icmps_mem_sext32( 13224 ctx, pattern4_0, expr0_0, &expr1_0, 13225 )?; 13226 return Some(expr2_0); 13227 } 13228 } 13229 _ => {} 13230 } 13231 } 13232 } 13233 let pattern6_0 = C::value_type(ctx, pattern5_0); 13234 if pattern6_0 == I16 { 13235 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13236 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13237 if let &InstructionData::Load { 13238 opcode: ref pattern10_0, 13239 arg: pattern10_1, 13240 flags: pattern10_2, 13241 offset: pattern10_3, 13242 } = &pattern9_0 13243 { 13244 if let &Opcode::Load = pattern10_0 { 13245 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13246 // Rule at src/isa/s390x/lower.isle line 1954. 13247 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13248 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13249 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13250 let expr3_0 = 13251 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13252 return Some(expr3_0); 13253 } 13254 } 13255 } 13256 } 13257 } 13258 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13259 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13260 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13261 if let &InstructionData::Load { 13262 opcode: ref pattern10_0, 13263 arg: pattern10_1, 13264 flags: pattern10_2, 13265 offset: pattern10_3, 13266 } = &pattern9_0 13267 { 13268 if let &Opcode::Load = pattern10_0 { 13269 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13270 // Rule at src/isa/s390x/lower.isle line 1950. 13271 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13272 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13273 let expr2_0 = 13274 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13275 return Some(expr2_0); 13276 } 13277 } 13278 } 13279 } 13280 } 13281 } 13282 } 13283 let pattern1_0 = arg1; 13284 let pattern2_0 = C::value_type(ctx, pattern1_0); 13285 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13286 let pattern4_0 = arg2; 13287 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13288 // Rule at src/isa/s390x/lower.isle line 1944. 13289 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13290 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13291 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13292 return Some(expr2_0); 13293 } 13294 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13295 // Rule at src/isa/s390x/lower.isle line 1946. 13296 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13297 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13298 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13299 return Some(expr2_0); 13300 } 13301 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13302 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13303 if let &InstructionData::Unary { 13304 opcode: ref pattern7_0, 13305 arg: pattern7_1, 13306 } = &pattern6_0 13307 { 13308 if let &Opcode::Sextend = pattern7_0 { 13309 let pattern9_0 = C::value_type(ctx, pattern7_1); 13310 if pattern9_0 == I32 { 13311 // Rule at src/isa/s390x/lower.isle line 1940. 13312 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13313 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13314 let expr2_0 = 13315 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13316 return Some(expr2_0); 13317 } 13318 } 13319 } 13320 } 13321 // Rule at src/isa/s390x/lower.isle line 1936. 13322 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13323 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13324 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13325 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13326 return Some(expr3_0); 13327 } 13328 return None; 13329 } 13330 13331 // Generated as internal constructor for term icmpu_val. 13332 pub fn constructor_icmpu_val<C: Context>( 13333 ctx: &mut C, 13334 arg0: bool, 13335 arg1: Value, 13336 arg2: Value, 13337 ) -> Option<ProducesFlags> { 13338 let pattern0_0 = arg0; 13339 if pattern0_0 == true { 13340 let pattern2_0 = arg1; 13341 let pattern3_0 = C::value_type(ctx, pattern2_0); 13342 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13343 let pattern5_0 = arg2; 13344 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13345 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13346 if let &InstructionData::Load { 13347 opcode: ref pattern8_0, 13348 arg: pattern8_1, 13349 flags: pattern8_2, 13350 offset: pattern8_3, 13351 } = &pattern7_0 13352 { 13353 match pattern8_0 { 13354 &Opcode::Uload16 => { 13355 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13356 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13357 if let &InstructionData::UnaryGlobalValue { 13358 opcode: ref pattern12_0, 13359 global_value: pattern12_1, 13360 } = &pattern11_0 13361 { 13362 if let &Opcode::SymbolValue = pattern12_0 { 13363 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13364 C::symbol_value_data(ctx, pattern12_1) 13365 { 13366 if let Some(()) = 13367 C::reloc_distance_near(ctx, pattern14_1) 13368 { 13369 let pattern16_0 = 13370 C::i64_from_offset(ctx, pattern8_3); 13371 let closure17 = || { 13372 return Some(pattern14_2); 13373 }; 13374 if let Some(pattern17_0) = closure17() { 13375 if let Some(pattern18_0) = 13376 C::memarg_symbol_offset_sum( 13377 ctx, 13378 pattern16_0, 13379 pattern17_0, 13380 ) 13381 { 13382 let pattern19_0 = 13383 C::inst_data(ctx, pattern6_0); 13384 if let &InstructionData::Load { 13385 opcode: ref pattern20_0, 13386 arg: pattern20_1, 13387 flags: pattern20_2, 13388 offset: pattern20_3, 13389 } = &pattern19_0 13390 { 13391 if let &Opcode::Uload16 = pattern20_0 { 13392 if let Some(()) = 13393 C::bigendian(ctx, pattern20_2) 13394 { 13395 // Rule at src/isa/s390x/lower.isle line 1993. 13396 let expr0_0 = C::put_in_reg( 13397 ctx, pattern2_0, 13398 ); 13399 let expr1_0 = 13400 constructor_sink_uload16( 13401 ctx, pattern6_0, 13402 )?; 13403 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13404 return Some(expr2_0); 13405 } 13406 } 13407 } 13408 } 13409 } 13410 } 13411 } 13412 } 13413 } 13414 } 13415 } 13416 &Opcode::Uload32 => { 13417 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13418 // Rule at src/isa/s390x/lower.isle line 1996. 13419 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13420 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13421 let expr2_0 = constructor_icmpu_mem_zext32( 13422 ctx, pattern4_0, expr0_0, &expr1_0, 13423 )?; 13424 return Some(expr2_0); 13425 } 13426 } 13427 _ => {} 13428 } 13429 } 13430 } 13431 let pattern6_0 = C::value_type(ctx, pattern5_0); 13432 if pattern6_0 == I16 { 13433 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13434 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13435 if let &InstructionData::Load { 13436 opcode: ref pattern10_0, 13437 arg: pattern10_1, 13438 flags: pattern10_2, 13439 offset: pattern10_3, 13440 } = &pattern9_0 13441 { 13442 if let &Opcode::Load = pattern10_0 { 13443 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13444 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13445 if let &InstructionData::UnaryGlobalValue { 13446 opcode: ref pattern14_0, 13447 global_value: pattern14_1, 13448 } = &pattern13_0 13449 { 13450 if let &Opcode::SymbolValue = pattern14_0 { 13451 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13452 C::symbol_value_data(ctx, pattern14_1) 13453 { 13454 if let Some(()) = 13455 C::reloc_distance_near(ctx, pattern16_1) 13456 { 13457 let pattern18_0 = 13458 C::i64_from_offset(ctx, pattern10_3); 13459 let closure19 = || { 13460 return Some(pattern16_2); 13461 }; 13462 if let Some(pattern19_0) = closure19() { 13463 if let Some(pattern20_0) = 13464 C::memarg_symbol_offset_sum( 13465 ctx, 13466 pattern18_0, 13467 pattern19_0, 13468 ) 13469 { 13470 let pattern21_0 = 13471 C::inst_data(ctx, pattern8_0); 13472 if let &InstructionData::Load { 13473 opcode: ref pattern22_0, 13474 arg: pattern22_1, 13475 flags: pattern22_2, 13476 offset: pattern22_3, 13477 } = &pattern21_0 13478 { 13479 if let &Opcode::Load = pattern22_0 { 13480 if let Some(()) = 13481 C::bigendian(ctx, pattern22_2) 13482 { 13483 // Rule at src/isa/s390x/lower.isle line 1986. 13484 let expr0_0 = 13485 constructor_ty_ext32( 13486 ctx, pattern4_0, 13487 )?; 13488 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13489 let expr2_0 = 13490 constructor_sink_load( 13491 ctx, pattern8_0, 13492 )?; 13493 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13494 return Some(expr3_0); 13495 } 13496 } 13497 } 13498 } 13499 } 13500 } 13501 } 13502 } 13503 } 13504 } 13505 } 13506 } 13507 } 13508 } 13509 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13510 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13511 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13512 if let &InstructionData::Load { 13513 opcode: ref pattern10_0, 13514 arg: pattern10_1, 13515 flags: pattern10_2, 13516 offset: pattern10_3, 13517 } = &pattern9_0 13518 { 13519 if let &Opcode::Load = pattern10_0 { 13520 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13521 // Rule at src/isa/s390x/lower.isle line 1980. 13522 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13523 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13524 let expr2_0 = 13525 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13526 return Some(expr2_0); 13527 } 13528 } 13529 } 13530 } 13531 } 13532 } 13533 } 13534 let pattern1_0 = arg1; 13535 let pattern2_0 = C::value_type(ctx, pattern1_0); 13536 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13537 let pattern4_0 = arg2; 13538 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13539 // Rule at src/isa/s390x/lower.isle line 1976. 13540 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13541 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13542 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13543 return Some(expr2_0); 13544 } 13545 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13546 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13547 if let &InstructionData::Unary { 13548 opcode: ref pattern7_0, 13549 arg: pattern7_1, 13550 } = &pattern6_0 13551 { 13552 if let &Opcode::Uextend = pattern7_0 { 13553 let pattern9_0 = C::value_type(ctx, pattern7_1); 13554 if pattern9_0 == I32 { 13555 // Rule at src/isa/s390x/lower.isle line 1972. 13556 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13557 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13558 let expr2_0 = 13559 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13560 return Some(expr2_0); 13561 } 13562 } 13563 } 13564 } 13565 // Rule at src/isa/s390x/lower.isle line 1968. 13566 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13567 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13568 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13569 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13570 return Some(expr3_0); 13571 } 13572 return None; 13573 } 13574 13575 // Generated as internal constructor for term fcmp_val. 13576 pub fn constructor_fcmp_val<C: Context>( 13577 ctx: &mut C, 13578 arg0: &FloatCC, 13579 arg1: Value, 13580 arg2: Value, 13581 ) -> Option<ProducesBool> { 13582 let pattern0_0 = arg0; 13583 let pattern1_0 = arg1; 13584 let pattern2_0 = C::value_type(ctx, pattern1_0); 13585 let pattern3_0 = arg2; 13586 // Rule at src/isa/s390x/lower.isle line 2009. 13587 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13588 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13589 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13590 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13591 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13592 return Some(expr4_0); 13593 } 13594 13595 // Generated as internal constructor for term value_nonzero. 13596 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13597 let pattern0_0 = arg0; 13598 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13599 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13600 match &pattern2_0 { 13601 &InstructionData::FloatCompare { 13602 opcode: ref pattern3_0, 13603 args: ref pattern3_1, 13604 cond: ref pattern3_2, 13605 } => { 13606 if let &Opcode::Fcmp = pattern3_0 { 13607 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13608 // Rule at src/isa/s390x/lower.isle line 2037. 13609 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13610 return Some(expr0_0); 13611 } 13612 } 13613 &InstructionData::IntCompare { 13614 opcode: ref pattern3_0, 13615 args: ref pattern3_1, 13616 cond: ref pattern3_2, 13617 } => { 13618 if let &Opcode::Icmp = pattern3_0 { 13619 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13620 // Rule at src/isa/s390x/lower.isle line 2036. 13621 let expr0_0: bool = false; 13622 let expr1_0 = 13623 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13624 return Some(expr1_0); 13625 } 13626 } 13627 &InstructionData::Unary { 13628 opcode: ref pattern3_0, 13629 arg: pattern3_1, 13630 } => { 13631 if let &Opcode::Bint = pattern3_0 { 13632 // Rule at src/isa/s390x/lower.isle line 2035. 13633 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13634 return Some(expr0_0); 13635 } 13636 } 13637 _ => {} 13638 } 13639 } 13640 let pattern1_0 = C::value_type(ctx, pattern0_0); 13641 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13642 // Rule at src/isa/s390x/lower.isle line 2038. 13643 let expr0_0: Type = I32; 13644 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13645 let expr2_0: i16 = 0; 13646 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13647 let expr4_0 = IntCC::NotEqual; 13648 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13649 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13650 return Some(expr6_0); 13651 } 13652 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13653 // Rule at src/isa/s390x/lower.isle line 2041. 13654 let expr0_0: Type = I64; 13655 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13656 let expr2_0: i16 = 0; 13657 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13658 let expr4_0 = IntCC::NotEqual; 13659 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13660 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13661 return Some(expr6_0); 13662 } 13663 return None; 13664 } 13665