1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 29 fn invalid_reg(&mut self) -> Reg; 30 fn put_in_reg(&mut self, arg0: Value) -> Reg; 31 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 32 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 33 fn u8_as_u64(&mut self, arg0: u8) -> u64; 34 fn u16_as_u64(&mut self, arg0: u16) -> u64; 35 fn u32_as_u64(&mut self, arg0: u32) -> u64; 36 fn ty_bits(&mut self, arg0: Type) -> u8; 37 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 38 fn ty_bytes(&mut self, arg0: Type) -> u16; 39 fn lane_type(&mut self, arg0: Type) -> Type; 40 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 41 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 42 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 43 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 44 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 45 fn vec128(&mut self, arg0: Type) -> Option<Type>; 46 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 47 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 48 fn unwrap_head_value_list_1(&mut self, arg0: ValueList) -> (Value, ValueSlice); 49 fn unwrap_head_value_list_2(&mut self, arg0: ValueList) -> (Value, Value, ValueSlice); 50 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 51 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 52 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 53 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 54 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 55 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 56 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 57 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 58 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 59 fn value_type(&mut self, arg0: Value) -> Type; 60 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 61 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 62 fn emit(&mut self, arg0: &MInst) -> Unit; 63 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 64 fn trap_code_division_by_zero(&mut self) -> TrapCode; 65 fn trap_code_integer_overflow(&mut self) -> TrapCode; 66 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 67 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 68 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 69 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 70 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 71 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 72 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 73 fn symbol_value_data(&mut self, arg0: Inst) -> Option<(BoxExternalName, RelocDistance, i64)>; 74 fn call_target_data(&mut self, arg0: Inst) -> Option<(BoxExternalName, RelocDistance)>; 75 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 76 fn zero_reg(&mut self) -> Reg; 77 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 78 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 79 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 80 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 81 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 82 fn u8_as_u16(&mut self, arg0: u8) -> u16; 83 fn u64_as_u32(&mut self, arg0: u64) -> u32; 84 fn u64_as_i16(&mut self, arg0: u64) -> i16; 85 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 86 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 87 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 88 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 89 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 90 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 91 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 92 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 93 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 94 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 95 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 96 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 97 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 98 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 99 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 100 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 101 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 102 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 103 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 104 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 105 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 106 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 107 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 108 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 109 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 110 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 111 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 112 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 113 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 114 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 115 fn reloc_distance_near(&mut self, arg0: &RelocDistance) -> Option<()>; 116 fn zero_offset(&mut self) -> Offset32; 117 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 118 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 119 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 120 fn memflags_trusted(&mut self) -> MemFlags; 121 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 122 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 123 fn memarg_symbol(&mut self, arg0: BoxExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 124 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 125 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 126 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 127 fn sink_inst(&mut self, arg0: Inst) -> Unit; 128 } 129 130 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 295. 131 #[derive(Clone, Debug)] 132 pub enum SideEffectNoResult { 133 Inst { inst: MInst }, 134 } 135 136 /// Internal type ProducesFlags: defined at src/prelude.isle line 314. 137 #[derive(Clone, Debug)] 138 pub enum ProducesFlags { 139 ProducesFlags { inst: MInst, result: Reg }, 140 } 141 142 /// Internal type ConsumesFlags: defined at src/prelude.isle line 317. 143 #[derive(Clone, Debug)] 144 pub enum ConsumesFlags { 145 ConsumesFlags { inst: MInst, result: Reg }, 146 } 147 148 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 149 #[derive(Clone, Debug)] 150 pub enum MInst { 151 Nop0, 152 Nop2, 153 AluRRR { 154 alu_op: ALUOp, 155 rd: WritableReg, 156 rn: Reg, 157 rm: Reg, 158 }, 159 AluRRSImm16 { 160 alu_op: ALUOp, 161 rd: WritableReg, 162 rn: Reg, 163 imm: i16, 164 }, 165 AluRR { 166 alu_op: ALUOp, 167 rd: WritableReg, 168 rm: Reg, 169 }, 170 AluRX { 171 alu_op: ALUOp, 172 rd: WritableReg, 173 mem: MemArg, 174 }, 175 AluRSImm16 { 176 alu_op: ALUOp, 177 rd: WritableReg, 178 imm: i16, 179 }, 180 AluRSImm32 { 181 alu_op: ALUOp, 182 rd: WritableReg, 183 imm: i32, 184 }, 185 AluRUImm32 { 186 alu_op: ALUOp, 187 rd: WritableReg, 188 imm: u32, 189 }, 190 AluRUImm16Shifted { 191 alu_op: ALUOp, 192 rd: WritableReg, 193 imm: UImm16Shifted, 194 }, 195 AluRUImm32Shifted { 196 alu_op: ALUOp, 197 rd: WritableReg, 198 imm: UImm32Shifted, 199 }, 200 SMulWide { 201 rn: Reg, 202 rm: Reg, 203 }, 204 UMulWide { 205 rn: Reg, 206 }, 207 SDivMod32 { 208 rn: Reg, 209 }, 210 SDivMod64 { 211 rn: Reg, 212 }, 213 UDivMod32 { 214 rn: Reg, 215 }, 216 UDivMod64 { 217 rn: Reg, 218 }, 219 Flogr { 220 rn: Reg, 221 }, 222 ShiftRR { 223 shift_op: ShiftOp, 224 rd: WritableReg, 225 rn: Reg, 226 shift_imm: u8, 227 shift_reg: Reg, 228 }, 229 UnaryRR { 230 op: UnaryOp, 231 rd: WritableReg, 232 rn: Reg, 233 }, 234 CmpRR { 235 op: CmpOp, 236 rn: Reg, 237 rm: Reg, 238 }, 239 CmpRX { 240 op: CmpOp, 241 rn: Reg, 242 mem: MemArg, 243 }, 244 CmpRSImm16 { 245 op: CmpOp, 246 rn: Reg, 247 imm: i16, 248 }, 249 CmpRSImm32 { 250 op: CmpOp, 251 rn: Reg, 252 imm: i32, 253 }, 254 CmpRUImm32 { 255 op: CmpOp, 256 rn: Reg, 257 imm: u32, 258 }, 259 CmpTrapRR { 260 op: CmpOp, 261 rn: Reg, 262 rm: Reg, 263 cond: Cond, 264 trap_code: TrapCode, 265 }, 266 CmpTrapRSImm16 { 267 op: CmpOp, 268 rn: Reg, 269 imm: i16, 270 cond: Cond, 271 trap_code: TrapCode, 272 }, 273 CmpTrapRUImm16 { 274 op: CmpOp, 275 rn: Reg, 276 imm: u16, 277 cond: Cond, 278 trap_code: TrapCode, 279 }, 280 AtomicRmw { 281 alu_op: ALUOp, 282 rd: WritableReg, 283 rn: Reg, 284 mem: MemArg, 285 }, 286 AtomicCas32 { 287 rd: WritableReg, 288 rn: Reg, 289 mem: MemArg, 290 }, 291 AtomicCas64 { 292 rd: WritableReg, 293 rn: Reg, 294 mem: MemArg, 295 }, 296 Fence, 297 Load32 { 298 rd: WritableReg, 299 mem: MemArg, 300 }, 301 Load32ZExt8 { 302 rd: WritableReg, 303 mem: MemArg, 304 }, 305 Load32SExt8 { 306 rd: WritableReg, 307 mem: MemArg, 308 }, 309 Load32ZExt16 { 310 rd: WritableReg, 311 mem: MemArg, 312 }, 313 Load32SExt16 { 314 rd: WritableReg, 315 mem: MemArg, 316 }, 317 Load64 { 318 rd: WritableReg, 319 mem: MemArg, 320 }, 321 Load64ZExt8 { 322 rd: WritableReg, 323 mem: MemArg, 324 }, 325 Load64SExt8 { 326 rd: WritableReg, 327 mem: MemArg, 328 }, 329 Load64ZExt16 { 330 rd: WritableReg, 331 mem: MemArg, 332 }, 333 Load64SExt16 { 334 rd: WritableReg, 335 mem: MemArg, 336 }, 337 Load64ZExt32 { 338 rd: WritableReg, 339 mem: MemArg, 340 }, 341 Load64SExt32 { 342 rd: WritableReg, 343 mem: MemArg, 344 }, 345 LoadRev16 { 346 rd: WritableReg, 347 mem: MemArg, 348 }, 349 LoadRev32 { 350 rd: WritableReg, 351 mem: MemArg, 352 }, 353 LoadRev64 { 354 rd: WritableReg, 355 mem: MemArg, 356 }, 357 Store8 { 358 rd: Reg, 359 mem: MemArg, 360 }, 361 Store16 { 362 rd: Reg, 363 mem: MemArg, 364 }, 365 Store32 { 366 rd: Reg, 367 mem: MemArg, 368 }, 369 Store64 { 370 rd: Reg, 371 mem: MemArg, 372 }, 373 StoreImm8 { 374 imm: u8, 375 mem: MemArg, 376 }, 377 StoreImm16 { 378 imm: i16, 379 mem: MemArg, 380 }, 381 StoreImm32SExt16 { 382 imm: i16, 383 mem: MemArg, 384 }, 385 StoreImm64SExt16 { 386 imm: i16, 387 mem: MemArg, 388 }, 389 StoreRev16 { 390 rd: Reg, 391 mem: MemArg, 392 }, 393 StoreRev32 { 394 rd: Reg, 395 mem: MemArg, 396 }, 397 StoreRev64 { 398 rd: Reg, 399 mem: MemArg, 400 }, 401 LoadMultiple64 { 402 rt: WritableReg, 403 rt2: WritableReg, 404 mem: MemArg, 405 }, 406 StoreMultiple64 { 407 rt: Reg, 408 rt2: Reg, 409 mem: MemArg, 410 }, 411 Mov32 { 412 rd: WritableReg, 413 rm: Reg, 414 }, 415 Mov64 { 416 rd: WritableReg, 417 rm: Reg, 418 }, 419 Mov32Imm { 420 rd: WritableReg, 421 imm: u32, 422 }, 423 Mov32SImm16 { 424 rd: WritableReg, 425 imm: i16, 426 }, 427 Mov64SImm16 { 428 rd: WritableReg, 429 imm: i16, 430 }, 431 Mov64SImm32 { 432 rd: WritableReg, 433 imm: i32, 434 }, 435 Mov64UImm16Shifted { 436 rd: WritableReg, 437 imm: UImm16Shifted, 438 }, 439 Mov64UImm32Shifted { 440 rd: WritableReg, 441 imm: UImm32Shifted, 442 }, 443 Insert64UImm16Shifted { 444 rd: WritableReg, 445 imm: UImm16Shifted, 446 }, 447 Insert64UImm32Shifted { 448 rd: WritableReg, 449 imm: UImm32Shifted, 450 }, 451 Extend { 452 rd: WritableReg, 453 rn: Reg, 454 signed: bool, 455 from_bits: u8, 456 to_bits: u8, 457 }, 458 CMov32 { 459 rd: WritableReg, 460 cond: Cond, 461 rm: Reg, 462 }, 463 CMov64 { 464 rd: WritableReg, 465 cond: Cond, 466 rm: Reg, 467 }, 468 CMov32SImm16 { 469 rd: WritableReg, 470 cond: Cond, 471 imm: i16, 472 }, 473 CMov64SImm16 { 474 rd: WritableReg, 475 cond: Cond, 476 imm: i16, 477 }, 478 FpuMove32 { 479 rd: WritableReg, 480 rn: Reg, 481 }, 482 FpuMove64 { 483 rd: WritableReg, 484 rn: Reg, 485 }, 486 FpuCMov32 { 487 rd: WritableReg, 488 cond: Cond, 489 rm: Reg, 490 }, 491 FpuCMov64 { 492 rd: WritableReg, 493 cond: Cond, 494 rm: Reg, 495 }, 496 MovToFpr { 497 rd: WritableReg, 498 rn: Reg, 499 }, 500 MovFromFpr { 501 rd: WritableReg, 502 rn: Reg, 503 }, 504 FpuRR { 505 fpu_op: FPUOp1, 506 rd: WritableReg, 507 rn: Reg, 508 }, 509 FpuRRR { 510 fpu_op: FPUOp2, 511 rd: WritableReg, 512 rm: Reg, 513 }, 514 FpuRRRR { 515 fpu_op: FPUOp3, 516 rd: WritableReg, 517 rn: Reg, 518 rm: Reg, 519 }, 520 FpuCopysign { 521 rd: WritableReg, 522 rn: Reg, 523 rm: Reg, 524 }, 525 FpuCmp32 { 526 rn: Reg, 527 rm: Reg, 528 }, 529 FpuCmp64 { 530 rn: Reg, 531 rm: Reg, 532 }, 533 FpuLoad32 { 534 rd: WritableReg, 535 mem: MemArg, 536 }, 537 FpuStore32 { 538 rd: Reg, 539 mem: MemArg, 540 }, 541 FpuLoad64 { 542 rd: WritableReg, 543 mem: MemArg, 544 }, 545 FpuStore64 { 546 rd: Reg, 547 mem: MemArg, 548 }, 549 FpuLoadRev32 { 550 rd: WritableReg, 551 mem: MemArg, 552 }, 553 FpuStoreRev32 { 554 rd: Reg, 555 mem: MemArg, 556 }, 557 FpuLoadRev64 { 558 rd: WritableReg, 559 mem: MemArg, 560 }, 561 FpuStoreRev64 { 562 rd: Reg, 563 mem: MemArg, 564 }, 565 LoadFpuConst32 { 566 rd: WritableReg, 567 const_data: u32, 568 }, 569 LoadFpuConst64 { 570 rd: WritableReg, 571 const_data: u64, 572 }, 573 FpuToInt { 574 op: FpuToIntOp, 575 rd: WritableReg, 576 rn: Reg, 577 }, 578 IntToFpu { 579 op: IntToFpuOp, 580 rd: WritableReg, 581 rn: Reg, 582 }, 583 FpuRound { 584 op: FpuRoundMode, 585 rd: WritableReg, 586 rn: Reg, 587 }, 588 FpuVecRRR { 589 fpu_op: FPUOp2, 590 rd: WritableReg, 591 rn: Reg, 592 rm: Reg, 593 }, 594 Call { 595 link: WritableReg, 596 info: BoxCallInfo, 597 }, 598 CallInd { 599 link: WritableReg, 600 info: BoxCallIndInfo, 601 }, 602 Ret { 603 link: Reg, 604 }, 605 EpiloguePlaceholder, 606 Jump { 607 dest: MachLabel, 608 }, 609 CondBr { 610 taken: MachLabel, 611 not_taken: MachLabel, 612 cond: Cond, 613 }, 614 TrapIf { 615 cond: Cond, 616 trap_code: TrapCode, 617 }, 618 OneWayCondBr { 619 target: MachLabel, 620 cond: Cond, 621 }, 622 IndirectBr { 623 rn: Reg, 624 targets: VecMachLabel, 625 }, 626 Debugtrap, 627 Trap { 628 trap_code: TrapCode, 629 }, 630 JTSequence { 631 ridx: Reg, 632 targets: VecMachLabel, 633 }, 634 LoadExtNameFar { 635 rd: WritableReg, 636 name: BoxExternalName, 637 offset: i64, 638 }, 639 LoadAddr { 640 rd: WritableReg, 641 mem: MemArg, 642 }, 643 VirtualSPOffsetAdj { 644 offset: i64, 645 }, 646 ValueLabelMarker { 647 reg: Reg, 648 label: ValueLabel, 649 }, 650 Unwind { 651 inst: UnwindInst, 652 }, 653 } 654 655 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 688. 656 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 657 pub enum ALUOp { 658 Add32, 659 Add32Ext16, 660 Add64, 661 Add64Ext16, 662 Add64Ext32, 663 AddLogical32, 664 AddLogical64, 665 AddLogical64Ext32, 666 Sub32, 667 Sub32Ext16, 668 Sub64, 669 Sub64Ext16, 670 Sub64Ext32, 671 SubLogical32, 672 SubLogical64, 673 SubLogical64Ext32, 674 Mul32, 675 Mul32Ext16, 676 Mul64, 677 Mul64Ext16, 678 Mul64Ext32, 679 And32, 680 And64, 681 Orr32, 682 Orr64, 683 Xor32, 684 Xor64, 685 AndNot32, 686 AndNot64, 687 OrrNot32, 688 OrrNot64, 689 XorNot32, 690 XorNot64, 691 } 692 693 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 729. 694 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 695 pub enum UnaryOp { 696 Abs32, 697 Abs64, 698 Abs64Ext32, 699 Neg32, 700 Neg64, 701 Neg64Ext32, 702 PopcntByte, 703 PopcntReg, 704 } 705 706 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 742. 707 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 708 pub enum ShiftOp { 709 RotL32, 710 RotL64, 711 LShL32, 712 LShL64, 713 LShR32, 714 LShR64, 715 AShR32, 716 AShR64, 717 } 718 719 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 755. 720 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 721 pub enum CmpOp { 722 CmpS32, 723 CmpS32Ext16, 724 CmpS64, 725 CmpS64Ext16, 726 CmpS64Ext32, 727 CmpL32, 728 CmpL32Ext16, 729 CmpL64, 730 CmpL64Ext16, 731 CmpL64Ext32, 732 } 733 734 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 770. 735 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 736 pub enum FPUOp1 { 737 Abs32, 738 Abs64, 739 Neg32, 740 Neg64, 741 NegAbs32, 742 NegAbs64, 743 Sqrt32, 744 Sqrt64, 745 Cvt32To64, 746 Cvt64To32, 747 } 748 749 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 785. 750 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 751 pub enum FPUOp2 { 752 Add32, 753 Add64, 754 Sub32, 755 Sub64, 756 Mul32, 757 Mul64, 758 Div32, 759 Div64, 760 Max32, 761 Max64, 762 Min32, 763 Min64, 764 } 765 766 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 802. 767 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 768 pub enum FPUOp3 { 769 MAdd32, 770 MAdd64, 771 MSub32, 772 MSub64, 773 } 774 775 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 811. 776 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 777 pub enum FpuToIntOp { 778 F32ToU32, 779 F32ToI32, 780 F32ToU64, 781 F32ToI64, 782 F64ToU32, 783 F64ToI32, 784 F64ToU64, 785 F64ToI64, 786 } 787 788 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 824. 789 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 790 pub enum IntToFpuOp { 791 U32ToF32, 792 I32ToF32, 793 U32ToF64, 794 I32ToF64, 795 U64ToF32, 796 I64ToF32, 797 U64ToF64, 798 I64ToF64, 799 } 800 801 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 838. 802 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 803 pub enum FpuRoundMode { 804 Minus32, 805 Minus64, 806 Plus32, 807 Plus64, 808 Zero32, 809 Zero64, 810 Nearest32, 811 Nearest64, 812 } 813 814 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1248. 815 #[derive(Clone, Debug)] 816 pub enum WritableRegPair { 817 WritableRegPair { hi: WritableReg, lo: WritableReg }, 818 } 819 820 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1270. 821 #[derive(Clone, Debug)] 822 pub enum RegPair { 823 RegPair { hi: Reg, lo: Reg }, 824 } 825 826 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2195. 827 #[derive(Clone, Debug)] 828 pub enum ProducesBool { 829 ProducesBool { producer: ProducesFlags, cond: Cond }, 830 } 831 832 // Generated as internal constructor for term temp_reg. 833 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 834 let pattern0_0 = arg0; 835 // Rule at src/prelude.isle line 70. 836 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 837 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 838 return Some(expr1_0); 839 } 840 841 // Generated as internal constructor for term lo_reg. 842 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 843 let pattern0_0 = arg0; 844 // Rule at src/prelude.isle line 105. 845 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 846 let expr1_0: usize = 0; 847 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 848 return Some(expr2_0); 849 } 850 851 // Generated as internal constructor for term value_regs_none. 852 pub fn constructor_value_regs_none<C: Context>( 853 ctx: &mut C, 854 arg0: &SideEffectNoResult, 855 ) -> Option<ValueRegs> { 856 let pattern0_0 = arg0; 857 if let &SideEffectNoResult::Inst { 858 inst: ref pattern1_0, 859 } = pattern0_0 860 { 861 // Rule at src/prelude.isle line 300. 862 let expr0_0 = C::emit(ctx, &pattern1_0); 863 let expr1_0 = C::value_regs_invalid(ctx); 864 return Some(expr1_0); 865 } 866 return None; 867 } 868 869 // Generated as internal constructor for term safepoint. 870 pub fn constructor_safepoint<C: Context>( 871 ctx: &mut C, 872 arg0: &SideEffectNoResult, 873 ) -> Option<ValueRegs> { 874 let pattern0_0 = arg0; 875 if let &SideEffectNoResult::Inst { 876 inst: ref pattern1_0, 877 } = pattern0_0 878 { 879 // Rule at src/prelude.isle line 306. 880 let expr0_0 = C::emit_safepoint(ctx, &pattern1_0); 881 let expr1_0 = C::value_regs_invalid(ctx); 882 return Some(expr1_0); 883 } 884 return None; 885 } 886 887 // Generated as internal constructor for term with_flags. 888 pub fn constructor_with_flags<C: Context>( 889 ctx: &mut C, 890 arg0: &ProducesFlags, 891 arg1: &ConsumesFlags, 892 ) -> Option<ValueRegs> { 893 let pattern0_0 = arg0; 894 if let &ProducesFlags::ProducesFlags { 895 inst: ref pattern1_0, 896 result: pattern1_1, 897 } = pattern0_0 898 { 899 let pattern2_0 = arg1; 900 if let &ConsumesFlags::ConsumesFlags { 901 inst: ref pattern3_0, 902 result: pattern3_1, 903 } = pattern2_0 904 { 905 // Rule at src/prelude.isle line 327. 906 let expr0_0 = C::emit(ctx, &pattern1_0); 907 let expr1_0 = C::emit(ctx, &pattern3_0); 908 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 909 return Some(expr2_0); 910 } 911 } 912 return None; 913 } 914 915 // Generated as internal constructor for term with_flags_1. 916 pub fn constructor_with_flags_1<C: Context>( 917 ctx: &mut C, 918 arg0: &ProducesFlags, 919 arg1: &ConsumesFlags, 920 ) -> Option<Reg> { 921 let pattern0_0 = arg0; 922 if let &ProducesFlags::ProducesFlags { 923 inst: ref pattern1_0, 924 result: pattern1_1, 925 } = pattern0_0 926 { 927 let pattern2_0 = arg1; 928 if let &ConsumesFlags::ConsumesFlags { 929 inst: ref pattern3_0, 930 result: pattern3_1, 931 } = pattern2_0 932 { 933 // Rule at src/prelude.isle line 335. 934 let expr0_0 = C::emit(ctx, &pattern1_0); 935 let expr1_0 = C::emit(ctx, &pattern3_0); 936 return Some(pattern3_1); 937 } 938 } 939 return None; 940 } 941 942 // Generated as internal constructor for term with_flags_2. 943 pub fn constructor_with_flags_2<C: Context>( 944 ctx: &mut C, 945 arg0: &ProducesFlags, 946 arg1: &ConsumesFlags, 947 arg2: &ConsumesFlags, 948 ) -> Option<ValueRegs> { 949 let pattern0_0 = arg0; 950 if let &ProducesFlags::ProducesFlags { 951 inst: ref pattern1_0, 952 result: pattern1_1, 953 } = pattern0_0 954 { 955 let pattern2_0 = arg1; 956 if let &ConsumesFlags::ConsumesFlags { 957 inst: ref pattern3_0, 958 result: pattern3_1, 959 } = pattern2_0 960 { 961 let pattern4_0 = arg2; 962 if let &ConsumesFlags::ConsumesFlags { 963 inst: ref pattern5_0, 964 result: pattern5_1, 965 } = pattern4_0 966 { 967 // Rule at src/prelude.isle line 345. 968 let expr0_0 = C::emit(ctx, &pattern1_0); 969 let expr1_0 = C::emit(ctx, &pattern5_0); 970 let expr2_0 = C::emit(ctx, &pattern3_0); 971 let expr3_0 = C::value_regs(ctx, pattern3_1, pattern5_1); 972 return Some(expr3_0); 973 } 974 } 975 } 976 return None; 977 } 978 979 // Generated as internal constructor for term mask_amt_reg. 980 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 981 let pattern0_0 = arg0; 982 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 983 let pattern2_0 = arg1; 984 // Rule at src/isa/s390x/inst.isle line 1013. 985 let expr0_0: i64 = -1; 986 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 987 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 988 let expr3_0: u8 = 0; 989 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 990 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 991 return Some(expr5_0); 992 } 993 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 994 let pattern2_0 = arg1; 995 // Rule at src/isa/s390x/inst.isle line 1016. 996 return Some(pattern2_0); 997 } 998 return None; 999 } 1000 1001 // Generated as internal constructor for term lower_address. 1002 pub fn constructor_lower_address<C: Context>( 1003 ctx: &mut C, 1004 arg0: MemFlags, 1005 arg1: Value, 1006 arg2: Offset32, 1007 ) -> Option<MemArg> { 1008 let pattern0_0 = arg0; 1009 let pattern1_0 = arg1; 1010 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1011 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1012 if let &InstructionData::Binary { 1013 opcode: ref pattern4_0, 1014 args: ref pattern4_1, 1015 } = &pattern3_0 1016 { 1017 if let &Opcode::Iadd = &pattern4_0 { 1018 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 1019 let pattern7_0 = arg2; 1020 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1021 if pattern8_0 == 0 { 1022 // Rule at src/isa/s390x/inst.isle line 1112. 1023 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1024 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1025 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1026 return Some(expr2_0); 1027 } 1028 } 1029 } 1030 if let Some((pattern3_0, pattern3_1, pattern3_2)) = C::symbol_value_data(ctx, pattern2_0) { 1031 if let Some(()) = C::reloc_distance_near(ctx, &pattern3_1) { 1032 let pattern5_0 = arg2; 1033 let pattern6_0 = C::i64_from_offset(ctx, pattern5_0); 1034 let closure7 = || { 1035 return Some(pattern3_2); 1036 }; 1037 if let Some(pattern7_0) = closure7() { 1038 if let Some(pattern8_0) = 1039 C::memarg_symbol_offset_sum(ctx, pattern6_0, pattern7_0) 1040 { 1041 // Rule at src/isa/s390x/inst.isle line 1115. 1042 let expr0_0 = C::memarg_symbol(ctx, pattern3_0, pattern8_0, pattern0_0); 1043 return Some(expr0_0); 1044 } 1045 } 1046 } 1047 } 1048 } 1049 let pattern2_0 = arg2; 1050 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1051 // Rule at src/isa/s390x/inst.isle line 1109. 1052 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1053 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1054 return Some(expr1_0); 1055 } 1056 1057 // Generated as internal constructor for term stack_addr_impl. 1058 pub fn constructor_stack_addr_impl<C: Context>( 1059 ctx: &mut C, 1060 arg0: Type, 1061 arg1: StackSlot, 1062 arg2: Offset32, 1063 ) -> Option<Reg> { 1064 let pattern0_0 = arg0; 1065 let pattern1_0 = arg1; 1066 let pattern2_0 = arg2; 1067 // Rule at src/isa/s390x/inst.isle line 1142. 1068 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1069 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1070 let expr2_0 = C::emit(ctx, &expr1_0); 1071 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1072 return Some(expr3_0); 1073 } 1074 1075 // Generated as internal constructor for term sink_load. 1076 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1077 let pattern0_0 = arg0; 1078 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1079 if let &InstructionData::Load { 1080 opcode: ref pattern2_0, 1081 arg: pattern2_1, 1082 flags: pattern2_2, 1083 offset: pattern2_3, 1084 } = &pattern1_0 1085 { 1086 if let &Opcode::Load = &pattern2_0 { 1087 // Rule at src/isa/s390x/inst.isle line 1212. 1088 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1089 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1090 return Some(expr1_0); 1091 } 1092 } 1093 return None; 1094 } 1095 1096 // Generated as internal constructor for term sink_sload16. 1097 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1098 let pattern0_0 = arg0; 1099 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1100 if let &InstructionData::Load { 1101 opcode: ref pattern2_0, 1102 arg: pattern2_1, 1103 flags: pattern2_2, 1104 offset: pattern2_3, 1105 } = &pattern1_0 1106 { 1107 if let &Opcode::Sload16 = &pattern2_0 { 1108 // Rule at src/isa/s390x/inst.isle line 1219. 1109 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1110 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1111 return Some(expr1_0); 1112 } 1113 } 1114 return None; 1115 } 1116 1117 // Generated as internal constructor for term sink_sload32. 1118 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1119 let pattern0_0 = arg0; 1120 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1121 if let &InstructionData::Load { 1122 opcode: ref pattern2_0, 1123 arg: pattern2_1, 1124 flags: pattern2_2, 1125 offset: pattern2_3, 1126 } = &pattern1_0 1127 { 1128 if let &Opcode::Sload32 = &pattern2_0 { 1129 // Rule at src/isa/s390x/inst.isle line 1226. 1130 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1131 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1132 return Some(expr1_0); 1133 } 1134 } 1135 return None; 1136 } 1137 1138 // Generated as internal constructor for term sink_uload16. 1139 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1140 let pattern0_0 = arg0; 1141 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1142 if let &InstructionData::Load { 1143 opcode: ref pattern2_0, 1144 arg: pattern2_1, 1145 flags: pattern2_2, 1146 offset: pattern2_3, 1147 } = &pattern1_0 1148 { 1149 if let &Opcode::Uload16 = &pattern2_0 { 1150 // Rule at src/isa/s390x/inst.isle line 1233. 1151 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1152 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1153 return Some(expr1_0); 1154 } 1155 } 1156 return None; 1157 } 1158 1159 // Generated as internal constructor for term sink_uload32. 1160 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1161 let pattern0_0 = arg0; 1162 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1163 if let &InstructionData::Load { 1164 opcode: ref pattern2_0, 1165 arg: pattern2_1, 1166 flags: pattern2_2, 1167 offset: pattern2_3, 1168 } = &pattern1_0 1169 { 1170 if let &Opcode::Uload32 = &pattern2_0 { 1171 // Rule at src/isa/s390x/inst.isle line 1240. 1172 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1173 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1174 return Some(expr1_0); 1175 } 1176 } 1177 return None; 1178 } 1179 1180 // Generated as internal constructor for term temp_writable_regpair. 1181 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1182 // Rule at src/isa/s390x/inst.isle line 1253. 1183 let expr0_0: u8 = 0; 1184 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1185 let expr2_0: u8 = 1; 1186 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1187 let expr4_0 = WritableRegPair::WritableRegPair { 1188 hi: expr1_0, 1189 lo: expr3_0, 1190 }; 1191 return Some(expr4_0); 1192 } 1193 1194 // Generated as internal constructor for term copy_writable_regpair. 1195 pub fn constructor_copy_writable_regpair<C: Context>( 1196 ctx: &mut C, 1197 arg0: &RegPair, 1198 ) -> Option<WritableRegPair> { 1199 let pattern0_0 = arg0; 1200 // Rule at src/isa/s390x/inst.isle line 1259. 1201 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1202 return Some(expr0_0); 1203 } 1204 1205 // Generated as internal constructor for term writable_regpair_hi. 1206 pub fn constructor_writable_regpair_hi<C: Context>( 1207 ctx: &mut C, 1208 arg0: &WritableRegPair, 1209 ) -> Option<WritableReg> { 1210 let pattern0_0 = arg0; 1211 if let &WritableRegPair::WritableRegPair { 1212 hi: pattern1_0, 1213 lo: pattern1_1, 1214 } = pattern0_0 1215 { 1216 // Rule at src/isa/s390x/inst.isle line 1263. 1217 return Some(pattern1_0); 1218 } 1219 return None; 1220 } 1221 1222 // Generated as internal constructor for term writable_regpair_lo. 1223 pub fn constructor_writable_regpair_lo<C: Context>( 1224 ctx: &mut C, 1225 arg0: &WritableRegPair, 1226 ) -> Option<WritableReg> { 1227 let pattern0_0 = arg0; 1228 if let &WritableRegPair::WritableRegPair { 1229 hi: pattern1_0, 1230 lo: pattern1_1, 1231 } = pattern0_0 1232 { 1233 // Rule at src/isa/s390x/inst.isle line 1267. 1234 return Some(pattern1_1); 1235 } 1236 return None; 1237 } 1238 1239 // Generated as internal constructor for term writable_regpair_to_regpair. 1240 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1241 ctx: &mut C, 1242 arg0: &WritableRegPair, 1243 ) -> Option<RegPair> { 1244 let pattern0_0 = arg0; 1245 if let &WritableRegPair::WritableRegPair { 1246 hi: pattern1_0, 1247 lo: pattern1_1, 1248 } = pattern0_0 1249 { 1250 // Rule at src/isa/s390x/inst.isle line 1274. 1251 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1252 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1253 let expr2_0 = RegPair::RegPair { 1254 hi: expr0_0, 1255 lo: expr1_0, 1256 }; 1257 return Some(expr2_0); 1258 } 1259 return None; 1260 } 1261 1262 // Generated as internal constructor for term uninitialized_regpair. 1263 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1264 // Rule at src/isa/s390x/inst.isle line 1279. 1265 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1266 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1267 return Some(expr1_0); 1268 } 1269 1270 // Generated as internal constructor for term regpair_hi. 1271 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1272 let pattern0_0 = arg0; 1273 if let &RegPair::RegPair { 1274 hi: pattern1_0, 1275 lo: pattern1_1, 1276 } = pattern0_0 1277 { 1278 // Rule at src/isa/s390x/inst.isle line 1284. 1279 return Some(pattern1_0); 1280 } 1281 return None; 1282 } 1283 1284 // Generated as internal constructor for term regpair_lo. 1285 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1286 let pattern0_0 = arg0; 1287 if let &RegPair::RegPair { 1288 hi: pattern1_0, 1289 lo: pattern1_1, 1290 } = pattern0_0 1291 { 1292 // Rule at src/isa/s390x/inst.isle line 1288. 1293 return Some(pattern1_1); 1294 } 1295 return None; 1296 } 1297 1298 // Generated as internal constructor for term alu_rrr. 1299 pub fn constructor_alu_rrr<C: Context>( 1300 ctx: &mut C, 1301 arg0: Type, 1302 arg1: &ALUOp, 1303 arg2: Reg, 1304 arg3: Reg, 1305 ) -> Option<Reg> { 1306 let pattern0_0 = arg0; 1307 let pattern1_0 = arg1; 1308 let pattern2_0 = arg2; 1309 let pattern3_0 = arg3; 1310 // Rule at src/isa/s390x/inst.isle line 1295. 1311 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1312 let expr1_0 = MInst::AluRRR { 1313 alu_op: pattern1_0.clone(), 1314 rd: expr0_0, 1315 rn: pattern2_0, 1316 rm: pattern3_0, 1317 }; 1318 let expr2_0 = C::emit(ctx, &expr1_0); 1319 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1320 return Some(expr3_0); 1321 } 1322 1323 // Generated as internal constructor for term alu_rrsimm16. 1324 pub fn constructor_alu_rrsimm16<C: Context>( 1325 ctx: &mut C, 1326 arg0: Type, 1327 arg1: &ALUOp, 1328 arg2: Reg, 1329 arg3: i16, 1330 ) -> Option<Reg> { 1331 let pattern0_0 = arg0; 1332 let pattern1_0 = arg1; 1333 let pattern2_0 = arg2; 1334 let pattern3_0 = arg3; 1335 // Rule at src/isa/s390x/inst.isle line 1302. 1336 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1337 let expr1_0 = MInst::AluRRSImm16 { 1338 alu_op: pattern1_0.clone(), 1339 rd: expr0_0, 1340 rn: pattern2_0, 1341 imm: pattern3_0, 1342 }; 1343 let expr2_0 = C::emit(ctx, &expr1_0); 1344 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1345 return Some(expr3_0); 1346 } 1347 1348 // Generated as internal constructor for term alu_rr. 1349 pub fn constructor_alu_rr<C: Context>( 1350 ctx: &mut C, 1351 arg0: Type, 1352 arg1: &ALUOp, 1353 arg2: Reg, 1354 arg3: Reg, 1355 ) -> Option<Reg> { 1356 let pattern0_0 = arg0; 1357 let pattern1_0 = arg1; 1358 let pattern2_0 = arg2; 1359 let pattern3_0 = arg3; 1360 // Rule at src/isa/s390x/inst.isle line 1309. 1361 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1362 let expr1_0 = MInst::AluRR { 1363 alu_op: pattern1_0.clone(), 1364 rd: expr0_0, 1365 rm: pattern3_0, 1366 }; 1367 let expr2_0 = C::emit(ctx, &expr1_0); 1368 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1369 return Some(expr3_0); 1370 } 1371 1372 // Generated as internal constructor for term alu_rx. 1373 pub fn constructor_alu_rx<C: Context>( 1374 ctx: &mut C, 1375 arg0: Type, 1376 arg1: &ALUOp, 1377 arg2: Reg, 1378 arg3: &MemArg, 1379 ) -> Option<Reg> { 1380 let pattern0_0 = arg0; 1381 let pattern1_0 = arg1; 1382 let pattern2_0 = arg2; 1383 let pattern3_0 = arg3; 1384 // Rule at src/isa/s390x/inst.isle line 1316. 1385 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1386 let expr1_0 = MInst::AluRX { 1387 alu_op: pattern1_0.clone(), 1388 rd: expr0_0, 1389 mem: pattern3_0.clone(), 1390 }; 1391 let expr2_0 = C::emit(ctx, &expr1_0); 1392 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1393 return Some(expr3_0); 1394 } 1395 1396 // Generated as internal constructor for term alu_rsimm16. 1397 pub fn constructor_alu_rsimm16<C: Context>( 1398 ctx: &mut C, 1399 arg0: Type, 1400 arg1: &ALUOp, 1401 arg2: Reg, 1402 arg3: i16, 1403 ) -> Option<Reg> { 1404 let pattern0_0 = arg0; 1405 let pattern1_0 = arg1; 1406 let pattern2_0 = arg2; 1407 let pattern3_0 = arg3; 1408 // Rule at src/isa/s390x/inst.isle line 1323. 1409 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1410 let expr1_0 = MInst::AluRSImm16 { 1411 alu_op: pattern1_0.clone(), 1412 rd: expr0_0, 1413 imm: pattern3_0, 1414 }; 1415 let expr2_0 = C::emit(ctx, &expr1_0); 1416 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1417 return Some(expr3_0); 1418 } 1419 1420 // Generated as internal constructor for term alu_rsimm32. 1421 pub fn constructor_alu_rsimm32<C: Context>( 1422 ctx: &mut C, 1423 arg0: Type, 1424 arg1: &ALUOp, 1425 arg2: Reg, 1426 arg3: i32, 1427 ) -> Option<Reg> { 1428 let pattern0_0 = arg0; 1429 let pattern1_0 = arg1; 1430 let pattern2_0 = arg2; 1431 let pattern3_0 = arg3; 1432 // Rule at src/isa/s390x/inst.isle line 1330. 1433 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1434 let expr1_0 = MInst::AluRSImm32 { 1435 alu_op: pattern1_0.clone(), 1436 rd: expr0_0, 1437 imm: pattern3_0, 1438 }; 1439 let expr2_0 = C::emit(ctx, &expr1_0); 1440 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1441 return Some(expr3_0); 1442 } 1443 1444 // Generated as internal constructor for term alu_ruimm32. 1445 pub fn constructor_alu_ruimm32<C: Context>( 1446 ctx: &mut C, 1447 arg0: Type, 1448 arg1: &ALUOp, 1449 arg2: Reg, 1450 arg3: u32, 1451 ) -> Option<Reg> { 1452 let pattern0_0 = arg0; 1453 let pattern1_0 = arg1; 1454 let pattern2_0 = arg2; 1455 let pattern3_0 = arg3; 1456 // Rule at src/isa/s390x/inst.isle line 1337. 1457 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1458 let expr1_0 = MInst::AluRUImm32 { 1459 alu_op: pattern1_0.clone(), 1460 rd: expr0_0, 1461 imm: pattern3_0, 1462 }; 1463 let expr2_0 = C::emit(ctx, &expr1_0); 1464 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1465 return Some(expr3_0); 1466 } 1467 1468 // Generated as internal constructor for term alu_ruimm16shifted. 1469 pub fn constructor_alu_ruimm16shifted<C: Context>( 1470 ctx: &mut C, 1471 arg0: Type, 1472 arg1: &ALUOp, 1473 arg2: Reg, 1474 arg3: UImm16Shifted, 1475 ) -> Option<Reg> { 1476 let pattern0_0 = arg0; 1477 let pattern1_0 = arg1; 1478 let pattern2_0 = arg2; 1479 let pattern3_0 = arg3; 1480 // Rule at src/isa/s390x/inst.isle line 1344. 1481 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1482 let expr1_0 = MInst::AluRUImm16Shifted { 1483 alu_op: pattern1_0.clone(), 1484 rd: expr0_0, 1485 imm: pattern3_0, 1486 }; 1487 let expr2_0 = C::emit(ctx, &expr1_0); 1488 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1489 return Some(expr3_0); 1490 } 1491 1492 // Generated as internal constructor for term alu_ruimm32shifted. 1493 pub fn constructor_alu_ruimm32shifted<C: Context>( 1494 ctx: &mut C, 1495 arg0: Type, 1496 arg1: &ALUOp, 1497 arg2: Reg, 1498 arg3: UImm32Shifted, 1499 ) -> Option<Reg> { 1500 let pattern0_0 = arg0; 1501 let pattern1_0 = arg1; 1502 let pattern2_0 = arg2; 1503 let pattern3_0 = arg3; 1504 // Rule at src/isa/s390x/inst.isle line 1351. 1505 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1506 let expr1_0 = MInst::AluRUImm32Shifted { 1507 alu_op: pattern1_0.clone(), 1508 rd: expr0_0, 1509 imm: pattern3_0, 1510 }; 1511 let expr2_0 = C::emit(ctx, &expr1_0); 1512 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1513 return Some(expr3_0); 1514 } 1515 1516 // Generated as internal constructor for term smul_wide. 1517 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1518 let pattern0_0 = arg0; 1519 let pattern1_0 = arg1; 1520 // Rule at src/isa/s390x/inst.isle line 1358. 1521 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1522 let expr1_0 = MInst::SMulWide { 1523 rn: pattern0_0, 1524 rm: pattern1_0, 1525 }; 1526 let expr2_0 = C::emit(ctx, &expr1_0); 1527 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1528 return Some(expr3_0); 1529 } 1530 1531 // Generated as internal constructor for term umul_wide. 1532 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1533 let pattern0_0 = arg0; 1534 let pattern1_0 = arg1; 1535 // Rule at src/isa/s390x/inst.isle line 1365. 1536 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1537 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1538 let expr2_0 = MInst::Mov64 { 1539 rd: expr1_0, 1540 rm: pattern1_0, 1541 }; 1542 let expr3_0 = C::emit(ctx, &expr2_0); 1543 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1544 let expr5_0 = C::emit(ctx, &expr4_0); 1545 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1546 return Some(expr6_0); 1547 } 1548 1549 // Generated as internal constructor for term sdivmod32. 1550 pub fn constructor_sdivmod32<C: Context>( 1551 ctx: &mut C, 1552 arg0: &RegPair, 1553 arg1: Reg, 1554 ) -> Option<RegPair> { 1555 let pattern0_0 = arg0; 1556 let pattern1_0 = arg1; 1557 // Rule at src/isa/s390x/inst.isle line 1373. 1558 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1559 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1560 let expr2_0 = C::emit(ctx, &expr1_0); 1561 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1562 return Some(expr3_0); 1563 } 1564 1565 // Generated as internal constructor for term sdivmod64. 1566 pub fn constructor_sdivmod64<C: Context>( 1567 ctx: &mut C, 1568 arg0: &RegPair, 1569 arg1: Reg, 1570 ) -> Option<RegPair> { 1571 let pattern0_0 = arg0; 1572 let pattern1_0 = arg1; 1573 // Rule at src/isa/s390x/inst.isle line 1380. 1574 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1575 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1576 let expr2_0 = C::emit(ctx, &expr1_0); 1577 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1578 return Some(expr3_0); 1579 } 1580 1581 // Generated as internal constructor for term udivmod32. 1582 pub fn constructor_udivmod32<C: Context>( 1583 ctx: &mut C, 1584 arg0: &RegPair, 1585 arg1: Reg, 1586 ) -> Option<RegPair> { 1587 let pattern0_0 = arg0; 1588 let pattern1_0 = arg1; 1589 // Rule at src/isa/s390x/inst.isle line 1387. 1590 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1591 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1592 let expr2_0 = C::emit(ctx, &expr1_0); 1593 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1594 return Some(expr3_0); 1595 } 1596 1597 // Generated as internal constructor for term udivmod64. 1598 pub fn constructor_udivmod64<C: Context>( 1599 ctx: &mut C, 1600 arg0: &RegPair, 1601 arg1: Reg, 1602 ) -> Option<RegPair> { 1603 let pattern0_0 = arg0; 1604 let pattern1_0 = arg1; 1605 // Rule at src/isa/s390x/inst.isle line 1394. 1606 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1607 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1608 let expr2_0 = C::emit(ctx, &expr1_0); 1609 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1610 return Some(expr3_0); 1611 } 1612 1613 // Generated as internal constructor for term shift_rr. 1614 pub fn constructor_shift_rr<C: Context>( 1615 ctx: &mut C, 1616 arg0: Type, 1617 arg1: &ShiftOp, 1618 arg2: Reg, 1619 arg3: u8, 1620 arg4: Reg, 1621 ) -> Option<Reg> { 1622 let pattern0_0 = arg0; 1623 let pattern1_0 = arg1; 1624 let pattern2_0 = arg2; 1625 let pattern3_0 = arg3; 1626 let pattern4_0 = arg4; 1627 // Rule at src/isa/s390x/inst.isle line 1401. 1628 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1629 let expr1_0 = MInst::ShiftRR { 1630 shift_op: pattern1_0.clone(), 1631 rd: expr0_0, 1632 rn: pattern2_0, 1633 shift_imm: pattern3_0, 1634 shift_reg: pattern4_0, 1635 }; 1636 let expr2_0 = C::emit(ctx, &expr1_0); 1637 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1638 return Some(expr3_0); 1639 } 1640 1641 // Generated as internal constructor for term unary_rr. 1642 pub fn constructor_unary_rr<C: Context>( 1643 ctx: &mut C, 1644 arg0: Type, 1645 arg1: &UnaryOp, 1646 arg2: Reg, 1647 ) -> Option<Reg> { 1648 let pattern0_0 = arg0; 1649 let pattern1_0 = arg1; 1650 let pattern2_0 = arg2; 1651 // Rule at src/isa/s390x/inst.isle line 1408. 1652 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1653 let expr1_0 = MInst::UnaryRR { 1654 op: pattern1_0.clone(), 1655 rd: expr0_0, 1656 rn: pattern2_0, 1657 }; 1658 let expr2_0 = C::emit(ctx, &expr1_0); 1659 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1660 return Some(expr3_0); 1661 } 1662 1663 // Generated as internal constructor for term cmp_rr. 1664 pub fn constructor_cmp_rr<C: Context>( 1665 ctx: &mut C, 1666 arg0: &CmpOp, 1667 arg1: Reg, 1668 arg2: Reg, 1669 ) -> Option<ProducesFlags> { 1670 let pattern0_0 = arg0; 1671 let pattern1_0 = arg1; 1672 let pattern2_0 = arg2; 1673 // Rule at src/isa/s390x/inst.isle line 1415. 1674 let expr0_0 = MInst::CmpRR { 1675 op: pattern0_0.clone(), 1676 rn: pattern1_0, 1677 rm: pattern2_0, 1678 }; 1679 let expr1_0 = C::invalid_reg(ctx); 1680 let expr2_0 = ProducesFlags::ProducesFlags { 1681 inst: expr0_0, 1682 result: expr1_0, 1683 }; 1684 return Some(expr2_0); 1685 } 1686 1687 // Generated as internal constructor for term cmp_rx. 1688 pub fn constructor_cmp_rx<C: Context>( 1689 ctx: &mut C, 1690 arg0: &CmpOp, 1691 arg1: Reg, 1692 arg2: &MemArg, 1693 ) -> Option<ProducesFlags> { 1694 let pattern0_0 = arg0; 1695 let pattern1_0 = arg1; 1696 let pattern2_0 = arg2; 1697 // Rule at src/isa/s390x/inst.isle line 1421. 1698 let expr0_0 = MInst::CmpRX { 1699 op: pattern0_0.clone(), 1700 rn: pattern1_0, 1701 mem: pattern2_0.clone(), 1702 }; 1703 let expr1_0 = C::invalid_reg(ctx); 1704 let expr2_0 = ProducesFlags::ProducesFlags { 1705 inst: expr0_0, 1706 result: expr1_0, 1707 }; 1708 return Some(expr2_0); 1709 } 1710 1711 // Generated as internal constructor for term cmp_rsimm16. 1712 pub fn constructor_cmp_rsimm16<C: Context>( 1713 ctx: &mut C, 1714 arg0: &CmpOp, 1715 arg1: Reg, 1716 arg2: i16, 1717 ) -> Option<ProducesFlags> { 1718 let pattern0_0 = arg0; 1719 let pattern1_0 = arg1; 1720 let pattern2_0 = arg2; 1721 // Rule at src/isa/s390x/inst.isle line 1427. 1722 let expr0_0 = MInst::CmpRSImm16 { 1723 op: pattern0_0.clone(), 1724 rn: pattern1_0, 1725 imm: pattern2_0, 1726 }; 1727 let expr1_0 = C::invalid_reg(ctx); 1728 let expr2_0 = ProducesFlags::ProducesFlags { 1729 inst: expr0_0, 1730 result: expr1_0, 1731 }; 1732 return Some(expr2_0); 1733 } 1734 1735 // Generated as internal constructor for term cmp_rsimm32. 1736 pub fn constructor_cmp_rsimm32<C: Context>( 1737 ctx: &mut C, 1738 arg0: &CmpOp, 1739 arg1: Reg, 1740 arg2: i32, 1741 ) -> Option<ProducesFlags> { 1742 let pattern0_0 = arg0; 1743 let pattern1_0 = arg1; 1744 let pattern2_0 = arg2; 1745 // Rule at src/isa/s390x/inst.isle line 1433. 1746 let expr0_0 = MInst::CmpRSImm32 { 1747 op: pattern0_0.clone(), 1748 rn: pattern1_0, 1749 imm: pattern2_0, 1750 }; 1751 let expr1_0 = C::invalid_reg(ctx); 1752 let expr2_0 = ProducesFlags::ProducesFlags { 1753 inst: expr0_0, 1754 result: expr1_0, 1755 }; 1756 return Some(expr2_0); 1757 } 1758 1759 // Generated as internal constructor for term cmp_ruimm32. 1760 pub fn constructor_cmp_ruimm32<C: Context>( 1761 ctx: &mut C, 1762 arg0: &CmpOp, 1763 arg1: Reg, 1764 arg2: u32, 1765 ) -> Option<ProducesFlags> { 1766 let pattern0_0 = arg0; 1767 let pattern1_0 = arg1; 1768 let pattern2_0 = arg2; 1769 // Rule at src/isa/s390x/inst.isle line 1439. 1770 let expr0_0 = MInst::CmpRUImm32 { 1771 op: pattern0_0.clone(), 1772 rn: pattern1_0, 1773 imm: pattern2_0, 1774 }; 1775 let expr1_0 = C::invalid_reg(ctx); 1776 let expr2_0 = ProducesFlags::ProducesFlags { 1777 inst: expr0_0, 1778 result: expr1_0, 1779 }; 1780 return Some(expr2_0); 1781 } 1782 1783 // Generated as internal constructor for term atomic_rmw_impl. 1784 pub fn constructor_atomic_rmw_impl<C: Context>( 1785 ctx: &mut C, 1786 arg0: Type, 1787 arg1: &ALUOp, 1788 arg2: Reg, 1789 arg3: &MemArg, 1790 ) -> Option<Reg> { 1791 let pattern0_0 = arg0; 1792 let pattern1_0 = arg1; 1793 let pattern2_0 = arg2; 1794 let pattern3_0 = arg3; 1795 // Rule at src/isa/s390x/inst.isle line 1445. 1796 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1797 let expr1_0 = MInst::AtomicRmw { 1798 alu_op: pattern1_0.clone(), 1799 rd: expr0_0, 1800 rn: pattern2_0, 1801 mem: pattern3_0.clone(), 1802 }; 1803 let expr2_0 = C::emit(ctx, &expr1_0); 1804 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1805 return Some(expr3_0); 1806 } 1807 1808 // Generated as internal constructor for term atomic_cas32. 1809 pub fn constructor_atomic_cas32<C: Context>( 1810 ctx: &mut C, 1811 arg0: Reg, 1812 arg1: Reg, 1813 arg2: &MemArg, 1814 ) -> Option<Reg> { 1815 let pattern0_0 = arg0; 1816 let pattern1_0 = arg1; 1817 let pattern2_0 = arg2; 1818 // Rule at src/isa/s390x/inst.isle line 1452. 1819 let expr0_0: Type = I32; 1820 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1821 let expr2_0 = MInst::AtomicCas32 { 1822 rd: expr1_0, 1823 rn: pattern1_0, 1824 mem: pattern2_0.clone(), 1825 }; 1826 let expr3_0 = C::emit(ctx, &expr2_0); 1827 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1828 return Some(expr4_0); 1829 } 1830 1831 // Generated as internal constructor for term atomic_cas64. 1832 pub fn constructor_atomic_cas64<C: Context>( 1833 ctx: &mut C, 1834 arg0: Reg, 1835 arg1: Reg, 1836 arg2: &MemArg, 1837 ) -> Option<Reg> { 1838 let pattern0_0 = arg0; 1839 let pattern1_0 = arg1; 1840 let pattern2_0 = arg2; 1841 // Rule at src/isa/s390x/inst.isle line 1459. 1842 let expr0_0: Type = I64; 1843 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1844 let expr2_0 = MInst::AtomicCas64 { 1845 rd: expr1_0, 1846 rn: pattern1_0, 1847 mem: pattern2_0.clone(), 1848 }; 1849 let expr3_0 = C::emit(ctx, &expr2_0); 1850 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1851 return Some(expr4_0); 1852 } 1853 1854 // Generated as internal constructor for term fence_impl. 1855 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 1856 // Rule at src/isa/s390x/inst.isle line 1466. 1857 let expr0_0 = MInst::Fence; 1858 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1859 return Some(expr1_0); 1860 } 1861 1862 // Generated as internal constructor for term load32. 1863 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1864 let pattern0_0 = arg0; 1865 // Rule at src/isa/s390x/inst.isle line 1471. 1866 let expr0_0: Type = I32; 1867 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1868 let expr2_0 = MInst::Load32 { 1869 rd: expr1_0, 1870 mem: pattern0_0.clone(), 1871 }; 1872 let expr3_0 = C::emit(ctx, &expr2_0); 1873 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1874 return Some(expr4_0); 1875 } 1876 1877 // Generated as internal constructor for term load64. 1878 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1879 let pattern0_0 = arg0; 1880 // Rule at src/isa/s390x/inst.isle line 1478. 1881 let expr0_0: Type = I64; 1882 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1883 let expr2_0 = MInst::Load64 { 1884 rd: expr1_0, 1885 mem: pattern0_0.clone(), 1886 }; 1887 let expr3_0 = C::emit(ctx, &expr2_0); 1888 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1889 return Some(expr4_0); 1890 } 1891 1892 // Generated as internal constructor for term loadrev16. 1893 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1894 let pattern0_0 = arg0; 1895 // Rule at src/isa/s390x/inst.isle line 1485. 1896 let expr0_0: Type = I32; 1897 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1898 let expr2_0 = MInst::LoadRev16 { 1899 rd: expr1_0, 1900 mem: pattern0_0.clone(), 1901 }; 1902 let expr3_0 = C::emit(ctx, &expr2_0); 1903 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1904 return Some(expr4_0); 1905 } 1906 1907 // Generated as internal constructor for term loadrev32. 1908 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1909 let pattern0_0 = arg0; 1910 // Rule at src/isa/s390x/inst.isle line 1492. 1911 let expr0_0: Type = I32; 1912 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1913 let expr2_0 = MInst::LoadRev32 { 1914 rd: expr1_0, 1915 mem: pattern0_0.clone(), 1916 }; 1917 let expr3_0 = C::emit(ctx, &expr2_0); 1918 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1919 return Some(expr4_0); 1920 } 1921 1922 // Generated as internal constructor for term loadrev64. 1923 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1924 let pattern0_0 = arg0; 1925 // Rule at src/isa/s390x/inst.isle line 1499. 1926 let expr0_0: Type = I64; 1927 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1928 let expr2_0 = MInst::LoadRev64 { 1929 rd: expr1_0, 1930 mem: pattern0_0.clone(), 1931 }; 1932 let expr3_0 = C::emit(ctx, &expr2_0); 1933 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1934 return Some(expr4_0); 1935 } 1936 1937 // Generated as internal constructor for term store8. 1938 pub fn constructor_store8<C: Context>( 1939 ctx: &mut C, 1940 arg0: Reg, 1941 arg1: &MemArg, 1942 ) -> Option<SideEffectNoResult> { 1943 let pattern0_0 = arg0; 1944 let pattern1_0 = arg1; 1945 // Rule at src/isa/s390x/inst.isle line 1506. 1946 let expr0_0 = MInst::Store8 { 1947 rd: pattern0_0, 1948 mem: pattern1_0.clone(), 1949 }; 1950 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1951 return Some(expr1_0); 1952 } 1953 1954 // Generated as internal constructor for term store16. 1955 pub fn constructor_store16<C: Context>( 1956 ctx: &mut C, 1957 arg0: Reg, 1958 arg1: &MemArg, 1959 ) -> Option<SideEffectNoResult> { 1960 let pattern0_0 = arg0; 1961 let pattern1_0 = arg1; 1962 // Rule at src/isa/s390x/inst.isle line 1511. 1963 let expr0_0 = MInst::Store16 { 1964 rd: pattern0_0, 1965 mem: pattern1_0.clone(), 1966 }; 1967 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1968 return Some(expr1_0); 1969 } 1970 1971 // Generated as internal constructor for term store32. 1972 pub fn constructor_store32<C: Context>( 1973 ctx: &mut C, 1974 arg0: Reg, 1975 arg1: &MemArg, 1976 ) -> Option<SideEffectNoResult> { 1977 let pattern0_0 = arg0; 1978 let pattern1_0 = arg1; 1979 // Rule at src/isa/s390x/inst.isle line 1516. 1980 let expr0_0 = MInst::Store32 { 1981 rd: pattern0_0, 1982 mem: pattern1_0.clone(), 1983 }; 1984 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1985 return Some(expr1_0); 1986 } 1987 1988 // Generated as internal constructor for term store64. 1989 pub fn constructor_store64<C: Context>( 1990 ctx: &mut C, 1991 arg0: Reg, 1992 arg1: &MemArg, 1993 ) -> Option<SideEffectNoResult> { 1994 let pattern0_0 = arg0; 1995 let pattern1_0 = arg1; 1996 // Rule at src/isa/s390x/inst.isle line 1521. 1997 let expr0_0 = MInst::Store64 { 1998 rd: pattern0_0, 1999 mem: pattern1_0.clone(), 2000 }; 2001 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2002 return Some(expr1_0); 2003 } 2004 2005 // Generated as internal constructor for term store8_imm. 2006 pub fn constructor_store8_imm<C: Context>( 2007 ctx: &mut C, 2008 arg0: u8, 2009 arg1: &MemArg, 2010 ) -> Option<SideEffectNoResult> { 2011 let pattern0_0 = arg0; 2012 let pattern1_0 = arg1; 2013 // Rule at src/isa/s390x/inst.isle line 1526. 2014 let expr0_0 = MInst::StoreImm8 { 2015 imm: pattern0_0, 2016 mem: pattern1_0.clone(), 2017 }; 2018 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2019 return Some(expr1_0); 2020 } 2021 2022 // Generated as internal constructor for term store16_imm. 2023 pub fn constructor_store16_imm<C: Context>( 2024 ctx: &mut C, 2025 arg0: i16, 2026 arg1: &MemArg, 2027 ) -> Option<SideEffectNoResult> { 2028 let pattern0_0 = arg0; 2029 let pattern1_0 = arg1; 2030 // Rule at src/isa/s390x/inst.isle line 1531. 2031 let expr0_0 = MInst::StoreImm16 { 2032 imm: pattern0_0, 2033 mem: pattern1_0.clone(), 2034 }; 2035 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2036 return Some(expr1_0); 2037 } 2038 2039 // Generated as internal constructor for term store32_simm16. 2040 pub fn constructor_store32_simm16<C: Context>( 2041 ctx: &mut C, 2042 arg0: i16, 2043 arg1: &MemArg, 2044 ) -> Option<SideEffectNoResult> { 2045 let pattern0_0 = arg0; 2046 let pattern1_0 = arg1; 2047 // Rule at src/isa/s390x/inst.isle line 1536. 2048 let expr0_0 = MInst::StoreImm32SExt16 { 2049 imm: pattern0_0, 2050 mem: pattern1_0.clone(), 2051 }; 2052 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2053 return Some(expr1_0); 2054 } 2055 2056 // Generated as internal constructor for term store64_simm16. 2057 pub fn constructor_store64_simm16<C: Context>( 2058 ctx: &mut C, 2059 arg0: i16, 2060 arg1: &MemArg, 2061 ) -> Option<SideEffectNoResult> { 2062 let pattern0_0 = arg0; 2063 let pattern1_0 = arg1; 2064 // Rule at src/isa/s390x/inst.isle line 1541. 2065 let expr0_0 = MInst::StoreImm64SExt16 { 2066 imm: pattern0_0, 2067 mem: pattern1_0.clone(), 2068 }; 2069 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2070 return Some(expr1_0); 2071 } 2072 2073 // Generated as internal constructor for term storerev16. 2074 pub fn constructor_storerev16<C: Context>( 2075 ctx: &mut C, 2076 arg0: Reg, 2077 arg1: &MemArg, 2078 ) -> Option<SideEffectNoResult> { 2079 let pattern0_0 = arg0; 2080 let pattern1_0 = arg1; 2081 // Rule at src/isa/s390x/inst.isle line 1546. 2082 let expr0_0 = MInst::StoreRev16 { 2083 rd: pattern0_0, 2084 mem: pattern1_0.clone(), 2085 }; 2086 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2087 return Some(expr1_0); 2088 } 2089 2090 // Generated as internal constructor for term storerev32. 2091 pub fn constructor_storerev32<C: Context>( 2092 ctx: &mut C, 2093 arg0: Reg, 2094 arg1: &MemArg, 2095 ) -> Option<SideEffectNoResult> { 2096 let pattern0_0 = arg0; 2097 let pattern1_0 = arg1; 2098 // Rule at src/isa/s390x/inst.isle line 1551. 2099 let expr0_0 = MInst::StoreRev32 { 2100 rd: pattern0_0, 2101 mem: pattern1_0.clone(), 2102 }; 2103 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2104 return Some(expr1_0); 2105 } 2106 2107 // Generated as internal constructor for term storerev64. 2108 pub fn constructor_storerev64<C: Context>( 2109 ctx: &mut C, 2110 arg0: Reg, 2111 arg1: &MemArg, 2112 ) -> Option<SideEffectNoResult> { 2113 let pattern0_0 = arg0; 2114 let pattern1_0 = arg1; 2115 // Rule at src/isa/s390x/inst.isle line 1556. 2116 let expr0_0 = MInst::StoreRev64 { 2117 rd: pattern0_0, 2118 mem: pattern1_0.clone(), 2119 }; 2120 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2121 return Some(expr1_0); 2122 } 2123 2124 // Generated as internal constructor for term fpu_rr. 2125 pub fn constructor_fpu_rr<C: Context>( 2126 ctx: &mut C, 2127 arg0: Type, 2128 arg1: &FPUOp1, 2129 arg2: Reg, 2130 ) -> Option<Reg> { 2131 let pattern0_0 = arg0; 2132 let pattern1_0 = arg1; 2133 let pattern2_0 = arg2; 2134 // Rule at src/isa/s390x/inst.isle line 1561. 2135 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2136 let expr1_0 = MInst::FpuRR { 2137 fpu_op: pattern1_0.clone(), 2138 rd: expr0_0, 2139 rn: pattern2_0, 2140 }; 2141 let expr2_0 = C::emit(ctx, &expr1_0); 2142 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2143 return Some(expr3_0); 2144 } 2145 2146 // Generated as internal constructor for term fpu_rrr. 2147 pub fn constructor_fpu_rrr<C: Context>( 2148 ctx: &mut C, 2149 arg0: Type, 2150 arg1: &FPUOp2, 2151 arg2: Reg, 2152 arg3: Reg, 2153 ) -> Option<Reg> { 2154 let pattern0_0 = arg0; 2155 let pattern1_0 = arg1; 2156 let pattern2_0 = arg2; 2157 let pattern3_0 = arg3; 2158 // Rule at src/isa/s390x/inst.isle line 1568. 2159 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2160 let expr1_0 = MInst::FpuRRR { 2161 fpu_op: pattern1_0.clone(), 2162 rd: expr0_0, 2163 rm: pattern3_0, 2164 }; 2165 let expr2_0 = C::emit(ctx, &expr1_0); 2166 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2167 return Some(expr3_0); 2168 } 2169 2170 // Generated as internal constructor for term fpu_rrrr. 2171 pub fn constructor_fpu_rrrr<C: Context>( 2172 ctx: &mut C, 2173 arg0: Type, 2174 arg1: &FPUOp3, 2175 arg2: Reg, 2176 arg3: Reg, 2177 arg4: Reg, 2178 ) -> Option<Reg> { 2179 let pattern0_0 = arg0; 2180 let pattern1_0 = arg1; 2181 let pattern2_0 = arg2; 2182 let pattern3_0 = arg3; 2183 let pattern4_0 = arg4; 2184 // Rule at src/isa/s390x/inst.isle line 1575. 2185 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2186 let expr1_0 = MInst::FpuRRRR { 2187 fpu_op: pattern1_0.clone(), 2188 rd: expr0_0, 2189 rn: pattern3_0, 2190 rm: pattern4_0, 2191 }; 2192 let expr2_0 = C::emit(ctx, &expr1_0); 2193 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2194 return Some(expr3_0); 2195 } 2196 2197 // Generated as internal constructor for term fpu_copysign. 2198 pub fn constructor_fpu_copysign<C: Context>( 2199 ctx: &mut C, 2200 arg0: Type, 2201 arg1: Reg, 2202 arg2: Reg, 2203 ) -> Option<Reg> { 2204 let pattern0_0 = arg0; 2205 let pattern1_0 = arg1; 2206 let pattern2_0 = arg2; 2207 // Rule at src/isa/s390x/inst.isle line 1582. 2208 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2209 let expr1_0 = MInst::FpuCopysign { 2210 rd: expr0_0, 2211 rn: pattern1_0, 2212 rm: pattern2_0, 2213 }; 2214 let expr2_0 = C::emit(ctx, &expr1_0); 2215 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2216 return Some(expr3_0); 2217 } 2218 2219 // Generated as internal constructor for term fpu_cmp32. 2220 pub fn constructor_fpu_cmp32<C: Context>( 2221 ctx: &mut C, 2222 arg0: Reg, 2223 arg1: Reg, 2224 ) -> Option<ProducesFlags> { 2225 let pattern0_0 = arg0; 2226 let pattern1_0 = arg1; 2227 // Rule at src/isa/s390x/inst.isle line 1589. 2228 let expr0_0 = MInst::FpuCmp32 { 2229 rn: pattern0_0, 2230 rm: pattern1_0, 2231 }; 2232 let expr1_0 = C::invalid_reg(ctx); 2233 let expr2_0 = ProducesFlags::ProducesFlags { 2234 inst: expr0_0, 2235 result: expr1_0, 2236 }; 2237 return Some(expr2_0); 2238 } 2239 2240 // Generated as internal constructor for term fpu_cmp64. 2241 pub fn constructor_fpu_cmp64<C: Context>( 2242 ctx: &mut C, 2243 arg0: Reg, 2244 arg1: Reg, 2245 ) -> Option<ProducesFlags> { 2246 let pattern0_0 = arg0; 2247 let pattern1_0 = arg1; 2248 // Rule at src/isa/s390x/inst.isle line 1595. 2249 let expr0_0 = MInst::FpuCmp64 { 2250 rn: pattern0_0, 2251 rm: pattern1_0, 2252 }; 2253 let expr1_0 = C::invalid_reg(ctx); 2254 let expr2_0 = ProducesFlags::ProducesFlags { 2255 inst: expr0_0, 2256 result: expr1_0, 2257 }; 2258 return Some(expr2_0); 2259 } 2260 2261 // Generated as internal constructor for term fpu_to_int. 2262 pub fn constructor_fpu_to_int<C: Context>( 2263 ctx: &mut C, 2264 arg0: Type, 2265 arg1: &FpuToIntOp, 2266 arg2: Reg, 2267 ) -> Option<ProducesFlags> { 2268 let pattern0_0 = arg0; 2269 let pattern1_0 = arg1; 2270 let pattern2_0 = arg2; 2271 // Rule at src/isa/s390x/inst.isle line 1601. 2272 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2273 let expr1_0 = MInst::FpuToInt { 2274 op: pattern1_0.clone(), 2275 rd: expr0_0, 2276 rn: pattern2_0, 2277 }; 2278 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2279 let expr3_0 = ProducesFlags::ProducesFlags { 2280 inst: expr1_0, 2281 result: expr2_0, 2282 }; 2283 return Some(expr3_0); 2284 } 2285 2286 // Generated as internal constructor for term int_to_fpu. 2287 pub fn constructor_int_to_fpu<C: Context>( 2288 ctx: &mut C, 2289 arg0: Type, 2290 arg1: &IntToFpuOp, 2291 arg2: Reg, 2292 ) -> Option<Reg> { 2293 let pattern0_0 = arg0; 2294 let pattern1_0 = arg1; 2295 let pattern2_0 = arg2; 2296 // Rule at src/isa/s390x/inst.isle line 1608. 2297 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2298 let expr1_0 = MInst::IntToFpu { 2299 op: pattern1_0.clone(), 2300 rd: expr0_0, 2301 rn: pattern2_0, 2302 }; 2303 let expr2_0 = C::emit(ctx, &expr1_0); 2304 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2305 return Some(expr3_0); 2306 } 2307 2308 // Generated as internal constructor for term fpu_round. 2309 pub fn constructor_fpu_round<C: Context>( 2310 ctx: &mut C, 2311 arg0: Type, 2312 arg1: &FpuRoundMode, 2313 arg2: Reg, 2314 ) -> Option<Reg> { 2315 let pattern0_0 = arg0; 2316 let pattern1_0 = arg1; 2317 let pattern2_0 = arg2; 2318 // Rule at src/isa/s390x/inst.isle line 1615. 2319 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2320 let expr1_0 = MInst::FpuRound { 2321 op: pattern1_0.clone(), 2322 rd: expr0_0, 2323 rn: pattern2_0, 2324 }; 2325 let expr2_0 = C::emit(ctx, &expr1_0); 2326 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2327 return Some(expr3_0); 2328 } 2329 2330 // Generated as internal constructor for term fpuvec_rrr. 2331 pub fn constructor_fpuvec_rrr<C: Context>( 2332 ctx: &mut C, 2333 arg0: Type, 2334 arg1: &FPUOp2, 2335 arg2: Reg, 2336 arg3: Reg, 2337 ) -> Option<Reg> { 2338 let pattern0_0 = arg0; 2339 let pattern1_0 = arg1; 2340 let pattern2_0 = arg2; 2341 let pattern3_0 = arg3; 2342 // Rule at src/isa/s390x/inst.isle line 1622. 2343 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2344 let expr1_0 = MInst::FpuVecRRR { 2345 fpu_op: pattern1_0.clone(), 2346 rd: expr0_0, 2347 rn: pattern2_0, 2348 rm: pattern3_0, 2349 }; 2350 let expr2_0 = C::emit(ctx, &expr1_0); 2351 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2352 return Some(expr3_0); 2353 } 2354 2355 // Generated as internal constructor for term mov_to_fpr. 2356 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2357 let pattern0_0 = arg0; 2358 // Rule at src/isa/s390x/inst.isle line 1629. 2359 let expr0_0: Type = F64; 2360 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2361 let expr2_0 = MInst::MovToFpr { 2362 rd: expr1_0, 2363 rn: pattern0_0, 2364 }; 2365 let expr3_0 = C::emit(ctx, &expr2_0); 2366 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2367 return Some(expr4_0); 2368 } 2369 2370 // Generated as internal constructor for term mov_from_fpr. 2371 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2372 let pattern0_0 = arg0; 2373 // Rule at src/isa/s390x/inst.isle line 1636. 2374 let expr0_0: Type = I64; 2375 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2376 let expr2_0 = MInst::MovFromFpr { 2377 rd: expr1_0, 2378 rn: pattern0_0, 2379 }; 2380 let expr3_0 = C::emit(ctx, &expr2_0); 2381 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2382 return Some(expr4_0); 2383 } 2384 2385 // Generated as internal constructor for term fpu_load32. 2386 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2387 let pattern0_0 = arg0; 2388 // Rule at src/isa/s390x/inst.isle line 1643. 2389 let expr0_0: Type = F32; 2390 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2391 let expr2_0 = MInst::FpuLoad32 { 2392 rd: expr1_0, 2393 mem: pattern0_0.clone(), 2394 }; 2395 let expr3_0 = C::emit(ctx, &expr2_0); 2396 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2397 return Some(expr4_0); 2398 } 2399 2400 // Generated as internal constructor for term fpu_load64. 2401 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2402 let pattern0_0 = arg0; 2403 // Rule at src/isa/s390x/inst.isle line 1650. 2404 let expr0_0: Type = F64; 2405 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2406 let expr2_0 = MInst::FpuLoad64 { 2407 rd: expr1_0, 2408 mem: pattern0_0.clone(), 2409 }; 2410 let expr3_0 = C::emit(ctx, &expr2_0); 2411 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2412 return Some(expr4_0); 2413 } 2414 2415 // Generated as internal constructor for term fpu_loadrev32. 2416 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2417 let pattern0_0 = arg0; 2418 // Rule at src/isa/s390x/inst.isle line 1657. 2419 let expr0_0: Type = F32; 2420 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2421 let expr2_0 = MInst::FpuLoadRev32 { 2422 rd: expr1_0, 2423 mem: pattern0_0.clone(), 2424 }; 2425 let expr3_0 = C::emit(ctx, &expr2_0); 2426 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2427 return Some(expr4_0); 2428 } 2429 2430 // Generated as internal constructor for term fpu_loadrev64. 2431 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2432 let pattern0_0 = arg0; 2433 // Rule at src/isa/s390x/inst.isle line 1664. 2434 let expr0_0: Type = F64; 2435 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2436 let expr2_0 = MInst::FpuLoadRev64 { 2437 rd: expr1_0, 2438 mem: pattern0_0.clone(), 2439 }; 2440 let expr3_0 = C::emit(ctx, &expr2_0); 2441 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2442 return Some(expr4_0); 2443 } 2444 2445 // Generated as internal constructor for term fpu_store32. 2446 pub fn constructor_fpu_store32<C: Context>( 2447 ctx: &mut C, 2448 arg0: Reg, 2449 arg1: &MemArg, 2450 ) -> Option<SideEffectNoResult> { 2451 let pattern0_0 = arg0; 2452 let pattern1_0 = arg1; 2453 // Rule at src/isa/s390x/inst.isle line 1671. 2454 let expr0_0 = MInst::FpuStore32 { 2455 rd: pattern0_0, 2456 mem: pattern1_0.clone(), 2457 }; 2458 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2459 return Some(expr1_0); 2460 } 2461 2462 // Generated as internal constructor for term fpu_store64. 2463 pub fn constructor_fpu_store64<C: Context>( 2464 ctx: &mut C, 2465 arg0: Reg, 2466 arg1: &MemArg, 2467 ) -> Option<SideEffectNoResult> { 2468 let pattern0_0 = arg0; 2469 let pattern1_0 = arg1; 2470 // Rule at src/isa/s390x/inst.isle line 1676. 2471 let expr0_0 = MInst::FpuStore64 { 2472 rd: pattern0_0, 2473 mem: pattern1_0.clone(), 2474 }; 2475 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2476 return Some(expr1_0); 2477 } 2478 2479 // Generated as internal constructor for term fpu_storerev32. 2480 pub fn constructor_fpu_storerev32<C: Context>( 2481 ctx: &mut C, 2482 arg0: Reg, 2483 arg1: &MemArg, 2484 ) -> Option<SideEffectNoResult> { 2485 let pattern0_0 = arg0; 2486 let pattern1_0 = arg1; 2487 // Rule at src/isa/s390x/inst.isle line 1681. 2488 let expr0_0 = MInst::FpuStoreRev32 { 2489 rd: pattern0_0, 2490 mem: pattern1_0.clone(), 2491 }; 2492 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2493 return Some(expr1_0); 2494 } 2495 2496 // Generated as internal constructor for term fpu_storerev64. 2497 pub fn constructor_fpu_storerev64<C: Context>( 2498 ctx: &mut C, 2499 arg0: Reg, 2500 arg1: &MemArg, 2501 ) -> Option<SideEffectNoResult> { 2502 let pattern0_0 = arg0; 2503 let pattern1_0 = arg1; 2504 // Rule at src/isa/s390x/inst.isle line 1686. 2505 let expr0_0 = MInst::FpuStoreRev64 { 2506 rd: pattern0_0, 2507 mem: pattern1_0.clone(), 2508 }; 2509 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2510 return Some(expr1_0); 2511 } 2512 2513 // Generated as internal constructor for term load_ext_name_far. 2514 pub fn constructor_load_ext_name_far<C: Context>( 2515 ctx: &mut C, 2516 arg0: BoxExternalName, 2517 arg1: i64, 2518 ) -> Option<Reg> { 2519 let pattern0_0 = arg0; 2520 let pattern1_0 = arg1; 2521 // Rule at src/isa/s390x/inst.isle line 1691. 2522 let expr0_0: Type = I64; 2523 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2524 let expr2_0 = MInst::LoadExtNameFar { 2525 rd: expr1_0, 2526 name: pattern0_0, 2527 offset: pattern1_0, 2528 }; 2529 let expr3_0 = C::emit(ctx, &expr2_0); 2530 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2531 return Some(expr4_0); 2532 } 2533 2534 // Generated as internal constructor for term load_addr. 2535 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2536 let pattern0_0 = arg0; 2537 // Rule at src/isa/s390x/inst.isle line 1698. 2538 let expr0_0: Type = I64; 2539 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2540 let expr2_0 = MInst::LoadAddr { 2541 rd: expr1_0, 2542 mem: pattern0_0.clone(), 2543 }; 2544 let expr3_0 = C::emit(ctx, &expr2_0); 2545 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2546 return Some(expr4_0); 2547 } 2548 2549 // Generated as internal constructor for term jump_impl. 2550 pub fn constructor_jump_impl<C: Context>( 2551 ctx: &mut C, 2552 arg0: MachLabel, 2553 ) -> Option<SideEffectNoResult> { 2554 let pattern0_0 = arg0; 2555 // Rule at src/isa/s390x/inst.isle line 1705. 2556 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2557 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2558 return Some(expr1_0); 2559 } 2560 2561 // Generated as internal constructor for term cond_br. 2562 pub fn constructor_cond_br<C: Context>( 2563 ctx: &mut C, 2564 arg0: MachLabel, 2565 arg1: MachLabel, 2566 arg2: &Cond, 2567 ) -> Option<SideEffectNoResult> { 2568 let pattern0_0 = arg0; 2569 let pattern1_0 = arg1; 2570 let pattern2_0 = arg2; 2571 // Rule at src/isa/s390x/inst.isle line 1710. 2572 let expr0_0 = MInst::CondBr { 2573 taken: pattern0_0, 2574 not_taken: pattern1_0, 2575 cond: pattern2_0.clone(), 2576 }; 2577 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2578 return Some(expr1_0); 2579 } 2580 2581 // Generated as internal constructor for term oneway_cond_br. 2582 pub fn constructor_oneway_cond_br<C: Context>( 2583 ctx: &mut C, 2584 arg0: MachLabel, 2585 arg1: &Cond, 2586 ) -> Option<SideEffectNoResult> { 2587 let pattern0_0 = arg0; 2588 let pattern1_0 = arg1; 2589 // Rule at src/isa/s390x/inst.isle line 1715. 2590 let expr0_0 = MInst::OneWayCondBr { 2591 target: pattern0_0, 2592 cond: pattern1_0.clone(), 2593 }; 2594 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2595 return Some(expr1_0); 2596 } 2597 2598 // Generated as internal constructor for term jt_sequence. 2599 pub fn constructor_jt_sequence<C: Context>( 2600 ctx: &mut C, 2601 arg0: Reg, 2602 arg1: &VecMachLabel, 2603 ) -> Option<SideEffectNoResult> { 2604 let pattern0_0 = arg0; 2605 let pattern1_0 = arg1; 2606 // Rule at src/isa/s390x/inst.isle line 1720. 2607 let expr0_0 = MInst::JTSequence { 2608 ridx: pattern0_0, 2609 targets: pattern1_0.clone(), 2610 }; 2611 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2612 return Some(expr1_0); 2613 } 2614 2615 // Generated as internal constructor for term drop_flags. 2616 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2617 let pattern0_0 = arg0; 2618 if let &ProducesFlags::ProducesFlags { 2619 inst: ref pattern1_0, 2620 result: pattern1_1, 2621 } = pattern0_0 2622 { 2623 // Rule at src/isa/s390x/inst.isle line 1725. 2624 let expr0_0 = C::emit(ctx, &pattern1_0); 2625 return Some(pattern1_1); 2626 } 2627 return None; 2628 } 2629 2630 // Generated as internal constructor for term emit_mov. 2631 pub fn constructor_emit_mov<C: Context>( 2632 ctx: &mut C, 2633 arg0: Type, 2634 arg1: WritableReg, 2635 arg2: Reg, 2636 ) -> Option<Unit> { 2637 let pattern0_0 = arg0; 2638 if pattern0_0 == F32 { 2639 let pattern2_0 = arg1; 2640 let pattern3_0 = arg2; 2641 // Rule at src/isa/s390x/inst.isle line 1741. 2642 let expr0_0 = MInst::FpuMove32 { 2643 rd: pattern2_0, 2644 rn: pattern3_0, 2645 }; 2646 let expr1_0 = C::emit(ctx, &expr0_0); 2647 return Some(expr1_0); 2648 } 2649 if pattern0_0 == F64 { 2650 let pattern2_0 = arg1; 2651 let pattern3_0 = arg2; 2652 // Rule at src/isa/s390x/inst.isle line 1744. 2653 let expr0_0 = MInst::FpuMove64 { 2654 rd: pattern2_0, 2655 rn: pattern3_0, 2656 }; 2657 let expr1_0 = C::emit(ctx, &expr0_0); 2658 return Some(expr1_0); 2659 } 2660 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 2661 let pattern2_0 = arg1; 2662 let pattern3_0 = arg2; 2663 // Rule at src/isa/s390x/inst.isle line 1735. 2664 let expr0_0 = MInst::Mov32 { 2665 rd: pattern2_0, 2666 rm: pattern3_0, 2667 }; 2668 let expr1_0 = C::emit(ctx, &expr0_0); 2669 return Some(expr1_0); 2670 } 2671 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 2672 let pattern2_0 = arg1; 2673 let pattern3_0 = arg2; 2674 // Rule at src/isa/s390x/inst.isle line 1738. 2675 let expr0_0 = MInst::Mov64 { 2676 rd: pattern2_0, 2677 rm: pattern3_0, 2678 }; 2679 let expr1_0 = C::emit(ctx, &expr0_0); 2680 return Some(expr1_0); 2681 } 2682 return None; 2683 } 2684 2685 // Generated as internal constructor for term copy_writable_reg. 2686 pub fn constructor_copy_writable_reg<C: Context>( 2687 ctx: &mut C, 2688 arg0: Type, 2689 arg1: Reg, 2690 ) -> Option<WritableReg> { 2691 let pattern0_0 = arg0; 2692 let pattern1_0 = arg1; 2693 // Rule at src/isa/s390x/inst.isle line 1749. 2694 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2695 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 2696 return Some(expr0_0); 2697 } 2698 2699 // Generated as internal constructor for term copy_reg. 2700 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 2701 let pattern0_0 = arg0; 2702 let pattern1_0 = arg1; 2703 // Rule at src/isa/s390x/inst.isle line 1756. 2704 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 2705 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 2706 return Some(expr1_0); 2707 } 2708 2709 // Generated as internal constructor for term emit_imm. 2710 pub fn constructor_emit_imm<C: Context>( 2711 ctx: &mut C, 2712 arg0: Type, 2713 arg1: WritableReg, 2714 arg2: u64, 2715 ) -> Option<Unit> { 2716 let pattern0_0 = arg0; 2717 if pattern0_0 == F32 { 2718 let pattern2_0 = arg1; 2719 let pattern3_0 = arg2; 2720 // Rule at src/isa/s390x/inst.isle line 1811. 2721 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 2722 let expr1_0 = MInst::LoadFpuConst32 { 2723 rd: pattern2_0, 2724 const_data: expr0_0, 2725 }; 2726 let expr2_0 = C::emit(ctx, &expr1_0); 2727 return Some(expr2_0); 2728 } 2729 if pattern0_0 == F64 { 2730 let pattern2_0 = arg1; 2731 let pattern3_0 = arg2; 2732 // Rule at src/isa/s390x/inst.isle line 1816. 2733 let expr0_0 = MInst::LoadFpuConst64 { 2734 rd: pattern2_0, 2735 const_data: pattern3_0, 2736 }; 2737 let expr1_0 = C::emit(ctx, &expr0_0); 2738 return Some(expr1_0); 2739 } 2740 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 2741 let pattern2_0 = arg1; 2742 let pattern3_0 = arg2; 2743 // Rule at src/isa/s390x/inst.isle line 1765. 2744 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 2745 let expr1_0 = MInst::Mov32SImm16 { 2746 rd: pattern2_0, 2747 imm: expr0_0, 2748 }; 2749 let expr2_0 = C::emit(ctx, &expr1_0); 2750 return Some(expr2_0); 2751 } 2752 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 2753 let pattern2_0 = arg1; 2754 let pattern3_0 = arg2; 2755 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 2756 // Rule at src/isa/s390x/inst.isle line 1769. 2757 let expr0_0 = MInst::Mov32SImm16 { 2758 rd: pattern2_0, 2759 imm: pattern4_0, 2760 }; 2761 let expr1_0 = C::emit(ctx, &expr0_0); 2762 return Some(expr1_0); 2763 } 2764 // Rule at src/isa/s390x/inst.isle line 1773. 2765 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 2766 let expr1_0 = MInst::Mov32Imm { 2767 rd: pattern2_0, 2768 imm: expr0_0, 2769 }; 2770 let expr2_0 = C::emit(ctx, &expr1_0); 2771 return Some(expr2_0); 2772 } 2773 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 2774 let pattern2_0 = arg1; 2775 let pattern3_0 = arg2; 2776 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 2777 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 2778 // Rule at src/isa/s390x/inst.isle line 1793. 2779 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 2780 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 2781 return Some(expr1_0); 2782 } 2783 } 2784 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 2785 // Rule at src/isa/s390x/inst.isle line 1777. 2786 let expr0_0 = MInst::Mov64SImm16 { 2787 rd: pattern2_0, 2788 imm: pattern4_0, 2789 }; 2790 let expr1_0 = C::emit(ctx, &expr0_0); 2791 return Some(expr1_0); 2792 } 2793 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 2794 // Rule at src/isa/s390x/inst.isle line 1781. 2795 let expr0_0 = MInst::Mov64SImm32 { 2796 rd: pattern2_0, 2797 imm: pattern4_0, 2798 }; 2799 let expr1_0 = C::emit(ctx, &expr0_0); 2800 return Some(expr1_0); 2801 } 2802 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 2803 // Rule at src/isa/s390x/inst.isle line 1789. 2804 let expr0_0 = MInst::Mov64UImm32Shifted { 2805 rd: pattern2_0, 2806 imm: pattern4_0, 2807 }; 2808 let expr1_0 = C::emit(ctx, &expr0_0); 2809 return Some(expr1_0); 2810 } 2811 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 2812 // Rule at src/isa/s390x/inst.isle line 1785. 2813 let expr0_0 = MInst::Mov64UImm16Shifted { 2814 rd: pattern2_0, 2815 imm: pattern4_0, 2816 }; 2817 let expr1_0 = C::emit(ctx, &expr0_0); 2818 return Some(expr1_0); 2819 } 2820 } 2821 return None; 2822 } 2823 2824 // Generated as internal constructor for term emit_insert_imm. 2825 pub fn constructor_emit_insert_imm<C: Context>( 2826 ctx: &mut C, 2827 arg0: WritableReg, 2828 arg1: u64, 2829 ) -> Option<Unit> { 2830 let pattern0_0 = arg0; 2831 let pattern1_0 = arg1; 2832 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 2833 // Rule at src/isa/s390x/inst.isle line 1806. 2834 let expr0_0 = MInst::Insert64UImm32Shifted { 2835 rd: pattern0_0, 2836 imm: pattern2_0, 2837 }; 2838 let expr1_0 = C::emit(ctx, &expr0_0); 2839 return Some(expr1_0); 2840 } 2841 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 2842 // Rule at src/isa/s390x/inst.isle line 1802. 2843 let expr0_0 = MInst::Insert64UImm16Shifted { 2844 rd: pattern0_0, 2845 imm: pattern2_0, 2846 }; 2847 let expr1_0 = C::emit(ctx, &expr0_0); 2848 return Some(expr1_0); 2849 } 2850 return None; 2851 } 2852 2853 // Generated as internal constructor for term imm. 2854 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 2855 let pattern0_0 = arg0; 2856 let pattern1_0 = arg1; 2857 // Rule at src/isa/s390x/inst.isle line 1821. 2858 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2859 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 2860 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2861 return Some(expr2_0); 2862 } 2863 2864 // Generated as internal constructor for term imm_regpair_lo. 2865 pub fn constructor_imm_regpair_lo<C: Context>( 2866 ctx: &mut C, 2867 arg0: Type, 2868 arg1: u64, 2869 arg2: &RegPair, 2870 ) -> Option<RegPair> { 2871 let pattern0_0 = arg0; 2872 let pattern1_0 = arg1; 2873 let pattern2_0 = arg2; 2874 // Rule at src/isa/s390x/inst.isle line 1829. 2875 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 2876 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 2877 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 2878 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 2879 return Some(expr3_0); 2880 } 2881 2882 // Generated as internal constructor for term imm_regpair_hi. 2883 pub fn constructor_imm_regpair_hi<C: Context>( 2884 ctx: &mut C, 2885 arg0: Type, 2886 arg1: u64, 2887 arg2: &RegPair, 2888 ) -> Option<RegPair> { 2889 let pattern0_0 = arg0; 2890 let pattern1_0 = arg1; 2891 let pattern2_0 = arg2; 2892 // Rule at src/isa/s390x/inst.isle line 1837. 2893 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 2894 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 2895 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 2896 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 2897 return Some(expr3_0); 2898 } 2899 2900 // Generated as internal constructor for term ty_ext32. 2901 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 2902 let pattern0_0 = arg0; 2903 if pattern0_0 == I8 { 2904 // Rule at src/isa/s390x/inst.isle line 1847. 2905 let expr0_0: Type = I32; 2906 return Some(expr0_0); 2907 } 2908 if pattern0_0 == I16 { 2909 // Rule at src/isa/s390x/inst.isle line 1848. 2910 let expr0_0: Type = I32; 2911 return Some(expr0_0); 2912 } 2913 if pattern0_0 == I32 { 2914 // Rule at src/isa/s390x/inst.isle line 1849. 2915 let expr0_0: Type = I32; 2916 return Some(expr0_0); 2917 } 2918 if pattern0_0 == I64 { 2919 // Rule at src/isa/s390x/inst.isle line 1850. 2920 let expr0_0: Type = I64; 2921 return Some(expr0_0); 2922 } 2923 return None; 2924 } 2925 2926 // Generated as internal constructor for term ty_ext64. 2927 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 2928 let pattern0_0 = arg0; 2929 if pattern0_0 == I8 { 2930 // Rule at src/isa/s390x/inst.isle line 1854. 2931 let expr0_0: Type = I64; 2932 return Some(expr0_0); 2933 } 2934 if pattern0_0 == I16 { 2935 // Rule at src/isa/s390x/inst.isle line 1855. 2936 let expr0_0: Type = I64; 2937 return Some(expr0_0); 2938 } 2939 if pattern0_0 == I32 { 2940 // Rule at src/isa/s390x/inst.isle line 1856. 2941 let expr0_0: Type = I64; 2942 return Some(expr0_0); 2943 } 2944 if pattern0_0 == I64 { 2945 // Rule at src/isa/s390x/inst.isle line 1857. 2946 let expr0_0: Type = I64; 2947 return Some(expr0_0); 2948 } 2949 return None; 2950 } 2951 2952 // Generated as internal constructor for term emit_zext32_reg. 2953 pub fn constructor_emit_zext32_reg<C: Context>( 2954 ctx: &mut C, 2955 arg0: WritableReg, 2956 arg1: Type, 2957 arg2: Reg, 2958 ) -> Option<Unit> { 2959 let pattern0_0 = arg0; 2960 let pattern1_0 = arg1; 2961 let pattern2_0 = arg2; 2962 // Rule at src/isa/s390x/inst.isle line 1862. 2963 let expr0_0: bool = false; 2964 let expr1_0 = C::ty_bits(ctx, pattern1_0); 2965 let expr2_0: u8 = 32; 2966 let expr3_0 = MInst::Extend { 2967 rd: pattern0_0, 2968 rn: pattern2_0, 2969 signed: expr0_0, 2970 from_bits: expr1_0, 2971 to_bits: expr2_0, 2972 }; 2973 let expr4_0 = C::emit(ctx, &expr3_0); 2974 return Some(expr4_0); 2975 } 2976 2977 // Generated as internal constructor for term emit_sext32_reg. 2978 pub fn constructor_emit_sext32_reg<C: Context>( 2979 ctx: &mut C, 2980 arg0: WritableReg, 2981 arg1: Type, 2982 arg2: Reg, 2983 ) -> Option<Unit> { 2984 let pattern0_0 = arg0; 2985 let pattern1_0 = arg1; 2986 let pattern2_0 = arg2; 2987 // Rule at src/isa/s390x/inst.isle line 1868. 2988 let expr0_0: bool = true; 2989 let expr1_0 = C::ty_bits(ctx, pattern1_0); 2990 let expr2_0: u8 = 32; 2991 let expr3_0 = MInst::Extend { 2992 rd: pattern0_0, 2993 rn: pattern2_0, 2994 signed: expr0_0, 2995 from_bits: expr1_0, 2996 to_bits: expr2_0, 2997 }; 2998 let expr4_0 = C::emit(ctx, &expr3_0); 2999 return Some(expr4_0); 3000 } 3001 3002 // Generated as internal constructor for term emit_zext64_reg. 3003 pub fn constructor_emit_zext64_reg<C: Context>( 3004 ctx: &mut C, 3005 arg0: WritableReg, 3006 arg1: Type, 3007 arg2: Reg, 3008 ) -> Option<Unit> { 3009 let pattern0_0 = arg0; 3010 let pattern1_0 = arg1; 3011 let pattern2_0 = arg2; 3012 // Rule at src/isa/s390x/inst.isle line 1874. 3013 let expr0_0: bool = false; 3014 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3015 let expr2_0: u8 = 64; 3016 let expr3_0 = MInst::Extend { 3017 rd: pattern0_0, 3018 rn: pattern2_0, 3019 signed: expr0_0, 3020 from_bits: expr1_0, 3021 to_bits: expr2_0, 3022 }; 3023 let expr4_0 = C::emit(ctx, &expr3_0); 3024 return Some(expr4_0); 3025 } 3026 3027 // Generated as internal constructor for term emit_sext64_reg. 3028 pub fn constructor_emit_sext64_reg<C: Context>( 3029 ctx: &mut C, 3030 arg0: WritableReg, 3031 arg1: Type, 3032 arg2: Reg, 3033 ) -> Option<Unit> { 3034 let pattern0_0 = arg0; 3035 let pattern1_0 = arg1; 3036 let pattern2_0 = arg2; 3037 // Rule at src/isa/s390x/inst.isle line 1880. 3038 let expr0_0: bool = true; 3039 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3040 let expr2_0: u8 = 64; 3041 let expr3_0 = MInst::Extend { 3042 rd: pattern0_0, 3043 rn: pattern2_0, 3044 signed: expr0_0, 3045 from_bits: expr1_0, 3046 to_bits: expr2_0, 3047 }; 3048 let expr4_0 = C::emit(ctx, &expr3_0); 3049 return Some(expr4_0); 3050 } 3051 3052 // Generated as internal constructor for term zext32_reg. 3053 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3054 let pattern0_0 = arg0; 3055 let pattern1_0 = arg1; 3056 // Rule at src/isa/s390x/inst.isle line 1886. 3057 let expr0_0: Type = I32; 3058 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3059 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3060 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3061 return Some(expr3_0); 3062 } 3063 3064 // Generated as internal constructor for term sext32_reg. 3065 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3066 let pattern0_0 = arg0; 3067 let pattern1_0 = arg1; 3068 // Rule at src/isa/s390x/inst.isle line 1894. 3069 let expr0_0: Type = I32; 3070 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3071 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3072 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3073 return Some(expr3_0); 3074 } 3075 3076 // Generated as internal constructor for term zext64_reg. 3077 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3078 let pattern0_0 = arg0; 3079 let pattern1_0 = arg1; 3080 // Rule at src/isa/s390x/inst.isle line 1902. 3081 let expr0_0: Type = I64; 3082 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3083 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3084 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3085 return Some(expr3_0); 3086 } 3087 3088 // Generated as internal constructor for term sext64_reg. 3089 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3090 let pattern0_0 = arg0; 3091 let pattern1_0 = arg1; 3092 // Rule at src/isa/s390x/inst.isle line 1910. 3093 let expr0_0: Type = I64; 3094 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3095 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3096 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3097 return Some(expr3_0); 3098 } 3099 3100 // Generated as internal constructor for term emit_zext32_mem. 3101 pub fn constructor_emit_zext32_mem<C: Context>( 3102 ctx: &mut C, 3103 arg0: WritableReg, 3104 arg1: Type, 3105 arg2: &MemArg, 3106 ) -> Option<Unit> { 3107 let pattern0_0 = arg0; 3108 let pattern1_0 = arg1; 3109 if pattern1_0 == I8 { 3110 let pattern3_0 = arg2; 3111 // Rule at src/isa/s390x/inst.isle line 1918. 3112 let expr0_0 = MInst::Load32ZExt8 { 3113 rd: pattern0_0, 3114 mem: pattern3_0.clone(), 3115 }; 3116 let expr1_0 = C::emit(ctx, &expr0_0); 3117 return Some(expr1_0); 3118 } 3119 if pattern1_0 == I16 { 3120 let pattern3_0 = arg2; 3121 // Rule at src/isa/s390x/inst.isle line 1919. 3122 let expr0_0 = MInst::Load32ZExt16 { 3123 rd: pattern0_0, 3124 mem: pattern3_0.clone(), 3125 }; 3126 let expr1_0 = C::emit(ctx, &expr0_0); 3127 return Some(expr1_0); 3128 } 3129 return None; 3130 } 3131 3132 // Generated as internal constructor for term emit_sext32_mem. 3133 pub fn constructor_emit_sext32_mem<C: Context>( 3134 ctx: &mut C, 3135 arg0: WritableReg, 3136 arg1: Type, 3137 arg2: &MemArg, 3138 ) -> Option<Unit> { 3139 let pattern0_0 = arg0; 3140 let pattern1_0 = arg1; 3141 if pattern1_0 == I8 { 3142 let pattern3_0 = arg2; 3143 // Rule at src/isa/s390x/inst.isle line 1923. 3144 let expr0_0 = MInst::Load32SExt8 { 3145 rd: pattern0_0, 3146 mem: pattern3_0.clone(), 3147 }; 3148 let expr1_0 = C::emit(ctx, &expr0_0); 3149 return Some(expr1_0); 3150 } 3151 if pattern1_0 == I16 { 3152 let pattern3_0 = arg2; 3153 // Rule at src/isa/s390x/inst.isle line 1924. 3154 let expr0_0 = MInst::Load32SExt16 { 3155 rd: pattern0_0, 3156 mem: pattern3_0.clone(), 3157 }; 3158 let expr1_0 = C::emit(ctx, &expr0_0); 3159 return Some(expr1_0); 3160 } 3161 return None; 3162 } 3163 3164 // Generated as internal constructor for term emit_zext64_mem. 3165 pub fn constructor_emit_zext64_mem<C: Context>( 3166 ctx: &mut C, 3167 arg0: WritableReg, 3168 arg1: Type, 3169 arg2: &MemArg, 3170 ) -> Option<Unit> { 3171 let pattern0_0 = arg0; 3172 let pattern1_0 = arg1; 3173 if pattern1_0 == I8 { 3174 let pattern3_0 = arg2; 3175 // Rule at src/isa/s390x/inst.isle line 1928. 3176 let expr0_0 = MInst::Load64ZExt8 { 3177 rd: pattern0_0, 3178 mem: pattern3_0.clone(), 3179 }; 3180 let expr1_0 = C::emit(ctx, &expr0_0); 3181 return Some(expr1_0); 3182 } 3183 if pattern1_0 == I16 { 3184 let pattern3_0 = arg2; 3185 // Rule at src/isa/s390x/inst.isle line 1929. 3186 let expr0_0 = MInst::Load64ZExt16 { 3187 rd: pattern0_0, 3188 mem: pattern3_0.clone(), 3189 }; 3190 let expr1_0 = C::emit(ctx, &expr0_0); 3191 return Some(expr1_0); 3192 } 3193 if pattern1_0 == I32 { 3194 let pattern3_0 = arg2; 3195 // Rule at src/isa/s390x/inst.isle line 1930. 3196 let expr0_0 = MInst::Load64ZExt32 { 3197 rd: pattern0_0, 3198 mem: pattern3_0.clone(), 3199 }; 3200 let expr1_0 = C::emit(ctx, &expr0_0); 3201 return Some(expr1_0); 3202 } 3203 return None; 3204 } 3205 3206 // Generated as internal constructor for term emit_sext64_mem. 3207 pub fn constructor_emit_sext64_mem<C: Context>( 3208 ctx: &mut C, 3209 arg0: WritableReg, 3210 arg1: Type, 3211 arg2: &MemArg, 3212 ) -> Option<Unit> { 3213 let pattern0_0 = arg0; 3214 let pattern1_0 = arg1; 3215 if pattern1_0 == I8 { 3216 let pattern3_0 = arg2; 3217 // Rule at src/isa/s390x/inst.isle line 1934. 3218 let expr0_0 = MInst::Load64SExt8 { 3219 rd: pattern0_0, 3220 mem: pattern3_0.clone(), 3221 }; 3222 let expr1_0 = C::emit(ctx, &expr0_0); 3223 return Some(expr1_0); 3224 } 3225 if pattern1_0 == I16 { 3226 let pattern3_0 = arg2; 3227 // Rule at src/isa/s390x/inst.isle line 1935. 3228 let expr0_0 = MInst::Load64SExt16 { 3229 rd: pattern0_0, 3230 mem: pattern3_0.clone(), 3231 }; 3232 let expr1_0 = C::emit(ctx, &expr0_0); 3233 return Some(expr1_0); 3234 } 3235 if pattern1_0 == I32 { 3236 let pattern3_0 = arg2; 3237 // Rule at src/isa/s390x/inst.isle line 1936. 3238 let expr0_0 = MInst::Load64SExt32 { 3239 rd: pattern0_0, 3240 mem: pattern3_0.clone(), 3241 }; 3242 let expr1_0 = C::emit(ctx, &expr0_0); 3243 return Some(expr1_0); 3244 } 3245 return None; 3246 } 3247 3248 // Generated as internal constructor for term zext32_mem. 3249 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3250 let pattern0_0 = arg0; 3251 let pattern1_0 = arg1; 3252 // Rule at src/isa/s390x/inst.isle line 1940. 3253 let expr0_0: Type = I32; 3254 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3255 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3256 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3257 return Some(expr3_0); 3258 } 3259 3260 // Generated as internal constructor for term sext32_mem. 3261 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3262 let pattern0_0 = arg0; 3263 let pattern1_0 = arg1; 3264 // Rule at src/isa/s390x/inst.isle line 1947. 3265 let expr0_0: Type = I32; 3266 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3267 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3268 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3269 return Some(expr3_0); 3270 } 3271 3272 // Generated as internal constructor for term zext64_mem. 3273 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3274 let pattern0_0 = arg0; 3275 let pattern1_0 = arg1; 3276 // Rule at src/isa/s390x/inst.isle line 1954. 3277 let expr0_0: Type = I64; 3278 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3279 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3280 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3281 return Some(expr3_0); 3282 } 3283 3284 // Generated as internal constructor for term sext64_mem. 3285 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3286 let pattern0_0 = arg0; 3287 let pattern1_0 = arg1; 3288 // Rule at src/isa/s390x/inst.isle line 1961. 3289 let expr0_0: Type = I64; 3290 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3291 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3292 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3293 return Some(expr3_0); 3294 } 3295 3296 // Generated as internal constructor for term emit_put_in_reg_zext32. 3297 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3298 ctx: &mut C, 3299 arg0: WritableReg, 3300 arg1: Value, 3301 ) -> Option<Unit> { 3302 let pattern0_0 = arg0; 3303 let pattern1_0 = arg1; 3304 let pattern2_0 = C::value_type(ctx, pattern1_0); 3305 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3306 // Rule at src/isa/s390x/inst.isle line 1969. 3307 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3308 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3309 return Some(expr1_0); 3310 } 3311 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3312 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3313 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3314 if let &InstructionData::Load { 3315 opcode: ref pattern6_0, 3316 arg: pattern6_1, 3317 flags: pattern6_2, 3318 offset: pattern6_3, 3319 } = &pattern5_0 3320 { 3321 if let &Opcode::Load = &pattern6_0 { 3322 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3323 // Rule at src/isa/s390x/inst.isle line 1971. 3324 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3325 let expr1_0 = 3326 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3327 return Some(expr1_0); 3328 } 3329 } 3330 } 3331 } 3332 // Rule at src/isa/s390x/inst.isle line 1973. 3333 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3334 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3335 return Some(expr1_0); 3336 } 3337 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3338 // Rule at src/isa/s390x/inst.isle line 1975. 3339 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3340 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3341 return Some(expr1_0); 3342 } 3343 return None; 3344 } 3345 3346 // Generated as internal constructor for term emit_put_in_reg_sext32. 3347 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3348 ctx: &mut C, 3349 arg0: WritableReg, 3350 arg1: Value, 3351 ) -> Option<Unit> { 3352 let pattern0_0 = arg0; 3353 let pattern1_0 = arg1; 3354 let pattern2_0 = C::value_type(ctx, pattern1_0); 3355 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3356 // Rule at src/isa/s390x/inst.isle line 1980. 3357 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3358 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3359 return Some(expr1_0); 3360 } 3361 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3362 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3363 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3364 if let &InstructionData::Load { 3365 opcode: ref pattern6_0, 3366 arg: pattern6_1, 3367 flags: pattern6_2, 3368 offset: pattern6_3, 3369 } = &pattern5_0 3370 { 3371 if let &Opcode::Load = &pattern6_0 { 3372 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3373 // Rule at src/isa/s390x/inst.isle line 1982. 3374 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3375 let expr1_0 = 3376 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3377 return Some(expr1_0); 3378 } 3379 } 3380 } 3381 } 3382 // Rule at src/isa/s390x/inst.isle line 1984. 3383 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3384 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3385 return Some(expr1_0); 3386 } 3387 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3388 // Rule at src/isa/s390x/inst.isle line 1986. 3389 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3390 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3391 return Some(expr1_0); 3392 } 3393 return None; 3394 } 3395 3396 // Generated as internal constructor for term emit_put_in_reg_zext64. 3397 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3398 ctx: &mut C, 3399 arg0: WritableReg, 3400 arg1: Value, 3401 ) -> Option<Unit> { 3402 let pattern0_0 = arg0; 3403 let pattern1_0 = arg1; 3404 let pattern2_0 = C::value_type(ctx, pattern1_0); 3405 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3406 // Rule at src/isa/s390x/inst.isle line 1991. 3407 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3408 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3409 return Some(expr1_0); 3410 } 3411 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3412 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3413 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3414 if let &InstructionData::Load { 3415 opcode: ref pattern6_0, 3416 arg: pattern6_1, 3417 flags: pattern6_2, 3418 offset: pattern6_3, 3419 } = &pattern5_0 3420 { 3421 if let &Opcode::Load = &pattern6_0 { 3422 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3423 // Rule at src/isa/s390x/inst.isle line 1993. 3424 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3425 let expr1_0 = 3426 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3427 return Some(expr1_0); 3428 } 3429 } 3430 } 3431 } 3432 // Rule at src/isa/s390x/inst.isle line 1995. 3433 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3434 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3435 return Some(expr1_0); 3436 } 3437 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3438 // Rule at src/isa/s390x/inst.isle line 1997. 3439 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3440 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3441 return Some(expr1_0); 3442 } 3443 return None; 3444 } 3445 3446 // Generated as internal constructor for term emit_put_in_reg_sext64. 3447 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3448 ctx: &mut C, 3449 arg0: WritableReg, 3450 arg1: Value, 3451 ) -> Option<Unit> { 3452 let pattern0_0 = arg0; 3453 let pattern1_0 = arg1; 3454 let pattern2_0 = C::value_type(ctx, pattern1_0); 3455 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3456 // Rule at src/isa/s390x/inst.isle line 2002. 3457 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3458 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3459 return Some(expr1_0); 3460 } 3461 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3462 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3463 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3464 if let &InstructionData::Load { 3465 opcode: ref pattern6_0, 3466 arg: pattern6_1, 3467 flags: pattern6_2, 3468 offset: pattern6_3, 3469 } = &pattern5_0 3470 { 3471 if let &Opcode::Load = &pattern6_0 { 3472 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3473 // Rule at src/isa/s390x/inst.isle line 2004. 3474 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3475 let expr1_0 = 3476 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3477 return Some(expr1_0); 3478 } 3479 } 3480 } 3481 } 3482 // Rule at src/isa/s390x/inst.isle line 2006. 3483 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3484 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3485 return Some(expr1_0); 3486 } 3487 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3488 // Rule at src/isa/s390x/inst.isle line 2008. 3489 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3490 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3491 return Some(expr1_0); 3492 } 3493 return None; 3494 } 3495 3496 // Generated as internal constructor for term put_in_reg_zext32. 3497 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3498 let pattern0_0 = arg0; 3499 let pattern1_0 = C::value_type(ctx, pattern0_0); 3500 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3501 // Rule at src/isa/s390x/inst.isle line 2013. 3502 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3503 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3504 return Some(expr1_0); 3505 } 3506 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3507 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3508 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3509 if let &InstructionData::Load { 3510 opcode: ref pattern5_0, 3511 arg: pattern5_1, 3512 flags: pattern5_2, 3513 offset: pattern5_3, 3514 } = &pattern4_0 3515 { 3516 if let &Opcode::Load = &pattern5_0 { 3517 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3518 // Rule at src/isa/s390x/inst.isle line 2015. 3519 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3520 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 3521 return Some(expr1_0); 3522 } 3523 } 3524 } 3525 } 3526 // Rule at src/isa/s390x/inst.isle line 2017. 3527 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3528 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 3529 return Some(expr1_0); 3530 } 3531 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3532 // Rule at src/isa/s390x/inst.isle line 2019. 3533 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3534 return Some(expr0_0); 3535 } 3536 return None; 3537 } 3538 3539 // Generated as internal constructor for term put_in_reg_sext32. 3540 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3541 let pattern0_0 = arg0; 3542 let pattern1_0 = C::value_type(ctx, pattern0_0); 3543 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 3544 // Rule at src/isa/s390x/inst.isle line 2024. 3545 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3546 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3547 return Some(expr1_0); 3548 } 3549 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3550 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3551 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3552 if let &InstructionData::Load { 3553 opcode: ref pattern5_0, 3554 arg: pattern5_1, 3555 flags: pattern5_2, 3556 offset: pattern5_3, 3557 } = &pattern4_0 3558 { 3559 if let &Opcode::Load = &pattern5_0 { 3560 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3561 // Rule at src/isa/s390x/inst.isle line 2026. 3562 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3563 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 3564 return Some(expr1_0); 3565 } 3566 } 3567 } 3568 } 3569 // Rule at src/isa/s390x/inst.isle line 2028. 3570 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3571 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 3572 return Some(expr1_0); 3573 } 3574 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3575 // Rule at src/isa/s390x/inst.isle line 2030. 3576 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3577 return Some(expr0_0); 3578 } 3579 return None; 3580 } 3581 3582 // Generated as internal constructor for term put_in_reg_zext64. 3583 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3584 let pattern0_0 = arg0; 3585 let pattern1_0 = C::value_type(ctx, pattern0_0); 3586 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3587 // Rule at src/isa/s390x/inst.isle line 2035. 3588 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 3589 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3590 return Some(expr1_0); 3591 } 3592 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 3593 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3594 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3595 if let &InstructionData::Load { 3596 opcode: ref pattern5_0, 3597 arg: pattern5_1, 3598 flags: pattern5_2, 3599 offset: pattern5_3, 3600 } = &pattern4_0 3601 { 3602 if let &Opcode::Load = &pattern5_0 { 3603 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3604 // Rule at src/isa/s390x/inst.isle line 2037. 3605 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3606 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 3607 return Some(expr1_0); 3608 } 3609 } 3610 } 3611 } 3612 // Rule at src/isa/s390x/inst.isle line 2039. 3613 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3614 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 3615 return Some(expr1_0); 3616 } 3617 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 3618 // Rule at src/isa/s390x/inst.isle line 2041. 3619 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3620 return Some(expr0_0); 3621 } 3622 return None; 3623 } 3624 3625 // Generated as internal constructor for term put_in_reg_sext64. 3626 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3627 let pattern0_0 = arg0; 3628 let pattern1_0 = C::value_type(ctx, pattern0_0); 3629 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 3630 // Rule at src/isa/s390x/inst.isle line 2046. 3631 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 3632 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3633 return Some(expr1_0); 3634 } 3635 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 3636 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3637 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3638 if let &InstructionData::Load { 3639 opcode: ref pattern5_0, 3640 arg: pattern5_1, 3641 flags: pattern5_2, 3642 offset: pattern5_3, 3643 } = &pattern4_0 3644 { 3645 if let &Opcode::Load = &pattern5_0 { 3646 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3647 // Rule at src/isa/s390x/inst.isle line 2048. 3648 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3649 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 3650 return Some(expr1_0); 3651 } 3652 } 3653 } 3654 } 3655 // Rule at src/isa/s390x/inst.isle line 2050. 3656 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3657 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 3658 return Some(expr1_0); 3659 } 3660 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 3661 // Rule at src/isa/s390x/inst.isle line 2052. 3662 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3663 return Some(expr0_0); 3664 } 3665 return None; 3666 } 3667 3668 // Generated as internal constructor for term put_in_regpair_lo_zext32. 3669 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 3670 ctx: &mut C, 3671 arg0: Value, 3672 arg1: &RegPair, 3673 ) -> Option<RegPair> { 3674 let pattern0_0 = arg0; 3675 let pattern1_0 = arg1; 3676 // Rule at src/isa/s390x/inst.isle line 2058. 3677 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 3678 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3679 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 3680 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3681 return Some(expr3_0); 3682 } 3683 3684 // Generated as internal constructor for term put_in_regpair_lo_sext32. 3685 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 3686 ctx: &mut C, 3687 arg0: Value, 3688 arg1: &RegPair, 3689 ) -> Option<RegPair> { 3690 let pattern0_0 = arg0; 3691 let pattern1_0 = arg1; 3692 // Rule at src/isa/s390x/inst.isle line 2066. 3693 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 3694 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3695 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 3696 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3697 return Some(expr3_0); 3698 } 3699 3700 // Generated as internal constructor for term put_in_regpair_lo_zext64. 3701 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 3702 ctx: &mut C, 3703 arg0: Value, 3704 arg1: &RegPair, 3705 ) -> Option<RegPair> { 3706 let pattern0_0 = arg0; 3707 let pattern1_0 = arg1; 3708 // Rule at src/isa/s390x/inst.isle line 2074. 3709 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 3710 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3711 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 3712 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3713 return Some(expr3_0); 3714 } 3715 3716 // Generated as internal constructor for term put_in_regpair_lo_sext64. 3717 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 3718 ctx: &mut C, 3719 arg0: Value, 3720 arg1: &RegPair, 3721 ) -> Option<RegPair> { 3722 let pattern0_0 = arg0; 3723 let pattern1_0 = arg1; 3724 // Rule at src/isa/s390x/inst.isle line 2082. 3725 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 3726 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3727 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 3728 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3729 return Some(expr3_0); 3730 } 3731 3732 // Generated as internal constructor for term emit_cmov_imm. 3733 pub fn constructor_emit_cmov_imm<C: Context>( 3734 ctx: &mut C, 3735 arg0: Type, 3736 arg1: WritableReg, 3737 arg2: &Cond, 3738 arg3: i16, 3739 ) -> Option<ConsumesFlags> { 3740 let pattern0_0 = arg0; 3741 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3742 let pattern2_0 = arg1; 3743 let pattern3_0 = arg2; 3744 let pattern4_0 = arg3; 3745 // Rule at src/isa/s390x/inst.isle line 2092. 3746 let expr0_0 = MInst::CMov32SImm16 { 3747 rd: pattern2_0, 3748 cond: pattern3_0.clone(), 3749 imm: pattern4_0, 3750 }; 3751 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3752 let expr2_0 = ConsumesFlags::ConsumesFlags { 3753 inst: expr0_0, 3754 result: expr1_0, 3755 }; 3756 return Some(expr2_0); 3757 } 3758 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3759 let pattern2_0 = arg1; 3760 let pattern3_0 = arg2; 3761 let pattern4_0 = arg3; 3762 // Rule at src/isa/s390x/inst.isle line 2095. 3763 let expr0_0 = MInst::CMov64SImm16 { 3764 rd: pattern2_0, 3765 cond: pattern3_0.clone(), 3766 imm: pattern4_0, 3767 }; 3768 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3769 let expr2_0 = ConsumesFlags::ConsumesFlags { 3770 inst: expr0_0, 3771 result: expr1_0, 3772 }; 3773 return Some(expr2_0); 3774 } 3775 return None; 3776 } 3777 3778 // Generated as internal constructor for term cmov_imm. 3779 pub fn constructor_cmov_imm<C: Context>( 3780 ctx: &mut C, 3781 arg0: Type, 3782 arg1: &Cond, 3783 arg2: i16, 3784 arg3: Reg, 3785 ) -> Option<ConsumesFlags> { 3786 let pattern0_0 = arg0; 3787 let pattern1_0 = arg1; 3788 let pattern2_0 = arg2; 3789 let pattern3_0 = arg3; 3790 // Rule at src/isa/s390x/inst.isle line 2101. 3791 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 3792 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 3793 return Some(expr1_0); 3794 } 3795 3796 // Generated as internal constructor for term cmov_imm_regpair_lo. 3797 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 3798 ctx: &mut C, 3799 arg0: Type, 3800 arg1: &ProducesFlags, 3801 arg2: &Cond, 3802 arg3: i16, 3803 arg4: &RegPair, 3804 ) -> Option<RegPair> { 3805 let pattern0_0 = arg0; 3806 let pattern1_0 = arg1; 3807 let pattern2_0 = arg2; 3808 let pattern3_0 = arg3; 3809 let pattern4_0 = arg4; 3810 // Rule at src/isa/s390x/inst.isle line 2108. 3811 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 3812 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3813 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 3814 let expr3_0 = constructor_with_flags_1(ctx, pattern1_0, &expr2_0)?; 3815 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3816 return Some(expr4_0); 3817 } 3818 3819 // Generated as internal constructor for term cmov_imm_regpair_hi. 3820 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 3821 ctx: &mut C, 3822 arg0: Type, 3823 arg1: &ProducesFlags, 3824 arg2: &Cond, 3825 arg3: i16, 3826 arg4: &RegPair, 3827 ) -> Option<RegPair> { 3828 let pattern0_0 = arg0; 3829 let pattern1_0 = arg1; 3830 let pattern2_0 = arg2; 3831 let pattern3_0 = arg3; 3832 let pattern4_0 = arg4; 3833 // Rule at src/isa/s390x/inst.isle line 2117. 3834 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 3835 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3836 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 3837 let expr3_0 = constructor_with_flags_1(ctx, pattern1_0, &expr2_0)?; 3838 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3839 return Some(expr4_0); 3840 } 3841 3842 // Generated as internal constructor for term emit_cmov_reg. 3843 pub fn constructor_emit_cmov_reg<C: Context>( 3844 ctx: &mut C, 3845 arg0: Type, 3846 arg1: WritableReg, 3847 arg2: &Cond, 3848 arg3: Reg, 3849 ) -> Option<ConsumesFlags> { 3850 let pattern0_0 = arg0; 3851 if pattern0_0 == F32 { 3852 let pattern2_0 = arg1; 3853 let pattern3_0 = arg2; 3854 let pattern4_0 = arg3; 3855 // Rule at src/isa/s390x/inst.isle line 2131. 3856 let expr0_0 = MInst::FpuCMov32 { 3857 rd: pattern2_0, 3858 cond: pattern3_0.clone(), 3859 rm: pattern4_0, 3860 }; 3861 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3862 let expr2_0 = ConsumesFlags::ConsumesFlags { 3863 inst: expr0_0, 3864 result: expr1_0, 3865 }; 3866 return Some(expr2_0); 3867 } 3868 if pattern0_0 == F64 { 3869 let pattern2_0 = arg1; 3870 let pattern3_0 = arg2; 3871 let pattern4_0 = arg3; 3872 // Rule at src/isa/s390x/inst.isle line 2134. 3873 let expr0_0 = MInst::FpuCMov64 { 3874 rd: pattern2_0, 3875 cond: pattern3_0.clone(), 3876 rm: pattern4_0, 3877 }; 3878 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3879 let expr2_0 = ConsumesFlags::ConsumesFlags { 3880 inst: expr0_0, 3881 result: expr1_0, 3882 }; 3883 return Some(expr2_0); 3884 } 3885 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3886 let pattern2_0 = arg1; 3887 let pattern3_0 = arg2; 3888 let pattern4_0 = arg3; 3889 // Rule at src/isa/s390x/inst.isle line 2125. 3890 let expr0_0 = MInst::CMov32 { 3891 rd: pattern2_0, 3892 cond: pattern3_0.clone(), 3893 rm: pattern4_0, 3894 }; 3895 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3896 let expr2_0 = ConsumesFlags::ConsumesFlags { 3897 inst: expr0_0, 3898 result: expr1_0, 3899 }; 3900 return Some(expr2_0); 3901 } 3902 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3903 let pattern2_0 = arg1; 3904 let pattern3_0 = arg2; 3905 let pattern4_0 = arg3; 3906 // Rule at src/isa/s390x/inst.isle line 2128. 3907 let expr0_0 = MInst::CMov64 { 3908 rd: pattern2_0, 3909 cond: pattern3_0.clone(), 3910 rm: pattern4_0, 3911 }; 3912 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3913 let expr2_0 = ConsumesFlags::ConsumesFlags { 3914 inst: expr0_0, 3915 result: expr1_0, 3916 }; 3917 return Some(expr2_0); 3918 } 3919 return None; 3920 } 3921 3922 // Generated as internal constructor for term cmov_reg. 3923 pub fn constructor_cmov_reg<C: Context>( 3924 ctx: &mut C, 3925 arg0: Type, 3926 arg1: &Cond, 3927 arg2: Reg, 3928 arg3: Reg, 3929 ) -> Option<ConsumesFlags> { 3930 let pattern0_0 = arg0; 3931 let pattern1_0 = arg1; 3932 let pattern2_0 = arg2; 3933 let pattern3_0 = arg3; 3934 // Rule at src/isa/s390x/inst.isle line 2140. 3935 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 3936 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 3937 return Some(expr1_0); 3938 } 3939 3940 // Generated as internal constructor for term trap_if. 3941 pub fn constructor_trap_if<C: Context>( 3942 ctx: &mut C, 3943 arg0: &ProducesFlags, 3944 arg1: &Cond, 3945 arg2: &TrapCode, 3946 ) -> Option<Reg> { 3947 let pattern0_0 = arg0; 3948 if let &ProducesFlags::ProducesFlags { 3949 inst: ref pattern1_0, 3950 result: pattern1_1, 3951 } = pattern0_0 3952 { 3953 let pattern2_0 = arg1; 3954 let pattern3_0 = arg2; 3955 // Rule at src/isa/s390x/inst.isle line 2148. 3956 let expr0_0 = C::emit(ctx, &pattern1_0); 3957 let expr1_0 = MInst::TrapIf { 3958 cond: pattern2_0.clone(), 3959 trap_code: pattern3_0.clone(), 3960 }; 3961 let expr2_0 = C::emit(ctx, &expr1_0); 3962 return Some(pattern1_1); 3963 } 3964 return None; 3965 } 3966 3967 // Generated as internal constructor for term icmps_reg_and_trap. 3968 pub fn constructor_icmps_reg_and_trap<C: Context>( 3969 ctx: &mut C, 3970 arg0: Type, 3971 arg1: Reg, 3972 arg2: Reg, 3973 arg3: &Cond, 3974 arg4: &TrapCode, 3975 ) -> Option<Reg> { 3976 let pattern0_0 = arg0; 3977 let pattern1_0 = arg1; 3978 let pattern2_0 = arg2; 3979 let pattern3_0 = arg3; 3980 let pattern4_0 = arg4; 3981 // Rule at src/isa/s390x/inst.isle line 2154. 3982 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 3983 let expr1_0 = MInst::CmpTrapRR { 3984 op: expr0_0, 3985 rn: pattern1_0, 3986 rm: pattern2_0, 3987 cond: pattern3_0.clone(), 3988 trap_code: pattern4_0.clone(), 3989 }; 3990 let expr2_0 = C::emit(ctx, &expr1_0); 3991 let expr3_0 = C::invalid_reg(ctx); 3992 return Some(expr3_0); 3993 } 3994 3995 // Generated as internal constructor for term icmps_simm16_and_trap. 3996 pub fn constructor_icmps_simm16_and_trap<C: Context>( 3997 ctx: &mut C, 3998 arg0: Type, 3999 arg1: Reg, 4000 arg2: i16, 4001 arg3: &Cond, 4002 arg4: &TrapCode, 4003 ) -> Option<Reg> { 4004 let pattern0_0 = arg0; 4005 let pattern1_0 = arg1; 4006 let pattern2_0 = arg2; 4007 let pattern3_0 = arg3; 4008 let pattern4_0 = arg4; 4009 // Rule at src/isa/s390x/inst.isle line 2160. 4010 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4011 let expr1_0 = MInst::CmpTrapRSImm16 { 4012 op: expr0_0, 4013 rn: pattern1_0, 4014 imm: pattern2_0, 4015 cond: pattern3_0.clone(), 4016 trap_code: pattern4_0.clone(), 4017 }; 4018 let expr2_0 = C::emit(ctx, &expr1_0); 4019 let expr3_0 = C::invalid_reg(ctx); 4020 return Some(expr3_0); 4021 } 4022 4023 // Generated as internal constructor for term icmpu_reg_and_trap. 4024 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4025 ctx: &mut C, 4026 arg0: Type, 4027 arg1: Reg, 4028 arg2: Reg, 4029 arg3: &Cond, 4030 arg4: &TrapCode, 4031 ) -> Option<Reg> { 4032 let pattern0_0 = arg0; 4033 let pattern1_0 = arg1; 4034 let pattern2_0 = arg2; 4035 let pattern3_0 = arg3; 4036 let pattern4_0 = arg4; 4037 // Rule at src/isa/s390x/inst.isle line 2166. 4038 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4039 let expr1_0 = MInst::CmpTrapRR { 4040 op: expr0_0, 4041 rn: pattern1_0, 4042 rm: pattern2_0, 4043 cond: pattern3_0.clone(), 4044 trap_code: pattern4_0.clone(), 4045 }; 4046 let expr2_0 = C::emit(ctx, &expr1_0); 4047 let expr3_0 = C::invalid_reg(ctx); 4048 return Some(expr3_0); 4049 } 4050 4051 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4052 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4053 ctx: &mut C, 4054 arg0: Type, 4055 arg1: Reg, 4056 arg2: u16, 4057 arg3: &Cond, 4058 arg4: &TrapCode, 4059 ) -> Option<Reg> { 4060 let pattern0_0 = arg0; 4061 let pattern1_0 = arg1; 4062 let pattern2_0 = arg2; 4063 let pattern3_0 = arg3; 4064 let pattern4_0 = arg4; 4065 // Rule at src/isa/s390x/inst.isle line 2172. 4066 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4067 let expr1_0 = MInst::CmpTrapRUImm16 { 4068 op: expr0_0, 4069 rn: pattern1_0, 4070 imm: pattern2_0, 4071 cond: pattern3_0.clone(), 4072 trap_code: pattern4_0.clone(), 4073 }; 4074 let expr2_0 = C::emit(ctx, &expr1_0); 4075 let expr3_0 = C::invalid_reg(ctx); 4076 return Some(expr3_0); 4077 } 4078 4079 // Generated as internal constructor for term trap_impl. 4080 pub fn constructor_trap_impl<C: Context>( 4081 ctx: &mut C, 4082 arg0: &TrapCode, 4083 ) -> Option<SideEffectNoResult> { 4084 let pattern0_0 = arg0; 4085 // Rule at src/isa/s390x/inst.isle line 2178. 4086 let expr0_0 = MInst::Trap { 4087 trap_code: pattern0_0.clone(), 4088 }; 4089 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4090 return Some(expr1_0); 4091 } 4092 4093 // Generated as internal constructor for term trap_if_impl. 4094 pub fn constructor_trap_if_impl<C: Context>( 4095 ctx: &mut C, 4096 arg0: &Cond, 4097 arg1: &TrapCode, 4098 ) -> Option<SideEffectNoResult> { 4099 let pattern0_0 = arg0; 4100 let pattern1_0 = arg1; 4101 // Rule at src/isa/s390x/inst.isle line 2182. 4102 let expr0_0 = MInst::TrapIf { 4103 cond: pattern0_0.clone(), 4104 trap_code: pattern1_0.clone(), 4105 }; 4106 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4107 return Some(expr1_0); 4108 } 4109 4110 // Generated as internal constructor for term debugtrap_impl. 4111 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4112 // Rule at src/isa/s390x/inst.isle line 2186. 4113 let expr0_0 = MInst::Debugtrap; 4114 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4115 return Some(expr1_0); 4116 } 4117 4118 // Generated as internal constructor for term bool. 4119 pub fn constructor_bool<C: Context>( 4120 ctx: &mut C, 4121 arg0: &ProducesFlags, 4122 arg1: &Cond, 4123 ) -> Option<ProducesBool> { 4124 let pattern0_0 = arg0; 4125 let pattern1_0 = arg1; 4126 // Rule at src/isa/s390x/inst.isle line 2197. 4127 let expr0_0 = ProducesBool::ProducesBool { 4128 producer: pattern0_0.clone(), 4129 cond: pattern1_0.clone(), 4130 }; 4131 return Some(expr0_0); 4132 } 4133 4134 // Generated as internal constructor for term invert_bool. 4135 pub fn constructor_invert_bool<C: Context>( 4136 ctx: &mut C, 4137 arg0: &ProducesBool, 4138 ) -> Option<ProducesBool> { 4139 let pattern0_0 = arg0; 4140 if let &ProducesBool::ProducesBool { 4141 producer: ref pattern1_0, 4142 cond: ref pattern1_1, 4143 } = pattern0_0 4144 { 4145 // Rule at src/isa/s390x/inst.isle line 2201. 4146 let expr0_0 = C::invert_cond(ctx, &pattern1_1); 4147 let expr1_0 = constructor_bool(ctx, &pattern1_0, &expr0_0)?; 4148 return Some(expr1_0); 4149 } 4150 return None; 4151 } 4152 4153 // Generated as internal constructor for term emit_producer. 4154 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4155 let pattern0_0 = arg0; 4156 if let &ProducesFlags::ProducesFlags { 4157 inst: ref pattern1_0, 4158 result: pattern1_1, 4159 } = pattern0_0 4160 { 4161 // Rule at src/isa/s390x/inst.isle line 2210. 4162 let expr0_0 = C::emit(ctx, &pattern1_0); 4163 return Some(expr0_0); 4164 } 4165 return None; 4166 } 4167 4168 // Generated as internal constructor for term emit_consumer. 4169 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4170 let pattern0_0 = arg0; 4171 if let &ConsumesFlags::ConsumesFlags { 4172 inst: ref pattern1_0, 4173 result: pattern1_1, 4174 } = pattern0_0 4175 { 4176 // Rule at src/isa/s390x/inst.isle line 2212. 4177 let expr0_0 = C::emit(ctx, &pattern1_0); 4178 return Some(expr0_0); 4179 } 4180 return None; 4181 } 4182 4183 // Generated as internal constructor for term select_bool_reg. 4184 pub fn constructor_select_bool_reg<C: Context>( 4185 ctx: &mut C, 4186 arg0: Type, 4187 arg1: &ProducesBool, 4188 arg2: Reg, 4189 arg3: Reg, 4190 ) -> Option<Reg> { 4191 let pattern0_0 = arg0; 4192 let pattern1_0 = arg1; 4193 if let &ProducesBool::ProducesBool { 4194 producer: ref pattern2_0, 4195 cond: ref pattern2_1, 4196 } = pattern1_0 4197 { 4198 let pattern3_0 = arg2; 4199 let pattern4_0 = arg3; 4200 // Rule at src/isa/s390x/inst.isle line 2216. 4201 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4202 let expr1_0 = constructor_emit_producer(ctx, &pattern2_0)?; 4203 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4204 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, &pattern2_1, pattern3_0)?; 4205 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4206 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4207 return Some(expr5_0); 4208 } 4209 return None; 4210 } 4211 4212 // Generated as internal constructor for term select_bool_imm. 4213 pub fn constructor_select_bool_imm<C: Context>( 4214 ctx: &mut C, 4215 arg0: Type, 4216 arg1: &ProducesBool, 4217 arg2: i16, 4218 arg3: u64, 4219 ) -> Option<Reg> { 4220 let pattern0_0 = arg0; 4221 let pattern1_0 = arg1; 4222 if let &ProducesBool::ProducesBool { 4223 producer: ref pattern2_0, 4224 cond: ref pattern2_1, 4225 } = pattern1_0 4226 { 4227 let pattern3_0 = arg2; 4228 let pattern4_0 = arg3; 4229 // Rule at src/isa/s390x/inst.isle line 2225. 4230 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4231 let expr1_0 = constructor_emit_producer(ctx, &pattern2_0)?; 4232 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4233 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, &pattern2_1, pattern3_0)?; 4234 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4235 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4236 return Some(expr5_0); 4237 } 4238 return None; 4239 } 4240 4241 // Generated as internal constructor for term lower_bool. 4242 pub fn constructor_lower_bool<C: Context>( 4243 ctx: &mut C, 4244 arg0: Type, 4245 arg1: &ProducesBool, 4246 ) -> Option<Reg> { 4247 let pattern0_0 = arg0; 4248 if pattern0_0 == B1 { 4249 let pattern2_0 = arg1; 4250 // Rule at src/isa/s390x/inst.isle line 2235. 4251 let expr0_0: Type = B1; 4252 let expr1_0: i16 = 1; 4253 let expr2_0: u64 = 0; 4254 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4255 return Some(expr3_0); 4256 } 4257 if pattern0_0 == B8 { 4258 let pattern2_0 = arg1; 4259 // Rule at src/isa/s390x/inst.isle line 2236. 4260 let expr0_0: Type = B8; 4261 let expr1_0: i16 = -1; 4262 let expr2_0: u64 = 0; 4263 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4264 return Some(expr3_0); 4265 } 4266 if pattern0_0 == B16 { 4267 let pattern2_0 = arg1; 4268 // Rule at src/isa/s390x/inst.isle line 2237. 4269 let expr0_0: Type = B16; 4270 let expr1_0: i16 = -1; 4271 let expr2_0: u64 = 0; 4272 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4273 return Some(expr3_0); 4274 } 4275 if pattern0_0 == B32 { 4276 let pattern2_0 = arg1; 4277 // Rule at src/isa/s390x/inst.isle line 2238. 4278 let expr0_0: Type = B32; 4279 let expr1_0: i16 = -1; 4280 let expr2_0: u64 = 0; 4281 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4282 return Some(expr3_0); 4283 } 4284 if pattern0_0 == B64 { 4285 let pattern2_0 = arg1; 4286 // Rule at src/isa/s390x/inst.isle line 2239. 4287 let expr0_0: Type = B64; 4288 let expr1_0: i16 = -1; 4289 let expr2_0: u64 = 0; 4290 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4291 return Some(expr3_0); 4292 } 4293 return None; 4294 } 4295 4296 // Generated as internal constructor for term cond_br_bool. 4297 pub fn constructor_cond_br_bool<C: Context>( 4298 ctx: &mut C, 4299 arg0: &ProducesBool, 4300 arg1: MachLabel, 4301 arg2: MachLabel, 4302 ) -> Option<SideEffectNoResult> { 4303 let pattern0_0 = arg0; 4304 if let &ProducesBool::ProducesBool { 4305 producer: ref pattern1_0, 4306 cond: ref pattern1_1, 4307 } = pattern0_0 4308 { 4309 let pattern2_0 = arg1; 4310 let pattern3_0 = arg2; 4311 // Rule at src/isa/s390x/inst.isle line 2243. 4312 let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; 4313 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, &pattern1_1)?; 4314 return Some(expr1_0); 4315 } 4316 return None; 4317 } 4318 4319 // Generated as internal constructor for term oneway_cond_br_bool. 4320 pub fn constructor_oneway_cond_br_bool<C: Context>( 4321 ctx: &mut C, 4322 arg0: &ProducesBool, 4323 arg1: MachLabel, 4324 ) -> Option<SideEffectNoResult> { 4325 let pattern0_0 = arg0; 4326 if let &ProducesBool::ProducesBool { 4327 producer: ref pattern1_0, 4328 cond: ref pattern1_1, 4329 } = pattern0_0 4330 { 4331 let pattern2_0 = arg1; 4332 // Rule at src/isa/s390x/inst.isle line 2249. 4333 let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; 4334 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, &pattern1_1)?; 4335 return Some(expr1_0); 4336 } 4337 return None; 4338 } 4339 4340 // Generated as internal constructor for term trap_if_bool. 4341 pub fn constructor_trap_if_bool<C: Context>( 4342 ctx: &mut C, 4343 arg0: &ProducesBool, 4344 arg1: &TrapCode, 4345 ) -> Option<SideEffectNoResult> { 4346 let pattern0_0 = arg0; 4347 if let &ProducesBool::ProducesBool { 4348 producer: ref pattern1_0, 4349 cond: ref pattern1_1, 4350 } = pattern0_0 4351 { 4352 let pattern2_0 = arg1; 4353 // Rule at src/isa/s390x/inst.isle line 2255. 4354 let expr0_0 = constructor_emit_producer(ctx, &pattern1_0)?; 4355 let expr1_0 = constructor_trap_if_impl(ctx, &pattern1_1, pattern2_0)?; 4356 return Some(expr1_0); 4357 } 4358 return None; 4359 } 4360 4361 // Generated as internal constructor for term clz_reg. 4362 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 4363 let pattern0_0 = arg0; 4364 if pattern0_0 == 64 { 4365 let pattern2_0 = arg1; 4366 // Rule at src/isa/s390x/inst.isle line 2266. 4367 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 4368 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 4369 let expr2_0 = C::emit(ctx, &expr1_0); 4370 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4371 return Some(expr3_0); 4372 } 4373 let pattern1_0 = arg1; 4374 // Rule at src/isa/s390x/inst.isle line 2275. 4375 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 4376 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 4377 let expr2_0 = C::emit(ctx, &expr1_0); 4378 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4379 let expr4_0 = IntCC::Equal; 4380 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 4381 let expr6_0 = MInst::CMov64SImm16 { 4382 rd: expr3_0, 4383 cond: expr5_0, 4384 imm: pattern0_0, 4385 }; 4386 let expr7_0 = C::emit(ctx, &expr6_0); 4387 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4388 return Some(expr8_0); 4389 } 4390 4391 // Generated as internal constructor for term aluop_add. 4392 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4393 let pattern0_0 = arg0; 4394 if pattern0_0 == I8 { 4395 // Rule at src/isa/s390x/inst.isle line 2286. 4396 let expr0_0 = ALUOp::Add32; 4397 return Some(expr0_0); 4398 } 4399 if pattern0_0 == I16 { 4400 // Rule at src/isa/s390x/inst.isle line 2287. 4401 let expr0_0 = ALUOp::Add32; 4402 return Some(expr0_0); 4403 } 4404 if pattern0_0 == I32 { 4405 // Rule at src/isa/s390x/inst.isle line 2288. 4406 let expr0_0 = ALUOp::Add32; 4407 return Some(expr0_0); 4408 } 4409 if pattern0_0 == I64 { 4410 // Rule at src/isa/s390x/inst.isle line 2289. 4411 let expr0_0 = ALUOp::Add64; 4412 return Some(expr0_0); 4413 } 4414 return None; 4415 } 4416 4417 // Generated as internal constructor for term aluop_add_sext16. 4418 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4419 let pattern0_0 = arg0; 4420 if pattern0_0 == I16 { 4421 // Rule at src/isa/s390x/inst.isle line 2292. 4422 let expr0_0 = ALUOp::Add32Ext16; 4423 return Some(expr0_0); 4424 } 4425 if pattern0_0 == I32 { 4426 // Rule at src/isa/s390x/inst.isle line 2293. 4427 let expr0_0 = ALUOp::Add32Ext16; 4428 return Some(expr0_0); 4429 } 4430 if pattern0_0 == I64 { 4431 // Rule at src/isa/s390x/inst.isle line 2294. 4432 let expr0_0 = ALUOp::Add64Ext16; 4433 return Some(expr0_0); 4434 } 4435 return None; 4436 } 4437 4438 // Generated as internal constructor for term aluop_add_sext32. 4439 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4440 let pattern0_0 = arg0; 4441 if pattern0_0 == I64 { 4442 // Rule at src/isa/s390x/inst.isle line 2297. 4443 let expr0_0 = ALUOp::Add64Ext32; 4444 return Some(expr0_0); 4445 } 4446 return None; 4447 } 4448 4449 // Generated as internal constructor for term add_reg. 4450 pub fn constructor_add_reg<C: Context>( 4451 ctx: &mut C, 4452 arg0: Type, 4453 arg1: Reg, 4454 arg2: Reg, 4455 ) -> Option<Reg> { 4456 let pattern0_0 = arg0; 4457 let pattern1_0 = arg1; 4458 let pattern2_0 = arg2; 4459 // Rule at src/isa/s390x/inst.isle line 2300. 4460 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 4461 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4462 return Some(expr1_0); 4463 } 4464 4465 // Generated as internal constructor for term add_reg_sext32. 4466 pub fn constructor_add_reg_sext32<C: Context>( 4467 ctx: &mut C, 4468 arg0: Type, 4469 arg1: Reg, 4470 arg2: Reg, 4471 ) -> Option<Reg> { 4472 let pattern0_0 = arg0; 4473 let pattern1_0 = arg1; 4474 let pattern2_0 = arg2; 4475 // Rule at src/isa/s390x/inst.isle line 2303. 4476 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 4477 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4478 return Some(expr1_0); 4479 } 4480 4481 // Generated as internal constructor for term add_simm16. 4482 pub fn constructor_add_simm16<C: Context>( 4483 ctx: &mut C, 4484 arg0: Type, 4485 arg1: Reg, 4486 arg2: i16, 4487 ) -> Option<Reg> { 4488 let pattern0_0 = arg0; 4489 let pattern1_0 = arg1; 4490 let pattern2_0 = arg2; 4491 // Rule at src/isa/s390x/inst.isle line 2306. 4492 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 4493 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4494 return Some(expr1_0); 4495 } 4496 4497 // Generated as internal constructor for term add_simm32. 4498 pub fn constructor_add_simm32<C: Context>( 4499 ctx: &mut C, 4500 arg0: Type, 4501 arg1: Reg, 4502 arg2: i32, 4503 ) -> Option<Reg> { 4504 let pattern0_0 = arg0; 4505 let pattern1_0 = arg1; 4506 let pattern2_0 = arg2; 4507 // Rule at src/isa/s390x/inst.isle line 2309. 4508 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 4509 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4510 return Some(expr1_0); 4511 } 4512 4513 // Generated as internal constructor for term add_mem. 4514 pub fn constructor_add_mem<C: Context>( 4515 ctx: &mut C, 4516 arg0: Type, 4517 arg1: Reg, 4518 arg2: &MemArg, 4519 ) -> Option<Reg> { 4520 let pattern0_0 = arg0; 4521 let pattern1_0 = arg1; 4522 let pattern2_0 = arg2; 4523 // Rule at src/isa/s390x/inst.isle line 2312. 4524 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 4525 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4526 return Some(expr1_0); 4527 } 4528 4529 // Generated as internal constructor for term add_mem_sext16. 4530 pub fn constructor_add_mem_sext16<C: Context>( 4531 ctx: &mut C, 4532 arg0: Type, 4533 arg1: Reg, 4534 arg2: &MemArg, 4535 ) -> Option<Reg> { 4536 let pattern0_0 = arg0; 4537 let pattern1_0 = arg1; 4538 let pattern2_0 = arg2; 4539 // Rule at src/isa/s390x/inst.isle line 2315. 4540 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 4541 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4542 return Some(expr1_0); 4543 } 4544 4545 // Generated as internal constructor for term add_mem_sext32. 4546 pub fn constructor_add_mem_sext32<C: Context>( 4547 ctx: &mut C, 4548 arg0: Type, 4549 arg1: Reg, 4550 arg2: &MemArg, 4551 ) -> Option<Reg> { 4552 let pattern0_0 = arg0; 4553 let pattern1_0 = arg1; 4554 let pattern2_0 = arg2; 4555 // Rule at src/isa/s390x/inst.isle line 2318. 4556 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 4557 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4558 return Some(expr1_0); 4559 } 4560 4561 // Generated as internal constructor for term aluop_add_logical. 4562 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4563 let pattern0_0 = arg0; 4564 if pattern0_0 == I32 { 4565 // Rule at src/isa/s390x/inst.isle line 2324. 4566 let expr0_0 = ALUOp::AddLogical32; 4567 return Some(expr0_0); 4568 } 4569 if pattern0_0 == I64 { 4570 // Rule at src/isa/s390x/inst.isle line 2325. 4571 let expr0_0 = ALUOp::AddLogical64; 4572 return Some(expr0_0); 4573 } 4574 return None; 4575 } 4576 4577 // Generated as internal constructor for term aluop_add_logical_zext32. 4578 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4579 let pattern0_0 = arg0; 4580 if pattern0_0 == I64 { 4581 // Rule at src/isa/s390x/inst.isle line 2328. 4582 let expr0_0 = ALUOp::AddLogical64Ext32; 4583 return Some(expr0_0); 4584 } 4585 return None; 4586 } 4587 4588 // Generated as internal constructor for term add_logical_reg. 4589 pub fn constructor_add_logical_reg<C: Context>( 4590 ctx: &mut C, 4591 arg0: Type, 4592 arg1: Reg, 4593 arg2: Reg, 4594 ) -> Option<Reg> { 4595 let pattern0_0 = arg0; 4596 let pattern1_0 = arg1; 4597 let pattern2_0 = arg2; 4598 // Rule at src/isa/s390x/inst.isle line 2331. 4599 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 4600 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4601 return Some(expr1_0); 4602 } 4603 4604 // Generated as internal constructor for term add_logical_reg_zext32. 4605 pub fn constructor_add_logical_reg_zext32<C: Context>( 4606 ctx: &mut C, 4607 arg0: Type, 4608 arg1: Reg, 4609 arg2: Reg, 4610 ) -> Option<Reg> { 4611 let pattern0_0 = arg0; 4612 let pattern1_0 = arg1; 4613 let pattern2_0 = arg2; 4614 // Rule at src/isa/s390x/inst.isle line 2334. 4615 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 4616 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4617 return Some(expr1_0); 4618 } 4619 4620 // Generated as internal constructor for term add_logical_zimm32. 4621 pub fn constructor_add_logical_zimm32<C: Context>( 4622 ctx: &mut C, 4623 arg0: Type, 4624 arg1: Reg, 4625 arg2: u32, 4626 ) -> Option<Reg> { 4627 let pattern0_0 = arg0; 4628 let pattern1_0 = arg1; 4629 let pattern2_0 = arg2; 4630 // Rule at src/isa/s390x/inst.isle line 2337. 4631 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 4632 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4633 return Some(expr1_0); 4634 } 4635 4636 // Generated as internal constructor for term add_logical_mem. 4637 pub fn constructor_add_logical_mem<C: Context>( 4638 ctx: &mut C, 4639 arg0: Type, 4640 arg1: Reg, 4641 arg2: &MemArg, 4642 ) -> Option<Reg> { 4643 let pattern0_0 = arg0; 4644 let pattern1_0 = arg1; 4645 let pattern2_0 = arg2; 4646 // Rule at src/isa/s390x/inst.isle line 2340. 4647 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 4648 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4649 return Some(expr1_0); 4650 } 4651 4652 // Generated as internal constructor for term add_logical_mem_zext32. 4653 pub fn constructor_add_logical_mem_zext32<C: Context>( 4654 ctx: &mut C, 4655 arg0: Type, 4656 arg1: Reg, 4657 arg2: &MemArg, 4658 ) -> Option<Reg> { 4659 let pattern0_0 = arg0; 4660 let pattern1_0 = arg1; 4661 let pattern2_0 = arg2; 4662 // Rule at src/isa/s390x/inst.isle line 2343. 4663 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 4664 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4665 return Some(expr1_0); 4666 } 4667 4668 // Generated as internal constructor for term aluop_sub. 4669 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4670 let pattern0_0 = arg0; 4671 if pattern0_0 == I8 { 4672 // Rule at src/isa/s390x/inst.isle line 2349. 4673 let expr0_0 = ALUOp::Sub32; 4674 return Some(expr0_0); 4675 } 4676 if pattern0_0 == I16 { 4677 // Rule at src/isa/s390x/inst.isle line 2350. 4678 let expr0_0 = ALUOp::Sub32; 4679 return Some(expr0_0); 4680 } 4681 if pattern0_0 == I32 { 4682 // Rule at src/isa/s390x/inst.isle line 2351. 4683 let expr0_0 = ALUOp::Sub32; 4684 return Some(expr0_0); 4685 } 4686 if pattern0_0 == I64 { 4687 // Rule at src/isa/s390x/inst.isle line 2352. 4688 let expr0_0 = ALUOp::Sub64; 4689 return Some(expr0_0); 4690 } 4691 return None; 4692 } 4693 4694 // Generated as internal constructor for term aluop_sub_sext16. 4695 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4696 let pattern0_0 = arg0; 4697 if pattern0_0 == I16 { 4698 // Rule at src/isa/s390x/inst.isle line 2355. 4699 let expr0_0 = ALUOp::Sub32Ext16; 4700 return Some(expr0_0); 4701 } 4702 if pattern0_0 == I32 { 4703 // Rule at src/isa/s390x/inst.isle line 2356. 4704 let expr0_0 = ALUOp::Sub32Ext16; 4705 return Some(expr0_0); 4706 } 4707 if pattern0_0 == I64 { 4708 // Rule at src/isa/s390x/inst.isle line 2357. 4709 let expr0_0 = ALUOp::Sub64Ext16; 4710 return Some(expr0_0); 4711 } 4712 return None; 4713 } 4714 4715 // Generated as internal constructor for term aluop_sub_sext32. 4716 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4717 let pattern0_0 = arg0; 4718 if pattern0_0 == I64 { 4719 // Rule at src/isa/s390x/inst.isle line 2360. 4720 let expr0_0 = ALUOp::Sub64Ext32; 4721 return Some(expr0_0); 4722 } 4723 return None; 4724 } 4725 4726 // Generated as internal constructor for term sub_reg. 4727 pub fn constructor_sub_reg<C: Context>( 4728 ctx: &mut C, 4729 arg0: Type, 4730 arg1: Reg, 4731 arg2: Reg, 4732 ) -> Option<Reg> { 4733 let pattern0_0 = arg0; 4734 let pattern1_0 = arg1; 4735 let pattern2_0 = arg2; 4736 // Rule at src/isa/s390x/inst.isle line 2363. 4737 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 4738 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4739 return Some(expr1_0); 4740 } 4741 4742 // Generated as internal constructor for term sub_reg_sext32. 4743 pub fn constructor_sub_reg_sext32<C: Context>( 4744 ctx: &mut C, 4745 arg0: Type, 4746 arg1: Reg, 4747 arg2: Reg, 4748 ) -> Option<Reg> { 4749 let pattern0_0 = arg0; 4750 let pattern1_0 = arg1; 4751 let pattern2_0 = arg2; 4752 // Rule at src/isa/s390x/inst.isle line 2366. 4753 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 4754 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4755 return Some(expr1_0); 4756 } 4757 4758 // Generated as internal constructor for term sub_mem. 4759 pub fn constructor_sub_mem<C: Context>( 4760 ctx: &mut C, 4761 arg0: Type, 4762 arg1: Reg, 4763 arg2: &MemArg, 4764 ) -> Option<Reg> { 4765 let pattern0_0 = arg0; 4766 let pattern1_0 = arg1; 4767 let pattern2_0 = arg2; 4768 // Rule at src/isa/s390x/inst.isle line 2369. 4769 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 4770 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4771 return Some(expr1_0); 4772 } 4773 4774 // Generated as internal constructor for term sub_mem_sext16. 4775 pub fn constructor_sub_mem_sext16<C: Context>( 4776 ctx: &mut C, 4777 arg0: Type, 4778 arg1: Reg, 4779 arg2: &MemArg, 4780 ) -> Option<Reg> { 4781 let pattern0_0 = arg0; 4782 let pattern1_0 = arg1; 4783 let pattern2_0 = arg2; 4784 // Rule at src/isa/s390x/inst.isle line 2372. 4785 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 4786 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4787 return Some(expr1_0); 4788 } 4789 4790 // Generated as internal constructor for term sub_mem_sext32. 4791 pub fn constructor_sub_mem_sext32<C: Context>( 4792 ctx: &mut C, 4793 arg0: Type, 4794 arg1: Reg, 4795 arg2: &MemArg, 4796 ) -> Option<Reg> { 4797 let pattern0_0 = arg0; 4798 let pattern1_0 = arg1; 4799 let pattern2_0 = arg2; 4800 // Rule at src/isa/s390x/inst.isle line 2375. 4801 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 4802 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4803 return Some(expr1_0); 4804 } 4805 4806 // Generated as internal constructor for term aluop_sub_logical. 4807 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4808 let pattern0_0 = arg0; 4809 if pattern0_0 == I32 { 4810 // Rule at src/isa/s390x/inst.isle line 2381. 4811 let expr0_0 = ALUOp::SubLogical32; 4812 return Some(expr0_0); 4813 } 4814 if pattern0_0 == I64 { 4815 // Rule at src/isa/s390x/inst.isle line 2382. 4816 let expr0_0 = ALUOp::SubLogical64; 4817 return Some(expr0_0); 4818 } 4819 return None; 4820 } 4821 4822 // Generated as internal constructor for term aluop_sub_logical_zext32. 4823 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4824 let pattern0_0 = arg0; 4825 if pattern0_0 == I64 { 4826 // Rule at src/isa/s390x/inst.isle line 2385. 4827 let expr0_0 = ALUOp::SubLogical64Ext32; 4828 return Some(expr0_0); 4829 } 4830 return None; 4831 } 4832 4833 // Generated as internal constructor for term sub_logical_reg. 4834 pub fn constructor_sub_logical_reg<C: Context>( 4835 ctx: &mut C, 4836 arg0: Type, 4837 arg1: Reg, 4838 arg2: Reg, 4839 ) -> Option<Reg> { 4840 let pattern0_0 = arg0; 4841 let pattern1_0 = arg1; 4842 let pattern2_0 = arg2; 4843 // Rule at src/isa/s390x/inst.isle line 2388. 4844 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 4845 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4846 return Some(expr1_0); 4847 } 4848 4849 // Generated as internal constructor for term sub_logical_reg_zext32. 4850 pub fn constructor_sub_logical_reg_zext32<C: Context>( 4851 ctx: &mut C, 4852 arg0: Type, 4853 arg1: Reg, 4854 arg2: Reg, 4855 ) -> Option<Reg> { 4856 let pattern0_0 = arg0; 4857 let pattern1_0 = arg1; 4858 let pattern2_0 = arg2; 4859 // Rule at src/isa/s390x/inst.isle line 2391. 4860 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 4861 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4862 return Some(expr1_0); 4863 } 4864 4865 // Generated as internal constructor for term sub_logical_zimm32. 4866 pub fn constructor_sub_logical_zimm32<C: Context>( 4867 ctx: &mut C, 4868 arg0: Type, 4869 arg1: Reg, 4870 arg2: u32, 4871 ) -> Option<Reg> { 4872 let pattern0_0 = arg0; 4873 let pattern1_0 = arg1; 4874 let pattern2_0 = arg2; 4875 // Rule at src/isa/s390x/inst.isle line 2394. 4876 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 4877 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4878 return Some(expr1_0); 4879 } 4880 4881 // Generated as internal constructor for term sub_logical_mem. 4882 pub fn constructor_sub_logical_mem<C: Context>( 4883 ctx: &mut C, 4884 arg0: Type, 4885 arg1: Reg, 4886 arg2: &MemArg, 4887 ) -> Option<Reg> { 4888 let pattern0_0 = arg0; 4889 let pattern1_0 = arg1; 4890 let pattern2_0 = arg2; 4891 // Rule at src/isa/s390x/inst.isle line 2397. 4892 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 4893 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4894 return Some(expr1_0); 4895 } 4896 4897 // Generated as internal constructor for term sub_logical_mem_zext32. 4898 pub fn constructor_sub_logical_mem_zext32<C: Context>( 4899 ctx: &mut C, 4900 arg0: Type, 4901 arg1: Reg, 4902 arg2: &MemArg, 4903 ) -> Option<Reg> { 4904 let pattern0_0 = arg0; 4905 let pattern1_0 = arg1; 4906 let pattern2_0 = arg2; 4907 // Rule at src/isa/s390x/inst.isle line 2400. 4908 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 4909 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4910 return Some(expr1_0); 4911 } 4912 4913 // Generated as internal constructor for term aluop_mul. 4914 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4915 let pattern0_0 = arg0; 4916 if pattern0_0 == I8 { 4917 // Rule at src/isa/s390x/inst.isle line 2406. 4918 let expr0_0 = ALUOp::Mul32; 4919 return Some(expr0_0); 4920 } 4921 if pattern0_0 == I16 { 4922 // Rule at src/isa/s390x/inst.isle line 2407. 4923 let expr0_0 = ALUOp::Mul32; 4924 return Some(expr0_0); 4925 } 4926 if pattern0_0 == I32 { 4927 // Rule at src/isa/s390x/inst.isle line 2408. 4928 let expr0_0 = ALUOp::Mul32; 4929 return Some(expr0_0); 4930 } 4931 if pattern0_0 == I64 { 4932 // Rule at src/isa/s390x/inst.isle line 2409. 4933 let expr0_0 = ALUOp::Mul64; 4934 return Some(expr0_0); 4935 } 4936 return None; 4937 } 4938 4939 // Generated as internal constructor for term aluop_mul_sext16. 4940 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4941 let pattern0_0 = arg0; 4942 if pattern0_0 == I16 { 4943 // Rule at src/isa/s390x/inst.isle line 2412. 4944 let expr0_0 = ALUOp::Mul32Ext16; 4945 return Some(expr0_0); 4946 } 4947 if pattern0_0 == I32 { 4948 // Rule at src/isa/s390x/inst.isle line 2413. 4949 let expr0_0 = ALUOp::Mul32Ext16; 4950 return Some(expr0_0); 4951 } 4952 if pattern0_0 == I64 { 4953 // Rule at src/isa/s390x/inst.isle line 2414. 4954 let expr0_0 = ALUOp::Mul64Ext16; 4955 return Some(expr0_0); 4956 } 4957 return None; 4958 } 4959 4960 // Generated as internal constructor for term aluop_mul_sext32. 4961 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 4962 let pattern0_0 = arg0; 4963 if pattern0_0 == I64 { 4964 // Rule at src/isa/s390x/inst.isle line 2417. 4965 let expr0_0 = ALUOp::Mul64Ext32; 4966 return Some(expr0_0); 4967 } 4968 return None; 4969 } 4970 4971 // Generated as internal constructor for term mul_reg. 4972 pub fn constructor_mul_reg<C: Context>( 4973 ctx: &mut C, 4974 arg0: Type, 4975 arg1: Reg, 4976 arg2: Reg, 4977 ) -> Option<Reg> { 4978 let pattern0_0 = arg0; 4979 let pattern1_0 = arg1; 4980 let pattern2_0 = arg2; 4981 // Rule at src/isa/s390x/inst.isle line 2420. 4982 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 4983 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 4984 return Some(expr1_0); 4985 } 4986 4987 // Generated as internal constructor for term mul_reg_sext32. 4988 pub fn constructor_mul_reg_sext32<C: Context>( 4989 ctx: &mut C, 4990 arg0: Type, 4991 arg1: Reg, 4992 arg2: Reg, 4993 ) -> Option<Reg> { 4994 let pattern0_0 = arg0; 4995 let pattern1_0 = arg1; 4996 let pattern2_0 = arg2; 4997 // Rule at src/isa/s390x/inst.isle line 2423. 4998 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 4999 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5000 return Some(expr1_0); 5001 } 5002 5003 // Generated as internal constructor for term mul_simm16. 5004 pub fn constructor_mul_simm16<C: Context>( 5005 ctx: &mut C, 5006 arg0: Type, 5007 arg1: Reg, 5008 arg2: i16, 5009 ) -> Option<Reg> { 5010 let pattern0_0 = arg0; 5011 let pattern1_0 = arg1; 5012 let pattern2_0 = arg2; 5013 // Rule at src/isa/s390x/inst.isle line 2426. 5014 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5015 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5016 return Some(expr1_0); 5017 } 5018 5019 // Generated as internal constructor for term mul_simm32. 5020 pub fn constructor_mul_simm32<C: Context>( 5021 ctx: &mut C, 5022 arg0: Type, 5023 arg1: Reg, 5024 arg2: i32, 5025 ) -> Option<Reg> { 5026 let pattern0_0 = arg0; 5027 let pattern1_0 = arg1; 5028 let pattern2_0 = arg2; 5029 // Rule at src/isa/s390x/inst.isle line 2429. 5030 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5031 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5032 return Some(expr1_0); 5033 } 5034 5035 // Generated as internal constructor for term mul_mem. 5036 pub fn constructor_mul_mem<C: Context>( 5037 ctx: &mut C, 5038 arg0: Type, 5039 arg1: Reg, 5040 arg2: &MemArg, 5041 ) -> Option<Reg> { 5042 let pattern0_0 = arg0; 5043 let pattern1_0 = arg1; 5044 let pattern2_0 = arg2; 5045 // Rule at src/isa/s390x/inst.isle line 2432. 5046 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5047 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5048 return Some(expr1_0); 5049 } 5050 5051 // Generated as internal constructor for term mul_mem_sext16. 5052 pub fn constructor_mul_mem_sext16<C: Context>( 5053 ctx: &mut C, 5054 arg0: Type, 5055 arg1: Reg, 5056 arg2: &MemArg, 5057 ) -> Option<Reg> { 5058 let pattern0_0 = arg0; 5059 let pattern1_0 = arg1; 5060 let pattern2_0 = arg2; 5061 // Rule at src/isa/s390x/inst.isle line 2435. 5062 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5063 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5064 return Some(expr1_0); 5065 } 5066 5067 // Generated as internal constructor for term mul_mem_sext32. 5068 pub fn constructor_mul_mem_sext32<C: Context>( 5069 ctx: &mut C, 5070 arg0: Type, 5071 arg1: Reg, 5072 arg2: &MemArg, 5073 ) -> Option<Reg> { 5074 let pattern0_0 = arg0; 5075 let pattern1_0 = arg1; 5076 let pattern2_0 = arg2; 5077 // Rule at src/isa/s390x/inst.isle line 2438. 5078 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5079 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5080 return Some(expr1_0); 5081 } 5082 5083 // Generated as internal constructor for term udivmod. 5084 pub fn constructor_udivmod<C: Context>( 5085 ctx: &mut C, 5086 arg0: Type, 5087 arg1: &RegPair, 5088 arg2: Reg, 5089 ) -> Option<RegPair> { 5090 let pattern0_0 = arg0; 5091 if pattern0_0 == I32 { 5092 let pattern2_0 = arg1; 5093 let pattern3_0 = arg2; 5094 // Rule at src/isa/s390x/inst.isle line 2444. 5095 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5096 return Some(expr0_0); 5097 } 5098 if pattern0_0 == I64 { 5099 let pattern2_0 = arg1; 5100 let pattern3_0 = arg2; 5101 // Rule at src/isa/s390x/inst.isle line 2445. 5102 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5103 return Some(expr0_0); 5104 } 5105 return None; 5106 } 5107 5108 // Generated as internal constructor for term sdivmod. 5109 pub fn constructor_sdivmod<C: Context>( 5110 ctx: &mut C, 5111 arg0: Type, 5112 arg1: &RegPair, 5113 arg2: Reg, 5114 ) -> Option<RegPair> { 5115 let pattern0_0 = arg0; 5116 if pattern0_0 == I32 { 5117 let pattern2_0 = arg1; 5118 let pattern3_0 = arg2; 5119 // Rule at src/isa/s390x/inst.isle line 2451. 5120 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5121 return Some(expr0_0); 5122 } 5123 if pattern0_0 == I64 { 5124 let pattern2_0 = arg1; 5125 let pattern3_0 = arg2; 5126 // Rule at src/isa/s390x/inst.isle line 2452. 5127 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5128 return Some(expr0_0); 5129 } 5130 return None; 5131 } 5132 5133 // Generated as internal constructor for term aluop_and. 5134 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5135 let pattern0_0 = arg0; 5136 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5137 // Rule at src/isa/s390x/inst.isle line 2458. 5138 let expr0_0 = ALUOp::And32; 5139 return Some(expr0_0); 5140 } 5141 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5142 // Rule at src/isa/s390x/inst.isle line 2459. 5143 let expr0_0 = ALUOp::And64; 5144 return Some(expr0_0); 5145 } 5146 return None; 5147 } 5148 5149 // Generated as internal constructor for term and_reg. 5150 pub fn constructor_and_reg<C: Context>( 5151 ctx: &mut C, 5152 arg0: Type, 5153 arg1: Reg, 5154 arg2: Reg, 5155 ) -> Option<Reg> { 5156 let pattern0_0 = arg0; 5157 let pattern1_0 = arg1; 5158 let pattern2_0 = arg2; 5159 // Rule at src/isa/s390x/inst.isle line 2462. 5160 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5161 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5162 return Some(expr1_0); 5163 } 5164 5165 // Generated as internal constructor for term and_uimm16shifted. 5166 pub fn constructor_and_uimm16shifted<C: Context>( 5167 ctx: &mut C, 5168 arg0: Type, 5169 arg1: Reg, 5170 arg2: UImm16Shifted, 5171 ) -> Option<Reg> { 5172 let pattern0_0 = arg0; 5173 let pattern1_0 = arg1; 5174 let pattern2_0 = arg2; 5175 // Rule at src/isa/s390x/inst.isle line 2465. 5176 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5177 let expr1_0 = 5178 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5179 return Some(expr1_0); 5180 } 5181 5182 // Generated as internal constructor for term and_uimm32shifted. 5183 pub fn constructor_and_uimm32shifted<C: Context>( 5184 ctx: &mut C, 5185 arg0: Type, 5186 arg1: Reg, 5187 arg2: UImm32Shifted, 5188 ) -> Option<Reg> { 5189 let pattern0_0 = arg0; 5190 let pattern1_0 = arg1; 5191 let pattern2_0 = arg2; 5192 // Rule at src/isa/s390x/inst.isle line 2468. 5193 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5194 let expr1_0 = 5195 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5196 return Some(expr1_0); 5197 } 5198 5199 // Generated as internal constructor for term and_mem. 5200 pub fn constructor_and_mem<C: Context>( 5201 ctx: &mut C, 5202 arg0: Type, 5203 arg1: Reg, 5204 arg2: &MemArg, 5205 ) -> Option<Reg> { 5206 let pattern0_0 = arg0; 5207 let pattern1_0 = arg1; 5208 let pattern2_0 = arg2; 5209 // Rule at src/isa/s390x/inst.isle line 2471. 5210 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5211 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5212 return Some(expr1_0); 5213 } 5214 5215 // Generated as internal constructor for term aluop_or. 5216 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5217 let pattern0_0 = arg0; 5218 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5219 // Rule at src/isa/s390x/inst.isle line 2477. 5220 let expr0_0 = ALUOp::Orr32; 5221 return Some(expr0_0); 5222 } 5223 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5224 // Rule at src/isa/s390x/inst.isle line 2478. 5225 let expr0_0 = ALUOp::Orr64; 5226 return Some(expr0_0); 5227 } 5228 return None; 5229 } 5230 5231 // Generated as internal constructor for term or_reg. 5232 pub fn constructor_or_reg<C: Context>( 5233 ctx: &mut C, 5234 arg0: Type, 5235 arg1: Reg, 5236 arg2: Reg, 5237 ) -> Option<Reg> { 5238 let pattern0_0 = arg0; 5239 let pattern1_0 = arg1; 5240 let pattern2_0 = arg2; 5241 // Rule at src/isa/s390x/inst.isle line 2481. 5242 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5243 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5244 return Some(expr1_0); 5245 } 5246 5247 // Generated as internal constructor for term or_uimm16shifted. 5248 pub fn constructor_or_uimm16shifted<C: Context>( 5249 ctx: &mut C, 5250 arg0: Type, 5251 arg1: Reg, 5252 arg2: UImm16Shifted, 5253 ) -> Option<Reg> { 5254 let pattern0_0 = arg0; 5255 let pattern1_0 = arg1; 5256 let pattern2_0 = arg2; 5257 // Rule at src/isa/s390x/inst.isle line 2484. 5258 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5259 let expr1_0 = 5260 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5261 return Some(expr1_0); 5262 } 5263 5264 // Generated as internal constructor for term or_uimm32shifted. 5265 pub fn constructor_or_uimm32shifted<C: Context>( 5266 ctx: &mut C, 5267 arg0: Type, 5268 arg1: Reg, 5269 arg2: UImm32Shifted, 5270 ) -> Option<Reg> { 5271 let pattern0_0 = arg0; 5272 let pattern1_0 = arg1; 5273 let pattern2_0 = arg2; 5274 // Rule at src/isa/s390x/inst.isle line 2487. 5275 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5276 let expr1_0 = 5277 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5278 return Some(expr1_0); 5279 } 5280 5281 // Generated as internal constructor for term or_mem. 5282 pub fn constructor_or_mem<C: Context>( 5283 ctx: &mut C, 5284 arg0: Type, 5285 arg1: Reg, 5286 arg2: &MemArg, 5287 ) -> Option<Reg> { 5288 let pattern0_0 = arg0; 5289 let pattern1_0 = arg1; 5290 let pattern2_0 = arg2; 5291 // Rule at src/isa/s390x/inst.isle line 2490. 5292 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5293 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5294 return Some(expr1_0); 5295 } 5296 5297 // Generated as internal constructor for term aluop_xor. 5298 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5299 let pattern0_0 = arg0; 5300 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5301 // Rule at src/isa/s390x/inst.isle line 2496. 5302 let expr0_0 = ALUOp::Xor32; 5303 return Some(expr0_0); 5304 } 5305 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5306 // Rule at src/isa/s390x/inst.isle line 2497. 5307 let expr0_0 = ALUOp::Xor64; 5308 return Some(expr0_0); 5309 } 5310 return None; 5311 } 5312 5313 // Generated as internal constructor for term xor_reg. 5314 pub fn constructor_xor_reg<C: Context>( 5315 ctx: &mut C, 5316 arg0: Type, 5317 arg1: Reg, 5318 arg2: Reg, 5319 ) -> Option<Reg> { 5320 let pattern0_0 = arg0; 5321 let pattern1_0 = arg1; 5322 let pattern2_0 = arg2; 5323 // Rule at src/isa/s390x/inst.isle line 2500. 5324 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 5325 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5326 return Some(expr1_0); 5327 } 5328 5329 // Generated as internal constructor for term xor_uimm32shifted. 5330 pub fn constructor_xor_uimm32shifted<C: Context>( 5331 ctx: &mut C, 5332 arg0: Type, 5333 arg1: Reg, 5334 arg2: UImm32Shifted, 5335 ) -> Option<Reg> { 5336 let pattern0_0 = arg0; 5337 let pattern1_0 = arg1; 5338 let pattern2_0 = arg2; 5339 // Rule at src/isa/s390x/inst.isle line 2503. 5340 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 5341 let expr1_0 = 5342 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5343 return Some(expr1_0); 5344 } 5345 5346 // Generated as internal constructor for term xor_mem. 5347 pub fn constructor_xor_mem<C: Context>( 5348 ctx: &mut C, 5349 arg0: Type, 5350 arg1: Reg, 5351 arg2: &MemArg, 5352 ) -> Option<Reg> { 5353 let pattern0_0 = arg0; 5354 let pattern1_0 = arg1; 5355 let pattern2_0 = arg2; 5356 // Rule at src/isa/s390x/inst.isle line 2506. 5357 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 5358 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5359 return Some(expr1_0); 5360 } 5361 5362 // Generated as internal constructor for term not_reg. 5363 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 5364 let pattern0_0 = arg0; 5365 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5366 let pattern2_0 = arg1; 5367 // Rule at src/isa/s390x/inst.isle line 2512. 5368 let expr0_0: u32 = 4294967295; 5369 let expr1_0: u8 = 0; 5370 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 5371 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 5372 return Some(expr3_0); 5373 } 5374 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5375 let pattern2_0 = arg1; 5376 // Rule at src/isa/s390x/inst.isle line 2514. 5377 let expr0_0: u32 = 4294967295; 5378 let expr1_0: u8 = 0; 5379 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 5380 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 5381 let expr4_0: u32 = 4294967295; 5382 let expr5_0: u8 = 32; 5383 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 5384 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 5385 return Some(expr7_0); 5386 } 5387 return None; 5388 } 5389 5390 // Generated as internal constructor for term aluop_and_not. 5391 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5392 let pattern0_0 = arg0; 5393 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5394 // Rule at src/isa/s390x/inst.isle line 2523. 5395 let expr0_0 = ALUOp::AndNot32; 5396 return Some(expr0_0); 5397 } 5398 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5399 // Rule at src/isa/s390x/inst.isle line 2524. 5400 let expr0_0 = ALUOp::AndNot64; 5401 return Some(expr0_0); 5402 } 5403 return None; 5404 } 5405 5406 // Generated as internal constructor for term and_not_reg. 5407 pub fn constructor_and_not_reg<C: Context>( 5408 ctx: &mut C, 5409 arg0: Type, 5410 arg1: Reg, 5411 arg2: Reg, 5412 ) -> Option<Reg> { 5413 let pattern0_0 = arg0; 5414 let pattern1_0 = arg1; 5415 let pattern2_0 = arg2; 5416 // Rule at src/isa/s390x/inst.isle line 2527. 5417 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 5418 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5419 return Some(expr1_0); 5420 } 5421 5422 // Generated as internal constructor for term aluop_or_not. 5423 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5424 let pattern0_0 = arg0; 5425 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5426 // Rule at src/isa/s390x/inst.isle line 2533. 5427 let expr0_0 = ALUOp::OrrNot32; 5428 return Some(expr0_0); 5429 } 5430 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5431 // Rule at src/isa/s390x/inst.isle line 2534. 5432 let expr0_0 = ALUOp::OrrNot64; 5433 return Some(expr0_0); 5434 } 5435 return None; 5436 } 5437 5438 // Generated as internal constructor for term or_not_reg. 5439 pub fn constructor_or_not_reg<C: Context>( 5440 ctx: &mut C, 5441 arg0: Type, 5442 arg1: Reg, 5443 arg2: Reg, 5444 ) -> Option<Reg> { 5445 let pattern0_0 = arg0; 5446 let pattern1_0 = arg1; 5447 let pattern2_0 = arg2; 5448 // Rule at src/isa/s390x/inst.isle line 2537. 5449 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 5450 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5451 return Some(expr1_0); 5452 } 5453 5454 // Generated as internal constructor for term aluop_xor_not. 5455 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5456 let pattern0_0 = arg0; 5457 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5458 // Rule at src/isa/s390x/inst.isle line 2543. 5459 let expr0_0 = ALUOp::XorNot32; 5460 return Some(expr0_0); 5461 } 5462 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5463 // Rule at src/isa/s390x/inst.isle line 2544. 5464 let expr0_0 = ALUOp::XorNot64; 5465 return Some(expr0_0); 5466 } 5467 return None; 5468 } 5469 5470 // Generated as internal constructor for term xor_not_reg. 5471 pub fn constructor_xor_not_reg<C: Context>( 5472 ctx: &mut C, 5473 arg0: Type, 5474 arg1: Reg, 5475 arg2: Reg, 5476 ) -> Option<Reg> { 5477 let pattern0_0 = arg0; 5478 let pattern1_0 = arg1; 5479 let pattern2_0 = arg2; 5480 // Rule at src/isa/s390x/inst.isle line 2547. 5481 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 5482 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5483 return Some(expr1_0); 5484 } 5485 5486 // Generated as internal constructor for term unaryop_abs. 5487 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 5488 let pattern0_0 = arg0; 5489 if pattern0_0 == I32 { 5490 // Rule at src/isa/s390x/inst.isle line 2553. 5491 let expr0_0 = UnaryOp::Abs32; 5492 return Some(expr0_0); 5493 } 5494 if pattern0_0 == I64 { 5495 // Rule at src/isa/s390x/inst.isle line 2554. 5496 let expr0_0 = UnaryOp::Abs64; 5497 return Some(expr0_0); 5498 } 5499 return None; 5500 } 5501 5502 // Generated as internal constructor for term unaryop_abs_sext32. 5503 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 5504 let pattern0_0 = arg0; 5505 if pattern0_0 == I64 { 5506 // Rule at src/isa/s390x/inst.isle line 2557. 5507 let expr0_0 = UnaryOp::Abs64Ext32; 5508 return Some(expr0_0); 5509 } 5510 return None; 5511 } 5512 5513 // Generated as internal constructor for term abs_reg. 5514 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 5515 let pattern0_0 = arg0; 5516 let pattern1_0 = arg1; 5517 // Rule at src/isa/s390x/inst.isle line 2560. 5518 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 5519 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 5520 return Some(expr1_0); 5521 } 5522 5523 // Generated as internal constructor for term abs_reg_sext32. 5524 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 5525 let pattern0_0 = arg0; 5526 let pattern1_0 = arg1; 5527 // Rule at src/isa/s390x/inst.isle line 2563. 5528 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 5529 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 5530 return Some(expr1_0); 5531 } 5532 5533 // Generated as internal constructor for term unaryop_neg. 5534 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 5535 let pattern0_0 = arg0; 5536 if pattern0_0 == I8 { 5537 // Rule at src/isa/s390x/inst.isle line 2569. 5538 let expr0_0 = UnaryOp::Neg32; 5539 return Some(expr0_0); 5540 } 5541 if pattern0_0 == I16 { 5542 // Rule at src/isa/s390x/inst.isle line 2570. 5543 let expr0_0 = UnaryOp::Neg32; 5544 return Some(expr0_0); 5545 } 5546 if pattern0_0 == I32 { 5547 // Rule at src/isa/s390x/inst.isle line 2571. 5548 let expr0_0 = UnaryOp::Neg32; 5549 return Some(expr0_0); 5550 } 5551 if pattern0_0 == I64 { 5552 // Rule at src/isa/s390x/inst.isle line 2572. 5553 let expr0_0 = UnaryOp::Neg64; 5554 return Some(expr0_0); 5555 } 5556 return None; 5557 } 5558 5559 // Generated as internal constructor for term unaryop_neg_sext32. 5560 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 5561 let pattern0_0 = arg0; 5562 if pattern0_0 == I64 { 5563 // Rule at src/isa/s390x/inst.isle line 2575. 5564 let expr0_0 = UnaryOp::Neg64Ext32; 5565 return Some(expr0_0); 5566 } 5567 return None; 5568 } 5569 5570 // Generated as internal constructor for term neg_reg. 5571 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 5572 let pattern0_0 = arg0; 5573 let pattern1_0 = arg1; 5574 // Rule at src/isa/s390x/inst.isle line 2578. 5575 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 5576 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 5577 return Some(expr1_0); 5578 } 5579 5580 // Generated as internal constructor for term neg_reg_sext32. 5581 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 5582 let pattern0_0 = arg0; 5583 let pattern1_0 = arg1; 5584 // Rule at src/isa/s390x/inst.isle line 2581. 5585 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 5586 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 5587 return Some(expr1_0); 5588 } 5589 5590 // Generated as internal constructor for term shiftop_rot. 5591 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 5592 let pattern0_0 = arg0; 5593 if pattern0_0 == I32 { 5594 // Rule at src/isa/s390x/inst.isle line 2587. 5595 let expr0_0 = ShiftOp::RotL32; 5596 return Some(expr0_0); 5597 } 5598 if pattern0_0 == I64 { 5599 // Rule at src/isa/s390x/inst.isle line 2588. 5600 let expr0_0 = ShiftOp::RotL64; 5601 return Some(expr0_0); 5602 } 5603 return None; 5604 } 5605 5606 // Generated as internal constructor for term rot_reg. 5607 pub fn constructor_rot_reg<C: Context>( 5608 ctx: &mut C, 5609 arg0: Type, 5610 arg1: Reg, 5611 arg2: Reg, 5612 ) -> Option<Reg> { 5613 let pattern0_0 = arg0; 5614 let pattern1_0 = arg1; 5615 let pattern2_0 = arg2; 5616 // Rule at src/isa/s390x/inst.isle line 2591. 5617 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 5618 let expr1_0: u8 = 0; 5619 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 5620 return Some(expr2_0); 5621 } 5622 5623 // Generated as internal constructor for term rot_imm. 5624 pub fn constructor_rot_imm<C: Context>( 5625 ctx: &mut C, 5626 arg0: Type, 5627 arg1: Reg, 5628 arg2: u8, 5629 ) -> Option<Reg> { 5630 let pattern0_0 = arg0; 5631 let pattern1_0 = arg1; 5632 let pattern2_0 = arg2; 5633 // Rule at src/isa/s390x/inst.isle line 2595. 5634 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 5635 let expr1_0 = C::zero_reg(ctx); 5636 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 5637 return Some(expr2_0); 5638 } 5639 5640 // Generated as internal constructor for term shiftop_lshl. 5641 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 5642 let pattern0_0 = arg0; 5643 if pattern0_0 == I8 { 5644 // Rule at src/isa/s390x/inst.isle line 2602. 5645 let expr0_0 = ShiftOp::LShL32; 5646 return Some(expr0_0); 5647 } 5648 if pattern0_0 == I16 { 5649 // Rule at src/isa/s390x/inst.isle line 2603. 5650 let expr0_0 = ShiftOp::LShL32; 5651 return Some(expr0_0); 5652 } 5653 if pattern0_0 == I32 { 5654 // Rule at src/isa/s390x/inst.isle line 2604. 5655 let expr0_0 = ShiftOp::LShL32; 5656 return Some(expr0_0); 5657 } 5658 if pattern0_0 == I64 { 5659 // Rule at src/isa/s390x/inst.isle line 2605. 5660 let expr0_0 = ShiftOp::LShL64; 5661 return Some(expr0_0); 5662 } 5663 return None; 5664 } 5665 5666 // Generated as internal constructor for term lshl_reg. 5667 pub fn constructor_lshl_reg<C: Context>( 5668 ctx: &mut C, 5669 arg0: Type, 5670 arg1: Reg, 5671 arg2: Reg, 5672 ) -> Option<Reg> { 5673 let pattern0_0 = arg0; 5674 let pattern1_0 = arg1; 5675 let pattern2_0 = arg2; 5676 // Rule at src/isa/s390x/inst.isle line 2608. 5677 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 5678 let expr1_0: u8 = 0; 5679 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 5680 return Some(expr2_0); 5681 } 5682 5683 // Generated as internal constructor for term lshl_imm. 5684 pub fn constructor_lshl_imm<C: Context>( 5685 ctx: &mut C, 5686 arg0: Type, 5687 arg1: Reg, 5688 arg2: u8, 5689 ) -> Option<Reg> { 5690 let pattern0_0 = arg0; 5691 let pattern1_0 = arg1; 5692 let pattern2_0 = arg2; 5693 // Rule at src/isa/s390x/inst.isle line 2612. 5694 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 5695 let expr1_0 = C::zero_reg(ctx); 5696 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 5697 return Some(expr2_0); 5698 } 5699 5700 // Generated as internal constructor for term shiftop_lshr. 5701 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 5702 let pattern0_0 = arg0; 5703 if pattern0_0 == I32 { 5704 // Rule at src/isa/s390x/inst.isle line 2619. 5705 let expr0_0 = ShiftOp::LShR32; 5706 return Some(expr0_0); 5707 } 5708 if pattern0_0 == I64 { 5709 // Rule at src/isa/s390x/inst.isle line 2620. 5710 let expr0_0 = ShiftOp::LShR64; 5711 return Some(expr0_0); 5712 } 5713 return None; 5714 } 5715 5716 // Generated as internal constructor for term lshr_reg. 5717 pub fn constructor_lshr_reg<C: Context>( 5718 ctx: &mut C, 5719 arg0: Type, 5720 arg1: Reg, 5721 arg2: Reg, 5722 ) -> Option<Reg> { 5723 let pattern0_0 = arg0; 5724 let pattern1_0 = arg1; 5725 let pattern2_0 = arg2; 5726 // Rule at src/isa/s390x/inst.isle line 2623. 5727 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 5728 let expr1_0: u8 = 0; 5729 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 5730 return Some(expr2_0); 5731 } 5732 5733 // Generated as internal constructor for term lshr_imm. 5734 pub fn constructor_lshr_imm<C: Context>( 5735 ctx: &mut C, 5736 arg0: Type, 5737 arg1: Reg, 5738 arg2: u8, 5739 ) -> Option<Reg> { 5740 let pattern0_0 = arg0; 5741 let pattern1_0 = arg1; 5742 let pattern2_0 = arg2; 5743 // Rule at src/isa/s390x/inst.isle line 2627. 5744 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 5745 let expr1_0 = C::zero_reg(ctx); 5746 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 5747 return Some(expr2_0); 5748 } 5749 5750 // Generated as internal constructor for term shiftop_ashr. 5751 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 5752 let pattern0_0 = arg0; 5753 if pattern0_0 == I32 { 5754 // Rule at src/isa/s390x/inst.isle line 2634. 5755 let expr0_0 = ShiftOp::AShR32; 5756 return Some(expr0_0); 5757 } 5758 if pattern0_0 == I64 { 5759 // Rule at src/isa/s390x/inst.isle line 2635. 5760 let expr0_0 = ShiftOp::AShR64; 5761 return Some(expr0_0); 5762 } 5763 return None; 5764 } 5765 5766 // Generated as internal constructor for term ashr_reg. 5767 pub fn constructor_ashr_reg<C: Context>( 5768 ctx: &mut C, 5769 arg0: Type, 5770 arg1: Reg, 5771 arg2: Reg, 5772 ) -> Option<Reg> { 5773 let pattern0_0 = arg0; 5774 let pattern1_0 = arg1; 5775 let pattern2_0 = arg2; 5776 // Rule at src/isa/s390x/inst.isle line 2638. 5777 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 5778 let expr1_0: u8 = 0; 5779 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 5780 return Some(expr2_0); 5781 } 5782 5783 // Generated as internal constructor for term ashr_imm. 5784 pub fn constructor_ashr_imm<C: Context>( 5785 ctx: &mut C, 5786 arg0: Type, 5787 arg1: Reg, 5788 arg2: u8, 5789 ) -> Option<Reg> { 5790 let pattern0_0 = arg0; 5791 let pattern1_0 = arg1; 5792 let pattern2_0 = arg2; 5793 // Rule at src/isa/s390x/inst.isle line 2642. 5794 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 5795 let expr1_0 = C::zero_reg(ctx); 5796 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 5797 return Some(expr2_0); 5798 } 5799 5800 // Generated as internal constructor for term popcnt_byte. 5801 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 5802 let pattern0_0 = arg0; 5803 // Rule at src/isa/s390x/inst.isle line 2649. 5804 let expr0_0: Type = I64; 5805 let expr1_0 = UnaryOp::PopcntByte; 5806 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 5807 return Some(expr2_0); 5808 } 5809 5810 // Generated as internal constructor for term popcnt_reg. 5811 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 5812 let pattern0_0 = arg0; 5813 // Rule at src/isa/s390x/inst.isle line 2652. 5814 let expr0_0: Type = I64; 5815 let expr1_0 = UnaryOp::PopcntReg; 5816 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 5817 return Some(expr2_0); 5818 } 5819 5820 // Generated as internal constructor for term atomic_rmw_and. 5821 pub fn constructor_atomic_rmw_and<C: Context>( 5822 ctx: &mut C, 5823 arg0: Type, 5824 arg1: Reg, 5825 arg2: &MemArg, 5826 ) -> Option<Reg> { 5827 let pattern0_0 = arg0; 5828 if pattern0_0 == I32 { 5829 let pattern2_0 = arg1; 5830 let pattern3_0 = arg2; 5831 // Rule at src/isa/s390x/inst.isle line 2658. 5832 let expr0_0: Type = I32; 5833 let expr1_0 = ALUOp::And32; 5834 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5835 return Some(expr2_0); 5836 } 5837 if pattern0_0 == I64 { 5838 let pattern2_0 = arg1; 5839 let pattern3_0 = arg2; 5840 // Rule at src/isa/s390x/inst.isle line 2659. 5841 let expr0_0: Type = I64; 5842 let expr1_0 = ALUOp::And64; 5843 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5844 return Some(expr2_0); 5845 } 5846 return None; 5847 } 5848 5849 // Generated as internal constructor for term atomic_rmw_or. 5850 pub fn constructor_atomic_rmw_or<C: Context>( 5851 ctx: &mut C, 5852 arg0: Type, 5853 arg1: Reg, 5854 arg2: &MemArg, 5855 ) -> Option<Reg> { 5856 let pattern0_0 = arg0; 5857 if pattern0_0 == I32 { 5858 let pattern2_0 = arg1; 5859 let pattern3_0 = arg2; 5860 // Rule at src/isa/s390x/inst.isle line 2662. 5861 let expr0_0: Type = I32; 5862 let expr1_0 = ALUOp::Orr32; 5863 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5864 return Some(expr2_0); 5865 } 5866 if pattern0_0 == I64 { 5867 let pattern2_0 = arg1; 5868 let pattern3_0 = arg2; 5869 // Rule at src/isa/s390x/inst.isle line 2663. 5870 let expr0_0: Type = I64; 5871 let expr1_0 = ALUOp::Orr64; 5872 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5873 return Some(expr2_0); 5874 } 5875 return None; 5876 } 5877 5878 // Generated as internal constructor for term atomic_rmw_xor. 5879 pub fn constructor_atomic_rmw_xor<C: Context>( 5880 ctx: &mut C, 5881 arg0: Type, 5882 arg1: Reg, 5883 arg2: &MemArg, 5884 ) -> Option<Reg> { 5885 let pattern0_0 = arg0; 5886 if pattern0_0 == I32 { 5887 let pattern2_0 = arg1; 5888 let pattern3_0 = arg2; 5889 // Rule at src/isa/s390x/inst.isle line 2666. 5890 let expr0_0: Type = I32; 5891 let expr1_0 = ALUOp::Xor32; 5892 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5893 return Some(expr2_0); 5894 } 5895 if pattern0_0 == I64 { 5896 let pattern2_0 = arg1; 5897 let pattern3_0 = arg2; 5898 // Rule at src/isa/s390x/inst.isle line 2667. 5899 let expr0_0: Type = I64; 5900 let expr1_0 = ALUOp::Xor64; 5901 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5902 return Some(expr2_0); 5903 } 5904 return None; 5905 } 5906 5907 // Generated as internal constructor for term atomic_rmw_add. 5908 pub fn constructor_atomic_rmw_add<C: Context>( 5909 ctx: &mut C, 5910 arg0: Type, 5911 arg1: Reg, 5912 arg2: &MemArg, 5913 ) -> Option<Reg> { 5914 let pattern0_0 = arg0; 5915 if pattern0_0 == I32 { 5916 let pattern2_0 = arg1; 5917 let pattern3_0 = arg2; 5918 // Rule at src/isa/s390x/inst.isle line 2670. 5919 let expr0_0: Type = I32; 5920 let expr1_0 = ALUOp::Add32; 5921 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5922 return Some(expr2_0); 5923 } 5924 if pattern0_0 == I64 { 5925 let pattern2_0 = arg1; 5926 let pattern3_0 = arg2; 5927 // Rule at src/isa/s390x/inst.isle line 2671. 5928 let expr0_0: Type = I64; 5929 let expr1_0 = ALUOp::Add64; 5930 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 5931 return Some(expr2_0); 5932 } 5933 return None; 5934 } 5935 5936 // Generated as internal constructor for term fpuop2_add. 5937 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 5938 let pattern0_0 = arg0; 5939 if pattern0_0 == F32 { 5940 // Rule at src/isa/s390x/inst.isle line 2677. 5941 let expr0_0 = FPUOp2::Add32; 5942 return Some(expr0_0); 5943 } 5944 if pattern0_0 == F64 { 5945 // Rule at src/isa/s390x/inst.isle line 2678. 5946 let expr0_0 = FPUOp2::Add64; 5947 return Some(expr0_0); 5948 } 5949 return None; 5950 } 5951 5952 // Generated as internal constructor for term fadd_reg. 5953 pub fn constructor_fadd_reg<C: Context>( 5954 ctx: &mut C, 5955 arg0: Type, 5956 arg1: Reg, 5957 arg2: Reg, 5958 ) -> Option<Reg> { 5959 let pattern0_0 = arg0; 5960 let pattern1_0 = arg1; 5961 let pattern2_0 = arg2; 5962 // Rule at src/isa/s390x/inst.isle line 2681. 5963 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 5964 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5965 return Some(expr1_0); 5966 } 5967 5968 // Generated as internal constructor for term fpuop2_sub. 5969 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 5970 let pattern0_0 = arg0; 5971 if pattern0_0 == F32 { 5972 // Rule at src/isa/s390x/inst.isle line 2687. 5973 let expr0_0 = FPUOp2::Sub32; 5974 return Some(expr0_0); 5975 } 5976 if pattern0_0 == F64 { 5977 // Rule at src/isa/s390x/inst.isle line 2688. 5978 let expr0_0 = FPUOp2::Sub64; 5979 return Some(expr0_0); 5980 } 5981 return None; 5982 } 5983 5984 // Generated as internal constructor for term fsub_reg. 5985 pub fn constructor_fsub_reg<C: Context>( 5986 ctx: &mut C, 5987 arg0: Type, 5988 arg1: Reg, 5989 arg2: Reg, 5990 ) -> Option<Reg> { 5991 let pattern0_0 = arg0; 5992 let pattern1_0 = arg1; 5993 let pattern2_0 = arg2; 5994 // Rule at src/isa/s390x/inst.isle line 2691. 5995 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 5996 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5997 return Some(expr1_0); 5998 } 5999 6000 // Generated as internal constructor for term fpuop2_mul. 6001 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6002 let pattern0_0 = arg0; 6003 if pattern0_0 == F32 { 6004 // Rule at src/isa/s390x/inst.isle line 2697. 6005 let expr0_0 = FPUOp2::Mul32; 6006 return Some(expr0_0); 6007 } 6008 if pattern0_0 == F64 { 6009 // Rule at src/isa/s390x/inst.isle line 2698. 6010 let expr0_0 = FPUOp2::Mul64; 6011 return Some(expr0_0); 6012 } 6013 return None; 6014 } 6015 6016 // Generated as internal constructor for term fmul_reg. 6017 pub fn constructor_fmul_reg<C: Context>( 6018 ctx: &mut C, 6019 arg0: Type, 6020 arg1: Reg, 6021 arg2: Reg, 6022 ) -> Option<Reg> { 6023 let pattern0_0 = arg0; 6024 let pattern1_0 = arg1; 6025 let pattern2_0 = arg2; 6026 // Rule at src/isa/s390x/inst.isle line 2701. 6027 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 6028 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6029 return Some(expr1_0); 6030 } 6031 6032 // Generated as internal constructor for term fpuop2_div. 6033 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6034 let pattern0_0 = arg0; 6035 if pattern0_0 == F32 { 6036 // Rule at src/isa/s390x/inst.isle line 2707. 6037 let expr0_0 = FPUOp2::Div32; 6038 return Some(expr0_0); 6039 } 6040 if pattern0_0 == F64 { 6041 // Rule at src/isa/s390x/inst.isle line 2708. 6042 let expr0_0 = FPUOp2::Div64; 6043 return Some(expr0_0); 6044 } 6045 return None; 6046 } 6047 6048 // Generated as internal constructor for term fdiv_reg. 6049 pub fn constructor_fdiv_reg<C: Context>( 6050 ctx: &mut C, 6051 arg0: Type, 6052 arg1: Reg, 6053 arg2: Reg, 6054 ) -> Option<Reg> { 6055 let pattern0_0 = arg0; 6056 let pattern1_0 = arg1; 6057 let pattern2_0 = arg2; 6058 // Rule at src/isa/s390x/inst.isle line 2711. 6059 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 6060 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6061 return Some(expr1_0); 6062 } 6063 6064 // Generated as internal constructor for term fpuop2_min. 6065 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6066 let pattern0_0 = arg0; 6067 if pattern0_0 == F32 { 6068 // Rule at src/isa/s390x/inst.isle line 2717. 6069 let expr0_0 = FPUOp2::Min32; 6070 return Some(expr0_0); 6071 } 6072 if pattern0_0 == F64 { 6073 // Rule at src/isa/s390x/inst.isle line 2718. 6074 let expr0_0 = FPUOp2::Min64; 6075 return Some(expr0_0); 6076 } 6077 return None; 6078 } 6079 6080 // Generated as internal constructor for term fmin_reg. 6081 pub fn constructor_fmin_reg<C: Context>( 6082 ctx: &mut C, 6083 arg0: Type, 6084 arg1: Reg, 6085 arg2: Reg, 6086 ) -> Option<Reg> { 6087 let pattern0_0 = arg0; 6088 let pattern1_0 = arg1; 6089 let pattern2_0 = arg2; 6090 // Rule at src/isa/s390x/inst.isle line 2721. 6091 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 6092 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6093 return Some(expr1_0); 6094 } 6095 6096 // Generated as internal constructor for term fpuop2_max. 6097 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6098 let pattern0_0 = arg0; 6099 if pattern0_0 == F32 { 6100 // Rule at src/isa/s390x/inst.isle line 2727. 6101 let expr0_0 = FPUOp2::Max32; 6102 return Some(expr0_0); 6103 } 6104 if pattern0_0 == F64 { 6105 // Rule at src/isa/s390x/inst.isle line 2728. 6106 let expr0_0 = FPUOp2::Max64; 6107 return Some(expr0_0); 6108 } 6109 return None; 6110 } 6111 6112 // Generated as internal constructor for term fmax_reg. 6113 pub fn constructor_fmax_reg<C: Context>( 6114 ctx: &mut C, 6115 arg0: Type, 6116 arg1: Reg, 6117 arg2: Reg, 6118 ) -> Option<Reg> { 6119 let pattern0_0 = arg0; 6120 let pattern1_0 = arg1; 6121 let pattern2_0 = arg2; 6122 // Rule at src/isa/s390x/inst.isle line 2731. 6123 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 6124 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6125 return Some(expr1_0); 6126 } 6127 6128 // Generated as internal constructor for term fpuop3_fma. 6129 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 6130 let pattern0_0 = arg0; 6131 if pattern0_0 == F32 { 6132 // Rule at src/isa/s390x/inst.isle line 2737. 6133 let expr0_0 = FPUOp3::MAdd32; 6134 return Some(expr0_0); 6135 } 6136 if pattern0_0 == F64 { 6137 // Rule at src/isa/s390x/inst.isle line 2738. 6138 let expr0_0 = FPUOp3::MAdd64; 6139 return Some(expr0_0); 6140 } 6141 return None; 6142 } 6143 6144 // Generated as internal constructor for term fma_reg. 6145 pub fn constructor_fma_reg<C: Context>( 6146 ctx: &mut C, 6147 arg0: Type, 6148 arg1: Reg, 6149 arg2: Reg, 6150 arg3: Reg, 6151 ) -> Option<Reg> { 6152 let pattern0_0 = arg0; 6153 let pattern1_0 = arg1; 6154 let pattern2_0 = arg2; 6155 let pattern3_0 = arg3; 6156 // Rule at src/isa/s390x/inst.isle line 2741. 6157 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 6158 let expr1_0 = constructor_fpu_rrrr( 6159 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 6160 )?; 6161 return Some(expr1_0); 6162 } 6163 6164 // Generated as internal constructor for term fpuop1_sqrt. 6165 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 6166 let pattern0_0 = arg0; 6167 if pattern0_0 == F32 { 6168 // Rule at src/isa/s390x/inst.isle line 2747. 6169 let expr0_0 = FPUOp1::Sqrt32; 6170 return Some(expr0_0); 6171 } 6172 if pattern0_0 == F64 { 6173 // Rule at src/isa/s390x/inst.isle line 2748. 6174 let expr0_0 = FPUOp1::Sqrt64; 6175 return Some(expr0_0); 6176 } 6177 return None; 6178 } 6179 6180 // Generated as internal constructor for term sqrt_reg. 6181 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6182 let pattern0_0 = arg0; 6183 let pattern1_0 = arg1; 6184 // Rule at src/isa/s390x/inst.isle line 2751. 6185 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 6186 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6187 return Some(expr1_0); 6188 } 6189 6190 // Generated as internal constructor for term fpuop1_neg. 6191 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 6192 let pattern0_0 = arg0; 6193 if pattern0_0 == F32 { 6194 // Rule at src/isa/s390x/inst.isle line 2757. 6195 let expr0_0 = FPUOp1::Neg32; 6196 return Some(expr0_0); 6197 } 6198 if pattern0_0 == F64 { 6199 // Rule at src/isa/s390x/inst.isle line 2758. 6200 let expr0_0 = FPUOp1::Neg64; 6201 return Some(expr0_0); 6202 } 6203 return None; 6204 } 6205 6206 // Generated as internal constructor for term fneg_reg. 6207 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6208 let pattern0_0 = arg0; 6209 let pattern1_0 = arg1; 6210 // Rule at src/isa/s390x/inst.isle line 2761. 6211 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 6212 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6213 return Some(expr1_0); 6214 } 6215 6216 // Generated as internal constructor for term fpuop1_abs. 6217 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 6218 let pattern0_0 = arg0; 6219 if pattern0_0 == F32 { 6220 // Rule at src/isa/s390x/inst.isle line 2767. 6221 let expr0_0 = FPUOp1::Abs32; 6222 return Some(expr0_0); 6223 } 6224 if pattern0_0 == F64 { 6225 // Rule at src/isa/s390x/inst.isle line 2768. 6226 let expr0_0 = FPUOp1::Abs64; 6227 return Some(expr0_0); 6228 } 6229 return None; 6230 } 6231 6232 // Generated as internal constructor for term fabs_reg. 6233 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6234 let pattern0_0 = arg0; 6235 let pattern1_0 = arg1; 6236 // Rule at src/isa/s390x/inst.isle line 2771. 6237 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 6238 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6239 return Some(expr1_0); 6240 } 6241 6242 // Generated as internal constructor for term fpuroundmode_ceil. 6243 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 6244 let pattern0_0 = arg0; 6245 if pattern0_0 == F32 { 6246 // Rule at src/isa/s390x/inst.isle line 2777. 6247 let expr0_0 = FpuRoundMode::Plus32; 6248 return Some(expr0_0); 6249 } 6250 if pattern0_0 == F64 { 6251 // Rule at src/isa/s390x/inst.isle line 2778. 6252 let expr0_0 = FpuRoundMode::Plus64; 6253 return Some(expr0_0); 6254 } 6255 return None; 6256 } 6257 6258 // Generated as internal constructor for term ceil_reg. 6259 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6260 let pattern0_0 = arg0; 6261 let pattern1_0 = arg1; 6262 // Rule at src/isa/s390x/inst.isle line 2781. 6263 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 6264 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6265 return Some(expr1_0); 6266 } 6267 6268 // Generated as internal constructor for term fpuroundmode_floor. 6269 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 6270 let pattern0_0 = arg0; 6271 if pattern0_0 == F32 { 6272 // Rule at src/isa/s390x/inst.isle line 2787. 6273 let expr0_0 = FpuRoundMode::Minus32; 6274 return Some(expr0_0); 6275 } 6276 if pattern0_0 == F64 { 6277 // Rule at src/isa/s390x/inst.isle line 2788. 6278 let expr0_0 = FpuRoundMode::Minus64; 6279 return Some(expr0_0); 6280 } 6281 return None; 6282 } 6283 6284 // Generated as internal constructor for term floor_reg. 6285 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6286 let pattern0_0 = arg0; 6287 let pattern1_0 = arg1; 6288 // Rule at src/isa/s390x/inst.isle line 2791. 6289 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 6290 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6291 return Some(expr1_0); 6292 } 6293 6294 // Generated as internal constructor for term fpuroundmode_trunc. 6295 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 6296 let pattern0_0 = arg0; 6297 if pattern0_0 == F32 { 6298 // Rule at src/isa/s390x/inst.isle line 2797. 6299 let expr0_0 = FpuRoundMode::Zero32; 6300 return Some(expr0_0); 6301 } 6302 if pattern0_0 == F64 { 6303 // Rule at src/isa/s390x/inst.isle line 2798. 6304 let expr0_0 = FpuRoundMode::Zero64; 6305 return Some(expr0_0); 6306 } 6307 return None; 6308 } 6309 6310 // Generated as internal constructor for term trunc_reg. 6311 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6312 let pattern0_0 = arg0; 6313 let pattern1_0 = arg1; 6314 // Rule at src/isa/s390x/inst.isle line 2801. 6315 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 6316 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6317 return Some(expr1_0); 6318 } 6319 6320 // Generated as internal constructor for term fpuroundmode_nearest. 6321 pub fn constructor_fpuroundmode_nearest<C: Context>( 6322 ctx: &mut C, 6323 arg0: Type, 6324 ) -> Option<FpuRoundMode> { 6325 let pattern0_0 = arg0; 6326 if pattern0_0 == F32 { 6327 // Rule at src/isa/s390x/inst.isle line 2807. 6328 let expr0_0 = FpuRoundMode::Nearest32; 6329 return Some(expr0_0); 6330 } 6331 if pattern0_0 == F64 { 6332 // Rule at src/isa/s390x/inst.isle line 2808. 6333 let expr0_0 = FpuRoundMode::Nearest64; 6334 return Some(expr0_0); 6335 } 6336 return None; 6337 } 6338 6339 // Generated as internal constructor for term nearest_reg. 6340 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6341 let pattern0_0 = arg0; 6342 let pattern1_0 = arg1; 6343 // Rule at src/isa/s390x/inst.isle line 2811. 6344 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 6345 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6346 return Some(expr1_0); 6347 } 6348 6349 // Generated as internal constructor for term fpuop1_promote. 6350 pub fn constructor_fpuop1_promote<C: Context>( 6351 ctx: &mut C, 6352 arg0: Type, 6353 arg1: Type, 6354 ) -> Option<FPUOp1> { 6355 let pattern0_0 = arg0; 6356 if pattern0_0 == F64 { 6357 let pattern2_0 = arg1; 6358 if pattern2_0 == F32 { 6359 // Rule at src/isa/s390x/inst.isle line 2817. 6360 let expr0_0 = FPUOp1::Cvt32To64; 6361 return Some(expr0_0); 6362 } 6363 } 6364 return None; 6365 } 6366 6367 // Generated as internal constructor for term fpromote_reg. 6368 pub fn constructor_fpromote_reg<C: Context>( 6369 ctx: &mut C, 6370 arg0: Type, 6371 arg1: Type, 6372 arg2: Reg, 6373 ) -> Option<Reg> { 6374 let pattern0_0 = arg0; 6375 let pattern1_0 = arg1; 6376 let pattern2_0 = arg2; 6377 // Rule at src/isa/s390x/inst.isle line 2820. 6378 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 6379 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6380 return Some(expr1_0); 6381 } 6382 6383 // Generated as internal constructor for term fpuop1_demote. 6384 pub fn constructor_fpuop1_demote<C: Context>( 6385 ctx: &mut C, 6386 arg0: Type, 6387 arg1: Type, 6388 ) -> Option<FPUOp1> { 6389 let pattern0_0 = arg0; 6390 if pattern0_0 == F32 { 6391 let pattern2_0 = arg1; 6392 if pattern2_0 == F64 { 6393 // Rule at src/isa/s390x/inst.isle line 2827. 6394 let expr0_0 = FPUOp1::Cvt64To32; 6395 return Some(expr0_0); 6396 } 6397 } 6398 return None; 6399 } 6400 6401 // Generated as internal constructor for term fdemote_reg. 6402 pub fn constructor_fdemote_reg<C: Context>( 6403 ctx: &mut C, 6404 arg0: Type, 6405 arg1: Type, 6406 arg2: Reg, 6407 ) -> Option<Reg> { 6408 let pattern0_0 = arg0; 6409 let pattern1_0 = arg1; 6410 let pattern2_0 = arg2; 6411 // Rule at src/isa/s390x/inst.isle line 2830. 6412 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 6413 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6414 return Some(expr1_0); 6415 } 6416 6417 // Generated as internal constructor for term uint_to_fpu_op. 6418 pub fn constructor_uint_to_fpu_op<C: Context>( 6419 ctx: &mut C, 6420 arg0: Type, 6421 arg1: Type, 6422 ) -> Option<IntToFpuOp> { 6423 let pattern0_0 = arg0; 6424 if pattern0_0 == F32 { 6425 let pattern2_0 = arg1; 6426 if pattern2_0 == I32 { 6427 // Rule at src/isa/s390x/inst.isle line 2837. 6428 let expr0_0 = IntToFpuOp::U32ToF32; 6429 return Some(expr0_0); 6430 } 6431 if pattern2_0 == I64 { 6432 // Rule at src/isa/s390x/inst.isle line 2839. 6433 let expr0_0 = IntToFpuOp::U64ToF32; 6434 return Some(expr0_0); 6435 } 6436 } 6437 if pattern0_0 == F64 { 6438 let pattern2_0 = arg1; 6439 if pattern2_0 == I32 { 6440 // Rule at src/isa/s390x/inst.isle line 2838. 6441 let expr0_0 = IntToFpuOp::U32ToF64; 6442 return Some(expr0_0); 6443 } 6444 if pattern2_0 == I64 { 6445 // Rule at src/isa/s390x/inst.isle line 2840. 6446 let expr0_0 = IntToFpuOp::U64ToF64; 6447 return Some(expr0_0); 6448 } 6449 } 6450 return None; 6451 } 6452 6453 // Generated as internal constructor for term fcvt_from_uint_reg. 6454 pub fn constructor_fcvt_from_uint_reg<C: Context>( 6455 ctx: &mut C, 6456 arg0: Type, 6457 arg1: Type, 6458 arg2: Reg, 6459 ) -> Option<Reg> { 6460 let pattern0_0 = arg0; 6461 let pattern1_0 = arg1; 6462 let pattern2_0 = arg2; 6463 // Rule at src/isa/s390x/inst.isle line 2843. 6464 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 6465 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6466 return Some(expr1_0); 6467 } 6468 6469 // Generated as internal constructor for term sint_to_fpu_op. 6470 pub fn constructor_sint_to_fpu_op<C: Context>( 6471 ctx: &mut C, 6472 arg0: Type, 6473 arg1: Type, 6474 ) -> Option<IntToFpuOp> { 6475 let pattern0_0 = arg0; 6476 if pattern0_0 == F32 { 6477 let pattern2_0 = arg1; 6478 if pattern2_0 == I32 { 6479 // Rule at src/isa/s390x/inst.isle line 2850. 6480 let expr0_0 = IntToFpuOp::I32ToF32; 6481 return Some(expr0_0); 6482 } 6483 if pattern2_0 == I64 { 6484 // Rule at src/isa/s390x/inst.isle line 2852. 6485 let expr0_0 = IntToFpuOp::I64ToF32; 6486 return Some(expr0_0); 6487 } 6488 } 6489 if pattern0_0 == F64 { 6490 let pattern2_0 = arg1; 6491 if pattern2_0 == I32 { 6492 // Rule at src/isa/s390x/inst.isle line 2851. 6493 let expr0_0 = IntToFpuOp::I32ToF64; 6494 return Some(expr0_0); 6495 } 6496 if pattern2_0 == I64 { 6497 // Rule at src/isa/s390x/inst.isle line 2853. 6498 let expr0_0 = IntToFpuOp::I64ToF64; 6499 return Some(expr0_0); 6500 } 6501 } 6502 return None; 6503 } 6504 6505 // Generated as internal constructor for term fcvt_from_sint_reg. 6506 pub fn constructor_fcvt_from_sint_reg<C: Context>( 6507 ctx: &mut C, 6508 arg0: Type, 6509 arg1: Type, 6510 arg2: Reg, 6511 ) -> Option<Reg> { 6512 let pattern0_0 = arg0; 6513 let pattern1_0 = arg1; 6514 let pattern2_0 = arg2; 6515 // Rule at src/isa/s390x/inst.isle line 2856. 6516 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 6517 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6518 return Some(expr1_0); 6519 } 6520 6521 // Generated as internal constructor for term fpu_to_uint_op. 6522 pub fn constructor_fpu_to_uint_op<C: Context>( 6523 ctx: &mut C, 6524 arg0: Type, 6525 arg1: Type, 6526 ) -> Option<FpuToIntOp> { 6527 let pattern0_0 = arg0; 6528 if pattern0_0 == I32 { 6529 let pattern2_0 = arg1; 6530 if pattern2_0 == F32 { 6531 // Rule at src/isa/s390x/inst.isle line 2863. 6532 let expr0_0 = FpuToIntOp::F32ToU32; 6533 return Some(expr0_0); 6534 } 6535 if pattern2_0 == F64 { 6536 // Rule at src/isa/s390x/inst.isle line 2864. 6537 let expr0_0 = FpuToIntOp::F64ToU32; 6538 return Some(expr0_0); 6539 } 6540 } 6541 if pattern0_0 == I64 { 6542 let pattern2_0 = arg1; 6543 if pattern2_0 == F32 { 6544 // Rule at src/isa/s390x/inst.isle line 2865. 6545 let expr0_0 = FpuToIntOp::F32ToU64; 6546 return Some(expr0_0); 6547 } 6548 if pattern2_0 == F64 { 6549 // Rule at src/isa/s390x/inst.isle line 2866. 6550 let expr0_0 = FpuToIntOp::F64ToU64; 6551 return Some(expr0_0); 6552 } 6553 } 6554 return None; 6555 } 6556 6557 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 6558 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 6559 ctx: &mut C, 6560 arg0: Type, 6561 arg1: Type, 6562 arg2: Reg, 6563 ) -> Option<ProducesFlags> { 6564 let pattern0_0 = arg0; 6565 let pattern1_0 = arg1; 6566 let pattern2_0 = arg2; 6567 // Rule at src/isa/s390x/inst.isle line 2869. 6568 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 6569 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6570 return Some(expr1_0); 6571 } 6572 6573 // Generated as internal constructor for term fcvt_to_uint_reg. 6574 pub fn constructor_fcvt_to_uint_reg<C: Context>( 6575 ctx: &mut C, 6576 arg0: Type, 6577 arg1: Type, 6578 arg2: Reg, 6579 ) -> Option<Reg> { 6580 let pattern0_0 = arg0; 6581 let pattern1_0 = arg1; 6582 let pattern2_0 = arg2; 6583 // Rule at src/isa/s390x/inst.isle line 2873. 6584 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 6585 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 6586 return Some(expr1_0); 6587 } 6588 6589 // Generated as internal constructor for term fpu_to_sint_op. 6590 pub fn constructor_fpu_to_sint_op<C: Context>( 6591 ctx: &mut C, 6592 arg0: Type, 6593 arg1: Type, 6594 ) -> Option<FpuToIntOp> { 6595 let pattern0_0 = arg0; 6596 if pattern0_0 == I32 { 6597 let pattern2_0 = arg1; 6598 if pattern2_0 == F32 { 6599 // Rule at src/isa/s390x/inst.isle line 2880. 6600 let expr0_0 = FpuToIntOp::F32ToI32; 6601 return Some(expr0_0); 6602 } 6603 if pattern2_0 == F64 { 6604 // Rule at src/isa/s390x/inst.isle line 2881. 6605 let expr0_0 = FpuToIntOp::F64ToI32; 6606 return Some(expr0_0); 6607 } 6608 } 6609 if pattern0_0 == I64 { 6610 let pattern2_0 = arg1; 6611 if pattern2_0 == F32 { 6612 // Rule at src/isa/s390x/inst.isle line 2882. 6613 let expr0_0 = FpuToIntOp::F32ToI64; 6614 return Some(expr0_0); 6615 } 6616 if pattern2_0 == F64 { 6617 // Rule at src/isa/s390x/inst.isle line 2883. 6618 let expr0_0 = FpuToIntOp::F64ToI64; 6619 return Some(expr0_0); 6620 } 6621 } 6622 return None; 6623 } 6624 6625 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 6626 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 6627 ctx: &mut C, 6628 arg0: Type, 6629 arg1: Type, 6630 arg2: Reg, 6631 ) -> Option<ProducesFlags> { 6632 let pattern0_0 = arg0; 6633 let pattern1_0 = arg1; 6634 let pattern2_0 = arg2; 6635 // Rule at src/isa/s390x/inst.isle line 2886. 6636 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 6637 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 6638 return Some(expr1_0); 6639 } 6640 6641 // Generated as internal constructor for term fcvt_to_sint_reg. 6642 pub fn constructor_fcvt_to_sint_reg<C: Context>( 6643 ctx: &mut C, 6644 arg0: Type, 6645 arg1: Type, 6646 arg2: Reg, 6647 ) -> Option<Reg> { 6648 let pattern0_0 = arg0; 6649 let pattern1_0 = arg1; 6650 let pattern2_0 = arg2; 6651 // Rule at src/isa/s390x/inst.isle line 2890. 6652 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 6653 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 6654 return Some(expr1_0); 6655 } 6656 6657 // Generated as internal constructor for term cmpop_cmps. 6658 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6659 let pattern0_0 = arg0; 6660 if pattern0_0 == I32 { 6661 // Rule at src/isa/s390x/inst.isle line 2897. 6662 let expr0_0 = CmpOp::CmpS32; 6663 return Some(expr0_0); 6664 } 6665 if pattern0_0 == I64 { 6666 // Rule at src/isa/s390x/inst.isle line 2898. 6667 let expr0_0 = CmpOp::CmpS64; 6668 return Some(expr0_0); 6669 } 6670 return None; 6671 } 6672 6673 // Generated as internal constructor for term cmpop_cmps_sext16. 6674 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6675 let pattern0_0 = arg0; 6676 if pattern0_0 == I32 { 6677 // Rule at src/isa/s390x/inst.isle line 2901. 6678 let expr0_0 = CmpOp::CmpS32Ext16; 6679 return Some(expr0_0); 6680 } 6681 if pattern0_0 == I64 { 6682 // Rule at src/isa/s390x/inst.isle line 2902. 6683 let expr0_0 = CmpOp::CmpS64Ext16; 6684 return Some(expr0_0); 6685 } 6686 return None; 6687 } 6688 6689 // Generated as internal constructor for term cmpop_cmps_sext32. 6690 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6691 let pattern0_0 = arg0; 6692 if pattern0_0 == I64 { 6693 // Rule at src/isa/s390x/inst.isle line 2905. 6694 let expr0_0 = CmpOp::CmpS64Ext32; 6695 return Some(expr0_0); 6696 } 6697 return None; 6698 } 6699 6700 // Generated as internal constructor for term icmps_reg. 6701 pub fn constructor_icmps_reg<C: Context>( 6702 ctx: &mut C, 6703 arg0: Type, 6704 arg1: Reg, 6705 arg2: Reg, 6706 ) -> Option<ProducesFlags> { 6707 let pattern0_0 = arg0; 6708 let pattern1_0 = arg1; 6709 let pattern2_0 = arg2; 6710 // Rule at src/isa/s390x/inst.isle line 2908. 6711 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 6712 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6713 return Some(expr1_0); 6714 } 6715 6716 // Generated as internal constructor for term icmps_reg_sext32. 6717 pub fn constructor_icmps_reg_sext32<C: Context>( 6718 ctx: &mut C, 6719 arg0: Type, 6720 arg1: Reg, 6721 arg2: Reg, 6722 ) -> Option<ProducesFlags> { 6723 let pattern0_0 = arg0; 6724 let pattern1_0 = arg1; 6725 let pattern2_0 = arg2; 6726 // Rule at src/isa/s390x/inst.isle line 2911. 6727 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 6728 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6729 return Some(expr1_0); 6730 } 6731 6732 // Generated as internal constructor for term icmps_simm16. 6733 pub fn constructor_icmps_simm16<C: Context>( 6734 ctx: &mut C, 6735 arg0: Type, 6736 arg1: Reg, 6737 arg2: i16, 6738 ) -> Option<ProducesFlags> { 6739 let pattern0_0 = arg0; 6740 let pattern1_0 = arg1; 6741 let pattern2_0 = arg2; 6742 // Rule at src/isa/s390x/inst.isle line 2914. 6743 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 6744 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6745 return Some(expr1_0); 6746 } 6747 6748 // Generated as internal constructor for term icmps_simm32. 6749 pub fn constructor_icmps_simm32<C: Context>( 6750 ctx: &mut C, 6751 arg0: Type, 6752 arg1: Reg, 6753 arg2: i32, 6754 ) -> Option<ProducesFlags> { 6755 let pattern0_0 = arg0; 6756 let pattern1_0 = arg1; 6757 let pattern2_0 = arg2; 6758 // Rule at src/isa/s390x/inst.isle line 2917. 6759 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 6760 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6761 return Some(expr1_0); 6762 } 6763 6764 // Generated as internal constructor for term icmps_mem. 6765 pub fn constructor_icmps_mem<C: Context>( 6766 ctx: &mut C, 6767 arg0: Type, 6768 arg1: Reg, 6769 arg2: &MemArg, 6770 ) -> Option<ProducesFlags> { 6771 let pattern0_0 = arg0; 6772 let pattern1_0 = arg1; 6773 let pattern2_0 = arg2; 6774 // Rule at src/isa/s390x/inst.isle line 2920. 6775 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 6776 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6777 return Some(expr1_0); 6778 } 6779 6780 // Generated as internal constructor for term icmps_mem_sext16. 6781 pub fn constructor_icmps_mem_sext16<C: Context>( 6782 ctx: &mut C, 6783 arg0: Type, 6784 arg1: Reg, 6785 arg2: &MemArg, 6786 ) -> Option<ProducesFlags> { 6787 let pattern0_0 = arg0; 6788 let pattern1_0 = arg1; 6789 let pattern2_0 = arg2; 6790 // Rule at src/isa/s390x/inst.isle line 2923. 6791 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 6792 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6793 return Some(expr1_0); 6794 } 6795 6796 // Generated as internal constructor for term icmps_mem_sext32. 6797 pub fn constructor_icmps_mem_sext32<C: Context>( 6798 ctx: &mut C, 6799 arg0: Type, 6800 arg1: Reg, 6801 arg2: &MemArg, 6802 ) -> Option<ProducesFlags> { 6803 let pattern0_0 = arg0; 6804 let pattern1_0 = arg1; 6805 let pattern2_0 = arg2; 6806 // Rule at src/isa/s390x/inst.isle line 2926. 6807 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 6808 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6809 return Some(expr1_0); 6810 } 6811 6812 // Generated as internal constructor for term cmpop_cmpu. 6813 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6814 let pattern0_0 = arg0; 6815 if pattern0_0 == I32 { 6816 // Rule at src/isa/s390x/inst.isle line 2932. 6817 let expr0_0 = CmpOp::CmpL32; 6818 return Some(expr0_0); 6819 } 6820 if pattern0_0 == I64 { 6821 // Rule at src/isa/s390x/inst.isle line 2933. 6822 let expr0_0 = CmpOp::CmpL64; 6823 return Some(expr0_0); 6824 } 6825 return None; 6826 } 6827 6828 // Generated as internal constructor for term cmpop_cmpu_zext16. 6829 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6830 let pattern0_0 = arg0; 6831 if pattern0_0 == I32 { 6832 // Rule at src/isa/s390x/inst.isle line 2936. 6833 let expr0_0 = CmpOp::CmpL32Ext16; 6834 return Some(expr0_0); 6835 } 6836 if pattern0_0 == I64 { 6837 // Rule at src/isa/s390x/inst.isle line 2937. 6838 let expr0_0 = CmpOp::CmpL64Ext16; 6839 return Some(expr0_0); 6840 } 6841 return None; 6842 } 6843 6844 // Generated as internal constructor for term cmpop_cmpu_zext32. 6845 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 6846 let pattern0_0 = arg0; 6847 if pattern0_0 == I64 { 6848 // Rule at src/isa/s390x/inst.isle line 2940. 6849 let expr0_0 = CmpOp::CmpL64Ext32; 6850 return Some(expr0_0); 6851 } 6852 return None; 6853 } 6854 6855 // Generated as internal constructor for term icmpu_reg. 6856 pub fn constructor_icmpu_reg<C: Context>( 6857 ctx: &mut C, 6858 arg0: Type, 6859 arg1: Reg, 6860 arg2: Reg, 6861 ) -> Option<ProducesFlags> { 6862 let pattern0_0 = arg0; 6863 let pattern1_0 = arg1; 6864 let pattern2_0 = arg2; 6865 // Rule at src/isa/s390x/inst.isle line 2943. 6866 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 6867 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6868 return Some(expr1_0); 6869 } 6870 6871 // Generated as internal constructor for term icmpu_reg_zext32. 6872 pub fn constructor_icmpu_reg_zext32<C: Context>( 6873 ctx: &mut C, 6874 arg0: Type, 6875 arg1: Reg, 6876 arg2: Reg, 6877 ) -> Option<ProducesFlags> { 6878 let pattern0_0 = arg0; 6879 let pattern1_0 = arg1; 6880 let pattern2_0 = arg2; 6881 // Rule at src/isa/s390x/inst.isle line 2946. 6882 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 6883 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6884 return Some(expr1_0); 6885 } 6886 6887 // Generated as internal constructor for term icmpu_uimm32. 6888 pub fn constructor_icmpu_uimm32<C: Context>( 6889 ctx: &mut C, 6890 arg0: Type, 6891 arg1: Reg, 6892 arg2: u32, 6893 ) -> Option<ProducesFlags> { 6894 let pattern0_0 = arg0; 6895 let pattern1_0 = arg1; 6896 let pattern2_0 = arg2; 6897 // Rule at src/isa/s390x/inst.isle line 2949. 6898 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 6899 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6900 return Some(expr1_0); 6901 } 6902 6903 // Generated as internal constructor for term icmpu_mem. 6904 pub fn constructor_icmpu_mem<C: Context>( 6905 ctx: &mut C, 6906 arg0: Type, 6907 arg1: Reg, 6908 arg2: &MemArg, 6909 ) -> Option<ProducesFlags> { 6910 let pattern0_0 = arg0; 6911 let pattern1_0 = arg1; 6912 let pattern2_0 = arg2; 6913 // Rule at src/isa/s390x/inst.isle line 2952. 6914 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 6915 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6916 return Some(expr1_0); 6917 } 6918 6919 // Generated as internal constructor for term icmpu_mem_zext16. 6920 pub fn constructor_icmpu_mem_zext16<C: Context>( 6921 ctx: &mut C, 6922 arg0: Type, 6923 arg1: Reg, 6924 arg2: &MemArg, 6925 ) -> Option<ProducesFlags> { 6926 let pattern0_0 = arg0; 6927 let pattern1_0 = arg1; 6928 let pattern2_0 = arg2; 6929 // Rule at src/isa/s390x/inst.isle line 2955. 6930 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 6931 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6932 return Some(expr1_0); 6933 } 6934 6935 // Generated as internal constructor for term icmpu_mem_zext32. 6936 pub fn constructor_icmpu_mem_zext32<C: Context>( 6937 ctx: &mut C, 6938 arg0: Type, 6939 arg1: Reg, 6940 arg2: &MemArg, 6941 ) -> Option<ProducesFlags> { 6942 let pattern0_0 = arg0; 6943 let pattern1_0 = arg1; 6944 let pattern2_0 = arg2; 6945 // Rule at src/isa/s390x/inst.isle line 2958. 6946 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 6947 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 6948 return Some(expr1_0); 6949 } 6950 6951 // Generated as internal constructor for term fcmp_reg. 6952 pub fn constructor_fcmp_reg<C: Context>( 6953 ctx: &mut C, 6954 arg0: Type, 6955 arg1: Reg, 6956 arg2: Reg, 6957 ) -> Option<ProducesFlags> { 6958 let pattern0_0 = arg0; 6959 if pattern0_0 == F32 { 6960 let pattern2_0 = arg1; 6961 let pattern3_0 = arg2; 6962 // Rule at src/isa/s390x/inst.isle line 2964. 6963 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 6964 return Some(expr0_0); 6965 } 6966 if pattern0_0 == F64 { 6967 let pattern2_0 = arg1; 6968 let pattern3_0 = arg2; 6969 // Rule at src/isa/s390x/inst.isle line 2965. 6970 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 6971 return Some(expr0_0); 6972 } 6973 return None; 6974 } 6975 6976 // Generated as internal constructor for term lower. 6977 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<ValueRegs> { 6978 let pattern0_0 = arg0; 6979 let pattern1_0 = C::inst_data(ctx, pattern0_0); 6980 match &pattern1_0 { 6981 &InstructionData::NullAry { 6982 opcode: ref pattern2_0, 6983 } => { 6984 match &pattern2_0 { 6985 &Opcode::Debugtrap => { 6986 // Rule at src/isa/s390x/lower.isle line 1892. 6987 let expr0_0 = constructor_debugtrap_impl(ctx)?; 6988 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 6989 return Some(expr1_0); 6990 } 6991 &Opcode::Nop => { 6992 // Rule at src/isa/s390x/lower.isle line 47. 6993 let expr0_0 = C::invalid_reg(ctx); 6994 let expr1_0 = C::value_reg(ctx, expr0_0); 6995 return Some(expr1_0); 6996 } 6997 &Opcode::Fence => { 6998 // Rule at src/isa/s390x/lower.isle line 1605. 6999 let expr0_0 = constructor_fence_impl(ctx)?; 7000 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7001 return Some(expr1_0); 7002 } 7003 _ => {} 7004 } 7005 } 7006 &InstructionData::FuncAddr { 7007 opcode: ref pattern2_0, 7008 func_ref: pattern2_1, 7009 } => { 7010 if let &Opcode::FuncAddr = &pattern2_0 { 7011 if let Some((pattern4_0, pattern4_1)) = C::call_target_data(ctx, pattern0_0) { 7012 if let Some(()) = C::reloc_distance_near(ctx, &pattern4_1) { 7013 // Rule at src/isa/s390x/lower.isle line 1159. 7014 let expr0_0: i32 = 0; 7015 let expr1_0 = C::memflags_trusted(ctx); 7016 let expr2_0 = C::memarg_symbol(ctx, pattern4_0, expr0_0, expr1_0); 7017 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 7018 let expr4_0 = C::value_reg(ctx, expr3_0); 7019 return Some(expr4_0); 7020 } 7021 // Rule at src/isa/s390x/lower.isle line 1164. 7022 let expr0_0: i64 = 0; 7023 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_0, expr0_0)?; 7024 let expr2_0 = C::value_reg(ctx, expr1_0); 7025 return Some(expr2_0); 7026 } 7027 } 7028 } 7029 &InstructionData::UnaryGlobalValue { 7030 opcode: ref pattern2_0, 7031 global_value: pattern2_1, 7032 } => { 7033 if let &Opcode::SymbolValue = &pattern2_0 { 7034 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 7035 C::symbol_value_data(ctx, pattern0_0) 7036 { 7037 if let Some(()) = C::reloc_distance_near(ctx, &pattern4_1) { 7038 let pattern6_0 = 0; 7039 if let Some(pattern7_0) = 7040 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 7041 { 7042 // Rule at src/isa/s390x/lower.isle line 1172. 7043 let expr0_0 = C::memflags_trusted(ctx); 7044 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 7045 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 7046 let expr3_0 = C::value_reg(ctx, expr2_0); 7047 return Some(expr3_0); 7048 } 7049 } 7050 // Rule at src/isa/s390x/lower.isle line 1178. 7051 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 7052 let expr1_0 = C::value_reg(ctx, expr0_0); 7053 return Some(expr1_0); 7054 } 7055 } 7056 } 7057 &InstructionData::UnaryIeee32 { 7058 opcode: ref pattern2_0, 7059 imm: pattern2_1, 7060 } => { 7061 if let &Opcode::F32const = &pattern2_0 { 7062 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 7063 // Rule at src/isa/s390x/lower.isle line 29. 7064 let expr0_0: Type = F32; 7065 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 7066 let expr2_0 = C::value_reg(ctx, expr1_0); 7067 return Some(expr2_0); 7068 } 7069 } 7070 &InstructionData::UnaryIeee64 { 7071 opcode: ref pattern2_0, 7072 imm: pattern2_1, 7073 } => { 7074 if let &Opcode::F64const = &pattern2_0 { 7075 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 7076 // Rule at src/isa/s390x/lower.isle line 35. 7077 let expr0_0: Type = F64; 7078 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 7079 let expr2_0 = C::value_reg(ctx, expr1_0); 7080 return Some(expr2_0); 7081 } 7082 } 7083 &InstructionData::Trap { 7084 opcode: ref pattern2_0, 7085 code: ref pattern2_1, 7086 } => { 7087 match &pattern2_0 { 7088 &Opcode::Trap => { 7089 // Rule at src/isa/s390x/lower.isle line 1862. 7090 let expr0_0 = constructor_trap_impl(ctx, &pattern2_1)?; 7091 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 7092 return Some(expr1_0); 7093 } 7094 &Opcode::ResumableTrap => { 7095 // Rule at src/isa/s390x/lower.isle line 1868. 7096 let expr0_0 = constructor_trap_impl(ctx, &pattern2_1)?; 7097 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 7098 return Some(expr1_0); 7099 } 7100 _ => {} 7101 } 7102 } 7103 &InstructionData::StoreNoOffset { 7104 opcode: ref pattern2_0, 7105 args: ref pattern2_1, 7106 flags: pattern2_2, 7107 } => { 7108 if let &Opcode::AtomicStore = &pattern2_0 { 7109 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); 7110 let pattern5_0 = C::value_type(ctx, pattern4_0); 7111 if pattern5_0 == I8 { 7112 // Rule at src/isa/s390x/lower.isle line 1586. 7113 let expr0_0 = C::zero_offset(ctx); 7114 let expr1_0 = 7115 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 7116 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 7117 return Some(expr2_0); 7118 } 7119 if pattern5_0 == I16 { 7120 // Rule at src/isa/s390x/lower.isle line 1590. 7121 let expr0_0 = C::zero_offset(ctx); 7122 let expr1_0 = constructor_istore16_impl( 7123 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 7124 )?; 7125 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 7126 return Some(expr2_0); 7127 } 7128 if pattern5_0 == I32 { 7129 // Rule at src/isa/s390x/lower.isle line 1594. 7130 let expr0_0 = C::zero_offset(ctx); 7131 let expr1_0 = constructor_istore32_impl( 7132 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 7133 )?; 7134 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 7135 return Some(expr2_0); 7136 } 7137 if pattern5_0 == I64 { 7138 // Rule at src/isa/s390x/lower.isle line 1598. 7139 let expr0_0 = C::zero_offset(ctx); 7140 let expr1_0 = constructor_istore64_impl( 7141 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 7142 )?; 7143 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 7144 return Some(expr2_0); 7145 } 7146 } 7147 } 7148 &InstructionData::Store { 7149 opcode: ref pattern2_0, 7150 args: ref pattern2_1, 7151 flags: pattern2_2, 7152 offset: pattern2_3, 7153 } => { 7154 match &pattern2_0 { 7155 &Opcode::Store => { 7156 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); 7157 let pattern5_0 = C::value_type(ctx, pattern4_0); 7158 if pattern5_0 == I8 { 7159 // Rule at src/isa/s390x/lower.isle line 1358. 7160 let expr0_0 = constructor_istore8_impl( 7161 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7162 )?; 7163 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7164 return Some(expr1_0); 7165 } 7166 if pattern5_0 == I16 { 7167 // Rule at src/isa/s390x/lower.isle line 1362. 7168 let expr0_0 = constructor_istore16_impl( 7169 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7170 )?; 7171 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7172 return Some(expr1_0); 7173 } 7174 if pattern5_0 == I32 { 7175 // Rule at src/isa/s390x/lower.isle line 1366. 7176 let expr0_0 = constructor_istore32_impl( 7177 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7178 )?; 7179 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7180 return Some(expr1_0); 7181 } 7182 if pattern5_0 == I64 { 7183 // Rule at src/isa/s390x/lower.isle line 1370. 7184 let expr0_0 = constructor_istore64_impl( 7185 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7186 )?; 7187 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7188 return Some(expr1_0); 7189 } 7190 if pattern5_0 == R64 { 7191 // Rule at src/isa/s390x/lower.isle line 1374. 7192 let expr0_0 = constructor_istore64_impl( 7193 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7194 )?; 7195 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7196 return Some(expr1_0); 7197 } 7198 if pattern5_0 == F32 { 7199 if let Some(()) = C::bigendian(ctx, pattern2_2) { 7200 // Rule at src/isa/s390x/lower.isle line 1378. 7201 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 7202 let expr1_0 = 7203 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 7204 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 7205 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 7206 return Some(expr3_0); 7207 } 7208 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 7209 if let Some(()) = C::littleendian(ctx, pattern2_2) { 7210 // Rule at src/isa/s390x/lower.isle line 1384. 7211 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 7212 let expr1_0 = constructor_lower_address( 7213 ctx, pattern2_2, pattern4_1, pattern2_3, 7214 )?; 7215 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 7216 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 7217 return Some(expr3_0); 7218 } 7219 } 7220 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 7221 if let Some(()) = C::littleendian(ctx, pattern2_2) { 7222 // Rule at src/isa/s390x/lower.isle line 1390. 7223 let expr0_0: Type = I64; 7224 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 7225 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 7226 let expr3_0: u8 = 32; 7227 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 7228 let expr5_0 = constructor_lower_address( 7229 ctx, pattern2_2, pattern4_1, pattern2_3, 7230 )?; 7231 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 7232 let expr7_0 = constructor_value_regs_none(ctx, &expr6_0)?; 7233 return Some(expr7_0); 7234 } 7235 } 7236 } 7237 if pattern5_0 == F64 { 7238 if let Some(()) = C::bigendian(ctx, pattern2_2) { 7239 // Rule at src/isa/s390x/lower.isle line 1396. 7240 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 7241 let expr1_0 = 7242 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 7243 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 7244 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 7245 return Some(expr3_0); 7246 } 7247 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 7248 if let Some(()) = C::littleendian(ctx, pattern2_2) { 7249 // Rule at src/isa/s390x/lower.isle line 1402. 7250 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 7251 let expr1_0 = constructor_lower_address( 7252 ctx, pattern2_2, pattern4_1, pattern2_3, 7253 )?; 7254 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 7255 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 7256 return Some(expr3_0); 7257 } 7258 } 7259 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 7260 if let Some(()) = C::littleendian(ctx, pattern2_2) { 7261 // Rule at src/isa/s390x/lower.isle line 1408. 7262 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 7263 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 7264 let expr2_0 = constructor_lower_address( 7265 ctx, pattern2_2, pattern4_1, pattern2_3, 7266 )?; 7267 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 7268 let expr4_0 = constructor_value_regs_none(ctx, &expr3_0)?; 7269 return Some(expr4_0); 7270 } 7271 } 7272 } 7273 } 7274 &Opcode::Istore8 => { 7275 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); 7276 // Rule at src/isa/s390x/lower.isle line 1417. 7277 let expr0_0 = constructor_istore8_impl( 7278 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7279 )?; 7280 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7281 return Some(expr1_0); 7282 } 7283 &Opcode::Istore16 => { 7284 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); 7285 // Rule at src/isa/s390x/lower.isle line 1435. 7286 let expr0_0 = constructor_istore16_impl( 7287 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7288 )?; 7289 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7290 return Some(expr1_0); 7291 } 7292 &Opcode::Istore32 => { 7293 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, &pattern2_1); 7294 // Rule at src/isa/s390x/lower.isle line 1461. 7295 let expr0_0 = constructor_istore32_impl( 7296 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 7297 )?; 7298 let expr1_0 = constructor_value_regs_none(ctx, &expr0_0)?; 7299 return Some(expr1_0); 7300 } 7301 _ => {} 7302 } 7303 } 7304 &InstructionData::Unary { 7305 opcode: ref pattern2_0, 7306 arg: pattern2_1, 7307 } => { 7308 match &pattern2_0 { 7309 &Opcode::Copy => { 7310 // Rule at src/isa/s390x/lower.isle line 53. 7311 let expr0_0 = C::put_in_reg(ctx, pattern2_1); 7312 let expr1_0 = C::value_reg(ctx, expr0_0); 7313 return Some(expr1_0); 7314 } 7315 &Opcode::Breduce => { 7316 // Rule at src/isa/s390x/lower.isle line 752. 7317 let expr0_0 = C::put_in_reg(ctx, pattern2_1); 7318 let expr1_0 = C::value_reg(ctx, expr0_0); 7319 return Some(expr1_0); 7320 } 7321 &Opcode::Ireduce => { 7322 // Rule at src/isa/s390x/lower.isle line 596. 7323 let expr0_0 = C::put_in_reg(ctx, pattern2_1); 7324 let expr1_0 = C::value_reg(ctx, expr0_0); 7325 return Some(expr1_0); 7326 } 7327 _ => {} 7328 } 7329 } 7330 &InstructionData::IntCondTrap { 7331 opcode: ref pattern2_0, 7332 arg: pattern2_1, 7333 cond: ref pattern2_2, 7334 code: ref pattern2_3, 7335 } => { 7336 if let &Opcode::Trapif = &pattern2_0 { 7337 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 7338 let pattern5_0 = C::inst_data(ctx, pattern4_0); 7339 if let &InstructionData::Binary { 7340 opcode: ref pattern6_0, 7341 args: ref pattern6_1, 7342 } = &pattern5_0 7343 { 7344 match &pattern6_0 { 7345 &Opcode::Ifcmp => { 7346 let (pattern8_0, pattern8_1) = 7347 C::unpack_value_array_2(ctx, &pattern6_1); 7348 // Rule at src/isa/s390x/lower.isle line 1904. 7349 let expr0_0: bool = false; 7350 let expr1_0 = constructor_icmp_val( 7351 ctx, 7352 expr0_0, 7353 &pattern2_2, 7354 pattern8_0, 7355 pattern8_1, 7356 )?; 7357 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, &pattern2_3)?; 7358 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 7359 return Some(expr3_0); 7360 } 7361 &Opcode::IaddIfcout => { 7362 let (pattern8_0, pattern8_1) = 7363 C::unpack_value_array_2(ctx, &pattern6_1); 7364 if let &IntCC::UnsignedGreaterThan = &pattern2_2 { 7365 // Rule at src/isa/s390x/lower.isle line 1929. 7366 let expr0_0: u8 = 3; 7367 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 7368 let expr2_0 = 7369 constructor_trap_if_impl(ctx, &expr1_0, &pattern2_3)?; 7370 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 7371 return Some(expr3_0); 7372 } 7373 } 7374 _ => {} 7375 } 7376 } 7377 } 7378 } 7379 } 7380 &InstructionData::CondTrap { 7381 opcode: ref pattern2_0, 7382 arg: pattern2_1, 7383 code: ref pattern2_2, 7384 } => { 7385 match &pattern2_0 { 7386 &Opcode::Trapz => { 7387 // Rule at src/isa/s390x/lower.isle line 1874. 7388 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 7389 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 7390 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, &pattern2_2)?; 7391 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 7392 return Some(expr3_0); 7393 } 7394 &Opcode::Trapnz => { 7395 // Rule at src/isa/s390x/lower.isle line 1880. 7396 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 7397 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, &pattern2_2)?; 7398 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 7399 return Some(expr2_0); 7400 } 7401 &Opcode::ResumableTrapnz => { 7402 // Rule at src/isa/s390x/lower.isle line 1886. 7403 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 7404 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, &pattern2_2)?; 7405 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 7406 return Some(expr2_0); 7407 } 7408 _ => {} 7409 } 7410 } 7411 _ => {} 7412 } 7413 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 7414 let pattern2_0 = C::value_type(ctx, pattern1_0); 7415 if pattern2_0 == B1 { 7416 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7417 if let &InstructionData::Unary { 7418 opcode: ref pattern5_0, 7419 arg: pattern5_1, 7420 } = &pattern4_0 7421 { 7422 match &pattern5_0 { 7423 &Opcode::IsNull => { 7424 let pattern7_0 = C::value_type(ctx, pattern5_1); 7425 if pattern7_0 == R64 { 7426 // Rule at src/isa/s390x/lower.isle line 1740. 7427 let expr0_0: Type = B1; 7428 let expr1_0: Type = I64; 7429 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 7430 let expr3_0: i16 = 0; 7431 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 7432 let expr5_0 = IntCC::Equal; 7433 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 7434 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 7435 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 7436 let expr9_0 = C::value_reg(ctx, expr8_0); 7437 return Some(expr9_0); 7438 } 7439 } 7440 &Opcode::IsInvalid => { 7441 let pattern7_0 = C::value_type(ctx, pattern5_1); 7442 if pattern7_0 == R64 { 7443 // Rule at src/isa/s390x/lower.isle line 1746. 7444 let expr0_0: Type = B1; 7445 let expr1_0: Type = I64; 7446 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 7447 let expr3_0: i16 = -1; 7448 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 7449 let expr5_0 = IntCC::Equal; 7450 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 7451 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 7452 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 7453 let expr9_0 = C::value_reg(ctx, expr8_0); 7454 return Some(expr9_0); 7455 } 7456 } 7457 _ => {} 7458 } 7459 } 7460 } 7461 if pattern2_0 == I8 { 7462 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7463 match &pattern4_0 { 7464 &InstructionData::Unary { 7465 opcode: ref pattern5_0, 7466 arg: pattern5_1, 7467 } => { 7468 if let &Opcode::Popcnt = &pattern5_0 { 7469 // Rule at src/isa/s390x/lower.isle line 884. 7470 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 7471 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 7472 let expr2_0 = C::value_reg(ctx, expr1_0); 7473 return Some(expr2_0); 7474 } 7475 } 7476 &InstructionData::LoadNoOffset { 7477 opcode: ref pattern5_0, 7478 arg: pattern5_1, 7479 flags: pattern5_2, 7480 } => { 7481 if let &Opcode::AtomicLoad = &pattern5_0 { 7482 // Rule at src/isa/s390x/lower.isle line 1549. 7483 let expr0_0: Type = I8; 7484 let expr1_0 = C::zero_offset(ctx); 7485 let expr2_0 = 7486 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 7487 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 7488 let expr4_0 = C::value_reg(ctx, expr3_0); 7489 return Some(expr4_0); 7490 } 7491 } 7492 &InstructionData::Load { 7493 opcode: ref pattern5_0, 7494 arg: pattern5_1, 7495 flags: pattern5_2, 7496 offset: pattern5_3, 7497 } => { 7498 if let &Opcode::Load = &pattern5_0 { 7499 // Rule at src/isa/s390x/lower.isle line 1186. 7500 let expr0_0: Type = I8; 7501 let expr1_0 = 7502 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7503 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 7504 let expr3_0 = C::value_reg(ctx, expr2_0); 7505 return Some(expr3_0); 7506 } 7507 } 7508 _ => {} 7509 } 7510 } 7511 if pattern2_0 == I16 { 7512 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7513 match &pattern4_0 { 7514 &InstructionData::LoadNoOffset { 7515 opcode: ref pattern5_0, 7516 arg: pattern5_1, 7517 flags: pattern5_2, 7518 } => { 7519 if let &Opcode::AtomicLoad = &pattern5_0 { 7520 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7521 // Rule at src/isa/s390x/lower.isle line 1557. 7522 let expr0_0 = C::zero_offset(ctx); 7523 let expr1_0 = 7524 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 7525 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 7526 let expr3_0 = C::value_reg(ctx, expr2_0); 7527 return Some(expr3_0); 7528 } 7529 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7530 // Rule at src/isa/s390x/lower.isle line 1553. 7531 let expr0_0: Type = I16; 7532 let expr1_0 = C::zero_offset(ctx); 7533 let expr2_0 = 7534 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 7535 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 7536 let expr4_0 = C::value_reg(ctx, expr3_0); 7537 return Some(expr4_0); 7538 } 7539 } 7540 } 7541 &InstructionData::Load { 7542 opcode: ref pattern5_0, 7543 arg: pattern5_1, 7544 flags: pattern5_2, 7545 offset: pattern5_3, 7546 } => { 7547 if let &Opcode::Load = &pattern5_0 { 7548 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7549 // Rule at src/isa/s390x/lower.isle line 1194. 7550 let expr0_0 = 7551 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7552 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 7553 let expr2_0 = C::value_reg(ctx, expr1_0); 7554 return Some(expr2_0); 7555 } 7556 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7557 // Rule at src/isa/s390x/lower.isle line 1190. 7558 let expr0_0: Type = I16; 7559 let expr1_0 = 7560 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7561 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 7562 let expr3_0 = C::value_reg(ctx, expr2_0); 7563 return Some(expr3_0); 7564 } 7565 } 7566 } 7567 _ => {} 7568 } 7569 } 7570 if pattern2_0 == I32 { 7571 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7572 match &pattern4_0 { 7573 &InstructionData::Binary { 7574 opcode: ref pattern5_0, 7575 args: ref pattern5_1, 7576 } => { 7577 match &pattern5_0 { 7578 &Opcode::Umulhi => { 7579 let (pattern7_0, pattern7_1) = 7580 C::unpack_value_array_2(ctx, &pattern5_1); 7581 // Rule at src/isa/s390x/lower.isle line 252. 7582 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 7583 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 7584 let expr2_0: Type = I64; 7585 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 7586 let expr4_0: Type = I64; 7587 let expr5_0: u8 = 32; 7588 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 7589 let expr7_0 = C::value_reg(ctx, expr6_0); 7590 return Some(expr7_0); 7591 } 7592 &Opcode::Smulhi => { 7593 let (pattern7_0, pattern7_1) = 7594 C::unpack_value_array_2(ctx, &pattern5_1); 7595 // Rule at src/isa/s390x/lower.isle line 274. 7596 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 7597 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 7598 let expr2_0: Type = I64; 7599 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 7600 let expr4_0: Type = I64; 7601 let expr5_0: u8 = 32; 7602 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 7603 let expr7_0 = C::value_reg(ctx, expr6_0); 7604 return Some(expr7_0); 7605 } 7606 _ => {} 7607 } 7608 } 7609 &InstructionData::AtomicCas { 7610 opcode: ref pattern5_0, 7611 args: ref pattern5_1, 7612 flags: pattern5_2, 7613 } => { 7614 if let &Opcode::AtomicCas = &pattern5_0 { 7615 let (pattern7_0, pattern7_1, pattern7_2) = 7616 C::unpack_value_array_3(ctx, &pattern5_1); 7617 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7618 // Rule at src/isa/s390x/lower.isle line 1534. 7619 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 7620 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 7621 let expr2_0 = C::zero_offset(ctx); 7622 let expr3_0 = 7623 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 7624 let expr4_0 = 7625 constructor_atomic_cas32(ctx, expr0_0, expr1_0, &expr3_0)?; 7626 let expr5_0 = C::value_reg(ctx, expr4_0); 7627 return Some(expr5_0); 7628 } 7629 } 7630 } 7631 &InstructionData::Unary { 7632 opcode: ref pattern5_0, 7633 arg: pattern5_1, 7634 } => { 7635 if let &Opcode::Bitcast = &pattern5_0 { 7636 let pattern7_0 = C::value_type(ctx, pattern5_1); 7637 if pattern7_0 == F32 { 7638 // Rule at src/isa/s390x/lower.isle line 1145. 7639 let expr0_0: Type = I64; 7640 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 7641 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 7642 let expr3_0: u8 = 32; 7643 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 7644 let expr5_0 = C::value_reg(ctx, expr4_0); 7645 return Some(expr5_0); 7646 } 7647 } 7648 } 7649 &InstructionData::LoadNoOffset { 7650 opcode: ref pattern5_0, 7651 arg: pattern5_1, 7652 flags: pattern5_2, 7653 } => { 7654 if let &Opcode::AtomicLoad = &pattern5_0 { 7655 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7656 // Rule at src/isa/s390x/lower.isle line 1565. 7657 let expr0_0 = C::zero_offset(ctx); 7658 let expr1_0 = 7659 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 7660 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 7661 let expr3_0 = C::value_reg(ctx, expr2_0); 7662 return Some(expr3_0); 7663 } 7664 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7665 // Rule at src/isa/s390x/lower.isle line 1561. 7666 let expr0_0 = C::zero_offset(ctx); 7667 let expr1_0 = 7668 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 7669 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 7670 let expr3_0 = C::value_reg(ctx, expr2_0); 7671 return Some(expr3_0); 7672 } 7673 } 7674 } 7675 &InstructionData::Load { 7676 opcode: ref pattern5_0, 7677 arg: pattern5_1, 7678 flags: pattern5_2, 7679 offset: pattern5_3, 7680 } => { 7681 if let &Opcode::Load = &pattern5_0 { 7682 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7683 // Rule at src/isa/s390x/lower.isle line 1202. 7684 let expr0_0 = 7685 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7686 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 7687 let expr2_0 = C::value_reg(ctx, expr1_0); 7688 return Some(expr2_0); 7689 } 7690 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7691 // Rule at src/isa/s390x/lower.isle line 1198. 7692 let expr0_0 = 7693 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7694 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 7695 let expr2_0 = C::value_reg(ctx, expr1_0); 7696 return Some(expr2_0); 7697 } 7698 } 7699 } 7700 _ => {} 7701 } 7702 } 7703 if pattern2_0 == I64 { 7704 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7705 match &pattern4_0 { 7706 &InstructionData::Binary { 7707 opcode: ref pattern5_0, 7708 args: ref pattern5_1, 7709 } => { 7710 match &pattern5_0 { 7711 &Opcode::Umulhi => { 7712 let (pattern7_0, pattern7_1) = 7713 C::unpack_value_array_2(ctx, &pattern5_1); 7714 // Rule at src/isa/s390x/lower.isle line 259. 7715 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 7716 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 7717 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 7718 let expr3_0: Type = I64; 7719 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 7720 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 7721 let expr6_0 = C::value_reg(ctx, expr5_0); 7722 return Some(expr6_0); 7723 } 7724 &Opcode::Smulhi => { 7725 let (pattern7_0, pattern7_1) = 7726 C::unpack_value_array_2(ctx, &pattern5_1); 7727 // Rule at src/isa/s390x/lower.isle line 281. 7728 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 7729 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 7730 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 7731 let expr3_0: Type = I64; 7732 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 7733 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 7734 let expr6_0 = C::value_reg(ctx, expr5_0); 7735 return Some(expr6_0); 7736 } 7737 _ => {} 7738 } 7739 } 7740 &InstructionData::AtomicCas { 7741 opcode: ref pattern5_0, 7742 args: ref pattern5_1, 7743 flags: pattern5_2, 7744 } => { 7745 if let &Opcode::AtomicCas = &pattern5_0 { 7746 let (pattern7_0, pattern7_1, pattern7_2) = 7747 C::unpack_value_array_3(ctx, &pattern5_1); 7748 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7749 // Rule at src/isa/s390x/lower.isle line 1539. 7750 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 7751 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 7752 let expr2_0 = C::zero_offset(ctx); 7753 let expr3_0 = 7754 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 7755 let expr4_0 = 7756 constructor_atomic_cas64(ctx, expr0_0, expr1_0, &expr3_0)?; 7757 let expr5_0 = C::value_reg(ctx, expr4_0); 7758 return Some(expr5_0); 7759 } 7760 } 7761 } 7762 &InstructionData::Unary { 7763 opcode: ref pattern5_0, 7764 arg: pattern5_1, 7765 } => { 7766 if let &Opcode::Bitcast = &pattern5_0 { 7767 let pattern7_0 = C::value_type(ctx, pattern5_1); 7768 if pattern7_0 == F64 { 7769 // Rule at src/isa/s390x/lower.isle line 1135. 7770 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 7771 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 7772 let expr2_0 = C::value_reg(ctx, expr1_0); 7773 return Some(expr2_0); 7774 } 7775 } 7776 } 7777 &InstructionData::LoadNoOffset { 7778 opcode: ref pattern5_0, 7779 arg: pattern5_1, 7780 flags: pattern5_2, 7781 } => { 7782 if let &Opcode::AtomicLoad = &pattern5_0 { 7783 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7784 // Rule at src/isa/s390x/lower.isle line 1573. 7785 let expr0_0 = C::zero_offset(ctx); 7786 let expr1_0 = 7787 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 7788 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 7789 let expr3_0 = C::value_reg(ctx, expr2_0); 7790 return Some(expr3_0); 7791 } 7792 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7793 // Rule at src/isa/s390x/lower.isle line 1569. 7794 let expr0_0 = C::zero_offset(ctx); 7795 let expr1_0 = 7796 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 7797 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 7798 let expr3_0 = C::value_reg(ctx, expr2_0); 7799 return Some(expr3_0); 7800 } 7801 } 7802 } 7803 &InstructionData::Load { 7804 opcode: ref pattern5_0, 7805 arg: pattern5_1, 7806 flags: pattern5_2, 7807 offset: pattern5_3, 7808 } => { 7809 if let &Opcode::Load = &pattern5_0 { 7810 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7811 // Rule at src/isa/s390x/lower.isle line 1210. 7812 let expr0_0 = 7813 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7814 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 7815 let expr2_0 = C::value_reg(ctx, expr1_0); 7816 return Some(expr2_0); 7817 } 7818 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7819 // Rule at src/isa/s390x/lower.isle line 1206. 7820 let expr0_0 = 7821 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7822 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 7823 let expr2_0 = C::value_reg(ctx, expr1_0); 7824 return Some(expr2_0); 7825 } 7826 } 7827 } 7828 _ => {} 7829 } 7830 } 7831 if pattern2_0 == R64 { 7832 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7833 if let &InstructionData::Load { 7834 opcode: ref pattern5_0, 7835 arg: pattern5_1, 7836 flags: pattern5_2, 7837 offset: pattern5_3, 7838 } = &pattern4_0 7839 { 7840 if let &Opcode::Load = &pattern5_0 { 7841 if let Some(()) = C::littleendian(ctx, pattern5_2) { 7842 // Rule at src/isa/s390x/lower.isle line 1218. 7843 let expr0_0 = 7844 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7845 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 7846 let expr2_0 = C::value_reg(ctx, expr1_0); 7847 return Some(expr2_0); 7848 } 7849 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7850 // Rule at src/isa/s390x/lower.isle line 1214. 7851 let expr0_0 = 7852 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7853 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 7854 let expr2_0 = C::value_reg(ctx, expr1_0); 7855 return Some(expr2_0); 7856 } 7857 } 7858 } 7859 } 7860 if pattern2_0 == F32 { 7861 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7862 match &pattern4_0 { 7863 &InstructionData::Unary { 7864 opcode: ref pattern5_0, 7865 arg: pattern5_1, 7866 } => { 7867 if let &Opcode::Bitcast = &pattern5_0 { 7868 let pattern7_0 = C::value_type(ctx, pattern5_1); 7869 if pattern7_0 == I32 { 7870 // Rule at src/isa/s390x/lower.isle line 1140. 7871 let expr0_0: Type = I64; 7872 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 7873 let expr2_0: u8 = 32; 7874 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 7875 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 7876 let expr5_0 = C::value_reg(ctx, expr4_0); 7877 return Some(expr5_0); 7878 } 7879 } 7880 } 7881 &InstructionData::Load { 7882 opcode: ref pattern5_0, 7883 arg: pattern5_1, 7884 flags: pattern5_2, 7885 offset: pattern5_3, 7886 } => { 7887 if let &Opcode::Load = &pattern5_0 { 7888 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7889 // Rule at src/isa/s390x/lower.isle line 1222. 7890 let expr0_0 = 7891 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7892 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 7893 let expr2_0 = C::value_reg(ctx, expr1_0); 7894 return Some(expr2_0); 7895 } 7896 } 7897 } 7898 _ => {} 7899 } 7900 } 7901 if pattern2_0 == F64 { 7902 let pattern4_0 = C::inst_data(ctx, pattern0_0); 7903 match &pattern4_0 { 7904 &InstructionData::Unary { 7905 opcode: ref pattern5_0, 7906 arg: pattern5_1, 7907 } => { 7908 if let &Opcode::Bitcast = &pattern5_0 { 7909 let pattern7_0 = C::value_type(ctx, pattern5_1); 7910 if pattern7_0 == I64 { 7911 // Rule at src/isa/s390x/lower.isle line 1131. 7912 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 7913 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 7914 let expr2_0 = C::value_reg(ctx, expr1_0); 7915 return Some(expr2_0); 7916 } 7917 } 7918 } 7919 &InstructionData::Load { 7920 opcode: ref pattern5_0, 7921 arg: pattern5_1, 7922 flags: pattern5_2, 7923 offset: pattern5_3, 7924 } => { 7925 if let &Opcode::Load = &pattern5_0 { 7926 if let Some(()) = C::bigendian(ctx, pattern5_2) { 7927 // Rule at src/isa/s390x/lower.isle line 1237. 7928 let expr0_0 = 7929 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 7930 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 7931 let expr2_0 = C::value_reg(ctx, expr1_0); 7932 return Some(expr2_0); 7933 } 7934 } 7935 } 7936 _ => {} 7937 } 7938 } 7939 let pattern3_0 = C::inst_data(ctx, pattern0_0); 7940 match &pattern3_0 { 7941 &InstructionData::NullAry { 7942 opcode: ref pattern4_0, 7943 } => { 7944 if let &Opcode::Null = &pattern4_0 { 7945 // Rule at src/isa/s390x/lower.isle line 41. 7946 let expr0_0: u64 = 0; 7947 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 7948 let expr2_0 = C::value_reg(ctx, expr1_0); 7949 return Some(expr2_0); 7950 } 7951 } 7952 &InstructionData::UnaryImm { 7953 opcode: ref pattern4_0, 7954 imm: pattern4_1, 7955 } => { 7956 if let &Opcode::Iconst = &pattern4_0 { 7957 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 7958 // Rule at src/isa/s390x/lower.isle line 15. 7959 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 7960 let expr1_0 = C::value_reg(ctx, expr0_0); 7961 return Some(expr1_0); 7962 } 7963 } 7964 &InstructionData::StackLoad { 7965 opcode: ref pattern4_0, 7966 stack_slot: pattern4_1, 7967 offset: pattern4_2, 7968 } => { 7969 if let &Opcode::StackAddr = &pattern4_0 { 7970 // Rule at src/isa/s390x/lower.isle line 1152. 7971 let expr0_0 = 7972 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 7973 let expr1_0 = C::value_reg(ctx, expr0_0); 7974 return Some(expr1_0); 7975 } 7976 } 7977 &InstructionData::UnaryBool { 7978 opcode: ref pattern4_0, 7979 imm: pattern4_1, 7980 } => { 7981 if let &Opcode::Bconst = &pattern4_0 { 7982 if pattern4_1 == true { 7983 // Rule at src/isa/s390x/lower.isle line 23. 7984 let expr0_0: u64 = 1; 7985 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 7986 let expr2_0 = C::value_reg(ctx, expr1_0); 7987 return Some(expr2_0); 7988 } 7989 if pattern4_1 == false { 7990 // Rule at src/isa/s390x/lower.isle line 21. 7991 let expr0_0: u64 = 0; 7992 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 7993 let expr2_0 = C::value_reg(ctx, expr1_0); 7994 return Some(expr2_0); 7995 } 7996 } 7997 } 7998 &InstructionData::Binary { 7999 opcode: ref pattern4_0, 8000 args: ref pattern4_1, 8001 } => { 8002 match &pattern4_0 { 8003 &Opcode::Fadd => { 8004 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8005 // Rule at src/isa/s390x/lower.isle line 920. 8006 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8007 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8008 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8009 let expr3_0 = C::value_reg(ctx, expr2_0); 8010 return Some(expr3_0); 8011 } 8012 &Opcode::Fsub => { 8013 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8014 // Rule at src/isa/s390x/lower.isle line 927. 8015 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8016 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8017 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8018 let expr3_0 = C::value_reg(ctx, expr2_0); 8019 return Some(expr3_0); 8020 } 8021 &Opcode::Fmul => { 8022 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8023 // Rule at src/isa/s390x/lower.isle line 934. 8024 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8025 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8026 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8027 let expr3_0 = C::value_reg(ctx, expr2_0); 8028 return Some(expr3_0); 8029 } 8030 &Opcode::Fdiv => { 8031 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8032 // Rule at src/isa/s390x/lower.isle line 941. 8033 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8034 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8035 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8036 let expr3_0 = C::value_reg(ctx, expr2_0); 8037 return Some(expr3_0); 8038 } 8039 &Opcode::Fcopysign => { 8040 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8041 // Rule at src/isa/s390x/lower.isle line 962. 8042 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8043 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8044 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8045 let expr3_0 = C::value_reg(ctx, expr2_0); 8046 return Some(expr3_0); 8047 } 8048 &Opcode::Fmin => { 8049 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8050 // Rule at src/isa/s390x/lower.isle line 948. 8051 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8052 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8053 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8054 let expr3_0 = C::value_reg(ctx, expr2_0); 8055 return Some(expr3_0); 8056 } 8057 &Opcode::Fmax => { 8058 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8059 // Rule at src/isa/s390x/lower.isle line 955. 8060 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8061 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8062 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8063 let expr3_0 = C::value_reg(ctx, expr2_0); 8064 return Some(expr3_0); 8065 } 8066 _ => {} 8067 } 8068 } 8069 &InstructionData::FloatCompare { 8070 opcode: ref pattern4_0, 8071 args: ref pattern4_1, 8072 cond: ref pattern4_2, 8073 } => { 8074 if let &Opcode::Fcmp = &pattern4_0 { 8075 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8076 // Rule at src/isa/s390x/lower.isle line 1727. 8077 let expr0_0 = constructor_fcmp_val(ctx, &pattern4_2, pattern6_0, pattern6_1)?; 8078 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 8079 let expr2_0 = C::value_reg(ctx, expr1_0); 8080 return Some(expr2_0); 8081 } 8082 } 8083 &InstructionData::IntCompare { 8084 opcode: ref pattern4_0, 8085 args: ref pattern4_1, 8086 cond: ref pattern4_2, 8087 } => { 8088 if let &Opcode::Icmp = &pattern4_0 { 8089 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, &pattern4_1); 8090 // Rule at src/isa/s390x/lower.isle line 1638. 8091 let expr0_0: bool = true; 8092 let expr1_0 = 8093 constructor_icmp_val(ctx, expr0_0, &pattern4_2, pattern6_0, pattern6_1)?; 8094 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 8095 let expr3_0 = C::value_reg(ctx, expr2_0); 8096 return Some(expr3_0); 8097 } 8098 } 8099 &InstructionData::Ternary { 8100 opcode: ref pattern4_0, 8101 args: ref pattern4_1, 8102 } => { 8103 match &pattern4_0 { 8104 &Opcode::Select => { 8105 let (pattern6_0, pattern6_1, pattern6_2) = 8106 C::unpack_value_array_3(ctx, &pattern4_1); 8107 // Rule at src/isa/s390x/lower.isle line 1769. 8108 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 8109 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8110 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8111 let expr3_0 = constructor_select_bool_reg( 8112 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 8113 )?; 8114 let expr4_0 = C::value_reg(ctx, expr3_0); 8115 return Some(expr4_0); 8116 } 8117 &Opcode::Fma => { 8118 let (pattern6_0, pattern6_1, pattern6_2) = 8119 C::unpack_value_array_3(ctx, &pattern4_1); 8120 // Rule at src/isa/s390x/lower.isle line 969. 8121 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8122 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8123 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8124 let expr3_0 = 8125 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 8126 let expr4_0 = C::value_reg(ctx, expr3_0); 8127 return Some(expr4_0); 8128 } 8129 _ => {} 8130 } 8131 } 8132 &InstructionData::IntSelect { 8133 opcode: ref pattern4_0, 8134 args: ref pattern4_1, 8135 cond: ref pattern4_2, 8136 } => { 8137 if let &Opcode::SelectifSpectreGuard = &pattern4_0 { 8138 let (pattern6_0, pattern6_1, pattern6_2) = 8139 C::unpack_value_array_3(ctx, &pattern4_1); 8140 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 8141 let pattern8_0 = C::inst_data(ctx, pattern7_0); 8142 if let &InstructionData::Binary { 8143 opcode: ref pattern9_0, 8144 args: ref pattern9_1, 8145 } = &pattern8_0 8146 { 8147 if let &Opcode::Ifcmp = &pattern9_0 { 8148 let (pattern11_0, pattern11_1) = 8149 C::unpack_value_array_2(ctx, &pattern9_1); 8150 // Rule at src/isa/s390x/lower.isle line 1781. 8151 let expr0_0: bool = false; 8152 let expr1_0 = constructor_icmp_val( 8153 ctx, 8154 expr0_0, 8155 &pattern4_2, 8156 pattern11_0, 8157 pattern11_1, 8158 )?; 8159 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 8160 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 8161 let expr4_0 = constructor_select_bool_reg( 8162 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 8163 )?; 8164 let expr5_0 = C::value_reg(ctx, expr4_0); 8165 return Some(expr5_0); 8166 } 8167 } 8168 } 8169 } 8170 } 8171 &InstructionData::Unary { 8172 opcode: ref pattern4_0, 8173 arg: pattern4_1, 8174 } => { 8175 match &pattern4_0 { 8176 &Opcode::Sqrt => { 8177 // Rule at src/isa/s390x/lower.isle line 976. 8178 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8179 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 8180 let expr2_0 = C::value_reg(ctx, expr1_0); 8181 return Some(expr2_0); 8182 } 8183 &Opcode::Fneg => { 8184 // Rule at src/isa/s390x/lower.isle line 983. 8185 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8186 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 8187 let expr2_0 = C::value_reg(ctx, expr1_0); 8188 return Some(expr2_0); 8189 } 8190 &Opcode::Fabs => { 8191 // Rule at src/isa/s390x/lower.isle line 990. 8192 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8193 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 8194 let expr2_0 = C::value_reg(ctx, expr1_0); 8195 return Some(expr2_0); 8196 } 8197 &Opcode::Ceil => { 8198 // Rule at src/isa/s390x/lower.isle line 997. 8199 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8200 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 8201 let expr2_0 = C::value_reg(ctx, expr1_0); 8202 return Some(expr2_0); 8203 } 8204 &Opcode::Floor => { 8205 // Rule at src/isa/s390x/lower.isle line 1004. 8206 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8207 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 8208 let expr2_0 = C::value_reg(ctx, expr1_0); 8209 return Some(expr2_0); 8210 } 8211 &Opcode::Trunc => { 8212 // Rule at src/isa/s390x/lower.isle line 1011. 8213 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8214 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 8215 let expr2_0 = C::value_reg(ctx, expr1_0); 8216 return Some(expr2_0); 8217 } 8218 &Opcode::Nearest => { 8219 // Rule at src/isa/s390x/lower.isle line 1018. 8220 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8221 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 8222 let expr2_0 = C::value_reg(ctx, expr1_0); 8223 return Some(expr2_0); 8224 } 8225 &Opcode::Bextend => { 8226 // Rule at src/isa/s390x/lower.isle line 760. 8227 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 8228 let expr1_0 = C::value_reg(ctx, expr0_0); 8229 return Some(expr1_0); 8230 } 8231 &Opcode::Bmask => { 8232 // Rule at src/isa/s390x/lower.isle line 762. 8233 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 8234 let expr1_0 = C::value_reg(ctx, expr0_0); 8235 return Some(expr1_0); 8236 } 8237 &Opcode::Fpromote => { 8238 let pattern6_0 = C::value_type(ctx, pattern4_1); 8239 // Rule at src/isa/s390x/lower.isle line 1025. 8240 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8241 let expr1_0 = 8242 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 8243 let expr2_0 = C::value_reg(ctx, expr1_0); 8244 return Some(expr2_0); 8245 } 8246 &Opcode::Fdemote => { 8247 let pattern6_0 = C::value_type(ctx, pattern4_1); 8248 // Rule at src/isa/s390x/lower.isle line 1032. 8249 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 8250 let expr1_0 = 8251 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 8252 let expr2_0 = C::value_reg(ctx, expr1_0); 8253 return Some(expr2_0); 8254 } 8255 &Opcode::FcvtFromUint => { 8256 let pattern6_0 = C::value_type(ctx, pattern4_1); 8257 // Rule at src/isa/s390x/lower.isle line 1039. 8258 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 8259 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 8260 let expr2_0 = 8261 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8262 let expr3_0 = C::value_reg(ctx, expr2_0); 8263 return Some(expr3_0); 8264 } 8265 &Opcode::FcvtFromSint => { 8266 let pattern6_0 = C::value_type(ctx, pattern4_1); 8267 // Rule at src/isa/s390x/lower.isle line 1047. 8268 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 8269 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 8270 let expr2_0 = 8271 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8272 let expr3_0 = C::value_reg(ctx, expr2_0); 8273 return Some(expr3_0); 8274 } 8275 _ => {} 8276 } 8277 } 8278 _ => {} 8279 } 8280 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 8281 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 8282 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8283 match &pattern5_0 { 8284 &InstructionData::Binary { 8285 opcode: ref pattern6_0, 8286 args: ref pattern6_1, 8287 } => { 8288 match &pattern6_0 { 8289 &Opcode::BandNot => { 8290 let (pattern8_0, pattern8_1) = 8291 C::unpack_value_array_2(ctx, &pattern6_1); 8292 // Rule at src/isa/s390x/lower.isle line 702. 8293 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8294 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8295 let expr2_0 = 8296 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8297 let expr3_0 = C::value_reg(ctx, expr2_0); 8298 return Some(expr3_0); 8299 } 8300 &Opcode::BorNot => { 8301 let (pattern8_0, pattern8_1) = 8302 C::unpack_value_array_2(ctx, &pattern6_1); 8303 // Rule at src/isa/s390x/lower.isle line 713. 8304 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8305 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8306 let expr2_0 = 8307 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8308 let expr3_0 = C::value_reg(ctx, expr2_0); 8309 return Some(expr3_0); 8310 } 8311 &Opcode::BxorNot => { 8312 let (pattern8_0, pattern8_1) = 8313 C::unpack_value_array_2(ctx, &pattern6_1); 8314 // Rule at src/isa/s390x/lower.isle line 724. 8315 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8316 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8317 let expr2_0 = 8318 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8319 let expr3_0 = C::value_reg(ctx, expr2_0); 8320 return Some(expr3_0); 8321 } 8322 _ => {} 8323 } 8324 } 8325 &InstructionData::Ternary { 8326 opcode: ref pattern6_0, 8327 args: ref pattern6_1, 8328 } => { 8329 if let &Opcode::Bitselect = &pattern6_0 { 8330 let (pattern8_0, pattern8_1, pattern8_2) = 8331 C::unpack_value_array_3(ctx, &pattern6_1); 8332 // Rule at src/isa/s390x/lower.isle line 735. 8333 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8334 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8335 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 8336 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 8337 let expr4_0 = 8338 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 8339 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 8340 let expr6_0 = C::value_reg(ctx, expr5_0); 8341 return Some(expr6_0); 8342 } 8343 } 8344 &InstructionData::Unary { 8345 opcode: ref pattern6_0, 8346 arg: pattern6_1, 8347 } => { 8348 match &pattern6_0 { 8349 &Opcode::Bnot => { 8350 // Rule at src/isa/s390x/lower.isle line 625. 8351 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 8352 let expr1_0 = 8353 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 8354 let expr2_0 = C::value_reg(ctx, expr1_0); 8355 return Some(expr2_0); 8356 } 8357 &Opcode::Popcnt => { 8358 // Rule at src/isa/s390x/lower.isle line 889. 8359 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 8360 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 8361 let expr2_0 = C::value_reg(ctx, expr1_0); 8362 return Some(expr2_0); 8363 } 8364 _ => {} 8365 } 8366 } 8367 _ => {} 8368 } 8369 } 8370 } 8371 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 8372 if pattern2_0 == I16 { 8373 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8374 if let &InstructionData::Unary { 8375 opcode: ref pattern6_0, 8376 arg: pattern6_1, 8377 } = &pattern5_0 8378 { 8379 if let &Opcode::Popcnt = &pattern6_0 { 8380 // Rule at src/isa/s390x/lower.isle line 898. 8381 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 8382 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8383 let expr2_0: Type = I32; 8384 let expr3_0: Type = I32; 8385 let expr4_0: u8 = 8; 8386 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 8387 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 8388 let expr7_0: Type = I32; 8389 let expr8_0: u8 = 8; 8390 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 8391 let expr10_0 = C::value_reg(ctx, expr9_0); 8392 return Some(expr10_0); 8393 } 8394 } 8395 } 8396 if pattern2_0 == I32 { 8397 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8398 if let &InstructionData::Unary { 8399 opcode: ref pattern6_0, 8400 arg: pattern6_1, 8401 } = &pattern5_0 8402 { 8403 if let &Opcode::Popcnt = &pattern6_0 { 8404 // Rule at src/isa/s390x/lower.isle line 903. 8405 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 8406 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8407 let expr2_0: Type = I32; 8408 let expr3_0: Type = I32; 8409 let expr4_0: u8 = 16; 8410 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 8411 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 8412 let expr7_0: Type = I32; 8413 let expr8_0: Type = I32; 8414 let expr9_0: u8 = 8; 8415 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 8416 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 8417 let expr12_0: Type = I32; 8418 let expr13_0: u8 = 24; 8419 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 8420 let expr15_0 = C::value_reg(ctx, expr14_0); 8421 return Some(expr15_0); 8422 } 8423 } 8424 } 8425 if pattern2_0 == I64 { 8426 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8427 if let &InstructionData::Unary { 8428 opcode: ref pattern6_0, 8429 arg: pattern6_1, 8430 } = &pattern5_0 8431 { 8432 if let &Opcode::Popcnt = &pattern6_0 { 8433 // Rule at src/isa/s390x/lower.isle line 909. 8434 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 8435 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8436 let expr2_0: Type = I64; 8437 let expr3_0: Type = I64; 8438 let expr4_0: u8 = 32; 8439 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 8440 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 8441 let expr7_0: Type = I64; 8442 let expr8_0: Type = I64; 8443 let expr9_0: u8 = 16; 8444 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 8445 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 8446 let expr12_0: Type = I64; 8447 let expr13_0: Type = I64; 8448 let expr14_0: u8 = 8; 8449 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 8450 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 8451 let expr17_0: Type = I64; 8452 let expr18_0: u8 = 56; 8453 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 8454 let expr20_0 = C::value_reg(ctx, expr19_0); 8455 return Some(expr20_0); 8456 } 8457 } 8458 } 8459 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 8460 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8461 match &pattern5_0 { 8462 &InstructionData::Binary { 8463 opcode: ref pattern6_0, 8464 args: ref pattern6_1, 8465 } => { 8466 match &pattern6_0 { 8467 &Opcode::BandNot => { 8468 let (pattern8_0, pattern8_1) = 8469 C::unpack_value_array_2(ctx, &pattern6_1); 8470 // Rule at src/isa/s390x/lower.isle line 706. 8471 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8472 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8473 let expr2_0 = 8474 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8475 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 8476 let expr4_0 = C::value_reg(ctx, expr3_0); 8477 return Some(expr4_0); 8478 } 8479 &Opcode::BorNot => { 8480 let (pattern8_0, pattern8_1) = 8481 C::unpack_value_array_2(ctx, &pattern6_1); 8482 // Rule at src/isa/s390x/lower.isle line 717. 8483 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8484 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8485 let expr2_0 = 8486 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8487 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 8488 let expr4_0 = C::value_reg(ctx, expr3_0); 8489 return Some(expr4_0); 8490 } 8491 &Opcode::BxorNot => { 8492 let (pattern8_0, pattern8_1) = 8493 C::unpack_value_array_2(ctx, &pattern6_1); 8494 // Rule at src/isa/s390x/lower.isle line 728. 8495 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8496 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8497 let expr2_0 = 8498 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 8499 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 8500 let expr4_0 = C::value_reg(ctx, expr3_0); 8501 return Some(expr4_0); 8502 } 8503 _ => {} 8504 } 8505 } 8506 &InstructionData::Ternary { 8507 opcode: ref pattern6_0, 8508 args: ref pattern6_1, 8509 } => { 8510 if let &Opcode::Bitselect = &pattern6_0 { 8511 let (pattern8_0, pattern8_1, pattern8_2) = 8512 C::unpack_value_array_3(ctx, &pattern6_1); 8513 // Rule at src/isa/s390x/lower.isle line 742. 8514 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 8515 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 8516 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 8517 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 8518 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 8519 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 8520 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 8521 let expr7_0 = C::value_reg(ctx, expr6_0); 8522 return Some(expr7_0); 8523 } 8524 } 8525 &InstructionData::Unary { 8526 opcode: ref pattern6_0, 8527 arg: pattern6_1, 8528 } => { 8529 if let &Opcode::Bnot = &pattern6_0 { 8530 // Rule at src/isa/s390x/lower.isle line 630. 8531 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 8532 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 8533 let expr2_0 = C::value_reg(ctx, expr1_0); 8534 return Some(expr2_0); 8535 } 8536 } 8537 _ => {} 8538 } 8539 } 8540 } 8541 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 8542 if pattern2_0 == F32 { 8543 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8544 if let &InstructionData::Load { 8545 opcode: ref pattern6_0, 8546 arg: pattern6_1, 8547 flags: pattern6_2, 8548 offset: pattern6_3, 8549 } = &pattern5_0 8550 { 8551 if let &Opcode::Load = &pattern6_0 { 8552 if let Some(()) = C::littleendian(ctx, pattern6_2) { 8553 // Rule at src/isa/s390x/lower.isle line 1226. 8554 let expr0_0 = 8555 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 8556 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 8557 let expr2_0 = C::value_reg(ctx, expr1_0); 8558 return Some(expr2_0); 8559 } 8560 } 8561 } 8562 } 8563 if pattern2_0 == F64 { 8564 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8565 if let &InstructionData::Load { 8566 opcode: ref pattern6_0, 8567 arg: pattern6_1, 8568 flags: pattern6_2, 8569 offset: pattern6_3, 8570 } = &pattern5_0 8571 { 8572 if let &Opcode::Load = &pattern6_0 { 8573 if let Some(()) = C::littleendian(ctx, pattern6_2) { 8574 // Rule at src/isa/s390x/lower.isle line 1241. 8575 let expr0_0 = 8576 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 8577 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 8578 let expr2_0 = C::value_reg(ctx, expr1_0); 8579 return Some(expr2_0); 8580 } 8581 } 8582 } 8583 } 8584 } 8585 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 8586 if pattern2_0 == F32 { 8587 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8588 if let &InstructionData::Load { 8589 opcode: ref pattern6_0, 8590 arg: pattern6_1, 8591 flags: pattern6_2, 8592 offset: pattern6_3, 8593 } = &pattern5_0 8594 { 8595 if let &Opcode::Load = &pattern6_0 { 8596 if let Some(()) = C::littleendian(ctx, pattern6_2) { 8597 // Rule at src/isa/s390x/lower.isle line 1231. 8598 let expr0_0 = 8599 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 8600 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8601 let expr2_0: Type = I64; 8602 let expr3_0: u8 = 32; 8603 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 8604 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 8605 let expr6_0 = C::value_reg(ctx, expr5_0); 8606 return Some(expr6_0); 8607 } 8608 } 8609 } 8610 } 8611 if pattern2_0 == F64 { 8612 let pattern5_0 = C::inst_data(ctx, pattern0_0); 8613 if let &InstructionData::Load { 8614 opcode: ref pattern6_0, 8615 arg: pattern6_1, 8616 flags: pattern6_2, 8617 offset: pattern6_3, 8618 } = &pattern5_0 8619 { 8620 if let &Opcode::Load = &pattern6_0 { 8621 if let Some(()) = C::littleendian(ctx, pattern6_2) { 8622 // Rule at src/isa/s390x/lower.isle line 1246. 8623 let expr0_0 = 8624 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 8625 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8626 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 8627 let expr3_0 = C::value_reg(ctx, expr2_0); 8628 return Some(expr3_0); 8629 } 8630 } 8631 } 8632 } 8633 } 8634 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 8635 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8636 if let &InstructionData::Unary { 8637 opcode: ref pattern5_0, 8638 arg: pattern5_1, 8639 } = &pattern4_0 8640 { 8641 if let &Opcode::Bint = &pattern5_0 { 8642 // Rule at src/isa/s390x/lower.isle line 796. 8643 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8644 let expr1_0: u16 = 1; 8645 let expr2_0: u8 = 0; 8646 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 8647 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 8648 let expr5_0 = C::value_reg(ctx, expr4_0); 8649 return Some(expr5_0); 8650 } 8651 } 8652 } 8653 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 8654 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8655 if let &InstructionData::Unary { 8656 opcode: ref pattern5_0, 8657 arg: pattern5_1, 8658 } = &pattern4_0 8659 { 8660 if let &Opcode::Bint = &pattern5_0 { 8661 // Rule at src/isa/s390x/lower.isle line 800. 8662 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8663 let expr1_0: u32 = 1; 8664 let expr2_0: u8 = 0; 8665 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 8666 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 8667 let expr5_0 = C::value_reg(ctx, expr4_0); 8668 return Some(expr5_0); 8669 } 8670 } 8671 } 8672 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 8673 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8674 match &pattern4_0 { 8675 &InstructionData::Binary { 8676 opcode: ref pattern5_0, 8677 args: ref pattern5_1, 8678 } => { 8679 match &pattern5_0 { 8680 &Opcode::Iadd => { 8681 let (pattern7_0, pattern7_1) = 8682 C::unpack_value_array_2(ctx, &pattern5_1); 8683 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 8684 // Rule at src/isa/s390x/lower.isle line 72. 8685 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8686 let expr1_0 = 8687 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 8688 let expr2_0 = C::value_reg(ctx, expr1_0); 8689 return Some(expr2_0); 8690 } 8691 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 8692 // Rule at src/isa/s390x/lower.isle line 76. 8693 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8694 let expr1_0 = 8695 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 8696 let expr2_0 = C::value_reg(ctx, expr1_0); 8697 return Some(expr2_0); 8698 } 8699 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 8700 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8701 if let &InstructionData::Unary { 8702 opcode: ref pattern10_0, 8703 arg: pattern10_1, 8704 } = &pattern9_0 8705 { 8706 if let &Opcode::Sextend = &pattern10_0 { 8707 let pattern12_0 = C::value_type(ctx, pattern10_1); 8708 if pattern12_0 == I32 { 8709 // Rule at src/isa/s390x/lower.isle line 66. 8710 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8711 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 8712 let expr2_0 = constructor_add_reg_sext32( 8713 ctx, pattern3_0, expr0_0, expr1_0, 8714 )?; 8715 let expr3_0 = C::value_reg(ctx, expr2_0); 8716 return Some(expr3_0); 8717 } 8718 } 8719 } 8720 } 8721 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 8722 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8723 if let &InstructionData::Load { 8724 opcode: ref pattern10_0, 8725 arg: pattern10_1, 8726 flags: pattern10_2, 8727 offset: pattern10_3, 8728 } = &pattern9_0 8729 { 8730 match &pattern10_0 { 8731 &Opcode::Sload16 => { 8732 if let Some(()) = C::bigendian(ctx, pattern10_2) { 8733 // Rule at src/isa/s390x/lower.isle line 94. 8734 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8735 let expr1_0 = 8736 constructor_sink_sload16(ctx, pattern8_0)?; 8737 let expr2_0 = constructor_add_mem_sext16( 8738 ctx, pattern3_0, expr0_0, &expr1_0, 8739 )?; 8740 let expr3_0 = C::value_reg(ctx, expr2_0); 8741 return Some(expr3_0); 8742 } 8743 } 8744 &Opcode::Sload32 => { 8745 if let Some(()) = C::bigendian(ctx, pattern10_2) { 8746 // Rule at src/isa/s390x/lower.isle line 98. 8747 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8748 let expr1_0 = 8749 constructor_sink_sload32(ctx, pattern8_0)?; 8750 let expr2_0 = constructor_add_mem_sext32( 8751 ctx, pattern3_0, expr0_0, &expr1_0, 8752 )?; 8753 let expr3_0 = C::value_reg(ctx, expr2_0); 8754 return Some(expr3_0); 8755 } 8756 } 8757 _ => {} 8758 } 8759 } 8760 } 8761 let pattern8_0 = C::value_type(ctx, pattern7_0); 8762 if pattern8_0 == I16 { 8763 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 8764 let pattern11_0 = C::inst_data(ctx, pattern10_0); 8765 if let &InstructionData::Load { 8766 opcode: ref pattern12_0, 8767 arg: pattern12_1, 8768 flags: pattern12_2, 8769 offset: pattern12_3, 8770 } = &pattern11_0 8771 { 8772 if let &Opcode::Load = &pattern12_0 { 8773 if let Some(()) = C::bigendian(ctx, pattern12_2) { 8774 // Rule at src/isa/s390x/lower.isle line 88. 8775 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8776 let expr1_0 = 8777 constructor_sink_load(ctx, pattern10_0)?; 8778 let expr2_0 = constructor_add_mem_sext16( 8779 ctx, pattern3_0, expr0_0, &expr1_0, 8780 )?; 8781 let expr3_0 = C::value_reg(ctx, expr2_0); 8782 return Some(expr3_0); 8783 } 8784 } 8785 } 8786 } 8787 } 8788 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 8789 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 8790 let pattern11_0 = C::inst_data(ctx, pattern10_0); 8791 if let &InstructionData::Load { 8792 opcode: ref pattern12_0, 8793 arg: pattern12_1, 8794 flags: pattern12_2, 8795 offset: pattern12_3, 8796 } = &pattern11_0 8797 { 8798 if let &Opcode::Load = &pattern12_0 { 8799 if let Some(()) = C::bigendian(ctx, pattern12_2) { 8800 // Rule at src/isa/s390x/lower.isle line 82. 8801 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 8802 let expr1_0 = 8803 constructor_sink_load(ctx, pattern10_0)?; 8804 let expr2_0 = constructor_add_mem( 8805 ctx, pattern3_0, expr0_0, &expr1_0, 8806 )?; 8807 let expr3_0 = C::value_reg(ctx, expr2_0); 8808 return Some(expr3_0); 8809 } 8810 } 8811 } 8812 } 8813 } 8814 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 8815 // Rule at src/isa/s390x/lower.isle line 70. 8816 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8817 let expr1_0 = 8818 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 8819 let expr2_0 = C::value_reg(ctx, expr1_0); 8820 return Some(expr2_0); 8821 } 8822 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 8823 // Rule at src/isa/s390x/lower.isle line 74. 8824 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8825 let expr1_0 = 8826 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 8827 let expr2_0 = C::value_reg(ctx, expr1_0); 8828 return Some(expr2_0); 8829 } 8830 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 8831 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8832 if let &InstructionData::Unary { 8833 opcode: ref pattern10_0, 8834 arg: pattern10_1, 8835 } = &pattern9_0 8836 { 8837 if let &Opcode::Sextend = &pattern10_0 { 8838 let pattern12_0 = C::value_type(ctx, pattern10_1); 8839 if pattern12_0 == I32 { 8840 // Rule at src/isa/s390x/lower.isle line 64. 8841 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8842 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 8843 let expr2_0 = constructor_add_reg_sext32( 8844 ctx, pattern3_0, expr0_0, expr1_0, 8845 )?; 8846 let expr3_0 = C::value_reg(ctx, expr2_0); 8847 return Some(expr3_0); 8848 } 8849 } 8850 } 8851 } 8852 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 8853 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8854 if let &InstructionData::Load { 8855 opcode: ref pattern10_0, 8856 arg: pattern10_1, 8857 flags: pattern10_2, 8858 offset: pattern10_3, 8859 } = &pattern9_0 8860 { 8861 match &pattern10_0 { 8862 &Opcode::Sload16 => { 8863 if let Some(()) = C::bigendian(ctx, pattern10_2) { 8864 // Rule at src/isa/s390x/lower.isle line 92. 8865 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8866 let expr1_0 = 8867 constructor_sink_sload16(ctx, pattern8_0)?; 8868 let expr2_0 = constructor_add_mem_sext16( 8869 ctx, pattern3_0, expr0_0, &expr1_0, 8870 )?; 8871 let expr3_0 = C::value_reg(ctx, expr2_0); 8872 return Some(expr3_0); 8873 } 8874 } 8875 &Opcode::Sload32 => { 8876 if let Some(()) = C::bigendian(ctx, pattern10_2) { 8877 // Rule at src/isa/s390x/lower.isle line 96. 8878 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8879 let expr1_0 = 8880 constructor_sink_sload32(ctx, pattern8_0)?; 8881 let expr2_0 = constructor_add_mem_sext32( 8882 ctx, pattern3_0, expr0_0, &expr1_0, 8883 )?; 8884 let expr3_0 = C::value_reg(ctx, expr2_0); 8885 return Some(expr3_0); 8886 } 8887 } 8888 _ => {} 8889 } 8890 } 8891 } 8892 let pattern8_0 = C::value_type(ctx, pattern7_1); 8893 if pattern8_0 == I16 { 8894 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 8895 let pattern11_0 = C::inst_data(ctx, pattern10_0); 8896 if let &InstructionData::Load { 8897 opcode: ref pattern12_0, 8898 arg: pattern12_1, 8899 flags: pattern12_2, 8900 offset: pattern12_3, 8901 } = &pattern11_0 8902 { 8903 if let &Opcode::Load = &pattern12_0 { 8904 if let Some(()) = C::bigendian(ctx, pattern12_2) { 8905 // Rule at src/isa/s390x/lower.isle line 86. 8906 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8907 let expr1_0 = 8908 constructor_sink_load(ctx, pattern10_0)?; 8909 let expr2_0 = constructor_add_mem_sext16( 8910 ctx, pattern3_0, expr0_0, &expr1_0, 8911 )?; 8912 let expr3_0 = C::value_reg(ctx, expr2_0); 8913 return Some(expr3_0); 8914 } 8915 } 8916 } 8917 } 8918 } 8919 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 8920 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 8921 let pattern11_0 = C::inst_data(ctx, pattern10_0); 8922 if let &InstructionData::Load { 8923 opcode: ref pattern12_0, 8924 arg: pattern12_1, 8925 flags: pattern12_2, 8926 offset: pattern12_3, 8927 } = &pattern11_0 8928 { 8929 if let &Opcode::Load = &pattern12_0 { 8930 if let Some(()) = C::bigendian(ctx, pattern12_2) { 8931 // Rule at src/isa/s390x/lower.isle line 80. 8932 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8933 let expr1_0 = 8934 constructor_sink_load(ctx, pattern10_0)?; 8935 let expr2_0 = constructor_add_mem( 8936 ctx, pattern3_0, expr0_0, &expr1_0, 8937 )?; 8938 let expr3_0 = C::value_reg(ctx, expr2_0); 8939 return Some(expr3_0); 8940 } 8941 } 8942 } 8943 } 8944 } 8945 // Rule at src/isa/s390x/lower.isle line 60. 8946 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8947 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8948 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 8949 let expr3_0 = C::value_reg(ctx, expr2_0); 8950 return Some(expr3_0); 8951 } 8952 &Opcode::Isub => { 8953 let (pattern7_0, pattern7_1) = 8954 C::unpack_value_array_2(ctx, &pattern5_1); 8955 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 8956 // Rule at src/isa/s390x/lower.isle line 113. 8957 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8958 let expr1_0 = 8959 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 8960 let expr2_0 = C::value_reg(ctx, expr1_0); 8961 return Some(expr2_0); 8962 } 8963 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 8964 // Rule at src/isa/s390x/lower.isle line 115. 8965 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8966 let expr1_0 = 8967 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 8968 let expr2_0 = C::value_reg(ctx, expr1_0); 8969 return Some(expr2_0); 8970 } 8971 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 8972 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8973 if let &InstructionData::Unary { 8974 opcode: ref pattern10_0, 8975 arg: pattern10_1, 8976 } = &pattern9_0 8977 { 8978 if let &Opcode::Sextend = &pattern10_0 { 8979 let pattern12_0 = C::value_type(ctx, pattern10_1); 8980 if pattern12_0 == I32 { 8981 // Rule at src/isa/s390x/lower.isle line 109. 8982 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8983 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 8984 let expr2_0 = constructor_sub_reg_sext32( 8985 ctx, pattern3_0, expr0_0, expr1_0, 8986 )?; 8987 let expr3_0 = C::value_reg(ctx, expr2_0); 8988 return Some(expr3_0); 8989 } 8990 } 8991 } 8992 } 8993 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 8994 let pattern9_0 = C::inst_data(ctx, pattern8_0); 8995 if let &InstructionData::Load { 8996 opcode: ref pattern10_0, 8997 arg: pattern10_1, 8998 flags: pattern10_2, 8999 offset: pattern10_3, 9000 } = &pattern9_0 9001 { 9002 match &pattern10_0 { 9003 &Opcode::Sload16 => { 9004 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9005 // Rule at src/isa/s390x/lower.isle line 127. 9006 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9007 let expr1_0 = 9008 constructor_sink_sload16(ctx, pattern8_0)?; 9009 let expr2_0 = constructor_sub_mem_sext16( 9010 ctx, pattern3_0, expr0_0, &expr1_0, 9011 )?; 9012 let expr3_0 = C::value_reg(ctx, expr2_0); 9013 return Some(expr3_0); 9014 } 9015 } 9016 &Opcode::Sload32 => { 9017 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9018 // Rule at src/isa/s390x/lower.isle line 129. 9019 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9020 let expr1_0 = 9021 constructor_sink_sload32(ctx, pattern8_0)?; 9022 let expr2_0 = constructor_sub_mem_sext32( 9023 ctx, pattern3_0, expr0_0, &expr1_0, 9024 )?; 9025 let expr3_0 = C::value_reg(ctx, expr2_0); 9026 return Some(expr3_0); 9027 } 9028 } 9029 _ => {} 9030 } 9031 } 9032 } 9033 let pattern8_0 = C::value_type(ctx, pattern7_1); 9034 if pattern8_0 == I16 { 9035 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9036 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9037 if let &InstructionData::Load { 9038 opcode: ref pattern12_0, 9039 arg: pattern12_1, 9040 flags: pattern12_2, 9041 offset: pattern12_3, 9042 } = &pattern11_0 9043 { 9044 if let &Opcode::Load = &pattern12_0 { 9045 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9046 // Rule at src/isa/s390x/lower.isle line 123. 9047 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9048 let expr1_0 = 9049 constructor_sink_load(ctx, pattern10_0)?; 9050 let expr2_0 = constructor_sub_mem_sext16( 9051 ctx, pattern3_0, expr0_0, &expr1_0, 9052 )?; 9053 let expr3_0 = C::value_reg(ctx, expr2_0); 9054 return Some(expr3_0); 9055 } 9056 } 9057 } 9058 } 9059 } 9060 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9061 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9062 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9063 if let &InstructionData::Load { 9064 opcode: ref pattern12_0, 9065 arg: pattern12_1, 9066 flags: pattern12_2, 9067 offset: pattern12_3, 9068 } = &pattern11_0 9069 { 9070 if let &Opcode::Load = &pattern12_0 { 9071 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9072 // Rule at src/isa/s390x/lower.isle line 119. 9073 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9074 let expr1_0 = 9075 constructor_sink_load(ctx, pattern10_0)?; 9076 let expr2_0 = constructor_sub_mem( 9077 ctx, pattern3_0, expr0_0, &expr1_0, 9078 )?; 9079 let expr3_0 = C::value_reg(ctx, expr2_0); 9080 return Some(expr3_0); 9081 } 9082 } 9083 } 9084 } 9085 } 9086 // Rule at src/isa/s390x/lower.isle line 105. 9087 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9088 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9089 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9090 let expr3_0 = C::value_reg(ctx, expr2_0); 9091 return Some(expr3_0); 9092 } 9093 &Opcode::Imul => { 9094 let (pattern7_0, pattern7_1) = 9095 C::unpack_value_array_2(ctx, &pattern5_1); 9096 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9097 // Rule at src/isa/s390x/lower.isle line 212. 9098 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9099 let expr1_0 = 9100 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9101 let expr2_0 = C::value_reg(ctx, expr1_0); 9102 return Some(expr2_0); 9103 } 9104 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9105 // Rule at src/isa/s390x/lower.isle line 216. 9106 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9107 let expr1_0 = 9108 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9109 let expr2_0 = C::value_reg(ctx, expr1_0); 9110 return Some(expr2_0); 9111 } 9112 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9113 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9114 if let &InstructionData::Unary { 9115 opcode: ref pattern10_0, 9116 arg: pattern10_1, 9117 } = &pattern9_0 9118 { 9119 if let &Opcode::Sextend = &pattern10_0 { 9120 let pattern12_0 = C::value_type(ctx, pattern10_1); 9121 if pattern12_0 == I32 { 9122 // Rule at src/isa/s390x/lower.isle line 206. 9123 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9124 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9125 let expr2_0 = constructor_mul_reg_sext32( 9126 ctx, pattern3_0, expr0_0, expr1_0, 9127 )?; 9128 let expr3_0 = C::value_reg(ctx, expr2_0); 9129 return Some(expr3_0); 9130 } 9131 } 9132 } 9133 } 9134 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9135 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9136 if let &InstructionData::Load { 9137 opcode: ref pattern10_0, 9138 arg: pattern10_1, 9139 flags: pattern10_2, 9140 offset: pattern10_3, 9141 } = &pattern9_0 9142 { 9143 match &pattern10_0 { 9144 &Opcode::Sload16 => { 9145 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9146 // Rule at src/isa/s390x/lower.isle line 234. 9147 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9148 let expr1_0 = 9149 constructor_sink_sload16(ctx, pattern8_0)?; 9150 let expr2_0 = constructor_mul_mem_sext16( 9151 ctx, pattern3_0, expr0_0, &expr1_0, 9152 )?; 9153 let expr3_0 = C::value_reg(ctx, expr2_0); 9154 return Some(expr3_0); 9155 } 9156 } 9157 &Opcode::Sload32 => { 9158 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9159 // Rule at src/isa/s390x/lower.isle line 238. 9160 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9161 let expr1_0 = 9162 constructor_sink_sload32(ctx, pattern8_0)?; 9163 let expr2_0 = constructor_mul_mem_sext32( 9164 ctx, pattern3_0, expr0_0, &expr1_0, 9165 )?; 9166 let expr3_0 = C::value_reg(ctx, expr2_0); 9167 return Some(expr3_0); 9168 } 9169 } 9170 _ => {} 9171 } 9172 } 9173 } 9174 let pattern8_0 = C::value_type(ctx, pattern7_0); 9175 if pattern8_0 == I16 { 9176 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9177 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9178 if let &InstructionData::Load { 9179 opcode: ref pattern12_0, 9180 arg: pattern12_1, 9181 flags: pattern12_2, 9182 offset: pattern12_3, 9183 } = &pattern11_0 9184 { 9185 if let &Opcode::Load = &pattern12_0 { 9186 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9187 // Rule at src/isa/s390x/lower.isle line 228. 9188 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9189 let expr1_0 = 9190 constructor_sink_load(ctx, pattern10_0)?; 9191 let expr2_0 = constructor_mul_mem_sext16( 9192 ctx, pattern3_0, expr0_0, &expr1_0, 9193 )?; 9194 let expr3_0 = C::value_reg(ctx, expr2_0); 9195 return Some(expr3_0); 9196 } 9197 } 9198 } 9199 } 9200 } 9201 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9202 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9203 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9204 if let &InstructionData::Load { 9205 opcode: ref pattern12_0, 9206 arg: pattern12_1, 9207 flags: pattern12_2, 9208 offset: pattern12_3, 9209 } = &pattern11_0 9210 { 9211 if let &Opcode::Load = &pattern12_0 { 9212 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9213 // Rule at src/isa/s390x/lower.isle line 222. 9214 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9215 let expr1_0 = 9216 constructor_sink_load(ctx, pattern10_0)?; 9217 let expr2_0 = constructor_mul_mem( 9218 ctx, pattern3_0, expr0_0, &expr1_0, 9219 )?; 9220 let expr3_0 = C::value_reg(ctx, expr2_0); 9221 return Some(expr3_0); 9222 } 9223 } 9224 } 9225 } 9226 } 9227 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9228 // Rule at src/isa/s390x/lower.isle line 210. 9229 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9230 let expr1_0 = 9231 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9232 let expr2_0 = C::value_reg(ctx, expr1_0); 9233 return Some(expr2_0); 9234 } 9235 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9236 // Rule at src/isa/s390x/lower.isle line 214. 9237 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9238 let expr1_0 = 9239 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9240 let expr2_0 = C::value_reg(ctx, expr1_0); 9241 return Some(expr2_0); 9242 } 9243 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9244 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9245 if let &InstructionData::Unary { 9246 opcode: ref pattern10_0, 9247 arg: pattern10_1, 9248 } = &pattern9_0 9249 { 9250 if let &Opcode::Sextend = &pattern10_0 { 9251 let pattern12_0 = C::value_type(ctx, pattern10_1); 9252 if pattern12_0 == I32 { 9253 // Rule at src/isa/s390x/lower.isle line 204. 9254 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9255 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9256 let expr2_0 = constructor_mul_reg_sext32( 9257 ctx, pattern3_0, expr0_0, expr1_0, 9258 )?; 9259 let expr3_0 = C::value_reg(ctx, expr2_0); 9260 return Some(expr3_0); 9261 } 9262 } 9263 } 9264 } 9265 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9266 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9267 if let &InstructionData::Load { 9268 opcode: ref pattern10_0, 9269 arg: pattern10_1, 9270 flags: pattern10_2, 9271 offset: pattern10_3, 9272 } = &pattern9_0 9273 { 9274 match &pattern10_0 { 9275 &Opcode::Sload16 => { 9276 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9277 // Rule at src/isa/s390x/lower.isle line 232. 9278 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9279 let expr1_0 = 9280 constructor_sink_sload16(ctx, pattern8_0)?; 9281 let expr2_0 = constructor_mul_mem_sext16( 9282 ctx, pattern3_0, expr0_0, &expr1_0, 9283 )?; 9284 let expr3_0 = C::value_reg(ctx, expr2_0); 9285 return Some(expr3_0); 9286 } 9287 } 9288 &Opcode::Sload32 => { 9289 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9290 // Rule at src/isa/s390x/lower.isle line 236. 9291 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9292 let expr1_0 = 9293 constructor_sink_sload32(ctx, pattern8_0)?; 9294 let expr2_0 = constructor_mul_mem_sext32( 9295 ctx, pattern3_0, expr0_0, &expr1_0, 9296 )?; 9297 let expr3_0 = C::value_reg(ctx, expr2_0); 9298 return Some(expr3_0); 9299 } 9300 } 9301 _ => {} 9302 } 9303 } 9304 } 9305 let pattern8_0 = C::value_type(ctx, pattern7_1); 9306 if pattern8_0 == I16 { 9307 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9308 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9309 if let &InstructionData::Load { 9310 opcode: ref pattern12_0, 9311 arg: pattern12_1, 9312 flags: pattern12_2, 9313 offset: pattern12_3, 9314 } = &pattern11_0 9315 { 9316 if let &Opcode::Load = &pattern12_0 { 9317 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9318 // Rule at src/isa/s390x/lower.isle line 226. 9319 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9320 let expr1_0 = 9321 constructor_sink_load(ctx, pattern10_0)?; 9322 let expr2_0 = constructor_mul_mem_sext16( 9323 ctx, pattern3_0, expr0_0, &expr1_0, 9324 )?; 9325 let expr3_0 = C::value_reg(ctx, expr2_0); 9326 return Some(expr3_0); 9327 } 9328 } 9329 } 9330 } 9331 } 9332 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9333 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9334 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9335 if let &InstructionData::Load { 9336 opcode: ref pattern12_0, 9337 arg: pattern12_1, 9338 flags: pattern12_2, 9339 offset: pattern12_3, 9340 } = &pattern11_0 9341 { 9342 if let &Opcode::Load = &pattern12_0 { 9343 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9344 // Rule at src/isa/s390x/lower.isle line 220. 9345 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9346 let expr1_0 = 9347 constructor_sink_load(ctx, pattern10_0)?; 9348 let expr2_0 = constructor_mul_mem( 9349 ctx, pattern3_0, expr0_0, &expr1_0, 9350 )?; 9351 let expr3_0 = C::value_reg(ctx, expr2_0); 9352 return Some(expr3_0); 9353 } 9354 } 9355 } 9356 } 9357 } 9358 // Rule at src/isa/s390x/lower.isle line 200. 9359 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9360 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9361 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9362 let expr3_0 = C::value_reg(ctx, expr2_0); 9363 return Some(expr3_0); 9364 } 9365 &Opcode::Udiv => { 9366 let (pattern7_0, pattern7_1) = 9367 C::unpack_value_array_2(ctx, &pattern5_1); 9368 // Rule at src/isa/s390x/lower.isle line 303. 9369 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 9370 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9371 let expr2_0: u64 = 0; 9372 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 9373 let expr4_0 = 9374 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 9375 let expr5_0 = 9376 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 9377 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 9378 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9379 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 9380 ctx, expr0_0, expr7_0, expr6_0, 9381 )?; 9382 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 9383 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 9384 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 9385 let expr12_0 = C::value_reg(ctx, expr11_0); 9386 return Some(expr12_0); 9387 } 9388 &Opcode::Sdiv => { 9389 let (pattern7_0, pattern7_1) = 9390 C::unpack_value_array_2(ctx, &pattern5_1); 9391 // Rule at src/isa/s390x/lower.isle line 375. 9392 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 9393 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 9394 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 9395 let expr3_0 = 9396 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 9397 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 9398 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9399 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 9400 ctx, expr0_0, expr5_0, expr4_0, 9401 )?; 9402 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 9403 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 9404 )?; 9405 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 9406 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 9407 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 9408 let expr11_0 = C::value_reg(ctx, expr10_0); 9409 return Some(expr11_0); 9410 } 9411 &Opcode::Urem => { 9412 let (pattern7_0, pattern7_1) = 9413 C::unpack_value_array_2(ctx, &pattern5_1); 9414 // Rule at src/isa/s390x/lower.isle line 326. 9415 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 9416 let expr1_0: u64 = 0; 9417 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 9418 let expr3_0 = 9419 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 9420 let expr4_0 = 9421 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 9422 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 9423 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9424 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 9425 ctx, expr0_0, expr6_0, expr5_0, 9426 )?; 9427 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 9428 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 9429 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 9430 let expr11_0 = C::value_reg(ctx, expr10_0); 9431 return Some(expr11_0); 9432 } 9433 &Opcode::Srem => { 9434 let (pattern7_0, pattern7_1) = 9435 C::unpack_value_array_2(ctx, &pattern5_1); 9436 // Rule at src/isa/s390x/lower.isle line 398. 9437 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 9438 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 9439 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 9440 let expr3_0 = 9441 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 9442 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 9443 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9444 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 9445 ctx, expr0_0, expr5_0, expr4_0, 9446 )?; 9447 let expr7_0 = constructor_maybe_avoid_srem_overflow( 9448 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 9449 )?; 9450 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 9451 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 9452 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 9453 let expr11_0 = C::value_reg(ctx, expr10_0); 9454 return Some(expr11_0); 9455 } 9456 &Opcode::IaddIfcout => { 9457 let (pattern7_0, pattern7_1) = 9458 C::unpack_value_array_2(ctx, &pattern5_1); 9459 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 9460 // Rule at src/isa/s390x/lower.isle line 170. 9461 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9462 let expr1_0 = constructor_add_logical_zimm32( 9463 ctx, pattern3_0, expr0_0, pattern8_0, 9464 )?; 9465 let expr2_0 = constructor_value_regs_ifcout(ctx, expr1_0)?; 9466 return Some(expr2_0); 9467 } 9468 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9469 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9470 if let &InstructionData::Unary { 9471 opcode: ref pattern10_0, 9472 arg: pattern10_1, 9473 } = &pattern9_0 9474 { 9475 if let &Opcode::Uextend = &pattern10_0 { 9476 let pattern12_0 = C::value_type(ctx, pattern10_1); 9477 if pattern12_0 == I32 { 9478 // Rule at src/isa/s390x/lower.isle line 164. 9479 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9480 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9481 let expr2_0 = constructor_add_logical_reg_zext32( 9482 ctx, pattern3_0, expr0_0, expr1_0, 9483 )?; 9484 let expr3_0 = 9485 constructor_value_regs_ifcout(ctx, expr2_0)?; 9486 return Some(expr3_0); 9487 } 9488 } 9489 } 9490 } 9491 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9492 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9493 if let &InstructionData::Load { 9494 opcode: ref pattern10_0, 9495 arg: pattern10_1, 9496 flags: pattern10_2, 9497 offset: pattern10_3, 9498 } = &pattern9_0 9499 { 9500 if let &Opcode::Uload32 = &pattern10_0 { 9501 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9502 // Rule at src/isa/s390x/lower.isle line 182. 9503 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9504 let expr1_0 = 9505 constructor_sink_uload32(ctx, pattern8_0)?; 9506 let expr2_0 = constructor_add_logical_mem_zext32( 9507 ctx, pattern3_0, expr0_0, &expr1_0, 9508 )?; 9509 let expr3_0 = 9510 constructor_value_regs_ifcout(ctx, expr2_0)?; 9511 return Some(expr3_0); 9512 } 9513 } 9514 } 9515 } 9516 let pattern8_0 = C::value_type(ctx, pattern7_0); 9517 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9518 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9519 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9520 if let &InstructionData::Load { 9521 opcode: ref pattern12_0, 9522 arg: pattern12_1, 9523 flags: pattern12_2, 9524 offset: pattern12_3, 9525 } = &pattern11_0 9526 { 9527 if let &Opcode::Load = &pattern12_0 { 9528 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9529 // Rule at src/isa/s390x/lower.isle line 176. 9530 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9531 let expr1_0 = 9532 constructor_sink_load(ctx, pattern10_0)?; 9533 let expr2_0 = constructor_add_logical_mem( 9534 ctx, pattern3_0, expr0_0, &expr1_0, 9535 )?; 9536 let expr3_0 = 9537 constructor_value_regs_ifcout(ctx, expr2_0)?; 9538 return Some(expr3_0); 9539 } 9540 } 9541 } 9542 } 9543 } 9544 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 9545 // Rule at src/isa/s390x/lower.isle line 168. 9546 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9547 let expr1_0 = constructor_add_logical_zimm32( 9548 ctx, pattern3_0, expr0_0, pattern8_0, 9549 )?; 9550 let expr2_0 = constructor_value_regs_ifcout(ctx, expr1_0)?; 9551 return Some(expr2_0); 9552 } 9553 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9554 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9555 if let &InstructionData::Unary { 9556 opcode: ref pattern10_0, 9557 arg: pattern10_1, 9558 } = &pattern9_0 9559 { 9560 if let &Opcode::Uextend = &pattern10_0 { 9561 let pattern12_0 = C::value_type(ctx, pattern10_1); 9562 if pattern12_0 == I32 { 9563 // Rule at src/isa/s390x/lower.isle line 162. 9564 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9565 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9566 let expr2_0 = constructor_add_logical_reg_zext32( 9567 ctx, pattern3_0, expr0_0, expr1_0, 9568 )?; 9569 let expr3_0 = 9570 constructor_value_regs_ifcout(ctx, expr2_0)?; 9571 return Some(expr3_0); 9572 } 9573 } 9574 } 9575 } 9576 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9577 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9578 if let &InstructionData::Load { 9579 opcode: ref pattern10_0, 9580 arg: pattern10_1, 9581 flags: pattern10_2, 9582 offset: pattern10_3, 9583 } = &pattern9_0 9584 { 9585 if let &Opcode::Uload32 = &pattern10_0 { 9586 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9587 // Rule at src/isa/s390x/lower.isle line 180. 9588 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9589 let expr1_0 = 9590 constructor_sink_uload32(ctx, pattern8_0)?; 9591 let expr2_0 = constructor_add_logical_mem_zext32( 9592 ctx, pattern3_0, expr0_0, &expr1_0, 9593 )?; 9594 let expr3_0 = 9595 constructor_value_regs_ifcout(ctx, expr2_0)?; 9596 return Some(expr3_0); 9597 } 9598 } 9599 } 9600 } 9601 let pattern8_0 = C::value_type(ctx, pattern7_1); 9602 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9603 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9604 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9605 if let &InstructionData::Load { 9606 opcode: ref pattern12_0, 9607 arg: pattern12_1, 9608 flags: pattern12_2, 9609 offset: pattern12_3, 9610 } = &pattern11_0 9611 { 9612 if let &Opcode::Load = &pattern12_0 { 9613 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9614 // Rule at src/isa/s390x/lower.isle line 174. 9615 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9616 let expr1_0 = 9617 constructor_sink_load(ctx, pattern10_0)?; 9618 let expr2_0 = constructor_add_logical_mem( 9619 ctx, pattern3_0, expr0_0, &expr1_0, 9620 )?; 9621 let expr3_0 = 9622 constructor_value_regs_ifcout(ctx, expr2_0)?; 9623 return Some(expr3_0); 9624 } 9625 } 9626 } 9627 } 9628 } 9629 // Rule at src/isa/s390x/lower.isle line 158. 9630 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9631 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9632 let expr2_0 = 9633 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9634 let expr3_0 = constructor_value_regs_ifcout(ctx, expr2_0)?; 9635 return Some(expr3_0); 9636 } 9637 &Opcode::Band => { 9638 let (pattern7_0, pattern7_1) = 9639 C::unpack_value_array_2(ctx, &pattern5_1); 9640 let pattern8_0 = C::value_type(ctx, pattern7_0); 9641 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9642 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9643 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9644 if let &InstructionData::Load { 9645 opcode: ref pattern12_0, 9646 arg: pattern12_1, 9647 flags: pattern12_2, 9648 offset: pattern12_3, 9649 } = &pattern11_0 9650 { 9651 if let &Opcode::Load = &pattern12_0 { 9652 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9653 // Rule at src/isa/s390x/lower.isle line 653. 9654 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9655 let expr1_0 = 9656 constructor_sink_load(ctx, pattern10_0)?; 9657 let expr2_0 = constructor_and_mem( 9658 ctx, pattern3_0, expr0_0, &expr1_0, 9659 )?; 9660 let expr3_0 = C::value_reg(ctx, expr2_0); 9661 return Some(expr3_0); 9662 } 9663 } 9664 } 9665 } 9666 } 9667 if let Some(pattern8_0) = 9668 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 9669 { 9670 // Rule at src/isa/s390x/lower.isle line 647. 9671 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9672 let expr1_0 = constructor_and_uimm32shifted( 9673 ctx, pattern3_0, expr0_0, pattern8_0, 9674 )?; 9675 let expr2_0 = C::value_reg(ctx, expr1_0); 9676 return Some(expr2_0); 9677 } 9678 if let Some(pattern8_0) = 9679 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 9680 { 9681 // Rule at src/isa/s390x/lower.isle line 643. 9682 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9683 let expr1_0 = constructor_and_uimm16shifted( 9684 ctx, pattern3_0, expr0_0, pattern8_0, 9685 )?; 9686 let expr2_0 = C::value_reg(ctx, expr1_0); 9687 return Some(expr2_0); 9688 } 9689 let pattern8_0 = C::value_type(ctx, pattern7_1); 9690 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9691 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9692 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9693 if let &InstructionData::Load { 9694 opcode: ref pattern12_0, 9695 arg: pattern12_1, 9696 flags: pattern12_2, 9697 offset: pattern12_3, 9698 } = &pattern11_0 9699 { 9700 if let &Opcode::Load = &pattern12_0 { 9701 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9702 // Rule at src/isa/s390x/lower.isle line 651. 9703 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9704 let expr1_0 = 9705 constructor_sink_load(ctx, pattern10_0)?; 9706 let expr2_0 = constructor_and_mem( 9707 ctx, pattern3_0, expr0_0, &expr1_0, 9708 )?; 9709 let expr3_0 = C::value_reg(ctx, expr2_0); 9710 return Some(expr3_0); 9711 } 9712 } 9713 } 9714 } 9715 } 9716 if let Some(pattern8_0) = 9717 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 9718 { 9719 // Rule at src/isa/s390x/lower.isle line 645. 9720 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9721 let expr1_0 = constructor_and_uimm32shifted( 9722 ctx, pattern3_0, expr0_0, pattern8_0, 9723 )?; 9724 let expr2_0 = C::value_reg(ctx, expr1_0); 9725 return Some(expr2_0); 9726 } 9727 if let Some(pattern8_0) = 9728 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 9729 { 9730 // Rule at src/isa/s390x/lower.isle line 641. 9731 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9732 let expr1_0 = constructor_and_uimm16shifted( 9733 ctx, pattern3_0, expr0_0, pattern8_0, 9734 )?; 9735 let expr2_0 = C::value_reg(ctx, expr1_0); 9736 return Some(expr2_0); 9737 } 9738 // Rule at src/isa/s390x/lower.isle line 637. 9739 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9740 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9741 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9742 let expr3_0 = C::value_reg(ctx, expr2_0); 9743 return Some(expr3_0); 9744 } 9745 &Opcode::Bor => { 9746 let (pattern7_0, pattern7_1) = 9747 C::unpack_value_array_2(ctx, &pattern5_1); 9748 let pattern8_0 = C::value_type(ctx, pattern7_0); 9749 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9750 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9751 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9752 if let &InstructionData::Load { 9753 opcode: ref pattern12_0, 9754 arg: pattern12_1, 9755 flags: pattern12_2, 9756 offset: pattern12_3, 9757 } = &pattern11_0 9758 { 9759 if let &Opcode::Load = &pattern12_0 { 9760 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9761 // Rule at src/isa/s390x/lower.isle line 676. 9762 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9763 let expr1_0 = 9764 constructor_sink_load(ctx, pattern10_0)?; 9765 let expr2_0 = constructor_or_mem( 9766 ctx, pattern3_0, expr0_0, &expr1_0, 9767 )?; 9768 let expr3_0 = C::value_reg(ctx, expr2_0); 9769 return Some(expr3_0); 9770 } 9771 } 9772 } 9773 } 9774 } 9775 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 9776 // Rule at src/isa/s390x/lower.isle line 670. 9777 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9778 let expr1_0 = constructor_or_uimm32shifted( 9779 ctx, pattern3_0, expr0_0, pattern8_0, 9780 )?; 9781 let expr2_0 = C::value_reg(ctx, expr1_0); 9782 return Some(expr2_0); 9783 } 9784 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 9785 // Rule at src/isa/s390x/lower.isle line 666. 9786 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9787 let expr1_0 = constructor_or_uimm16shifted( 9788 ctx, pattern3_0, expr0_0, pattern8_0, 9789 )?; 9790 let expr2_0 = C::value_reg(ctx, expr1_0); 9791 return Some(expr2_0); 9792 } 9793 let pattern8_0 = C::value_type(ctx, pattern7_1); 9794 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9795 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9796 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9797 if let &InstructionData::Load { 9798 opcode: ref pattern12_0, 9799 arg: pattern12_1, 9800 flags: pattern12_2, 9801 offset: pattern12_3, 9802 } = &pattern11_0 9803 { 9804 if let &Opcode::Load = &pattern12_0 { 9805 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9806 // Rule at src/isa/s390x/lower.isle line 674. 9807 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9808 let expr1_0 = 9809 constructor_sink_load(ctx, pattern10_0)?; 9810 let expr2_0 = constructor_or_mem( 9811 ctx, pattern3_0, expr0_0, &expr1_0, 9812 )?; 9813 let expr3_0 = C::value_reg(ctx, expr2_0); 9814 return Some(expr3_0); 9815 } 9816 } 9817 } 9818 } 9819 } 9820 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 9821 // Rule at src/isa/s390x/lower.isle line 668. 9822 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9823 let expr1_0 = constructor_or_uimm32shifted( 9824 ctx, pattern3_0, expr0_0, pattern8_0, 9825 )?; 9826 let expr2_0 = C::value_reg(ctx, expr1_0); 9827 return Some(expr2_0); 9828 } 9829 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 9830 // Rule at src/isa/s390x/lower.isle line 664. 9831 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9832 let expr1_0 = constructor_or_uimm16shifted( 9833 ctx, pattern3_0, expr0_0, pattern8_0, 9834 )?; 9835 let expr2_0 = C::value_reg(ctx, expr1_0); 9836 return Some(expr2_0); 9837 } 9838 // Rule at src/isa/s390x/lower.isle line 660. 9839 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9840 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9841 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9842 let expr3_0 = C::value_reg(ctx, expr2_0); 9843 return Some(expr3_0); 9844 } 9845 &Opcode::Bxor => { 9846 let (pattern7_0, pattern7_1) = 9847 C::unpack_value_array_2(ctx, &pattern5_1); 9848 let pattern8_0 = C::value_type(ctx, pattern7_0); 9849 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9850 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9851 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9852 if let &InstructionData::Load { 9853 opcode: ref pattern12_0, 9854 arg: pattern12_1, 9855 flags: pattern12_2, 9856 offset: pattern12_3, 9857 } = &pattern11_0 9858 { 9859 if let &Opcode::Load = &pattern12_0 { 9860 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9861 // Rule at src/isa/s390x/lower.isle line 695. 9862 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9863 let expr1_0 = 9864 constructor_sink_load(ctx, pattern10_0)?; 9865 let expr2_0 = constructor_xor_mem( 9866 ctx, pattern3_0, expr0_0, &expr1_0, 9867 )?; 9868 let expr3_0 = C::value_reg(ctx, expr2_0); 9869 return Some(expr3_0); 9870 } 9871 } 9872 } 9873 } 9874 } 9875 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 9876 // Rule at src/isa/s390x/lower.isle line 689. 9877 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9878 let expr1_0 = constructor_xor_uimm32shifted( 9879 ctx, pattern3_0, expr0_0, pattern8_0, 9880 )?; 9881 let expr2_0 = C::value_reg(ctx, expr1_0); 9882 return Some(expr2_0); 9883 } 9884 let pattern8_0 = C::value_type(ctx, pattern7_1); 9885 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9886 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9887 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9888 if let &InstructionData::Load { 9889 opcode: ref pattern12_0, 9890 arg: pattern12_1, 9891 flags: pattern12_2, 9892 offset: pattern12_3, 9893 } = &pattern11_0 9894 { 9895 if let &Opcode::Load = &pattern12_0 { 9896 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9897 // Rule at src/isa/s390x/lower.isle line 693. 9898 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9899 let expr1_0 = 9900 constructor_sink_load(ctx, pattern10_0)?; 9901 let expr2_0 = constructor_xor_mem( 9902 ctx, pattern3_0, expr0_0, &expr1_0, 9903 )?; 9904 let expr3_0 = C::value_reg(ctx, expr2_0); 9905 return Some(expr3_0); 9906 } 9907 } 9908 } 9909 } 9910 } 9911 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 9912 // Rule at src/isa/s390x/lower.isle line 687. 9913 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9914 let expr1_0 = constructor_xor_uimm32shifted( 9915 ctx, pattern3_0, expr0_0, pattern8_0, 9916 )?; 9917 let expr2_0 = C::value_reg(ctx, expr1_0); 9918 return Some(expr2_0); 9919 } 9920 // Rule at src/isa/s390x/lower.isle line 683. 9921 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9922 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9923 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9924 let expr3_0 = C::value_reg(ctx, expr2_0); 9925 return Some(expr3_0); 9926 } 9927 &Opcode::Ishl => { 9928 let (pattern7_0, pattern7_1) = 9929 C::unpack_value_array_2(ctx, &pattern5_1); 9930 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 9931 // Rule at src/isa/s390x/lower.isle line 482. 9932 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 9933 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 9934 let expr2_0 = 9935 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 9936 let expr3_0 = C::value_reg(ctx, expr2_0); 9937 return Some(expr3_0); 9938 } 9939 // Rule at src/isa/s390x/lower.isle line 477. 9940 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9941 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 9942 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 9943 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 9944 let expr4_0 = C::value_reg(ctx, expr3_0); 9945 return Some(expr4_0); 9946 } 9947 &Opcode::Ushr => { 9948 let (pattern7_0, pattern7_1) = 9949 C::unpack_value_array_2(ctx, &pattern5_1); 9950 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 9951 // Rule at src/isa/s390x/lower.isle line 498. 9952 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 9953 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 9954 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9955 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 9956 let expr4_0 = C::value_reg(ctx, expr3_0); 9957 return Some(expr4_0); 9958 } 9959 // Rule at src/isa/s390x/lower.isle line 491. 9960 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 9961 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9962 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 9963 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9964 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 9965 let expr5_0 = C::value_reg(ctx, expr4_0); 9966 return Some(expr5_0); 9967 } 9968 &Opcode::Sshr => { 9969 let (pattern7_0, pattern7_1) = 9970 C::unpack_value_array_2(ctx, &pattern5_1); 9971 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 9972 // Rule at src/isa/s390x/lower.isle line 515. 9973 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 9974 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 9975 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9976 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 9977 let expr4_0 = C::value_reg(ctx, expr3_0); 9978 return Some(expr4_0); 9979 } 9980 // Rule at src/isa/s390x/lower.isle line 508. 9981 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 9982 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9983 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 9984 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 9985 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 9986 let expr5_0 = C::value_reg(ctx, expr4_0); 9987 return Some(expr5_0); 9988 } 9989 _ => {} 9990 } 9991 } 9992 &InstructionData::Unary { 9993 opcode: ref pattern5_0, 9994 arg: pattern5_1, 9995 } => { 9996 match &pattern5_0 { 9997 &Opcode::Ineg => { 9998 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 9999 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10000 if let &InstructionData::Unary { 10001 opcode: ref pattern9_0, 10002 arg: pattern9_1, 10003 } = &pattern8_0 10004 { 10005 if let &Opcode::Sextend = &pattern9_0 { 10006 let pattern11_0 = C::value_type(ctx, pattern9_1); 10007 if pattern11_0 == I32 { 10008 // Rule at src/isa/s390x/lower.isle line 193. 10009 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10010 let expr1_0 = constructor_neg_reg_sext32( 10011 ctx, pattern3_0, expr0_0, 10012 )?; 10013 let expr2_0 = C::value_reg(ctx, expr1_0); 10014 return Some(expr2_0); 10015 } 10016 } 10017 } 10018 } 10019 // Rule at src/isa/s390x/lower.isle line 189. 10020 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10021 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10022 let expr2_0 = C::value_reg(ctx, expr1_0); 10023 return Some(expr2_0); 10024 } 10025 &Opcode::Iabs => { 10026 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10027 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10028 if let &InstructionData::Unary { 10029 opcode: ref pattern9_0, 10030 arg: pattern9_1, 10031 } = &pattern8_0 10032 { 10033 if let &Opcode::Sextend = &pattern9_0 { 10034 let pattern11_0 = C::value_type(ctx, pattern9_1); 10035 if pattern11_0 == I32 { 10036 // Rule at src/isa/s390x/lower.isle line 141. 10037 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10038 let expr1_0 = constructor_abs_reg_sext32( 10039 ctx, pattern3_0, expr0_0, 10040 )?; 10041 let expr2_0 = C::value_reg(ctx, expr1_0); 10042 return Some(expr2_0); 10043 } 10044 } 10045 } 10046 } 10047 // Rule at src/isa/s390x/lower.isle line 137. 10048 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10049 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10050 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10051 let expr3_0 = C::value_reg(ctx, expr2_0); 10052 return Some(expr3_0); 10053 } 10054 &Opcode::Clz => { 10055 // Rule at src/isa/s390x/lower.isle line 821. 10056 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10057 let expr1_0: i16 = 64; 10058 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10059 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10060 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10061 let expr5_0 = C::value_reg(ctx, expr4_0); 10062 return Some(expr5_0); 10063 } 10064 &Opcode::Cls => { 10065 // Rule at src/isa/s390x/lower.isle line 836. 10066 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 10067 let expr1_0: Type = I64; 10068 let expr2_0: u8 = 63; 10069 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 10070 let expr4_0: Type = I64; 10071 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 10072 let expr6_0: i16 = 64; 10073 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 10074 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 10075 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 10076 let expr10_0 = C::value_reg(ctx, expr9_0); 10077 return Some(expr10_0); 10078 } 10079 &Opcode::Bint => { 10080 // Rule at src/isa/s390x/lower.isle line 804. 10081 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10082 let expr1_0: u64 = 1; 10083 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 10084 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 10085 let expr4_0 = C::value_reg(ctx, expr3_0); 10086 return Some(expr4_0); 10087 } 10088 _ => {} 10089 } 10090 } 10091 _ => {} 10092 } 10093 } 10094 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 10095 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10096 match &pattern4_0 { 10097 &InstructionData::Binary { 10098 opcode: ref pattern5_0, 10099 args: ref pattern5_1, 10100 } => { 10101 match &pattern5_0 { 10102 &Opcode::Rotl => { 10103 let (pattern7_0, pattern7_1) = 10104 C::unpack_value_array_2(ctx, &pattern5_1); 10105 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10106 // Rule at src/isa/s390x/lower.isle line 528. 10107 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10108 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10109 let expr2_0 = 10110 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10111 let expr3_0 = C::value_reg(ctx, expr2_0); 10112 return Some(expr3_0); 10113 } 10114 // Rule at src/isa/s390x/lower.isle line 524. 10115 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10116 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10117 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10118 let expr3_0 = C::value_reg(ctx, expr2_0); 10119 return Some(expr3_0); 10120 } 10121 &Opcode::Rotr => { 10122 let (pattern7_0, pattern7_1) = 10123 C::unpack_value_array_2(ctx, &pattern5_1); 10124 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 10125 // Rule at src/isa/s390x/lower.isle line 566. 10126 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10127 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10128 let expr2_0 = 10129 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10130 let expr3_0 = C::value_reg(ctx, expr2_0); 10131 return Some(expr3_0); 10132 } 10133 // Rule at src/isa/s390x/lower.isle line 560. 10134 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10135 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10136 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10137 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10138 let expr4_0 = C::value_reg(ctx, expr3_0); 10139 return Some(expr4_0); 10140 } 10141 _ => {} 10142 } 10143 } 10144 &InstructionData::AtomicRmw { 10145 opcode: ref pattern5_0, 10146 args: ref pattern5_1, 10147 flags: pattern5_2, 10148 op: ref pattern5_3, 10149 } => { 10150 if let &Opcode::AtomicRmw = &pattern5_0 { 10151 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); 10152 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10153 match &pattern5_3 { 10154 &AtomicRmwOp::Add => { 10155 // Rule at src/isa/s390x/lower.isle line 1519. 10156 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10157 let expr1_0 = C::zero_offset(ctx); 10158 let expr2_0 = constructor_lower_address( 10159 ctx, pattern5_2, pattern7_0, expr1_0, 10160 )?; 10161 let expr3_0 = constructor_atomic_rmw_add( 10162 ctx, pattern3_0, expr0_0, &expr2_0, 10163 )?; 10164 let expr4_0 = C::value_reg(ctx, expr3_0); 10165 return Some(expr4_0); 10166 } 10167 &AtomicRmwOp::And => { 10168 // Rule at src/isa/s390x/lower.isle line 1501. 10169 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10170 let expr1_0 = C::zero_offset(ctx); 10171 let expr2_0 = constructor_lower_address( 10172 ctx, pattern5_2, pattern7_0, expr1_0, 10173 )?; 10174 let expr3_0 = constructor_atomic_rmw_and( 10175 ctx, pattern3_0, expr0_0, &expr2_0, 10176 )?; 10177 let expr4_0 = C::value_reg(ctx, expr3_0); 10178 return Some(expr4_0); 10179 } 10180 &AtomicRmwOp::Or => { 10181 // Rule at src/isa/s390x/lower.isle line 1507. 10182 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10183 let expr1_0 = C::zero_offset(ctx); 10184 let expr2_0 = constructor_lower_address( 10185 ctx, pattern5_2, pattern7_0, expr1_0, 10186 )?; 10187 let expr3_0 = constructor_atomic_rmw_or( 10188 ctx, pattern3_0, expr0_0, &expr2_0, 10189 )?; 10190 let expr4_0 = C::value_reg(ctx, expr3_0); 10191 return Some(expr4_0); 10192 } 10193 &AtomicRmwOp::Sub => { 10194 // Rule at src/isa/s390x/lower.isle line 1525. 10195 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10196 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10197 let expr2_0 = C::zero_offset(ctx); 10198 let expr3_0 = constructor_lower_address( 10199 ctx, pattern5_2, pattern7_0, expr2_0, 10200 )?; 10201 let expr4_0 = constructor_atomic_rmw_add( 10202 ctx, pattern3_0, expr1_0, &expr3_0, 10203 )?; 10204 let expr5_0 = C::value_reg(ctx, expr4_0); 10205 return Some(expr5_0); 10206 } 10207 &AtomicRmwOp::Xor => { 10208 // Rule at src/isa/s390x/lower.isle line 1513. 10209 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10210 let expr1_0 = C::zero_offset(ctx); 10211 let expr2_0 = constructor_lower_address( 10212 ctx, pattern5_2, pattern7_0, expr1_0, 10213 )?; 10214 let expr3_0 = constructor_atomic_rmw_xor( 10215 ctx, pattern3_0, expr0_0, &expr2_0, 10216 )?; 10217 let expr4_0 = C::value_reg(ctx, expr3_0); 10218 return Some(expr4_0); 10219 } 10220 _ => {} 10221 } 10222 } 10223 } 10224 } 10225 &InstructionData::Unary { 10226 opcode: ref pattern5_0, 10227 arg: pattern5_1, 10228 } => { 10229 match &pattern5_0 { 10230 &Opcode::FcvtToUint => { 10231 let pattern7_0 = C::value_type(ctx, pattern5_1); 10232 // Rule at src/isa/s390x/lower.isle line 1057. 10233 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10234 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 10235 let expr2_0 = FloatCC::Unordered; 10236 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 10237 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 10238 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 10239 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 10240 ctx, pattern3_0, pattern7_0, expr0_0, 10241 )?; 10242 let expr7_0 = FloatCC::Unordered; 10243 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 10244 let expr9_0 = C::trap_code_integer_overflow(ctx); 10245 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 10246 let expr11_0 = C::value_reg(ctx, expr10_0); 10247 return Some(expr11_0); 10248 } 10249 &Opcode::FcvtToUintSat => { 10250 let pattern7_0 = C::value_type(ctx, pattern5_1); 10251 // Rule at src/isa/s390x/lower.isle line 1098. 10252 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10253 let expr1_0 = 10254 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 10255 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 10256 let expr3_0 = FloatCC::Unordered; 10257 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 10258 let expr5_0: i16 = 0; 10259 let expr6_0 = 10260 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 10261 let expr7_0 = constructor_with_flags_1(ctx, &expr2_0, &expr6_0)?; 10262 let expr8_0 = C::value_reg(ctx, expr7_0); 10263 return Some(expr8_0); 10264 } 10265 &Opcode::FcvtToSint => { 10266 let pattern7_0 = C::value_type(ctx, pattern5_1); 10267 // Rule at src/isa/s390x/lower.isle line 1078. 10268 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10269 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 10270 let expr2_0 = FloatCC::Unordered; 10271 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 10272 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 10273 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 10274 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 10275 ctx, pattern3_0, pattern7_0, expr0_0, 10276 )?; 10277 let expr7_0 = FloatCC::Unordered; 10278 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 10279 let expr9_0 = C::trap_code_integer_overflow(ctx); 10280 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 10281 let expr11_0 = C::value_reg(ctx, expr10_0); 10282 return Some(expr11_0); 10283 } 10284 &Opcode::FcvtToSintSat => { 10285 let pattern7_0 = C::value_type(ctx, pattern5_1); 10286 // Rule at src/isa/s390x/lower.isle line 1115. 10287 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10288 let expr1_0 = 10289 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 10290 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 10291 let expr3_0 = FloatCC::Unordered; 10292 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 10293 let expr5_0: i16 = 0; 10294 let expr6_0 = 10295 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 10296 let expr7_0 = constructor_with_flags_1(ctx, &expr2_0, &expr6_0)?; 10297 let expr8_0 = C::value_reg(ctx, expr7_0); 10298 return Some(expr8_0); 10299 } 10300 _ => {} 10301 } 10302 } 10303 _ => {} 10304 } 10305 } 10306 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 10307 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10308 if let &InstructionData::Binary { 10309 opcode: ref pattern5_0, 10310 args: ref pattern5_1, 10311 } = &pattern4_0 10312 { 10313 match &pattern5_0 { 10314 &Opcode::Umulhi => { 10315 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); 10316 // Rule at src/isa/s390x/lower.isle line 245. 10317 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10318 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10319 let expr2_0: Type = I32; 10320 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 10321 let expr4_0: Type = I32; 10322 let expr5_0 = C::ty_bits(ctx, pattern3_0); 10323 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 10324 let expr7_0 = C::value_reg(ctx, expr6_0); 10325 return Some(expr7_0); 10326 } 10327 &Opcode::Smulhi => { 10328 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); 10329 // Rule at src/isa/s390x/lower.isle line 267. 10330 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10331 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10332 let expr2_0: Type = I32; 10333 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 10334 let expr4_0: Type = I32; 10335 let expr5_0 = C::ty_bits(ctx, pattern3_0); 10336 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 10337 let expr7_0 = C::value_reg(ctx, expr6_0); 10338 return Some(expr7_0); 10339 } 10340 &Opcode::Rotl => { 10341 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); 10342 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10343 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) { 10344 // Rule at src/isa/s390x/lower.isle line 546. 10345 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10346 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10347 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10348 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 10349 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 10350 let expr5_0 = constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 10351 let expr6_0 = 10352 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 10353 let expr7_0 = C::value_reg(ctx, expr6_0); 10354 return Some(expr7_0); 10355 } 10356 } 10357 // Rule at src/isa/s390x/lower.isle line 534. 10358 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10359 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10360 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 10361 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 10362 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 10363 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 10364 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 10365 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 10366 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 10367 let expr9_0 = C::value_reg(ctx, expr8_0); 10368 return Some(expr9_0); 10369 } 10370 &Opcode::Rotr => { 10371 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, &pattern5_1); 10372 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10373 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) { 10374 // Rule at src/isa/s390x/lower.isle line 584. 10375 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10376 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10377 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10378 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 10379 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 10380 let expr5_0 = constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 10381 let expr6_0 = 10382 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 10383 let expr7_0 = C::value_reg(ctx, expr6_0); 10384 return Some(expr7_0); 10385 } 10386 } 10387 // Rule at src/isa/s390x/lower.isle line 572. 10388 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10389 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10390 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 10391 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 10392 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 10393 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 10394 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 10395 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 10396 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 10397 let expr9_0 = C::value_reg(ctx, expr8_0); 10398 return Some(expr9_0); 10399 } 10400 _ => {} 10401 } 10402 } 10403 } 10404 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 10405 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10406 match &pattern4_0 { 10407 &InstructionData::Unary { 10408 opcode: ref pattern5_0, 10409 arg: pattern5_1, 10410 } => { 10411 match &pattern5_0 { 10412 &Opcode::Ctz => { 10413 // Rule at src/isa/s390x/lower.isle line 859. 10414 let expr0_0: Type = I64; 10415 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 10416 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 10417 let expr3_0 = 10418 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 10419 let expr4_0: Type = I64; 10420 let expr5_0: Type = I64; 10421 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 10422 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 10423 let expr8_0: i16 = 64; 10424 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 10425 let expr10_0: u64 = 63; 10426 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 10427 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 10428 let expr13_0 = 10429 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 10430 let expr14_0 = C::value_reg(ctx, expr13_0); 10431 return Some(expr14_0); 10432 } 10433 &Opcode::Uextend => { 10434 // Rule at src/isa/s390x/lower.isle line 603. 10435 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 10436 let expr1_0 = C::value_reg(ctx, expr0_0); 10437 return Some(expr1_0); 10438 } 10439 &Opcode::Sextend => { 10440 // Rule at src/isa/s390x/lower.isle line 614. 10441 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10442 let expr1_0 = C::value_reg(ctx, expr0_0); 10443 return Some(expr1_0); 10444 } 10445 _ => {} 10446 } 10447 } 10448 &InstructionData::Load { 10449 opcode: ref pattern5_0, 10450 arg: pattern5_1, 10451 flags: pattern5_2, 10452 offset: pattern5_3, 10453 } => { 10454 match &pattern5_0 { 10455 &Opcode::Uload8 => { 10456 // Rule at src/isa/s390x/lower.isle line 1255. 10457 let expr0_0: Type = I8; 10458 let expr1_0 = 10459 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 10460 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 10461 let expr3_0 = C::value_reg(ctx, expr2_0); 10462 return Some(expr3_0); 10463 } 10464 &Opcode::Sload8 => { 10465 // Rule at src/isa/s390x/lower.isle line 1266. 10466 let expr0_0: Type = I8; 10467 let expr1_0 = 10468 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 10469 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 10470 let expr3_0 = C::value_reg(ctx, expr2_0); 10471 return Some(expr3_0); 10472 } 10473 &Opcode::Uload16 => { 10474 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10475 // Rule at src/isa/s390x/lower.isle line 1282. 10476 let expr0_0 = constructor_lower_address( 10477 ctx, pattern5_2, pattern5_1, pattern5_3, 10478 )?; 10479 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 10480 let expr2_0: Type = I16; 10481 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 10482 let expr4_0 = C::value_reg(ctx, expr3_0); 10483 return Some(expr4_0); 10484 } 10485 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10486 // Rule at src/isa/s390x/lower.isle line 1277. 10487 let expr0_0: Type = I16; 10488 let expr1_0 = constructor_lower_address( 10489 ctx, pattern5_2, pattern5_1, pattern5_3, 10490 )?; 10491 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 10492 let expr3_0 = C::value_reg(ctx, expr2_0); 10493 return Some(expr3_0); 10494 } 10495 } 10496 &Opcode::Sload16 => { 10497 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10498 // Rule at src/isa/s390x/lower.isle line 1307. 10499 let expr0_0 = constructor_lower_address( 10500 ctx, pattern5_2, pattern5_1, pattern5_3, 10501 )?; 10502 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 10503 let expr2_0: Type = I16; 10504 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 10505 let expr4_0 = C::value_reg(ctx, expr3_0); 10506 return Some(expr4_0); 10507 } 10508 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10509 // Rule at src/isa/s390x/lower.isle line 1302. 10510 let expr0_0: Type = I16; 10511 let expr1_0 = constructor_lower_address( 10512 ctx, pattern5_2, pattern5_1, pattern5_3, 10513 )?; 10514 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 10515 let expr3_0 = C::value_reg(ctx, expr2_0); 10516 return Some(expr3_0); 10517 } 10518 } 10519 _ => {} 10520 } 10521 } 10522 _ => {} 10523 } 10524 } 10525 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 10526 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10527 match &pattern4_0 { 10528 &InstructionData::Unary { 10529 opcode: ref pattern5_0, 10530 arg: pattern5_1, 10531 } => { 10532 match &pattern5_0 { 10533 &Opcode::Ctz => { 10534 // Rule at src/isa/s390x/lower.isle line 874. 10535 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10536 let expr1_0: Type = I64; 10537 let expr2_0: Type = I64; 10538 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 10539 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 10540 let expr5_0: i16 = -1; 10541 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 10542 let expr7_0: Type = I64; 10543 let expr8_0: Type = I64; 10544 let expr9_0: u64 = 63; 10545 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 10546 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 10547 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 10548 let expr13_0 = C::value_reg(ctx, expr12_0); 10549 return Some(expr13_0); 10550 } 10551 &Opcode::Uextend => { 10552 // Rule at src/isa/s390x/lower.isle line 607. 10553 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10554 let expr1_0 = C::value_reg(ctx, expr0_0); 10555 return Some(expr1_0); 10556 } 10557 &Opcode::Sextend => { 10558 // Rule at src/isa/s390x/lower.isle line 618. 10559 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 10560 let expr1_0 = C::value_reg(ctx, expr0_0); 10561 return Some(expr1_0); 10562 } 10563 _ => {} 10564 } 10565 } 10566 &InstructionData::Load { 10567 opcode: ref pattern5_0, 10568 arg: pattern5_1, 10569 flags: pattern5_2, 10570 offset: pattern5_3, 10571 } => { 10572 match &pattern5_0 { 10573 &Opcode::Uload8 => { 10574 // Rule at src/isa/s390x/lower.isle line 1259. 10575 let expr0_0: Type = I8; 10576 let expr1_0 = 10577 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 10578 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 10579 let expr3_0 = C::value_reg(ctx, expr2_0); 10580 return Some(expr3_0); 10581 } 10582 &Opcode::Sload8 => { 10583 // Rule at src/isa/s390x/lower.isle line 1270. 10584 let expr0_0: Type = I8; 10585 let expr1_0 = 10586 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 10587 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 10588 let expr3_0 = C::value_reg(ctx, expr2_0); 10589 return Some(expr3_0); 10590 } 10591 &Opcode::Uload16 => { 10592 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10593 // Rule at src/isa/s390x/lower.isle line 1293. 10594 let expr0_0 = constructor_lower_address( 10595 ctx, pattern5_2, pattern5_1, pattern5_3, 10596 )?; 10597 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 10598 let expr2_0: Type = I16; 10599 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 10600 let expr4_0 = C::value_reg(ctx, expr3_0); 10601 return Some(expr4_0); 10602 } 10603 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10604 // Rule at src/isa/s390x/lower.isle line 1288. 10605 let expr0_0: Type = I16; 10606 let expr1_0 = constructor_lower_address( 10607 ctx, pattern5_2, pattern5_1, pattern5_3, 10608 )?; 10609 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 10610 let expr3_0 = C::value_reg(ctx, expr2_0); 10611 return Some(expr3_0); 10612 } 10613 } 10614 &Opcode::Sload16 => { 10615 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10616 // Rule at src/isa/s390x/lower.isle line 1318. 10617 let expr0_0 = constructor_lower_address( 10618 ctx, pattern5_2, pattern5_1, pattern5_3, 10619 )?; 10620 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 10621 let expr2_0: Type = I16; 10622 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 10623 let expr4_0 = C::value_reg(ctx, expr3_0); 10624 return Some(expr4_0); 10625 } 10626 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10627 // Rule at src/isa/s390x/lower.isle line 1313. 10628 let expr0_0: Type = I16; 10629 let expr1_0 = constructor_lower_address( 10630 ctx, pattern5_2, pattern5_1, pattern5_3, 10631 )?; 10632 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 10633 let expr3_0 = C::value_reg(ctx, expr2_0); 10634 return Some(expr3_0); 10635 } 10636 } 10637 &Opcode::Uload32 => { 10638 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10639 // Rule at src/isa/s390x/lower.isle line 1332. 10640 let expr0_0 = constructor_lower_address( 10641 ctx, pattern5_2, pattern5_1, pattern5_3, 10642 )?; 10643 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 10644 let expr2_0: Type = I32; 10645 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 10646 let expr4_0 = C::value_reg(ctx, expr3_0); 10647 return Some(expr4_0); 10648 } 10649 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10650 // Rule at src/isa/s390x/lower.isle line 1327. 10651 let expr0_0: Type = I32; 10652 let expr1_0 = constructor_lower_address( 10653 ctx, pattern5_2, pattern5_1, pattern5_3, 10654 )?; 10655 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 10656 let expr3_0 = C::value_reg(ctx, expr2_0); 10657 return Some(expr3_0); 10658 } 10659 } 10660 &Opcode::Sload32 => { 10661 if let Some(()) = C::littleendian(ctx, pattern5_2) { 10662 // Rule at src/isa/s390x/lower.isle line 1346. 10663 let expr0_0 = constructor_lower_address( 10664 ctx, pattern5_2, pattern5_1, pattern5_3, 10665 )?; 10666 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 10667 let expr2_0: Type = I32; 10668 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 10669 let expr4_0 = C::value_reg(ctx, expr3_0); 10670 return Some(expr4_0); 10671 } 10672 if let Some(()) = C::bigendian(ctx, pattern5_2) { 10673 // Rule at src/isa/s390x/lower.isle line 1341. 10674 let expr0_0: Type = I32; 10675 let expr1_0 = constructor_lower_address( 10676 ctx, pattern5_2, pattern5_1, pattern5_3, 10677 )?; 10678 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 10679 let expr3_0 = C::value_reg(ctx, expr2_0); 10680 return Some(expr3_0); 10681 } 10682 } 10683 _ => {} 10684 } 10685 } 10686 _ => {} 10687 } 10688 } 10689 } 10690 return None; 10691 } 10692 10693 // Generated as internal constructor for term lower_branch. 10694 pub fn constructor_lower_branch<C: Context>( 10695 ctx: &mut C, 10696 arg0: Inst, 10697 arg1: &VecMachLabel, 10698 ) -> Option<ValueRegs> { 10699 let pattern0_0 = arg0; 10700 let pattern1_0 = C::inst_data(ctx, pattern0_0); 10701 match &pattern1_0 { 10702 &InstructionData::BranchTable { 10703 opcode: ref pattern2_0, 10704 arg: pattern2_1, 10705 destination: pattern2_2, 10706 table: pattern2_3, 10707 } => { 10708 if let &Opcode::BrTable = &pattern2_0 { 10709 let pattern4_0 = arg1; 10710 // Rule at src/isa/s390x/lower.isle line 1799. 10711 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 10712 let expr1_0: Type = I64; 10713 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 10714 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 10715 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 10716 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 10717 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 10718 let expr7_0: u8 = 0; 10719 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 10720 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 10721 let expr10_0 = constructor_value_regs_none(ctx, &expr9_0)?; 10722 let expr11_0: Type = I64; 10723 let expr12_0: u8 = 2; 10724 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 10725 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 10726 let expr15_0 = constructor_value_regs_none(ctx, &expr14_0)?; 10727 return Some(expr15_0); 10728 } 10729 } 10730 &InstructionData::Branch { 10731 opcode: ref pattern2_0, 10732 args: pattern2_1, 10733 destination: pattern2_2, 10734 } => { 10735 match &pattern2_0 { 10736 &Opcode::Brz => { 10737 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 10738 let pattern5_0 = arg1; 10739 // Rule at src/isa/s390x/lower.isle line 1832. 10740 let expr0_0 = constructor_value_nonzero(ctx, pattern4_0)?; 10741 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 10742 let expr2_0: u8 = 0; 10743 let expr3_0 = C::vec_element(ctx, pattern5_0, expr2_0); 10744 let expr4_0: u8 = 1; 10745 let expr5_0 = C::vec_element(ctx, pattern5_0, expr4_0); 10746 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 10747 let expr7_0 = constructor_value_regs_none(ctx, &expr6_0)?; 10748 return Some(expr7_0); 10749 } 10750 &Opcode::Brnz => { 10751 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 10752 let pattern5_0 = arg1; 10753 // Rule at src/isa/s390x/lower.isle line 1843. 10754 let expr0_0 = constructor_value_nonzero(ctx, pattern4_0)?; 10755 let expr1_0: u8 = 0; 10756 let expr2_0 = C::vec_element(ctx, pattern5_0, expr1_0); 10757 let expr3_0: u8 = 1; 10758 let expr4_0 = C::vec_element(ctx, pattern5_0, expr3_0); 10759 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 10760 let expr6_0 = constructor_value_regs_none(ctx, &expr5_0)?; 10761 return Some(expr6_0); 10762 } 10763 _ => {} 10764 } 10765 } 10766 &InstructionData::Jump { 10767 opcode: ref pattern2_0, 10768 args: pattern2_1, 10769 destination: pattern2_2, 10770 } => { 10771 if let &Opcode::Jump = &pattern2_0 { 10772 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 10773 let pattern5_0 = arg1; 10774 // Rule at src/isa/s390x/lower.isle line 1791. 10775 let expr0_0: u8 = 0; 10776 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 10777 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 10778 let expr3_0 = constructor_value_regs_none(ctx, &expr2_0)?; 10779 return Some(expr3_0); 10780 } 10781 } 10782 &InstructionData::BranchInt { 10783 opcode: ref pattern2_0, 10784 args: pattern2_1, 10785 cond: ref pattern2_2, 10786 destination: pattern2_3, 10787 } => { 10788 if let &Opcode::Brif = &pattern2_0 { 10789 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 10790 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 10791 let pattern6_0 = C::inst_data(ctx, pattern5_0); 10792 if let &InstructionData::Binary { 10793 opcode: ref pattern7_0, 10794 args: ref pattern7_1, 10795 } = &pattern6_0 10796 { 10797 if let &Opcode::Ifcmp = &pattern7_0 { 10798 let (pattern9_0, pattern9_1) = 10799 C::unpack_value_array_2(ctx, &pattern7_1); 10800 let pattern10_0 = arg1; 10801 // Rule at src/isa/s390x/lower.isle line 1854. 10802 let expr0_0: bool = false; 10803 let expr1_0 = constructor_icmp_val( 10804 ctx, 10805 expr0_0, 10806 &pattern2_2, 10807 pattern9_0, 10808 pattern9_1, 10809 )?; 10810 let expr2_0: u8 = 0; 10811 let expr3_0 = C::vec_element(ctx, pattern10_0, expr2_0); 10812 let expr4_0: u8 = 1; 10813 let expr5_0 = C::vec_element(ctx, pattern10_0, expr4_0); 10814 let expr6_0 = 10815 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 10816 let expr7_0 = constructor_value_regs_none(ctx, &expr6_0)?; 10817 return Some(expr7_0); 10818 } 10819 } 10820 } 10821 } 10822 } 10823 _ => {} 10824 } 10825 return None; 10826 } 10827 10828 // Generated as internal constructor for term value_regs_ifcout. 10829 pub fn constructor_value_regs_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<ValueRegs> { 10830 let pattern0_0 = arg0; 10831 // Rule at src/isa/s390x/lower.isle line 154. 10832 let expr0_0: Type = I64; 10833 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 10834 let expr2_0 = C::writable_reg_to_reg(ctx, expr1_0); 10835 let expr3_0 = C::value_regs(ctx, pattern0_0, expr2_0); 10836 return Some(expr3_0); 10837 } 10838 10839 // Generated as internal constructor for term zero_divisor_check_needed. 10840 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 10841 let pattern0_0 = arg0; 10842 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 10843 let pattern2_0 = 0; 10844 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 10845 // Rule at src/isa/s390x/lower.isle line 344. 10846 let expr0_0: bool = false; 10847 return Some(expr0_0); 10848 } 10849 } 10850 let pattern1_0 = C::value_type(ctx, pattern0_0); 10851 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 10852 // Rule at src/isa/s390x/lower.isle line 345. 10853 let expr0_0: bool = false; 10854 return Some(expr0_0); 10855 } 10856 // Rule at src/isa/s390x/lower.isle line 346. 10857 let expr0_0: bool = true; 10858 return Some(expr0_0); 10859 } 10860 10861 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 10862 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 10863 ctx: &mut C, 10864 arg0: bool, 10865 arg1: Type, 10866 arg2: Reg, 10867 ) -> Option<Reg> { 10868 let pattern0_0 = arg0; 10869 if pattern0_0 == true { 10870 let pattern2_0 = arg1; 10871 let pattern3_0 = arg2; 10872 // Rule at src/isa/s390x/lower.isle line 352. 10873 let expr0_0: i16 = 0; 10874 let expr1_0 = IntCC::Equal; 10875 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 10876 let expr3_0 = C::trap_code_division_by_zero(ctx); 10877 let expr4_0 = constructor_icmps_simm16_and_trap( 10878 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 10879 )?; 10880 return Some(expr4_0); 10881 } 10882 if pattern0_0 == false { 10883 let pattern2_0 = arg1; 10884 let pattern3_0 = arg2; 10885 // Rule at src/isa/s390x/lower.isle line 351. 10886 let expr0_0 = C::invalid_reg(ctx); 10887 return Some(expr0_0); 10888 } 10889 return None; 10890 } 10891 10892 // Generated as internal constructor for term div_overflow_check_needed. 10893 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 10894 let pattern0_0 = arg0; 10895 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 10896 let pattern2_0 = -1; 10897 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 10898 // Rule at src/isa/s390x/lower.isle line 425. 10899 let expr0_0: bool = false; 10900 return Some(expr0_0); 10901 } 10902 } 10903 // Rule at src/isa/s390x/lower.isle line 426. 10904 let expr0_0: bool = true; 10905 return Some(expr0_0); 10906 } 10907 10908 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 10909 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 10910 ctx: &mut C, 10911 arg0: bool, 10912 arg1: Type, 10913 arg2: Type, 10914 arg3: &RegPair, 10915 arg4: Reg, 10916 ) -> Option<Reg> { 10917 let pattern0_0 = arg0; 10918 if pattern0_0 == true { 10919 let pattern2_0 = arg1; 10920 let pattern3_0 = arg2; 10921 let pattern4_0 = arg3; 10922 let pattern5_0 = arg4; 10923 // Rule at src/isa/s390x/lower.isle line 439. 10924 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 10925 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 10926 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 10927 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 10928 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 10929 let expr5_0: i16 = -1; 10930 let expr6_0 = IntCC::Equal; 10931 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 10932 let expr8_0 = C::trap_code_integer_overflow(ctx); 10933 let expr9_0 = constructor_icmps_simm16_and_trap( 10934 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 10935 )?; 10936 return Some(expr9_0); 10937 } 10938 if pattern0_0 == false { 10939 let pattern2_0 = arg1; 10940 let pattern3_0 = arg2; 10941 let pattern4_0 = arg3; 10942 let pattern5_0 = arg4; 10943 // Rule at src/isa/s390x/lower.isle line 438. 10944 let expr0_0 = C::invalid_reg(ctx); 10945 return Some(expr0_0); 10946 } 10947 return None; 10948 } 10949 10950 // Generated as internal constructor for term int_max. 10951 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 10952 let pattern0_0 = arg0; 10953 if pattern0_0 == I8 { 10954 // Rule at src/isa/s390x/lower.isle line 447. 10955 let expr0_0: u64 = 127; 10956 return Some(expr0_0); 10957 } 10958 if pattern0_0 == I16 { 10959 // Rule at src/isa/s390x/lower.isle line 448. 10960 let expr0_0: u64 = 32767; 10961 return Some(expr0_0); 10962 } 10963 if pattern0_0 == I32 { 10964 // Rule at src/isa/s390x/lower.isle line 449. 10965 let expr0_0: u64 = 2147483647; 10966 return Some(expr0_0); 10967 } 10968 if pattern0_0 == I64 { 10969 // Rule at src/isa/s390x/lower.isle line 450. 10970 let expr0_0: u64 = 9223372036854775807; 10971 return Some(expr0_0); 10972 } 10973 return None; 10974 } 10975 10976 // Generated as internal constructor for term maybe_avoid_srem_overflow. 10977 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 10978 ctx: &mut C, 10979 arg0: bool, 10980 arg1: Type, 10981 arg2: &RegPair, 10982 arg3: Reg, 10983 ) -> Option<RegPair> { 10984 let pattern0_0 = arg0; 10985 if pattern0_0 == true { 10986 let pattern2_0 = arg1; 10987 if pattern2_0 == I32 { 10988 let pattern4_0 = arg2; 10989 let pattern5_0 = arg3; 10990 // Rule at src/isa/s390x/lower.isle line 468. 10991 return Some(pattern4_0.clone()); 10992 } 10993 if pattern2_0 == I64 { 10994 let pattern4_0 = arg2; 10995 let pattern5_0 = arg3; 10996 // Rule at src/isa/s390x/lower.isle line 469. 10997 let expr0_0: Type = I64; 10998 let expr1_0: Type = I64; 10999 let expr2_0: i16 = -1; 11000 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 11001 let expr4_0 = IntCC::Equal; 11002 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11003 let expr6_0: i16 = 0; 11004 let expr7_0 = constructor_cmov_imm_regpair_lo( 11005 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 11006 )?; 11007 return Some(expr7_0); 11008 } 11009 } 11010 if pattern0_0 == false { 11011 let pattern2_0 = arg1; 11012 let pattern3_0 = arg2; 11013 let pattern4_0 = arg3; 11014 // Rule at src/isa/s390x/lower.isle line 467. 11015 return Some(pattern3_0.clone()); 11016 } 11017 return None; 11018 } 11019 11020 // Generated as internal constructor for term cast_bool. 11021 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 11022 let pattern0_0 = arg0; 11023 if pattern0_0 == B1 { 11024 let pattern2_0 = arg1; 11025 let pattern3_0 = C::value_type(ctx, pattern2_0); 11026 if pattern3_0 == B1 { 11027 // Rule at src/isa/s390x/lower.isle line 766. 11028 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11029 return Some(expr0_0); 11030 } 11031 if pattern3_0 == B8 { 11032 // Rule at src/isa/s390x/lower.isle line 767. 11033 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11034 return Some(expr0_0); 11035 } 11036 } 11037 if pattern0_0 == B8 { 11038 let pattern2_0 = arg1; 11039 let pattern3_0 = C::value_type(ctx, pattern2_0); 11040 if pattern3_0 == B8 { 11041 // Rule at src/isa/s390x/lower.isle line 768. 11042 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11043 return Some(expr0_0); 11044 } 11045 } 11046 if pattern0_0 == I8 { 11047 let pattern2_0 = arg1; 11048 let pattern3_0 = C::value_type(ctx, pattern2_0); 11049 if pattern3_0 == B8 { 11050 // Rule at src/isa/s390x/lower.isle line 769. 11051 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11052 return Some(expr0_0); 11053 } 11054 } 11055 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 11056 let pattern2_0 = arg1; 11057 let pattern3_0 = C::value_type(ctx, pattern2_0); 11058 if pattern3_0 == B16 { 11059 // Rule at src/isa/s390x/lower.isle line 770. 11060 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11061 return Some(expr0_0); 11062 } 11063 } 11064 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 11065 let pattern2_0 = arg1; 11066 let pattern3_0 = C::value_type(ctx, pattern2_0); 11067 if pattern3_0 == B32 { 11068 // Rule at src/isa/s390x/lower.isle line 771. 11069 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11070 return Some(expr0_0); 11071 } 11072 } 11073 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 11074 let pattern2_0 = arg1; 11075 let pattern3_0 = C::value_type(ctx, pattern2_0); 11076 if pattern3_0 == B64 { 11077 // Rule at src/isa/s390x/lower.isle line 772. 11078 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11079 return Some(expr0_0); 11080 } 11081 } 11082 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 11083 let pattern2_0 = arg1; 11084 let pattern3_0 = C::value_type(ctx, pattern2_0); 11085 if pattern3_0 == B1 { 11086 // Rule at src/isa/s390x/lower.isle line 775. 11087 let expr0_0: Type = I32; 11088 let expr1_0: Type = I32; 11089 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 11090 let expr3_0: u8 = 31; 11091 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 11092 let expr5_0: u8 = 31; 11093 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 11094 return Some(expr6_0); 11095 } 11096 if pattern3_0 == B8 { 11097 // Rule at src/isa/s390x/lower.isle line 781. 11098 let expr0_0: Type = I8; 11099 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 11100 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 11101 return Some(expr2_0); 11102 } 11103 if pattern3_0 == B16 { 11104 // Rule at src/isa/s390x/lower.isle line 783. 11105 let expr0_0: Type = I16; 11106 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 11107 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 11108 return Some(expr2_0); 11109 } 11110 } 11111 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 11112 let pattern2_0 = arg1; 11113 let pattern3_0 = C::value_type(ctx, pattern2_0); 11114 if pattern3_0 == B1 { 11115 // Rule at src/isa/s390x/lower.isle line 777. 11116 let expr0_0: Type = I64; 11117 let expr1_0: Type = I64; 11118 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 11119 let expr3_0: u8 = 63; 11120 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 11121 let expr5_0: u8 = 63; 11122 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 11123 return Some(expr6_0); 11124 } 11125 if pattern3_0 == B8 { 11126 // Rule at src/isa/s390x/lower.isle line 785. 11127 let expr0_0: Type = I8; 11128 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 11129 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 11130 return Some(expr2_0); 11131 } 11132 if pattern3_0 == B16 { 11133 // Rule at src/isa/s390x/lower.isle line 787. 11134 let expr0_0: Type = I16; 11135 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 11136 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 11137 return Some(expr2_0); 11138 } 11139 if pattern3_0 == B32 { 11140 // Rule at src/isa/s390x/lower.isle line 789. 11141 let expr0_0: Type = I32; 11142 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 11143 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 11144 return Some(expr2_0); 11145 } 11146 } 11147 return None; 11148 } 11149 11150 // Generated as internal constructor for term clz_offset. 11151 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 11152 let pattern0_0 = arg0; 11153 if pattern0_0 == I8 { 11154 let pattern2_0 = arg1; 11155 // Rule at src/isa/s390x/lower.isle line 814. 11156 let expr0_0: Type = I8; 11157 let expr1_0: i16 = -56; 11158 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 11159 return Some(expr2_0); 11160 } 11161 if pattern0_0 == I16 { 11162 let pattern2_0 = arg1; 11163 // Rule at src/isa/s390x/lower.isle line 815. 11164 let expr0_0: Type = I16; 11165 let expr1_0: i16 = -48; 11166 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 11167 return Some(expr2_0); 11168 } 11169 if pattern0_0 == I32 { 11170 let pattern2_0 = arg1; 11171 // Rule at src/isa/s390x/lower.isle line 816. 11172 let expr0_0: Type = I32; 11173 let expr1_0: i16 = -32; 11174 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 11175 return Some(expr2_0); 11176 } 11177 if pattern0_0 == I64 { 11178 let pattern2_0 = arg1; 11179 // Rule at src/isa/s390x/lower.isle line 817. 11180 let expr0_0: Type = I64; 11181 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 11182 return Some(expr1_0); 11183 } 11184 return None; 11185 } 11186 11187 // Generated as internal constructor for term ctz_guardbit. 11188 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 11189 let pattern0_0 = arg0; 11190 if pattern0_0 == I8 { 11191 // Rule at src/isa/s390x/lower.isle line 866. 11192 let expr0_0: u16 = 256; 11193 let expr1_0: u8 = 0; 11194 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 11195 return Some(expr2_0); 11196 } 11197 if pattern0_0 == I16 { 11198 // Rule at src/isa/s390x/lower.isle line 867. 11199 let expr0_0: u16 = 1; 11200 let expr1_0: u8 = 16; 11201 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 11202 return Some(expr2_0); 11203 } 11204 if pattern0_0 == I32 { 11205 // Rule at src/isa/s390x/lower.isle line 868. 11206 let expr0_0: u16 = 1; 11207 let expr1_0: u8 = 32; 11208 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 11209 return Some(expr2_0); 11210 } 11211 return None; 11212 } 11213 11214 // Generated as internal constructor for term istore8_impl. 11215 pub fn constructor_istore8_impl<C: Context>( 11216 ctx: &mut C, 11217 arg0: MemFlags, 11218 arg1: Value, 11219 arg2: Value, 11220 arg3: Offset32, 11221 ) -> Option<SideEffectNoResult> { 11222 let pattern0_0 = arg0; 11223 let pattern1_0 = arg1; 11224 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 11225 let pattern3_0 = arg2; 11226 let pattern4_0 = arg3; 11227 // Rule at src/isa/s390x/lower.isle line 1428. 11228 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11229 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 11230 return Some(expr1_0); 11231 } 11232 let pattern2_0 = arg2; 11233 let pattern3_0 = arg3; 11234 // Rule at src/isa/s390x/lower.isle line 1424. 11235 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 11236 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 11237 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 11238 return Some(expr2_0); 11239 } 11240 11241 // Generated as internal constructor for term istore16_impl. 11242 pub fn constructor_istore16_impl<C: Context>( 11243 ctx: &mut C, 11244 arg0: MemFlags, 11245 arg1: Value, 11246 arg2: Value, 11247 arg3: Offset32, 11248 ) -> Option<SideEffectNoResult> { 11249 let pattern0_0 = arg0; 11250 if let Some(()) = C::littleendian(ctx, pattern0_0) { 11251 let pattern2_0 = arg1; 11252 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 11253 let pattern4_0 = arg2; 11254 let pattern5_0 = arg3; 11255 // Rule at src/isa/s390x/lower.isle line 1454. 11256 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 11257 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 11258 return Some(expr1_0); 11259 } 11260 let pattern3_0 = arg2; 11261 let pattern4_0 = arg3; 11262 // Rule at src/isa/s390x/lower.isle line 1446. 11263 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11264 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11265 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 11266 return Some(expr2_0); 11267 } 11268 if let Some(()) = C::bigendian(ctx, pattern0_0) { 11269 let pattern2_0 = arg1; 11270 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 11271 let pattern4_0 = arg2; 11272 let pattern5_0 = arg3; 11273 // Rule at src/isa/s390x/lower.isle line 1450. 11274 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 11275 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 11276 return Some(expr1_0); 11277 } 11278 let pattern3_0 = arg2; 11279 let pattern4_0 = arg3; 11280 // Rule at src/isa/s390x/lower.isle line 1442. 11281 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11282 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11283 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 11284 return Some(expr2_0); 11285 } 11286 return None; 11287 } 11288 11289 // Generated as internal constructor for term istore32_impl. 11290 pub fn constructor_istore32_impl<C: Context>( 11291 ctx: &mut C, 11292 arg0: MemFlags, 11293 arg1: Value, 11294 arg2: Value, 11295 arg3: Offset32, 11296 ) -> Option<SideEffectNoResult> { 11297 let pattern0_0 = arg0; 11298 if let Some(()) = C::littleendian(ctx, pattern0_0) { 11299 let pattern2_0 = arg1; 11300 let pattern3_0 = arg2; 11301 let pattern4_0 = arg3; 11302 // Rule at src/isa/s390x/lower.isle line 1476. 11303 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11304 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11305 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 11306 return Some(expr2_0); 11307 } 11308 if let Some(()) = C::bigendian(ctx, pattern0_0) { 11309 let pattern2_0 = arg1; 11310 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 11311 let pattern4_0 = arg2; 11312 let pattern5_0 = arg3; 11313 // Rule at src/isa/s390x/lower.isle line 1472. 11314 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 11315 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 11316 return Some(expr1_0); 11317 } 11318 let pattern3_0 = arg2; 11319 let pattern4_0 = arg3; 11320 // Rule at src/isa/s390x/lower.isle line 1468. 11321 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11322 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11323 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 11324 return Some(expr2_0); 11325 } 11326 return None; 11327 } 11328 11329 // Generated as internal constructor for term istore64_impl. 11330 pub fn constructor_istore64_impl<C: Context>( 11331 ctx: &mut C, 11332 arg0: MemFlags, 11333 arg1: Value, 11334 arg2: Value, 11335 arg3: Offset32, 11336 ) -> Option<SideEffectNoResult> { 11337 let pattern0_0 = arg0; 11338 if let Some(()) = C::littleendian(ctx, pattern0_0) { 11339 let pattern2_0 = arg1; 11340 let pattern3_0 = arg2; 11341 let pattern4_0 = arg3; 11342 // Rule at src/isa/s390x/lower.isle line 1494. 11343 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11344 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11345 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 11346 return Some(expr2_0); 11347 } 11348 if let Some(()) = C::bigendian(ctx, pattern0_0) { 11349 let pattern2_0 = arg1; 11350 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 11351 let pattern4_0 = arg2; 11352 let pattern5_0 = arg3; 11353 // Rule at src/isa/s390x/lower.isle line 1490. 11354 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 11355 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 11356 return Some(expr1_0); 11357 } 11358 let pattern3_0 = arg2; 11359 let pattern4_0 = arg3; 11360 // Rule at src/isa/s390x/lower.isle line 1486. 11361 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11362 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11363 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 11364 return Some(expr2_0); 11365 } 11366 return None; 11367 } 11368 11369 // Generated as internal constructor for term atomic_store_impl. 11370 pub fn constructor_atomic_store_impl<C: Context>( 11371 ctx: &mut C, 11372 arg0: &SideEffectNoResult, 11373 ) -> Option<ValueRegs> { 11374 let pattern0_0 = arg0; 11375 // Rule at src/isa/s390x/lower.isle line 1581. 11376 let expr0_0 = constructor_value_regs_none(ctx, pattern0_0)?; 11377 let expr1_0 = constructor_fence_impl(ctx)?; 11378 let expr2_0 = constructor_value_regs_none(ctx, &expr1_0)?; 11379 return Some(expr2_0); 11380 } 11381 11382 // Generated as internal constructor for term icmp_val. 11383 pub fn constructor_icmp_val<C: Context>( 11384 ctx: &mut C, 11385 arg0: bool, 11386 arg1: &IntCC, 11387 arg2: Value, 11388 arg3: Value, 11389 ) -> Option<ProducesBool> { 11390 let pattern0_0 = arg0; 11391 let pattern1_0 = arg1; 11392 if let Some(()) = C::signed(ctx, pattern1_0) { 11393 let pattern3_0 = arg2; 11394 let pattern4_0 = arg3; 11395 // Rule at src/isa/s390x/lower.isle line 1648. 11396 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11397 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 11398 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 11399 return Some(expr2_0); 11400 } 11401 if let Some(()) = C::unsigned(ctx, pattern1_0) { 11402 let pattern3_0 = arg2; 11403 let pattern4_0 = arg3; 11404 // Rule at src/isa/s390x/lower.isle line 1651. 11405 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 11406 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 11407 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 11408 return Some(expr2_0); 11409 } 11410 return None; 11411 } 11412 11413 // Generated as internal constructor for term icmps_val. 11414 pub fn constructor_icmps_val<C: Context>( 11415 ctx: &mut C, 11416 arg0: bool, 11417 arg1: Value, 11418 arg2: Value, 11419 ) -> Option<ProducesFlags> { 11420 let pattern0_0 = arg0; 11421 if pattern0_0 == true { 11422 let pattern2_0 = arg1; 11423 let pattern3_0 = C::value_type(ctx, pattern2_0); 11424 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 11425 let pattern5_0 = arg2; 11426 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 11427 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11428 if let &InstructionData::Load { 11429 opcode: ref pattern8_0, 11430 arg: pattern8_1, 11431 flags: pattern8_2, 11432 offset: pattern8_3, 11433 } = &pattern7_0 11434 { 11435 match &pattern8_0 { 11436 &Opcode::Sload16 => { 11437 if let Some(()) = C::bigendian(ctx, pattern8_2) { 11438 // Rule at src/isa/s390x/lower.isle line 1681. 11439 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11440 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 11441 let expr2_0 = constructor_icmps_mem_sext16( 11442 ctx, pattern4_0, expr0_0, &expr1_0, 11443 )?; 11444 return Some(expr2_0); 11445 } 11446 } 11447 &Opcode::Sload32 => { 11448 if let Some(()) = C::bigendian(ctx, pattern8_2) { 11449 // Rule at src/isa/s390x/lower.isle line 1683. 11450 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11451 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 11452 let expr2_0 = constructor_icmps_mem_sext32( 11453 ctx, pattern4_0, expr0_0, &expr1_0, 11454 )?; 11455 return Some(expr2_0); 11456 } 11457 } 11458 _ => {} 11459 } 11460 } 11461 } 11462 let pattern6_0 = C::value_type(ctx, pattern5_0); 11463 if pattern6_0 == I16 { 11464 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 11465 let pattern9_0 = C::inst_data(ctx, pattern8_0); 11466 if let &InstructionData::Load { 11467 opcode: ref pattern10_0, 11468 arg: pattern10_1, 11469 flags: pattern10_2, 11470 offset: pattern10_3, 11471 } = &pattern9_0 11472 { 11473 if let &Opcode::Load = &pattern10_0 { 11474 if let Some(()) = C::bigendian(ctx, pattern10_2) { 11475 // Rule at src/isa/s390x/lower.isle line 1677. 11476 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 11477 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 11478 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 11479 let expr3_0 = 11480 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 11481 return Some(expr3_0); 11482 } 11483 } 11484 } 11485 } 11486 } 11487 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 11488 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 11489 let pattern9_0 = C::inst_data(ctx, pattern8_0); 11490 if let &InstructionData::Load { 11491 opcode: ref pattern10_0, 11492 arg: pattern10_1, 11493 flags: pattern10_2, 11494 offset: pattern10_3, 11495 } = &pattern9_0 11496 { 11497 if let &Opcode::Load = &pattern10_0 { 11498 if let Some(()) = C::bigendian(ctx, pattern10_2) { 11499 // Rule at src/isa/s390x/lower.isle line 1673. 11500 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11501 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 11502 let expr2_0 = 11503 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 11504 return Some(expr2_0); 11505 } 11506 } 11507 } 11508 } 11509 } 11510 } 11511 } 11512 let pattern1_0 = arg1; 11513 let pattern2_0 = C::value_type(ctx, pattern1_0); 11514 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 11515 let pattern4_0 = arg2; 11516 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 11517 // Rule at src/isa/s390x/lower.isle line 1667. 11518 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11519 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 11520 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 11521 return Some(expr2_0); 11522 } 11523 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 11524 // Rule at src/isa/s390x/lower.isle line 1669. 11525 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11526 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 11527 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 11528 return Some(expr2_0); 11529 } 11530 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 11531 let pattern6_0 = C::inst_data(ctx, pattern5_0); 11532 if let &InstructionData::Unary { 11533 opcode: ref pattern7_0, 11534 arg: pattern7_1, 11535 } = &pattern6_0 11536 { 11537 if let &Opcode::Sextend = &pattern7_0 { 11538 let pattern9_0 = C::value_type(ctx, pattern7_1); 11539 if pattern9_0 == I32 { 11540 // Rule at src/isa/s390x/lower.isle line 1663. 11541 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 11542 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11543 let expr2_0 = 11544 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 11545 return Some(expr2_0); 11546 } 11547 } 11548 } 11549 } 11550 // Rule at src/isa/s390x/lower.isle line 1659. 11551 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11552 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 11553 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 11554 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 11555 return Some(expr3_0); 11556 } 11557 return None; 11558 } 11559 11560 // Generated as internal constructor for term icmpu_val. 11561 pub fn constructor_icmpu_val<C: Context>( 11562 ctx: &mut C, 11563 arg0: bool, 11564 arg1: Value, 11565 arg2: Value, 11566 ) -> Option<ProducesFlags> { 11567 let pattern0_0 = arg0; 11568 if pattern0_0 == true { 11569 let pattern2_0 = arg1; 11570 let pattern3_0 = C::value_type(ctx, pattern2_0); 11571 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 11572 let pattern5_0 = arg2; 11573 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 11574 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11575 if let &InstructionData::Load { 11576 opcode: ref pattern8_0, 11577 arg: pattern8_1, 11578 flags: pattern8_2, 11579 offset: pattern8_3, 11580 } = &pattern7_0 11581 { 11582 match &pattern8_0 { 11583 &Opcode::Uload16 => { 11584 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 11585 if let Some((pattern11_0, pattern11_1, pattern11_2)) = 11586 C::symbol_value_data(ctx, pattern10_0) 11587 { 11588 if let Some(()) = C::reloc_distance_near(ctx, &pattern11_1) { 11589 let pattern13_0 = C::i64_from_offset(ctx, pattern8_3); 11590 let closure14 = || { 11591 return Some(pattern11_2); 11592 }; 11593 if let Some(pattern14_0) = closure14() { 11594 if let Some(pattern15_0) = C::memarg_symbol_offset_sum( 11595 ctx, 11596 pattern13_0, 11597 pattern14_0, 11598 ) { 11599 let pattern16_0 = C::inst_data(ctx, pattern6_0); 11600 if let &InstructionData::Load { 11601 opcode: ref pattern17_0, 11602 arg: pattern17_1, 11603 flags: pattern17_2, 11604 offset: pattern17_3, 11605 } = &pattern16_0 11606 { 11607 if let &Opcode::Uload16 = &pattern17_0 { 11608 if let Some(()) = 11609 C::bigendian(ctx, pattern17_2) 11610 { 11611 // Rule at src/isa/s390x/lower.isle line 1716. 11612 let expr0_0 = 11613 C::put_in_reg(ctx, pattern2_0); 11614 let expr1_0 = constructor_sink_uload16( 11615 ctx, pattern6_0, 11616 )?; 11617 let expr2_0 = 11618 constructor_icmpu_mem_zext16( 11619 ctx, pattern4_0, expr0_0, 11620 &expr1_0, 11621 )?; 11622 return Some(expr2_0); 11623 } 11624 } 11625 } 11626 } 11627 } 11628 } 11629 } 11630 } 11631 } 11632 &Opcode::Uload32 => { 11633 if let Some(()) = C::bigendian(ctx, pattern8_2) { 11634 // Rule at src/isa/s390x/lower.isle line 1719. 11635 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11636 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 11637 let expr2_0 = constructor_icmpu_mem_zext32( 11638 ctx, pattern4_0, expr0_0, &expr1_0, 11639 )?; 11640 return Some(expr2_0); 11641 } 11642 } 11643 _ => {} 11644 } 11645 } 11646 } 11647 let pattern6_0 = C::value_type(ctx, pattern5_0); 11648 if pattern6_0 == I16 { 11649 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 11650 let pattern9_0 = C::inst_data(ctx, pattern8_0); 11651 if let &InstructionData::Load { 11652 opcode: ref pattern10_0, 11653 arg: pattern10_1, 11654 flags: pattern10_2, 11655 offset: pattern10_3, 11656 } = &pattern9_0 11657 { 11658 if let &Opcode::Load = &pattern10_0 { 11659 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 11660 if let Some((pattern13_0, pattern13_1, pattern13_2)) = 11661 C::symbol_value_data(ctx, pattern12_0) 11662 { 11663 if let Some(()) = C::reloc_distance_near(ctx, &pattern13_1) { 11664 let pattern15_0 = C::i64_from_offset(ctx, pattern10_3); 11665 let closure16 = || { 11666 return Some(pattern13_2); 11667 }; 11668 if let Some(pattern16_0) = closure16() { 11669 if let Some(pattern17_0) = C::memarg_symbol_offset_sum( 11670 ctx, 11671 pattern15_0, 11672 pattern16_0, 11673 ) { 11674 let pattern18_0 = C::inst_data(ctx, pattern8_0); 11675 if let &InstructionData::Load { 11676 opcode: ref pattern19_0, 11677 arg: pattern19_1, 11678 flags: pattern19_2, 11679 offset: pattern19_3, 11680 } = &pattern18_0 11681 { 11682 if let &Opcode::Load = &pattern19_0 { 11683 if let Some(()) = 11684 C::bigendian(ctx, pattern19_2) 11685 { 11686 // Rule at src/isa/s390x/lower.isle line 1709. 11687 let expr0_0 = constructor_ty_ext32( 11688 ctx, pattern4_0, 11689 )?; 11690 let expr1_0 = 11691 constructor_put_in_reg_zext32( 11692 ctx, pattern2_0, 11693 )?; 11694 let expr2_0 = constructor_sink_load( 11695 ctx, pattern8_0, 11696 )?; 11697 let expr3_0 = 11698 constructor_icmpu_mem_zext16( 11699 ctx, expr0_0, expr1_0, &expr2_0, 11700 )?; 11701 return Some(expr3_0); 11702 } 11703 } 11704 } 11705 } 11706 } 11707 } 11708 } 11709 } 11710 } 11711 } 11712 } 11713 } 11714 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 11715 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 11716 let pattern9_0 = C::inst_data(ctx, pattern8_0); 11717 if let &InstructionData::Load { 11718 opcode: ref pattern10_0, 11719 arg: pattern10_1, 11720 flags: pattern10_2, 11721 offset: pattern10_3, 11722 } = &pattern9_0 11723 { 11724 if let &Opcode::Load = &pattern10_0 { 11725 if let Some(()) = C::bigendian(ctx, pattern10_2) { 11726 // Rule at src/isa/s390x/lower.isle line 1703. 11727 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 11728 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 11729 let expr2_0 = 11730 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 11731 return Some(expr2_0); 11732 } 11733 } 11734 } 11735 } 11736 } 11737 } 11738 } 11739 let pattern1_0 = arg1; 11740 let pattern2_0 = C::value_type(ctx, pattern1_0); 11741 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 11742 let pattern4_0 = arg2; 11743 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 11744 // Rule at src/isa/s390x/lower.isle line 1699. 11745 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11746 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 11747 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 11748 return Some(expr2_0); 11749 } 11750 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 11751 let pattern6_0 = C::inst_data(ctx, pattern5_0); 11752 if let &InstructionData::Unary { 11753 opcode: ref pattern7_0, 11754 arg: pattern7_1, 11755 } = &pattern6_0 11756 { 11757 if let &Opcode::Uextend = &pattern7_0 { 11758 let pattern9_0 = C::value_type(ctx, pattern7_1); 11759 if pattern9_0 == I32 { 11760 // Rule at src/isa/s390x/lower.isle line 1695. 11761 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 11762 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11763 let expr2_0 = 11764 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 11765 return Some(expr2_0); 11766 } 11767 } 11768 } 11769 } 11770 // Rule at src/isa/s390x/lower.isle line 1691. 11771 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11772 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 11773 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 11774 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 11775 return Some(expr3_0); 11776 } 11777 return None; 11778 } 11779 11780 // Generated as internal constructor for term fcmp_val. 11781 pub fn constructor_fcmp_val<C: Context>( 11782 ctx: &mut C, 11783 arg0: &FloatCC, 11784 arg1: Value, 11785 arg2: Value, 11786 ) -> Option<ProducesBool> { 11787 let pattern0_0 = arg0; 11788 let pattern1_0 = arg1; 11789 let pattern2_0 = C::value_type(ctx, pattern1_0); 11790 let pattern3_0 = arg2; 11791 // Rule at src/isa/s390x/lower.isle line 1732. 11792 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 11793 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 11794 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 11795 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 11796 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 11797 return Some(expr4_0); 11798 } 11799 11800 // Generated as internal constructor for term value_nonzero. 11801 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 11802 let pattern0_0 = arg0; 11803 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 11804 let pattern2_0 = C::inst_data(ctx, pattern1_0); 11805 match &pattern2_0 { 11806 &InstructionData::FloatCompare { 11807 opcode: ref pattern3_0, 11808 args: ref pattern3_1, 11809 cond: ref pattern3_2, 11810 } => { 11811 if let &Opcode::Fcmp = &pattern3_0 { 11812 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, &pattern3_1); 11813 // Rule at src/isa/s390x/lower.isle line 1760. 11814 let expr0_0 = constructor_fcmp_val(ctx, &pattern3_2, pattern5_0, pattern5_1)?; 11815 return Some(expr0_0); 11816 } 11817 } 11818 &InstructionData::IntCompare { 11819 opcode: ref pattern3_0, 11820 args: ref pattern3_1, 11821 cond: ref pattern3_2, 11822 } => { 11823 if let &Opcode::Icmp = &pattern3_0 { 11824 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, &pattern3_1); 11825 // Rule at src/isa/s390x/lower.isle line 1759. 11826 let expr0_0: bool = false; 11827 let expr1_0 = 11828 constructor_icmp_val(ctx, expr0_0, &pattern3_2, pattern5_0, pattern5_1)?; 11829 return Some(expr1_0); 11830 } 11831 } 11832 &InstructionData::Unary { 11833 opcode: ref pattern3_0, 11834 arg: pattern3_1, 11835 } => { 11836 if let &Opcode::Bint = &pattern3_0 { 11837 // Rule at src/isa/s390x/lower.isle line 1758. 11838 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 11839 return Some(expr0_0); 11840 } 11841 } 11842 _ => {} 11843 } 11844 } 11845 let pattern1_0 = C::value_type(ctx, pattern0_0); 11846 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 11847 // Rule at src/isa/s390x/lower.isle line 1761. 11848 let expr0_0: Type = I32; 11849 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 11850 let expr2_0: i16 = 0; 11851 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 11852 let expr4_0 = IntCC::NotEqual; 11853 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11854 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11855 return Some(expr6_0); 11856 } 11857 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 11858 // Rule at src/isa/s390x/lower.isle line 1764. 11859 let expr0_0: Type = I64; 11860 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 11861 let expr2_0: i16 = 0; 11862 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 11863 let expr4_0 = IntCC::NotEqual; 11864 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11865 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11866 return Some(expr6_0); 11867 } 11868 return None; 11869 } 11870