1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn i64_as_u64(&mut self, arg0: i64) -> u64; 43 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 44 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn ty_bits(&mut self, arg0: Type) -> u8; 47 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 48 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 49 fn ty_mask(&mut self, arg0: Type) -> u64; 50 fn ty_bytes(&mut self, arg0: Type) -> u16; 51 fn lane_type(&mut self, arg0: Type) -> Type; 52 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 53 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 55 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 57 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 58 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 59 fn vec128(&mut self, arg0: Type) -> Option<Type>; 60 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 61 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 62 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 63 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 64 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 65 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 66 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 67 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 68 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 69 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 70 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 71 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 72 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 73 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 74 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 75 fn value_type(&mut self, arg0: Value) -> Type; 76 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 77 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 78 fn emit(&mut self, arg0: &MInst) -> Unit; 79 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 80 fn trap_code_division_by_zero(&mut self) -> TrapCode; 81 fn trap_code_integer_overflow(&mut self) -> TrapCode; 82 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 83 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 84 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 85 fn symbol_value_data( 86 &mut self, 87 arg0: GlobalValue, 88 ) -> Option<(ExternalName, RelocDistance, i64)>; 89 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 90 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 91 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 92 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 93 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 94 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 95 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 96 fn zero_reg(&mut self) -> Reg; 97 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 98 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 99 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 100 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 101 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 102 fn u8_as_u16(&mut self, arg0: u8) -> u16; 103 fn u64_as_u32(&mut self, arg0: u64) -> u32; 104 fn u64_as_i16(&mut self, arg0: u64) -> i16; 105 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 106 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 107 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 108 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 109 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 110 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 111 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 112 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 113 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 114 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 115 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 116 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 117 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 118 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 119 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 120 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 121 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 122 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 123 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 124 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 125 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 126 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 127 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 128 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 129 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 130 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 131 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 132 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 133 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 134 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 135 fn zero_offset(&mut self) -> Offset32; 136 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 137 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 138 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 139 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 140 fn memflags_trusted(&mut self) -> MemFlags; 141 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 142 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 143 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 144 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 145 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 146 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 147 fn sink_inst(&mut self, arg0: Inst) -> Unit; 148 fn inst_builder_new(&mut self) -> VecMInstBuilder; 149 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 150 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 151 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 152 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 153 } 154 155 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 393. 156 #[derive(Clone, Debug)] 157 pub enum SideEffectNoResult { 158 Inst { inst: MInst }, 159 } 160 161 /// Internal type ProducesFlags: defined at src/prelude.isle line 415. 162 #[derive(Clone, Debug)] 163 pub enum ProducesFlags { 164 ProducesFlagsSideEffect { inst: MInst }, 165 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 166 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 167 } 168 169 /// Internal type ConsumesFlags: defined at src/prelude.isle line 426. 170 #[derive(Clone, Debug)] 171 pub enum ConsumesFlags { 172 ConsumesFlagsReturnsResultWithProducer { 173 inst: MInst, 174 result: Reg, 175 }, 176 ConsumesFlagsReturnsReg { 177 inst: MInst, 178 result: Reg, 179 }, 180 ConsumesFlagsTwiceReturnsValueRegs { 181 inst1: MInst, 182 inst2: MInst, 183 result: ValueRegs, 184 }, 185 ConsumesFlagsFourTimesReturnsValueRegs { 186 inst1: MInst, 187 inst2: MInst, 188 inst3: MInst, 189 inst4: MInst, 190 result: ValueRegs, 191 }, 192 } 193 194 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 195 #[derive(Clone, Debug)] 196 pub enum MInst { 197 Nop0, 198 Nop2, 199 AluRRR { 200 alu_op: ALUOp, 201 rd: WritableReg, 202 rn: Reg, 203 rm: Reg, 204 }, 205 AluRRSImm16 { 206 alu_op: ALUOp, 207 rd: WritableReg, 208 rn: Reg, 209 imm: i16, 210 }, 211 AluRR { 212 alu_op: ALUOp, 213 rd: WritableReg, 214 rm: Reg, 215 }, 216 AluRX { 217 alu_op: ALUOp, 218 rd: WritableReg, 219 mem: MemArg, 220 }, 221 AluRSImm16 { 222 alu_op: ALUOp, 223 rd: WritableReg, 224 imm: i16, 225 }, 226 AluRSImm32 { 227 alu_op: ALUOp, 228 rd: WritableReg, 229 imm: i32, 230 }, 231 AluRUImm32 { 232 alu_op: ALUOp, 233 rd: WritableReg, 234 imm: u32, 235 }, 236 AluRUImm16Shifted { 237 alu_op: ALUOp, 238 rd: WritableReg, 239 imm: UImm16Shifted, 240 }, 241 AluRUImm32Shifted { 242 alu_op: ALUOp, 243 rd: WritableReg, 244 imm: UImm32Shifted, 245 }, 246 SMulWide { 247 rn: Reg, 248 rm: Reg, 249 }, 250 UMulWide { 251 rn: Reg, 252 }, 253 SDivMod32 { 254 rn: Reg, 255 }, 256 SDivMod64 { 257 rn: Reg, 258 }, 259 UDivMod32 { 260 rn: Reg, 261 }, 262 UDivMod64 { 263 rn: Reg, 264 }, 265 Flogr { 266 rn: Reg, 267 }, 268 ShiftRR { 269 shift_op: ShiftOp, 270 rd: WritableReg, 271 rn: Reg, 272 shift_imm: u8, 273 shift_reg: Reg, 274 }, 275 RxSBG { 276 op: RxSBGOp, 277 rd: WritableReg, 278 rn: Reg, 279 start_bit: u8, 280 end_bit: u8, 281 rotate_amt: i8, 282 }, 283 RxSBGTest { 284 op: RxSBGOp, 285 rd: Reg, 286 rn: Reg, 287 start_bit: u8, 288 end_bit: u8, 289 rotate_amt: i8, 290 }, 291 UnaryRR { 292 op: UnaryOp, 293 rd: WritableReg, 294 rn: Reg, 295 }, 296 CmpRR { 297 op: CmpOp, 298 rn: Reg, 299 rm: Reg, 300 }, 301 CmpRX { 302 op: CmpOp, 303 rn: Reg, 304 mem: MemArg, 305 }, 306 CmpRSImm16 { 307 op: CmpOp, 308 rn: Reg, 309 imm: i16, 310 }, 311 CmpRSImm32 { 312 op: CmpOp, 313 rn: Reg, 314 imm: i32, 315 }, 316 CmpRUImm32 { 317 op: CmpOp, 318 rn: Reg, 319 imm: u32, 320 }, 321 CmpTrapRR { 322 op: CmpOp, 323 rn: Reg, 324 rm: Reg, 325 cond: Cond, 326 trap_code: TrapCode, 327 }, 328 CmpTrapRSImm16 { 329 op: CmpOp, 330 rn: Reg, 331 imm: i16, 332 cond: Cond, 333 trap_code: TrapCode, 334 }, 335 CmpTrapRUImm16 { 336 op: CmpOp, 337 rn: Reg, 338 imm: u16, 339 cond: Cond, 340 trap_code: TrapCode, 341 }, 342 AtomicRmw { 343 alu_op: ALUOp, 344 rd: WritableReg, 345 rn: Reg, 346 mem: MemArg, 347 }, 348 AtomicCas32 { 349 rd: WritableReg, 350 rn: Reg, 351 mem: MemArg, 352 }, 353 AtomicCas64 { 354 rd: WritableReg, 355 rn: Reg, 356 mem: MemArg, 357 }, 358 Fence, 359 Load32 { 360 rd: WritableReg, 361 mem: MemArg, 362 }, 363 Load32ZExt8 { 364 rd: WritableReg, 365 mem: MemArg, 366 }, 367 Load32SExt8 { 368 rd: WritableReg, 369 mem: MemArg, 370 }, 371 Load32ZExt16 { 372 rd: WritableReg, 373 mem: MemArg, 374 }, 375 Load32SExt16 { 376 rd: WritableReg, 377 mem: MemArg, 378 }, 379 Load64 { 380 rd: WritableReg, 381 mem: MemArg, 382 }, 383 Load64ZExt8 { 384 rd: WritableReg, 385 mem: MemArg, 386 }, 387 Load64SExt8 { 388 rd: WritableReg, 389 mem: MemArg, 390 }, 391 Load64ZExt16 { 392 rd: WritableReg, 393 mem: MemArg, 394 }, 395 Load64SExt16 { 396 rd: WritableReg, 397 mem: MemArg, 398 }, 399 Load64ZExt32 { 400 rd: WritableReg, 401 mem: MemArg, 402 }, 403 Load64SExt32 { 404 rd: WritableReg, 405 mem: MemArg, 406 }, 407 LoadRev16 { 408 rd: WritableReg, 409 mem: MemArg, 410 }, 411 LoadRev32 { 412 rd: WritableReg, 413 mem: MemArg, 414 }, 415 LoadRev64 { 416 rd: WritableReg, 417 mem: MemArg, 418 }, 419 Store8 { 420 rd: Reg, 421 mem: MemArg, 422 }, 423 Store16 { 424 rd: Reg, 425 mem: MemArg, 426 }, 427 Store32 { 428 rd: Reg, 429 mem: MemArg, 430 }, 431 Store64 { 432 rd: Reg, 433 mem: MemArg, 434 }, 435 StoreImm8 { 436 imm: u8, 437 mem: MemArg, 438 }, 439 StoreImm16 { 440 imm: i16, 441 mem: MemArg, 442 }, 443 StoreImm32SExt16 { 444 imm: i16, 445 mem: MemArg, 446 }, 447 StoreImm64SExt16 { 448 imm: i16, 449 mem: MemArg, 450 }, 451 StoreRev16 { 452 rd: Reg, 453 mem: MemArg, 454 }, 455 StoreRev32 { 456 rd: Reg, 457 mem: MemArg, 458 }, 459 StoreRev64 { 460 rd: Reg, 461 mem: MemArg, 462 }, 463 LoadMultiple64 { 464 rt: WritableReg, 465 rt2: WritableReg, 466 mem: MemArg, 467 }, 468 StoreMultiple64 { 469 rt: Reg, 470 rt2: Reg, 471 mem: MemArg, 472 }, 473 Mov32 { 474 rd: WritableReg, 475 rm: Reg, 476 }, 477 Mov64 { 478 rd: WritableReg, 479 rm: Reg, 480 }, 481 Mov32Imm { 482 rd: WritableReg, 483 imm: u32, 484 }, 485 Mov32SImm16 { 486 rd: WritableReg, 487 imm: i16, 488 }, 489 Mov64SImm16 { 490 rd: WritableReg, 491 imm: i16, 492 }, 493 Mov64SImm32 { 494 rd: WritableReg, 495 imm: i32, 496 }, 497 Mov64UImm16Shifted { 498 rd: WritableReg, 499 imm: UImm16Shifted, 500 }, 501 Mov64UImm32Shifted { 502 rd: WritableReg, 503 imm: UImm32Shifted, 504 }, 505 Insert64UImm16Shifted { 506 rd: WritableReg, 507 imm: UImm16Shifted, 508 }, 509 Insert64UImm32Shifted { 510 rd: WritableReg, 511 imm: UImm32Shifted, 512 }, 513 Extend { 514 rd: WritableReg, 515 rn: Reg, 516 signed: bool, 517 from_bits: u8, 518 to_bits: u8, 519 }, 520 CMov32 { 521 rd: WritableReg, 522 cond: Cond, 523 rm: Reg, 524 }, 525 CMov64 { 526 rd: WritableReg, 527 cond: Cond, 528 rm: Reg, 529 }, 530 CMov32SImm16 { 531 rd: WritableReg, 532 cond: Cond, 533 imm: i16, 534 }, 535 CMov64SImm16 { 536 rd: WritableReg, 537 cond: Cond, 538 imm: i16, 539 }, 540 FpuMove32 { 541 rd: WritableReg, 542 rn: Reg, 543 }, 544 FpuMove64 { 545 rd: WritableReg, 546 rn: Reg, 547 }, 548 FpuCMov32 { 549 rd: WritableReg, 550 cond: Cond, 551 rm: Reg, 552 }, 553 FpuCMov64 { 554 rd: WritableReg, 555 cond: Cond, 556 rm: Reg, 557 }, 558 MovToFpr { 559 rd: WritableReg, 560 rn: Reg, 561 }, 562 MovFromFpr { 563 rd: WritableReg, 564 rn: Reg, 565 }, 566 FpuRR { 567 fpu_op: FPUOp1, 568 rd: WritableReg, 569 rn: Reg, 570 }, 571 FpuRRR { 572 fpu_op: FPUOp2, 573 rd: WritableReg, 574 rm: Reg, 575 }, 576 FpuRRRR { 577 fpu_op: FPUOp3, 578 rd: WritableReg, 579 rn: Reg, 580 rm: Reg, 581 }, 582 FpuCopysign { 583 rd: WritableReg, 584 rn: Reg, 585 rm: Reg, 586 }, 587 FpuCmp32 { 588 rn: Reg, 589 rm: Reg, 590 }, 591 FpuCmp64 { 592 rn: Reg, 593 rm: Reg, 594 }, 595 FpuLoad32 { 596 rd: WritableReg, 597 mem: MemArg, 598 }, 599 FpuStore32 { 600 rd: Reg, 601 mem: MemArg, 602 }, 603 FpuLoad64 { 604 rd: WritableReg, 605 mem: MemArg, 606 }, 607 FpuStore64 { 608 rd: Reg, 609 mem: MemArg, 610 }, 611 FpuLoadRev32 { 612 rd: WritableReg, 613 mem: MemArg, 614 }, 615 FpuStoreRev32 { 616 rd: Reg, 617 mem: MemArg, 618 }, 619 FpuLoadRev64 { 620 rd: WritableReg, 621 mem: MemArg, 622 }, 623 FpuStoreRev64 { 624 rd: Reg, 625 mem: MemArg, 626 }, 627 LoadFpuConst32 { 628 rd: WritableReg, 629 const_data: u32, 630 }, 631 LoadFpuConst64 { 632 rd: WritableReg, 633 const_data: u64, 634 }, 635 FpuToInt { 636 op: FpuToIntOp, 637 rd: WritableReg, 638 rn: Reg, 639 }, 640 IntToFpu { 641 op: IntToFpuOp, 642 rd: WritableReg, 643 rn: Reg, 644 }, 645 FpuRound { 646 op: FpuRoundMode, 647 rd: WritableReg, 648 rn: Reg, 649 }, 650 FpuVecRRR { 651 fpu_op: FPUOp2, 652 rd: WritableReg, 653 rn: Reg, 654 rm: Reg, 655 }, 656 Call { 657 link: WritableReg, 658 info: BoxCallInfo, 659 }, 660 CallInd { 661 link: WritableReg, 662 info: BoxCallIndInfo, 663 }, 664 Ret { 665 link: Reg, 666 }, 667 EpiloguePlaceholder, 668 Jump { 669 dest: MachLabel, 670 }, 671 CondBr { 672 taken: MachLabel, 673 not_taken: MachLabel, 674 cond: Cond, 675 }, 676 TrapIf { 677 cond: Cond, 678 trap_code: TrapCode, 679 }, 680 OneWayCondBr { 681 target: MachLabel, 682 cond: Cond, 683 }, 684 IndirectBr { 685 rn: Reg, 686 targets: VecMachLabel, 687 }, 688 Debugtrap, 689 Trap { 690 trap_code: TrapCode, 691 }, 692 JTSequence { 693 ridx: Reg, 694 targets: VecMachLabel, 695 }, 696 LoadExtNameFar { 697 rd: WritableReg, 698 name: BoxExternalName, 699 offset: i64, 700 }, 701 LoadAddr { 702 rd: WritableReg, 703 mem: MemArg, 704 }, 705 Loop { 706 body: VecMInst, 707 cond: Cond, 708 }, 709 CondBreak { 710 cond: Cond, 711 }, 712 VirtualSPOffsetAdj { 713 offset: i64, 714 }, 715 ValueLabelMarker { 716 reg: Reg, 717 label: ValueLabel, 718 }, 719 Unwind { 720 inst: UnwindInst, 721 }, 722 } 723 724 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 725 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 726 pub enum ALUOp { 727 Add32, 728 Add32Ext16, 729 Add64, 730 Add64Ext16, 731 Add64Ext32, 732 AddLogical32, 733 AddLogical64, 734 AddLogical64Ext32, 735 Sub32, 736 Sub32Ext16, 737 Sub64, 738 Sub64Ext16, 739 Sub64Ext32, 740 SubLogical32, 741 SubLogical64, 742 SubLogical64Ext32, 743 Mul32, 744 Mul32Ext16, 745 Mul64, 746 Mul64Ext16, 747 Mul64Ext32, 748 And32, 749 And64, 750 Orr32, 751 Orr64, 752 Xor32, 753 Xor64, 754 AndNot32, 755 AndNot64, 756 OrrNot32, 757 OrrNot64, 758 XorNot32, 759 XorNot64, 760 } 761 762 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 763 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 764 pub enum UnaryOp { 765 Abs32, 766 Abs64, 767 Abs64Ext32, 768 Neg32, 769 Neg64, 770 Neg64Ext32, 771 PopcntByte, 772 PopcntReg, 773 BSwap32, 774 BSwap64, 775 } 776 777 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 778 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 779 pub enum ShiftOp { 780 RotL32, 781 RotL64, 782 LShL32, 783 LShL64, 784 LShR32, 785 LShR64, 786 AShR32, 787 AShR64, 788 } 789 790 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 791 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 792 pub enum RxSBGOp { 793 Insert, 794 And, 795 Or, 796 Xor, 797 } 798 799 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 800 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 801 pub enum CmpOp { 802 CmpS32, 803 CmpS32Ext16, 804 CmpS64, 805 CmpS64Ext16, 806 CmpS64Ext32, 807 CmpL32, 808 CmpL32Ext16, 809 CmpL64, 810 CmpL64Ext16, 811 CmpL64Ext32, 812 } 813 814 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 815 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 816 pub enum FPUOp1 { 817 Abs32, 818 Abs64, 819 Neg32, 820 Neg64, 821 NegAbs32, 822 NegAbs64, 823 Sqrt32, 824 Sqrt64, 825 Cvt32To64, 826 Cvt64To32, 827 } 828 829 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 830 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 831 pub enum FPUOp2 { 832 Add32, 833 Add64, 834 Sub32, 835 Sub64, 836 Mul32, 837 Mul64, 838 Div32, 839 Div64, 840 Max32, 841 Max64, 842 Min32, 843 Min64, 844 } 845 846 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 847 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 848 pub enum FPUOp3 { 849 MAdd32, 850 MAdd64, 851 MSub32, 852 MSub64, 853 } 854 855 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 856 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 857 pub enum FpuToIntOp { 858 F32ToU32, 859 F32ToI32, 860 F32ToU64, 861 F32ToI64, 862 F64ToU32, 863 F64ToI32, 864 F64ToU64, 865 F64ToI64, 866 } 867 868 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 869 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 870 pub enum IntToFpuOp { 871 U32ToF32, 872 I32ToF32, 873 U32ToF64, 874 I32ToF64, 875 U64ToF32, 876 I64ToF32, 877 U64ToF64, 878 I64ToF64, 879 } 880 881 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 882 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 883 pub enum FpuRoundMode { 884 Minus32, 885 Minus64, 886 Plus32, 887 Plus64, 888 Zero32, 889 Zero64, 890 Nearest32, 891 Nearest64, 892 } 893 894 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 895 #[derive(Clone, Debug)] 896 pub enum WritableRegPair { 897 WritableRegPair { hi: WritableReg, lo: WritableReg }, 898 } 899 900 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 901 #[derive(Clone, Debug)] 902 pub enum RegPair { 903 RegPair { hi: Reg, lo: Reg }, 904 } 905 906 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 907 #[derive(Clone, Debug)] 908 pub enum ProducesBool { 909 ProducesBool { producer: ProducesFlags, cond: Cond }, 910 } 911 912 // Generated as internal constructor for term output_reg. 913 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 914 let pattern0_0 = arg0; 915 // Rule at src/prelude.isle line 86. 916 let expr0_0 = C::value_reg(ctx, pattern0_0); 917 let expr1_0 = C::output(ctx, expr0_0); 918 return Some(expr1_0); 919 } 920 921 // Generated as internal constructor for term output_value. 922 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 923 let pattern0_0 = arg0; 924 // Rule at src/prelude.isle line 90. 925 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 926 let expr1_0 = C::output(ctx, expr0_0); 927 return Some(expr1_0); 928 } 929 930 // Generated as internal constructor for term temp_reg. 931 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 932 let pattern0_0 = arg0; 933 // Rule at src/prelude.isle line 110. 934 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 935 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 936 return Some(expr1_0); 937 } 938 939 // Generated as internal constructor for term lo_reg. 940 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 941 let pattern0_0 = arg0; 942 // Rule at src/prelude.isle line 145. 943 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 944 let expr1_0: usize = 0; 945 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 946 return Some(expr2_0); 947 } 948 949 // Generated as internal constructor for term side_effect. 950 pub fn constructor_side_effect<C: Context>( 951 ctx: &mut C, 952 arg0: &SideEffectNoResult, 953 ) -> Option<InstOutput> { 954 let pattern0_0 = arg0; 955 if let &SideEffectNoResult::Inst { 956 inst: ref pattern1_0, 957 } = pattern0_0 958 { 959 // Rule at src/prelude.isle line 398. 960 let expr0_0 = C::emit(ctx, pattern1_0); 961 let expr1_0 = C::output_none(ctx); 962 return Some(expr1_0); 963 } 964 return None; 965 } 966 967 // Generated as internal constructor for term safepoint. 968 pub fn constructor_safepoint<C: Context>( 969 ctx: &mut C, 970 arg0: &SideEffectNoResult, 971 ) -> Option<InstOutput> { 972 let pattern0_0 = arg0; 973 if let &SideEffectNoResult::Inst { 974 inst: ref pattern1_0, 975 } = pattern0_0 976 { 977 // Rule at src/prelude.isle line 404. 978 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 979 let expr1_0 = C::output_none(ctx); 980 return Some(expr1_0); 981 } 982 return None; 983 } 984 985 // Generated as internal constructor for term produces_flags_get_reg. 986 pub fn constructor_produces_flags_get_reg<C: Context>( 987 ctx: &mut C, 988 arg0: &ProducesFlags, 989 ) -> Option<Reg> { 990 let pattern0_0 = arg0; 991 if let &ProducesFlags::ProducesFlagsReturnsReg { 992 inst: ref pattern1_0, 993 result: pattern1_1, 994 } = pattern0_0 995 { 996 // Rule at src/prelude.isle line 442. 997 return Some(pattern1_1); 998 } 999 return None; 1000 } 1001 1002 // Generated as internal constructor for term produces_flags_ignore. 1003 pub fn constructor_produces_flags_ignore<C: Context>( 1004 ctx: &mut C, 1005 arg0: &ProducesFlags, 1006 ) -> Option<ProducesFlags> { 1007 let pattern0_0 = arg0; 1008 match pattern0_0 { 1009 &ProducesFlags::ProducesFlagsReturnsReg { 1010 inst: ref pattern1_0, 1011 result: pattern1_1, 1012 } => { 1013 // Rule at src/prelude.isle line 447. 1014 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1015 inst: pattern1_0.clone(), 1016 }; 1017 return Some(expr0_0); 1018 } 1019 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1020 inst: ref pattern1_0, 1021 result: pattern1_1, 1022 } => { 1023 // Rule at src/prelude.isle line 449. 1024 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1025 inst: pattern1_0.clone(), 1026 }; 1027 return Some(expr0_0); 1028 } 1029 _ => {} 1030 } 1031 return None; 1032 } 1033 1034 // Generated as internal constructor for term consumes_flags_concat. 1035 pub fn constructor_consumes_flags_concat<C: Context>( 1036 ctx: &mut C, 1037 arg0: &ConsumesFlags, 1038 arg1: &ConsumesFlags, 1039 ) -> Option<ConsumesFlags> { 1040 let pattern0_0 = arg0; 1041 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1042 inst: ref pattern1_0, 1043 result: pattern1_1, 1044 } = pattern0_0 1045 { 1046 let pattern2_0 = arg1; 1047 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1048 inst: ref pattern3_0, 1049 result: pattern3_1, 1050 } = pattern2_0 1051 { 1052 // Rule at src/prelude.isle line 456. 1053 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1054 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1055 inst1: pattern1_0.clone(), 1056 inst2: pattern3_0.clone(), 1057 result: expr0_0, 1058 }; 1059 return Some(expr1_0); 1060 } 1061 } 1062 return None; 1063 } 1064 1065 // Generated as internal constructor for term with_flags. 1066 pub fn constructor_with_flags<C: Context>( 1067 ctx: &mut C, 1068 arg0: &ProducesFlags, 1069 arg1: &ConsumesFlags, 1070 ) -> Option<ValueRegs> { 1071 let pattern0_0 = arg0; 1072 match pattern0_0 { 1073 &ProducesFlags::ProducesFlagsSideEffect { 1074 inst: ref pattern1_0, 1075 } => { 1076 let pattern2_0 = arg1; 1077 match pattern2_0 { 1078 &ConsumesFlags::ConsumesFlagsReturnsReg { 1079 inst: ref pattern3_0, 1080 result: pattern3_1, 1081 } => { 1082 // Rule at src/prelude.isle line 481. 1083 let expr0_0 = C::emit(ctx, pattern1_0); 1084 let expr1_0 = C::emit(ctx, pattern3_0); 1085 let expr2_0 = C::value_reg(ctx, pattern3_1); 1086 return Some(expr2_0); 1087 } 1088 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1089 inst1: ref pattern3_0, 1090 inst2: ref pattern3_1, 1091 result: pattern3_2, 1092 } => { 1093 // Rule at src/prelude.isle line 487. 1094 let expr0_0 = C::emit(ctx, pattern1_0); 1095 let expr1_0 = C::emit(ctx, pattern3_0); 1096 let expr2_0 = C::emit(ctx, pattern3_1); 1097 return Some(pattern3_2); 1098 } 1099 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1100 inst1: ref pattern3_0, 1101 inst2: ref pattern3_1, 1102 inst3: ref pattern3_2, 1103 inst4: ref pattern3_3, 1104 result: pattern3_4, 1105 } => { 1106 // Rule at src/prelude.isle line 499. 1107 let expr0_0 = C::emit(ctx, pattern1_0); 1108 let expr1_0 = C::emit(ctx, pattern3_0); 1109 let expr2_0 = C::emit(ctx, pattern3_1); 1110 let expr3_0 = C::emit(ctx, pattern3_2); 1111 let expr4_0 = C::emit(ctx, pattern3_3); 1112 return Some(pattern3_4); 1113 } 1114 _ => {} 1115 } 1116 } 1117 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1118 inst: ref pattern1_0, 1119 result: pattern1_1, 1120 } => { 1121 let pattern2_0 = arg1; 1122 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1123 inst: ref pattern3_0, 1124 result: pattern3_1, 1125 } = pattern2_0 1126 { 1127 // Rule at src/prelude.isle line 475. 1128 let expr0_0 = C::emit(ctx, pattern1_0); 1129 let expr1_0 = C::emit(ctx, pattern3_0); 1130 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1131 return Some(expr2_0); 1132 } 1133 } 1134 _ => {} 1135 } 1136 return None; 1137 } 1138 1139 // Generated as internal constructor for term with_flags_reg. 1140 pub fn constructor_with_flags_reg<C: Context>( 1141 ctx: &mut C, 1142 arg0: &ProducesFlags, 1143 arg1: &ConsumesFlags, 1144 ) -> Option<Reg> { 1145 let pattern0_0 = arg0; 1146 let pattern1_0 = arg1; 1147 // Rule at src/prelude.isle line 516. 1148 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1149 let expr1_0: usize = 0; 1150 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1151 return Some(expr2_0); 1152 } 1153 1154 // Generated as internal constructor for term mask_amt_reg. 1155 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1156 let pattern0_0 = arg0; 1157 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1158 let pattern2_0 = arg1; 1159 // Rule at src/isa/s390x/inst.isle line 1040. 1160 let expr0_0: i64 = -1; 1161 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1162 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1163 let expr3_0: u8 = 0; 1164 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1165 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1166 return Some(expr5_0); 1167 } 1168 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1169 let pattern2_0 = arg1; 1170 // Rule at src/isa/s390x/inst.isle line 1043. 1171 return Some(pattern2_0); 1172 } 1173 return None; 1174 } 1175 1176 // Generated as internal constructor for term lower_address. 1177 pub fn constructor_lower_address<C: Context>( 1178 ctx: &mut C, 1179 arg0: MemFlags, 1180 arg1: Value, 1181 arg2: Offset32, 1182 ) -> Option<MemArg> { 1183 let pattern0_0 = arg0; 1184 let pattern1_0 = arg1; 1185 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1186 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1187 match &pattern3_0 { 1188 &InstructionData::UnaryGlobalValue { 1189 opcode: ref pattern4_0, 1190 global_value: pattern4_1, 1191 } => { 1192 if let &Opcode::SymbolValue = pattern4_0 { 1193 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1194 C::symbol_value_data(ctx, pattern4_1) 1195 { 1196 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1197 let pattern8_0 = arg2; 1198 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1199 let closure10 = || { 1200 return Some(pattern6_2); 1201 }; 1202 if let Some(pattern10_0) = closure10() { 1203 if let Some(pattern11_0) = 1204 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1205 { 1206 // Rule at src/isa/s390x/inst.isle line 1136. 1207 let expr0_0 = 1208 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1209 return Some(expr0_0); 1210 } 1211 } 1212 } 1213 } 1214 } 1215 } 1216 &InstructionData::Binary { 1217 opcode: ref pattern4_0, 1218 args: ref pattern4_1, 1219 } => { 1220 if let &Opcode::Iadd = pattern4_0 { 1221 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1222 let pattern7_0 = arg2; 1223 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1224 if pattern8_0 == 0 { 1225 // Rule at src/isa/s390x/inst.isle line 1133. 1226 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1227 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1228 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1229 return Some(expr2_0); 1230 } 1231 } 1232 } 1233 _ => {} 1234 } 1235 } 1236 let pattern2_0 = arg2; 1237 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1238 // Rule at src/isa/s390x/inst.isle line 1130. 1239 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1240 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1241 return Some(expr1_0); 1242 } 1243 1244 // Generated as internal constructor for term stack_addr_impl. 1245 pub fn constructor_stack_addr_impl<C: Context>( 1246 ctx: &mut C, 1247 arg0: Type, 1248 arg1: StackSlot, 1249 arg2: Offset32, 1250 ) -> Option<Reg> { 1251 let pattern0_0 = arg0; 1252 let pattern1_0 = arg1; 1253 let pattern2_0 = arg2; 1254 // Rule at src/isa/s390x/inst.isle line 1163. 1255 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1256 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1257 let expr2_0 = C::emit(ctx, &expr1_0); 1258 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1259 return Some(expr3_0); 1260 } 1261 1262 // Generated as internal constructor for term sink_load. 1263 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1264 let pattern0_0 = arg0; 1265 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1266 if let &InstructionData::Load { 1267 opcode: ref pattern2_0, 1268 arg: pattern2_1, 1269 flags: pattern2_2, 1270 offset: pattern2_3, 1271 } = &pattern1_0 1272 { 1273 if let &Opcode::Load = pattern2_0 { 1274 // Rule at src/isa/s390x/inst.isle line 1233. 1275 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1276 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1277 return Some(expr1_0); 1278 } 1279 } 1280 return None; 1281 } 1282 1283 // Generated as internal constructor for term sink_sload16. 1284 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1285 let pattern0_0 = arg0; 1286 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1287 if let &InstructionData::Load { 1288 opcode: ref pattern2_0, 1289 arg: pattern2_1, 1290 flags: pattern2_2, 1291 offset: pattern2_3, 1292 } = &pattern1_0 1293 { 1294 if let &Opcode::Sload16 = pattern2_0 { 1295 // Rule at src/isa/s390x/inst.isle line 1240. 1296 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1297 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1298 return Some(expr1_0); 1299 } 1300 } 1301 return None; 1302 } 1303 1304 // Generated as internal constructor for term sink_sload32. 1305 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1306 let pattern0_0 = arg0; 1307 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1308 if let &InstructionData::Load { 1309 opcode: ref pattern2_0, 1310 arg: pattern2_1, 1311 flags: pattern2_2, 1312 offset: pattern2_3, 1313 } = &pattern1_0 1314 { 1315 if let &Opcode::Sload32 = pattern2_0 { 1316 // Rule at src/isa/s390x/inst.isle line 1247. 1317 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1318 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1319 return Some(expr1_0); 1320 } 1321 } 1322 return None; 1323 } 1324 1325 // Generated as internal constructor for term sink_uload16. 1326 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1327 let pattern0_0 = arg0; 1328 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1329 if let &InstructionData::Load { 1330 opcode: ref pattern2_0, 1331 arg: pattern2_1, 1332 flags: pattern2_2, 1333 offset: pattern2_3, 1334 } = &pattern1_0 1335 { 1336 if let &Opcode::Uload16 = pattern2_0 { 1337 // Rule at src/isa/s390x/inst.isle line 1254. 1338 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1339 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1340 return Some(expr1_0); 1341 } 1342 } 1343 return None; 1344 } 1345 1346 // Generated as internal constructor for term sink_uload32. 1347 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1348 let pattern0_0 = arg0; 1349 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1350 if let &InstructionData::Load { 1351 opcode: ref pattern2_0, 1352 arg: pattern2_1, 1353 flags: pattern2_2, 1354 offset: pattern2_3, 1355 } = &pattern1_0 1356 { 1357 if let &Opcode::Uload32 = pattern2_0 { 1358 // Rule at src/isa/s390x/inst.isle line 1261. 1359 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1360 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1361 return Some(expr1_0); 1362 } 1363 } 1364 return None; 1365 } 1366 1367 // Generated as internal constructor for term temp_writable_regpair. 1368 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1369 // Rule at src/isa/s390x/inst.isle line 1274. 1370 let expr0_0: u8 = 0; 1371 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1372 let expr2_0: u8 = 1; 1373 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1374 let expr4_0 = WritableRegPair::WritableRegPair { 1375 hi: expr1_0, 1376 lo: expr3_0, 1377 }; 1378 return Some(expr4_0); 1379 } 1380 1381 // Generated as internal constructor for term copy_writable_regpair. 1382 pub fn constructor_copy_writable_regpair<C: Context>( 1383 ctx: &mut C, 1384 arg0: &RegPair, 1385 ) -> Option<WritableRegPair> { 1386 let pattern0_0 = arg0; 1387 // Rule at src/isa/s390x/inst.isle line 1280. 1388 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1389 return Some(expr0_0); 1390 } 1391 1392 // Generated as internal constructor for term writable_regpair_hi. 1393 pub fn constructor_writable_regpair_hi<C: Context>( 1394 ctx: &mut C, 1395 arg0: &WritableRegPair, 1396 ) -> Option<WritableReg> { 1397 let pattern0_0 = arg0; 1398 if let &WritableRegPair::WritableRegPair { 1399 hi: pattern1_0, 1400 lo: pattern1_1, 1401 } = pattern0_0 1402 { 1403 // Rule at src/isa/s390x/inst.isle line 1284. 1404 return Some(pattern1_0); 1405 } 1406 return None; 1407 } 1408 1409 // Generated as internal constructor for term writable_regpair_lo. 1410 pub fn constructor_writable_regpair_lo<C: Context>( 1411 ctx: &mut C, 1412 arg0: &WritableRegPair, 1413 ) -> Option<WritableReg> { 1414 let pattern0_0 = arg0; 1415 if let &WritableRegPair::WritableRegPair { 1416 hi: pattern1_0, 1417 lo: pattern1_1, 1418 } = pattern0_0 1419 { 1420 // Rule at src/isa/s390x/inst.isle line 1288. 1421 return Some(pattern1_1); 1422 } 1423 return None; 1424 } 1425 1426 // Generated as internal constructor for term writable_regpair_to_regpair. 1427 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1428 ctx: &mut C, 1429 arg0: &WritableRegPair, 1430 ) -> Option<RegPair> { 1431 let pattern0_0 = arg0; 1432 if let &WritableRegPair::WritableRegPair { 1433 hi: pattern1_0, 1434 lo: pattern1_1, 1435 } = pattern0_0 1436 { 1437 // Rule at src/isa/s390x/inst.isle line 1295. 1438 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1439 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1440 let expr2_0 = RegPair::RegPair { 1441 hi: expr0_0, 1442 lo: expr1_0, 1443 }; 1444 return Some(expr2_0); 1445 } 1446 return None; 1447 } 1448 1449 // Generated as internal constructor for term uninitialized_regpair. 1450 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1451 // Rule at src/isa/s390x/inst.isle line 1300. 1452 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1453 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1454 return Some(expr1_0); 1455 } 1456 1457 // Generated as internal constructor for term regpair_hi. 1458 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1459 let pattern0_0 = arg0; 1460 if let &RegPair::RegPair { 1461 hi: pattern1_0, 1462 lo: pattern1_1, 1463 } = pattern0_0 1464 { 1465 // Rule at src/isa/s390x/inst.isle line 1305. 1466 return Some(pattern1_0); 1467 } 1468 return None; 1469 } 1470 1471 // Generated as internal constructor for term regpair_lo. 1472 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1473 let pattern0_0 = arg0; 1474 if let &RegPair::RegPair { 1475 hi: pattern1_0, 1476 lo: pattern1_1, 1477 } = pattern0_0 1478 { 1479 // Rule at src/isa/s390x/inst.isle line 1309. 1480 return Some(pattern1_1); 1481 } 1482 return None; 1483 } 1484 1485 // Generated as internal constructor for term alu_rrr. 1486 pub fn constructor_alu_rrr<C: Context>( 1487 ctx: &mut C, 1488 arg0: Type, 1489 arg1: &ALUOp, 1490 arg2: Reg, 1491 arg3: Reg, 1492 ) -> Option<Reg> { 1493 let pattern0_0 = arg0; 1494 let pattern1_0 = arg1; 1495 let pattern2_0 = arg2; 1496 let pattern3_0 = arg3; 1497 // Rule at src/isa/s390x/inst.isle line 1316. 1498 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1499 let expr1_0 = MInst::AluRRR { 1500 alu_op: pattern1_0.clone(), 1501 rd: expr0_0, 1502 rn: pattern2_0, 1503 rm: pattern3_0, 1504 }; 1505 let expr2_0 = C::emit(ctx, &expr1_0); 1506 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1507 return Some(expr3_0); 1508 } 1509 1510 // Generated as internal constructor for term alu_rrsimm16. 1511 pub fn constructor_alu_rrsimm16<C: Context>( 1512 ctx: &mut C, 1513 arg0: Type, 1514 arg1: &ALUOp, 1515 arg2: Reg, 1516 arg3: i16, 1517 ) -> Option<Reg> { 1518 let pattern0_0 = arg0; 1519 let pattern1_0 = arg1; 1520 let pattern2_0 = arg2; 1521 let pattern3_0 = arg3; 1522 // Rule at src/isa/s390x/inst.isle line 1323. 1523 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1524 let expr1_0 = MInst::AluRRSImm16 { 1525 alu_op: pattern1_0.clone(), 1526 rd: expr0_0, 1527 rn: pattern2_0, 1528 imm: pattern3_0, 1529 }; 1530 let expr2_0 = C::emit(ctx, &expr1_0); 1531 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1532 return Some(expr3_0); 1533 } 1534 1535 // Generated as internal constructor for term alu_rr. 1536 pub fn constructor_alu_rr<C: Context>( 1537 ctx: &mut C, 1538 arg0: Type, 1539 arg1: &ALUOp, 1540 arg2: Reg, 1541 arg3: Reg, 1542 ) -> Option<Reg> { 1543 let pattern0_0 = arg0; 1544 let pattern1_0 = arg1; 1545 let pattern2_0 = arg2; 1546 let pattern3_0 = arg3; 1547 // Rule at src/isa/s390x/inst.isle line 1330. 1548 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1549 let expr1_0 = MInst::AluRR { 1550 alu_op: pattern1_0.clone(), 1551 rd: expr0_0, 1552 rm: pattern3_0, 1553 }; 1554 let expr2_0 = C::emit(ctx, &expr1_0); 1555 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1556 return Some(expr3_0); 1557 } 1558 1559 // Generated as internal constructor for term alu_rx. 1560 pub fn constructor_alu_rx<C: Context>( 1561 ctx: &mut C, 1562 arg0: Type, 1563 arg1: &ALUOp, 1564 arg2: Reg, 1565 arg3: &MemArg, 1566 ) -> Option<Reg> { 1567 let pattern0_0 = arg0; 1568 let pattern1_0 = arg1; 1569 let pattern2_0 = arg2; 1570 let pattern3_0 = arg3; 1571 // Rule at src/isa/s390x/inst.isle line 1337. 1572 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1573 let expr1_0 = MInst::AluRX { 1574 alu_op: pattern1_0.clone(), 1575 rd: expr0_0, 1576 mem: pattern3_0.clone(), 1577 }; 1578 let expr2_0 = C::emit(ctx, &expr1_0); 1579 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1580 return Some(expr3_0); 1581 } 1582 1583 // Generated as internal constructor for term alu_rsimm16. 1584 pub fn constructor_alu_rsimm16<C: Context>( 1585 ctx: &mut C, 1586 arg0: Type, 1587 arg1: &ALUOp, 1588 arg2: Reg, 1589 arg3: i16, 1590 ) -> Option<Reg> { 1591 let pattern0_0 = arg0; 1592 let pattern1_0 = arg1; 1593 let pattern2_0 = arg2; 1594 let pattern3_0 = arg3; 1595 // Rule at src/isa/s390x/inst.isle line 1344. 1596 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1597 let expr1_0 = MInst::AluRSImm16 { 1598 alu_op: pattern1_0.clone(), 1599 rd: expr0_0, 1600 imm: pattern3_0, 1601 }; 1602 let expr2_0 = C::emit(ctx, &expr1_0); 1603 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1604 return Some(expr3_0); 1605 } 1606 1607 // Generated as internal constructor for term alu_rsimm32. 1608 pub fn constructor_alu_rsimm32<C: Context>( 1609 ctx: &mut C, 1610 arg0: Type, 1611 arg1: &ALUOp, 1612 arg2: Reg, 1613 arg3: i32, 1614 ) -> Option<Reg> { 1615 let pattern0_0 = arg0; 1616 let pattern1_0 = arg1; 1617 let pattern2_0 = arg2; 1618 let pattern3_0 = arg3; 1619 // Rule at src/isa/s390x/inst.isle line 1351. 1620 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1621 let expr1_0 = MInst::AluRSImm32 { 1622 alu_op: pattern1_0.clone(), 1623 rd: expr0_0, 1624 imm: pattern3_0, 1625 }; 1626 let expr2_0 = C::emit(ctx, &expr1_0); 1627 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1628 return Some(expr3_0); 1629 } 1630 1631 // Generated as internal constructor for term alu_ruimm32. 1632 pub fn constructor_alu_ruimm32<C: Context>( 1633 ctx: &mut C, 1634 arg0: Type, 1635 arg1: &ALUOp, 1636 arg2: Reg, 1637 arg3: u32, 1638 ) -> Option<Reg> { 1639 let pattern0_0 = arg0; 1640 let pattern1_0 = arg1; 1641 let pattern2_0 = arg2; 1642 let pattern3_0 = arg3; 1643 // Rule at src/isa/s390x/inst.isle line 1358. 1644 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1645 let expr1_0 = MInst::AluRUImm32 { 1646 alu_op: pattern1_0.clone(), 1647 rd: expr0_0, 1648 imm: pattern3_0, 1649 }; 1650 let expr2_0 = C::emit(ctx, &expr1_0); 1651 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1652 return Some(expr3_0); 1653 } 1654 1655 // Generated as internal constructor for term alu_ruimm16shifted. 1656 pub fn constructor_alu_ruimm16shifted<C: Context>( 1657 ctx: &mut C, 1658 arg0: Type, 1659 arg1: &ALUOp, 1660 arg2: Reg, 1661 arg3: UImm16Shifted, 1662 ) -> Option<Reg> { 1663 let pattern0_0 = arg0; 1664 let pattern1_0 = arg1; 1665 let pattern2_0 = arg2; 1666 let pattern3_0 = arg3; 1667 // Rule at src/isa/s390x/inst.isle line 1365. 1668 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1669 let expr1_0 = MInst::AluRUImm16Shifted { 1670 alu_op: pattern1_0.clone(), 1671 rd: expr0_0, 1672 imm: pattern3_0, 1673 }; 1674 let expr2_0 = C::emit(ctx, &expr1_0); 1675 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1676 return Some(expr3_0); 1677 } 1678 1679 // Generated as internal constructor for term alu_ruimm32shifted. 1680 pub fn constructor_alu_ruimm32shifted<C: Context>( 1681 ctx: &mut C, 1682 arg0: Type, 1683 arg1: &ALUOp, 1684 arg2: Reg, 1685 arg3: UImm32Shifted, 1686 ) -> Option<Reg> { 1687 let pattern0_0 = arg0; 1688 let pattern1_0 = arg1; 1689 let pattern2_0 = arg2; 1690 let pattern3_0 = arg3; 1691 // Rule at src/isa/s390x/inst.isle line 1372. 1692 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1693 let expr1_0 = MInst::AluRUImm32Shifted { 1694 alu_op: pattern1_0.clone(), 1695 rd: expr0_0, 1696 imm: pattern3_0, 1697 }; 1698 let expr2_0 = C::emit(ctx, &expr1_0); 1699 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1700 return Some(expr3_0); 1701 } 1702 1703 // Generated as internal constructor for term smul_wide. 1704 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1705 let pattern0_0 = arg0; 1706 let pattern1_0 = arg1; 1707 // Rule at src/isa/s390x/inst.isle line 1379. 1708 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1709 let expr1_0 = MInst::SMulWide { 1710 rn: pattern0_0, 1711 rm: pattern1_0, 1712 }; 1713 let expr2_0 = C::emit(ctx, &expr1_0); 1714 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1715 return Some(expr3_0); 1716 } 1717 1718 // Generated as internal constructor for term umul_wide. 1719 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1720 let pattern0_0 = arg0; 1721 let pattern1_0 = arg1; 1722 // Rule at src/isa/s390x/inst.isle line 1386. 1723 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1724 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1725 let expr2_0 = MInst::Mov64 { 1726 rd: expr1_0, 1727 rm: pattern1_0, 1728 }; 1729 let expr3_0 = C::emit(ctx, &expr2_0); 1730 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1731 let expr5_0 = C::emit(ctx, &expr4_0); 1732 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1733 return Some(expr6_0); 1734 } 1735 1736 // Generated as internal constructor for term sdivmod32. 1737 pub fn constructor_sdivmod32<C: Context>( 1738 ctx: &mut C, 1739 arg0: &RegPair, 1740 arg1: Reg, 1741 ) -> Option<RegPair> { 1742 let pattern0_0 = arg0; 1743 let pattern1_0 = arg1; 1744 // Rule at src/isa/s390x/inst.isle line 1394. 1745 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1746 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1747 let expr2_0 = C::emit(ctx, &expr1_0); 1748 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1749 return Some(expr3_0); 1750 } 1751 1752 // Generated as internal constructor for term sdivmod64. 1753 pub fn constructor_sdivmod64<C: Context>( 1754 ctx: &mut C, 1755 arg0: &RegPair, 1756 arg1: Reg, 1757 ) -> Option<RegPair> { 1758 let pattern0_0 = arg0; 1759 let pattern1_0 = arg1; 1760 // Rule at src/isa/s390x/inst.isle line 1401. 1761 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1762 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1763 let expr2_0 = C::emit(ctx, &expr1_0); 1764 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1765 return Some(expr3_0); 1766 } 1767 1768 // Generated as internal constructor for term udivmod32. 1769 pub fn constructor_udivmod32<C: Context>( 1770 ctx: &mut C, 1771 arg0: &RegPair, 1772 arg1: Reg, 1773 ) -> Option<RegPair> { 1774 let pattern0_0 = arg0; 1775 let pattern1_0 = arg1; 1776 // Rule at src/isa/s390x/inst.isle line 1408. 1777 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1778 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1779 let expr2_0 = C::emit(ctx, &expr1_0); 1780 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1781 return Some(expr3_0); 1782 } 1783 1784 // Generated as internal constructor for term udivmod64. 1785 pub fn constructor_udivmod64<C: Context>( 1786 ctx: &mut C, 1787 arg0: &RegPair, 1788 arg1: Reg, 1789 ) -> Option<RegPair> { 1790 let pattern0_0 = arg0; 1791 let pattern1_0 = arg1; 1792 // Rule at src/isa/s390x/inst.isle line 1415. 1793 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1794 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1795 let expr2_0 = C::emit(ctx, &expr1_0); 1796 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1797 return Some(expr3_0); 1798 } 1799 1800 // Generated as internal constructor for term shift_rr. 1801 pub fn constructor_shift_rr<C: Context>( 1802 ctx: &mut C, 1803 arg0: Type, 1804 arg1: &ShiftOp, 1805 arg2: Reg, 1806 arg3: u8, 1807 arg4: Reg, 1808 ) -> Option<Reg> { 1809 let pattern0_0 = arg0; 1810 let pattern1_0 = arg1; 1811 let pattern2_0 = arg2; 1812 let pattern3_0 = arg3; 1813 let pattern4_0 = arg4; 1814 // Rule at src/isa/s390x/inst.isle line 1422. 1815 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1816 let expr1_0 = MInst::ShiftRR { 1817 shift_op: pattern1_0.clone(), 1818 rd: expr0_0, 1819 rn: pattern2_0, 1820 shift_imm: pattern3_0, 1821 shift_reg: pattern4_0, 1822 }; 1823 let expr2_0 = C::emit(ctx, &expr1_0); 1824 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1825 return Some(expr3_0); 1826 } 1827 1828 // Generated as internal constructor for term rxsbg_test. 1829 pub fn constructor_rxsbg_test<C: Context>( 1830 ctx: &mut C, 1831 arg0: &RxSBGOp, 1832 arg1: Reg, 1833 arg2: Reg, 1834 arg3: u8, 1835 arg4: u8, 1836 arg5: i8, 1837 ) -> Option<ProducesFlags> { 1838 let pattern0_0 = arg0; 1839 let pattern1_0 = arg1; 1840 let pattern2_0 = arg2; 1841 let pattern3_0 = arg3; 1842 let pattern4_0 = arg4; 1843 let pattern5_0 = arg5; 1844 // Rule at src/isa/s390x/inst.isle line 1429. 1845 let expr0_0 = MInst::RxSBGTest { 1846 op: pattern0_0.clone(), 1847 rd: pattern1_0, 1848 rn: pattern2_0, 1849 start_bit: pattern3_0, 1850 end_bit: pattern4_0, 1851 rotate_amt: pattern5_0, 1852 }; 1853 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1854 return Some(expr1_0); 1855 } 1856 1857 // Generated as internal constructor for term unary_rr. 1858 pub fn constructor_unary_rr<C: Context>( 1859 ctx: &mut C, 1860 arg0: Type, 1861 arg1: &UnaryOp, 1862 arg2: Reg, 1863 ) -> Option<Reg> { 1864 let pattern0_0 = arg0; 1865 let pattern1_0 = arg1; 1866 let pattern2_0 = arg2; 1867 // Rule at src/isa/s390x/inst.isle line 1435. 1868 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1869 let expr1_0 = MInst::UnaryRR { 1870 op: pattern1_0.clone(), 1871 rd: expr0_0, 1872 rn: pattern2_0, 1873 }; 1874 let expr2_0 = C::emit(ctx, &expr1_0); 1875 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1876 return Some(expr3_0); 1877 } 1878 1879 // Generated as internal constructor for term cmp_rr. 1880 pub fn constructor_cmp_rr<C: Context>( 1881 ctx: &mut C, 1882 arg0: &CmpOp, 1883 arg1: Reg, 1884 arg2: Reg, 1885 ) -> Option<ProducesFlags> { 1886 let pattern0_0 = arg0; 1887 let pattern1_0 = arg1; 1888 let pattern2_0 = arg2; 1889 // Rule at src/isa/s390x/inst.isle line 1442. 1890 let expr0_0 = MInst::CmpRR { 1891 op: pattern0_0.clone(), 1892 rn: pattern1_0, 1893 rm: pattern2_0, 1894 }; 1895 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1896 return Some(expr1_0); 1897 } 1898 1899 // Generated as internal constructor for term cmp_rx. 1900 pub fn constructor_cmp_rx<C: Context>( 1901 ctx: &mut C, 1902 arg0: &CmpOp, 1903 arg1: Reg, 1904 arg2: &MemArg, 1905 ) -> Option<ProducesFlags> { 1906 let pattern0_0 = arg0; 1907 let pattern1_0 = arg1; 1908 let pattern2_0 = arg2; 1909 // Rule at src/isa/s390x/inst.isle line 1447. 1910 let expr0_0 = MInst::CmpRX { 1911 op: pattern0_0.clone(), 1912 rn: pattern1_0, 1913 mem: pattern2_0.clone(), 1914 }; 1915 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1916 return Some(expr1_0); 1917 } 1918 1919 // Generated as internal constructor for term cmp_rsimm16. 1920 pub fn constructor_cmp_rsimm16<C: Context>( 1921 ctx: &mut C, 1922 arg0: &CmpOp, 1923 arg1: Reg, 1924 arg2: i16, 1925 ) -> Option<ProducesFlags> { 1926 let pattern0_0 = arg0; 1927 let pattern1_0 = arg1; 1928 let pattern2_0 = arg2; 1929 // Rule at src/isa/s390x/inst.isle line 1452. 1930 let expr0_0 = MInst::CmpRSImm16 { 1931 op: pattern0_0.clone(), 1932 rn: pattern1_0, 1933 imm: pattern2_0, 1934 }; 1935 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1936 return Some(expr1_0); 1937 } 1938 1939 // Generated as internal constructor for term cmp_rsimm32. 1940 pub fn constructor_cmp_rsimm32<C: Context>( 1941 ctx: &mut C, 1942 arg0: &CmpOp, 1943 arg1: Reg, 1944 arg2: i32, 1945 ) -> Option<ProducesFlags> { 1946 let pattern0_0 = arg0; 1947 let pattern1_0 = arg1; 1948 let pattern2_0 = arg2; 1949 // Rule at src/isa/s390x/inst.isle line 1457. 1950 let expr0_0 = MInst::CmpRSImm32 { 1951 op: pattern0_0.clone(), 1952 rn: pattern1_0, 1953 imm: pattern2_0, 1954 }; 1955 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1956 return Some(expr1_0); 1957 } 1958 1959 // Generated as internal constructor for term cmp_ruimm32. 1960 pub fn constructor_cmp_ruimm32<C: Context>( 1961 ctx: &mut C, 1962 arg0: &CmpOp, 1963 arg1: Reg, 1964 arg2: u32, 1965 ) -> Option<ProducesFlags> { 1966 let pattern0_0 = arg0; 1967 let pattern1_0 = arg1; 1968 let pattern2_0 = arg2; 1969 // Rule at src/isa/s390x/inst.isle line 1462. 1970 let expr0_0 = MInst::CmpRUImm32 { 1971 op: pattern0_0.clone(), 1972 rn: pattern1_0, 1973 imm: pattern2_0, 1974 }; 1975 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1976 return Some(expr1_0); 1977 } 1978 1979 // Generated as internal constructor for term atomic_rmw_impl. 1980 pub fn constructor_atomic_rmw_impl<C: Context>( 1981 ctx: &mut C, 1982 arg0: Type, 1983 arg1: &ALUOp, 1984 arg2: Reg, 1985 arg3: &MemArg, 1986 ) -> Option<Reg> { 1987 let pattern0_0 = arg0; 1988 let pattern1_0 = arg1; 1989 let pattern2_0 = arg2; 1990 let pattern3_0 = arg3; 1991 // Rule at src/isa/s390x/inst.isle line 1467. 1992 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1993 let expr1_0 = MInst::AtomicRmw { 1994 alu_op: pattern1_0.clone(), 1995 rd: expr0_0, 1996 rn: pattern2_0, 1997 mem: pattern3_0.clone(), 1998 }; 1999 let expr2_0 = C::emit(ctx, &expr1_0); 2000 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2001 return Some(expr3_0); 2002 } 2003 2004 // Generated as internal constructor for term atomic_cas32. 2005 pub fn constructor_atomic_cas32<C: Context>( 2006 ctx: &mut C, 2007 arg0: Reg, 2008 arg1: Reg, 2009 arg2: &MemArg, 2010 ) -> Option<Reg> { 2011 let pattern0_0 = arg0; 2012 let pattern1_0 = arg1; 2013 let pattern2_0 = arg2; 2014 // Rule at src/isa/s390x/inst.isle line 1474. 2015 let expr0_0: Type = I32; 2016 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2017 let expr2_0 = MInst::AtomicCas32 { 2018 rd: expr1_0, 2019 rn: pattern1_0, 2020 mem: pattern2_0.clone(), 2021 }; 2022 let expr3_0 = C::emit(ctx, &expr2_0); 2023 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2024 return Some(expr4_0); 2025 } 2026 2027 // Generated as internal constructor for term atomic_cas64. 2028 pub fn constructor_atomic_cas64<C: Context>( 2029 ctx: &mut C, 2030 arg0: Reg, 2031 arg1: Reg, 2032 arg2: &MemArg, 2033 ) -> Option<Reg> { 2034 let pattern0_0 = arg0; 2035 let pattern1_0 = arg1; 2036 let pattern2_0 = arg2; 2037 // Rule at src/isa/s390x/inst.isle line 1481. 2038 let expr0_0: Type = I64; 2039 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2040 let expr2_0 = MInst::AtomicCas64 { 2041 rd: expr1_0, 2042 rn: pattern1_0, 2043 mem: pattern2_0.clone(), 2044 }; 2045 let expr3_0 = C::emit(ctx, &expr2_0); 2046 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2047 return Some(expr4_0); 2048 } 2049 2050 // Generated as internal constructor for term fence_impl. 2051 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2052 // Rule at src/isa/s390x/inst.isle line 1488. 2053 let expr0_0 = MInst::Fence; 2054 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2055 return Some(expr1_0); 2056 } 2057 2058 // Generated as internal constructor for term load32. 2059 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2060 let pattern0_0 = arg0; 2061 // Rule at src/isa/s390x/inst.isle line 1493. 2062 let expr0_0: Type = I32; 2063 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2064 let expr2_0 = MInst::Load32 { 2065 rd: expr1_0, 2066 mem: pattern0_0.clone(), 2067 }; 2068 let expr3_0 = C::emit(ctx, &expr2_0); 2069 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2070 return Some(expr4_0); 2071 } 2072 2073 // Generated as internal constructor for term load64. 2074 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2075 let pattern0_0 = arg0; 2076 // Rule at src/isa/s390x/inst.isle line 1500. 2077 let expr0_0: Type = I64; 2078 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2079 let expr2_0 = MInst::Load64 { 2080 rd: expr1_0, 2081 mem: pattern0_0.clone(), 2082 }; 2083 let expr3_0 = C::emit(ctx, &expr2_0); 2084 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2085 return Some(expr4_0); 2086 } 2087 2088 // Generated as internal constructor for term loadrev16. 2089 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2090 let pattern0_0 = arg0; 2091 // Rule at src/isa/s390x/inst.isle line 1507. 2092 let expr0_0: Type = I32; 2093 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2094 let expr2_0 = MInst::LoadRev16 { 2095 rd: expr1_0, 2096 mem: pattern0_0.clone(), 2097 }; 2098 let expr3_0 = C::emit(ctx, &expr2_0); 2099 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2100 return Some(expr4_0); 2101 } 2102 2103 // Generated as internal constructor for term loadrev32. 2104 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2105 let pattern0_0 = arg0; 2106 // Rule at src/isa/s390x/inst.isle line 1514. 2107 let expr0_0: Type = I32; 2108 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2109 let expr2_0 = MInst::LoadRev32 { 2110 rd: expr1_0, 2111 mem: pattern0_0.clone(), 2112 }; 2113 let expr3_0 = C::emit(ctx, &expr2_0); 2114 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2115 return Some(expr4_0); 2116 } 2117 2118 // Generated as internal constructor for term loadrev64. 2119 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2120 let pattern0_0 = arg0; 2121 // Rule at src/isa/s390x/inst.isle line 1521. 2122 let expr0_0: Type = I64; 2123 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2124 let expr2_0 = MInst::LoadRev64 { 2125 rd: expr1_0, 2126 mem: pattern0_0.clone(), 2127 }; 2128 let expr3_0 = C::emit(ctx, &expr2_0); 2129 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2130 return Some(expr4_0); 2131 } 2132 2133 // Generated as internal constructor for term store8. 2134 pub fn constructor_store8<C: Context>( 2135 ctx: &mut C, 2136 arg0: Reg, 2137 arg1: &MemArg, 2138 ) -> Option<SideEffectNoResult> { 2139 let pattern0_0 = arg0; 2140 let pattern1_0 = arg1; 2141 // Rule at src/isa/s390x/inst.isle line 1528. 2142 let expr0_0 = MInst::Store8 { 2143 rd: pattern0_0, 2144 mem: pattern1_0.clone(), 2145 }; 2146 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2147 return Some(expr1_0); 2148 } 2149 2150 // Generated as internal constructor for term store16. 2151 pub fn constructor_store16<C: Context>( 2152 ctx: &mut C, 2153 arg0: Reg, 2154 arg1: &MemArg, 2155 ) -> Option<SideEffectNoResult> { 2156 let pattern0_0 = arg0; 2157 let pattern1_0 = arg1; 2158 // Rule at src/isa/s390x/inst.isle line 1533. 2159 let expr0_0 = MInst::Store16 { 2160 rd: pattern0_0, 2161 mem: pattern1_0.clone(), 2162 }; 2163 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2164 return Some(expr1_0); 2165 } 2166 2167 // Generated as internal constructor for term store32. 2168 pub fn constructor_store32<C: Context>( 2169 ctx: &mut C, 2170 arg0: Reg, 2171 arg1: &MemArg, 2172 ) -> Option<SideEffectNoResult> { 2173 let pattern0_0 = arg0; 2174 let pattern1_0 = arg1; 2175 // Rule at src/isa/s390x/inst.isle line 1538. 2176 let expr0_0 = MInst::Store32 { 2177 rd: pattern0_0, 2178 mem: pattern1_0.clone(), 2179 }; 2180 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2181 return Some(expr1_0); 2182 } 2183 2184 // Generated as internal constructor for term store64. 2185 pub fn constructor_store64<C: Context>( 2186 ctx: &mut C, 2187 arg0: Reg, 2188 arg1: &MemArg, 2189 ) -> Option<SideEffectNoResult> { 2190 let pattern0_0 = arg0; 2191 let pattern1_0 = arg1; 2192 // Rule at src/isa/s390x/inst.isle line 1543. 2193 let expr0_0 = MInst::Store64 { 2194 rd: pattern0_0, 2195 mem: pattern1_0.clone(), 2196 }; 2197 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2198 return Some(expr1_0); 2199 } 2200 2201 // Generated as internal constructor for term store8_imm. 2202 pub fn constructor_store8_imm<C: Context>( 2203 ctx: &mut C, 2204 arg0: u8, 2205 arg1: &MemArg, 2206 ) -> Option<SideEffectNoResult> { 2207 let pattern0_0 = arg0; 2208 let pattern1_0 = arg1; 2209 // Rule at src/isa/s390x/inst.isle line 1548. 2210 let expr0_0 = MInst::StoreImm8 { 2211 imm: pattern0_0, 2212 mem: pattern1_0.clone(), 2213 }; 2214 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2215 return Some(expr1_0); 2216 } 2217 2218 // Generated as internal constructor for term store16_imm. 2219 pub fn constructor_store16_imm<C: Context>( 2220 ctx: &mut C, 2221 arg0: i16, 2222 arg1: &MemArg, 2223 ) -> Option<SideEffectNoResult> { 2224 let pattern0_0 = arg0; 2225 let pattern1_0 = arg1; 2226 // Rule at src/isa/s390x/inst.isle line 1553. 2227 let expr0_0 = MInst::StoreImm16 { 2228 imm: pattern0_0, 2229 mem: pattern1_0.clone(), 2230 }; 2231 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2232 return Some(expr1_0); 2233 } 2234 2235 // Generated as internal constructor for term store32_simm16. 2236 pub fn constructor_store32_simm16<C: Context>( 2237 ctx: &mut C, 2238 arg0: i16, 2239 arg1: &MemArg, 2240 ) -> Option<SideEffectNoResult> { 2241 let pattern0_0 = arg0; 2242 let pattern1_0 = arg1; 2243 // Rule at src/isa/s390x/inst.isle line 1558. 2244 let expr0_0 = MInst::StoreImm32SExt16 { 2245 imm: pattern0_0, 2246 mem: pattern1_0.clone(), 2247 }; 2248 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2249 return Some(expr1_0); 2250 } 2251 2252 // Generated as internal constructor for term store64_simm16. 2253 pub fn constructor_store64_simm16<C: Context>( 2254 ctx: &mut C, 2255 arg0: i16, 2256 arg1: &MemArg, 2257 ) -> Option<SideEffectNoResult> { 2258 let pattern0_0 = arg0; 2259 let pattern1_0 = arg1; 2260 // Rule at src/isa/s390x/inst.isle line 1563. 2261 let expr0_0 = MInst::StoreImm64SExt16 { 2262 imm: pattern0_0, 2263 mem: pattern1_0.clone(), 2264 }; 2265 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2266 return Some(expr1_0); 2267 } 2268 2269 // Generated as internal constructor for term storerev16. 2270 pub fn constructor_storerev16<C: Context>( 2271 ctx: &mut C, 2272 arg0: Reg, 2273 arg1: &MemArg, 2274 ) -> Option<SideEffectNoResult> { 2275 let pattern0_0 = arg0; 2276 let pattern1_0 = arg1; 2277 // Rule at src/isa/s390x/inst.isle line 1568. 2278 let expr0_0 = MInst::StoreRev16 { 2279 rd: pattern0_0, 2280 mem: pattern1_0.clone(), 2281 }; 2282 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2283 return Some(expr1_0); 2284 } 2285 2286 // Generated as internal constructor for term storerev32. 2287 pub fn constructor_storerev32<C: Context>( 2288 ctx: &mut C, 2289 arg0: Reg, 2290 arg1: &MemArg, 2291 ) -> Option<SideEffectNoResult> { 2292 let pattern0_0 = arg0; 2293 let pattern1_0 = arg1; 2294 // Rule at src/isa/s390x/inst.isle line 1573. 2295 let expr0_0 = MInst::StoreRev32 { 2296 rd: pattern0_0, 2297 mem: pattern1_0.clone(), 2298 }; 2299 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2300 return Some(expr1_0); 2301 } 2302 2303 // Generated as internal constructor for term storerev64. 2304 pub fn constructor_storerev64<C: Context>( 2305 ctx: &mut C, 2306 arg0: Reg, 2307 arg1: &MemArg, 2308 ) -> Option<SideEffectNoResult> { 2309 let pattern0_0 = arg0; 2310 let pattern1_0 = arg1; 2311 // Rule at src/isa/s390x/inst.isle line 1578. 2312 let expr0_0 = MInst::StoreRev64 { 2313 rd: pattern0_0, 2314 mem: pattern1_0.clone(), 2315 }; 2316 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2317 return Some(expr1_0); 2318 } 2319 2320 // Generated as internal constructor for term fpu_rr. 2321 pub fn constructor_fpu_rr<C: Context>( 2322 ctx: &mut C, 2323 arg0: Type, 2324 arg1: &FPUOp1, 2325 arg2: Reg, 2326 ) -> Option<Reg> { 2327 let pattern0_0 = arg0; 2328 let pattern1_0 = arg1; 2329 let pattern2_0 = arg2; 2330 // Rule at src/isa/s390x/inst.isle line 1583. 2331 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2332 let expr1_0 = MInst::FpuRR { 2333 fpu_op: pattern1_0.clone(), 2334 rd: expr0_0, 2335 rn: pattern2_0, 2336 }; 2337 let expr2_0 = C::emit(ctx, &expr1_0); 2338 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2339 return Some(expr3_0); 2340 } 2341 2342 // Generated as internal constructor for term fpu_rrr. 2343 pub fn constructor_fpu_rrr<C: Context>( 2344 ctx: &mut C, 2345 arg0: Type, 2346 arg1: &FPUOp2, 2347 arg2: Reg, 2348 arg3: Reg, 2349 ) -> Option<Reg> { 2350 let pattern0_0 = arg0; 2351 let pattern1_0 = arg1; 2352 let pattern2_0 = arg2; 2353 let pattern3_0 = arg3; 2354 // Rule at src/isa/s390x/inst.isle line 1590. 2355 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2356 let expr1_0 = MInst::FpuRRR { 2357 fpu_op: pattern1_0.clone(), 2358 rd: expr0_0, 2359 rm: pattern3_0, 2360 }; 2361 let expr2_0 = C::emit(ctx, &expr1_0); 2362 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2363 return Some(expr3_0); 2364 } 2365 2366 // Generated as internal constructor for term fpu_rrrr. 2367 pub fn constructor_fpu_rrrr<C: Context>( 2368 ctx: &mut C, 2369 arg0: Type, 2370 arg1: &FPUOp3, 2371 arg2: Reg, 2372 arg3: Reg, 2373 arg4: Reg, 2374 ) -> Option<Reg> { 2375 let pattern0_0 = arg0; 2376 let pattern1_0 = arg1; 2377 let pattern2_0 = arg2; 2378 let pattern3_0 = arg3; 2379 let pattern4_0 = arg4; 2380 // Rule at src/isa/s390x/inst.isle line 1597. 2381 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2382 let expr1_0 = MInst::FpuRRRR { 2383 fpu_op: pattern1_0.clone(), 2384 rd: expr0_0, 2385 rn: pattern3_0, 2386 rm: pattern4_0, 2387 }; 2388 let expr2_0 = C::emit(ctx, &expr1_0); 2389 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2390 return Some(expr3_0); 2391 } 2392 2393 // Generated as internal constructor for term fpu_copysign. 2394 pub fn constructor_fpu_copysign<C: Context>( 2395 ctx: &mut C, 2396 arg0: Type, 2397 arg1: Reg, 2398 arg2: Reg, 2399 ) -> Option<Reg> { 2400 let pattern0_0 = arg0; 2401 let pattern1_0 = arg1; 2402 let pattern2_0 = arg2; 2403 // Rule at src/isa/s390x/inst.isle line 1604. 2404 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2405 let expr1_0 = MInst::FpuCopysign { 2406 rd: expr0_0, 2407 rn: pattern1_0, 2408 rm: pattern2_0, 2409 }; 2410 let expr2_0 = C::emit(ctx, &expr1_0); 2411 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2412 return Some(expr3_0); 2413 } 2414 2415 // Generated as internal constructor for term fpu_cmp32. 2416 pub fn constructor_fpu_cmp32<C: Context>( 2417 ctx: &mut C, 2418 arg0: Reg, 2419 arg1: Reg, 2420 ) -> Option<ProducesFlags> { 2421 let pattern0_0 = arg0; 2422 let pattern1_0 = arg1; 2423 // Rule at src/isa/s390x/inst.isle line 1611. 2424 let expr0_0 = MInst::FpuCmp32 { 2425 rn: pattern0_0, 2426 rm: pattern1_0, 2427 }; 2428 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2429 return Some(expr1_0); 2430 } 2431 2432 // Generated as internal constructor for term fpu_cmp64. 2433 pub fn constructor_fpu_cmp64<C: Context>( 2434 ctx: &mut C, 2435 arg0: Reg, 2436 arg1: Reg, 2437 ) -> Option<ProducesFlags> { 2438 let pattern0_0 = arg0; 2439 let pattern1_0 = arg1; 2440 // Rule at src/isa/s390x/inst.isle line 1616. 2441 let expr0_0 = MInst::FpuCmp64 { 2442 rn: pattern0_0, 2443 rm: pattern1_0, 2444 }; 2445 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2446 return Some(expr1_0); 2447 } 2448 2449 // Generated as internal constructor for term fpu_to_int. 2450 pub fn constructor_fpu_to_int<C: Context>( 2451 ctx: &mut C, 2452 arg0: Type, 2453 arg1: &FpuToIntOp, 2454 arg2: Reg, 2455 ) -> Option<ProducesFlags> { 2456 let pattern0_0 = arg0; 2457 let pattern1_0 = arg1; 2458 let pattern2_0 = arg2; 2459 // Rule at src/isa/s390x/inst.isle line 1621. 2460 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2461 let expr1_0 = MInst::FpuToInt { 2462 op: pattern1_0.clone(), 2463 rd: expr0_0, 2464 rn: pattern2_0, 2465 }; 2466 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2467 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2468 inst: expr1_0, 2469 result: expr2_0, 2470 }; 2471 return Some(expr3_0); 2472 } 2473 2474 // Generated as internal constructor for term int_to_fpu. 2475 pub fn constructor_int_to_fpu<C: Context>( 2476 ctx: &mut C, 2477 arg0: Type, 2478 arg1: &IntToFpuOp, 2479 arg2: Reg, 2480 ) -> Option<Reg> { 2481 let pattern0_0 = arg0; 2482 let pattern1_0 = arg1; 2483 let pattern2_0 = arg2; 2484 // Rule at src/isa/s390x/inst.isle line 1628. 2485 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2486 let expr1_0 = MInst::IntToFpu { 2487 op: pattern1_0.clone(), 2488 rd: expr0_0, 2489 rn: pattern2_0, 2490 }; 2491 let expr2_0 = C::emit(ctx, &expr1_0); 2492 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2493 return Some(expr3_0); 2494 } 2495 2496 // Generated as internal constructor for term fpu_round. 2497 pub fn constructor_fpu_round<C: Context>( 2498 ctx: &mut C, 2499 arg0: Type, 2500 arg1: &FpuRoundMode, 2501 arg2: Reg, 2502 ) -> Option<Reg> { 2503 let pattern0_0 = arg0; 2504 let pattern1_0 = arg1; 2505 let pattern2_0 = arg2; 2506 // Rule at src/isa/s390x/inst.isle line 1635. 2507 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2508 let expr1_0 = MInst::FpuRound { 2509 op: pattern1_0.clone(), 2510 rd: expr0_0, 2511 rn: pattern2_0, 2512 }; 2513 let expr2_0 = C::emit(ctx, &expr1_0); 2514 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2515 return Some(expr3_0); 2516 } 2517 2518 // Generated as internal constructor for term fpuvec_rrr. 2519 pub fn constructor_fpuvec_rrr<C: Context>( 2520 ctx: &mut C, 2521 arg0: Type, 2522 arg1: &FPUOp2, 2523 arg2: Reg, 2524 arg3: Reg, 2525 ) -> Option<Reg> { 2526 let pattern0_0 = arg0; 2527 let pattern1_0 = arg1; 2528 let pattern2_0 = arg2; 2529 let pattern3_0 = arg3; 2530 // Rule at src/isa/s390x/inst.isle line 1642. 2531 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2532 let expr1_0 = MInst::FpuVecRRR { 2533 fpu_op: pattern1_0.clone(), 2534 rd: expr0_0, 2535 rn: pattern2_0, 2536 rm: pattern3_0, 2537 }; 2538 let expr2_0 = C::emit(ctx, &expr1_0); 2539 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2540 return Some(expr3_0); 2541 } 2542 2543 // Generated as internal constructor for term mov_to_fpr. 2544 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2545 let pattern0_0 = arg0; 2546 // Rule at src/isa/s390x/inst.isle line 1649. 2547 let expr0_0: Type = F64; 2548 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2549 let expr2_0 = MInst::MovToFpr { 2550 rd: expr1_0, 2551 rn: pattern0_0, 2552 }; 2553 let expr3_0 = C::emit(ctx, &expr2_0); 2554 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2555 return Some(expr4_0); 2556 } 2557 2558 // Generated as internal constructor for term mov_from_fpr. 2559 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2560 let pattern0_0 = arg0; 2561 // Rule at src/isa/s390x/inst.isle line 1656. 2562 let expr0_0: Type = I64; 2563 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2564 let expr2_0 = MInst::MovFromFpr { 2565 rd: expr1_0, 2566 rn: pattern0_0, 2567 }; 2568 let expr3_0 = C::emit(ctx, &expr2_0); 2569 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2570 return Some(expr4_0); 2571 } 2572 2573 // Generated as internal constructor for term fpu_load32. 2574 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2575 let pattern0_0 = arg0; 2576 // Rule at src/isa/s390x/inst.isle line 1663. 2577 let expr0_0: Type = F32; 2578 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2579 let expr2_0 = MInst::FpuLoad32 { 2580 rd: expr1_0, 2581 mem: pattern0_0.clone(), 2582 }; 2583 let expr3_0 = C::emit(ctx, &expr2_0); 2584 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2585 return Some(expr4_0); 2586 } 2587 2588 // Generated as internal constructor for term fpu_load64. 2589 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2590 let pattern0_0 = arg0; 2591 // Rule at src/isa/s390x/inst.isle line 1670. 2592 let expr0_0: Type = F64; 2593 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2594 let expr2_0 = MInst::FpuLoad64 { 2595 rd: expr1_0, 2596 mem: pattern0_0.clone(), 2597 }; 2598 let expr3_0 = C::emit(ctx, &expr2_0); 2599 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2600 return Some(expr4_0); 2601 } 2602 2603 // Generated as internal constructor for term fpu_loadrev32. 2604 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2605 let pattern0_0 = arg0; 2606 // Rule at src/isa/s390x/inst.isle line 1677. 2607 let expr0_0: Type = F32; 2608 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2609 let expr2_0 = MInst::FpuLoadRev32 { 2610 rd: expr1_0, 2611 mem: pattern0_0.clone(), 2612 }; 2613 let expr3_0 = C::emit(ctx, &expr2_0); 2614 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2615 return Some(expr4_0); 2616 } 2617 2618 // Generated as internal constructor for term fpu_loadrev64. 2619 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2620 let pattern0_0 = arg0; 2621 // Rule at src/isa/s390x/inst.isle line 1684. 2622 let expr0_0: Type = F64; 2623 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2624 let expr2_0 = MInst::FpuLoadRev64 { 2625 rd: expr1_0, 2626 mem: pattern0_0.clone(), 2627 }; 2628 let expr3_0 = C::emit(ctx, &expr2_0); 2629 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2630 return Some(expr4_0); 2631 } 2632 2633 // Generated as internal constructor for term fpu_store32. 2634 pub fn constructor_fpu_store32<C: Context>( 2635 ctx: &mut C, 2636 arg0: Reg, 2637 arg1: &MemArg, 2638 ) -> Option<SideEffectNoResult> { 2639 let pattern0_0 = arg0; 2640 let pattern1_0 = arg1; 2641 // Rule at src/isa/s390x/inst.isle line 1691. 2642 let expr0_0 = MInst::FpuStore32 { 2643 rd: pattern0_0, 2644 mem: pattern1_0.clone(), 2645 }; 2646 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2647 return Some(expr1_0); 2648 } 2649 2650 // Generated as internal constructor for term fpu_store64. 2651 pub fn constructor_fpu_store64<C: Context>( 2652 ctx: &mut C, 2653 arg0: Reg, 2654 arg1: &MemArg, 2655 ) -> Option<SideEffectNoResult> { 2656 let pattern0_0 = arg0; 2657 let pattern1_0 = arg1; 2658 // Rule at src/isa/s390x/inst.isle line 1696. 2659 let expr0_0 = MInst::FpuStore64 { 2660 rd: pattern0_0, 2661 mem: pattern1_0.clone(), 2662 }; 2663 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2664 return Some(expr1_0); 2665 } 2666 2667 // Generated as internal constructor for term fpu_storerev32. 2668 pub fn constructor_fpu_storerev32<C: Context>( 2669 ctx: &mut C, 2670 arg0: Reg, 2671 arg1: &MemArg, 2672 ) -> Option<SideEffectNoResult> { 2673 let pattern0_0 = arg0; 2674 let pattern1_0 = arg1; 2675 // Rule at src/isa/s390x/inst.isle line 1701. 2676 let expr0_0 = MInst::FpuStoreRev32 { 2677 rd: pattern0_0, 2678 mem: pattern1_0.clone(), 2679 }; 2680 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2681 return Some(expr1_0); 2682 } 2683 2684 // Generated as internal constructor for term fpu_storerev64. 2685 pub fn constructor_fpu_storerev64<C: Context>( 2686 ctx: &mut C, 2687 arg0: Reg, 2688 arg1: &MemArg, 2689 ) -> Option<SideEffectNoResult> { 2690 let pattern0_0 = arg0; 2691 let pattern1_0 = arg1; 2692 // Rule at src/isa/s390x/inst.isle line 1706. 2693 let expr0_0 = MInst::FpuStoreRev64 { 2694 rd: pattern0_0, 2695 mem: pattern1_0.clone(), 2696 }; 2697 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2698 return Some(expr1_0); 2699 } 2700 2701 // Generated as internal constructor for term load_ext_name_far. 2702 pub fn constructor_load_ext_name_far<C: Context>( 2703 ctx: &mut C, 2704 arg0: ExternalName, 2705 arg1: i64, 2706 ) -> Option<Reg> { 2707 let pattern0_0 = arg0; 2708 let pattern1_0 = arg1; 2709 // Rule at src/isa/s390x/inst.isle line 1711. 2710 let expr0_0: Type = I64; 2711 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2712 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2713 let expr3_0 = MInst::LoadExtNameFar { 2714 rd: expr1_0, 2715 name: expr2_0, 2716 offset: pattern1_0, 2717 }; 2718 let expr4_0 = C::emit(ctx, &expr3_0); 2719 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2720 return Some(expr5_0); 2721 } 2722 2723 // Generated as internal constructor for term load_addr. 2724 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2725 let pattern0_0 = arg0; 2726 // Rule at src/isa/s390x/inst.isle line 1719. 2727 let expr0_0: Type = I64; 2728 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2729 let expr2_0 = MInst::LoadAddr { 2730 rd: expr1_0, 2731 mem: pattern0_0.clone(), 2732 }; 2733 let expr3_0 = C::emit(ctx, &expr2_0); 2734 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2735 return Some(expr4_0); 2736 } 2737 2738 // Generated as internal constructor for term jump_impl. 2739 pub fn constructor_jump_impl<C: Context>( 2740 ctx: &mut C, 2741 arg0: MachLabel, 2742 ) -> Option<SideEffectNoResult> { 2743 let pattern0_0 = arg0; 2744 // Rule at src/isa/s390x/inst.isle line 1726. 2745 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2746 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2747 return Some(expr1_0); 2748 } 2749 2750 // Generated as internal constructor for term cond_br. 2751 pub fn constructor_cond_br<C: Context>( 2752 ctx: &mut C, 2753 arg0: MachLabel, 2754 arg1: MachLabel, 2755 arg2: &Cond, 2756 ) -> Option<SideEffectNoResult> { 2757 let pattern0_0 = arg0; 2758 let pattern1_0 = arg1; 2759 let pattern2_0 = arg2; 2760 // Rule at src/isa/s390x/inst.isle line 1731. 2761 let expr0_0 = MInst::CondBr { 2762 taken: pattern0_0, 2763 not_taken: pattern1_0, 2764 cond: pattern2_0.clone(), 2765 }; 2766 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2767 return Some(expr1_0); 2768 } 2769 2770 // Generated as internal constructor for term oneway_cond_br. 2771 pub fn constructor_oneway_cond_br<C: Context>( 2772 ctx: &mut C, 2773 arg0: MachLabel, 2774 arg1: &Cond, 2775 ) -> Option<SideEffectNoResult> { 2776 let pattern0_0 = arg0; 2777 let pattern1_0 = arg1; 2778 // Rule at src/isa/s390x/inst.isle line 1736. 2779 let expr0_0 = MInst::OneWayCondBr { 2780 target: pattern0_0, 2781 cond: pattern1_0.clone(), 2782 }; 2783 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2784 return Some(expr1_0); 2785 } 2786 2787 // Generated as internal constructor for term jt_sequence. 2788 pub fn constructor_jt_sequence<C: Context>( 2789 ctx: &mut C, 2790 arg0: Reg, 2791 arg1: &VecMachLabel, 2792 ) -> Option<SideEffectNoResult> { 2793 let pattern0_0 = arg0; 2794 let pattern1_0 = arg1; 2795 // Rule at src/isa/s390x/inst.isle line 1741. 2796 let expr0_0 = MInst::JTSequence { 2797 ridx: pattern0_0, 2798 targets: pattern1_0.clone(), 2799 }; 2800 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2801 return Some(expr1_0); 2802 } 2803 2804 // Generated as internal constructor for term drop_flags. 2805 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2806 let pattern0_0 = arg0; 2807 if let &ProducesFlags::ProducesFlagsReturnsReg { 2808 inst: ref pattern1_0, 2809 result: pattern1_1, 2810 } = pattern0_0 2811 { 2812 // Rule at src/isa/s390x/inst.isle line 1746. 2813 let expr0_0 = C::emit(ctx, pattern1_0); 2814 return Some(pattern1_1); 2815 } 2816 return None; 2817 } 2818 2819 // Generated as internal constructor for term push_alu_reg. 2820 pub fn constructor_push_alu_reg<C: Context>( 2821 ctx: &mut C, 2822 arg0: &VecMInstBuilder, 2823 arg1: &ALUOp, 2824 arg2: WritableReg, 2825 arg3: Reg, 2826 arg4: Reg, 2827 ) -> Option<Reg> { 2828 let pattern0_0 = arg0; 2829 let pattern1_0 = arg1; 2830 let pattern2_0 = arg2; 2831 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2832 let pattern4_0 = arg3; 2833 let pattern5_0 = arg4; 2834 // Rule at src/isa/s390x/inst.isle line 1785. 2835 let expr0_0 = MInst::AluRRR { 2836 alu_op: pattern1_0.clone(), 2837 rd: pattern3_0, 2838 rn: pattern4_0, 2839 rm: pattern5_0, 2840 }; 2841 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2842 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2843 return Some(expr2_0); 2844 } 2845 return None; 2846 } 2847 2848 // Generated as internal constructor for term push_alu_uimm32shifted. 2849 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2850 ctx: &mut C, 2851 arg0: &VecMInstBuilder, 2852 arg1: &ALUOp, 2853 arg2: WritableReg, 2854 arg3: Reg, 2855 arg4: UImm32Shifted, 2856 ) -> Option<Reg> { 2857 let pattern0_0 = arg0; 2858 let pattern1_0 = arg1; 2859 let pattern2_0 = arg2; 2860 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2861 let pattern4_0 = arg3; 2862 let closure5 = || { 2863 return Some(pattern3_0); 2864 }; 2865 if let Some(pattern5_0) = closure5() { 2866 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2867 let pattern7_0 = arg4; 2868 // Rule at src/isa/s390x/inst.isle line 1791. 2869 let expr0_0 = MInst::AluRUImm32Shifted { 2870 alu_op: pattern1_0.clone(), 2871 rd: pattern3_0, 2872 imm: pattern7_0, 2873 }; 2874 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2875 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2876 return Some(expr2_0); 2877 } 2878 } 2879 } 2880 return None; 2881 } 2882 2883 // Generated as internal constructor for term push_shift. 2884 pub fn constructor_push_shift<C: Context>( 2885 ctx: &mut C, 2886 arg0: &VecMInstBuilder, 2887 arg1: &ShiftOp, 2888 arg2: WritableReg, 2889 arg3: Reg, 2890 arg4: u8, 2891 arg5: Reg, 2892 ) -> Option<Reg> { 2893 let pattern0_0 = arg0; 2894 let pattern1_0 = arg1; 2895 let pattern2_0 = arg2; 2896 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2897 let pattern4_0 = arg3; 2898 let pattern5_0 = arg4; 2899 let pattern6_0 = arg5; 2900 // Rule at src/isa/s390x/inst.isle line 1797. 2901 let expr0_0 = MInst::ShiftRR { 2902 shift_op: pattern1_0.clone(), 2903 rd: pattern3_0, 2904 rn: pattern4_0, 2905 shift_imm: pattern5_0, 2906 shift_reg: pattern6_0, 2907 }; 2908 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2909 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2910 return Some(expr2_0); 2911 } 2912 return None; 2913 } 2914 2915 // Generated as internal constructor for term push_rxsbg. 2916 pub fn constructor_push_rxsbg<C: Context>( 2917 ctx: &mut C, 2918 arg0: &VecMInstBuilder, 2919 arg1: &RxSBGOp, 2920 arg2: WritableReg, 2921 arg3: Reg, 2922 arg4: Reg, 2923 arg5: u8, 2924 arg6: u8, 2925 arg7: i8, 2926 ) -> Option<Reg> { 2927 let pattern0_0 = arg0; 2928 let pattern1_0 = arg1; 2929 let pattern2_0 = arg2; 2930 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2931 let pattern4_0 = arg3; 2932 let closure5 = || { 2933 return Some(pattern3_0); 2934 }; 2935 if let Some(pattern5_0) = closure5() { 2936 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2937 let pattern7_0 = arg4; 2938 let pattern8_0 = arg5; 2939 let pattern9_0 = arg6; 2940 let pattern10_0 = arg7; 2941 // Rule at src/isa/s390x/inst.isle line 1804. 2942 let expr0_0 = MInst::RxSBG { 2943 op: pattern1_0.clone(), 2944 rd: pattern3_0, 2945 rn: pattern7_0, 2946 start_bit: pattern8_0, 2947 end_bit: pattern9_0, 2948 rotate_amt: pattern10_0, 2949 }; 2950 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2951 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2952 return Some(expr2_0); 2953 } 2954 } 2955 } 2956 return None; 2957 } 2958 2959 // Generated as internal constructor for term push_unary. 2960 pub fn constructor_push_unary<C: Context>( 2961 ctx: &mut C, 2962 arg0: &VecMInstBuilder, 2963 arg1: &UnaryOp, 2964 arg2: WritableReg, 2965 arg3: Reg, 2966 ) -> Option<Reg> { 2967 let pattern0_0 = arg0; 2968 let pattern1_0 = arg1; 2969 let pattern2_0 = arg2; 2970 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2971 let pattern4_0 = arg3; 2972 // Rule at src/isa/s390x/inst.isle line 1811. 2973 let expr0_0 = MInst::UnaryRR { 2974 op: pattern1_0.clone(), 2975 rd: pattern3_0, 2976 rn: pattern4_0, 2977 }; 2978 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2979 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2980 return Some(expr2_0); 2981 } 2982 return None; 2983 } 2984 2985 // Generated as internal constructor for term push_atomic_cas32. 2986 pub fn constructor_push_atomic_cas32<C: Context>( 2987 ctx: &mut C, 2988 arg0: &VecMInstBuilder, 2989 arg1: WritableReg, 2990 arg2: Reg, 2991 arg3: &MemArg, 2992 ) -> Option<Reg> { 2993 let pattern0_0 = arg0; 2994 let pattern1_0 = arg1; 2995 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2996 let pattern3_0 = arg2; 2997 let pattern4_0 = arg3; 2998 // Rule at src/isa/s390x/inst.isle line 1817. 2999 let expr0_0 = MInst::AtomicCas32 { 3000 rd: pattern2_0, 3001 rn: pattern3_0, 3002 mem: pattern4_0.clone(), 3003 }; 3004 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3005 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3006 return Some(expr2_0); 3007 } 3008 return None; 3009 } 3010 3011 // Generated as internal constructor for term push_atomic_cas64. 3012 pub fn constructor_push_atomic_cas64<C: Context>( 3013 ctx: &mut C, 3014 arg0: &VecMInstBuilder, 3015 arg1: WritableReg, 3016 arg2: Reg, 3017 arg3: &MemArg, 3018 ) -> Option<Reg> { 3019 let pattern0_0 = arg0; 3020 let pattern1_0 = arg1; 3021 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3022 let pattern3_0 = arg2; 3023 let pattern4_0 = arg3; 3024 // Rule at src/isa/s390x/inst.isle line 1823. 3025 let expr0_0 = MInst::AtomicCas64 { 3026 rd: pattern2_0, 3027 rn: pattern3_0, 3028 mem: pattern4_0.clone(), 3029 }; 3030 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3031 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3032 return Some(expr2_0); 3033 } 3034 return None; 3035 } 3036 3037 // Generated as internal constructor for term push_break_if. 3038 pub fn constructor_push_break_if<C: Context>( 3039 ctx: &mut C, 3040 arg0: &VecMInstBuilder, 3041 arg1: &ProducesFlags, 3042 arg2: &Cond, 3043 ) -> Option<Reg> { 3044 let pattern0_0 = arg0; 3045 let pattern1_0 = arg1; 3046 if let &ProducesFlags::ProducesFlagsSideEffect { 3047 inst: ref pattern2_0, 3048 } = pattern1_0 3049 { 3050 let pattern3_0 = arg2; 3051 // Rule at src/isa/s390x/inst.isle line 1829. 3052 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3053 let expr1_0 = MInst::CondBreak { 3054 cond: pattern3_0.clone(), 3055 }; 3056 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3057 let expr3_0 = C::invalid_reg(ctx); 3058 return Some(expr3_0); 3059 } 3060 return None; 3061 } 3062 3063 // Generated as internal constructor for term emit_loop. 3064 pub fn constructor_emit_loop<C: Context>( 3065 ctx: &mut C, 3066 arg0: &VecMInstBuilder, 3067 arg1: &Cond, 3068 ) -> Option<Unit> { 3069 let pattern0_0 = arg0; 3070 let pattern1_0 = arg1; 3071 // Rule at src/isa/s390x/inst.isle line 1836. 3072 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3073 let expr1_0 = MInst::Loop { 3074 body: expr0_0, 3075 cond: pattern1_0.clone(), 3076 }; 3077 let expr2_0 = C::emit(ctx, &expr1_0); 3078 return Some(expr2_0); 3079 } 3080 3081 // Generated as internal constructor for term emit_mov. 3082 pub fn constructor_emit_mov<C: Context>( 3083 ctx: &mut C, 3084 arg0: Type, 3085 arg1: WritableReg, 3086 arg2: Reg, 3087 ) -> Option<Unit> { 3088 let pattern0_0 = arg0; 3089 if pattern0_0 == F32 { 3090 let pattern2_0 = arg1; 3091 let pattern3_0 = arg2; 3092 // Rule at src/isa/s390x/inst.isle line 1851. 3093 let expr0_0 = MInst::FpuMove32 { 3094 rd: pattern2_0, 3095 rn: pattern3_0, 3096 }; 3097 let expr1_0 = C::emit(ctx, &expr0_0); 3098 return Some(expr1_0); 3099 } 3100 if pattern0_0 == F64 { 3101 let pattern2_0 = arg1; 3102 let pattern3_0 = arg2; 3103 // Rule at src/isa/s390x/inst.isle line 1854. 3104 let expr0_0 = MInst::FpuMove64 { 3105 rd: pattern2_0, 3106 rn: pattern3_0, 3107 }; 3108 let expr1_0 = C::emit(ctx, &expr0_0); 3109 return Some(expr1_0); 3110 } 3111 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3112 let pattern2_0 = arg1; 3113 let pattern3_0 = arg2; 3114 // Rule at src/isa/s390x/inst.isle line 1845. 3115 let expr0_0 = MInst::Mov32 { 3116 rd: pattern2_0, 3117 rm: pattern3_0, 3118 }; 3119 let expr1_0 = C::emit(ctx, &expr0_0); 3120 return Some(expr1_0); 3121 } 3122 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3123 let pattern2_0 = arg1; 3124 let pattern3_0 = arg2; 3125 // Rule at src/isa/s390x/inst.isle line 1848. 3126 let expr0_0 = MInst::Mov64 { 3127 rd: pattern2_0, 3128 rm: pattern3_0, 3129 }; 3130 let expr1_0 = C::emit(ctx, &expr0_0); 3131 return Some(expr1_0); 3132 } 3133 return None; 3134 } 3135 3136 // Generated as internal constructor for term copy_writable_reg. 3137 pub fn constructor_copy_writable_reg<C: Context>( 3138 ctx: &mut C, 3139 arg0: Type, 3140 arg1: Reg, 3141 ) -> Option<WritableReg> { 3142 let pattern0_0 = arg0; 3143 let pattern1_0 = arg1; 3144 // Rule at src/isa/s390x/inst.isle line 1859. 3145 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3146 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3147 return Some(expr0_0); 3148 } 3149 3150 // Generated as internal constructor for term copy_reg. 3151 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3152 let pattern0_0 = arg0; 3153 let pattern1_0 = arg1; 3154 // Rule at src/isa/s390x/inst.isle line 1866. 3155 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3156 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3157 return Some(expr1_0); 3158 } 3159 3160 // Generated as internal constructor for term emit_load. 3161 pub fn constructor_emit_load<C: Context>( 3162 ctx: &mut C, 3163 arg0: Type, 3164 arg1: WritableReg, 3165 arg2: &MemArg, 3166 ) -> Option<Unit> { 3167 let pattern0_0 = arg0; 3168 if pattern0_0 == I32 { 3169 let pattern2_0 = arg1; 3170 let pattern3_0 = arg2; 3171 // Rule at src/isa/s390x/inst.isle line 1870. 3172 let expr0_0 = MInst::Load32 { 3173 rd: pattern2_0, 3174 mem: pattern3_0.clone(), 3175 }; 3176 let expr1_0 = C::emit(ctx, &expr0_0); 3177 return Some(expr1_0); 3178 } 3179 if pattern0_0 == I64 { 3180 let pattern2_0 = arg1; 3181 let pattern3_0 = arg2; 3182 // Rule at src/isa/s390x/inst.isle line 1872. 3183 let expr0_0 = MInst::Load64 { 3184 rd: pattern2_0, 3185 mem: pattern3_0.clone(), 3186 }; 3187 let expr1_0 = C::emit(ctx, &expr0_0); 3188 return Some(expr1_0); 3189 } 3190 return None; 3191 } 3192 3193 // Generated as internal constructor for term emit_imm. 3194 pub fn constructor_emit_imm<C: Context>( 3195 ctx: &mut C, 3196 arg0: Type, 3197 arg1: WritableReg, 3198 arg2: u64, 3199 ) -> Option<Unit> { 3200 let pattern0_0 = arg0; 3201 if pattern0_0 == F32 { 3202 let pattern2_0 = arg1; 3203 let pattern3_0 = arg2; 3204 // Rule at src/isa/s390x/inst.isle line 1928. 3205 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3206 let expr1_0 = MInst::LoadFpuConst32 { 3207 rd: pattern2_0, 3208 const_data: expr0_0, 3209 }; 3210 let expr2_0 = C::emit(ctx, &expr1_0); 3211 return Some(expr2_0); 3212 } 3213 if pattern0_0 == F64 { 3214 let pattern2_0 = arg1; 3215 let pattern3_0 = arg2; 3216 // Rule at src/isa/s390x/inst.isle line 1933. 3217 let expr0_0 = MInst::LoadFpuConst64 { 3218 rd: pattern2_0, 3219 const_data: pattern3_0, 3220 }; 3221 let expr1_0 = C::emit(ctx, &expr0_0); 3222 return Some(expr1_0); 3223 } 3224 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3225 let pattern2_0 = arg1; 3226 let pattern3_0 = arg2; 3227 // Rule at src/isa/s390x/inst.isle line 1882. 3228 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3229 let expr1_0 = MInst::Mov32SImm16 { 3230 rd: pattern2_0, 3231 imm: expr0_0, 3232 }; 3233 let expr2_0 = C::emit(ctx, &expr1_0); 3234 return Some(expr2_0); 3235 } 3236 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3237 let pattern2_0 = arg1; 3238 let pattern3_0 = arg2; 3239 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3240 // Rule at src/isa/s390x/inst.isle line 1886. 3241 let expr0_0 = MInst::Mov32SImm16 { 3242 rd: pattern2_0, 3243 imm: pattern4_0, 3244 }; 3245 let expr1_0 = C::emit(ctx, &expr0_0); 3246 return Some(expr1_0); 3247 } 3248 // Rule at src/isa/s390x/inst.isle line 1890. 3249 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3250 let expr1_0 = MInst::Mov32Imm { 3251 rd: pattern2_0, 3252 imm: expr0_0, 3253 }; 3254 let expr2_0 = C::emit(ctx, &expr1_0); 3255 return Some(expr2_0); 3256 } 3257 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3258 let pattern2_0 = arg1; 3259 let pattern3_0 = arg2; 3260 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3261 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3262 // Rule at src/isa/s390x/inst.isle line 1910. 3263 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3264 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3265 return Some(expr1_0); 3266 } 3267 } 3268 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3269 // Rule at src/isa/s390x/inst.isle line 1894. 3270 let expr0_0 = MInst::Mov64SImm16 { 3271 rd: pattern2_0, 3272 imm: pattern4_0, 3273 }; 3274 let expr1_0 = C::emit(ctx, &expr0_0); 3275 return Some(expr1_0); 3276 } 3277 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3278 // Rule at src/isa/s390x/inst.isle line 1898. 3279 let expr0_0 = MInst::Mov64SImm32 { 3280 rd: pattern2_0, 3281 imm: pattern4_0, 3282 }; 3283 let expr1_0 = C::emit(ctx, &expr0_0); 3284 return Some(expr1_0); 3285 } 3286 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3287 // Rule at src/isa/s390x/inst.isle line 1906. 3288 let expr0_0 = MInst::Mov64UImm32Shifted { 3289 rd: pattern2_0, 3290 imm: pattern4_0, 3291 }; 3292 let expr1_0 = C::emit(ctx, &expr0_0); 3293 return Some(expr1_0); 3294 } 3295 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3296 // Rule at src/isa/s390x/inst.isle line 1902. 3297 let expr0_0 = MInst::Mov64UImm16Shifted { 3298 rd: pattern2_0, 3299 imm: pattern4_0, 3300 }; 3301 let expr1_0 = C::emit(ctx, &expr0_0); 3302 return Some(expr1_0); 3303 } 3304 } 3305 return None; 3306 } 3307 3308 // Generated as internal constructor for term emit_insert_imm. 3309 pub fn constructor_emit_insert_imm<C: Context>( 3310 ctx: &mut C, 3311 arg0: WritableReg, 3312 arg1: u64, 3313 ) -> Option<Unit> { 3314 let pattern0_0 = arg0; 3315 let pattern1_0 = arg1; 3316 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3317 // Rule at src/isa/s390x/inst.isle line 1923. 3318 let expr0_0 = MInst::Insert64UImm32Shifted { 3319 rd: pattern0_0, 3320 imm: pattern2_0, 3321 }; 3322 let expr1_0 = C::emit(ctx, &expr0_0); 3323 return Some(expr1_0); 3324 } 3325 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3326 // Rule at src/isa/s390x/inst.isle line 1919. 3327 let expr0_0 = MInst::Insert64UImm16Shifted { 3328 rd: pattern0_0, 3329 imm: pattern2_0, 3330 }; 3331 let expr1_0 = C::emit(ctx, &expr0_0); 3332 return Some(expr1_0); 3333 } 3334 return None; 3335 } 3336 3337 // Generated as internal constructor for term imm. 3338 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3339 let pattern0_0 = arg0; 3340 let pattern1_0 = arg1; 3341 // Rule at src/isa/s390x/inst.isle line 1938. 3342 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3343 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3344 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3345 return Some(expr2_0); 3346 } 3347 3348 // Generated as internal constructor for term imm_regpair_lo. 3349 pub fn constructor_imm_regpair_lo<C: Context>( 3350 ctx: &mut C, 3351 arg0: Type, 3352 arg1: u64, 3353 arg2: &RegPair, 3354 ) -> Option<RegPair> { 3355 let pattern0_0 = arg0; 3356 let pattern1_0 = arg1; 3357 let pattern2_0 = arg2; 3358 // Rule at src/isa/s390x/inst.isle line 1946. 3359 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3360 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3361 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3362 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3363 return Some(expr3_0); 3364 } 3365 3366 // Generated as internal constructor for term imm_regpair_hi. 3367 pub fn constructor_imm_regpair_hi<C: Context>( 3368 ctx: &mut C, 3369 arg0: Type, 3370 arg1: u64, 3371 arg2: &RegPair, 3372 ) -> Option<RegPair> { 3373 let pattern0_0 = arg0; 3374 let pattern1_0 = arg1; 3375 let pattern2_0 = arg2; 3376 // Rule at src/isa/s390x/inst.isle line 1954. 3377 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3378 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3379 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3380 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3381 return Some(expr3_0); 3382 } 3383 3384 // Generated as internal constructor for term ty_ext32. 3385 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3386 let pattern0_0 = arg0; 3387 if pattern0_0 == I8 { 3388 // Rule at src/isa/s390x/inst.isle line 1964. 3389 let expr0_0: Type = I32; 3390 return Some(expr0_0); 3391 } 3392 if pattern0_0 == I16 { 3393 // Rule at src/isa/s390x/inst.isle line 1965. 3394 let expr0_0: Type = I32; 3395 return Some(expr0_0); 3396 } 3397 if pattern0_0 == I32 { 3398 // Rule at src/isa/s390x/inst.isle line 1966. 3399 let expr0_0: Type = I32; 3400 return Some(expr0_0); 3401 } 3402 if pattern0_0 == I64 { 3403 // Rule at src/isa/s390x/inst.isle line 1967. 3404 let expr0_0: Type = I64; 3405 return Some(expr0_0); 3406 } 3407 return None; 3408 } 3409 3410 // Generated as internal constructor for term ty_ext64. 3411 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3412 let pattern0_0 = arg0; 3413 if pattern0_0 == I8 { 3414 // Rule at src/isa/s390x/inst.isle line 1971. 3415 let expr0_0: Type = I64; 3416 return Some(expr0_0); 3417 } 3418 if pattern0_0 == I16 { 3419 // Rule at src/isa/s390x/inst.isle line 1972. 3420 let expr0_0: Type = I64; 3421 return Some(expr0_0); 3422 } 3423 if pattern0_0 == I32 { 3424 // Rule at src/isa/s390x/inst.isle line 1973. 3425 let expr0_0: Type = I64; 3426 return Some(expr0_0); 3427 } 3428 if pattern0_0 == I64 { 3429 // Rule at src/isa/s390x/inst.isle line 1974. 3430 let expr0_0: Type = I64; 3431 return Some(expr0_0); 3432 } 3433 return None; 3434 } 3435 3436 // Generated as internal constructor for term emit_zext32_reg. 3437 pub fn constructor_emit_zext32_reg<C: Context>( 3438 ctx: &mut C, 3439 arg0: WritableReg, 3440 arg1: Type, 3441 arg2: Reg, 3442 ) -> Option<Unit> { 3443 let pattern0_0 = arg0; 3444 let pattern1_0 = arg1; 3445 let pattern2_0 = arg2; 3446 // Rule at src/isa/s390x/inst.isle line 1979. 3447 let expr0_0: bool = false; 3448 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3449 let expr2_0: u8 = 32; 3450 let expr3_0 = MInst::Extend { 3451 rd: pattern0_0, 3452 rn: pattern2_0, 3453 signed: expr0_0, 3454 from_bits: expr1_0, 3455 to_bits: expr2_0, 3456 }; 3457 let expr4_0 = C::emit(ctx, &expr3_0); 3458 return Some(expr4_0); 3459 } 3460 3461 // Generated as internal constructor for term emit_sext32_reg. 3462 pub fn constructor_emit_sext32_reg<C: Context>( 3463 ctx: &mut C, 3464 arg0: WritableReg, 3465 arg1: Type, 3466 arg2: Reg, 3467 ) -> Option<Unit> { 3468 let pattern0_0 = arg0; 3469 let pattern1_0 = arg1; 3470 let pattern2_0 = arg2; 3471 // Rule at src/isa/s390x/inst.isle line 1985. 3472 let expr0_0: bool = true; 3473 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3474 let expr2_0: u8 = 32; 3475 let expr3_0 = MInst::Extend { 3476 rd: pattern0_0, 3477 rn: pattern2_0, 3478 signed: expr0_0, 3479 from_bits: expr1_0, 3480 to_bits: expr2_0, 3481 }; 3482 let expr4_0 = C::emit(ctx, &expr3_0); 3483 return Some(expr4_0); 3484 } 3485 3486 // Generated as internal constructor for term emit_zext64_reg. 3487 pub fn constructor_emit_zext64_reg<C: Context>( 3488 ctx: &mut C, 3489 arg0: WritableReg, 3490 arg1: Type, 3491 arg2: Reg, 3492 ) -> Option<Unit> { 3493 let pattern0_0 = arg0; 3494 let pattern1_0 = arg1; 3495 let pattern2_0 = arg2; 3496 // Rule at src/isa/s390x/inst.isle line 1991. 3497 let expr0_0: bool = false; 3498 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3499 let expr2_0: u8 = 64; 3500 let expr3_0 = MInst::Extend { 3501 rd: pattern0_0, 3502 rn: pattern2_0, 3503 signed: expr0_0, 3504 from_bits: expr1_0, 3505 to_bits: expr2_0, 3506 }; 3507 let expr4_0 = C::emit(ctx, &expr3_0); 3508 return Some(expr4_0); 3509 } 3510 3511 // Generated as internal constructor for term emit_sext64_reg. 3512 pub fn constructor_emit_sext64_reg<C: Context>( 3513 ctx: &mut C, 3514 arg0: WritableReg, 3515 arg1: Type, 3516 arg2: Reg, 3517 ) -> Option<Unit> { 3518 let pattern0_0 = arg0; 3519 let pattern1_0 = arg1; 3520 let pattern2_0 = arg2; 3521 // Rule at src/isa/s390x/inst.isle line 1997. 3522 let expr0_0: bool = true; 3523 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3524 let expr2_0: u8 = 64; 3525 let expr3_0 = MInst::Extend { 3526 rd: pattern0_0, 3527 rn: pattern2_0, 3528 signed: expr0_0, 3529 from_bits: expr1_0, 3530 to_bits: expr2_0, 3531 }; 3532 let expr4_0 = C::emit(ctx, &expr3_0); 3533 return Some(expr4_0); 3534 } 3535 3536 // Generated as internal constructor for term zext32_reg. 3537 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3538 let pattern0_0 = arg0; 3539 let pattern1_0 = arg1; 3540 // Rule at src/isa/s390x/inst.isle line 2003. 3541 let expr0_0: Type = I32; 3542 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3543 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3544 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3545 return Some(expr3_0); 3546 } 3547 3548 // Generated as internal constructor for term sext32_reg. 3549 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3550 let pattern0_0 = arg0; 3551 let pattern1_0 = arg1; 3552 // Rule at src/isa/s390x/inst.isle line 2011. 3553 let expr0_0: Type = I32; 3554 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3555 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3556 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3557 return Some(expr3_0); 3558 } 3559 3560 // Generated as internal constructor for term zext64_reg. 3561 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3562 let pattern0_0 = arg0; 3563 let pattern1_0 = arg1; 3564 // Rule at src/isa/s390x/inst.isle line 2019. 3565 let expr0_0: Type = I64; 3566 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3567 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3568 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3569 return Some(expr3_0); 3570 } 3571 3572 // Generated as internal constructor for term sext64_reg. 3573 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3574 let pattern0_0 = arg0; 3575 let pattern1_0 = arg1; 3576 // Rule at src/isa/s390x/inst.isle line 2027. 3577 let expr0_0: Type = I64; 3578 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3579 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3580 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3581 return Some(expr3_0); 3582 } 3583 3584 // Generated as internal constructor for term emit_zext32_mem. 3585 pub fn constructor_emit_zext32_mem<C: Context>( 3586 ctx: &mut C, 3587 arg0: WritableReg, 3588 arg1: Type, 3589 arg2: &MemArg, 3590 ) -> Option<Unit> { 3591 let pattern0_0 = arg0; 3592 let pattern1_0 = arg1; 3593 if pattern1_0 == I8 { 3594 let pattern3_0 = arg2; 3595 // Rule at src/isa/s390x/inst.isle line 2035. 3596 let expr0_0 = MInst::Load32ZExt8 { 3597 rd: pattern0_0, 3598 mem: pattern3_0.clone(), 3599 }; 3600 let expr1_0 = C::emit(ctx, &expr0_0); 3601 return Some(expr1_0); 3602 } 3603 if pattern1_0 == I16 { 3604 let pattern3_0 = arg2; 3605 // Rule at src/isa/s390x/inst.isle line 2036. 3606 let expr0_0 = MInst::Load32ZExt16 { 3607 rd: pattern0_0, 3608 mem: pattern3_0.clone(), 3609 }; 3610 let expr1_0 = C::emit(ctx, &expr0_0); 3611 return Some(expr1_0); 3612 } 3613 return None; 3614 } 3615 3616 // Generated as internal constructor for term emit_sext32_mem. 3617 pub fn constructor_emit_sext32_mem<C: Context>( 3618 ctx: &mut C, 3619 arg0: WritableReg, 3620 arg1: Type, 3621 arg2: &MemArg, 3622 ) -> Option<Unit> { 3623 let pattern0_0 = arg0; 3624 let pattern1_0 = arg1; 3625 if pattern1_0 == I8 { 3626 let pattern3_0 = arg2; 3627 // Rule at src/isa/s390x/inst.isle line 2040. 3628 let expr0_0 = MInst::Load32SExt8 { 3629 rd: pattern0_0, 3630 mem: pattern3_0.clone(), 3631 }; 3632 let expr1_0 = C::emit(ctx, &expr0_0); 3633 return Some(expr1_0); 3634 } 3635 if pattern1_0 == I16 { 3636 let pattern3_0 = arg2; 3637 // Rule at src/isa/s390x/inst.isle line 2041. 3638 let expr0_0 = MInst::Load32SExt16 { 3639 rd: pattern0_0, 3640 mem: pattern3_0.clone(), 3641 }; 3642 let expr1_0 = C::emit(ctx, &expr0_0); 3643 return Some(expr1_0); 3644 } 3645 return None; 3646 } 3647 3648 // Generated as internal constructor for term emit_zext64_mem. 3649 pub fn constructor_emit_zext64_mem<C: Context>( 3650 ctx: &mut C, 3651 arg0: WritableReg, 3652 arg1: Type, 3653 arg2: &MemArg, 3654 ) -> Option<Unit> { 3655 let pattern0_0 = arg0; 3656 let pattern1_0 = arg1; 3657 if pattern1_0 == I8 { 3658 let pattern3_0 = arg2; 3659 // Rule at src/isa/s390x/inst.isle line 2045. 3660 let expr0_0 = MInst::Load64ZExt8 { 3661 rd: pattern0_0, 3662 mem: pattern3_0.clone(), 3663 }; 3664 let expr1_0 = C::emit(ctx, &expr0_0); 3665 return Some(expr1_0); 3666 } 3667 if pattern1_0 == I16 { 3668 let pattern3_0 = arg2; 3669 // Rule at src/isa/s390x/inst.isle line 2046. 3670 let expr0_0 = MInst::Load64ZExt16 { 3671 rd: pattern0_0, 3672 mem: pattern3_0.clone(), 3673 }; 3674 let expr1_0 = C::emit(ctx, &expr0_0); 3675 return Some(expr1_0); 3676 } 3677 if pattern1_0 == I32 { 3678 let pattern3_0 = arg2; 3679 // Rule at src/isa/s390x/inst.isle line 2047. 3680 let expr0_0 = MInst::Load64ZExt32 { 3681 rd: pattern0_0, 3682 mem: pattern3_0.clone(), 3683 }; 3684 let expr1_0 = C::emit(ctx, &expr0_0); 3685 return Some(expr1_0); 3686 } 3687 return None; 3688 } 3689 3690 // Generated as internal constructor for term emit_sext64_mem. 3691 pub fn constructor_emit_sext64_mem<C: Context>( 3692 ctx: &mut C, 3693 arg0: WritableReg, 3694 arg1: Type, 3695 arg2: &MemArg, 3696 ) -> Option<Unit> { 3697 let pattern0_0 = arg0; 3698 let pattern1_0 = arg1; 3699 if pattern1_0 == I8 { 3700 let pattern3_0 = arg2; 3701 // Rule at src/isa/s390x/inst.isle line 2051. 3702 let expr0_0 = MInst::Load64SExt8 { 3703 rd: pattern0_0, 3704 mem: pattern3_0.clone(), 3705 }; 3706 let expr1_0 = C::emit(ctx, &expr0_0); 3707 return Some(expr1_0); 3708 } 3709 if pattern1_0 == I16 { 3710 let pattern3_0 = arg2; 3711 // Rule at src/isa/s390x/inst.isle line 2052. 3712 let expr0_0 = MInst::Load64SExt16 { 3713 rd: pattern0_0, 3714 mem: pattern3_0.clone(), 3715 }; 3716 let expr1_0 = C::emit(ctx, &expr0_0); 3717 return Some(expr1_0); 3718 } 3719 if pattern1_0 == I32 { 3720 let pattern3_0 = arg2; 3721 // Rule at src/isa/s390x/inst.isle line 2053. 3722 let expr0_0 = MInst::Load64SExt32 { 3723 rd: pattern0_0, 3724 mem: pattern3_0.clone(), 3725 }; 3726 let expr1_0 = C::emit(ctx, &expr0_0); 3727 return Some(expr1_0); 3728 } 3729 return None; 3730 } 3731 3732 // Generated as internal constructor for term zext32_mem. 3733 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3734 let pattern0_0 = arg0; 3735 let pattern1_0 = arg1; 3736 // Rule at src/isa/s390x/inst.isle line 2057. 3737 let expr0_0: Type = I32; 3738 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3739 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3740 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3741 return Some(expr3_0); 3742 } 3743 3744 // Generated as internal constructor for term sext32_mem. 3745 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3746 let pattern0_0 = arg0; 3747 let pattern1_0 = arg1; 3748 // Rule at src/isa/s390x/inst.isle line 2064. 3749 let expr0_0: Type = I32; 3750 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3751 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3752 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3753 return Some(expr3_0); 3754 } 3755 3756 // Generated as internal constructor for term zext64_mem. 3757 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3758 let pattern0_0 = arg0; 3759 let pattern1_0 = arg1; 3760 // Rule at src/isa/s390x/inst.isle line 2071. 3761 let expr0_0: Type = I64; 3762 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3763 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3764 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3765 return Some(expr3_0); 3766 } 3767 3768 // Generated as internal constructor for term sext64_mem. 3769 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3770 let pattern0_0 = arg0; 3771 let pattern1_0 = arg1; 3772 // Rule at src/isa/s390x/inst.isle line 2078. 3773 let expr0_0: Type = I64; 3774 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3775 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3776 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3777 return Some(expr3_0); 3778 } 3779 3780 // Generated as internal constructor for term emit_put_in_reg_zext32. 3781 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3782 ctx: &mut C, 3783 arg0: WritableReg, 3784 arg1: Value, 3785 ) -> Option<Unit> { 3786 let pattern0_0 = arg0; 3787 let pattern1_0 = arg1; 3788 let pattern2_0 = C::value_type(ctx, pattern1_0); 3789 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3790 // Rule at src/isa/s390x/inst.isle line 2086. 3791 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3792 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3793 return Some(expr1_0); 3794 } 3795 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3796 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3797 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3798 if let &InstructionData::Load { 3799 opcode: ref pattern6_0, 3800 arg: pattern6_1, 3801 flags: pattern6_2, 3802 offset: pattern6_3, 3803 } = &pattern5_0 3804 { 3805 if let &Opcode::Load = pattern6_0 { 3806 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3807 // Rule at src/isa/s390x/inst.isle line 2088. 3808 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3809 let expr1_0 = 3810 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3811 return Some(expr1_0); 3812 } 3813 } 3814 } 3815 } 3816 // Rule at src/isa/s390x/inst.isle line 2090. 3817 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3818 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3819 return Some(expr1_0); 3820 } 3821 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3822 // Rule at src/isa/s390x/inst.isle line 2092. 3823 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3824 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3825 return Some(expr1_0); 3826 } 3827 return None; 3828 } 3829 3830 // Generated as internal constructor for term emit_put_in_reg_sext32. 3831 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3832 ctx: &mut C, 3833 arg0: WritableReg, 3834 arg1: Value, 3835 ) -> Option<Unit> { 3836 let pattern0_0 = arg0; 3837 let pattern1_0 = arg1; 3838 let pattern2_0 = C::value_type(ctx, pattern1_0); 3839 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3840 // Rule at src/isa/s390x/inst.isle line 2097. 3841 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3842 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3843 return Some(expr1_0); 3844 } 3845 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3846 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3847 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3848 if let &InstructionData::Load { 3849 opcode: ref pattern6_0, 3850 arg: pattern6_1, 3851 flags: pattern6_2, 3852 offset: pattern6_3, 3853 } = &pattern5_0 3854 { 3855 if let &Opcode::Load = pattern6_0 { 3856 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3857 // Rule at src/isa/s390x/inst.isle line 2099. 3858 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3859 let expr1_0 = 3860 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3861 return Some(expr1_0); 3862 } 3863 } 3864 } 3865 } 3866 // Rule at src/isa/s390x/inst.isle line 2101. 3867 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3868 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3869 return Some(expr1_0); 3870 } 3871 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3872 // Rule at src/isa/s390x/inst.isle line 2103. 3873 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3874 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3875 return Some(expr1_0); 3876 } 3877 return None; 3878 } 3879 3880 // Generated as internal constructor for term emit_put_in_reg_zext64. 3881 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3882 ctx: &mut C, 3883 arg0: WritableReg, 3884 arg1: Value, 3885 ) -> Option<Unit> { 3886 let pattern0_0 = arg0; 3887 let pattern1_0 = arg1; 3888 let pattern2_0 = C::value_type(ctx, pattern1_0); 3889 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3890 // Rule at src/isa/s390x/inst.isle line 2108. 3891 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3892 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3893 return Some(expr1_0); 3894 } 3895 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3896 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3897 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3898 if let &InstructionData::Load { 3899 opcode: ref pattern6_0, 3900 arg: pattern6_1, 3901 flags: pattern6_2, 3902 offset: pattern6_3, 3903 } = &pattern5_0 3904 { 3905 if let &Opcode::Load = pattern6_0 { 3906 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3907 // Rule at src/isa/s390x/inst.isle line 2110. 3908 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3909 let expr1_0 = 3910 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3911 return Some(expr1_0); 3912 } 3913 } 3914 } 3915 } 3916 // Rule at src/isa/s390x/inst.isle line 2112. 3917 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3918 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3919 return Some(expr1_0); 3920 } 3921 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3922 // Rule at src/isa/s390x/inst.isle line 2114. 3923 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3924 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3925 return Some(expr1_0); 3926 } 3927 return None; 3928 } 3929 3930 // Generated as internal constructor for term emit_put_in_reg_sext64. 3931 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3932 ctx: &mut C, 3933 arg0: WritableReg, 3934 arg1: Value, 3935 ) -> Option<Unit> { 3936 let pattern0_0 = arg0; 3937 let pattern1_0 = arg1; 3938 let pattern2_0 = C::value_type(ctx, pattern1_0); 3939 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3940 // Rule at src/isa/s390x/inst.isle line 2119. 3941 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3942 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3943 return Some(expr1_0); 3944 } 3945 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3946 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3947 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3948 if let &InstructionData::Load { 3949 opcode: ref pattern6_0, 3950 arg: pattern6_1, 3951 flags: pattern6_2, 3952 offset: pattern6_3, 3953 } = &pattern5_0 3954 { 3955 if let &Opcode::Load = pattern6_0 { 3956 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3957 // Rule at src/isa/s390x/inst.isle line 2121. 3958 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3959 let expr1_0 = 3960 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3961 return Some(expr1_0); 3962 } 3963 } 3964 } 3965 } 3966 // Rule at src/isa/s390x/inst.isle line 2123. 3967 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3968 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3969 return Some(expr1_0); 3970 } 3971 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3972 // Rule at src/isa/s390x/inst.isle line 2125. 3973 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3974 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3975 return Some(expr1_0); 3976 } 3977 return None; 3978 } 3979 3980 // Generated as internal constructor for term put_in_reg_zext32. 3981 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3982 let pattern0_0 = arg0; 3983 let pattern1_0 = C::value_type(ctx, pattern0_0); 3984 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3985 // Rule at src/isa/s390x/inst.isle line 2130. 3986 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3987 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3988 return Some(expr1_0); 3989 } 3990 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3991 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3992 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3993 if let &InstructionData::Load { 3994 opcode: ref pattern5_0, 3995 arg: pattern5_1, 3996 flags: pattern5_2, 3997 offset: pattern5_3, 3998 } = &pattern4_0 3999 { 4000 if let &Opcode::Load = pattern5_0 { 4001 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4002 // Rule at src/isa/s390x/inst.isle line 2132. 4003 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4004 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4005 return Some(expr1_0); 4006 } 4007 } 4008 } 4009 } 4010 // Rule at src/isa/s390x/inst.isle line 2134. 4011 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4012 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4013 return Some(expr1_0); 4014 } 4015 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4016 // Rule at src/isa/s390x/inst.isle line 2136. 4017 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4018 return Some(expr0_0); 4019 } 4020 return None; 4021 } 4022 4023 // Generated as internal constructor for term put_in_reg_sext32. 4024 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4025 let pattern0_0 = arg0; 4026 let pattern1_0 = C::value_type(ctx, pattern0_0); 4027 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4028 // Rule at src/isa/s390x/inst.isle line 2141. 4029 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4030 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4031 return Some(expr1_0); 4032 } 4033 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4034 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4035 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4036 if let &InstructionData::Load { 4037 opcode: ref pattern5_0, 4038 arg: pattern5_1, 4039 flags: pattern5_2, 4040 offset: pattern5_3, 4041 } = &pattern4_0 4042 { 4043 if let &Opcode::Load = pattern5_0 { 4044 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4045 // Rule at src/isa/s390x/inst.isle line 2143. 4046 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4047 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4048 return Some(expr1_0); 4049 } 4050 } 4051 } 4052 } 4053 // Rule at src/isa/s390x/inst.isle line 2145. 4054 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4055 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4056 return Some(expr1_0); 4057 } 4058 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4059 // Rule at src/isa/s390x/inst.isle line 2147. 4060 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4061 return Some(expr0_0); 4062 } 4063 return None; 4064 } 4065 4066 // Generated as internal constructor for term put_in_reg_zext64. 4067 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4068 let pattern0_0 = arg0; 4069 let pattern1_0 = C::value_type(ctx, pattern0_0); 4070 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4071 // Rule at src/isa/s390x/inst.isle line 2152. 4072 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4073 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4074 return Some(expr1_0); 4075 } 4076 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4077 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4078 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4079 if let &InstructionData::Load { 4080 opcode: ref pattern5_0, 4081 arg: pattern5_1, 4082 flags: pattern5_2, 4083 offset: pattern5_3, 4084 } = &pattern4_0 4085 { 4086 if let &Opcode::Load = pattern5_0 { 4087 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4088 // Rule at src/isa/s390x/inst.isle line 2154. 4089 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4090 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4091 return Some(expr1_0); 4092 } 4093 } 4094 } 4095 } 4096 // Rule at src/isa/s390x/inst.isle line 2156. 4097 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4098 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4099 return Some(expr1_0); 4100 } 4101 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4102 // Rule at src/isa/s390x/inst.isle line 2158. 4103 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4104 return Some(expr0_0); 4105 } 4106 return None; 4107 } 4108 4109 // Generated as internal constructor for term put_in_reg_sext64. 4110 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4111 let pattern0_0 = arg0; 4112 let pattern1_0 = C::value_type(ctx, pattern0_0); 4113 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4114 // Rule at src/isa/s390x/inst.isle line 2163. 4115 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4116 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4117 return Some(expr1_0); 4118 } 4119 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4120 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4121 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4122 if let &InstructionData::Load { 4123 opcode: ref pattern5_0, 4124 arg: pattern5_1, 4125 flags: pattern5_2, 4126 offset: pattern5_3, 4127 } = &pattern4_0 4128 { 4129 if let &Opcode::Load = pattern5_0 { 4130 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4131 // Rule at src/isa/s390x/inst.isle line 2165. 4132 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4133 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4134 return Some(expr1_0); 4135 } 4136 } 4137 } 4138 } 4139 // Rule at src/isa/s390x/inst.isle line 2167. 4140 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4141 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4142 return Some(expr1_0); 4143 } 4144 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4145 // Rule at src/isa/s390x/inst.isle line 2169. 4146 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4147 return Some(expr0_0); 4148 } 4149 return None; 4150 } 4151 4152 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4153 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4154 ctx: &mut C, 4155 arg0: Value, 4156 arg1: &RegPair, 4157 ) -> Option<RegPair> { 4158 let pattern0_0 = arg0; 4159 let pattern1_0 = arg1; 4160 // Rule at src/isa/s390x/inst.isle line 2175. 4161 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4162 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4163 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4164 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4165 return Some(expr3_0); 4166 } 4167 4168 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4169 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4170 ctx: &mut C, 4171 arg0: Value, 4172 arg1: &RegPair, 4173 ) -> Option<RegPair> { 4174 let pattern0_0 = arg0; 4175 let pattern1_0 = arg1; 4176 // Rule at src/isa/s390x/inst.isle line 2183. 4177 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4178 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4179 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4180 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4181 return Some(expr3_0); 4182 } 4183 4184 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4185 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4186 ctx: &mut C, 4187 arg0: Value, 4188 arg1: &RegPair, 4189 ) -> Option<RegPair> { 4190 let pattern0_0 = arg0; 4191 let pattern1_0 = arg1; 4192 // Rule at src/isa/s390x/inst.isle line 2191. 4193 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4194 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4195 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4196 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4197 return Some(expr3_0); 4198 } 4199 4200 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4201 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4202 ctx: &mut C, 4203 arg0: Value, 4204 arg1: &RegPair, 4205 ) -> Option<RegPair> { 4206 let pattern0_0 = arg0; 4207 let pattern1_0 = arg1; 4208 // Rule at src/isa/s390x/inst.isle line 2199. 4209 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4210 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4211 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4212 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4213 return Some(expr3_0); 4214 } 4215 4216 // Generated as internal constructor for term emit_cmov_imm. 4217 pub fn constructor_emit_cmov_imm<C: Context>( 4218 ctx: &mut C, 4219 arg0: Type, 4220 arg1: WritableReg, 4221 arg2: &Cond, 4222 arg3: i16, 4223 ) -> Option<ConsumesFlags> { 4224 let pattern0_0 = arg0; 4225 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4226 let pattern2_0 = arg1; 4227 let pattern3_0 = arg2; 4228 let pattern4_0 = arg3; 4229 // Rule at src/isa/s390x/inst.isle line 2209. 4230 let expr0_0 = MInst::CMov32SImm16 { 4231 rd: pattern2_0, 4232 cond: pattern3_0.clone(), 4233 imm: pattern4_0, 4234 }; 4235 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4236 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4237 inst: expr0_0, 4238 result: expr1_0, 4239 }; 4240 return Some(expr2_0); 4241 } 4242 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4243 let pattern2_0 = arg1; 4244 let pattern3_0 = arg2; 4245 let pattern4_0 = arg3; 4246 // Rule at src/isa/s390x/inst.isle line 2212. 4247 let expr0_0 = MInst::CMov64SImm16 { 4248 rd: pattern2_0, 4249 cond: pattern3_0.clone(), 4250 imm: pattern4_0, 4251 }; 4252 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4253 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4254 inst: expr0_0, 4255 result: expr1_0, 4256 }; 4257 return Some(expr2_0); 4258 } 4259 return None; 4260 } 4261 4262 // Generated as internal constructor for term cmov_imm. 4263 pub fn constructor_cmov_imm<C: Context>( 4264 ctx: &mut C, 4265 arg0: Type, 4266 arg1: &Cond, 4267 arg2: i16, 4268 arg3: Reg, 4269 ) -> Option<ConsumesFlags> { 4270 let pattern0_0 = arg0; 4271 let pattern1_0 = arg1; 4272 let pattern2_0 = arg2; 4273 let pattern3_0 = arg3; 4274 // Rule at src/isa/s390x/inst.isle line 2218. 4275 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4276 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4277 return Some(expr1_0); 4278 } 4279 4280 // Generated as internal constructor for term cmov_imm_regpair_lo. 4281 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4282 ctx: &mut C, 4283 arg0: Type, 4284 arg1: &ProducesFlags, 4285 arg2: &Cond, 4286 arg3: i16, 4287 arg4: &RegPair, 4288 ) -> Option<RegPair> { 4289 let pattern0_0 = arg0; 4290 let pattern1_0 = arg1; 4291 let pattern2_0 = arg2; 4292 let pattern3_0 = arg3; 4293 let pattern4_0 = arg4; 4294 // Rule at src/isa/s390x/inst.isle line 2225. 4295 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4296 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4297 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4298 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4299 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4300 return Some(expr4_0); 4301 } 4302 4303 // Generated as internal constructor for term cmov_imm_regpair_hi. 4304 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4305 ctx: &mut C, 4306 arg0: Type, 4307 arg1: &ProducesFlags, 4308 arg2: &Cond, 4309 arg3: i16, 4310 arg4: &RegPair, 4311 ) -> Option<RegPair> { 4312 let pattern0_0 = arg0; 4313 let pattern1_0 = arg1; 4314 let pattern2_0 = arg2; 4315 let pattern3_0 = arg3; 4316 let pattern4_0 = arg4; 4317 // Rule at src/isa/s390x/inst.isle line 2234. 4318 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4319 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4320 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4321 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4322 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4323 return Some(expr4_0); 4324 } 4325 4326 // Generated as internal constructor for term emit_cmov_reg. 4327 pub fn constructor_emit_cmov_reg<C: Context>( 4328 ctx: &mut C, 4329 arg0: Type, 4330 arg1: WritableReg, 4331 arg2: &Cond, 4332 arg3: Reg, 4333 ) -> Option<ConsumesFlags> { 4334 let pattern0_0 = arg0; 4335 if pattern0_0 == F32 { 4336 let pattern2_0 = arg1; 4337 let pattern3_0 = arg2; 4338 let pattern4_0 = arg3; 4339 // Rule at src/isa/s390x/inst.isle line 2248. 4340 let expr0_0 = MInst::FpuCMov32 { 4341 rd: pattern2_0, 4342 cond: pattern3_0.clone(), 4343 rm: pattern4_0, 4344 }; 4345 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4346 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4347 inst: expr0_0, 4348 result: expr1_0, 4349 }; 4350 return Some(expr2_0); 4351 } 4352 if pattern0_0 == F64 { 4353 let pattern2_0 = arg1; 4354 let pattern3_0 = arg2; 4355 let pattern4_0 = arg3; 4356 // Rule at src/isa/s390x/inst.isle line 2251. 4357 let expr0_0 = MInst::FpuCMov64 { 4358 rd: pattern2_0, 4359 cond: pattern3_0.clone(), 4360 rm: pattern4_0, 4361 }; 4362 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4363 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4364 inst: expr0_0, 4365 result: expr1_0, 4366 }; 4367 return Some(expr2_0); 4368 } 4369 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4370 let pattern2_0 = arg1; 4371 let pattern3_0 = arg2; 4372 let pattern4_0 = arg3; 4373 // Rule at src/isa/s390x/inst.isle line 2242. 4374 let expr0_0 = MInst::CMov32 { 4375 rd: pattern2_0, 4376 cond: pattern3_0.clone(), 4377 rm: pattern4_0, 4378 }; 4379 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4380 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4381 inst: expr0_0, 4382 result: expr1_0, 4383 }; 4384 return Some(expr2_0); 4385 } 4386 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4387 let pattern2_0 = arg1; 4388 let pattern3_0 = arg2; 4389 let pattern4_0 = arg3; 4390 // Rule at src/isa/s390x/inst.isle line 2245. 4391 let expr0_0 = MInst::CMov64 { 4392 rd: pattern2_0, 4393 cond: pattern3_0.clone(), 4394 rm: pattern4_0, 4395 }; 4396 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4397 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4398 inst: expr0_0, 4399 result: expr1_0, 4400 }; 4401 return Some(expr2_0); 4402 } 4403 return None; 4404 } 4405 4406 // Generated as internal constructor for term cmov_reg. 4407 pub fn constructor_cmov_reg<C: Context>( 4408 ctx: &mut C, 4409 arg0: Type, 4410 arg1: &Cond, 4411 arg2: Reg, 4412 arg3: Reg, 4413 ) -> Option<ConsumesFlags> { 4414 let pattern0_0 = arg0; 4415 let pattern1_0 = arg1; 4416 let pattern2_0 = arg2; 4417 let pattern3_0 = arg3; 4418 // Rule at src/isa/s390x/inst.isle line 2257. 4419 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4420 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4421 return Some(expr1_0); 4422 } 4423 4424 // Generated as internal constructor for term trap_if. 4425 pub fn constructor_trap_if<C: Context>( 4426 ctx: &mut C, 4427 arg0: &ProducesFlags, 4428 arg1: &Cond, 4429 arg2: &TrapCode, 4430 ) -> Option<Reg> { 4431 let pattern0_0 = arg0; 4432 match pattern0_0 { 4433 &ProducesFlags::ProducesFlagsSideEffect { 4434 inst: ref pattern1_0, 4435 } => { 4436 let pattern2_0 = arg1; 4437 let pattern3_0 = arg2; 4438 // Rule at src/isa/s390x/inst.isle line 2269. 4439 let expr0_0 = C::emit(ctx, pattern1_0); 4440 let expr1_0 = MInst::TrapIf { 4441 cond: pattern2_0.clone(), 4442 trap_code: pattern3_0.clone(), 4443 }; 4444 let expr2_0 = C::emit(ctx, &expr1_0); 4445 let expr3_0 = C::invalid_reg(ctx); 4446 return Some(expr3_0); 4447 } 4448 &ProducesFlags::ProducesFlagsReturnsReg { 4449 inst: ref pattern1_0, 4450 result: pattern1_1, 4451 } => { 4452 let pattern2_0 = arg1; 4453 let pattern3_0 = arg2; 4454 // Rule at src/isa/s390x/inst.isle line 2265. 4455 let expr0_0 = C::emit(ctx, pattern1_0); 4456 let expr1_0 = MInst::TrapIf { 4457 cond: pattern2_0.clone(), 4458 trap_code: pattern3_0.clone(), 4459 }; 4460 let expr2_0 = C::emit(ctx, &expr1_0); 4461 return Some(pattern1_1); 4462 } 4463 _ => {} 4464 } 4465 return None; 4466 } 4467 4468 // Generated as internal constructor for term icmps_reg_and_trap. 4469 pub fn constructor_icmps_reg_and_trap<C: Context>( 4470 ctx: &mut C, 4471 arg0: Type, 4472 arg1: Reg, 4473 arg2: Reg, 4474 arg3: &Cond, 4475 arg4: &TrapCode, 4476 ) -> Option<Reg> { 4477 let pattern0_0 = arg0; 4478 let pattern1_0 = arg1; 4479 let pattern2_0 = arg2; 4480 let pattern3_0 = arg3; 4481 let pattern4_0 = arg4; 4482 // Rule at src/isa/s390x/inst.isle line 2275. 4483 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4484 let expr1_0 = MInst::CmpTrapRR { 4485 op: expr0_0, 4486 rn: pattern1_0, 4487 rm: pattern2_0, 4488 cond: pattern3_0.clone(), 4489 trap_code: pattern4_0.clone(), 4490 }; 4491 let expr2_0 = C::emit(ctx, &expr1_0); 4492 let expr3_0 = C::invalid_reg(ctx); 4493 return Some(expr3_0); 4494 } 4495 4496 // Generated as internal constructor for term icmps_simm16_and_trap. 4497 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4498 ctx: &mut C, 4499 arg0: Type, 4500 arg1: Reg, 4501 arg2: i16, 4502 arg3: &Cond, 4503 arg4: &TrapCode, 4504 ) -> Option<Reg> { 4505 let pattern0_0 = arg0; 4506 let pattern1_0 = arg1; 4507 let pattern2_0 = arg2; 4508 let pattern3_0 = arg3; 4509 let pattern4_0 = arg4; 4510 // Rule at src/isa/s390x/inst.isle line 2281. 4511 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4512 let expr1_0 = MInst::CmpTrapRSImm16 { 4513 op: expr0_0, 4514 rn: pattern1_0, 4515 imm: pattern2_0, 4516 cond: pattern3_0.clone(), 4517 trap_code: pattern4_0.clone(), 4518 }; 4519 let expr2_0 = C::emit(ctx, &expr1_0); 4520 let expr3_0 = C::invalid_reg(ctx); 4521 return Some(expr3_0); 4522 } 4523 4524 // Generated as internal constructor for term icmpu_reg_and_trap. 4525 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4526 ctx: &mut C, 4527 arg0: Type, 4528 arg1: Reg, 4529 arg2: Reg, 4530 arg3: &Cond, 4531 arg4: &TrapCode, 4532 ) -> Option<Reg> { 4533 let pattern0_0 = arg0; 4534 let pattern1_0 = arg1; 4535 let pattern2_0 = arg2; 4536 let pattern3_0 = arg3; 4537 let pattern4_0 = arg4; 4538 // Rule at src/isa/s390x/inst.isle line 2287. 4539 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4540 let expr1_0 = MInst::CmpTrapRR { 4541 op: expr0_0, 4542 rn: pattern1_0, 4543 rm: pattern2_0, 4544 cond: pattern3_0.clone(), 4545 trap_code: pattern4_0.clone(), 4546 }; 4547 let expr2_0 = C::emit(ctx, &expr1_0); 4548 let expr3_0 = C::invalid_reg(ctx); 4549 return Some(expr3_0); 4550 } 4551 4552 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4553 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4554 ctx: &mut C, 4555 arg0: Type, 4556 arg1: Reg, 4557 arg2: u16, 4558 arg3: &Cond, 4559 arg4: &TrapCode, 4560 ) -> Option<Reg> { 4561 let pattern0_0 = arg0; 4562 let pattern1_0 = arg1; 4563 let pattern2_0 = arg2; 4564 let pattern3_0 = arg3; 4565 let pattern4_0 = arg4; 4566 // Rule at src/isa/s390x/inst.isle line 2293. 4567 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4568 let expr1_0 = MInst::CmpTrapRUImm16 { 4569 op: expr0_0, 4570 rn: pattern1_0, 4571 imm: pattern2_0, 4572 cond: pattern3_0.clone(), 4573 trap_code: pattern4_0.clone(), 4574 }; 4575 let expr2_0 = C::emit(ctx, &expr1_0); 4576 let expr3_0 = C::invalid_reg(ctx); 4577 return Some(expr3_0); 4578 } 4579 4580 // Generated as internal constructor for term trap_impl. 4581 pub fn constructor_trap_impl<C: Context>( 4582 ctx: &mut C, 4583 arg0: &TrapCode, 4584 ) -> Option<SideEffectNoResult> { 4585 let pattern0_0 = arg0; 4586 // Rule at src/isa/s390x/inst.isle line 2299. 4587 let expr0_0 = MInst::Trap { 4588 trap_code: pattern0_0.clone(), 4589 }; 4590 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4591 return Some(expr1_0); 4592 } 4593 4594 // Generated as internal constructor for term trap_if_impl. 4595 pub fn constructor_trap_if_impl<C: Context>( 4596 ctx: &mut C, 4597 arg0: &Cond, 4598 arg1: &TrapCode, 4599 ) -> Option<SideEffectNoResult> { 4600 let pattern0_0 = arg0; 4601 let pattern1_0 = arg1; 4602 // Rule at src/isa/s390x/inst.isle line 2303. 4603 let expr0_0 = MInst::TrapIf { 4604 cond: pattern0_0.clone(), 4605 trap_code: pattern1_0.clone(), 4606 }; 4607 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4608 return Some(expr1_0); 4609 } 4610 4611 // Generated as internal constructor for term debugtrap_impl. 4612 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4613 // Rule at src/isa/s390x/inst.isle line 2307. 4614 let expr0_0 = MInst::Debugtrap; 4615 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4616 return Some(expr1_0); 4617 } 4618 4619 // Generated as internal constructor for term bool. 4620 pub fn constructor_bool<C: Context>( 4621 ctx: &mut C, 4622 arg0: &ProducesFlags, 4623 arg1: &Cond, 4624 ) -> Option<ProducesBool> { 4625 let pattern0_0 = arg0; 4626 let pattern1_0 = arg1; 4627 // Rule at src/isa/s390x/inst.isle line 2318. 4628 let expr0_0 = ProducesBool::ProducesBool { 4629 producer: pattern0_0.clone(), 4630 cond: pattern1_0.clone(), 4631 }; 4632 return Some(expr0_0); 4633 } 4634 4635 // Generated as internal constructor for term invert_bool. 4636 pub fn constructor_invert_bool<C: Context>( 4637 ctx: &mut C, 4638 arg0: &ProducesBool, 4639 ) -> Option<ProducesBool> { 4640 let pattern0_0 = arg0; 4641 if let &ProducesBool::ProducesBool { 4642 producer: ref pattern1_0, 4643 cond: ref pattern1_1, 4644 } = pattern0_0 4645 { 4646 // Rule at src/isa/s390x/inst.isle line 2322. 4647 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4648 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4649 return Some(expr1_0); 4650 } 4651 return None; 4652 } 4653 4654 // Generated as internal constructor for term emit_producer. 4655 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4656 let pattern0_0 = arg0; 4657 if let &ProducesFlags::ProducesFlagsSideEffect { 4658 inst: ref pattern1_0, 4659 } = pattern0_0 4660 { 4661 // Rule at src/isa/s390x/inst.isle line 2331. 4662 let expr0_0 = C::emit(ctx, pattern1_0); 4663 return Some(expr0_0); 4664 } 4665 return None; 4666 } 4667 4668 // Generated as internal constructor for term emit_consumer. 4669 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4670 let pattern0_0 = arg0; 4671 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4672 inst: ref pattern1_0, 4673 result: pattern1_1, 4674 } = pattern0_0 4675 { 4676 // Rule at src/isa/s390x/inst.isle line 2333. 4677 let expr0_0 = C::emit(ctx, pattern1_0); 4678 return Some(expr0_0); 4679 } 4680 return None; 4681 } 4682 4683 // Generated as internal constructor for term select_bool_reg. 4684 pub fn constructor_select_bool_reg<C: Context>( 4685 ctx: &mut C, 4686 arg0: Type, 4687 arg1: &ProducesBool, 4688 arg2: Reg, 4689 arg3: Reg, 4690 ) -> Option<Reg> { 4691 let pattern0_0 = arg0; 4692 let pattern1_0 = arg1; 4693 if let &ProducesBool::ProducesBool { 4694 producer: ref pattern2_0, 4695 cond: ref pattern2_1, 4696 } = pattern1_0 4697 { 4698 let pattern3_0 = arg2; 4699 let pattern4_0 = arg3; 4700 // Rule at src/isa/s390x/inst.isle line 2337. 4701 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4702 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4703 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4704 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4705 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4706 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4707 return Some(expr5_0); 4708 } 4709 return None; 4710 } 4711 4712 // Generated as internal constructor for term select_bool_imm. 4713 pub fn constructor_select_bool_imm<C: Context>( 4714 ctx: &mut C, 4715 arg0: Type, 4716 arg1: &ProducesBool, 4717 arg2: i16, 4718 arg3: u64, 4719 ) -> Option<Reg> { 4720 let pattern0_0 = arg0; 4721 let pattern1_0 = arg1; 4722 if let &ProducesBool::ProducesBool { 4723 producer: ref pattern2_0, 4724 cond: ref pattern2_1, 4725 } = pattern1_0 4726 { 4727 let pattern3_0 = arg2; 4728 let pattern4_0 = arg3; 4729 // Rule at src/isa/s390x/inst.isle line 2346. 4730 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4731 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4732 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4733 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4734 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4735 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4736 return Some(expr5_0); 4737 } 4738 return None; 4739 } 4740 4741 // Generated as internal constructor for term lower_bool. 4742 pub fn constructor_lower_bool<C: Context>( 4743 ctx: &mut C, 4744 arg0: Type, 4745 arg1: &ProducesBool, 4746 ) -> Option<Reg> { 4747 let pattern0_0 = arg0; 4748 if pattern0_0 == B1 { 4749 let pattern2_0 = arg1; 4750 // Rule at src/isa/s390x/inst.isle line 2356. 4751 let expr0_0: Type = B1; 4752 let expr1_0: i16 = 1; 4753 let expr2_0: u64 = 0; 4754 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4755 return Some(expr3_0); 4756 } 4757 if pattern0_0 == B8 { 4758 let pattern2_0 = arg1; 4759 // Rule at src/isa/s390x/inst.isle line 2357. 4760 let expr0_0: Type = B8; 4761 let expr1_0: i16 = -1; 4762 let expr2_0: u64 = 0; 4763 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4764 return Some(expr3_0); 4765 } 4766 if pattern0_0 == B16 { 4767 let pattern2_0 = arg1; 4768 // Rule at src/isa/s390x/inst.isle line 2358. 4769 let expr0_0: Type = B16; 4770 let expr1_0: i16 = -1; 4771 let expr2_0: u64 = 0; 4772 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4773 return Some(expr3_0); 4774 } 4775 if pattern0_0 == B32 { 4776 let pattern2_0 = arg1; 4777 // Rule at src/isa/s390x/inst.isle line 2359. 4778 let expr0_0: Type = B32; 4779 let expr1_0: i16 = -1; 4780 let expr2_0: u64 = 0; 4781 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4782 return Some(expr3_0); 4783 } 4784 if pattern0_0 == B64 { 4785 let pattern2_0 = arg1; 4786 // Rule at src/isa/s390x/inst.isle line 2360. 4787 let expr0_0: Type = B64; 4788 let expr1_0: i16 = -1; 4789 let expr2_0: u64 = 0; 4790 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4791 return Some(expr3_0); 4792 } 4793 return None; 4794 } 4795 4796 // Generated as internal constructor for term cond_br_bool. 4797 pub fn constructor_cond_br_bool<C: Context>( 4798 ctx: &mut C, 4799 arg0: &ProducesBool, 4800 arg1: MachLabel, 4801 arg2: MachLabel, 4802 ) -> Option<SideEffectNoResult> { 4803 let pattern0_0 = arg0; 4804 if let &ProducesBool::ProducesBool { 4805 producer: ref pattern1_0, 4806 cond: ref pattern1_1, 4807 } = pattern0_0 4808 { 4809 let pattern2_0 = arg1; 4810 let pattern3_0 = arg2; 4811 // Rule at src/isa/s390x/inst.isle line 2364. 4812 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4813 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4814 return Some(expr1_0); 4815 } 4816 return None; 4817 } 4818 4819 // Generated as internal constructor for term oneway_cond_br_bool. 4820 pub fn constructor_oneway_cond_br_bool<C: Context>( 4821 ctx: &mut C, 4822 arg0: &ProducesBool, 4823 arg1: MachLabel, 4824 ) -> Option<SideEffectNoResult> { 4825 let pattern0_0 = arg0; 4826 if let &ProducesBool::ProducesBool { 4827 producer: ref pattern1_0, 4828 cond: ref pattern1_1, 4829 } = pattern0_0 4830 { 4831 let pattern2_0 = arg1; 4832 // Rule at src/isa/s390x/inst.isle line 2370. 4833 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4834 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4835 return Some(expr1_0); 4836 } 4837 return None; 4838 } 4839 4840 // Generated as internal constructor for term trap_if_bool. 4841 pub fn constructor_trap_if_bool<C: Context>( 4842 ctx: &mut C, 4843 arg0: &ProducesBool, 4844 arg1: &TrapCode, 4845 ) -> Option<SideEffectNoResult> { 4846 let pattern0_0 = arg0; 4847 if let &ProducesBool::ProducesBool { 4848 producer: ref pattern1_0, 4849 cond: ref pattern1_1, 4850 } = pattern0_0 4851 { 4852 let pattern2_0 = arg1; 4853 // Rule at src/isa/s390x/inst.isle line 2376. 4854 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4855 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4856 return Some(expr1_0); 4857 } 4858 return None; 4859 } 4860 4861 // Generated as internal constructor for term casloop_val_reg. 4862 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4863 // Rule at src/isa/s390x/inst.isle line 2390. 4864 let expr0_0: u8 = 0; 4865 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4866 return Some(expr1_0); 4867 } 4868 4869 // Generated as internal constructor for term casloop_tmp_reg. 4870 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4871 // Rule at src/isa/s390x/inst.isle line 2394. 4872 let expr0_0: u8 = 1; 4873 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4874 return Some(expr1_0); 4875 } 4876 4877 // Generated as internal constructor for term casloop_emit. 4878 pub fn constructor_casloop_emit<C: Context>( 4879 ctx: &mut C, 4880 arg0: &VecMInstBuilder, 4881 arg1: Type, 4882 arg2: MemFlags, 4883 arg3: Reg, 4884 arg4: Reg, 4885 ) -> Option<Reg> { 4886 let pattern0_0 = arg0; 4887 let pattern1_0 = arg1; 4888 let pattern2_0 = arg2; 4889 let pattern3_0 = arg3; 4890 let pattern4_0 = arg4; 4891 // Rule at src/isa/s390x/inst.isle line 2403. 4892 let expr0_0: i64 = 0; 4893 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4894 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4895 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4896 let expr4_0 = 4897 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4898 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4899 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4900 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4901 let expr8_0 = IntCC::NotEqual; 4902 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4903 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4904 return Some(expr4_0); 4905 } 4906 4907 // Generated as internal constructor for term casloop_result. 4908 pub fn constructor_casloop_result<C: Context>( 4909 ctx: &mut C, 4910 arg0: Type, 4911 arg1: MemFlags, 4912 arg2: Reg, 4913 ) -> Option<Reg> { 4914 let pattern0_0 = arg0; 4915 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4916 let pattern2_0 = arg1; 4917 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4918 let pattern4_0 = arg2; 4919 // Rule at src/isa/s390x/inst.isle line 2421. 4920 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4921 return Some(expr0_0); 4922 } 4923 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4924 let pattern4_0 = arg2; 4925 // Rule at src/isa/s390x/inst.isle line 2419. 4926 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4927 return Some(expr0_0); 4928 } 4929 } 4930 return None; 4931 } 4932 4933 // Generated as internal constructor for term casloop. 4934 pub fn constructor_casloop<C: Context>( 4935 ctx: &mut C, 4936 arg0: &VecMInstBuilder, 4937 arg1: Type, 4938 arg2: MemFlags, 4939 arg3: Reg, 4940 arg4: Reg, 4941 ) -> Option<Reg> { 4942 let pattern0_0 = arg0; 4943 let pattern1_0 = arg1; 4944 let pattern2_0 = arg2; 4945 let pattern3_0 = arg3; 4946 let pattern4_0 = arg4; 4947 // Rule at src/isa/s390x/inst.isle line 2426. 4948 let expr0_0 = constructor_casloop_emit( 4949 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4950 )?; 4951 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4952 return Some(expr1_0); 4953 } 4954 4955 // Generated as internal constructor for term casloop_bitshift. 4956 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4957 let pattern0_0 = arg0; 4958 // Rule at src/isa/s390x/inst.isle line 2441. 4959 let expr0_0: Type = I32; 4960 let expr1_0: u8 = 3; 4961 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4962 return Some(expr2_0); 4963 } 4964 4965 // Generated as internal constructor for term casloop_aligned_addr. 4966 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4967 let pattern0_0 = arg0; 4968 // Rule at src/isa/s390x/inst.isle line 2446. 4969 let expr0_0: Type = I64; 4970 let expr1_0: u16 = 65532; 4971 let expr2_0: u8 = 0; 4972 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4973 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4974 return Some(expr4_0); 4975 } 4976 4977 // Generated as internal constructor for term casloop_rotate_in. 4978 pub fn constructor_casloop_rotate_in<C: Context>( 4979 ctx: &mut C, 4980 arg0: &VecMInstBuilder, 4981 arg1: Type, 4982 arg2: MemFlags, 4983 arg3: Reg, 4984 arg4: Reg, 4985 ) -> Option<Reg> { 4986 let pattern0_0 = arg0; 4987 let pattern1_0 = arg1; 4988 if pattern1_0 == I8 { 4989 let pattern3_0 = arg2; 4990 let pattern4_0 = arg3; 4991 let pattern5_0 = arg4; 4992 // Rule at src/isa/s390x/inst.isle line 2456. 4993 let expr0_0: Type = I32; 4994 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4995 let expr2_0: u8 = 0; 4996 let expr3_0 = constructor_push_rot_imm_reg( 4997 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 4998 )?; 4999 return Some(expr3_0); 5000 } 5001 if pattern1_0 == I16 { 5002 let pattern3_0 = arg2; 5003 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5004 let pattern5_0 = arg3; 5005 let pattern6_0 = arg4; 5006 // Rule at src/isa/s390x/inst.isle line 2460. 5007 let expr0_0: Type = I32; 5008 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5009 let expr2_0: u8 = 16; 5010 let expr3_0 = constructor_push_rot_imm_reg( 5011 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5012 )?; 5013 return Some(expr3_0); 5014 } 5015 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5016 let pattern5_0 = arg3; 5017 let pattern6_0 = arg4; 5018 // Rule at src/isa/s390x/inst.isle line 2458. 5019 let expr0_0: Type = I32; 5020 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5021 let expr2_0: u8 = 0; 5022 let expr3_0 = constructor_push_rot_imm_reg( 5023 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5024 )?; 5025 return Some(expr3_0); 5026 } 5027 } 5028 return None; 5029 } 5030 5031 // Generated as internal constructor for term casloop_rotate_out. 5032 pub fn constructor_casloop_rotate_out<C: Context>( 5033 ctx: &mut C, 5034 arg0: &VecMInstBuilder, 5035 arg1: Type, 5036 arg2: MemFlags, 5037 arg3: Reg, 5038 arg4: Reg, 5039 ) -> Option<Reg> { 5040 let pattern0_0 = arg0; 5041 let pattern1_0 = arg1; 5042 if pattern1_0 == I8 { 5043 let pattern3_0 = arg2; 5044 let pattern4_0 = arg3; 5045 let pattern5_0 = arg4; 5046 // Rule at src/isa/s390x/inst.isle line 2469. 5047 let expr0_0: Type = I32; 5048 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5049 let expr2_0: u8 = 0; 5050 let expr3_0: Type = I32; 5051 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5052 let expr5_0 = constructor_push_rot_imm_reg( 5053 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5054 )?; 5055 return Some(expr5_0); 5056 } 5057 if pattern1_0 == I16 { 5058 let pattern3_0 = arg2; 5059 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5060 let pattern5_0 = arg3; 5061 let pattern6_0 = arg4; 5062 // Rule at src/isa/s390x/inst.isle line 2473. 5063 let expr0_0: Type = I32; 5064 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5065 let expr2_0: u8 = 16; 5066 let expr3_0 = constructor_push_rot_imm_reg( 5067 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5068 )?; 5069 return Some(expr3_0); 5070 } 5071 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5072 let pattern5_0 = arg3; 5073 let pattern6_0 = arg4; 5074 // Rule at src/isa/s390x/inst.isle line 2471. 5075 let expr0_0: Type = I32; 5076 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5077 let expr2_0: u8 = 0; 5078 let expr3_0 = constructor_push_rot_imm_reg( 5079 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5080 )?; 5081 return Some(expr3_0); 5082 } 5083 } 5084 return None; 5085 } 5086 5087 // Generated as internal constructor for term casloop_rotate_result. 5088 pub fn constructor_casloop_rotate_result<C: Context>( 5089 ctx: &mut C, 5090 arg0: Type, 5091 arg1: MemFlags, 5092 arg2: Reg, 5093 arg3: Reg, 5094 ) -> Option<Reg> { 5095 let pattern0_0 = arg0; 5096 if pattern0_0 == I8 { 5097 let pattern2_0 = arg1; 5098 let pattern3_0 = arg2; 5099 let pattern4_0 = arg3; 5100 // Rule at src/isa/s390x/inst.isle line 2484. 5101 let expr0_0: Type = I32; 5102 let expr1_0: u8 = 8; 5103 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5104 return Some(expr2_0); 5105 } 5106 if pattern0_0 == I16 { 5107 let pattern2_0 = arg1; 5108 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5109 let pattern4_0 = arg2; 5110 let pattern5_0 = arg3; 5111 // Rule at src/isa/s390x/inst.isle line 2488. 5112 let expr0_0: Type = I32; 5113 let expr1_0: Type = I32; 5114 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5115 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5116 return Some(expr3_0); 5117 } 5118 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5119 let pattern4_0 = arg2; 5120 let pattern5_0 = arg3; 5121 // Rule at src/isa/s390x/inst.isle line 2486. 5122 let expr0_0: Type = I32; 5123 let expr1_0: u8 = 16; 5124 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5125 return Some(expr2_0); 5126 } 5127 } 5128 return None; 5129 } 5130 5131 // Generated as internal constructor for term casloop_subword. 5132 pub fn constructor_casloop_subword<C: Context>( 5133 ctx: &mut C, 5134 arg0: &VecMInstBuilder, 5135 arg1: Type, 5136 arg2: MemFlags, 5137 arg3: Reg, 5138 arg4: Reg, 5139 arg5: Reg, 5140 ) -> Option<Reg> { 5141 let pattern0_0 = arg0; 5142 let pattern1_0 = arg1; 5143 let pattern2_0 = arg2; 5144 let pattern3_0 = arg3; 5145 let pattern4_0 = arg4; 5146 let pattern5_0 = arg5; 5147 // Rule at src/isa/s390x/inst.isle line 2493. 5148 let expr0_0 = constructor_casloop_emit( 5149 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5150 )?; 5151 let expr1_0 = 5152 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5153 return Some(expr1_0); 5154 } 5155 5156 // Generated as internal constructor for term clz_reg. 5157 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5158 let pattern0_0 = arg0; 5159 if pattern0_0 == 64 { 5160 let pattern2_0 = arg1; 5161 // Rule at src/isa/s390x/inst.isle line 2504. 5162 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5163 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5164 let expr2_0 = C::emit(ctx, &expr1_0); 5165 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5166 return Some(expr3_0); 5167 } 5168 let pattern1_0 = arg1; 5169 // Rule at src/isa/s390x/inst.isle line 2513. 5170 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5171 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5172 let expr2_0 = C::emit(ctx, &expr1_0); 5173 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5174 let expr4_0 = IntCC::Equal; 5175 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5176 let expr6_0 = MInst::CMov64SImm16 { 5177 rd: expr3_0, 5178 cond: expr5_0, 5179 imm: pattern0_0, 5180 }; 5181 let expr7_0 = C::emit(ctx, &expr6_0); 5182 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5183 return Some(expr8_0); 5184 } 5185 5186 // Generated as internal constructor for term aluop_add. 5187 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5188 let pattern0_0 = arg0; 5189 if pattern0_0 == I8 { 5190 // Rule at src/isa/s390x/inst.isle line 2524. 5191 let expr0_0 = ALUOp::Add32; 5192 return Some(expr0_0); 5193 } 5194 if pattern0_0 == I16 { 5195 // Rule at src/isa/s390x/inst.isle line 2525. 5196 let expr0_0 = ALUOp::Add32; 5197 return Some(expr0_0); 5198 } 5199 if pattern0_0 == I32 { 5200 // Rule at src/isa/s390x/inst.isle line 2526. 5201 let expr0_0 = ALUOp::Add32; 5202 return Some(expr0_0); 5203 } 5204 if pattern0_0 == I64 { 5205 // Rule at src/isa/s390x/inst.isle line 2527. 5206 let expr0_0 = ALUOp::Add64; 5207 return Some(expr0_0); 5208 } 5209 return None; 5210 } 5211 5212 // Generated as internal constructor for term aluop_add_sext16. 5213 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5214 let pattern0_0 = arg0; 5215 if pattern0_0 == I16 { 5216 // Rule at src/isa/s390x/inst.isle line 2530. 5217 let expr0_0 = ALUOp::Add32Ext16; 5218 return Some(expr0_0); 5219 } 5220 if pattern0_0 == I32 { 5221 // Rule at src/isa/s390x/inst.isle line 2531. 5222 let expr0_0 = ALUOp::Add32Ext16; 5223 return Some(expr0_0); 5224 } 5225 if pattern0_0 == I64 { 5226 // Rule at src/isa/s390x/inst.isle line 2532. 5227 let expr0_0 = ALUOp::Add64Ext16; 5228 return Some(expr0_0); 5229 } 5230 return None; 5231 } 5232 5233 // Generated as internal constructor for term aluop_add_sext32. 5234 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5235 let pattern0_0 = arg0; 5236 if pattern0_0 == I64 { 5237 // Rule at src/isa/s390x/inst.isle line 2535. 5238 let expr0_0 = ALUOp::Add64Ext32; 5239 return Some(expr0_0); 5240 } 5241 return None; 5242 } 5243 5244 // Generated as internal constructor for term add_reg. 5245 pub fn constructor_add_reg<C: Context>( 5246 ctx: &mut C, 5247 arg0: Type, 5248 arg1: Reg, 5249 arg2: Reg, 5250 ) -> Option<Reg> { 5251 let pattern0_0 = arg0; 5252 let pattern1_0 = arg1; 5253 let pattern2_0 = arg2; 5254 // Rule at src/isa/s390x/inst.isle line 2538. 5255 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5256 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5257 return Some(expr1_0); 5258 } 5259 5260 // Generated as internal constructor for term add_reg_sext32. 5261 pub fn constructor_add_reg_sext32<C: Context>( 5262 ctx: &mut C, 5263 arg0: Type, 5264 arg1: Reg, 5265 arg2: Reg, 5266 ) -> Option<Reg> { 5267 let pattern0_0 = arg0; 5268 let pattern1_0 = arg1; 5269 let pattern2_0 = arg2; 5270 // Rule at src/isa/s390x/inst.isle line 2541. 5271 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5272 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5273 return Some(expr1_0); 5274 } 5275 5276 // Generated as internal constructor for term add_simm16. 5277 pub fn constructor_add_simm16<C: Context>( 5278 ctx: &mut C, 5279 arg0: Type, 5280 arg1: Reg, 5281 arg2: i16, 5282 ) -> Option<Reg> { 5283 let pattern0_0 = arg0; 5284 let pattern1_0 = arg1; 5285 let pattern2_0 = arg2; 5286 // Rule at src/isa/s390x/inst.isle line 2544. 5287 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5288 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5289 return Some(expr1_0); 5290 } 5291 5292 // Generated as internal constructor for term add_simm32. 5293 pub fn constructor_add_simm32<C: Context>( 5294 ctx: &mut C, 5295 arg0: Type, 5296 arg1: Reg, 5297 arg2: i32, 5298 ) -> Option<Reg> { 5299 let pattern0_0 = arg0; 5300 let pattern1_0 = arg1; 5301 let pattern2_0 = arg2; 5302 // Rule at src/isa/s390x/inst.isle line 2547. 5303 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5304 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5305 return Some(expr1_0); 5306 } 5307 5308 // Generated as internal constructor for term add_mem. 5309 pub fn constructor_add_mem<C: Context>( 5310 ctx: &mut C, 5311 arg0: Type, 5312 arg1: Reg, 5313 arg2: &MemArg, 5314 ) -> Option<Reg> { 5315 let pattern0_0 = arg0; 5316 let pattern1_0 = arg1; 5317 let pattern2_0 = arg2; 5318 // Rule at src/isa/s390x/inst.isle line 2550. 5319 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5320 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5321 return Some(expr1_0); 5322 } 5323 5324 // Generated as internal constructor for term add_mem_sext16. 5325 pub fn constructor_add_mem_sext16<C: Context>( 5326 ctx: &mut C, 5327 arg0: Type, 5328 arg1: Reg, 5329 arg2: &MemArg, 5330 ) -> Option<Reg> { 5331 let pattern0_0 = arg0; 5332 let pattern1_0 = arg1; 5333 let pattern2_0 = arg2; 5334 // Rule at src/isa/s390x/inst.isle line 2553. 5335 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5336 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5337 return Some(expr1_0); 5338 } 5339 5340 // Generated as internal constructor for term add_mem_sext32. 5341 pub fn constructor_add_mem_sext32<C: Context>( 5342 ctx: &mut C, 5343 arg0: Type, 5344 arg1: Reg, 5345 arg2: &MemArg, 5346 ) -> Option<Reg> { 5347 let pattern0_0 = arg0; 5348 let pattern1_0 = arg1; 5349 let pattern2_0 = arg2; 5350 // Rule at src/isa/s390x/inst.isle line 2556. 5351 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5352 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5353 return Some(expr1_0); 5354 } 5355 5356 // Generated as internal constructor for term aluop_add_logical. 5357 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5358 let pattern0_0 = arg0; 5359 if pattern0_0 == I32 { 5360 // Rule at src/isa/s390x/inst.isle line 2562. 5361 let expr0_0 = ALUOp::AddLogical32; 5362 return Some(expr0_0); 5363 } 5364 if pattern0_0 == I64 { 5365 // Rule at src/isa/s390x/inst.isle line 2563. 5366 let expr0_0 = ALUOp::AddLogical64; 5367 return Some(expr0_0); 5368 } 5369 return None; 5370 } 5371 5372 // Generated as internal constructor for term aluop_add_logical_zext32. 5373 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5374 let pattern0_0 = arg0; 5375 if pattern0_0 == I64 { 5376 // Rule at src/isa/s390x/inst.isle line 2566. 5377 let expr0_0 = ALUOp::AddLogical64Ext32; 5378 return Some(expr0_0); 5379 } 5380 return None; 5381 } 5382 5383 // Generated as internal constructor for term add_logical_reg. 5384 pub fn constructor_add_logical_reg<C: Context>( 5385 ctx: &mut C, 5386 arg0: Type, 5387 arg1: Reg, 5388 arg2: Reg, 5389 ) -> Option<Reg> { 5390 let pattern0_0 = arg0; 5391 let pattern1_0 = arg1; 5392 let pattern2_0 = arg2; 5393 // Rule at src/isa/s390x/inst.isle line 2569. 5394 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5395 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5396 return Some(expr1_0); 5397 } 5398 5399 // Generated as internal constructor for term add_logical_reg_zext32. 5400 pub fn constructor_add_logical_reg_zext32<C: Context>( 5401 ctx: &mut C, 5402 arg0: Type, 5403 arg1: Reg, 5404 arg2: Reg, 5405 ) -> Option<Reg> { 5406 let pattern0_0 = arg0; 5407 let pattern1_0 = arg1; 5408 let pattern2_0 = arg2; 5409 // Rule at src/isa/s390x/inst.isle line 2572. 5410 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5411 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5412 return Some(expr1_0); 5413 } 5414 5415 // Generated as internal constructor for term add_logical_zimm32. 5416 pub fn constructor_add_logical_zimm32<C: Context>( 5417 ctx: &mut C, 5418 arg0: Type, 5419 arg1: Reg, 5420 arg2: u32, 5421 ) -> Option<Reg> { 5422 let pattern0_0 = arg0; 5423 let pattern1_0 = arg1; 5424 let pattern2_0 = arg2; 5425 // Rule at src/isa/s390x/inst.isle line 2575. 5426 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5427 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5428 return Some(expr1_0); 5429 } 5430 5431 // Generated as internal constructor for term add_logical_mem. 5432 pub fn constructor_add_logical_mem<C: Context>( 5433 ctx: &mut C, 5434 arg0: Type, 5435 arg1: Reg, 5436 arg2: &MemArg, 5437 ) -> Option<Reg> { 5438 let pattern0_0 = arg0; 5439 let pattern1_0 = arg1; 5440 let pattern2_0 = arg2; 5441 // Rule at src/isa/s390x/inst.isle line 2578. 5442 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5443 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5444 return Some(expr1_0); 5445 } 5446 5447 // Generated as internal constructor for term add_logical_mem_zext32. 5448 pub fn constructor_add_logical_mem_zext32<C: Context>( 5449 ctx: &mut C, 5450 arg0: Type, 5451 arg1: Reg, 5452 arg2: &MemArg, 5453 ) -> Option<Reg> { 5454 let pattern0_0 = arg0; 5455 let pattern1_0 = arg1; 5456 let pattern2_0 = arg2; 5457 // Rule at src/isa/s390x/inst.isle line 2581. 5458 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5459 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5460 return Some(expr1_0); 5461 } 5462 5463 // Generated as internal constructor for term aluop_sub. 5464 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5465 let pattern0_0 = arg0; 5466 if pattern0_0 == I8 { 5467 // Rule at src/isa/s390x/inst.isle line 2587. 5468 let expr0_0 = ALUOp::Sub32; 5469 return Some(expr0_0); 5470 } 5471 if pattern0_0 == I16 { 5472 // Rule at src/isa/s390x/inst.isle line 2588. 5473 let expr0_0 = ALUOp::Sub32; 5474 return Some(expr0_0); 5475 } 5476 if pattern0_0 == I32 { 5477 // Rule at src/isa/s390x/inst.isle line 2589. 5478 let expr0_0 = ALUOp::Sub32; 5479 return Some(expr0_0); 5480 } 5481 if pattern0_0 == I64 { 5482 // Rule at src/isa/s390x/inst.isle line 2590. 5483 let expr0_0 = ALUOp::Sub64; 5484 return Some(expr0_0); 5485 } 5486 return None; 5487 } 5488 5489 // Generated as internal constructor for term aluop_sub_sext16. 5490 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5491 let pattern0_0 = arg0; 5492 if pattern0_0 == I16 { 5493 // Rule at src/isa/s390x/inst.isle line 2593. 5494 let expr0_0 = ALUOp::Sub32Ext16; 5495 return Some(expr0_0); 5496 } 5497 if pattern0_0 == I32 { 5498 // Rule at src/isa/s390x/inst.isle line 2594. 5499 let expr0_0 = ALUOp::Sub32Ext16; 5500 return Some(expr0_0); 5501 } 5502 if pattern0_0 == I64 { 5503 // Rule at src/isa/s390x/inst.isle line 2595. 5504 let expr0_0 = ALUOp::Sub64Ext16; 5505 return Some(expr0_0); 5506 } 5507 return None; 5508 } 5509 5510 // Generated as internal constructor for term aluop_sub_sext32. 5511 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5512 let pattern0_0 = arg0; 5513 if pattern0_0 == I64 { 5514 // Rule at src/isa/s390x/inst.isle line 2598. 5515 let expr0_0 = ALUOp::Sub64Ext32; 5516 return Some(expr0_0); 5517 } 5518 return None; 5519 } 5520 5521 // Generated as internal constructor for term sub_reg. 5522 pub fn constructor_sub_reg<C: Context>( 5523 ctx: &mut C, 5524 arg0: Type, 5525 arg1: Reg, 5526 arg2: Reg, 5527 ) -> Option<Reg> { 5528 let pattern0_0 = arg0; 5529 let pattern1_0 = arg1; 5530 let pattern2_0 = arg2; 5531 // Rule at src/isa/s390x/inst.isle line 2601. 5532 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5533 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5534 return Some(expr1_0); 5535 } 5536 5537 // Generated as internal constructor for term sub_reg_sext32. 5538 pub fn constructor_sub_reg_sext32<C: Context>( 5539 ctx: &mut C, 5540 arg0: Type, 5541 arg1: Reg, 5542 arg2: Reg, 5543 ) -> Option<Reg> { 5544 let pattern0_0 = arg0; 5545 let pattern1_0 = arg1; 5546 let pattern2_0 = arg2; 5547 // Rule at src/isa/s390x/inst.isle line 2604. 5548 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5549 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5550 return Some(expr1_0); 5551 } 5552 5553 // Generated as internal constructor for term sub_mem. 5554 pub fn constructor_sub_mem<C: Context>( 5555 ctx: &mut C, 5556 arg0: Type, 5557 arg1: Reg, 5558 arg2: &MemArg, 5559 ) -> Option<Reg> { 5560 let pattern0_0 = arg0; 5561 let pattern1_0 = arg1; 5562 let pattern2_0 = arg2; 5563 // Rule at src/isa/s390x/inst.isle line 2607. 5564 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5565 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5566 return Some(expr1_0); 5567 } 5568 5569 // Generated as internal constructor for term sub_mem_sext16. 5570 pub fn constructor_sub_mem_sext16<C: Context>( 5571 ctx: &mut C, 5572 arg0: Type, 5573 arg1: Reg, 5574 arg2: &MemArg, 5575 ) -> Option<Reg> { 5576 let pattern0_0 = arg0; 5577 let pattern1_0 = arg1; 5578 let pattern2_0 = arg2; 5579 // Rule at src/isa/s390x/inst.isle line 2610. 5580 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5581 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5582 return Some(expr1_0); 5583 } 5584 5585 // Generated as internal constructor for term sub_mem_sext32. 5586 pub fn constructor_sub_mem_sext32<C: Context>( 5587 ctx: &mut C, 5588 arg0: Type, 5589 arg1: Reg, 5590 arg2: &MemArg, 5591 ) -> Option<Reg> { 5592 let pattern0_0 = arg0; 5593 let pattern1_0 = arg1; 5594 let pattern2_0 = arg2; 5595 // Rule at src/isa/s390x/inst.isle line 2613. 5596 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5597 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5598 return Some(expr1_0); 5599 } 5600 5601 // Generated as internal constructor for term aluop_sub_logical. 5602 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5603 let pattern0_0 = arg0; 5604 if pattern0_0 == I32 { 5605 // Rule at src/isa/s390x/inst.isle line 2619. 5606 let expr0_0 = ALUOp::SubLogical32; 5607 return Some(expr0_0); 5608 } 5609 if pattern0_0 == I64 { 5610 // Rule at src/isa/s390x/inst.isle line 2620. 5611 let expr0_0 = ALUOp::SubLogical64; 5612 return Some(expr0_0); 5613 } 5614 return None; 5615 } 5616 5617 // Generated as internal constructor for term aluop_sub_logical_zext32. 5618 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5619 let pattern0_0 = arg0; 5620 if pattern0_0 == I64 { 5621 // Rule at src/isa/s390x/inst.isle line 2623. 5622 let expr0_0 = ALUOp::SubLogical64Ext32; 5623 return Some(expr0_0); 5624 } 5625 return None; 5626 } 5627 5628 // Generated as internal constructor for term sub_logical_reg. 5629 pub fn constructor_sub_logical_reg<C: Context>( 5630 ctx: &mut C, 5631 arg0: Type, 5632 arg1: Reg, 5633 arg2: Reg, 5634 ) -> Option<Reg> { 5635 let pattern0_0 = arg0; 5636 let pattern1_0 = arg1; 5637 let pattern2_0 = arg2; 5638 // Rule at src/isa/s390x/inst.isle line 2626. 5639 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5640 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5641 return Some(expr1_0); 5642 } 5643 5644 // Generated as internal constructor for term sub_logical_reg_zext32. 5645 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5646 ctx: &mut C, 5647 arg0: Type, 5648 arg1: Reg, 5649 arg2: Reg, 5650 ) -> Option<Reg> { 5651 let pattern0_0 = arg0; 5652 let pattern1_0 = arg1; 5653 let pattern2_0 = arg2; 5654 // Rule at src/isa/s390x/inst.isle line 2629. 5655 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5656 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5657 return Some(expr1_0); 5658 } 5659 5660 // Generated as internal constructor for term sub_logical_zimm32. 5661 pub fn constructor_sub_logical_zimm32<C: Context>( 5662 ctx: &mut C, 5663 arg0: Type, 5664 arg1: Reg, 5665 arg2: u32, 5666 ) -> Option<Reg> { 5667 let pattern0_0 = arg0; 5668 let pattern1_0 = arg1; 5669 let pattern2_0 = arg2; 5670 // Rule at src/isa/s390x/inst.isle line 2632. 5671 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5672 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5673 return Some(expr1_0); 5674 } 5675 5676 // Generated as internal constructor for term sub_logical_mem. 5677 pub fn constructor_sub_logical_mem<C: Context>( 5678 ctx: &mut C, 5679 arg0: Type, 5680 arg1: Reg, 5681 arg2: &MemArg, 5682 ) -> Option<Reg> { 5683 let pattern0_0 = arg0; 5684 let pattern1_0 = arg1; 5685 let pattern2_0 = arg2; 5686 // Rule at src/isa/s390x/inst.isle line 2635. 5687 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5688 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5689 return Some(expr1_0); 5690 } 5691 5692 // Generated as internal constructor for term sub_logical_mem_zext32. 5693 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5694 ctx: &mut C, 5695 arg0: Type, 5696 arg1: Reg, 5697 arg2: &MemArg, 5698 ) -> Option<Reg> { 5699 let pattern0_0 = arg0; 5700 let pattern1_0 = arg1; 5701 let pattern2_0 = arg2; 5702 // Rule at src/isa/s390x/inst.isle line 2638. 5703 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5704 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5705 return Some(expr1_0); 5706 } 5707 5708 // Generated as internal constructor for term aluop_mul. 5709 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5710 let pattern0_0 = arg0; 5711 if pattern0_0 == I8 { 5712 // Rule at src/isa/s390x/inst.isle line 2644. 5713 let expr0_0 = ALUOp::Mul32; 5714 return Some(expr0_0); 5715 } 5716 if pattern0_0 == I16 { 5717 // Rule at src/isa/s390x/inst.isle line 2645. 5718 let expr0_0 = ALUOp::Mul32; 5719 return Some(expr0_0); 5720 } 5721 if pattern0_0 == I32 { 5722 // Rule at src/isa/s390x/inst.isle line 2646. 5723 let expr0_0 = ALUOp::Mul32; 5724 return Some(expr0_0); 5725 } 5726 if pattern0_0 == I64 { 5727 // Rule at src/isa/s390x/inst.isle line 2647. 5728 let expr0_0 = ALUOp::Mul64; 5729 return Some(expr0_0); 5730 } 5731 return None; 5732 } 5733 5734 // Generated as internal constructor for term aluop_mul_sext16. 5735 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5736 let pattern0_0 = arg0; 5737 if pattern0_0 == I16 { 5738 // Rule at src/isa/s390x/inst.isle line 2650. 5739 let expr0_0 = ALUOp::Mul32Ext16; 5740 return Some(expr0_0); 5741 } 5742 if pattern0_0 == I32 { 5743 // Rule at src/isa/s390x/inst.isle line 2651. 5744 let expr0_0 = ALUOp::Mul32Ext16; 5745 return Some(expr0_0); 5746 } 5747 if pattern0_0 == I64 { 5748 // Rule at src/isa/s390x/inst.isle line 2652. 5749 let expr0_0 = ALUOp::Mul64Ext16; 5750 return Some(expr0_0); 5751 } 5752 return None; 5753 } 5754 5755 // Generated as internal constructor for term aluop_mul_sext32. 5756 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5757 let pattern0_0 = arg0; 5758 if pattern0_0 == I64 { 5759 // Rule at src/isa/s390x/inst.isle line 2655. 5760 let expr0_0 = ALUOp::Mul64Ext32; 5761 return Some(expr0_0); 5762 } 5763 return None; 5764 } 5765 5766 // Generated as internal constructor for term mul_reg. 5767 pub fn constructor_mul_reg<C: Context>( 5768 ctx: &mut C, 5769 arg0: Type, 5770 arg1: Reg, 5771 arg2: Reg, 5772 ) -> Option<Reg> { 5773 let pattern0_0 = arg0; 5774 let pattern1_0 = arg1; 5775 let pattern2_0 = arg2; 5776 // Rule at src/isa/s390x/inst.isle line 2658. 5777 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5778 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5779 return Some(expr1_0); 5780 } 5781 5782 // Generated as internal constructor for term mul_reg_sext32. 5783 pub fn constructor_mul_reg_sext32<C: Context>( 5784 ctx: &mut C, 5785 arg0: Type, 5786 arg1: Reg, 5787 arg2: Reg, 5788 ) -> Option<Reg> { 5789 let pattern0_0 = arg0; 5790 let pattern1_0 = arg1; 5791 let pattern2_0 = arg2; 5792 // Rule at src/isa/s390x/inst.isle line 2661. 5793 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5794 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5795 return Some(expr1_0); 5796 } 5797 5798 // Generated as internal constructor for term mul_simm16. 5799 pub fn constructor_mul_simm16<C: Context>( 5800 ctx: &mut C, 5801 arg0: Type, 5802 arg1: Reg, 5803 arg2: i16, 5804 ) -> Option<Reg> { 5805 let pattern0_0 = arg0; 5806 let pattern1_0 = arg1; 5807 let pattern2_0 = arg2; 5808 // Rule at src/isa/s390x/inst.isle line 2664. 5809 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5810 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5811 return Some(expr1_0); 5812 } 5813 5814 // Generated as internal constructor for term mul_simm32. 5815 pub fn constructor_mul_simm32<C: Context>( 5816 ctx: &mut C, 5817 arg0: Type, 5818 arg1: Reg, 5819 arg2: i32, 5820 ) -> Option<Reg> { 5821 let pattern0_0 = arg0; 5822 let pattern1_0 = arg1; 5823 let pattern2_0 = arg2; 5824 // Rule at src/isa/s390x/inst.isle line 2667. 5825 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5826 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5827 return Some(expr1_0); 5828 } 5829 5830 // Generated as internal constructor for term mul_mem. 5831 pub fn constructor_mul_mem<C: Context>( 5832 ctx: &mut C, 5833 arg0: Type, 5834 arg1: Reg, 5835 arg2: &MemArg, 5836 ) -> Option<Reg> { 5837 let pattern0_0 = arg0; 5838 let pattern1_0 = arg1; 5839 let pattern2_0 = arg2; 5840 // Rule at src/isa/s390x/inst.isle line 2670. 5841 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5842 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5843 return Some(expr1_0); 5844 } 5845 5846 // Generated as internal constructor for term mul_mem_sext16. 5847 pub fn constructor_mul_mem_sext16<C: Context>( 5848 ctx: &mut C, 5849 arg0: Type, 5850 arg1: Reg, 5851 arg2: &MemArg, 5852 ) -> Option<Reg> { 5853 let pattern0_0 = arg0; 5854 let pattern1_0 = arg1; 5855 let pattern2_0 = arg2; 5856 // Rule at src/isa/s390x/inst.isle line 2673. 5857 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5858 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5859 return Some(expr1_0); 5860 } 5861 5862 // Generated as internal constructor for term mul_mem_sext32. 5863 pub fn constructor_mul_mem_sext32<C: Context>( 5864 ctx: &mut C, 5865 arg0: Type, 5866 arg1: Reg, 5867 arg2: &MemArg, 5868 ) -> Option<Reg> { 5869 let pattern0_0 = arg0; 5870 let pattern1_0 = arg1; 5871 let pattern2_0 = arg2; 5872 // Rule at src/isa/s390x/inst.isle line 2676. 5873 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5874 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5875 return Some(expr1_0); 5876 } 5877 5878 // Generated as internal constructor for term udivmod. 5879 pub fn constructor_udivmod<C: Context>( 5880 ctx: &mut C, 5881 arg0: Type, 5882 arg1: &RegPair, 5883 arg2: Reg, 5884 ) -> Option<RegPair> { 5885 let pattern0_0 = arg0; 5886 if pattern0_0 == I32 { 5887 let pattern2_0 = arg1; 5888 let pattern3_0 = arg2; 5889 // Rule at src/isa/s390x/inst.isle line 2682. 5890 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5891 return Some(expr0_0); 5892 } 5893 if pattern0_0 == I64 { 5894 let pattern2_0 = arg1; 5895 let pattern3_0 = arg2; 5896 // Rule at src/isa/s390x/inst.isle line 2683. 5897 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5898 return Some(expr0_0); 5899 } 5900 return None; 5901 } 5902 5903 // Generated as internal constructor for term sdivmod. 5904 pub fn constructor_sdivmod<C: Context>( 5905 ctx: &mut C, 5906 arg0: Type, 5907 arg1: &RegPair, 5908 arg2: Reg, 5909 ) -> Option<RegPair> { 5910 let pattern0_0 = arg0; 5911 if pattern0_0 == I32 { 5912 let pattern2_0 = arg1; 5913 let pattern3_0 = arg2; 5914 // Rule at src/isa/s390x/inst.isle line 2689. 5915 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5916 return Some(expr0_0); 5917 } 5918 if pattern0_0 == I64 { 5919 let pattern2_0 = arg1; 5920 let pattern3_0 = arg2; 5921 // Rule at src/isa/s390x/inst.isle line 2690. 5922 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5923 return Some(expr0_0); 5924 } 5925 return None; 5926 } 5927 5928 // Generated as internal constructor for term aluop_and. 5929 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5930 let pattern0_0 = arg0; 5931 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5932 // Rule at src/isa/s390x/inst.isle line 2696. 5933 let expr0_0 = ALUOp::And32; 5934 return Some(expr0_0); 5935 } 5936 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5937 // Rule at src/isa/s390x/inst.isle line 2697. 5938 let expr0_0 = ALUOp::And64; 5939 return Some(expr0_0); 5940 } 5941 return None; 5942 } 5943 5944 // Generated as internal constructor for term and_reg. 5945 pub fn constructor_and_reg<C: Context>( 5946 ctx: &mut C, 5947 arg0: Type, 5948 arg1: Reg, 5949 arg2: Reg, 5950 ) -> Option<Reg> { 5951 let pattern0_0 = arg0; 5952 let pattern1_0 = arg1; 5953 let pattern2_0 = arg2; 5954 // Rule at src/isa/s390x/inst.isle line 2700. 5955 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5956 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5957 return Some(expr1_0); 5958 } 5959 5960 // Generated as internal constructor for term and_uimm16shifted. 5961 pub fn constructor_and_uimm16shifted<C: Context>( 5962 ctx: &mut C, 5963 arg0: Type, 5964 arg1: Reg, 5965 arg2: UImm16Shifted, 5966 ) -> Option<Reg> { 5967 let pattern0_0 = arg0; 5968 let pattern1_0 = arg1; 5969 let pattern2_0 = arg2; 5970 // Rule at src/isa/s390x/inst.isle line 2703. 5971 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5972 let expr1_0 = 5973 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5974 return Some(expr1_0); 5975 } 5976 5977 // Generated as internal constructor for term and_uimm32shifted. 5978 pub fn constructor_and_uimm32shifted<C: Context>( 5979 ctx: &mut C, 5980 arg0: Type, 5981 arg1: Reg, 5982 arg2: UImm32Shifted, 5983 ) -> Option<Reg> { 5984 let pattern0_0 = arg0; 5985 let pattern1_0 = arg1; 5986 let pattern2_0 = arg2; 5987 // Rule at src/isa/s390x/inst.isle line 2706. 5988 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5989 let expr1_0 = 5990 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5991 return Some(expr1_0); 5992 } 5993 5994 // Generated as internal constructor for term and_mem. 5995 pub fn constructor_and_mem<C: Context>( 5996 ctx: &mut C, 5997 arg0: Type, 5998 arg1: Reg, 5999 arg2: &MemArg, 6000 ) -> Option<Reg> { 6001 let pattern0_0 = arg0; 6002 let pattern1_0 = arg1; 6003 let pattern2_0 = arg2; 6004 // Rule at src/isa/s390x/inst.isle line 2709. 6005 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6006 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6007 return Some(expr1_0); 6008 } 6009 6010 // Generated as internal constructor for term aluop_or. 6011 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6012 let pattern0_0 = arg0; 6013 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6014 // Rule at src/isa/s390x/inst.isle line 2715. 6015 let expr0_0 = ALUOp::Orr32; 6016 return Some(expr0_0); 6017 } 6018 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6019 // Rule at src/isa/s390x/inst.isle line 2716. 6020 let expr0_0 = ALUOp::Orr64; 6021 return Some(expr0_0); 6022 } 6023 return None; 6024 } 6025 6026 // Generated as internal constructor for term or_reg. 6027 pub fn constructor_or_reg<C: Context>( 6028 ctx: &mut C, 6029 arg0: Type, 6030 arg1: Reg, 6031 arg2: Reg, 6032 ) -> Option<Reg> { 6033 let pattern0_0 = arg0; 6034 let pattern1_0 = arg1; 6035 let pattern2_0 = arg2; 6036 // Rule at src/isa/s390x/inst.isle line 2719. 6037 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6038 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6039 return Some(expr1_0); 6040 } 6041 6042 // Generated as internal constructor for term or_uimm16shifted. 6043 pub fn constructor_or_uimm16shifted<C: Context>( 6044 ctx: &mut C, 6045 arg0: Type, 6046 arg1: Reg, 6047 arg2: UImm16Shifted, 6048 ) -> Option<Reg> { 6049 let pattern0_0 = arg0; 6050 let pattern1_0 = arg1; 6051 let pattern2_0 = arg2; 6052 // Rule at src/isa/s390x/inst.isle line 2722. 6053 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6054 let expr1_0 = 6055 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6056 return Some(expr1_0); 6057 } 6058 6059 // Generated as internal constructor for term or_uimm32shifted. 6060 pub fn constructor_or_uimm32shifted<C: Context>( 6061 ctx: &mut C, 6062 arg0: Type, 6063 arg1: Reg, 6064 arg2: UImm32Shifted, 6065 ) -> Option<Reg> { 6066 let pattern0_0 = arg0; 6067 let pattern1_0 = arg1; 6068 let pattern2_0 = arg2; 6069 // Rule at src/isa/s390x/inst.isle line 2725. 6070 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6071 let expr1_0 = 6072 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6073 return Some(expr1_0); 6074 } 6075 6076 // Generated as internal constructor for term or_mem. 6077 pub fn constructor_or_mem<C: Context>( 6078 ctx: &mut C, 6079 arg0: Type, 6080 arg1: Reg, 6081 arg2: &MemArg, 6082 ) -> Option<Reg> { 6083 let pattern0_0 = arg0; 6084 let pattern1_0 = arg1; 6085 let pattern2_0 = arg2; 6086 // Rule at src/isa/s390x/inst.isle line 2728. 6087 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6088 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6089 return Some(expr1_0); 6090 } 6091 6092 // Generated as internal constructor for term aluop_xor. 6093 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6094 let pattern0_0 = arg0; 6095 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6096 // Rule at src/isa/s390x/inst.isle line 2734. 6097 let expr0_0 = ALUOp::Xor32; 6098 return Some(expr0_0); 6099 } 6100 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6101 // Rule at src/isa/s390x/inst.isle line 2735. 6102 let expr0_0 = ALUOp::Xor64; 6103 return Some(expr0_0); 6104 } 6105 return None; 6106 } 6107 6108 // Generated as internal constructor for term xor_reg. 6109 pub fn constructor_xor_reg<C: Context>( 6110 ctx: &mut C, 6111 arg0: Type, 6112 arg1: Reg, 6113 arg2: Reg, 6114 ) -> Option<Reg> { 6115 let pattern0_0 = arg0; 6116 let pattern1_0 = arg1; 6117 let pattern2_0 = arg2; 6118 // Rule at src/isa/s390x/inst.isle line 2738. 6119 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6120 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6121 return Some(expr1_0); 6122 } 6123 6124 // Generated as internal constructor for term xor_uimm32shifted. 6125 pub fn constructor_xor_uimm32shifted<C: Context>( 6126 ctx: &mut C, 6127 arg0: Type, 6128 arg1: Reg, 6129 arg2: UImm32Shifted, 6130 ) -> Option<Reg> { 6131 let pattern0_0 = arg0; 6132 let pattern1_0 = arg1; 6133 let pattern2_0 = arg2; 6134 // Rule at src/isa/s390x/inst.isle line 2741. 6135 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6136 let expr1_0 = 6137 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6138 return Some(expr1_0); 6139 } 6140 6141 // Generated as internal constructor for term xor_mem. 6142 pub fn constructor_xor_mem<C: Context>( 6143 ctx: &mut C, 6144 arg0: Type, 6145 arg1: Reg, 6146 arg2: &MemArg, 6147 ) -> Option<Reg> { 6148 let pattern0_0 = arg0; 6149 let pattern1_0 = arg1; 6150 let pattern2_0 = arg2; 6151 // Rule at src/isa/s390x/inst.isle line 2744. 6152 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6153 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6154 return Some(expr1_0); 6155 } 6156 6157 // Generated as internal constructor for term push_xor_uimm32shifted. 6158 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6159 ctx: &mut C, 6160 arg0: &VecMInstBuilder, 6161 arg1: Type, 6162 arg2: WritableReg, 6163 arg3: Reg, 6164 arg4: UImm32Shifted, 6165 ) -> Option<Reg> { 6166 let pattern0_0 = arg0; 6167 let pattern1_0 = arg1; 6168 let pattern2_0 = arg2; 6169 let pattern3_0 = arg3; 6170 let pattern4_0 = arg4; 6171 // Rule at src/isa/s390x/inst.isle line 2747. 6172 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6173 let expr1_0 = constructor_push_alu_uimm32shifted( 6174 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6175 )?; 6176 return Some(expr1_0); 6177 } 6178 6179 // Generated as internal constructor for term not_reg. 6180 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6181 let pattern0_0 = arg0; 6182 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6183 let pattern2_0 = arg1; 6184 // Rule at src/isa/s390x/inst.isle line 2753. 6185 let expr0_0: u32 = 4294967295; 6186 let expr1_0: u8 = 0; 6187 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6188 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6189 return Some(expr3_0); 6190 } 6191 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6192 let pattern2_0 = arg1; 6193 // Rule at src/isa/s390x/inst.isle line 2755. 6194 let expr0_0: u32 = 4294967295; 6195 let expr1_0: u8 = 0; 6196 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6197 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6198 let expr4_0: u32 = 4294967295; 6199 let expr5_0: u8 = 32; 6200 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6201 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6202 return Some(expr7_0); 6203 } 6204 return None; 6205 } 6206 6207 // Generated as internal constructor for term push_not_reg. 6208 pub fn constructor_push_not_reg<C: Context>( 6209 ctx: &mut C, 6210 arg0: &VecMInstBuilder, 6211 arg1: Type, 6212 arg2: WritableReg, 6213 arg3: Reg, 6214 ) -> Option<Reg> { 6215 let pattern0_0 = arg0; 6216 let pattern1_0 = arg1; 6217 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6218 let pattern3_0 = arg2; 6219 let pattern4_0 = arg3; 6220 // Rule at src/isa/s390x/inst.isle line 2761. 6221 let expr0_0: u32 = 4294967295; 6222 let expr1_0: u8 = 0; 6223 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6224 let expr3_0 = constructor_push_xor_uimm32shifted( 6225 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6226 )?; 6227 return Some(expr3_0); 6228 } 6229 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6230 let pattern3_0 = arg2; 6231 let pattern4_0 = arg3; 6232 // Rule at src/isa/s390x/inst.isle line 2763. 6233 let expr0_0: u32 = 4294967295; 6234 let expr1_0: u8 = 0; 6235 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6236 let expr3_0 = constructor_push_xor_uimm32shifted( 6237 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6238 )?; 6239 let expr4_0: u32 = 4294967295; 6240 let expr5_0: u8 = 32; 6241 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6242 let expr7_0 = constructor_push_xor_uimm32shifted( 6243 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6244 )?; 6245 return Some(expr7_0); 6246 } 6247 return None; 6248 } 6249 6250 // Generated as internal constructor for term aluop_and_not. 6251 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6252 let pattern0_0 = arg0; 6253 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6254 // Rule at src/isa/s390x/inst.isle line 2771. 6255 let expr0_0 = ALUOp::AndNot32; 6256 return Some(expr0_0); 6257 } 6258 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6259 // Rule at src/isa/s390x/inst.isle line 2772. 6260 let expr0_0 = ALUOp::AndNot64; 6261 return Some(expr0_0); 6262 } 6263 return None; 6264 } 6265 6266 // Generated as internal constructor for term and_not_reg. 6267 pub fn constructor_and_not_reg<C: Context>( 6268 ctx: &mut C, 6269 arg0: Type, 6270 arg1: Reg, 6271 arg2: Reg, 6272 ) -> Option<Reg> { 6273 let pattern0_0 = arg0; 6274 let pattern1_0 = arg1; 6275 let pattern2_0 = arg2; 6276 // Rule at src/isa/s390x/inst.isle line 2775. 6277 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6278 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6279 return Some(expr1_0); 6280 } 6281 6282 // Generated as internal constructor for term aluop_or_not. 6283 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6284 let pattern0_0 = arg0; 6285 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6286 // Rule at src/isa/s390x/inst.isle line 2781. 6287 let expr0_0 = ALUOp::OrrNot32; 6288 return Some(expr0_0); 6289 } 6290 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6291 // Rule at src/isa/s390x/inst.isle line 2782. 6292 let expr0_0 = ALUOp::OrrNot64; 6293 return Some(expr0_0); 6294 } 6295 return None; 6296 } 6297 6298 // Generated as internal constructor for term or_not_reg. 6299 pub fn constructor_or_not_reg<C: Context>( 6300 ctx: &mut C, 6301 arg0: Type, 6302 arg1: Reg, 6303 arg2: Reg, 6304 ) -> Option<Reg> { 6305 let pattern0_0 = arg0; 6306 let pattern1_0 = arg1; 6307 let pattern2_0 = arg2; 6308 // Rule at src/isa/s390x/inst.isle line 2785. 6309 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6310 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6311 return Some(expr1_0); 6312 } 6313 6314 // Generated as internal constructor for term aluop_xor_not. 6315 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6316 let pattern0_0 = arg0; 6317 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6318 // Rule at src/isa/s390x/inst.isle line 2791. 6319 let expr0_0 = ALUOp::XorNot32; 6320 return Some(expr0_0); 6321 } 6322 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6323 // Rule at src/isa/s390x/inst.isle line 2792. 6324 let expr0_0 = ALUOp::XorNot64; 6325 return Some(expr0_0); 6326 } 6327 return None; 6328 } 6329 6330 // Generated as internal constructor for term xor_not_reg. 6331 pub fn constructor_xor_not_reg<C: Context>( 6332 ctx: &mut C, 6333 arg0: Type, 6334 arg1: Reg, 6335 arg2: Reg, 6336 ) -> Option<Reg> { 6337 let pattern0_0 = arg0; 6338 let pattern1_0 = arg1; 6339 let pattern2_0 = arg2; 6340 // Rule at src/isa/s390x/inst.isle line 2795. 6341 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6342 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6343 return Some(expr1_0); 6344 } 6345 6346 // Generated as internal constructor for term unaryop_abs. 6347 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6348 let pattern0_0 = arg0; 6349 if pattern0_0 == I32 { 6350 // Rule at src/isa/s390x/inst.isle line 2801. 6351 let expr0_0 = UnaryOp::Abs32; 6352 return Some(expr0_0); 6353 } 6354 if pattern0_0 == I64 { 6355 // Rule at src/isa/s390x/inst.isle line 2802. 6356 let expr0_0 = UnaryOp::Abs64; 6357 return Some(expr0_0); 6358 } 6359 return None; 6360 } 6361 6362 // Generated as internal constructor for term unaryop_abs_sext32. 6363 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6364 let pattern0_0 = arg0; 6365 if pattern0_0 == I64 { 6366 // Rule at src/isa/s390x/inst.isle line 2805. 6367 let expr0_0 = UnaryOp::Abs64Ext32; 6368 return Some(expr0_0); 6369 } 6370 return None; 6371 } 6372 6373 // Generated as internal constructor for term abs_reg. 6374 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6375 let pattern0_0 = arg0; 6376 let pattern1_0 = arg1; 6377 // Rule at src/isa/s390x/inst.isle line 2808. 6378 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6379 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6380 return Some(expr1_0); 6381 } 6382 6383 // Generated as internal constructor for term abs_reg_sext32. 6384 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6385 let pattern0_0 = arg0; 6386 let pattern1_0 = arg1; 6387 // Rule at src/isa/s390x/inst.isle line 2811. 6388 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6389 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6390 return Some(expr1_0); 6391 } 6392 6393 // Generated as internal constructor for term unaryop_neg. 6394 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6395 let pattern0_0 = arg0; 6396 if pattern0_0 == I8 { 6397 // Rule at src/isa/s390x/inst.isle line 2817. 6398 let expr0_0 = UnaryOp::Neg32; 6399 return Some(expr0_0); 6400 } 6401 if pattern0_0 == I16 { 6402 // Rule at src/isa/s390x/inst.isle line 2818. 6403 let expr0_0 = UnaryOp::Neg32; 6404 return Some(expr0_0); 6405 } 6406 if pattern0_0 == I32 { 6407 // Rule at src/isa/s390x/inst.isle line 2819. 6408 let expr0_0 = UnaryOp::Neg32; 6409 return Some(expr0_0); 6410 } 6411 if pattern0_0 == I64 { 6412 // Rule at src/isa/s390x/inst.isle line 2820. 6413 let expr0_0 = UnaryOp::Neg64; 6414 return Some(expr0_0); 6415 } 6416 return None; 6417 } 6418 6419 // Generated as internal constructor for term unaryop_neg_sext32. 6420 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6421 let pattern0_0 = arg0; 6422 if pattern0_0 == I64 { 6423 // Rule at src/isa/s390x/inst.isle line 2823. 6424 let expr0_0 = UnaryOp::Neg64Ext32; 6425 return Some(expr0_0); 6426 } 6427 return None; 6428 } 6429 6430 // Generated as internal constructor for term neg_reg. 6431 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6432 let pattern0_0 = arg0; 6433 let pattern1_0 = arg1; 6434 // Rule at src/isa/s390x/inst.isle line 2826. 6435 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6436 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6437 return Some(expr1_0); 6438 } 6439 6440 // Generated as internal constructor for term neg_reg_sext32. 6441 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6442 let pattern0_0 = arg0; 6443 let pattern1_0 = arg1; 6444 // Rule at src/isa/s390x/inst.isle line 2829. 6445 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6446 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6447 return Some(expr1_0); 6448 } 6449 6450 // Generated as internal constructor for term unaryop_bswap. 6451 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6452 let pattern0_0 = arg0; 6453 if pattern0_0 == I32 { 6454 // Rule at src/isa/s390x/inst.isle line 2835. 6455 let expr0_0 = UnaryOp::BSwap32; 6456 return Some(expr0_0); 6457 } 6458 if pattern0_0 == I64 { 6459 // Rule at src/isa/s390x/inst.isle line 2836. 6460 let expr0_0 = UnaryOp::BSwap64; 6461 return Some(expr0_0); 6462 } 6463 return None; 6464 } 6465 6466 // Generated as internal constructor for term bswap_reg. 6467 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6468 let pattern0_0 = arg0; 6469 let pattern1_0 = arg1; 6470 // Rule at src/isa/s390x/inst.isle line 2839. 6471 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6472 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6473 return Some(expr1_0); 6474 } 6475 6476 // Generated as internal constructor for term push_bswap_reg. 6477 pub fn constructor_push_bswap_reg<C: Context>( 6478 ctx: &mut C, 6479 arg0: &VecMInstBuilder, 6480 arg1: Type, 6481 arg2: WritableReg, 6482 arg3: Reg, 6483 ) -> Option<Reg> { 6484 let pattern0_0 = arg0; 6485 let pattern1_0 = arg1; 6486 let pattern2_0 = arg2; 6487 let pattern3_0 = arg3; 6488 // Rule at src/isa/s390x/inst.isle line 2842. 6489 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6490 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6491 return Some(expr1_0); 6492 } 6493 6494 // Generated as internal constructor for term shiftop_rot. 6495 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6496 let pattern0_0 = arg0; 6497 if pattern0_0 == I32 { 6498 // Rule at src/isa/s390x/inst.isle line 2848. 6499 let expr0_0 = ShiftOp::RotL32; 6500 return Some(expr0_0); 6501 } 6502 if pattern0_0 == I64 { 6503 // Rule at src/isa/s390x/inst.isle line 2849. 6504 let expr0_0 = ShiftOp::RotL64; 6505 return Some(expr0_0); 6506 } 6507 return None; 6508 } 6509 6510 // Generated as internal constructor for term rot_reg. 6511 pub fn constructor_rot_reg<C: Context>( 6512 ctx: &mut C, 6513 arg0: Type, 6514 arg1: Reg, 6515 arg2: Reg, 6516 ) -> Option<Reg> { 6517 let pattern0_0 = arg0; 6518 let pattern1_0 = arg1; 6519 let pattern2_0 = arg2; 6520 // Rule at src/isa/s390x/inst.isle line 2852. 6521 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6522 let expr1_0: u8 = 0; 6523 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6524 return Some(expr2_0); 6525 } 6526 6527 // Generated as internal constructor for term rot_imm. 6528 pub fn constructor_rot_imm<C: Context>( 6529 ctx: &mut C, 6530 arg0: Type, 6531 arg1: Reg, 6532 arg2: u8, 6533 ) -> Option<Reg> { 6534 let pattern0_0 = arg0; 6535 let pattern1_0 = arg1; 6536 let pattern2_0 = arg2; 6537 // Rule at src/isa/s390x/inst.isle line 2856. 6538 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6539 let expr1_0 = C::zero_reg(ctx); 6540 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6541 return Some(expr2_0); 6542 } 6543 6544 // Generated as internal constructor for term rot_imm_reg. 6545 pub fn constructor_rot_imm_reg<C: Context>( 6546 ctx: &mut C, 6547 arg0: Type, 6548 arg1: Reg, 6549 arg2: u8, 6550 arg3: Reg, 6551 ) -> Option<Reg> { 6552 let pattern0_0 = arg0; 6553 let pattern1_0 = arg1; 6554 let pattern2_0 = arg2; 6555 let pattern3_0 = arg3; 6556 // Rule at src/isa/s390x/inst.isle line 2860. 6557 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6558 let expr1_0 = constructor_shift_rr( 6559 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6560 )?; 6561 return Some(expr1_0); 6562 } 6563 6564 // Generated as internal constructor for term push_rot_imm_reg. 6565 pub fn constructor_push_rot_imm_reg<C: Context>( 6566 ctx: &mut C, 6567 arg0: &VecMInstBuilder, 6568 arg1: Type, 6569 arg2: WritableReg, 6570 arg3: Reg, 6571 arg4: u8, 6572 arg5: Reg, 6573 ) -> Option<Reg> { 6574 let pattern0_0 = arg0; 6575 let pattern1_0 = arg1; 6576 let pattern2_0 = arg2; 6577 let pattern3_0 = arg3; 6578 let pattern4_0 = arg4; 6579 let pattern5_0 = arg5; 6580 // Rule at src/isa/s390x/inst.isle line 2864. 6581 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6582 let expr1_0 = constructor_push_shift( 6583 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6584 )?; 6585 return Some(expr1_0); 6586 } 6587 6588 // Generated as internal constructor for term shiftop_lshl. 6589 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6590 let pattern0_0 = arg0; 6591 if pattern0_0 == I8 { 6592 // Rule at src/isa/s390x/inst.isle line 2871. 6593 let expr0_0 = ShiftOp::LShL32; 6594 return Some(expr0_0); 6595 } 6596 if pattern0_0 == I16 { 6597 // Rule at src/isa/s390x/inst.isle line 2872. 6598 let expr0_0 = ShiftOp::LShL32; 6599 return Some(expr0_0); 6600 } 6601 if pattern0_0 == I32 { 6602 // Rule at src/isa/s390x/inst.isle line 2873. 6603 let expr0_0 = ShiftOp::LShL32; 6604 return Some(expr0_0); 6605 } 6606 if pattern0_0 == I64 { 6607 // Rule at src/isa/s390x/inst.isle line 2874. 6608 let expr0_0 = ShiftOp::LShL64; 6609 return Some(expr0_0); 6610 } 6611 return None; 6612 } 6613 6614 // Generated as internal constructor for term lshl_reg. 6615 pub fn constructor_lshl_reg<C: Context>( 6616 ctx: &mut C, 6617 arg0: Type, 6618 arg1: Reg, 6619 arg2: Reg, 6620 ) -> Option<Reg> { 6621 let pattern0_0 = arg0; 6622 let pattern1_0 = arg1; 6623 let pattern2_0 = arg2; 6624 // Rule at src/isa/s390x/inst.isle line 2877. 6625 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6626 let expr1_0: u8 = 0; 6627 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6628 return Some(expr2_0); 6629 } 6630 6631 // Generated as internal constructor for term lshl_imm. 6632 pub fn constructor_lshl_imm<C: Context>( 6633 ctx: &mut C, 6634 arg0: Type, 6635 arg1: Reg, 6636 arg2: u8, 6637 ) -> Option<Reg> { 6638 let pattern0_0 = arg0; 6639 let pattern1_0 = arg1; 6640 let pattern2_0 = arg2; 6641 // Rule at src/isa/s390x/inst.isle line 2881. 6642 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6643 let expr1_0 = C::zero_reg(ctx); 6644 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6645 return Some(expr2_0); 6646 } 6647 6648 // Generated as internal constructor for term shiftop_lshr. 6649 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6650 let pattern0_0 = arg0; 6651 if pattern0_0 == I32 { 6652 // Rule at src/isa/s390x/inst.isle line 2888. 6653 let expr0_0 = ShiftOp::LShR32; 6654 return Some(expr0_0); 6655 } 6656 if pattern0_0 == I64 { 6657 // Rule at src/isa/s390x/inst.isle line 2889. 6658 let expr0_0 = ShiftOp::LShR64; 6659 return Some(expr0_0); 6660 } 6661 return None; 6662 } 6663 6664 // Generated as internal constructor for term lshr_reg. 6665 pub fn constructor_lshr_reg<C: Context>( 6666 ctx: &mut C, 6667 arg0: Type, 6668 arg1: Reg, 6669 arg2: Reg, 6670 ) -> Option<Reg> { 6671 let pattern0_0 = arg0; 6672 let pattern1_0 = arg1; 6673 let pattern2_0 = arg2; 6674 // Rule at src/isa/s390x/inst.isle line 2892. 6675 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6676 let expr1_0: u8 = 0; 6677 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6678 return Some(expr2_0); 6679 } 6680 6681 // Generated as internal constructor for term lshr_imm. 6682 pub fn constructor_lshr_imm<C: Context>( 6683 ctx: &mut C, 6684 arg0: Type, 6685 arg1: Reg, 6686 arg2: u8, 6687 ) -> Option<Reg> { 6688 let pattern0_0 = arg0; 6689 let pattern1_0 = arg1; 6690 let pattern2_0 = arg2; 6691 // Rule at src/isa/s390x/inst.isle line 2896. 6692 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6693 let expr1_0 = C::zero_reg(ctx); 6694 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6695 return Some(expr2_0); 6696 } 6697 6698 // Generated as internal constructor for term shiftop_ashr. 6699 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6700 let pattern0_0 = arg0; 6701 if pattern0_0 == I32 { 6702 // Rule at src/isa/s390x/inst.isle line 2903. 6703 let expr0_0 = ShiftOp::AShR32; 6704 return Some(expr0_0); 6705 } 6706 if pattern0_0 == I64 { 6707 // Rule at src/isa/s390x/inst.isle line 2904. 6708 let expr0_0 = ShiftOp::AShR64; 6709 return Some(expr0_0); 6710 } 6711 return None; 6712 } 6713 6714 // Generated as internal constructor for term ashr_reg. 6715 pub fn constructor_ashr_reg<C: Context>( 6716 ctx: &mut C, 6717 arg0: Type, 6718 arg1: Reg, 6719 arg2: Reg, 6720 ) -> Option<Reg> { 6721 let pattern0_0 = arg0; 6722 let pattern1_0 = arg1; 6723 let pattern2_0 = arg2; 6724 // Rule at src/isa/s390x/inst.isle line 2907. 6725 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6726 let expr1_0: u8 = 0; 6727 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6728 return Some(expr2_0); 6729 } 6730 6731 // Generated as internal constructor for term ashr_imm. 6732 pub fn constructor_ashr_imm<C: Context>( 6733 ctx: &mut C, 6734 arg0: Type, 6735 arg1: Reg, 6736 arg2: u8, 6737 ) -> Option<Reg> { 6738 let pattern0_0 = arg0; 6739 let pattern1_0 = arg1; 6740 let pattern2_0 = arg2; 6741 // Rule at src/isa/s390x/inst.isle line 2911. 6742 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6743 let expr1_0 = C::zero_reg(ctx); 6744 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6745 return Some(expr2_0); 6746 } 6747 6748 // Generated as internal constructor for term popcnt_byte. 6749 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6750 let pattern0_0 = arg0; 6751 // Rule at src/isa/s390x/inst.isle line 2918. 6752 let expr0_0: Type = I64; 6753 let expr1_0 = UnaryOp::PopcntByte; 6754 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6755 return Some(expr2_0); 6756 } 6757 6758 // Generated as internal constructor for term popcnt_reg. 6759 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6760 let pattern0_0 = arg0; 6761 // Rule at src/isa/s390x/inst.isle line 2921. 6762 let expr0_0: Type = I64; 6763 let expr1_0 = UnaryOp::PopcntReg; 6764 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6765 return Some(expr2_0); 6766 } 6767 6768 // Generated as internal constructor for term atomic_rmw_and. 6769 pub fn constructor_atomic_rmw_and<C: Context>( 6770 ctx: &mut C, 6771 arg0: Type, 6772 arg1: Reg, 6773 arg2: &MemArg, 6774 ) -> Option<Reg> { 6775 let pattern0_0 = arg0; 6776 if pattern0_0 == I32 { 6777 let pattern2_0 = arg1; 6778 let pattern3_0 = arg2; 6779 // Rule at src/isa/s390x/inst.isle line 2927. 6780 let expr0_0: Type = I32; 6781 let expr1_0 = ALUOp::And32; 6782 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6783 return Some(expr2_0); 6784 } 6785 if pattern0_0 == I64 { 6786 let pattern2_0 = arg1; 6787 let pattern3_0 = arg2; 6788 // Rule at src/isa/s390x/inst.isle line 2928. 6789 let expr0_0: Type = I64; 6790 let expr1_0 = ALUOp::And64; 6791 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6792 return Some(expr2_0); 6793 } 6794 return None; 6795 } 6796 6797 // Generated as internal constructor for term atomic_rmw_or. 6798 pub fn constructor_atomic_rmw_or<C: Context>( 6799 ctx: &mut C, 6800 arg0: Type, 6801 arg1: Reg, 6802 arg2: &MemArg, 6803 ) -> Option<Reg> { 6804 let pattern0_0 = arg0; 6805 if pattern0_0 == I32 { 6806 let pattern2_0 = arg1; 6807 let pattern3_0 = arg2; 6808 // Rule at src/isa/s390x/inst.isle line 2931. 6809 let expr0_0: Type = I32; 6810 let expr1_0 = ALUOp::Orr32; 6811 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6812 return Some(expr2_0); 6813 } 6814 if pattern0_0 == I64 { 6815 let pattern2_0 = arg1; 6816 let pattern3_0 = arg2; 6817 // Rule at src/isa/s390x/inst.isle line 2932. 6818 let expr0_0: Type = I64; 6819 let expr1_0 = ALUOp::Orr64; 6820 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6821 return Some(expr2_0); 6822 } 6823 return None; 6824 } 6825 6826 // Generated as internal constructor for term atomic_rmw_xor. 6827 pub fn constructor_atomic_rmw_xor<C: Context>( 6828 ctx: &mut C, 6829 arg0: Type, 6830 arg1: Reg, 6831 arg2: &MemArg, 6832 ) -> Option<Reg> { 6833 let pattern0_0 = arg0; 6834 if pattern0_0 == I32 { 6835 let pattern2_0 = arg1; 6836 let pattern3_0 = arg2; 6837 // Rule at src/isa/s390x/inst.isle line 2935. 6838 let expr0_0: Type = I32; 6839 let expr1_0 = ALUOp::Xor32; 6840 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6841 return Some(expr2_0); 6842 } 6843 if pattern0_0 == I64 { 6844 let pattern2_0 = arg1; 6845 let pattern3_0 = arg2; 6846 // Rule at src/isa/s390x/inst.isle line 2936. 6847 let expr0_0: Type = I64; 6848 let expr1_0 = ALUOp::Xor64; 6849 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6850 return Some(expr2_0); 6851 } 6852 return None; 6853 } 6854 6855 // Generated as internal constructor for term atomic_rmw_add. 6856 pub fn constructor_atomic_rmw_add<C: Context>( 6857 ctx: &mut C, 6858 arg0: Type, 6859 arg1: Reg, 6860 arg2: &MemArg, 6861 ) -> Option<Reg> { 6862 let pattern0_0 = arg0; 6863 if pattern0_0 == I32 { 6864 let pattern2_0 = arg1; 6865 let pattern3_0 = arg2; 6866 // Rule at src/isa/s390x/inst.isle line 2939. 6867 let expr0_0: Type = I32; 6868 let expr1_0 = ALUOp::Add32; 6869 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6870 return Some(expr2_0); 6871 } 6872 if pattern0_0 == I64 { 6873 let pattern2_0 = arg1; 6874 let pattern3_0 = arg2; 6875 // Rule at src/isa/s390x/inst.isle line 2940. 6876 let expr0_0: Type = I64; 6877 let expr1_0 = ALUOp::Add64; 6878 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6879 return Some(expr2_0); 6880 } 6881 return None; 6882 } 6883 6884 // Generated as internal constructor for term atomic_cas_impl. 6885 pub fn constructor_atomic_cas_impl<C: Context>( 6886 ctx: &mut C, 6887 arg0: Type, 6888 arg1: Reg, 6889 arg2: Reg, 6890 arg3: &MemArg, 6891 ) -> Option<Reg> { 6892 let pattern0_0 = arg0; 6893 if pattern0_0 == I32 { 6894 let pattern2_0 = arg1; 6895 let pattern3_0 = arg2; 6896 let pattern4_0 = arg3; 6897 // Rule at src/isa/s390x/inst.isle line 2946. 6898 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6899 return Some(expr0_0); 6900 } 6901 if pattern0_0 == I64 { 6902 let pattern2_0 = arg1; 6903 let pattern3_0 = arg2; 6904 let pattern4_0 = arg3; 6905 // Rule at src/isa/s390x/inst.isle line 2947. 6906 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6907 return Some(expr0_0); 6908 } 6909 return None; 6910 } 6911 6912 // Generated as internal constructor for term push_atomic_cas. 6913 pub fn constructor_push_atomic_cas<C: Context>( 6914 ctx: &mut C, 6915 arg0: &VecMInstBuilder, 6916 arg1: Type, 6917 arg2: WritableReg, 6918 arg3: Reg, 6919 arg4: &MemArg, 6920 ) -> Option<Reg> { 6921 let pattern0_0 = arg0; 6922 let pattern1_0 = arg1; 6923 if pattern1_0 == I32 { 6924 let pattern3_0 = arg2; 6925 let pattern4_0 = arg3; 6926 let pattern5_0 = arg4; 6927 // Rule at src/isa/s390x/inst.isle line 2950. 6928 let expr0_0 = 6929 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6930 return Some(expr0_0); 6931 } 6932 if pattern1_0 == I64 { 6933 let pattern3_0 = arg2; 6934 let pattern4_0 = arg3; 6935 let pattern5_0 = arg4; 6936 // Rule at src/isa/s390x/inst.isle line 2951. 6937 let expr0_0 = 6938 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6939 return Some(expr0_0); 6940 } 6941 return None; 6942 } 6943 6944 // Generated as internal constructor for term fpuop2_add. 6945 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6946 let pattern0_0 = arg0; 6947 if pattern0_0 == F32 { 6948 // Rule at src/isa/s390x/inst.isle line 2957. 6949 let expr0_0 = FPUOp2::Add32; 6950 return Some(expr0_0); 6951 } 6952 if pattern0_0 == F64 { 6953 // Rule at src/isa/s390x/inst.isle line 2958. 6954 let expr0_0 = FPUOp2::Add64; 6955 return Some(expr0_0); 6956 } 6957 return None; 6958 } 6959 6960 // Generated as internal constructor for term fadd_reg. 6961 pub fn constructor_fadd_reg<C: Context>( 6962 ctx: &mut C, 6963 arg0: Type, 6964 arg1: Reg, 6965 arg2: Reg, 6966 ) -> Option<Reg> { 6967 let pattern0_0 = arg0; 6968 let pattern1_0 = arg1; 6969 let pattern2_0 = arg2; 6970 // Rule at src/isa/s390x/inst.isle line 2961. 6971 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6972 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6973 return Some(expr1_0); 6974 } 6975 6976 // Generated as internal constructor for term fpuop2_sub. 6977 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6978 let pattern0_0 = arg0; 6979 if pattern0_0 == F32 { 6980 // Rule at src/isa/s390x/inst.isle line 2967. 6981 let expr0_0 = FPUOp2::Sub32; 6982 return Some(expr0_0); 6983 } 6984 if pattern0_0 == F64 { 6985 // Rule at src/isa/s390x/inst.isle line 2968. 6986 let expr0_0 = FPUOp2::Sub64; 6987 return Some(expr0_0); 6988 } 6989 return None; 6990 } 6991 6992 // Generated as internal constructor for term fsub_reg. 6993 pub fn constructor_fsub_reg<C: Context>( 6994 ctx: &mut C, 6995 arg0: Type, 6996 arg1: Reg, 6997 arg2: Reg, 6998 ) -> Option<Reg> { 6999 let pattern0_0 = arg0; 7000 let pattern1_0 = arg1; 7001 let pattern2_0 = arg2; 7002 // Rule at src/isa/s390x/inst.isle line 2971. 7003 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7004 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7005 return Some(expr1_0); 7006 } 7007 7008 // Generated as internal constructor for term fpuop2_mul. 7009 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7010 let pattern0_0 = arg0; 7011 if pattern0_0 == F32 { 7012 // Rule at src/isa/s390x/inst.isle line 2977. 7013 let expr0_0 = FPUOp2::Mul32; 7014 return Some(expr0_0); 7015 } 7016 if pattern0_0 == F64 { 7017 // Rule at src/isa/s390x/inst.isle line 2978. 7018 let expr0_0 = FPUOp2::Mul64; 7019 return Some(expr0_0); 7020 } 7021 return None; 7022 } 7023 7024 // Generated as internal constructor for term fmul_reg. 7025 pub fn constructor_fmul_reg<C: Context>( 7026 ctx: &mut C, 7027 arg0: Type, 7028 arg1: Reg, 7029 arg2: Reg, 7030 ) -> Option<Reg> { 7031 let pattern0_0 = arg0; 7032 let pattern1_0 = arg1; 7033 let pattern2_0 = arg2; 7034 // Rule at src/isa/s390x/inst.isle line 2981. 7035 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7036 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7037 return Some(expr1_0); 7038 } 7039 7040 // Generated as internal constructor for term fpuop2_div. 7041 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7042 let pattern0_0 = arg0; 7043 if pattern0_0 == F32 { 7044 // Rule at src/isa/s390x/inst.isle line 2987. 7045 let expr0_0 = FPUOp2::Div32; 7046 return Some(expr0_0); 7047 } 7048 if pattern0_0 == F64 { 7049 // Rule at src/isa/s390x/inst.isle line 2988. 7050 let expr0_0 = FPUOp2::Div64; 7051 return Some(expr0_0); 7052 } 7053 return None; 7054 } 7055 7056 // Generated as internal constructor for term fdiv_reg. 7057 pub fn constructor_fdiv_reg<C: Context>( 7058 ctx: &mut C, 7059 arg0: Type, 7060 arg1: Reg, 7061 arg2: Reg, 7062 ) -> Option<Reg> { 7063 let pattern0_0 = arg0; 7064 let pattern1_0 = arg1; 7065 let pattern2_0 = arg2; 7066 // Rule at src/isa/s390x/inst.isle line 2991. 7067 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7068 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7069 return Some(expr1_0); 7070 } 7071 7072 // Generated as internal constructor for term fpuop2_min. 7073 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7074 let pattern0_0 = arg0; 7075 if pattern0_0 == F32 { 7076 // Rule at src/isa/s390x/inst.isle line 2997. 7077 let expr0_0 = FPUOp2::Min32; 7078 return Some(expr0_0); 7079 } 7080 if pattern0_0 == F64 { 7081 // Rule at src/isa/s390x/inst.isle line 2998. 7082 let expr0_0 = FPUOp2::Min64; 7083 return Some(expr0_0); 7084 } 7085 return None; 7086 } 7087 7088 // Generated as internal constructor for term fmin_reg. 7089 pub fn constructor_fmin_reg<C: Context>( 7090 ctx: &mut C, 7091 arg0: Type, 7092 arg1: Reg, 7093 arg2: Reg, 7094 ) -> Option<Reg> { 7095 let pattern0_0 = arg0; 7096 let pattern1_0 = arg1; 7097 let pattern2_0 = arg2; 7098 // Rule at src/isa/s390x/inst.isle line 3001. 7099 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7100 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7101 return Some(expr1_0); 7102 } 7103 7104 // Generated as internal constructor for term fpuop2_max. 7105 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7106 let pattern0_0 = arg0; 7107 if pattern0_0 == F32 { 7108 // Rule at src/isa/s390x/inst.isle line 3007. 7109 let expr0_0 = FPUOp2::Max32; 7110 return Some(expr0_0); 7111 } 7112 if pattern0_0 == F64 { 7113 // Rule at src/isa/s390x/inst.isle line 3008. 7114 let expr0_0 = FPUOp2::Max64; 7115 return Some(expr0_0); 7116 } 7117 return None; 7118 } 7119 7120 // Generated as internal constructor for term fmax_reg. 7121 pub fn constructor_fmax_reg<C: Context>( 7122 ctx: &mut C, 7123 arg0: Type, 7124 arg1: Reg, 7125 arg2: Reg, 7126 ) -> Option<Reg> { 7127 let pattern0_0 = arg0; 7128 let pattern1_0 = arg1; 7129 let pattern2_0 = arg2; 7130 // Rule at src/isa/s390x/inst.isle line 3011. 7131 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7132 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7133 return Some(expr1_0); 7134 } 7135 7136 // Generated as internal constructor for term fpuop3_fma. 7137 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7138 let pattern0_0 = arg0; 7139 if pattern0_0 == F32 { 7140 // Rule at src/isa/s390x/inst.isle line 3017. 7141 let expr0_0 = FPUOp3::MAdd32; 7142 return Some(expr0_0); 7143 } 7144 if pattern0_0 == F64 { 7145 // Rule at src/isa/s390x/inst.isle line 3018. 7146 let expr0_0 = FPUOp3::MAdd64; 7147 return Some(expr0_0); 7148 } 7149 return None; 7150 } 7151 7152 // Generated as internal constructor for term fma_reg. 7153 pub fn constructor_fma_reg<C: Context>( 7154 ctx: &mut C, 7155 arg0: Type, 7156 arg1: Reg, 7157 arg2: Reg, 7158 arg3: Reg, 7159 ) -> Option<Reg> { 7160 let pattern0_0 = arg0; 7161 let pattern1_0 = arg1; 7162 let pattern2_0 = arg2; 7163 let pattern3_0 = arg3; 7164 // Rule at src/isa/s390x/inst.isle line 3021. 7165 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7166 let expr1_0 = constructor_fpu_rrrr( 7167 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7168 )?; 7169 return Some(expr1_0); 7170 } 7171 7172 // Generated as internal constructor for term fpuop1_sqrt. 7173 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7174 let pattern0_0 = arg0; 7175 if pattern0_0 == F32 { 7176 // Rule at src/isa/s390x/inst.isle line 3027. 7177 let expr0_0 = FPUOp1::Sqrt32; 7178 return Some(expr0_0); 7179 } 7180 if pattern0_0 == F64 { 7181 // Rule at src/isa/s390x/inst.isle line 3028. 7182 let expr0_0 = FPUOp1::Sqrt64; 7183 return Some(expr0_0); 7184 } 7185 return None; 7186 } 7187 7188 // Generated as internal constructor for term sqrt_reg. 7189 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7190 let pattern0_0 = arg0; 7191 let pattern1_0 = arg1; 7192 // Rule at src/isa/s390x/inst.isle line 3031. 7193 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7194 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7195 return Some(expr1_0); 7196 } 7197 7198 // Generated as internal constructor for term fpuop1_neg. 7199 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7200 let pattern0_0 = arg0; 7201 if pattern0_0 == F32 { 7202 // Rule at src/isa/s390x/inst.isle line 3037. 7203 let expr0_0 = FPUOp1::Neg32; 7204 return Some(expr0_0); 7205 } 7206 if pattern0_0 == F64 { 7207 // Rule at src/isa/s390x/inst.isle line 3038. 7208 let expr0_0 = FPUOp1::Neg64; 7209 return Some(expr0_0); 7210 } 7211 return None; 7212 } 7213 7214 // Generated as internal constructor for term fneg_reg. 7215 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7216 let pattern0_0 = arg0; 7217 let pattern1_0 = arg1; 7218 // Rule at src/isa/s390x/inst.isle line 3041. 7219 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7220 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7221 return Some(expr1_0); 7222 } 7223 7224 // Generated as internal constructor for term fpuop1_abs. 7225 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7226 let pattern0_0 = arg0; 7227 if pattern0_0 == F32 { 7228 // Rule at src/isa/s390x/inst.isle line 3047. 7229 let expr0_0 = FPUOp1::Abs32; 7230 return Some(expr0_0); 7231 } 7232 if pattern0_0 == F64 { 7233 // Rule at src/isa/s390x/inst.isle line 3048. 7234 let expr0_0 = FPUOp1::Abs64; 7235 return Some(expr0_0); 7236 } 7237 return None; 7238 } 7239 7240 // Generated as internal constructor for term fabs_reg. 7241 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7242 let pattern0_0 = arg0; 7243 let pattern1_0 = arg1; 7244 // Rule at src/isa/s390x/inst.isle line 3051. 7245 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7246 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7247 return Some(expr1_0); 7248 } 7249 7250 // Generated as internal constructor for term fpuroundmode_ceil. 7251 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7252 let pattern0_0 = arg0; 7253 if pattern0_0 == F32 { 7254 // Rule at src/isa/s390x/inst.isle line 3057. 7255 let expr0_0 = FpuRoundMode::Plus32; 7256 return Some(expr0_0); 7257 } 7258 if pattern0_0 == F64 { 7259 // Rule at src/isa/s390x/inst.isle line 3058. 7260 let expr0_0 = FpuRoundMode::Plus64; 7261 return Some(expr0_0); 7262 } 7263 return None; 7264 } 7265 7266 // Generated as internal constructor for term ceil_reg. 7267 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7268 let pattern0_0 = arg0; 7269 let pattern1_0 = arg1; 7270 // Rule at src/isa/s390x/inst.isle line 3061. 7271 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7272 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7273 return Some(expr1_0); 7274 } 7275 7276 // Generated as internal constructor for term fpuroundmode_floor. 7277 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7278 let pattern0_0 = arg0; 7279 if pattern0_0 == F32 { 7280 // Rule at src/isa/s390x/inst.isle line 3067. 7281 let expr0_0 = FpuRoundMode::Minus32; 7282 return Some(expr0_0); 7283 } 7284 if pattern0_0 == F64 { 7285 // Rule at src/isa/s390x/inst.isle line 3068. 7286 let expr0_0 = FpuRoundMode::Minus64; 7287 return Some(expr0_0); 7288 } 7289 return None; 7290 } 7291 7292 // Generated as internal constructor for term floor_reg. 7293 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7294 let pattern0_0 = arg0; 7295 let pattern1_0 = arg1; 7296 // Rule at src/isa/s390x/inst.isle line 3071. 7297 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7298 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7299 return Some(expr1_0); 7300 } 7301 7302 // Generated as internal constructor for term fpuroundmode_trunc. 7303 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7304 let pattern0_0 = arg0; 7305 if pattern0_0 == F32 { 7306 // Rule at src/isa/s390x/inst.isle line 3077. 7307 let expr0_0 = FpuRoundMode::Zero32; 7308 return Some(expr0_0); 7309 } 7310 if pattern0_0 == F64 { 7311 // Rule at src/isa/s390x/inst.isle line 3078. 7312 let expr0_0 = FpuRoundMode::Zero64; 7313 return Some(expr0_0); 7314 } 7315 return None; 7316 } 7317 7318 // Generated as internal constructor for term trunc_reg. 7319 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7320 let pattern0_0 = arg0; 7321 let pattern1_0 = arg1; 7322 // Rule at src/isa/s390x/inst.isle line 3081. 7323 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7324 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7325 return Some(expr1_0); 7326 } 7327 7328 // Generated as internal constructor for term fpuroundmode_nearest. 7329 pub fn constructor_fpuroundmode_nearest<C: Context>( 7330 ctx: &mut C, 7331 arg0: Type, 7332 ) -> Option<FpuRoundMode> { 7333 let pattern0_0 = arg0; 7334 if pattern0_0 == F32 { 7335 // Rule at src/isa/s390x/inst.isle line 3087. 7336 let expr0_0 = FpuRoundMode::Nearest32; 7337 return Some(expr0_0); 7338 } 7339 if pattern0_0 == F64 { 7340 // Rule at src/isa/s390x/inst.isle line 3088. 7341 let expr0_0 = FpuRoundMode::Nearest64; 7342 return Some(expr0_0); 7343 } 7344 return None; 7345 } 7346 7347 // Generated as internal constructor for term nearest_reg. 7348 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7349 let pattern0_0 = arg0; 7350 let pattern1_0 = arg1; 7351 // Rule at src/isa/s390x/inst.isle line 3091. 7352 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7353 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7354 return Some(expr1_0); 7355 } 7356 7357 // Generated as internal constructor for term fpuop1_promote. 7358 pub fn constructor_fpuop1_promote<C: Context>( 7359 ctx: &mut C, 7360 arg0: Type, 7361 arg1: Type, 7362 ) -> Option<FPUOp1> { 7363 let pattern0_0 = arg0; 7364 if pattern0_0 == F64 { 7365 let pattern2_0 = arg1; 7366 if pattern2_0 == F32 { 7367 // Rule at src/isa/s390x/inst.isle line 3097. 7368 let expr0_0 = FPUOp1::Cvt32To64; 7369 return Some(expr0_0); 7370 } 7371 } 7372 return None; 7373 } 7374 7375 // Generated as internal constructor for term fpromote_reg. 7376 pub fn constructor_fpromote_reg<C: Context>( 7377 ctx: &mut C, 7378 arg0: Type, 7379 arg1: Type, 7380 arg2: Reg, 7381 ) -> Option<Reg> { 7382 let pattern0_0 = arg0; 7383 let pattern1_0 = arg1; 7384 let pattern2_0 = arg2; 7385 // Rule at src/isa/s390x/inst.isle line 3100. 7386 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7387 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7388 return Some(expr1_0); 7389 } 7390 7391 // Generated as internal constructor for term fpuop1_demote. 7392 pub fn constructor_fpuop1_demote<C: Context>( 7393 ctx: &mut C, 7394 arg0: Type, 7395 arg1: Type, 7396 ) -> Option<FPUOp1> { 7397 let pattern0_0 = arg0; 7398 if pattern0_0 == F32 { 7399 let pattern2_0 = arg1; 7400 if pattern2_0 == F64 { 7401 // Rule at src/isa/s390x/inst.isle line 3107. 7402 let expr0_0 = FPUOp1::Cvt64To32; 7403 return Some(expr0_0); 7404 } 7405 } 7406 return None; 7407 } 7408 7409 // Generated as internal constructor for term fdemote_reg. 7410 pub fn constructor_fdemote_reg<C: Context>( 7411 ctx: &mut C, 7412 arg0: Type, 7413 arg1: Type, 7414 arg2: Reg, 7415 ) -> Option<Reg> { 7416 let pattern0_0 = arg0; 7417 let pattern1_0 = arg1; 7418 let pattern2_0 = arg2; 7419 // Rule at src/isa/s390x/inst.isle line 3110. 7420 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7421 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7422 return Some(expr1_0); 7423 } 7424 7425 // Generated as internal constructor for term uint_to_fpu_op. 7426 pub fn constructor_uint_to_fpu_op<C: Context>( 7427 ctx: &mut C, 7428 arg0: Type, 7429 arg1: Type, 7430 ) -> Option<IntToFpuOp> { 7431 let pattern0_0 = arg0; 7432 if pattern0_0 == F32 { 7433 let pattern2_0 = arg1; 7434 if pattern2_0 == I32 { 7435 // Rule at src/isa/s390x/inst.isle line 3117. 7436 let expr0_0 = IntToFpuOp::U32ToF32; 7437 return Some(expr0_0); 7438 } 7439 if pattern2_0 == I64 { 7440 // Rule at src/isa/s390x/inst.isle line 3119. 7441 let expr0_0 = IntToFpuOp::U64ToF32; 7442 return Some(expr0_0); 7443 } 7444 } 7445 if pattern0_0 == F64 { 7446 let pattern2_0 = arg1; 7447 if pattern2_0 == I32 { 7448 // Rule at src/isa/s390x/inst.isle line 3118. 7449 let expr0_0 = IntToFpuOp::U32ToF64; 7450 return Some(expr0_0); 7451 } 7452 if pattern2_0 == I64 { 7453 // Rule at src/isa/s390x/inst.isle line 3120. 7454 let expr0_0 = IntToFpuOp::U64ToF64; 7455 return Some(expr0_0); 7456 } 7457 } 7458 return None; 7459 } 7460 7461 // Generated as internal constructor for term fcvt_from_uint_reg. 7462 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7463 ctx: &mut C, 7464 arg0: Type, 7465 arg1: Type, 7466 arg2: Reg, 7467 ) -> Option<Reg> { 7468 let pattern0_0 = arg0; 7469 let pattern1_0 = arg1; 7470 let pattern2_0 = arg2; 7471 // Rule at src/isa/s390x/inst.isle line 3123. 7472 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7473 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7474 return Some(expr1_0); 7475 } 7476 7477 // Generated as internal constructor for term sint_to_fpu_op. 7478 pub fn constructor_sint_to_fpu_op<C: Context>( 7479 ctx: &mut C, 7480 arg0: Type, 7481 arg1: Type, 7482 ) -> Option<IntToFpuOp> { 7483 let pattern0_0 = arg0; 7484 if pattern0_0 == F32 { 7485 let pattern2_0 = arg1; 7486 if pattern2_0 == I32 { 7487 // Rule at src/isa/s390x/inst.isle line 3130. 7488 let expr0_0 = IntToFpuOp::I32ToF32; 7489 return Some(expr0_0); 7490 } 7491 if pattern2_0 == I64 { 7492 // Rule at src/isa/s390x/inst.isle line 3132. 7493 let expr0_0 = IntToFpuOp::I64ToF32; 7494 return Some(expr0_0); 7495 } 7496 } 7497 if pattern0_0 == F64 { 7498 let pattern2_0 = arg1; 7499 if pattern2_0 == I32 { 7500 // Rule at src/isa/s390x/inst.isle line 3131. 7501 let expr0_0 = IntToFpuOp::I32ToF64; 7502 return Some(expr0_0); 7503 } 7504 if pattern2_0 == I64 { 7505 // Rule at src/isa/s390x/inst.isle line 3133. 7506 let expr0_0 = IntToFpuOp::I64ToF64; 7507 return Some(expr0_0); 7508 } 7509 } 7510 return None; 7511 } 7512 7513 // Generated as internal constructor for term fcvt_from_sint_reg. 7514 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7515 ctx: &mut C, 7516 arg0: Type, 7517 arg1: Type, 7518 arg2: Reg, 7519 ) -> Option<Reg> { 7520 let pattern0_0 = arg0; 7521 let pattern1_0 = arg1; 7522 let pattern2_0 = arg2; 7523 // Rule at src/isa/s390x/inst.isle line 3136. 7524 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7525 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7526 return Some(expr1_0); 7527 } 7528 7529 // Generated as internal constructor for term fpu_to_uint_op. 7530 pub fn constructor_fpu_to_uint_op<C: Context>( 7531 ctx: &mut C, 7532 arg0: Type, 7533 arg1: Type, 7534 ) -> Option<FpuToIntOp> { 7535 let pattern0_0 = arg0; 7536 if pattern0_0 == I32 { 7537 let pattern2_0 = arg1; 7538 if pattern2_0 == F32 { 7539 // Rule at src/isa/s390x/inst.isle line 3143. 7540 let expr0_0 = FpuToIntOp::F32ToU32; 7541 return Some(expr0_0); 7542 } 7543 if pattern2_0 == F64 { 7544 // Rule at src/isa/s390x/inst.isle line 3144. 7545 let expr0_0 = FpuToIntOp::F64ToU32; 7546 return Some(expr0_0); 7547 } 7548 } 7549 if pattern0_0 == I64 { 7550 let pattern2_0 = arg1; 7551 if pattern2_0 == F32 { 7552 // Rule at src/isa/s390x/inst.isle line 3145. 7553 let expr0_0 = FpuToIntOp::F32ToU64; 7554 return Some(expr0_0); 7555 } 7556 if pattern2_0 == F64 { 7557 // Rule at src/isa/s390x/inst.isle line 3146. 7558 let expr0_0 = FpuToIntOp::F64ToU64; 7559 return Some(expr0_0); 7560 } 7561 } 7562 return None; 7563 } 7564 7565 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7566 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7567 ctx: &mut C, 7568 arg0: Type, 7569 arg1: Type, 7570 arg2: Reg, 7571 ) -> Option<ProducesFlags> { 7572 let pattern0_0 = arg0; 7573 let pattern1_0 = arg1; 7574 let pattern2_0 = arg2; 7575 // Rule at src/isa/s390x/inst.isle line 3149. 7576 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7577 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7578 return Some(expr1_0); 7579 } 7580 7581 // Generated as internal constructor for term fcvt_to_uint_reg. 7582 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7583 ctx: &mut C, 7584 arg0: Type, 7585 arg1: Type, 7586 arg2: Reg, 7587 ) -> Option<Reg> { 7588 let pattern0_0 = arg0; 7589 let pattern1_0 = arg1; 7590 let pattern2_0 = arg2; 7591 // Rule at src/isa/s390x/inst.isle line 3153. 7592 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7593 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7594 return Some(expr1_0); 7595 } 7596 7597 // Generated as internal constructor for term fpu_to_sint_op. 7598 pub fn constructor_fpu_to_sint_op<C: Context>( 7599 ctx: &mut C, 7600 arg0: Type, 7601 arg1: Type, 7602 ) -> Option<FpuToIntOp> { 7603 let pattern0_0 = arg0; 7604 if pattern0_0 == I32 { 7605 let pattern2_0 = arg1; 7606 if pattern2_0 == F32 { 7607 // Rule at src/isa/s390x/inst.isle line 3160. 7608 let expr0_0 = FpuToIntOp::F32ToI32; 7609 return Some(expr0_0); 7610 } 7611 if pattern2_0 == F64 { 7612 // Rule at src/isa/s390x/inst.isle line 3161. 7613 let expr0_0 = FpuToIntOp::F64ToI32; 7614 return Some(expr0_0); 7615 } 7616 } 7617 if pattern0_0 == I64 { 7618 let pattern2_0 = arg1; 7619 if pattern2_0 == F32 { 7620 // Rule at src/isa/s390x/inst.isle line 3162. 7621 let expr0_0 = FpuToIntOp::F32ToI64; 7622 return Some(expr0_0); 7623 } 7624 if pattern2_0 == F64 { 7625 // Rule at src/isa/s390x/inst.isle line 3163. 7626 let expr0_0 = FpuToIntOp::F64ToI64; 7627 return Some(expr0_0); 7628 } 7629 } 7630 return None; 7631 } 7632 7633 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7634 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7635 ctx: &mut C, 7636 arg0: Type, 7637 arg1: Type, 7638 arg2: Reg, 7639 ) -> Option<ProducesFlags> { 7640 let pattern0_0 = arg0; 7641 let pattern1_0 = arg1; 7642 let pattern2_0 = arg2; 7643 // Rule at src/isa/s390x/inst.isle line 3166. 7644 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7645 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7646 return Some(expr1_0); 7647 } 7648 7649 // Generated as internal constructor for term fcvt_to_sint_reg. 7650 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7651 ctx: &mut C, 7652 arg0: Type, 7653 arg1: Type, 7654 arg2: Reg, 7655 ) -> Option<Reg> { 7656 let pattern0_0 = arg0; 7657 let pattern1_0 = arg1; 7658 let pattern2_0 = arg2; 7659 // Rule at src/isa/s390x/inst.isle line 3170. 7660 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7661 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7662 return Some(expr1_0); 7663 } 7664 7665 // Generated as internal constructor for term cmpop_cmps. 7666 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7667 let pattern0_0 = arg0; 7668 if pattern0_0 == I32 { 7669 // Rule at src/isa/s390x/inst.isle line 3177. 7670 let expr0_0 = CmpOp::CmpS32; 7671 return Some(expr0_0); 7672 } 7673 if pattern0_0 == I64 { 7674 // Rule at src/isa/s390x/inst.isle line 3178. 7675 let expr0_0 = CmpOp::CmpS64; 7676 return Some(expr0_0); 7677 } 7678 return None; 7679 } 7680 7681 // Generated as internal constructor for term cmpop_cmps_sext16. 7682 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7683 let pattern0_0 = arg0; 7684 if pattern0_0 == I32 { 7685 // Rule at src/isa/s390x/inst.isle line 3181. 7686 let expr0_0 = CmpOp::CmpS32Ext16; 7687 return Some(expr0_0); 7688 } 7689 if pattern0_0 == I64 { 7690 // Rule at src/isa/s390x/inst.isle line 3182. 7691 let expr0_0 = CmpOp::CmpS64Ext16; 7692 return Some(expr0_0); 7693 } 7694 return None; 7695 } 7696 7697 // Generated as internal constructor for term cmpop_cmps_sext32. 7698 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7699 let pattern0_0 = arg0; 7700 if pattern0_0 == I64 { 7701 // Rule at src/isa/s390x/inst.isle line 3185. 7702 let expr0_0 = CmpOp::CmpS64Ext32; 7703 return Some(expr0_0); 7704 } 7705 return None; 7706 } 7707 7708 // Generated as internal constructor for term icmps_reg. 7709 pub fn constructor_icmps_reg<C: Context>( 7710 ctx: &mut C, 7711 arg0: Type, 7712 arg1: Reg, 7713 arg2: Reg, 7714 ) -> Option<ProducesFlags> { 7715 let pattern0_0 = arg0; 7716 let pattern1_0 = arg1; 7717 let pattern2_0 = arg2; 7718 // Rule at src/isa/s390x/inst.isle line 3188. 7719 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7720 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7721 return Some(expr1_0); 7722 } 7723 7724 // Generated as internal constructor for term icmps_reg_sext32. 7725 pub fn constructor_icmps_reg_sext32<C: Context>( 7726 ctx: &mut C, 7727 arg0: Type, 7728 arg1: Reg, 7729 arg2: Reg, 7730 ) -> Option<ProducesFlags> { 7731 let pattern0_0 = arg0; 7732 let pattern1_0 = arg1; 7733 let pattern2_0 = arg2; 7734 // Rule at src/isa/s390x/inst.isle line 3191. 7735 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7736 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7737 return Some(expr1_0); 7738 } 7739 7740 // Generated as internal constructor for term icmps_simm16. 7741 pub fn constructor_icmps_simm16<C: Context>( 7742 ctx: &mut C, 7743 arg0: Type, 7744 arg1: Reg, 7745 arg2: i16, 7746 ) -> Option<ProducesFlags> { 7747 let pattern0_0 = arg0; 7748 let pattern1_0 = arg1; 7749 let pattern2_0 = arg2; 7750 // Rule at src/isa/s390x/inst.isle line 3194. 7751 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7752 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7753 return Some(expr1_0); 7754 } 7755 7756 // Generated as internal constructor for term icmps_simm32. 7757 pub fn constructor_icmps_simm32<C: Context>( 7758 ctx: &mut C, 7759 arg0: Type, 7760 arg1: Reg, 7761 arg2: i32, 7762 ) -> Option<ProducesFlags> { 7763 let pattern0_0 = arg0; 7764 let pattern1_0 = arg1; 7765 let pattern2_0 = arg2; 7766 // Rule at src/isa/s390x/inst.isle line 3197. 7767 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7768 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7769 return Some(expr1_0); 7770 } 7771 7772 // Generated as internal constructor for term icmps_mem. 7773 pub fn constructor_icmps_mem<C: Context>( 7774 ctx: &mut C, 7775 arg0: Type, 7776 arg1: Reg, 7777 arg2: &MemArg, 7778 ) -> Option<ProducesFlags> { 7779 let pattern0_0 = arg0; 7780 let pattern1_0 = arg1; 7781 let pattern2_0 = arg2; 7782 // Rule at src/isa/s390x/inst.isle line 3200. 7783 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7784 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7785 return Some(expr1_0); 7786 } 7787 7788 // Generated as internal constructor for term icmps_mem_sext16. 7789 pub fn constructor_icmps_mem_sext16<C: Context>( 7790 ctx: &mut C, 7791 arg0: Type, 7792 arg1: Reg, 7793 arg2: &MemArg, 7794 ) -> Option<ProducesFlags> { 7795 let pattern0_0 = arg0; 7796 let pattern1_0 = arg1; 7797 let pattern2_0 = arg2; 7798 // Rule at src/isa/s390x/inst.isle line 3203. 7799 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7800 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7801 return Some(expr1_0); 7802 } 7803 7804 // Generated as internal constructor for term icmps_mem_sext32. 7805 pub fn constructor_icmps_mem_sext32<C: Context>( 7806 ctx: &mut C, 7807 arg0: Type, 7808 arg1: Reg, 7809 arg2: &MemArg, 7810 ) -> Option<ProducesFlags> { 7811 let pattern0_0 = arg0; 7812 let pattern1_0 = arg1; 7813 let pattern2_0 = arg2; 7814 // Rule at src/isa/s390x/inst.isle line 3206. 7815 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7816 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7817 return Some(expr1_0); 7818 } 7819 7820 // Generated as internal constructor for term cmpop_cmpu. 7821 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7822 let pattern0_0 = arg0; 7823 if pattern0_0 == I32 { 7824 // Rule at src/isa/s390x/inst.isle line 3212. 7825 let expr0_0 = CmpOp::CmpL32; 7826 return Some(expr0_0); 7827 } 7828 if pattern0_0 == I64 { 7829 // Rule at src/isa/s390x/inst.isle line 3213. 7830 let expr0_0 = CmpOp::CmpL64; 7831 return Some(expr0_0); 7832 } 7833 return None; 7834 } 7835 7836 // Generated as internal constructor for term cmpop_cmpu_zext16. 7837 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7838 let pattern0_0 = arg0; 7839 if pattern0_0 == I32 { 7840 // Rule at src/isa/s390x/inst.isle line 3216. 7841 let expr0_0 = CmpOp::CmpL32Ext16; 7842 return Some(expr0_0); 7843 } 7844 if pattern0_0 == I64 { 7845 // Rule at src/isa/s390x/inst.isle line 3217. 7846 let expr0_0 = CmpOp::CmpL64Ext16; 7847 return Some(expr0_0); 7848 } 7849 return None; 7850 } 7851 7852 // Generated as internal constructor for term cmpop_cmpu_zext32. 7853 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7854 let pattern0_0 = arg0; 7855 if pattern0_0 == I64 { 7856 // Rule at src/isa/s390x/inst.isle line 3220. 7857 let expr0_0 = CmpOp::CmpL64Ext32; 7858 return Some(expr0_0); 7859 } 7860 return None; 7861 } 7862 7863 // Generated as internal constructor for term icmpu_reg. 7864 pub fn constructor_icmpu_reg<C: Context>( 7865 ctx: &mut C, 7866 arg0: Type, 7867 arg1: Reg, 7868 arg2: Reg, 7869 ) -> Option<ProducesFlags> { 7870 let pattern0_0 = arg0; 7871 let pattern1_0 = arg1; 7872 let pattern2_0 = arg2; 7873 // Rule at src/isa/s390x/inst.isle line 3223. 7874 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7875 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7876 return Some(expr1_0); 7877 } 7878 7879 // Generated as internal constructor for term icmpu_reg_zext32. 7880 pub fn constructor_icmpu_reg_zext32<C: Context>( 7881 ctx: &mut C, 7882 arg0: Type, 7883 arg1: Reg, 7884 arg2: Reg, 7885 ) -> Option<ProducesFlags> { 7886 let pattern0_0 = arg0; 7887 let pattern1_0 = arg1; 7888 let pattern2_0 = arg2; 7889 // Rule at src/isa/s390x/inst.isle line 3226. 7890 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7891 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7892 return Some(expr1_0); 7893 } 7894 7895 // Generated as internal constructor for term icmpu_uimm32. 7896 pub fn constructor_icmpu_uimm32<C: Context>( 7897 ctx: &mut C, 7898 arg0: Type, 7899 arg1: Reg, 7900 arg2: u32, 7901 ) -> Option<ProducesFlags> { 7902 let pattern0_0 = arg0; 7903 let pattern1_0 = arg1; 7904 let pattern2_0 = arg2; 7905 // Rule at src/isa/s390x/inst.isle line 3229. 7906 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7907 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7908 return Some(expr1_0); 7909 } 7910 7911 // Generated as internal constructor for term icmpu_mem. 7912 pub fn constructor_icmpu_mem<C: Context>( 7913 ctx: &mut C, 7914 arg0: Type, 7915 arg1: Reg, 7916 arg2: &MemArg, 7917 ) -> Option<ProducesFlags> { 7918 let pattern0_0 = arg0; 7919 let pattern1_0 = arg1; 7920 let pattern2_0 = arg2; 7921 // Rule at src/isa/s390x/inst.isle line 3232. 7922 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7923 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7924 return Some(expr1_0); 7925 } 7926 7927 // Generated as internal constructor for term icmpu_mem_zext16. 7928 pub fn constructor_icmpu_mem_zext16<C: Context>( 7929 ctx: &mut C, 7930 arg0: Type, 7931 arg1: Reg, 7932 arg2: &MemArg, 7933 ) -> Option<ProducesFlags> { 7934 let pattern0_0 = arg0; 7935 let pattern1_0 = arg1; 7936 let pattern2_0 = arg2; 7937 // Rule at src/isa/s390x/inst.isle line 3235. 7938 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7939 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7940 return Some(expr1_0); 7941 } 7942 7943 // Generated as internal constructor for term icmpu_mem_zext32. 7944 pub fn constructor_icmpu_mem_zext32<C: Context>( 7945 ctx: &mut C, 7946 arg0: Type, 7947 arg1: Reg, 7948 arg2: &MemArg, 7949 ) -> Option<ProducesFlags> { 7950 let pattern0_0 = arg0; 7951 let pattern1_0 = arg1; 7952 let pattern2_0 = arg2; 7953 // Rule at src/isa/s390x/inst.isle line 3238. 7954 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7955 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7956 return Some(expr1_0); 7957 } 7958 7959 // Generated as internal constructor for term fcmp_reg. 7960 pub fn constructor_fcmp_reg<C: Context>( 7961 ctx: &mut C, 7962 arg0: Type, 7963 arg1: Reg, 7964 arg2: Reg, 7965 ) -> Option<ProducesFlags> { 7966 let pattern0_0 = arg0; 7967 if pattern0_0 == F32 { 7968 let pattern2_0 = arg1; 7969 let pattern3_0 = arg2; 7970 // Rule at src/isa/s390x/inst.isle line 3244. 7971 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7972 return Some(expr0_0); 7973 } 7974 if pattern0_0 == F64 { 7975 let pattern2_0 = arg1; 7976 let pattern3_0 = arg2; 7977 // Rule at src/isa/s390x/inst.isle line 3245. 7978 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7979 return Some(expr0_0); 7980 } 7981 return None; 7982 } 7983 7984 // Generated as internal constructor for term lower. 7985 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7986 let pattern0_0 = arg0; 7987 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7988 match &pattern1_0 { 7989 &InstructionData::NullAry { 7990 opcode: ref pattern2_0, 7991 } => { 7992 match pattern2_0 { 7993 &Opcode::Debugtrap => { 7994 // Rule at src/isa/s390x/lower.isle line 2169. 7995 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7996 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7997 return Some(expr1_0); 7998 } 7999 &Opcode::Nop => { 8000 // Rule at src/isa/s390x/lower.isle line 47. 8001 let expr0_0 = C::invalid_reg(ctx); 8002 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8003 return Some(expr1_0); 8004 } 8005 &Opcode::Fence => { 8006 // Rule at src/isa/s390x/lower.isle line 1882. 8007 let expr0_0 = constructor_fence_impl(ctx)?; 8008 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8009 return Some(expr1_0); 8010 } 8011 _ => {} 8012 } 8013 } 8014 &InstructionData::FuncAddr { 8015 opcode: ref pattern2_0, 8016 func_ref: pattern2_1, 8017 } => { 8018 if let &Opcode::FuncAddr = pattern2_0 { 8019 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8020 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8021 // Rule at src/isa/s390x/lower.isle line 1159. 8022 let expr0_0: i32 = 0; 8023 let expr1_0 = C::memflags_trusted(ctx); 8024 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8025 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8026 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8027 return Some(expr4_0); 8028 } 8029 // Rule at src/isa/s390x/lower.isle line 1163. 8030 let expr0_0: i64 = 0; 8031 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8032 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8033 return Some(expr2_0); 8034 } 8035 } 8036 &InstructionData::UnaryGlobalValue { 8037 opcode: ref pattern2_0, 8038 global_value: pattern2_1, 8039 } => { 8040 if let &Opcode::SymbolValue = pattern2_0 { 8041 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8042 C::symbol_value_data(ctx, pattern2_1) 8043 { 8044 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8045 let pattern6_0 = 0; 8046 if let Some(pattern7_0) = 8047 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8048 { 8049 // Rule at src/isa/s390x/lower.isle line 1170. 8050 let expr0_0 = C::memflags_trusted(ctx); 8051 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8052 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8053 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8054 return Some(expr3_0); 8055 } 8056 } 8057 // Rule at src/isa/s390x/lower.isle line 1175. 8058 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8059 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8060 return Some(expr1_0); 8061 } 8062 } 8063 } 8064 &InstructionData::UnaryIeee32 { 8065 opcode: ref pattern2_0, 8066 imm: pattern2_1, 8067 } => { 8068 if let &Opcode::F32const = pattern2_0 { 8069 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8070 // Rule at src/isa/s390x/lower.isle line 29. 8071 let expr0_0: Type = F32; 8072 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8073 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8074 return Some(expr2_0); 8075 } 8076 } 8077 &InstructionData::UnaryIeee64 { 8078 opcode: ref pattern2_0, 8079 imm: pattern2_1, 8080 } => { 8081 if let &Opcode::F64const = pattern2_0 { 8082 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8083 // Rule at src/isa/s390x/lower.isle line 35. 8084 let expr0_0: Type = F64; 8085 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8086 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8087 return Some(expr2_0); 8088 } 8089 } 8090 &InstructionData::Trap { 8091 opcode: ref pattern2_0, 8092 code: ref pattern2_1, 8093 } => { 8094 match pattern2_0 { 8095 &Opcode::Trap => { 8096 // Rule at src/isa/s390x/lower.isle line 2139. 8097 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8098 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8099 return Some(expr1_0); 8100 } 8101 &Opcode::ResumableTrap => { 8102 // Rule at src/isa/s390x/lower.isle line 2145. 8103 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8104 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8105 return Some(expr1_0); 8106 } 8107 _ => {} 8108 } 8109 } 8110 &InstructionData::StoreNoOffset { 8111 opcode: ref pattern2_0, 8112 args: ref pattern2_1, 8113 flags: pattern2_2, 8114 } => { 8115 if let &Opcode::AtomicStore = pattern2_0 { 8116 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8117 let pattern5_0 = C::value_type(ctx, pattern4_0); 8118 if pattern5_0 == I8 { 8119 // Rule at src/isa/s390x/lower.isle line 1863. 8120 let expr0_0 = C::zero_offset(ctx); 8121 let expr1_0 = 8122 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8123 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8124 return Some(expr2_0); 8125 } 8126 if pattern5_0 == I16 { 8127 // Rule at src/isa/s390x/lower.isle line 1867. 8128 let expr0_0 = C::zero_offset(ctx); 8129 let expr1_0 = constructor_istore16_impl( 8130 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8131 )?; 8132 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8133 return Some(expr2_0); 8134 } 8135 if pattern5_0 == I32 { 8136 // Rule at src/isa/s390x/lower.isle line 1871. 8137 let expr0_0 = C::zero_offset(ctx); 8138 let expr1_0 = constructor_istore32_impl( 8139 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8140 )?; 8141 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8142 return Some(expr2_0); 8143 } 8144 if pattern5_0 == I64 { 8145 // Rule at src/isa/s390x/lower.isle line 1875. 8146 let expr0_0 = C::zero_offset(ctx); 8147 let expr1_0 = constructor_istore64_impl( 8148 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8149 )?; 8150 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8151 return Some(expr2_0); 8152 } 8153 } 8154 } 8155 &InstructionData::Store { 8156 opcode: ref pattern2_0, 8157 args: ref pattern2_1, 8158 flags: pattern2_2, 8159 offset: pattern2_3, 8160 } => { 8161 match pattern2_0 { 8162 &Opcode::Store => { 8163 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8164 let pattern5_0 = C::value_type(ctx, pattern4_0); 8165 if pattern5_0 == I8 { 8166 // Rule at src/isa/s390x/lower.isle line 1354. 8167 let expr0_0 = constructor_istore8_impl( 8168 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8169 )?; 8170 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8171 return Some(expr1_0); 8172 } 8173 if pattern5_0 == I16 { 8174 // Rule at src/isa/s390x/lower.isle line 1358. 8175 let expr0_0 = constructor_istore16_impl( 8176 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8177 )?; 8178 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8179 return Some(expr1_0); 8180 } 8181 if pattern5_0 == I32 { 8182 // Rule at src/isa/s390x/lower.isle line 1362. 8183 let expr0_0 = constructor_istore32_impl( 8184 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8185 )?; 8186 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8187 return Some(expr1_0); 8188 } 8189 if pattern5_0 == I64 { 8190 // Rule at src/isa/s390x/lower.isle line 1366. 8191 let expr0_0 = constructor_istore64_impl( 8192 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8193 )?; 8194 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8195 return Some(expr1_0); 8196 } 8197 if pattern5_0 == R64 { 8198 // Rule at src/isa/s390x/lower.isle line 1370. 8199 let expr0_0 = constructor_istore64_impl( 8200 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8201 )?; 8202 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8203 return Some(expr1_0); 8204 } 8205 if pattern5_0 == F32 { 8206 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8207 // Rule at src/isa/s390x/lower.isle line 1374. 8208 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8209 let expr1_0 = 8210 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8211 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8212 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8213 return Some(expr3_0); 8214 } 8215 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8216 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8217 // Rule at src/isa/s390x/lower.isle line 1380. 8218 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8219 let expr1_0 = constructor_lower_address( 8220 ctx, pattern2_2, pattern4_1, pattern2_3, 8221 )?; 8222 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8223 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8224 return Some(expr3_0); 8225 } 8226 } 8227 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8228 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8229 // Rule at src/isa/s390x/lower.isle line 1386. 8230 let expr0_0: Type = I64; 8231 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8232 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8233 let expr3_0: u8 = 32; 8234 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8235 let expr5_0 = constructor_lower_address( 8236 ctx, pattern2_2, pattern4_1, pattern2_3, 8237 )?; 8238 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8239 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8240 return Some(expr7_0); 8241 } 8242 } 8243 } 8244 if pattern5_0 == F64 { 8245 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8246 // Rule at src/isa/s390x/lower.isle line 1392. 8247 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8248 let expr1_0 = 8249 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8250 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8251 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8252 return Some(expr3_0); 8253 } 8254 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8255 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8256 // Rule at src/isa/s390x/lower.isle line 1398. 8257 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8258 let expr1_0 = constructor_lower_address( 8259 ctx, pattern2_2, pattern4_1, pattern2_3, 8260 )?; 8261 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8262 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8263 return Some(expr3_0); 8264 } 8265 } 8266 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8267 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8268 // Rule at src/isa/s390x/lower.isle line 1404. 8269 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8270 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8271 let expr2_0 = constructor_lower_address( 8272 ctx, pattern2_2, pattern4_1, pattern2_3, 8273 )?; 8274 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8275 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8276 return Some(expr4_0); 8277 } 8278 } 8279 } 8280 } 8281 &Opcode::Istore8 => { 8282 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8283 // Rule at src/isa/s390x/lower.isle line 1413. 8284 let expr0_0 = constructor_istore8_impl( 8285 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8286 )?; 8287 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8288 return Some(expr1_0); 8289 } 8290 &Opcode::Istore16 => { 8291 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8292 // Rule at src/isa/s390x/lower.isle line 1431. 8293 let expr0_0 = constructor_istore16_impl( 8294 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8295 )?; 8296 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8297 return Some(expr1_0); 8298 } 8299 &Opcode::Istore32 => { 8300 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8301 // Rule at src/isa/s390x/lower.isle line 1457. 8302 let expr0_0 = constructor_istore32_impl( 8303 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8304 )?; 8305 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8306 return Some(expr1_0); 8307 } 8308 _ => {} 8309 } 8310 } 8311 &InstructionData::Unary { 8312 opcode: ref pattern2_0, 8313 arg: pattern2_1, 8314 } => { 8315 match pattern2_0 { 8316 &Opcode::Copy => { 8317 // Rule at src/isa/s390x/lower.isle line 53. 8318 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8319 return Some(expr0_0); 8320 } 8321 &Opcode::Breduce => { 8322 // Rule at src/isa/s390x/lower.isle line 752. 8323 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8324 return Some(expr0_0); 8325 } 8326 &Opcode::Ireduce => { 8327 // Rule at src/isa/s390x/lower.isle line 596. 8328 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8329 return Some(expr0_0); 8330 } 8331 _ => {} 8332 } 8333 } 8334 &InstructionData::IntCondTrap { 8335 opcode: ref pattern2_0, 8336 arg: pattern2_1, 8337 cond: ref pattern2_2, 8338 code: ref pattern2_3, 8339 } => { 8340 if let &Opcode::Trapif = pattern2_0 { 8341 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8342 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8343 if let &InstructionData::Binary { 8344 opcode: ref pattern6_0, 8345 args: ref pattern6_1, 8346 } = &pattern5_0 8347 { 8348 match pattern6_0 { 8349 &Opcode::Ifcmp => { 8350 let (pattern8_0, pattern8_1) = 8351 C::unpack_value_array_2(ctx, pattern6_1); 8352 // Rule at src/isa/s390x/lower.isle line 2181. 8353 let expr0_0: bool = false; 8354 let expr1_0 = constructor_icmp_val( 8355 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8356 )?; 8357 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8358 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8359 return Some(expr3_0); 8360 } 8361 &Opcode::IaddIfcout => { 8362 let (pattern8_0, pattern8_1) = 8363 C::unpack_value_array_2(ctx, pattern6_1); 8364 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8365 // Rule at src/isa/s390x/lower.isle line 2206. 8366 let expr0_0: u8 = 3; 8367 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8368 let expr2_0 = 8369 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8370 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8371 return Some(expr3_0); 8372 } 8373 } 8374 _ => {} 8375 } 8376 } 8377 } 8378 } 8379 } 8380 &InstructionData::CondTrap { 8381 opcode: ref pattern2_0, 8382 arg: pattern2_1, 8383 code: ref pattern2_2, 8384 } => { 8385 match pattern2_0 { 8386 &Opcode::Trapz => { 8387 // Rule at src/isa/s390x/lower.isle line 2151. 8388 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8389 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8390 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8391 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8392 return Some(expr3_0); 8393 } 8394 &Opcode::Trapnz => { 8395 // Rule at src/isa/s390x/lower.isle line 2157. 8396 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8397 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8398 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8399 return Some(expr2_0); 8400 } 8401 &Opcode::ResumableTrapnz => { 8402 // Rule at src/isa/s390x/lower.isle line 2163. 8403 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8404 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8405 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8406 return Some(expr2_0); 8407 } 8408 _ => {} 8409 } 8410 } 8411 _ => {} 8412 } 8413 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8414 let pattern2_0 = C::value_type(ctx, pattern1_0); 8415 if pattern2_0 == B1 { 8416 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8417 if let &InstructionData::Unary { 8418 opcode: ref pattern5_0, 8419 arg: pattern5_1, 8420 } = &pattern4_0 8421 { 8422 match pattern5_0 { 8423 &Opcode::IsNull => { 8424 let pattern7_0 = C::value_type(ctx, pattern5_1); 8425 if pattern7_0 == R64 { 8426 // Rule at src/isa/s390x/lower.isle line 2017. 8427 let expr0_0: Type = B1; 8428 let expr1_0: Type = I64; 8429 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8430 let expr3_0: i16 = 0; 8431 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8432 let expr5_0 = IntCC::Equal; 8433 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8434 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8435 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8436 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8437 return Some(expr9_0); 8438 } 8439 } 8440 &Opcode::IsInvalid => { 8441 let pattern7_0 = C::value_type(ctx, pattern5_1); 8442 if pattern7_0 == R64 { 8443 // Rule at src/isa/s390x/lower.isle line 2023. 8444 let expr0_0: Type = B1; 8445 let expr1_0: Type = I64; 8446 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8447 let expr3_0: i16 = -1; 8448 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8449 let expr5_0 = IntCC::Equal; 8450 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8451 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8452 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8453 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8454 return Some(expr9_0); 8455 } 8456 } 8457 _ => {} 8458 } 8459 } 8460 } 8461 if pattern2_0 == I8 { 8462 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8463 match &pattern4_0 { 8464 &InstructionData::Unary { 8465 opcode: ref pattern5_0, 8466 arg: pattern5_1, 8467 } => { 8468 if let &Opcode::Popcnt = pattern5_0 { 8469 // Rule at src/isa/s390x/lower.isle line 884. 8470 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8471 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8472 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8473 return Some(expr2_0); 8474 } 8475 } 8476 &InstructionData::LoadNoOffset { 8477 opcode: ref pattern5_0, 8478 arg: pattern5_1, 8479 flags: pattern5_2, 8480 } => { 8481 if let &Opcode::AtomicLoad = pattern5_0 { 8482 // Rule at src/isa/s390x/lower.isle line 1826. 8483 let expr0_0: Type = I8; 8484 let expr1_0 = C::zero_offset(ctx); 8485 let expr2_0 = 8486 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8487 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8488 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8489 return Some(expr4_0); 8490 } 8491 } 8492 &InstructionData::Load { 8493 opcode: ref pattern5_0, 8494 arg: pattern5_1, 8495 flags: pattern5_2, 8496 offset: pattern5_3, 8497 } => { 8498 if let &Opcode::Load = pattern5_0 { 8499 // Rule at src/isa/s390x/lower.isle line 1182. 8500 let expr0_0: Type = I8; 8501 let expr1_0 = 8502 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8503 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8504 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8505 return Some(expr3_0); 8506 } 8507 } 8508 _ => {} 8509 } 8510 } 8511 if pattern2_0 == I16 { 8512 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8513 match &pattern4_0 { 8514 &InstructionData::LoadNoOffset { 8515 opcode: ref pattern5_0, 8516 arg: pattern5_1, 8517 flags: pattern5_2, 8518 } => { 8519 if let &Opcode::AtomicLoad = pattern5_0 { 8520 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8521 // Rule at src/isa/s390x/lower.isle line 1834. 8522 let expr0_0 = C::zero_offset(ctx); 8523 let expr1_0 = 8524 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8525 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8526 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8527 return Some(expr3_0); 8528 } 8529 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8530 // Rule at src/isa/s390x/lower.isle line 1830. 8531 let expr0_0: Type = I16; 8532 let expr1_0 = C::zero_offset(ctx); 8533 let expr2_0 = 8534 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8535 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8536 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8537 return Some(expr4_0); 8538 } 8539 } 8540 } 8541 &InstructionData::Load { 8542 opcode: ref pattern5_0, 8543 arg: pattern5_1, 8544 flags: pattern5_2, 8545 offset: pattern5_3, 8546 } => { 8547 if let &Opcode::Load = pattern5_0 { 8548 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8549 // Rule at src/isa/s390x/lower.isle line 1190. 8550 let expr0_0 = 8551 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8552 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8553 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8554 return Some(expr2_0); 8555 } 8556 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8557 // Rule at src/isa/s390x/lower.isle line 1186. 8558 let expr0_0: Type = I16; 8559 let expr1_0 = 8560 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8561 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8562 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8563 return Some(expr3_0); 8564 } 8565 } 8566 } 8567 _ => {} 8568 } 8569 } 8570 if pattern2_0 == I32 { 8571 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8572 match &pattern4_0 { 8573 &InstructionData::Binary { 8574 opcode: ref pattern5_0, 8575 args: ref pattern5_1, 8576 } => { 8577 match pattern5_0 { 8578 &Opcode::Umulhi => { 8579 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8580 // Rule at src/isa/s390x/lower.isle line 252. 8581 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8582 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8583 let expr2_0: Type = I64; 8584 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8585 let expr4_0: Type = I64; 8586 let expr5_0: u8 = 32; 8587 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8588 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8589 return Some(expr7_0); 8590 } 8591 &Opcode::Smulhi => { 8592 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8593 // Rule at src/isa/s390x/lower.isle line 274. 8594 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8595 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8596 let expr2_0: Type = I64; 8597 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8598 let expr4_0: Type = I64; 8599 let expr5_0: u8 = 32; 8600 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8601 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8602 return Some(expr7_0); 8603 } 8604 _ => {} 8605 } 8606 } 8607 &InstructionData::Unary { 8608 opcode: ref pattern5_0, 8609 arg: pattern5_1, 8610 } => { 8611 if let &Opcode::Bitcast = pattern5_0 { 8612 let pattern7_0 = C::value_type(ctx, pattern5_1); 8613 if pattern7_0 == F32 { 8614 // Rule at src/isa/s390x/lower.isle line 1145. 8615 let expr0_0: Type = I64; 8616 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8617 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8618 let expr3_0: u8 = 32; 8619 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8620 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8621 return Some(expr5_0); 8622 } 8623 } 8624 } 8625 &InstructionData::LoadNoOffset { 8626 opcode: ref pattern5_0, 8627 arg: pattern5_1, 8628 flags: pattern5_2, 8629 } => { 8630 if let &Opcode::AtomicLoad = pattern5_0 { 8631 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8632 // Rule at src/isa/s390x/lower.isle line 1842. 8633 let expr0_0 = C::zero_offset(ctx); 8634 let expr1_0 = 8635 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8636 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8637 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8638 return Some(expr3_0); 8639 } 8640 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8641 // Rule at src/isa/s390x/lower.isle line 1838. 8642 let expr0_0 = C::zero_offset(ctx); 8643 let expr1_0 = 8644 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8645 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8646 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8647 return Some(expr3_0); 8648 } 8649 } 8650 } 8651 &InstructionData::Load { 8652 opcode: ref pattern5_0, 8653 arg: pattern5_1, 8654 flags: pattern5_2, 8655 offset: pattern5_3, 8656 } => { 8657 if let &Opcode::Load = pattern5_0 { 8658 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8659 // Rule at src/isa/s390x/lower.isle line 1198. 8660 let expr0_0 = 8661 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8662 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8663 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8664 return Some(expr2_0); 8665 } 8666 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8667 // Rule at src/isa/s390x/lower.isle line 1194. 8668 let expr0_0 = 8669 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8670 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8671 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8672 return Some(expr2_0); 8673 } 8674 } 8675 } 8676 _ => {} 8677 } 8678 } 8679 if pattern2_0 == I64 { 8680 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8681 match &pattern4_0 { 8682 &InstructionData::Binary { 8683 opcode: ref pattern5_0, 8684 args: ref pattern5_1, 8685 } => { 8686 match pattern5_0 { 8687 &Opcode::Umulhi => { 8688 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8689 // Rule at src/isa/s390x/lower.isle line 259. 8690 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8691 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8692 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8693 let expr3_0: Type = I64; 8694 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8695 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8696 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8697 return Some(expr6_0); 8698 } 8699 &Opcode::Smulhi => { 8700 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8701 // Rule at src/isa/s390x/lower.isle line 281. 8702 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8703 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8704 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8705 let expr3_0: Type = I64; 8706 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8707 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8708 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8709 return Some(expr6_0); 8710 } 8711 _ => {} 8712 } 8713 } 8714 &InstructionData::Unary { 8715 opcode: ref pattern5_0, 8716 arg: pattern5_1, 8717 } => { 8718 if let &Opcode::Bitcast = pattern5_0 { 8719 let pattern7_0 = C::value_type(ctx, pattern5_1); 8720 if pattern7_0 == F64 { 8721 // Rule at src/isa/s390x/lower.isle line 1135. 8722 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8723 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8724 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8725 return Some(expr2_0); 8726 } 8727 } 8728 } 8729 &InstructionData::LoadNoOffset { 8730 opcode: ref pattern5_0, 8731 arg: pattern5_1, 8732 flags: pattern5_2, 8733 } => { 8734 if let &Opcode::AtomicLoad = pattern5_0 { 8735 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8736 // Rule at src/isa/s390x/lower.isle line 1850. 8737 let expr0_0 = C::zero_offset(ctx); 8738 let expr1_0 = 8739 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8740 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8741 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8742 return Some(expr3_0); 8743 } 8744 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8745 // Rule at src/isa/s390x/lower.isle line 1846. 8746 let expr0_0 = C::zero_offset(ctx); 8747 let expr1_0 = 8748 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8749 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8750 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8751 return Some(expr3_0); 8752 } 8753 } 8754 } 8755 &InstructionData::Load { 8756 opcode: ref pattern5_0, 8757 arg: pattern5_1, 8758 flags: pattern5_2, 8759 offset: pattern5_3, 8760 } => { 8761 if let &Opcode::Load = pattern5_0 { 8762 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8763 // Rule at src/isa/s390x/lower.isle line 1206. 8764 let expr0_0 = 8765 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8766 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8767 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8768 return Some(expr2_0); 8769 } 8770 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8771 // Rule at src/isa/s390x/lower.isle line 1202. 8772 let expr0_0 = 8773 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8774 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8775 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8776 return Some(expr2_0); 8777 } 8778 } 8779 } 8780 _ => {} 8781 } 8782 } 8783 if pattern2_0 == R64 { 8784 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8785 if let &InstructionData::Load { 8786 opcode: ref pattern5_0, 8787 arg: pattern5_1, 8788 flags: pattern5_2, 8789 offset: pattern5_3, 8790 } = &pattern4_0 8791 { 8792 if let &Opcode::Load = pattern5_0 { 8793 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8794 // Rule at src/isa/s390x/lower.isle line 1214. 8795 let expr0_0 = 8796 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8797 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8798 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8799 return Some(expr2_0); 8800 } 8801 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8802 // Rule at src/isa/s390x/lower.isle line 1210. 8803 let expr0_0 = 8804 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8805 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8806 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8807 return Some(expr2_0); 8808 } 8809 } 8810 } 8811 } 8812 if pattern2_0 == F32 { 8813 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8814 match &pattern4_0 { 8815 &InstructionData::Unary { 8816 opcode: ref pattern5_0, 8817 arg: pattern5_1, 8818 } => { 8819 if let &Opcode::Bitcast = pattern5_0 { 8820 let pattern7_0 = C::value_type(ctx, pattern5_1); 8821 if pattern7_0 == I32 { 8822 // Rule at src/isa/s390x/lower.isle line 1140. 8823 let expr0_0: Type = I64; 8824 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8825 let expr2_0: u8 = 32; 8826 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8827 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8828 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8829 return Some(expr5_0); 8830 } 8831 } 8832 } 8833 &InstructionData::Load { 8834 opcode: ref pattern5_0, 8835 arg: pattern5_1, 8836 flags: pattern5_2, 8837 offset: pattern5_3, 8838 } => { 8839 if let &Opcode::Load = pattern5_0 { 8840 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8841 // Rule at src/isa/s390x/lower.isle line 1218. 8842 let expr0_0 = 8843 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8844 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8845 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8846 return Some(expr2_0); 8847 } 8848 } 8849 } 8850 _ => {} 8851 } 8852 } 8853 if pattern2_0 == F64 { 8854 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8855 match &pattern4_0 { 8856 &InstructionData::Unary { 8857 opcode: ref pattern5_0, 8858 arg: pattern5_1, 8859 } => { 8860 if let &Opcode::Bitcast = pattern5_0 { 8861 let pattern7_0 = C::value_type(ctx, pattern5_1); 8862 if pattern7_0 == I64 { 8863 // Rule at src/isa/s390x/lower.isle line 1131. 8864 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8865 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8866 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8867 return Some(expr2_0); 8868 } 8869 } 8870 } 8871 &InstructionData::Load { 8872 opcode: ref pattern5_0, 8873 arg: pattern5_1, 8874 flags: pattern5_2, 8875 offset: pattern5_3, 8876 } => { 8877 if let &Opcode::Load = pattern5_0 { 8878 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8879 // Rule at src/isa/s390x/lower.isle line 1233. 8880 let expr0_0 = 8881 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8882 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8883 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8884 return Some(expr2_0); 8885 } 8886 } 8887 } 8888 _ => {} 8889 } 8890 } 8891 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8892 match &pattern3_0 { 8893 &InstructionData::NullAry { 8894 opcode: ref pattern4_0, 8895 } => { 8896 if let &Opcode::Null = pattern4_0 { 8897 // Rule at src/isa/s390x/lower.isle line 41. 8898 let expr0_0: u64 = 0; 8899 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8900 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8901 return Some(expr2_0); 8902 } 8903 } 8904 &InstructionData::UnaryImm { 8905 opcode: ref pattern4_0, 8906 imm: pattern4_1, 8907 } => { 8908 if let &Opcode::Iconst = pattern4_0 { 8909 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8910 // Rule at src/isa/s390x/lower.isle line 15. 8911 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8912 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8913 return Some(expr1_0); 8914 } 8915 } 8916 &InstructionData::StackLoad { 8917 opcode: ref pattern4_0, 8918 stack_slot: pattern4_1, 8919 offset: pattern4_2, 8920 } => { 8921 if let &Opcode::StackAddr = pattern4_0 { 8922 // Rule at src/isa/s390x/lower.isle line 1152. 8923 let expr0_0 = 8924 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8925 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8926 return Some(expr1_0); 8927 } 8928 } 8929 &InstructionData::UnaryBool { 8930 opcode: ref pattern4_0, 8931 imm: pattern4_1, 8932 } => { 8933 if let &Opcode::Bconst = pattern4_0 { 8934 if pattern4_1 == true { 8935 // Rule at src/isa/s390x/lower.isle line 23. 8936 let expr0_0: u64 = 1; 8937 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8938 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8939 return Some(expr2_0); 8940 } 8941 if pattern4_1 == false { 8942 // Rule at src/isa/s390x/lower.isle line 21. 8943 let expr0_0: u64 = 0; 8944 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8945 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8946 return Some(expr2_0); 8947 } 8948 } 8949 } 8950 &InstructionData::Binary { 8951 opcode: ref pattern4_0, 8952 args: ref pattern4_1, 8953 } => { 8954 match pattern4_0 { 8955 &Opcode::Fadd => { 8956 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8957 // Rule at src/isa/s390x/lower.isle line 920. 8958 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8959 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8960 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8961 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8962 return Some(expr3_0); 8963 } 8964 &Opcode::Fsub => { 8965 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8966 // Rule at src/isa/s390x/lower.isle line 927. 8967 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8968 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8969 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8970 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8971 return Some(expr3_0); 8972 } 8973 &Opcode::Fmul => { 8974 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8975 // Rule at src/isa/s390x/lower.isle line 934. 8976 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8977 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8978 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8979 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8980 return Some(expr3_0); 8981 } 8982 &Opcode::Fdiv => { 8983 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8984 // Rule at src/isa/s390x/lower.isle line 941. 8985 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8986 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8987 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8988 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8989 return Some(expr3_0); 8990 } 8991 &Opcode::Fcopysign => { 8992 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8993 // Rule at src/isa/s390x/lower.isle line 962. 8994 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8995 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8996 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8997 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8998 return Some(expr3_0); 8999 } 9000 &Opcode::Fmin => { 9001 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9002 // Rule at src/isa/s390x/lower.isle line 948. 9003 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9004 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9005 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9006 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9007 return Some(expr3_0); 9008 } 9009 &Opcode::Fmax => { 9010 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9011 // Rule at src/isa/s390x/lower.isle line 955. 9012 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9013 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9014 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9015 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9016 return Some(expr3_0); 9017 } 9018 _ => {} 9019 } 9020 } 9021 &InstructionData::FloatCompare { 9022 opcode: ref pattern4_0, 9023 args: ref pattern4_1, 9024 cond: ref pattern4_2, 9025 } => { 9026 if let &Opcode::Fcmp = pattern4_0 { 9027 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9028 // Rule at src/isa/s390x/lower.isle line 2004. 9029 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9030 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9031 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9032 return Some(expr2_0); 9033 } 9034 } 9035 &InstructionData::IntCompare { 9036 opcode: ref pattern4_0, 9037 args: ref pattern4_1, 9038 cond: ref pattern4_2, 9039 } => { 9040 if let &Opcode::Icmp = pattern4_0 { 9041 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9042 // Rule at src/isa/s390x/lower.isle line 1915. 9043 let expr0_0: bool = true; 9044 let expr1_0 = 9045 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9046 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9047 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9048 return Some(expr3_0); 9049 } 9050 } 9051 &InstructionData::Ternary { 9052 opcode: ref pattern4_0, 9053 args: ref pattern4_1, 9054 } => { 9055 match pattern4_0 { 9056 &Opcode::Select => { 9057 let (pattern6_0, pattern6_1, pattern6_2) = 9058 C::unpack_value_array_3(ctx, pattern4_1); 9059 // Rule at src/isa/s390x/lower.isle line 2046. 9060 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9061 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9062 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9063 let expr3_0 = constructor_select_bool_reg( 9064 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9065 )?; 9066 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9067 return Some(expr4_0); 9068 } 9069 &Opcode::Fma => { 9070 let (pattern6_0, pattern6_1, pattern6_2) = 9071 C::unpack_value_array_3(ctx, pattern4_1); 9072 // Rule at src/isa/s390x/lower.isle line 969. 9073 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9074 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9075 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9076 let expr3_0 = 9077 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9078 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9079 return Some(expr4_0); 9080 } 9081 _ => {} 9082 } 9083 } 9084 &InstructionData::IntSelect { 9085 opcode: ref pattern4_0, 9086 args: ref pattern4_1, 9087 cond: ref pattern4_2, 9088 } => { 9089 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9090 let (pattern6_0, pattern6_1, pattern6_2) = 9091 C::unpack_value_array_3(ctx, pattern4_1); 9092 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9093 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9094 if let &InstructionData::Binary { 9095 opcode: ref pattern9_0, 9096 args: ref pattern9_1, 9097 } = &pattern8_0 9098 { 9099 if let &Opcode::Ifcmp = pattern9_0 { 9100 let (pattern11_0, pattern11_1) = 9101 C::unpack_value_array_2(ctx, pattern9_1); 9102 // Rule at src/isa/s390x/lower.isle line 2058. 9103 let expr0_0: bool = false; 9104 let expr1_0 = constructor_icmp_val( 9105 ctx, 9106 expr0_0, 9107 pattern4_2, 9108 pattern11_0, 9109 pattern11_1, 9110 )?; 9111 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9112 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9113 let expr4_0 = constructor_select_bool_reg( 9114 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9115 )?; 9116 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9117 return Some(expr5_0); 9118 } 9119 } 9120 } 9121 } 9122 } 9123 &InstructionData::Unary { 9124 opcode: ref pattern4_0, 9125 arg: pattern4_1, 9126 } => { 9127 match pattern4_0 { 9128 &Opcode::Sqrt => { 9129 // Rule at src/isa/s390x/lower.isle line 976. 9130 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9131 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9132 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9133 return Some(expr2_0); 9134 } 9135 &Opcode::Fneg => { 9136 // Rule at src/isa/s390x/lower.isle line 983. 9137 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9138 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9139 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9140 return Some(expr2_0); 9141 } 9142 &Opcode::Fabs => { 9143 // Rule at src/isa/s390x/lower.isle line 990. 9144 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9145 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9146 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9147 return Some(expr2_0); 9148 } 9149 &Opcode::Ceil => { 9150 // Rule at src/isa/s390x/lower.isle line 997. 9151 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9152 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9153 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9154 return Some(expr2_0); 9155 } 9156 &Opcode::Floor => { 9157 // Rule at src/isa/s390x/lower.isle line 1004. 9158 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9159 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9160 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9161 return Some(expr2_0); 9162 } 9163 &Opcode::Trunc => { 9164 // Rule at src/isa/s390x/lower.isle line 1011. 9165 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9166 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9167 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9168 return Some(expr2_0); 9169 } 9170 &Opcode::Nearest => { 9171 // Rule at src/isa/s390x/lower.isle line 1018. 9172 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9173 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9174 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9175 return Some(expr2_0); 9176 } 9177 &Opcode::Bextend => { 9178 // Rule at src/isa/s390x/lower.isle line 760. 9179 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9180 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9181 return Some(expr1_0); 9182 } 9183 &Opcode::Bmask => { 9184 // Rule at src/isa/s390x/lower.isle line 762. 9185 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9186 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9187 return Some(expr1_0); 9188 } 9189 &Opcode::Fpromote => { 9190 let pattern6_0 = C::value_type(ctx, pattern4_1); 9191 // Rule at src/isa/s390x/lower.isle line 1025. 9192 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9193 let expr1_0 = 9194 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9195 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9196 return Some(expr2_0); 9197 } 9198 &Opcode::Fdemote => { 9199 let pattern6_0 = C::value_type(ctx, pattern4_1); 9200 // Rule at src/isa/s390x/lower.isle line 1032. 9201 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9202 let expr1_0 = 9203 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9204 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9205 return Some(expr2_0); 9206 } 9207 &Opcode::FcvtFromUint => { 9208 let pattern6_0 = C::value_type(ctx, pattern4_1); 9209 // Rule at src/isa/s390x/lower.isle line 1039. 9210 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9211 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9212 let expr2_0 = 9213 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9214 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9215 return Some(expr3_0); 9216 } 9217 &Opcode::FcvtFromSint => { 9218 let pattern6_0 = C::value_type(ctx, pattern4_1); 9219 // Rule at src/isa/s390x/lower.isle line 1047. 9220 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9221 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9222 let expr2_0 = 9223 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9224 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9225 return Some(expr3_0); 9226 } 9227 _ => {} 9228 } 9229 } 9230 _ => {} 9231 } 9232 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9233 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9234 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9235 match &pattern5_0 { 9236 &InstructionData::Binary { 9237 opcode: ref pattern6_0, 9238 args: ref pattern6_1, 9239 } => { 9240 match pattern6_0 { 9241 &Opcode::BandNot => { 9242 let (pattern8_0, pattern8_1) = 9243 C::unpack_value_array_2(ctx, pattern6_1); 9244 // Rule at src/isa/s390x/lower.isle line 702. 9245 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9246 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9247 let expr2_0 = 9248 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9249 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9250 return Some(expr3_0); 9251 } 9252 &Opcode::BorNot => { 9253 let (pattern8_0, pattern8_1) = 9254 C::unpack_value_array_2(ctx, pattern6_1); 9255 // Rule at src/isa/s390x/lower.isle line 713. 9256 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9257 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9258 let expr2_0 = 9259 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9260 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9261 return Some(expr3_0); 9262 } 9263 &Opcode::BxorNot => { 9264 let (pattern8_0, pattern8_1) = 9265 C::unpack_value_array_2(ctx, pattern6_1); 9266 // Rule at src/isa/s390x/lower.isle line 724. 9267 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9268 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9269 let expr2_0 = 9270 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9271 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9272 return Some(expr3_0); 9273 } 9274 _ => {} 9275 } 9276 } 9277 &InstructionData::Ternary { 9278 opcode: ref pattern6_0, 9279 args: ref pattern6_1, 9280 } => { 9281 if let &Opcode::Bitselect = pattern6_0 { 9282 let (pattern8_0, pattern8_1, pattern8_2) = 9283 C::unpack_value_array_3(ctx, pattern6_1); 9284 // Rule at src/isa/s390x/lower.isle line 735. 9285 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9286 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9287 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9288 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9289 let expr4_0 = 9290 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9291 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9292 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9293 return Some(expr6_0); 9294 } 9295 } 9296 &InstructionData::Unary { 9297 opcode: ref pattern6_0, 9298 arg: pattern6_1, 9299 } => { 9300 match pattern6_0 { 9301 &Opcode::Bnot => { 9302 // Rule at src/isa/s390x/lower.isle line 625. 9303 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9304 let expr1_0 = 9305 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9306 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9307 return Some(expr2_0); 9308 } 9309 &Opcode::Popcnt => { 9310 // Rule at src/isa/s390x/lower.isle line 889. 9311 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9312 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9313 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9314 return Some(expr2_0); 9315 } 9316 _ => {} 9317 } 9318 } 9319 _ => {} 9320 } 9321 } 9322 } 9323 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9324 if pattern2_0 == I16 { 9325 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9326 if let &InstructionData::Unary { 9327 opcode: ref pattern6_0, 9328 arg: pattern6_1, 9329 } = &pattern5_0 9330 { 9331 if let &Opcode::Popcnt = pattern6_0 { 9332 // Rule at src/isa/s390x/lower.isle line 898. 9333 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9334 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9335 let expr2_0: Type = I32; 9336 let expr3_0: Type = I32; 9337 let expr4_0: u8 = 8; 9338 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9339 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9340 let expr7_0: Type = I32; 9341 let expr8_0: u8 = 8; 9342 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9343 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9344 return Some(expr10_0); 9345 } 9346 } 9347 } 9348 if pattern2_0 == I32 { 9349 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9350 if let &InstructionData::Unary { 9351 opcode: ref pattern6_0, 9352 arg: pattern6_1, 9353 } = &pattern5_0 9354 { 9355 if let &Opcode::Popcnt = pattern6_0 { 9356 // Rule at src/isa/s390x/lower.isle line 903. 9357 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9358 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9359 let expr2_0: Type = I32; 9360 let expr3_0: Type = I32; 9361 let expr4_0: u8 = 16; 9362 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9363 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9364 let expr7_0: Type = I32; 9365 let expr8_0: Type = I32; 9366 let expr9_0: u8 = 8; 9367 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9368 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9369 let expr12_0: Type = I32; 9370 let expr13_0: u8 = 24; 9371 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9372 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9373 return Some(expr15_0); 9374 } 9375 } 9376 } 9377 if pattern2_0 == I64 { 9378 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9379 if let &InstructionData::Unary { 9380 opcode: ref pattern6_0, 9381 arg: pattern6_1, 9382 } = &pattern5_0 9383 { 9384 if let &Opcode::Popcnt = pattern6_0 { 9385 // Rule at src/isa/s390x/lower.isle line 909. 9386 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9387 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9388 let expr2_0: Type = I64; 9389 let expr3_0: Type = I64; 9390 let expr4_0: u8 = 32; 9391 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9392 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9393 let expr7_0: Type = I64; 9394 let expr8_0: Type = I64; 9395 let expr9_0: u8 = 16; 9396 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9397 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9398 let expr12_0: Type = I64; 9399 let expr13_0: Type = I64; 9400 let expr14_0: u8 = 8; 9401 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9402 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9403 let expr17_0: Type = I64; 9404 let expr18_0: u8 = 56; 9405 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9406 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9407 return Some(expr20_0); 9408 } 9409 } 9410 } 9411 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9412 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9413 match &pattern5_0 { 9414 &InstructionData::Binary { 9415 opcode: ref pattern6_0, 9416 args: ref pattern6_1, 9417 } => { 9418 match pattern6_0 { 9419 &Opcode::BandNot => { 9420 let (pattern8_0, pattern8_1) = 9421 C::unpack_value_array_2(ctx, pattern6_1); 9422 // Rule at src/isa/s390x/lower.isle line 706. 9423 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9424 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9425 let expr2_0 = 9426 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9427 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9428 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9429 return Some(expr4_0); 9430 } 9431 &Opcode::BorNot => { 9432 let (pattern8_0, pattern8_1) = 9433 C::unpack_value_array_2(ctx, pattern6_1); 9434 // Rule at src/isa/s390x/lower.isle line 717. 9435 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9436 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9437 let expr2_0 = 9438 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9439 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9440 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9441 return Some(expr4_0); 9442 } 9443 &Opcode::BxorNot => { 9444 let (pattern8_0, pattern8_1) = 9445 C::unpack_value_array_2(ctx, pattern6_1); 9446 // Rule at src/isa/s390x/lower.isle line 728. 9447 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9448 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9449 let expr2_0 = 9450 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9451 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9452 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9453 return Some(expr4_0); 9454 } 9455 _ => {} 9456 } 9457 } 9458 &InstructionData::Ternary { 9459 opcode: ref pattern6_0, 9460 args: ref pattern6_1, 9461 } => { 9462 if let &Opcode::Bitselect = pattern6_0 { 9463 let (pattern8_0, pattern8_1, pattern8_2) = 9464 C::unpack_value_array_3(ctx, pattern6_1); 9465 // Rule at src/isa/s390x/lower.isle line 742. 9466 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9467 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9468 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9469 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9470 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9471 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9472 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9473 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9474 return Some(expr7_0); 9475 } 9476 } 9477 &InstructionData::Unary { 9478 opcode: ref pattern6_0, 9479 arg: pattern6_1, 9480 } => { 9481 if let &Opcode::Bnot = pattern6_0 { 9482 // Rule at src/isa/s390x/lower.isle line 630. 9483 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9484 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9485 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9486 return Some(expr2_0); 9487 } 9488 } 9489 _ => {} 9490 } 9491 } 9492 } 9493 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9494 if pattern2_0 == F32 { 9495 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9496 if let &InstructionData::Load { 9497 opcode: ref pattern6_0, 9498 arg: pattern6_1, 9499 flags: pattern6_2, 9500 offset: pattern6_3, 9501 } = &pattern5_0 9502 { 9503 if let &Opcode::Load = pattern6_0 { 9504 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9505 // Rule at src/isa/s390x/lower.isle line 1222. 9506 let expr0_0 = 9507 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9508 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9509 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9510 return Some(expr2_0); 9511 } 9512 } 9513 } 9514 } 9515 if pattern2_0 == F64 { 9516 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9517 if let &InstructionData::Load { 9518 opcode: ref pattern6_0, 9519 arg: pattern6_1, 9520 flags: pattern6_2, 9521 offset: pattern6_3, 9522 } = &pattern5_0 9523 { 9524 if let &Opcode::Load = pattern6_0 { 9525 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9526 // Rule at src/isa/s390x/lower.isle line 1237. 9527 let expr0_0 = 9528 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9529 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9530 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9531 return Some(expr2_0); 9532 } 9533 } 9534 } 9535 } 9536 } 9537 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9538 if pattern2_0 == F32 { 9539 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9540 if let &InstructionData::Load { 9541 opcode: ref pattern6_0, 9542 arg: pattern6_1, 9543 flags: pattern6_2, 9544 offset: pattern6_3, 9545 } = &pattern5_0 9546 { 9547 if let &Opcode::Load = pattern6_0 { 9548 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9549 // Rule at src/isa/s390x/lower.isle line 1227. 9550 let expr0_0 = 9551 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9552 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9553 let expr2_0: Type = I64; 9554 let expr3_0: u8 = 32; 9555 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9556 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9557 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9558 return Some(expr6_0); 9559 } 9560 } 9561 } 9562 } 9563 if pattern2_0 == F64 { 9564 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9565 if let &InstructionData::Load { 9566 opcode: ref pattern6_0, 9567 arg: pattern6_1, 9568 flags: pattern6_2, 9569 offset: pattern6_3, 9570 } = &pattern5_0 9571 { 9572 if let &Opcode::Load = pattern6_0 { 9573 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9574 // Rule at src/isa/s390x/lower.isle line 1242. 9575 let expr0_0 = 9576 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9577 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9578 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9579 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9580 return Some(expr3_0); 9581 } 9582 } 9583 } 9584 } 9585 } 9586 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9587 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9588 if let &InstructionData::Unary { 9589 opcode: ref pattern5_0, 9590 arg: pattern5_1, 9591 } = &pattern4_0 9592 { 9593 if let &Opcode::Bint = pattern5_0 { 9594 // Rule at src/isa/s390x/lower.isle line 796. 9595 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9596 let expr1_0: u16 = 1; 9597 let expr2_0: u8 = 0; 9598 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9599 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9600 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9601 return Some(expr5_0); 9602 } 9603 } 9604 } 9605 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9606 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9607 if let &InstructionData::Unary { 9608 opcode: ref pattern5_0, 9609 arg: pattern5_1, 9610 } = &pattern4_0 9611 { 9612 if let &Opcode::Bint = pattern5_0 { 9613 // Rule at src/isa/s390x/lower.isle line 800. 9614 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9615 let expr1_0: u32 = 1; 9616 let expr2_0: u8 = 0; 9617 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9618 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9619 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9620 return Some(expr5_0); 9621 } 9622 } 9623 } 9624 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9625 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9626 match &pattern4_0 { 9627 &InstructionData::Binary { 9628 opcode: ref pattern5_0, 9629 args: ref pattern5_1, 9630 } => { 9631 match pattern5_0 { 9632 &Opcode::Iadd => { 9633 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9634 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9635 // Rule at src/isa/s390x/lower.isle line 72. 9636 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9637 let expr1_0 = 9638 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9639 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9640 return Some(expr2_0); 9641 } 9642 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9643 // Rule at src/isa/s390x/lower.isle line 76. 9644 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9645 let expr1_0 = 9646 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9647 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9648 return Some(expr2_0); 9649 } 9650 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9651 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9652 if let &InstructionData::Unary { 9653 opcode: ref pattern10_0, 9654 arg: pattern10_1, 9655 } = &pattern9_0 9656 { 9657 if let &Opcode::Sextend = pattern10_0 { 9658 let pattern12_0 = C::value_type(ctx, pattern10_1); 9659 if pattern12_0 == I32 { 9660 // Rule at src/isa/s390x/lower.isle line 66. 9661 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9662 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9663 let expr2_0 = constructor_add_reg_sext32( 9664 ctx, pattern3_0, expr0_0, expr1_0, 9665 )?; 9666 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9667 return Some(expr3_0); 9668 } 9669 } 9670 } 9671 } 9672 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9673 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9674 if let &InstructionData::Load { 9675 opcode: ref pattern10_0, 9676 arg: pattern10_1, 9677 flags: pattern10_2, 9678 offset: pattern10_3, 9679 } = &pattern9_0 9680 { 9681 match pattern10_0 { 9682 &Opcode::Sload16 => { 9683 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9684 // Rule at src/isa/s390x/lower.isle line 94. 9685 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9686 let expr1_0 = 9687 constructor_sink_sload16(ctx, pattern8_0)?; 9688 let expr2_0 = constructor_add_mem_sext16( 9689 ctx, pattern3_0, expr0_0, &expr1_0, 9690 )?; 9691 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9692 return Some(expr3_0); 9693 } 9694 } 9695 &Opcode::Sload32 => { 9696 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9697 // Rule at src/isa/s390x/lower.isle line 98. 9698 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9699 let expr1_0 = 9700 constructor_sink_sload32(ctx, pattern8_0)?; 9701 let expr2_0 = constructor_add_mem_sext32( 9702 ctx, pattern3_0, expr0_0, &expr1_0, 9703 )?; 9704 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9705 return Some(expr3_0); 9706 } 9707 } 9708 _ => {} 9709 } 9710 } 9711 } 9712 let pattern8_0 = C::value_type(ctx, pattern7_0); 9713 if pattern8_0 == I16 { 9714 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9715 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9716 if let &InstructionData::Load { 9717 opcode: ref pattern12_0, 9718 arg: pattern12_1, 9719 flags: pattern12_2, 9720 offset: pattern12_3, 9721 } = &pattern11_0 9722 { 9723 if let &Opcode::Load = pattern12_0 { 9724 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9725 // Rule at src/isa/s390x/lower.isle line 88. 9726 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9727 let expr1_0 = 9728 constructor_sink_load(ctx, pattern10_0)?; 9729 let expr2_0 = constructor_add_mem_sext16( 9730 ctx, pattern3_0, expr0_0, &expr1_0, 9731 )?; 9732 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9733 return Some(expr3_0); 9734 } 9735 } 9736 } 9737 } 9738 } 9739 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9740 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9741 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9742 if let &InstructionData::Load { 9743 opcode: ref pattern12_0, 9744 arg: pattern12_1, 9745 flags: pattern12_2, 9746 offset: pattern12_3, 9747 } = &pattern11_0 9748 { 9749 if let &Opcode::Load = pattern12_0 { 9750 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9751 // Rule at src/isa/s390x/lower.isle line 82. 9752 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9753 let expr1_0 = 9754 constructor_sink_load(ctx, pattern10_0)?; 9755 let expr2_0 = constructor_add_mem( 9756 ctx, pattern3_0, expr0_0, &expr1_0, 9757 )?; 9758 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9759 return Some(expr3_0); 9760 } 9761 } 9762 } 9763 } 9764 } 9765 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9766 // Rule at src/isa/s390x/lower.isle line 70. 9767 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9768 let expr1_0 = 9769 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9770 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9771 return Some(expr2_0); 9772 } 9773 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9774 // Rule at src/isa/s390x/lower.isle line 74. 9775 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9776 let expr1_0 = 9777 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9778 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9779 return Some(expr2_0); 9780 } 9781 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9782 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9783 if let &InstructionData::Unary { 9784 opcode: ref pattern10_0, 9785 arg: pattern10_1, 9786 } = &pattern9_0 9787 { 9788 if let &Opcode::Sextend = pattern10_0 { 9789 let pattern12_0 = C::value_type(ctx, pattern10_1); 9790 if pattern12_0 == I32 { 9791 // Rule at src/isa/s390x/lower.isle line 64. 9792 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9793 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9794 let expr2_0 = constructor_add_reg_sext32( 9795 ctx, pattern3_0, expr0_0, expr1_0, 9796 )?; 9797 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9798 return Some(expr3_0); 9799 } 9800 } 9801 } 9802 } 9803 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9804 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9805 if let &InstructionData::Load { 9806 opcode: ref pattern10_0, 9807 arg: pattern10_1, 9808 flags: pattern10_2, 9809 offset: pattern10_3, 9810 } = &pattern9_0 9811 { 9812 match pattern10_0 { 9813 &Opcode::Sload16 => { 9814 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9815 // Rule at src/isa/s390x/lower.isle line 92. 9816 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9817 let expr1_0 = 9818 constructor_sink_sload16(ctx, pattern8_0)?; 9819 let expr2_0 = constructor_add_mem_sext16( 9820 ctx, pattern3_0, expr0_0, &expr1_0, 9821 )?; 9822 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9823 return Some(expr3_0); 9824 } 9825 } 9826 &Opcode::Sload32 => { 9827 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9828 // Rule at src/isa/s390x/lower.isle line 96. 9829 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9830 let expr1_0 = 9831 constructor_sink_sload32(ctx, pattern8_0)?; 9832 let expr2_0 = constructor_add_mem_sext32( 9833 ctx, pattern3_0, expr0_0, &expr1_0, 9834 )?; 9835 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9836 return Some(expr3_0); 9837 } 9838 } 9839 _ => {} 9840 } 9841 } 9842 } 9843 let pattern8_0 = C::value_type(ctx, pattern7_1); 9844 if pattern8_0 == I16 { 9845 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9846 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9847 if let &InstructionData::Load { 9848 opcode: ref pattern12_0, 9849 arg: pattern12_1, 9850 flags: pattern12_2, 9851 offset: pattern12_3, 9852 } = &pattern11_0 9853 { 9854 if let &Opcode::Load = pattern12_0 { 9855 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9856 // Rule at src/isa/s390x/lower.isle line 86. 9857 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9858 let expr1_0 = 9859 constructor_sink_load(ctx, pattern10_0)?; 9860 let expr2_0 = constructor_add_mem_sext16( 9861 ctx, pattern3_0, expr0_0, &expr1_0, 9862 )?; 9863 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9864 return Some(expr3_0); 9865 } 9866 } 9867 } 9868 } 9869 } 9870 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9871 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9872 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9873 if let &InstructionData::Load { 9874 opcode: ref pattern12_0, 9875 arg: pattern12_1, 9876 flags: pattern12_2, 9877 offset: pattern12_3, 9878 } = &pattern11_0 9879 { 9880 if let &Opcode::Load = pattern12_0 { 9881 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9882 // Rule at src/isa/s390x/lower.isle line 80. 9883 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9884 let expr1_0 = 9885 constructor_sink_load(ctx, pattern10_0)?; 9886 let expr2_0 = constructor_add_mem( 9887 ctx, pattern3_0, expr0_0, &expr1_0, 9888 )?; 9889 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9890 return Some(expr3_0); 9891 } 9892 } 9893 } 9894 } 9895 } 9896 // Rule at src/isa/s390x/lower.isle line 60. 9897 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9898 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9899 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9900 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9901 return Some(expr3_0); 9902 } 9903 &Opcode::Isub => { 9904 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9905 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9906 // Rule at src/isa/s390x/lower.isle line 113. 9907 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9908 let expr1_0 = 9909 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9910 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9911 return Some(expr2_0); 9912 } 9913 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9914 // Rule at src/isa/s390x/lower.isle line 115. 9915 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9916 let expr1_0 = 9917 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9918 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9919 return Some(expr2_0); 9920 } 9921 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9922 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9923 if let &InstructionData::Unary { 9924 opcode: ref pattern10_0, 9925 arg: pattern10_1, 9926 } = &pattern9_0 9927 { 9928 if let &Opcode::Sextend = pattern10_0 { 9929 let pattern12_0 = C::value_type(ctx, pattern10_1); 9930 if pattern12_0 == I32 { 9931 // Rule at src/isa/s390x/lower.isle line 109. 9932 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9933 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9934 let expr2_0 = constructor_sub_reg_sext32( 9935 ctx, pattern3_0, expr0_0, expr1_0, 9936 )?; 9937 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9938 return Some(expr3_0); 9939 } 9940 } 9941 } 9942 } 9943 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9944 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9945 if let &InstructionData::Load { 9946 opcode: ref pattern10_0, 9947 arg: pattern10_1, 9948 flags: pattern10_2, 9949 offset: pattern10_3, 9950 } = &pattern9_0 9951 { 9952 match pattern10_0 { 9953 &Opcode::Sload16 => { 9954 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9955 // Rule at src/isa/s390x/lower.isle line 127. 9956 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9957 let expr1_0 = 9958 constructor_sink_sload16(ctx, pattern8_0)?; 9959 let expr2_0 = constructor_sub_mem_sext16( 9960 ctx, pattern3_0, expr0_0, &expr1_0, 9961 )?; 9962 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9963 return Some(expr3_0); 9964 } 9965 } 9966 &Opcode::Sload32 => { 9967 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9968 // Rule at src/isa/s390x/lower.isle line 129. 9969 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9970 let expr1_0 = 9971 constructor_sink_sload32(ctx, pattern8_0)?; 9972 let expr2_0 = constructor_sub_mem_sext32( 9973 ctx, pattern3_0, expr0_0, &expr1_0, 9974 )?; 9975 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9976 return Some(expr3_0); 9977 } 9978 } 9979 _ => {} 9980 } 9981 } 9982 } 9983 let pattern8_0 = C::value_type(ctx, pattern7_1); 9984 if pattern8_0 == I16 { 9985 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9986 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9987 if let &InstructionData::Load { 9988 opcode: ref pattern12_0, 9989 arg: pattern12_1, 9990 flags: pattern12_2, 9991 offset: pattern12_3, 9992 } = &pattern11_0 9993 { 9994 if let &Opcode::Load = pattern12_0 { 9995 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9996 // Rule at src/isa/s390x/lower.isle line 123. 9997 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9998 let expr1_0 = 9999 constructor_sink_load(ctx, pattern10_0)?; 10000 let expr2_0 = constructor_sub_mem_sext16( 10001 ctx, pattern3_0, expr0_0, &expr1_0, 10002 )?; 10003 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10004 return Some(expr3_0); 10005 } 10006 } 10007 } 10008 } 10009 } 10010 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10011 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10012 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10013 if let &InstructionData::Load { 10014 opcode: ref pattern12_0, 10015 arg: pattern12_1, 10016 flags: pattern12_2, 10017 offset: pattern12_3, 10018 } = &pattern11_0 10019 { 10020 if let &Opcode::Load = pattern12_0 { 10021 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10022 // Rule at src/isa/s390x/lower.isle line 119. 10023 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10024 let expr1_0 = 10025 constructor_sink_load(ctx, pattern10_0)?; 10026 let expr2_0 = constructor_sub_mem( 10027 ctx, pattern3_0, expr0_0, &expr1_0, 10028 )?; 10029 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10030 return Some(expr3_0); 10031 } 10032 } 10033 } 10034 } 10035 } 10036 // Rule at src/isa/s390x/lower.isle line 105. 10037 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10038 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10039 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10040 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10041 return Some(expr3_0); 10042 } 10043 &Opcode::Imul => { 10044 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10045 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10046 // Rule at src/isa/s390x/lower.isle line 212. 10047 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10048 let expr1_0 = 10049 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10050 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10051 return Some(expr2_0); 10052 } 10053 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10054 // Rule at src/isa/s390x/lower.isle line 216. 10055 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10056 let expr1_0 = 10057 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10058 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10059 return Some(expr2_0); 10060 } 10061 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10062 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10063 if let &InstructionData::Unary { 10064 opcode: ref pattern10_0, 10065 arg: pattern10_1, 10066 } = &pattern9_0 10067 { 10068 if let &Opcode::Sextend = pattern10_0 { 10069 let pattern12_0 = C::value_type(ctx, pattern10_1); 10070 if pattern12_0 == I32 { 10071 // Rule at src/isa/s390x/lower.isle line 206. 10072 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10073 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10074 let expr2_0 = constructor_mul_reg_sext32( 10075 ctx, pattern3_0, expr0_0, expr1_0, 10076 )?; 10077 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10078 return Some(expr3_0); 10079 } 10080 } 10081 } 10082 } 10083 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10084 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10085 if let &InstructionData::Load { 10086 opcode: ref pattern10_0, 10087 arg: pattern10_1, 10088 flags: pattern10_2, 10089 offset: pattern10_3, 10090 } = &pattern9_0 10091 { 10092 match pattern10_0 { 10093 &Opcode::Sload16 => { 10094 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10095 // Rule at src/isa/s390x/lower.isle line 234. 10096 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10097 let expr1_0 = 10098 constructor_sink_sload16(ctx, pattern8_0)?; 10099 let expr2_0 = constructor_mul_mem_sext16( 10100 ctx, pattern3_0, expr0_0, &expr1_0, 10101 )?; 10102 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10103 return Some(expr3_0); 10104 } 10105 } 10106 &Opcode::Sload32 => { 10107 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10108 // Rule at src/isa/s390x/lower.isle line 238. 10109 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10110 let expr1_0 = 10111 constructor_sink_sload32(ctx, pattern8_0)?; 10112 let expr2_0 = constructor_mul_mem_sext32( 10113 ctx, pattern3_0, expr0_0, &expr1_0, 10114 )?; 10115 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10116 return Some(expr3_0); 10117 } 10118 } 10119 _ => {} 10120 } 10121 } 10122 } 10123 let pattern8_0 = C::value_type(ctx, pattern7_0); 10124 if pattern8_0 == I16 { 10125 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10126 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10127 if let &InstructionData::Load { 10128 opcode: ref pattern12_0, 10129 arg: pattern12_1, 10130 flags: pattern12_2, 10131 offset: pattern12_3, 10132 } = &pattern11_0 10133 { 10134 if let &Opcode::Load = pattern12_0 { 10135 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10136 // Rule at src/isa/s390x/lower.isle line 228. 10137 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10138 let expr1_0 = 10139 constructor_sink_load(ctx, pattern10_0)?; 10140 let expr2_0 = constructor_mul_mem_sext16( 10141 ctx, pattern3_0, expr0_0, &expr1_0, 10142 )?; 10143 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10144 return Some(expr3_0); 10145 } 10146 } 10147 } 10148 } 10149 } 10150 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10151 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10152 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10153 if let &InstructionData::Load { 10154 opcode: ref pattern12_0, 10155 arg: pattern12_1, 10156 flags: pattern12_2, 10157 offset: pattern12_3, 10158 } = &pattern11_0 10159 { 10160 if let &Opcode::Load = pattern12_0 { 10161 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10162 // Rule at src/isa/s390x/lower.isle line 222. 10163 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10164 let expr1_0 = 10165 constructor_sink_load(ctx, pattern10_0)?; 10166 let expr2_0 = constructor_mul_mem( 10167 ctx, pattern3_0, expr0_0, &expr1_0, 10168 )?; 10169 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10170 return Some(expr3_0); 10171 } 10172 } 10173 } 10174 } 10175 } 10176 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10177 // Rule at src/isa/s390x/lower.isle line 210. 10178 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10179 let expr1_0 = 10180 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10181 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10182 return Some(expr2_0); 10183 } 10184 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10185 // Rule at src/isa/s390x/lower.isle line 214. 10186 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10187 let expr1_0 = 10188 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10189 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10190 return Some(expr2_0); 10191 } 10192 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10193 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10194 if let &InstructionData::Unary { 10195 opcode: ref pattern10_0, 10196 arg: pattern10_1, 10197 } = &pattern9_0 10198 { 10199 if let &Opcode::Sextend = pattern10_0 { 10200 let pattern12_0 = C::value_type(ctx, pattern10_1); 10201 if pattern12_0 == I32 { 10202 // Rule at src/isa/s390x/lower.isle line 204. 10203 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10204 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10205 let expr2_0 = constructor_mul_reg_sext32( 10206 ctx, pattern3_0, expr0_0, expr1_0, 10207 )?; 10208 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10209 return Some(expr3_0); 10210 } 10211 } 10212 } 10213 } 10214 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10215 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10216 if let &InstructionData::Load { 10217 opcode: ref pattern10_0, 10218 arg: pattern10_1, 10219 flags: pattern10_2, 10220 offset: pattern10_3, 10221 } = &pattern9_0 10222 { 10223 match pattern10_0 { 10224 &Opcode::Sload16 => { 10225 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10226 // Rule at src/isa/s390x/lower.isle line 232. 10227 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10228 let expr1_0 = 10229 constructor_sink_sload16(ctx, pattern8_0)?; 10230 let expr2_0 = constructor_mul_mem_sext16( 10231 ctx, pattern3_0, expr0_0, &expr1_0, 10232 )?; 10233 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10234 return Some(expr3_0); 10235 } 10236 } 10237 &Opcode::Sload32 => { 10238 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10239 // Rule at src/isa/s390x/lower.isle line 236. 10240 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10241 let expr1_0 = 10242 constructor_sink_sload32(ctx, pattern8_0)?; 10243 let expr2_0 = constructor_mul_mem_sext32( 10244 ctx, pattern3_0, expr0_0, &expr1_0, 10245 )?; 10246 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10247 return Some(expr3_0); 10248 } 10249 } 10250 _ => {} 10251 } 10252 } 10253 } 10254 let pattern8_0 = C::value_type(ctx, pattern7_1); 10255 if pattern8_0 == I16 { 10256 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10257 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10258 if let &InstructionData::Load { 10259 opcode: ref pattern12_0, 10260 arg: pattern12_1, 10261 flags: pattern12_2, 10262 offset: pattern12_3, 10263 } = &pattern11_0 10264 { 10265 if let &Opcode::Load = pattern12_0 { 10266 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10267 // Rule at src/isa/s390x/lower.isle line 226. 10268 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10269 let expr1_0 = 10270 constructor_sink_load(ctx, pattern10_0)?; 10271 let expr2_0 = constructor_mul_mem_sext16( 10272 ctx, pattern3_0, expr0_0, &expr1_0, 10273 )?; 10274 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10275 return Some(expr3_0); 10276 } 10277 } 10278 } 10279 } 10280 } 10281 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10282 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10283 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10284 if let &InstructionData::Load { 10285 opcode: ref pattern12_0, 10286 arg: pattern12_1, 10287 flags: pattern12_2, 10288 offset: pattern12_3, 10289 } = &pattern11_0 10290 { 10291 if let &Opcode::Load = pattern12_0 { 10292 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10293 // Rule at src/isa/s390x/lower.isle line 220. 10294 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10295 let expr1_0 = 10296 constructor_sink_load(ctx, pattern10_0)?; 10297 let expr2_0 = constructor_mul_mem( 10298 ctx, pattern3_0, expr0_0, &expr1_0, 10299 )?; 10300 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10301 return Some(expr3_0); 10302 } 10303 } 10304 } 10305 } 10306 } 10307 // Rule at src/isa/s390x/lower.isle line 200. 10308 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10309 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10310 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10311 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10312 return Some(expr3_0); 10313 } 10314 &Opcode::Udiv => { 10315 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10316 // Rule at src/isa/s390x/lower.isle line 303. 10317 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10318 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10319 let expr2_0: u64 = 0; 10320 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10321 let expr4_0 = 10322 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10323 let expr5_0 = 10324 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10325 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10326 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10327 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10328 ctx, expr0_0, expr7_0, expr6_0, 10329 )?; 10330 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10331 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10332 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10333 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10334 return Some(expr12_0); 10335 } 10336 &Opcode::Sdiv => { 10337 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10338 // Rule at src/isa/s390x/lower.isle line 375. 10339 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10340 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10341 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10342 let expr3_0 = 10343 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10344 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10345 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10346 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10347 ctx, expr0_0, expr5_0, expr4_0, 10348 )?; 10349 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10350 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10351 )?; 10352 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10353 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10354 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10355 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10356 return Some(expr11_0); 10357 } 10358 &Opcode::Urem => { 10359 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10360 // Rule at src/isa/s390x/lower.isle line 326. 10361 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10362 let expr1_0: u64 = 0; 10363 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10364 let expr3_0 = 10365 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10366 let expr4_0 = 10367 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10368 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10369 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10370 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10371 ctx, expr0_0, expr6_0, expr5_0, 10372 )?; 10373 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10374 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10375 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10376 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10377 return Some(expr11_0); 10378 } 10379 &Opcode::Srem => { 10380 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10381 // Rule at src/isa/s390x/lower.isle line 398. 10382 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10383 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10384 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10385 let expr3_0 = 10386 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10387 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10388 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10389 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10390 ctx, expr0_0, expr5_0, expr4_0, 10391 )?; 10392 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10393 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10394 )?; 10395 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10396 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10397 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10398 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10399 return Some(expr11_0); 10400 } 10401 &Opcode::IaddIfcout => { 10402 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10403 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10404 // Rule at src/isa/s390x/lower.isle line 170. 10405 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10406 let expr1_0 = constructor_add_logical_zimm32( 10407 ctx, pattern3_0, expr0_0, pattern8_0, 10408 )?; 10409 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10410 return Some(expr2_0); 10411 } 10412 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10413 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10414 if let &InstructionData::Unary { 10415 opcode: ref pattern10_0, 10416 arg: pattern10_1, 10417 } = &pattern9_0 10418 { 10419 if let &Opcode::Uextend = pattern10_0 { 10420 let pattern12_0 = C::value_type(ctx, pattern10_1); 10421 if pattern12_0 == I32 { 10422 // Rule at src/isa/s390x/lower.isle line 164. 10423 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10424 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10425 let expr2_0 = constructor_add_logical_reg_zext32( 10426 ctx, pattern3_0, expr0_0, expr1_0, 10427 )?; 10428 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10429 return Some(expr3_0); 10430 } 10431 } 10432 } 10433 } 10434 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10435 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10436 if let &InstructionData::Load { 10437 opcode: ref pattern10_0, 10438 arg: pattern10_1, 10439 flags: pattern10_2, 10440 offset: pattern10_3, 10441 } = &pattern9_0 10442 { 10443 if let &Opcode::Uload32 = pattern10_0 { 10444 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10445 // Rule at src/isa/s390x/lower.isle line 182. 10446 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10447 let expr1_0 = 10448 constructor_sink_uload32(ctx, pattern8_0)?; 10449 let expr2_0 = constructor_add_logical_mem_zext32( 10450 ctx, pattern3_0, expr0_0, &expr1_0, 10451 )?; 10452 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10453 return Some(expr3_0); 10454 } 10455 } 10456 } 10457 } 10458 let pattern8_0 = C::value_type(ctx, pattern7_0); 10459 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10460 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10461 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10462 if let &InstructionData::Load { 10463 opcode: ref pattern12_0, 10464 arg: pattern12_1, 10465 flags: pattern12_2, 10466 offset: pattern12_3, 10467 } = &pattern11_0 10468 { 10469 if let &Opcode::Load = pattern12_0 { 10470 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10471 // Rule at src/isa/s390x/lower.isle line 176. 10472 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10473 let expr1_0 = 10474 constructor_sink_load(ctx, pattern10_0)?; 10475 let expr2_0 = constructor_add_logical_mem( 10476 ctx, pattern3_0, expr0_0, &expr1_0, 10477 )?; 10478 let expr3_0 = 10479 constructor_output_ifcout(ctx, expr2_0)?; 10480 return Some(expr3_0); 10481 } 10482 } 10483 } 10484 } 10485 } 10486 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10487 // Rule at src/isa/s390x/lower.isle line 168. 10488 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10489 let expr1_0 = constructor_add_logical_zimm32( 10490 ctx, pattern3_0, expr0_0, pattern8_0, 10491 )?; 10492 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10493 return Some(expr2_0); 10494 } 10495 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10496 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10497 if let &InstructionData::Unary { 10498 opcode: ref pattern10_0, 10499 arg: pattern10_1, 10500 } = &pattern9_0 10501 { 10502 if let &Opcode::Uextend = pattern10_0 { 10503 let pattern12_0 = C::value_type(ctx, pattern10_1); 10504 if pattern12_0 == I32 { 10505 // Rule at src/isa/s390x/lower.isle line 162. 10506 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10507 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10508 let expr2_0 = constructor_add_logical_reg_zext32( 10509 ctx, pattern3_0, expr0_0, expr1_0, 10510 )?; 10511 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10512 return Some(expr3_0); 10513 } 10514 } 10515 } 10516 } 10517 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10518 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10519 if let &InstructionData::Load { 10520 opcode: ref pattern10_0, 10521 arg: pattern10_1, 10522 flags: pattern10_2, 10523 offset: pattern10_3, 10524 } = &pattern9_0 10525 { 10526 if let &Opcode::Uload32 = pattern10_0 { 10527 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10528 // Rule at src/isa/s390x/lower.isle line 180. 10529 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10530 let expr1_0 = 10531 constructor_sink_uload32(ctx, pattern8_0)?; 10532 let expr2_0 = constructor_add_logical_mem_zext32( 10533 ctx, pattern3_0, expr0_0, &expr1_0, 10534 )?; 10535 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10536 return Some(expr3_0); 10537 } 10538 } 10539 } 10540 } 10541 let pattern8_0 = C::value_type(ctx, pattern7_1); 10542 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10543 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10544 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10545 if let &InstructionData::Load { 10546 opcode: ref pattern12_0, 10547 arg: pattern12_1, 10548 flags: pattern12_2, 10549 offset: pattern12_3, 10550 } = &pattern11_0 10551 { 10552 if let &Opcode::Load = pattern12_0 { 10553 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10554 // Rule at src/isa/s390x/lower.isle line 174. 10555 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10556 let expr1_0 = 10557 constructor_sink_load(ctx, pattern10_0)?; 10558 let expr2_0 = constructor_add_logical_mem( 10559 ctx, pattern3_0, expr0_0, &expr1_0, 10560 )?; 10561 let expr3_0 = 10562 constructor_output_ifcout(ctx, expr2_0)?; 10563 return Some(expr3_0); 10564 } 10565 } 10566 } 10567 } 10568 } 10569 // Rule at src/isa/s390x/lower.isle line 158. 10570 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10571 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10572 let expr2_0 = 10573 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10574 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10575 return Some(expr3_0); 10576 } 10577 &Opcode::Band => { 10578 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10579 let pattern8_0 = C::value_type(ctx, pattern7_0); 10580 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10581 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10582 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10583 if let &InstructionData::Load { 10584 opcode: ref pattern12_0, 10585 arg: pattern12_1, 10586 flags: pattern12_2, 10587 offset: pattern12_3, 10588 } = &pattern11_0 10589 { 10590 if let &Opcode::Load = pattern12_0 { 10591 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10592 // Rule at src/isa/s390x/lower.isle line 653. 10593 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10594 let expr1_0 = 10595 constructor_sink_load(ctx, pattern10_0)?; 10596 let expr2_0 = constructor_and_mem( 10597 ctx, pattern3_0, expr0_0, &expr1_0, 10598 )?; 10599 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10600 return Some(expr3_0); 10601 } 10602 } 10603 } 10604 } 10605 } 10606 if let Some(pattern8_0) = 10607 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10608 { 10609 // Rule at src/isa/s390x/lower.isle line 647. 10610 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10611 let expr1_0 = constructor_and_uimm32shifted( 10612 ctx, pattern3_0, expr0_0, pattern8_0, 10613 )?; 10614 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10615 return Some(expr2_0); 10616 } 10617 if let Some(pattern8_0) = 10618 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10619 { 10620 // Rule at src/isa/s390x/lower.isle line 643. 10621 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10622 let expr1_0 = constructor_and_uimm16shifted( 10623 ctx, pattern3_0, expr0_0, pattern8_0, 10624 )?; 10625 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10626 return Some(expr2_0); 10627 } 10628 let pattern8_0 = C::value_type(ctx, pattern7_1); 10629 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10630 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10631 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10632 if let &InstructionData::Load { 10633 opcode: ref pattern12_0, 10634 arg: pattern12_1, 10635 flags: pattern12_2, 10636 offset: pattern12_3, 10637 } = &pattern11_0 10638 { 10639 if let &Opcode::Load = pattern12_0 { 10640 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10641 // Rule at src/isa/s390x/lower.isle line 651. 10642 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10643 let expr1_0 = 10644 constructor_sink_load(ctx, pattern10_0)?; 10645 let expr2_0 = constructor_and_mem( 10646 ctx, pattern3_0, expr0_0, &expr1_0, 10647 )?; 10648 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10649 return Some(expr3_0); 10650 } 10651 } 10652 } 10653 } 10654 } 10655 if let Some(pattern8_0) = 10656 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10657 { 10658 // Rule at src/isa/s390x/lower.isle line 645. 10659 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10660 let expr1_0 = constructor_and_uimm32shifted( 10661 ctx, pattern3_0, expr0_0, pattern8_0, 10662 )?; 10663 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10664 return Some(expr2_0); 10665 } 10666 if let Some(pattern8_0) = 10667 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10668 { 10669 // Rule at src/isa/s390x/lower.isle line 641. 10670 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10671 let expr1_0 = constructor_and_uimm16shifted( 10672 ctx, pattern3_0, expr0_0, pattern8_0, 10673 )?; 10674 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10675 return Some(expr2_0); 10676 } 10677 // Rule at src/isa/s390x/lower.isle line 637. 10678 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10679 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10680 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10681 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10682 return Some(expr3_0); 10683 } 10684 &Opcode::Bor => { 10685 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10686 let pattern8_0 = C::value_type(ctx, pattern7_0); 10687 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10688 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10689 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10690 if let &InstructionData::Load { 10691 opcode: ref pattern12_0, 10692 arg: pattern12_1, 10693 flags: pattern12_2, 10694 offset: pattern12_3, 10695 } = &pattern11_0 10696 { 10697 if let &Opcode::Load = pattern12_0 { 10698 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10699 // Rule at src/isa/s390x/lower.isle line 676. 10700 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10701 let expr1_0 = 10702 constructor_sink_load(ctx, pattern10_0)?; 10703 let expr2_0 = constructor_or_mem( 10704 ctx, pattern3_0, expr0_0, &expr1_0, 10705 )?; 10706 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10707 return Some(expr3_0); 10708 } 10709 } 10710 } 10711 } 10712 } 10713 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10714 // Rule at src/isa/s390x/lower.isle line 670. 10715 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10716 let expr1_0 = constructor_or_uimm32shifted( 10717 ctx, pattern3_0, expr0_0, pattern8_0, 10718 )?; 10719 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10720 return Some(expr2_0); 10721 } 10722 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10723 // Rule at src/isa/s390x/lower.isle line 666. 10724 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10725 let expr1_0 = constructor_or_uimm16shifted( 10726 ctx, pattern3_0, expr0_0, pattern8_0, 10727 )?; 10728 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10729 return Some(expr2_0); 10730 } 10731 let pattern8_0 = C::value_type(ctx, pattern7_1); 10732 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10733 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10734 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10735 if let &InstructionData::Load { 10736 opcode: ref pattern12_0, 10737 arg: pattern12_1, 10738 flags: pattern12_2, 10739 offset: pattern12_3, 10740 } = &pattern11_0 10741 { 10742 if let &Opcode::Load = pattern12_0 { 10743 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10744 // Rule at src/isa/s390x/lower.isle line 674. 10745 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10746 let expr1_0 = 10747 constructor_sink_load(ctx, pattern10_0)?; 10748 let expr2_0 = constructor_or_mem( 10749 ctx, pattern3_0, expr0_0, &expr1_0, 10750 )?; 10751 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10752 return Some(expr3_0); 10753 } 10754 } 10755 } 10756 } 10757 } 10758 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10759 // Rule at src/isa/s390x/lower.isle line 668. 10760 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10761 let expr1_0 = constructor_or_uimm32shifted( 10762 ctx, pattern3_0, expr0_0, pattern8_0, 10763 )?; 10764 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10765 return Some(expr2_0); 10766 } 10767 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10768 // Rule at src/isa/s390x/lower.isle line 664. 10769 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10770 let expr1_0 = constructor_or_uimm16shifted( 10771 ctx, pattern3_0, expr0_0, pattern8_0, 10772 )?; 10773 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10774 return Some(expr2_0); 10775 } 10776 // Rule at src/isa/s390x/lower.isle line 660. 10777 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10778 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10779 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10780 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10781 return Some(expr3_0); 10782 } 10783 &Opcode::Bxor => { 10784 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10785 let pattern8_0 = C::value_type(ctx, pattern7_0); 10786 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10787 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10788 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10789 if let &InstructionData::Load { 10790 opcode: ref pattern12_0, 10791 arg: pattern12_1, 10792 flags: pattern12_2, 10793 offset: pattern12_3, 10794 } = &pattern11_0 10795 { 10796 if let &Opcode::Load = pattern12_0 { 10797 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10798 // Rule at src/isa/s390x/lower.isle line 695. 10799 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10800 let expr1_0 = 10801 constructor_sink_load(ctx, pattern10_0)?; 10802 let expr2_0 = constructor_xor_mem( 10803 ctx, pattern3_0, expr0_0, &expr1_0, 10804 )?; 10805 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10806 return Some(expr3_0); 10807 } 10808 } 10809 } 10810 } 10811 } 10812 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10813 // Rule at src/isa/s390x/lower.isle line 689. 10814 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10815 let expr1_0 = constructor_xor_uimm32shifted( 10816 ctx, pattern3_0, expr0_0, pattern8_0, 10817 )?; 10818 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10819 return Some(expr2_0); 10820 } 10821 let pattern8_0 = C::value_type(ctx, pattern7_1); 10822 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10823 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10824 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10825 if let &InstructionData::Load { 10826 opcode: ref pattern12_0, 10827 arg: pattern12_1, 10828 flags: pattern12_2, 10829 offset: pattern12_3, 10830 } = &pattern11_0 10831 { 10832 if let &Opcode::Load = pattern12_0 { 10833 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10834 // Rule at src/isa/s390x/lower.isle line 693. 10835 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10836 let expr1_0 = 10837 constructor_sink_load(ctx, pattern10_0)?; 10838 let expr2_0 = constructor_xor_mem( 10839 ctx, pattern3_0, expr0_0, &expr1_0, 10840 )?; 10841 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10842 return Some(expr3_0); 10843 } 10844 } 10845 } 10846 } 10847 } 10848 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10849 // Rule at src/isa/s390x/lower.isle line 687. 10850 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10851 let expr1_0 = constructor_xor_uimm32shifted( 10852 ctx, pattern3_0, expr0_0, pattern8_0, 10853 )?; 10854 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10855 return Some(expr2_0); 10856 } 10857 // Rule at src/isa/s390x/lower.isle line 683. 10858 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10859 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10860 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10861 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10862 return Some(expr3_0); 10863 } 10864 &Opcode::Ishl => { 10865 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10866 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10867 // Rule at src/isa/s390x/lower.isle line 482. 10868 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10869 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10870 let expr2_0 = 10871 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10872 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10873 return Some(expr3_0); 10874 } 10875 // Rule at src/isa/s390x/lower.isle line 477. 10876 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10877 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10878 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10879 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10880 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10881 return Some(expr4_0); 10882 } 10883 &Opcode::Ushr => { 10884 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10885 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10886 // Rule at src/isa/s390x/lower.isle line 498. 10887 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10888 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10889 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10890 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10891 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10892 return Some(expr4_0); 10893 } 10894 // Rule at src/isa/s390x/lower.isle line 491. 10895 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10896 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10897 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10898 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10899 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10900 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10901 return Some(expr5_0); 10902 } 10903 &Opcode::Sshr => { 10904 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10905 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10906 // Rule at src/isa/s390x/lower.isle line 515. 10907 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10908 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10909 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10910 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10911 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10912 return Some(expr4_0); 10913 } 10914 // Rule at src/isa/s390x/lower.isle line 508. 10915 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10916 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10917 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10918 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10919 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10920 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10921 return Some(expr5_0); 10922 } 10923 _ => {} 10924 } 10925 } 10926 &InstructionData::Unary { 10927 opcode: ref pattern5_0, 10928 arg: pattern5_1, 10929 } => { 10930 match pattern5_0 { 10931 &Opcode::Ineg => { 10932 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10933 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10934 if let &InstructionData::Unary { 10935 opcode: ref pattern9_0, 10936 arg: pattern9_1, 10937 } = &pattern8_0 10938 { 10939 if let &Opcode::Sextend = pattern9_0 { 10940 let pattern11_0 = C::value_type(ctx, pattern9_1); 10941 if pattern11_0 == I32 { 10942 // Rule at src/isa/s390x/lower.isle line 193. 10943 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10944 let expr1_0 = constructor_neg_reg_sext32( 10945 ctx, pattern3_0, expr0_0, 10946 )?; 10947 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10948 return Some(expr2_0); 10949 } 10950 } 10951 } 10952 } 10953 // Rule at src/isa/s390x/lower.isle line 189. 10954 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10955 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10956 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10957 return Some(expr2_0); 10958 } 10959 &Opcode::Iabs => { 10960 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10961 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10962 if let &InstructionData::Unary { 10963 opcode: ref pattern9_0, 10964 arg: pattern9_1, 10965 } = &pattern8_0 10966 { 10967 if let &Opcode::Sextend = pattern9_0 { 10968 let pattern11_0 = C::value_type(ctx, pattern9_1); 10969 if pattern11_0 == I32 { 10970 // Rule at src/isa/s390x/lower.isle line 141. 10971 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10972 let expr1_0 = constructor_abs_reg_sext32( 10973 ctx, pattern3_0, expr0_0, 10974 )?; 10975 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10976 return Some(expr2_0); 10977 } 10978 } 10979 } 10980 } 10981 // Rule at src/isa/s390x/lower.isle line 137. 10982 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10983 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10984 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10985 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10986 return Some(expr3_0); 10987 } 10988 &Opcode::Clz => { 10989 // Rule at src/isa/s390x/lower.isle line 821. 10990 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10991 let expr1_0: i16 = 64; 10992 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10993 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10994 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10995 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10996 return Some(expr5_0); 10997 } 10998 &Opcode::Cls => { 10999 // Rule at src/isa/s390x/lower.isle line 836. 11000 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11001 let expr1_0: Type = I64; 11002 let expr2_0: u8 = 63; 11003 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11004 let expr4_0: Type = I64; 11005 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11006 let expr6_0: i16 = 64; 11007 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11008 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11009 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11010 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11011 return Some(expr10_0); 11012 } 11013 &Opcode::Bint => { 11014 // Rule at src/isa/s390x/lower.isle line 804. 11015 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11016 let expr1_0: u64 = 1; 11017 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11018 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11019 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11020 return Some(expr4_0); 11021 } 11022 _ => {} 11023 } 11024 } 11025 _ => {} 11026 } 11027 } 11028 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11029 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11030 match &pattern4_0 { 11031 &InstructionData::Binary { 11032 opcode: ref pattern5_0, 11033 args: ref pattern5_1, 11034 } => { 11035 match pattern5_0 { 11036 &Opcode::Rotl => { 11037 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11038 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11039 // Rule at src/isa/s390x/lower.isle line 528. 11040 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11041 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11042 let expr2_0 = 11043 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11044 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11045 return Some(expr3_0); 11046 } 11047 // Rule at src/isa/s390x/lower.isle line 524. 11048 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11049 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11050 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11051 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11052 return Some(expr3_0); 11053 } 11054 &Opcode::Rotr => { 11055 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11056 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11057 // Rule at src/isa/s390x/lower.isle line 566. 11058 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11059 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11060 let expr2_0 = 11061 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11062 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11063 return Some(expr3_0); 11064 } 11065 // Rule at src/isa/s390x/lower.isle line 560. 11066 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11067 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11068 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11069 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11070 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11071 return Some(expr4_0); 11072 } 11073 _ => {} 11074 } 11075 } 11076 &InstructionData::AtomicRmw { 11077 opcode: ref pattern5_0, 11078 args: ref pattern5_1, 11079 flags: pattern5_2, 11080 op: ref pattern5_3, 11081 } => { 11082 if let &Opcode::AtomicRmw = pattern5_0 { 11083 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11084 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11085 match pattern5_3 { 11086 &AtomicRmwOp::And => { 11087 // Rule at src/isa/s390x/lower.isle line 1505. 11088 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11089 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11090 let expr2_0 = C::zero_offset(ctx); 11091 let expr3_0 = constructor_lower_address( 11092 ctx, pattern5_2, pattern7_0, expr2_0, 11093 )?; 11094 let expr4_0 = constructor_atomic_rmw_and( 11095 ctx, pattern3_0, expr1_0, &expr3_0, 11096 )?; 11097 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11098 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11099 return Some(expr6_0); 11100 } 11101 &AtomicRmwOp::Or => { 11102 // Rule at src/isa/s390x/lower.isle line 1517. 11103 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11104 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11105 let expr2_0 = C::zero_offset(ctx); 11106 let expr3_0 = constructor_lower_address( 11107 ctx, pattern5_2, pattern7_0, expr2_0, 11108 )?; 11109 let expr4_0 = constructor_atomic_rmw_or( 11110 ctx, pattern3_0, expr1_0, &expr3_0, 11111 )?; 11112 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11113 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11114 return Some(expr6_0); 11115 } 11116 &AtomicRmwOp::Xor => { 11117 // Rule at src/isa/s390x/lower.isle line 1529. 11118 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11119 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11120 let expr2_0 = C::zero_offset(ctx); 11121 let expr3_0 = constructor_lower_address( 11122 ctx, pattern5_2, pattern7_0, expr2_0, 11123 )?; 11124 let expr4_0 = constructor_atomic_rmw_xor( 11125 ctx, pattern3_0, expr1_0, &expr3_0, 11126 )?; 11127 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11128 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11129 return Some(expr6_0); 11130 } 11131 _ => {} 11132 } 11133 } 11134 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11135 match pattern5_3 { 11136 &AtomicRmwOp::Add => { 11137 // Rule at src/isa/s390x/lower.isle line 1535. 11138 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11139 let expr1_0 = C::zero_offset(ctx); 11140 let expr2_0 = constructor_lower_address( 11141 ctx, pattern5_2, pattern7_0, expr1_0, 11142 )?; 11143 let expr3_0 = constructor_atomic_rmw_add( 11144 ctx, pattern3_0, expr0_0, &expr2_0, 11145 )?; 11146 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11147 return Some(expr4_0); 11148 } 11149 &AtomicRmwOp::And => { 11150 // Rule at src/isa/s390x/lower.isle line 1499. 11151 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11152 let expr1_0 = C::zero_offset(ctx); 11153 let expr2_0 = constructor_lower_address( 11154 ctx, pattern5_2, pattern7_0, expr1_0, 11155 )?; 11156 let expr3_0 = constructor_atomic_rmw_and( 11157 ctx, pattern3_0, expr0_0, &expr2_0, 11158 )?; 11159 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11160 return Some(expr4_0); 11161 } 11162 &AtomicRmwOp::Or => { 11163 // Rule at src/isa/s390x/lower.isle line 1511. 11164 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11165 let expr1_0 = C::zero_offset(ctx); 11166 let expr2_0 = constructor_lower_address( 11167 ctx, pattern5_2, pattern7_0, expr1_0, 11168 )?; 11169 let expr3_0 = constructor_atomic_rmw_or( 11170 ctx, pattern3_0, expr0_0, &expr2_0, 11171 )?; 11172 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11173 return Some(expr4_0); 11174 } 11175 &AtomicRmwOp::Sub => { 11176 // Rule at src/isa/s390x/lower.isle line 1541. 11177 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11178 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11179 let expr2_0 = C::zero_offset(ctx); 11180 let expr3_0 = constructor_lower_address( 11181 ctx, pattern5_2, pattern7_0, expr2_0, 11182 )?; 11183 let expr4_0 = constructor_atomic_rmw_add( 11184 ctx, pattern3_0, expr1_0, &expr3_0, 11185 )?; 11186 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11187 return Some(expr5_0); 11188 } 11189 &AtomicRmwOp::Xor => { 11190 // Rule at src/isa/s390x/lower.isle line 1523. 11191 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11192 let expr1_0 = C::zero_offset(ctx); 11193 let expr2_0 = constructor_lower_address( 11194 ctx, pattern5_2, pattern7_0, expr1_0, 11195 )?; 11196 let expr3_0 = constructor_atomic_rmw_xor( 11197 ctx, pattern3_0, expr0_0, &expr2_0, 11198 )?; 11199 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11200 return Some(expr4_0); 11201 } 11202 _ => {} 11203 } 11204 } 11205 // Rule at src/isa/s390x/lower.isle line 1550. 11206 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11207 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11208 let expr2_0 = C::inst_builder_new(ctx); 11209 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11210 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11211 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11212 let expr6_0 = constructor_atomic_rmw_body( 11213 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11214 expr0_0, 11215 )?; 11216 let expr7_0 = constructor_casloop( 11217 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11218 )?; 11219 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11220 return Some(expr8_0); 11221 } 11222 } 11223 &InstructionData::AtomicCas { 11224 opcode: ref pattern5_0, 11225 args: ref pattern5_1, 11226 flags: pattern5_2, 11227 } => { 11228 if let &Opcode::AtomicCas = pattern5_0 { 11229 let (pattern7_0, pattern7_1, pattern7_2) = 11230 C::unpack_value_array_3(ctx, pattern5_1); 11231 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11232 // Rule at src/isa/s390x/lower.isle line 1762. 11233 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11234 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11235 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11236 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11237 let expr4_0 = C::zero_offset(ctx); 11238 let expr5_0 = 11239 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11240 let expr6_0 = constructor_atomic_cas_impl( 11241 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11242 )?; 11243 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11244 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11245 return Some(expr8_0); 11246 } 11247 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11248 // Rule at src/isa/s390x/lower.isle line 1755. 11249 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11250 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11251 let expr2_0 = C::zero_offset(ctx); 11252 let expr3_0 = 11253 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11254 let expr4_0 = constructor_atomic_cas_impl( 11255 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11256 )?; 11257 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11258 return Some(expr5_0); 11259 } 11260 } 11261 } 11262 &InstructionData::Unary { 11263 opcode: ref pattern5_0, 11264 arg: pattern5_1, 11265 } => { 11266 match pattern5_0 { 11267 &Opcode::FcvtToUint => { 11268 let pattern7_0 = C::value_type(ctx, pattern5_1); 11269 // Rule at src/isa/s390x/lower.isle line 1057. 11270 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11271 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11272 let expr2_0 = FloatCC::Unordered; 11273 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11274 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11275 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11276 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11277 ctx, pattern3_0, pattern7_0, expr0_0, 11278 )?; 11279 let expr7_0 = FloatCC::Unordered; 11280 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11281 let expr9_0 = C::trap_code_integer_overflow(ctx); 11282 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11283 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11284 return Some(expr11_0); 11285 } 11286 &Opcode::FcvtToUintSat => { 11287 let pattern7_0 = C::value_type(ctx, pattern5_1); 11288 // Rule at src/isa/s390x/lower.isle line 1098. 11289 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11290 let expr1_0 = 11291 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11292 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11293 let expr3_0 = FloatCC::Unordered; 11294 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11295 let expr5_0: i16 = 0; 11296 let expr6_0 = 11297 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11298 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11299 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11300 return Some(expr8_0); 11301 } 11302 &Opcode::FcvtToSint => { 11303 let pattern7_0 = C::value_type(ctx, pattern5_1); 11304 // Rule at src/isa/s390x/lower.isle line 1078. 11305 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11306 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11307 let expr2_0 = FloatCC::Unordered; 11308 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11309 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11310 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11311 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11312 ctx, pattern3_0, pattern7_0, expr0_0, 11313 )?; 11314 let expr7_0 = FloatCC::Unordered; 11315 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11316 let expr9_0 = C::trap_code_integer_overflow(ctx); 11317 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11318 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11319 return Some(expr11_0); 11320 } 11321 &Opcode::FcvtToSintSat => { 11322 let pattern7_0 = C::value_type(ctx, pattern5_1); 11323 // Rule at src/isa/s390x/lower.isle line 1115. 11324 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11325 let expr1_0 = 11326 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11327 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11328 let expr3_0 = FloatCC::Unordered; 11329 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11330 let expr5_0: i16 = 0; 11331 let expr6_0 = 11332 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11333 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11334 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11335 return Some(expr8_0); 11336 } 11337 _ => {} 11338 } 11339 } 11340 _ => {} 11341 } 11342 } 11343 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11344 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11345 match &pattern4_0 { 11346 &InstructionData::Binary { 11347 opcode: ref pattern5_0, 11348 args: ref pattern5_1, 11349 } => { 11350 match pattern5_0 { 11351 &Opcode::Umulhi => { 11352 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11353 // Rule at src/isa/s390x/lower.isle line 245. 11354 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11355 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11356 let expr2_0: Type = I32; 11357 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11358 let expr4_0: Type = I32; 11359 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11360 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11361 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11362 return Some(expr7_0); 11363 } 11364 &Opcode::Smulhi => { 11365 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11366 // Rule at src/isa/s390x/lower.isle line 267. 11367 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11368 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11369 let expr2_0: Type = I32; 11370 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11371 let expr4_0: Type = I32; 11372 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11373 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11374 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11375 return Some(expr7_0); 11376 } 11377 &Opcode::Rotl => { 11378 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11379 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11380 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11381 { 11382 // Rule at src/isa/s390x/lower.isle line 546. 11383 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11384 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11385 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11386 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11387 let expr4_0 = 11388 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11389 let expr5_0 = 11390 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11391 let expr6_0 = 11392 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11393 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11394 return Some(expr7_0); 11395 } 11396 } 11397 // Rule at src/isa/s390x/lower.isle line 534. 11398 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11399 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11400 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11401 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11402 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11403 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11404 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11405 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11406 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11407 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11408 return Some(expr9_0); 11409 } 11410 &Opcode::Rotr => { 11411 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11412 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11413 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11414 { 11415 // Rule at src/isa/s390x/lower.isle line 584. 11416 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11417 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11418 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11419 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11420 let expr4_0 = 11421 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11422 let expr5_0 = 11423 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11424 let expr6_0 = 11425 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11426 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11427 return Some(expr7_0); 11428 } 11429 } 11430 // Rule at src/isa/s390x/lower.isle line 572. 11431 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11432 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11433 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11434 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11435 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11436 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11437 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11438 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11439 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11440 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11441 return Some(expr9_0); 11442 } 11443 _ => {} 11444 } 11445 } 11446 &InstructionData::AtomicRmw { 11447 opcode: ref pattern5_0, 11448 args: ref pattern5_1, 11449 flags: pattern5_2, 11450 op: ref pattern5_3, 11451 } => { 11452 if let &Opcode::AtomicRmw = pattern5_0 { 11453 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11454 // Rule at src/isa/s390x/lower.isle line 1562. 11455 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11456 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11457 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11458 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11459 let expr4_0 = C::inst_builder_new(ctx); 11460 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11461 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11462 let expr7_0 = constructor_casloop_rotate_in( 11463 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11464 )?; 11465 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11466 let expr9_0 = constructor_atomic_rmw_body( 11467 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11468 expr0_0, 11469 )?; 11470 let expr10_0 = constructor_casloop_rotate_out( 11471 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11472 )?; 11473 let expr11_0 = constructor_casloop_subword( 11474 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11475 )?; 11476 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11477 return Some(expr12_0); 11478 } 11479 } 11480 &InstructionData::AtomicCas { 11481 opcode: ref pattern5_0, 11482 args: ref pattern5_1, 11483 flags: pattern5_2, 11484 } => { 11485 if let &Opcode::AtomicCas = pattern5_0 { 11486 let (pattern7_0, pattern7_1, pattern7_2) = 11487 C::unpack_value_array_3(ctx, pattern5_1); 11488 // Rule at src/isa/s390x/lower.isle line 1769. 11489 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11490 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11491 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11492 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11493 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11494 let expr5_0 = C::inst_builder_new(ctx); 11495 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11496 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11497 let expr8_0 = constructor_casloop_rotate_in( 11498 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11499 )?; 11500 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11501 let expr10_0 = constructor_atomic_cas_body( 11502 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11503 expr1_0, 11504 )?; 11505 let expr11_0 = constructor_casloop_rotate_out( 11506 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11507 )?; 11508 let expr12_0 = constructor_casloop_subword( 11509 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11510 )?; 11511 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11512 return Some(expr13_0); 11513 } 11514 } 11515 _ => {} 11516 } 11517 } 11518 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11519 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11520 match &pattern4_0 { 11521 &InstructionData::Unary { 11522 opcode: ref pattern5_0, 11523 arg: pattern5_1, 11524 } => { 11525 match pattern5_0 { 11526 &Opcode::Ctz => { 11527 // Rule at src/isa/s390x/lower.isle line 859. 11528 let expr0_0: Type = I64; 11529 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11530 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11531 let expr3_0 = 11532 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11533 let expr4_0: Type = I64; 11534 let expr5_0: Type = I64; 11535 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11536 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11537 let expr8_0: i16 = 64; 11538 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11539 let expr10_0: u64 = 63; 11540 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11541 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11542 let expr13_0 = 11543 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11544 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11545 return Some(expr14_0); 11546 } 11547 &Opcode::Uextend => { 11548 // Rule at src/isa/s390x/lower.isle line 603. 11549 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11550 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11551 return Some(expr1_0); 11552 } 11553 &Opcode::Sextend => { 11554 // Rule at src/isa/s390x/lower.isle line 614. 11555 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11556 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11557 return Some(expr1_0); 11558 } 11559 _ => {} 11560 } 11561 } 11562 &InstructionData::Load { 11563 opcode: ref pattern5_0, 11564 arg: pattern5_1, 11565 flags: pattern5_2, 11566 offset: pattern5_3, 11567 } => { 11568 match pattern5_0 { 11569 &Opcode::Uload8 => { 11570 // Rule at src/isa/s390x/lower.isle line 1251. 11571 let expr0_0: Type = I8; 11572 let expr1_0 = 11573 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11574 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11575 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11576 return Some(expr3_0); 11577 } 11578 &Opcode::Sload8 => { 11579 // Rule at src/isa/s390x/lower.isle line 1262. 11580 let expr0_0: Type = I8; 11581 let expr1_0 = 11582 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11583 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11584 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11585 return Some(expr3_0); 11586 } 11587 &Opcode::Uload16 => { 11588 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11589 // Rule at src/isa/s390x/lower.isle line 1278. 11590 let expr0_0 = constructor_lower_address( 11591 ctx, pattern5_2, pattern5_1, pattern5_3, 11592 )?; 11593 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11594 let expr2_0: Type = I16; 11595 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11596 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11597 return Some(expr4_0); 11598 } 11599 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11600 // Rule at src/isa/s390x/lower.isle line 1273. 11601 let expr0_0: Type = I16; 11602 let expr1_0 = constructor_lower_address( 11603 ctx, pattern5_2, pattern5_1, pattern5_3, 11604 )?; 11605 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11606 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11607 return Some(expr3_0); 11608 } 11609 } 11610 &Opcode::Sload16 => { 11611 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11612 // Rule at src/isa/s390x/lower.isle line 1303. 11613 let expr0_0 = constructor_lower_address( 11614 ctx, pattern5_2, pattern5_1, pattern5_3, 11615 )?; 11616 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11617 let expr2_0: Type = I16; 11618 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11619 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11620 return Some(expr4_0); 11621 } 11622 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11623 // Rule at src/isa/s390x/lower.isle line 1298. 11624 let expr0_0: Type = I16; 11625 let expr1_0 = constructor_lower_address( 11626 ctx, pattern5_2, pattern5_1, pattern5_3, 11627 )?; 11628 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11629 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11630 return Some(expr3_0); 11631 } 11632 } 11633 _ => {} 11634 } 11635 } 11636 _ => {} 11637 } 11638 } 11639 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11640 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11641 match &pattern4_0 { 11642 &InstructionData::Unary { 11643 opcode: ref pattern5_0, 11644 arg: pattern5_1, 11645 } => { 11646 match pattern5_0 { 11647 &Opcode::Ctz => { 11648 // Rule at src/isa/s390x/lower.isle line 874. 11649 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11650 let expr1_0: Type = I64; 11651 let expr2_0: Type = I64; 11652 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11653 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11654 let expr5_0: i16 = -1; 11655 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11656 let expr7_0: Type = I64; 11657 let expr8_0: Type = I64; 11658 let expr9_0: u64 = 63; 11659 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11660 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11661 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11662 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11663 return Some(expr13_0); 11664 } 11665 &Opcode::Uextend => { 11666 // Rule at src/isa/s390x/lower.isle line 607. 11667 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11668 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11669 return Some(expr1_0); 11670 } 11671 &Opcode::Sextend => { 11672 // Rule at src/isa/s390x/lower.isle line 618. 11673 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11674 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11675 return Some(expr1_0); 11676 } 11677 _ => {} 11678 } 11679 } 11680 &InstructionData::Load { 11681 opcode: ref pattern5_0, 11682 arg: pattern5_1, 11683 flags: pattern5_2, 11684 offset: pattern5_3, 11685 } => { 11686 match pattern5_0 { 11687 &Opcode::Uload8 => { 11688 // Rule at src/isa/s390x/lower.isle line 1255. 11689 let expr0_0: Type = I8; 11690 let expr1_0 = 11691 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11692 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11693 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11694 return Some(expr3_0); 11695 } 11696 &Opcode::Sload8 => { 11697 // Rule at src/isa/s390x/lower.isle line 1266. 11698 let expr0_0: Type = I8; 11699 let expr1_0 = 11700 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11701 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11702 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11703 return Some(expr3_0); 11704 } 11705 &Opcode::Uload16 => { 11706 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11707 // Rule at src/isa/s390x/lower.isle line 1289. 11708 let expr0_0 = constructor_lower_address( 11709 ctx, pattern5_2, pattern5_1, pattern5_3, 11710 )?; 11711 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11712 let expr2_0: Type = I16; 11713 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11714 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11715 return Some(expr4_0); 11716 } 11717 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11718 // Rule at src/isa/s390x/lower.isle line 1284. 11719 let expr0_0: Type = I16; 11720 let expr1_0 = constructor_lower_address( 11721 ctx, pattern5_2, pattern5_1, pattern5_3, 11722 )?; 11723 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11724 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11725 return Some(expr3_0); 11726 } 11727 } 11728 &Opcode::Sload16 => { 11729 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11730 // Rule at src/isa/s390x/lower.isle line 1314. 11731 let expr0_0 = constructor_lower_address( 11732 ctx, pattern5_2, pattern5_1, pattern5_3, 11733 )?; 11734 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11735 let expr2_0: Type = I16; 11736 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11737 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11738 return Some(expr4_0); 11739 } 11740 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11741 // Rule at src/isa/s390x/lower.isle line 1309. 11742 let expr0_0: Type = I16; 11743 let expr1_0 = constructor_lower_address( 11744 ctx, pattern5_2, pattern5_1, pattern5_3, 11745 )?; 11746 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11747 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11748 return Some(expr3_0); 11749 } 11750 } 11751 &Opcode::Uload32 => { 11752 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11753 // Rule at src/isa/s390x/lower.isle line 1328. 11754 let expr0_0 = constructor_lower_address( 11755 ctx, pattern5_2, pattern5_1, pattern5_3, 11756 )?; 11757 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11758 let expr2_0: Type = I32; 11759 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11760 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11761 return Some(expr4_0); 11762 } 11763 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11764 // Rule at src/isa/s390x/lower.isle line 1323. 11765 let expr0_0: Type = I32; 11766 let expr1_0 = constructor_lower_address( 11767 ctx, pattern5_2, pattern5_1, pattern5_3, 11768 )?; 11769 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11770 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11771 return Some(expr3_0); 11772 } 11773 } 11774 &Opcode::Sload32 => { 11775 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11776 // Rule at src/isa/s390x/lower.isle line 1342. 11777 let expr0_0 = constructor_lower_address( 11778 ctx, pattern5_2, pattern5_1, pattern5_3, 11779 )?; 11780 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11781 let expr2_0: Type = I32; 11782 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11783 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11784 return Some(expr4_0); 11785 } 11786 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11787 // Rule at src/isa/s390x/lower.isle line 1337. 11788 let expr0_0: Type = I32; 11789 let expr1_0 = constructor_lower_address( 11790 ctx, pattern5_2, pattern5_1, pattern5_3, 11791 )?; 11792 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11793 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11794 return Some(expr3_0); 11795 } 11796 } 11797 _ => {} 11798 } 11799 } 11800 _ => {} 11801 } 11802 } 11803 } 11804 return None; 11805 } 11806 11807 // Generated as internal constructor for term lower_branch. 11808 pub fn constructor_lower_branch<C: Context>( 11809 ctx: &mut C, 11810 arg0: Inst, 11811 arg1: &VecMachLabel, 11812 ) -> Option<InstOutput> { 11813 let pattern0_0 = arg0; 11814 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11815 match &pattern1_0 { 11816 &InstructionData::BranchTable { 11817 opcode: ref pattern2_0, 11818 arg: pattern2_1, 11819 destination: pattern2_2, 11820 table: pattern2_3, 11821 } => { 11822 if let &Opcode::BrTable = pattern2_0 { 11823 let pattern4_0 = arg1; 11824 // Rule at src/isa/s390x/lower.isle line 2076. 11825 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11826 let expr1_0: Type = I64; 11827 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11828 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11829 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11830 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11831 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11832 let expr7_0: u8 = 0; 11833 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11834 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11835 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11836 let expr11_0: Type = I64; 11837 let expr12_0: u8 = 2; 11838 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11839 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11840 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11841 return Some(expr15_0); 11842 } 11843 } 11844 &InstructionData::Branch { 11845 opcode: ref pattern2_0, 11846 args: pattern2_1, 11847 destination: pattern2_2, 11848 } => { 11849 match pattern2_0 { 11850 &Opcode::Brz => { 11851 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11852 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11853 let pattern6_0 = arg1; 11854 // Rule at src/isa/s390x/lower.isle line 2109. 11855 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11856 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11857 let expr2_0: u8 = 0; 11858 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11859 let expr4_0: u8 = 1; 11860 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11861 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11862 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11863 return Some(expr7_0); 11864 } 11865 } 11866 &Opcode::Brnz => { 11867 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11868 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11869 let pattern6_0 = arg1; 11870 // Rule at src/isa/s390x/lower.isle line 2120. 11871 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11872 let expr1_0: u8 = 0; 11873 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11874 let expr3_0: u8 = 1; 11875 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11876 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11877 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11878 return Some(expr6_0); 11879 } 11880 } 11881 _ => {} 11882 } 11883 } 11884 &InstructionData::Jump { 11885 opcode: ref pattern2_0, 11886 args: pattern2_1, 11887 destination: pattern2_2, 11888 } => { 11889 if let &Opcode::Jump = pattern2_0 { 11890 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11891 let pattern5_0 = arg1; 11892 // Rule at src/isa/s390x/lower.isle line 2068. 11893 let expr0_0: u8 = 0; 11894 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11895 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11896 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11897 return Some(expr3_0); 11898 } 11899 } 11900 &InstructionData::BranchInt { 11901 opcode: ref pattern2_0, 11902 args: pattern2_1, 11903 cond: ref pattern2_2, 11904 destination: pattern2_3, 11905 } => { 11906 if let &Opcode::Brif = pattern2_0 { 11907 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11908 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11909 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11910 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11911 if let &InstructionData::Binary { 11912 opcode: ref pattern8_0, 11913 args: ref pattern8_1, 11914 } = &pattern7_0 11915 { 11916 if let &Opcode::Ifcmp = pattern8_0 { 11917 let (pattern10_0, pattern10_1) = 11918 C::unpack_value_array_2(ctx, pattern8_1); 11919 let pattern11_0 = arg1; 11920 // Rule at src/isa/s390x/lower.isle line 2131. 11921 let expr0_0: bool = false; 11922 let expr1_0 = constructor_icmp_val( 11923 ctx, 11924 expr0_0, 11925 pattern2_2, 11926 pattern10_0, 11927 pattern10_1, 11928 )?; 11929 let expr2_0: u8 = 0; 11930 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11931 let expr4_0: u8 = 1; 11932 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11933 let expr6_0 = 11934 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11935 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11936 return Some(expr7_0); 11937 } 11938 } 11939 } 11940 } 11941 } 11942 } 11943 _ => {} 11944 } 11945 return None; 11946 } 11947 11948 // Generated as internal constructor for term output_ifcout. 11949 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11950 let pattern0_0 = arg0; 11951 // Rule at src/isa/s390x/lower.isle line 154. 11952 let expr0_0 = C::value_reg(ctx, pattern0_0); 11953 let expr1_0 = C::value_regs_invalid(ctx); 11954 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11955 return Some(expr2_0); 11956 } 11957 11958 // Generated as internal constructor for term zero_divisor_check_needed. 11959 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11960 let pattern0_0 = arg0; 11961 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11962 let pattern2_0 = 0; 11963 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11964 // Rule at src/isa/s390x/lower.isle line 344. 11965 let expr0_0: bool = false; 11966 return Some(expr0_0); 11967 } 11968 } 11969 let pattern1_0 = C::value_type(ctx, pattern0_0); 11970 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11971 // Rule at src/isa/s390x/lower.isle line 345. 11972 let expr0_0: bool = false; 11973 return Some(expr0_0); 11974 } 11975 // Rule at src/isa/s390x/lower.isle line 346. 11976 let expr0_0: bool = true; 11977 return Some(expr0_0); 11978 } 11979 11980 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11981 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11982 ctx: &mut C, 11983 arg0: bool, 11984 arg1: Type, 11985 arg2: Reg, 11986 ) -> Option<Reg> { 11987 let pattern0_0 = arg0; 11988 if pattern0_0 == true { 11989 let pattern2_0 = arg1; 11990 let pattern3_0 = arg2; 11991 // Rule at src/isa/s390x/lower.isle line 352. 11992 let expr0_0: i16 = 0; 11993 let expr1_0 = IntCC::Equal; 11994 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11995 let expr3_0 = C::trap_code_division_by_zero(ctx); 11996 let expr4_0 = constructor_icmps_simm16_and_trap( 11997 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 11998 )?; 11999 return Some(expr4_0); 12000 } 12001 if pattern0_0 == false { 12002 let pattern2_0 = arg1; 12003 let pattern3_0 = arg2; 12004 // Rule at src/isa/s390x/lower.isle line 351. 12005 let expr0_0 = C::invalid_reg(ctx); 12006 return Some(expr0_0); 12007 } 12008 return None; 12009 } 12010 12011 // Generated as internal constructor for term div_overflow_check_needed. 12012 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12013 let pattern0_0 = arg0; 12014 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12015 let pattern2_0 = -1; 12016 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12017 // Rule at src/isa/s390x/lower.isle line 425. 12018 let expr0_0: bool = false; 12019 return Some(expr0_0); 12020 } 12021 } 12022 // Rule at src/isa/s390x/lower.isle line 426. 12023 let expr0_0: bool = true; 12024 return Some(expr0_0); 12025 } 12026 12027 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12028 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12029 ctx: &mut C, 12030 arg0: bool, 12031 arg1: Type, 12032 arg2: Type, 12033 arg3: &RegPair, 12034 arg4: Reg, 12035 ) -> Option<Reg> { 12036 let pattern0_0 = arg0; 12037 if pattern0_0 == true { 12038 let pattern2_0 = arg1; 12039 let pattern3_0 = arg2; 12040 let pattern4_0 = arg3; 12041 let pattern5_0 = arg4; 12042 // Rule at src/isa/s390x/lower.isle line 439. 12043 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12044 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12045 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12046 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12047 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12048 let expr5_0: i16 = -1; 12049 let expr6_0 = IntCC::Equal; 12050 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12051 let expr8_0 = C::trap_code_integer_overflow(ctx); 12052 let expr9_0 = constructor_icmps_simm16_and_trap( 12053 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12054 )?; 12055 return Some(expr9_0); 12056 } 12057 if pattern0_0 == false { 12058 let pattern2_0 = arg1; 12059 let pattern3_0 = arg2; 12060 let pattern4_0 = arg3; 12061 let pattern5_0 = arg4; 12062 // Rule at src/isa/s390x/lower.isle line 438. 12063 let expr0_0 = C::invalid_reg(ctx); 12064 return Some(expr0_0); 12065 } 12066 return None; 12067 } 12068 12069 // Generated as internal constructor for term int_max. 12070 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12071 let pattern0_0 = arg0; 12072 if pattern0_0 == I8 { 12073 // Rule at src/isa/s390x/lower.isle line 447. 12074 let expr0_0: u64 = 127; 12075 return Some(expr0_0); 12076 } 12077 if pattern0_0 == I16 { 12078 // Rule at src/isa/s390x/lower.isle line 448. 12079 let expr0_0: u64 = 32767; 12080 return Some(expr0_0); 12081 } 12082 if pattern0_0 == I32 { 12083 // Rule at src/isa/s390x/lower.isle line 449. 12084 let expr0_0: u64 = 2147483647; 12085 return Some(expr0_0); 12086 } 12087 if pattern0_0 == I64 { 12088 // Rule at src/isa/s390x/lower.isle line 450. 12089 let expr0_0: u64 = 9223372036854775807; 12090 return Some(expr0_0); 12091 } 12092 return None; 12093 } 12094 12095 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12096 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12097 ctx: &mut C, 12098 arg0: bool, 12099 arg1: Type, 12100 arg2: &RegPair, 12101 arg3: Reg, 12102 ) -> Option<RegPair> { 12103 let pattern0_0 = arg0; 12104 if pattern0_0 == true { 12105 let pattern2_0 = arg1; 12106 if pattern2_0 == I32 { 12107 let pattern4_0 = arg2; 12108 let pattern5_0 = arg3; 12109 // Rule at src/isa/s390x/lower.isle line 468. 12110 return Some(pattern4_0.clone()); 12111 } 12112 if pattern2_0 == I64 { 12113 let pattern4_0 = arg2; 12114 let pattern5_0 = arg3; 12115 // Rule at src/isa/s390x/lower.isle line 469. 12116 let expr0_0: Type = I64; 12117 let expr1_0: Type = I64; 12118 let expr2_0: i16 = -1; 12119 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12120 let expr4_0 = IntCC::Equal; 12121 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12122 let expr6_0: i16 = 0; 12123 let expr7_0 = constructor_cmov_imm_regpair_lo( 12124 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12125 )?; 12126 return Some(expr7_0); 12127 } 12128 } 12129 if pattern0_0 == false { 12130 let pattern2_0 = arg1; 12131 let pattern3_0 = arg2; 12132 let pattern4_0 = arg3; 12133 // Rule at src/isa/s390x/lower.isle line 467. 12134 return Some(pattern3_0.clone()); 12135 } 12136 return None; 12137 } 12138 12139 // Generated as internal constructor for term cast_bool. 12140 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12141 let pattern0_0 = arg0; 12142 if pattern0_0 == B1 { 12143 let pattern2_0 = arg1; 12144 let pattern3_0 = C::value_type(ctx, pattern2_0); 12145 if pattern3_0 == B1 { 12146 // Rule at src/isa/s390x/lower.isle line 766. 12147 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12148 return Some(expr0_0); 12149 } 12150 if pattern3_0 == B8 { 12151 // Rule at src/isa/s390x/lower.isle line 767. 12152 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12153 return Some(expr0_0); 12154 } 12155 } 12156 if pattern0_0 == B8 { 12157 let pattern2_0 = arg1; 12158 let pattern3_0 = C::value_type(ctx, pattern2_0); 12159 if pattern3_0 == B8 { 12160 // Rule at src/isa/s390x/lower.isle line 768. 12161 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12162 return Some(expr0_0); 12163 } 12164 } 12165 if pattern0_0 == I8 { 12166 let pattern2_0 = arg1; 12167 let pattern3_0 = C::value_type(ctx, pattern2_0); 12168 if pattern3_0 == B8 { 12169 // Rule at src/isa/s390x/lower.isle line 769. 12170 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12171 return Some(expr0_0); 12172 } 12173 } 12174 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12175 let pattern2_0 = arg1; 12176 let pattern3_0 = C::value_type(ctx, pattern2_0); 12177 if pattern3_0 == B16 { 12178 // Rule at src/isa/s390x/lower.isle line 770. 12179 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12180 return Some(expr0_0); 12181 } 12182 } 12183 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12184 let pattern2_0 = arg1; 12185 let pattern3_0 = C::value_type(ctx, pattern2_0); 12186 if pattern3_0 == B32 { 12187 // Rule at src/isa/s390x/lower.isle line 771. 12188 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12189 return Some(expr0_0); 12190 } 12191 } 12192 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12193 let pattern2_0 = arg1; 12194 let pattern3_0 = C::value_type(ctx, pattern2_0); 12195 if pattern3_0 == B64 { 12196 // Rule at src/isa/s390x/lower.isle line 772. 12197 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12198 return Some(expr0_0); 12199 } 12200 } 12201 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12202 let pattern2_0 = arg1; 12203 let pattern3_0 = C::value_type(ctx, pattern2_0); 12204 if pattern3_0 == B1 { 12205 // Rule at src/isa/s390x/lower.isle line 775. 12206 let expr0_0: Type = I32; 12207 let expr1_0: Type = I32; 12208 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12209 let expr3_0: u8 = 31; 12210 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12211 let expr5_0: u8 = 31; 12212 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12213 return Some(expr6_0); 12214 } 12215 if pattern3_0 == B8 { 12216 // Rule at src/isa/s390x/lower.isle line 781. 12217 let expr0_0: Type = I8; 12218 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12219 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12220 return Some(expr2_0); 12221 } 12222 if pattern3_0 == B16 { 12223 // Rule at src/isa/s390x/lower.isle line 783. 12224 let expr0_0: Type = I16; 12225 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12226 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12227 return Some(expr2_0); 12228 } 12229 } 12230 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12231 let pattern2_0 = arg1; 12232 let pattern3_0 = C::value_type(ctx, pattern2_0); 12233 if pattern3_0 == B1 { 12234 // Rule at src/isa/s390x/lower.isle line 777. 12235 let expr0_0: Type = I64; 12236 let expr1_0: Type = I64; 12237 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12238 let expr3_0: u8 = 63; 12239 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12240 let expr5_0: u8 = 63; 12241 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12242 return Some(expr6_0); 12243 } 12244 if pattern3_0 == B8 { 12245 // Rule at src/isa/s390x/lower.isle line 785. 12246 let expr0_0: Type = I8; 12247 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12248 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12249 return Some(expr2_0); 12250 } 12251 if pattern3_0 == B16 { 12252 // Rule at src/isa/s390x/lower.isle line 787. 12253 let expr0_0: Type = I16; 12254 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12255 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12256 return Some(expr2_0); 12257 } 12258 if pattern3_0 == B32 { 12259 // Rule at src/isa/s390x/lower.isle line 789. 12260 let expr0_0: Type = I32; 12261 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12262 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12263 return Some(expr2_0); 12264 } 12265 } 12266 return None; 12267 } 12268 12269 // Generated as internal constructor for term clz_offset. 12270 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12271 let pattern0_0 = arg0; 12272 if pattern0_0 == I8 { 12273 let pattern2_0 = arg1; 12274 // Rule at src/isa/s390x/lower.isle line 814. 12275 let expr0_0: Type = I8; 12276 let expr1_0: i16 = -56; 12277 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12278 return Some(expr2_0); 12279 } 12280 if pattern0_0 == I16 { 12281 let pattern2_0 = arg1; 12282 // Rule at src/isa/s390x/lower.isle line 815. 12283 let expr0_0: Type = I16; 12284 let expr1_0: i16 = -48; 12285 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12286 return Some(expr2_0); 12287 } 12288 if pattern0_0 == I32 { 12289 let pattern2_0 = arg1; 12290 // Rule at src/isa/s390x/lower.isle line 816. 12291 let expr0_0: Type = I32; 12292 let expr1_0: i16 = -32; 12293 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12294 return Some(expr2_0); 12295 } 12296 if pattern0_0 == I64 { 12297 let pattern2_0 = arg1; 12298 // Rule at src/isa/s390x/lower.isle line 817. 12299 let expr0_0: Type = I64; 12300 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12301 return Some(expr1_0); 12302 } 12303 return None; 12304 } 12305 12306 // Generated as internal constructor for term ctz_guardbit. 12307 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12308 let pattern0_0 = arg0; 12309 if pattern0_0 == I8 { 12310 // Rule at src/isa/s390x/lower.isle line 866. 12311 let expr0_0: u16 = 256; 12312 let expr1_0: u8 = 0; 12313 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12314 return Some(expr2_0); 12315 } 12316 if pattern0_0 == I16 { 12317 // Rule at src/isa/s390x/lower.isle line 867. 12318 let expr0_0: u16 = 1; 12319 let expr1_0: u8 = 16; 12320 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12321 return Some(expr2_0); 12322 } 12323 if pattern0_0 == I32 { 12324 // Rule at src/isa/s390x/lower.isle line 868. 12325 let expr0_0: u16 = 1; 12326 let expr1_0: u8 = 32; 12327 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12328 return Some(expr2_0); 12329 } 12330 return None; 12331 } 12332 12333 // Generated as internal constructor for term istore8_impl. 12334 pub fn constructor_istore8_impl<C: Context>( 12335 ctx: &mut C, 12336 arg0: MemFlags, 12337 arg1: Value, 12338 arg2: Value, 12339 arg3: Offset32, 12340 ) -> Option<SideEffectNoResult> { 12341 let pattern0_0 = arg0; 12342 let pattern1_0 = arg1; 12343 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12344 let pattern3_0 = arg2; 12345 let pattern4_0 = arg3; 12346 // Rule at src/isa/s390x/lower.isle line 1424. 12347 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12348 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12349 return Some(expr1_0); 12350 } 12351 let pattern2_0 = arg2; 12352 let pattern3_0 = arg3; 12353 // Rule at src/isa/s390x/lower.isle line 1420. 12354 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12355 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12356 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12357 return Some(expr2_0); 12358 } 12359 12360 // Generated as internal constructor for term istore16_impl. 12361 pub fn constructor_istore16_impl<C: Context>( 12362 ctx: &mut C, 12363 arg0: MemFlags, 12364 arg1: Value, 12365 arg2: Value, 12366 arg3: Offset32, 12367 ) -> Option<SideEffectNoResult> { 12368 let pattern0_0 = arg0; 12369 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12370 let pattern2_0 = arg1; 12371 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12372 let pattern4_0 = arg2; 12373 let pattern5_0 = arg3; 12374 // Rule at src/isa/s390x/lower.isle line 1450. 12375 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12376 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12377 return Some(expr1_0); 12378 } 12379 let pattern3_0 = arg2; 12380 let pattern4_0 = arg3; 12381 // Rule at src/isa/s390x/lower.isle line 1442. 12382 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12383 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12384 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12385 return Some(expr2_0); 12386 } 12387 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12388 let pattern2_0 = arg1; 12389 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12390 let pattern4_0 = arg2; 12391 let pattern5_0 = arg3; 12392 // Rule at src/isa/s390x/lower.isle line 1446. 12393 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12394 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12395 return Some(expr1_0); 12396 } 12397 let pattern3_0 = arg2; 12398 let pattern4_0 = arg3; 12399 // Rule at src/isa/s390x/lower.isle line 1438. 12400 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12401 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12402 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12403 return Some(expr2_0); 12404 } 12405 return None; 12406 } 12407 12408 // Generated as internal constructor for term istore32_impl. 12409 pub fn constructor_istore32_impl<C: Context>( 12410 ctx: &mut C, 12411 arg0: MemFlags, 12412 arg1: Value, 12413 arg2: Value, 12414 arg3: Offset32, 12415 ) -> Option<SideEffectNoResult> { 12416 let pattern0_0 = arg0; 12417 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12418 let pattern2_0 = arg1; 12419 let pattern3_0 = arg2; 12420 let pattern4_0 = arg3; 12421 // Rule at src/isa/s390x/lower.isle line 1472. 12422 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12423 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12424 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12425 return Some(expr2_0); 12426 } 12427 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12428 let pattern2_0 = arg1; 12429 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12430 let pattern4_0 = arg2; 12431 let pattern5_0 = arg3; 12432 // Rule at src/isa/s390x/lower.isle line 1468. 12433 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12434 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12435 return Some(expr1_0); 12436 } 12437 let pattern3_0 = arg2; 12438 let pattern4_0 = arg3; 12439 // Rule at src/isa/s390x/lower.isle line 1464. 12440 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12441 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12442 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12443 return Some(expr2_0); 12444 } 12445 return None; 12446 } 12447 12448 // Generated as internal constructor for term istore64_impl. 12449 pub fn constructor_istore64_impl<C: Context>( 12450 ctx: &mut C, 12451 arg0: MemFlags, 12452 arg1: Value, 12453 arg2: Value, 12454 arg3: Offset32, 12455 ) -> Option<SideEffectNoResult> { 12456 let pattern0_0 = arg0; 12457 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12458 let pattern2_0 = arg1; 12459 let pattern3_0 = arg2; 12460 let pattern4_0 = arg3; 12461 // Rule at src/isa/s390x/lower.isle line 1490. 12462 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12463 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12464 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12465 return Some(expr2_0); 12466 } 12467 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12468 let pattern2_0 = arg1; 12469 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12470 let pattern4_0 = arg2; 12471 let pattern5_0 = arg3; 12472 // Rule at src/isa/s390x/lower.isle line 1486. 12473 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12474 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12475 return Some(expr1_0); 12476 } 12477 let pattern3_0 = arg2; 12478 let pattern4_0 = arg3; 12479 // Rule at src/isa/s390x/lower.isle line 1482. 12480 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12481 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12482 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12483 return Some(expr2_0); 12484 } 12485 return None; 12486 } 12487 12488 // Generated as internal constructor for term atomic_rmw_body. 12489 pub fn constructor_atomic_rmw_body<C: Context>( 12490 ctx: &mut C, 12491 arg0: &VecMInstBuilder, 12492 arg1: Type, 12493 arg2: MemFlags, 12494 arg3: &AtomicRmwOp, 12495 arg4: WritableReg, 12496 arg5: Reg, 12497 arg6: Reg, 12498 ) -> Option<Reg> { 12499 let pattern0_0 = arg0; 12500 let pattern1_0 = arg1; 12501 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12502 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12503 let pattern4_0 = arg2; 12504 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12505 let pattern6_0 = arg3; 12506 if let &AtomicRmwOp::Nand = pattern6_0 { 12507 let pattern8_0 = arg4; 12508 let pattern9_0 = arg5; 12509 let pattern10_0 = arg6; 12510 // Rule at src/isa/s390x/lower.isle line 1598. 12511 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12512 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12513 let expr2_0 = constructor_push_alu_reg( 12514 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12515 )?; 12516 return Some(expr2_0); 12517 } 12518 } 12519 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12520 let pattern6_0 = arg3; 12521 if let &AtomicRmwOp::Nand = pattern6_0 { 12522 let pattern8_0 = arg4; 12523 let pattern9_0 = arg5; 12524 let pattern10_0 = arg6; 12525 // Rule at src/isa/s390x/lower.isle line 1595. 12526 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12527 let expr1_0 = constructor_push_alu_reg( 12528 ctx, 12529 pattern0_0, 12530 &expr0_0, 12531 pattern8_0, 12532 pattern9_0, 12533 pattern10_0, 12534 )?; 12535 return Some(expr1_0); 12536 } 12537 } 12538 } 12539 } 12540 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12541 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12542 let pattern4_0 = arg2; 12543 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12544 let pattern6_0 = arg3; 12545 if let &AtomicRmwOp::Nand = pattern6_0 { 12546 let pattern8_0 = arg4; 12547 let pattern9_0 = arg5; 12548 let pattern10_0 = arg6; 12549 // Rule at src/isa/s390x/lower.isle line 1605. 12550 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12551 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12552 let expr2_0 = constructor_push_alu_reg( 12553 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12554 )?; 12555 let expr3_0 = 12556 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12557 return Some(expr3_0); 12558 } 12559 } 12560 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12561 let pattern6_0 = arg3; 12562 if let &AtomicRmwOp::Nand = pattern6_0 { 12563 let pattern8_0 = arg4; 12564 let pattern9_0 = arg5; 12565 let pattern10_0 = arg6; 12566 // Rule at src/isa/s390x/lower.isle line 1601. 12567 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12568 let expr1_0 = constructor_push_alu_reg( 12569 ctx, 12570 pattern0_0, 12571 &expr0_0, 12572 pattern8_0, 12573 pattern9_0, 12574 pattern10_0, 12575 )?; 12576 let expr2_0 = 12577 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12578 return Some(expr2_0); 12579 } 12580 } 12581 } 12582 } 12583 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12584 let pattern3_0 = arg2; 12585 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12586 let pattern5_0 = arg3; 12587 if let &AtomicRmwOp::Xchg = pattern5_0 { 12588 let pattern7_0 = arg4; 12589 let pattern8_0 = arg5; 12590 let pattern9_0 = arg6; 12591 // Rule at src/isa/s390x/lower.isle line 1587. 12592 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12593 return Some(expr0_0); 12594 } 12595 } 12596 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12597 let pattern5_0 = arg3; 12598 if let &AtomicRmwOp::Xchg = pattern5_0 { 12599 let pattern7_0 = arg4; 12600 let pattern8_0 = arg5; 12601 let pattern9_0 = arg6; 12602 // Rule at src/isa/s390x/lower.isle line 1584. 12603 return Some(pattern9_0); 12604 } 12605 } 12606 } 12607 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12608 let pattern3_0 = arg2; 12609 let pattern4_0 = arg3; 12610 match pattern4_0 { 12611 &AtomicRmwOp::And => { 12612 let pattern6_0 = arg4; 12613 let pattern7_0 = arg5; 12614 let pattern8_0 = arg6; 12615 // Rule at src/isa/s390x/lower.isle line 1615. 12616 let expr0_0 = RxSBGOp::And; 12617 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12618 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12619 pattern8_0, 12620 )?; 12621 return Some(expr1_0); 12622 } 12623 &AtomicRmwOp::Nand => { 12624 let pattern6_0 = arg4; 12625 let pattern7_0 = arg5; 12626 let pattern8_0 = arg6; 12627 // Rule at src/isa/s390x/lower.isle line 1621. 12628 let expr0_0 = RxSBGOp::And; 12629 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12630 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12631 pattern8_0, 12632 )?; 12633 let expr2_0 = constructor_atomic_rmw_body_invert( 12634 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12635 )?; 12636 return Some(expr2_0); 12637 } 12638 &AtomicRmwOp::Or => { 12639 let pattern6_0 = arg4; 12640 let pattern7_0 = arg5; 12641 let pattern8_0 = arg6; 12642 // Rule at src/isa/s390x/lower.isle line 1617. 12643 let expr0_0 = RxSBGOp::Or; 12644 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12645 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12646 pattern8_0, 12647 )?; 12648 return Some(expr1_0); 12649 } 12650 &AtomicRmwOp::Xchg => { 12651 let pattern6_0 = arg4; 12652 let pattern7_0 = arg5; 12653 let pattern8_0 = arg6; 12654 // Rule at src/isa/s390x/lower.isle line 1613. 12655 let expr0_0 = RxSBGOp::Insert; 12656 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12657 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12658 pattern8_0, 12659 )?; 12660 return Some(expr1_0); 12661 } 12662 &AtomicRmwOp::Xor => { 12663 let pattern6_0 = arg4; 12664 let pattern7_0 = arg5; 12665 let pattern8_0 = arg6; 12666 // Rule at src/isa/s390x/lower.isle line 1619. 12667 let expr0_0 = RxSBGOp::Xor; 12668 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12669 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12670 pattern8_0, 12671 )?; 12672 return Some(expr1_0); 12673 } 12674 _ => {} 12675 } 12676 } 12677 let pattern2_0 = arg2; 12678 let pattern3_0 = arg3; 12679 match pattern3_0 { 12680 &AtomicRmwOp::Add => { 12681 let pattern5_0 = arg4; 12682 let pattern6_0 = arg5; 12683 let pattern7_0 = arg6; 12684 // Rule at src/isa/s390x/lower.isle line 1653. 12685 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12686 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12687 let expr2_0 = constructor_atomic_rmw_body_addsub( 12688 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12689 pattern7_0, 12690 )?; 12691 return Some(expr2_0); 12692 } 12693 &AtomicRmwOp::Smax => { 12694 let pattern5_0 = arg4; 12695 let pattern6_0 = arg5; 12696 let pattern7_0 = arg6; 12697 // Rule at src/isa/s390x/lower.isle line 1694. 12698 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12699 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12700 let expr2_0 = IntCC::SignedGreaterThan; 12701 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12702 let expr4_0 = constructor_atomic_rmw_body_minmax( 12703 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12704 pattern6_0, pattern7_0, 12705 )?; 12706 return Some(expr4_0); 12707 } 12708 &AtomicRmwOp::Smin => { 12709 let pattern5_0 = arg4; 12710 let pattern6_0 = arg5; 12711 let pattern7_0 = arg6; 12712 // Rule at src/isa/s390x/lower.isle line 1691. 12713 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12714 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12715 let expr2_0 = IntCC::SignedLessThan; 12716 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12717 let expr4_0 = constructor_atomic_rmw_body_minmax( 12718 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12719 pattern6_0, pattern7_0, 12720 )?; 12721 return Some(expr4_0); 12722 } 12723 &AtomicRmwOp::Sub => { 12724 let pattern5_0 = arg4; 12725 let pattern6_0 = arg5; 12726 let pattern7_0 = arg6; 12727 // Rule at src/isa/s390x/lower.isle line 1655. 12728 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12729 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12730 let expr2_0 = constructor_atomic_rmw_body_addsub( 12731 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12732 pattern7_0, 12733 )?; 12734 return Some(expr2_0); 12735 } 12736 &AtomicRmwOp::Umax => { 12737 let pattern5_0 = arg4; 12738 let pattern6_0 = arg5; 12739 let pattern7_0 = arg6; 12740 // Rule at src/isa/s390x/lower.isle line 1700. 12741 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12742 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12743 let expr2_0 = IntCC::UnsignedGreaterThan; 12744 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12745 let expr4_0 = constructor_atomic_rmw_body_minmax( 12746 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12747 pattern6_0, pattern7_0, 12748 )?; 12749 return Some(expr4_0); 12750 } 12751 &AtomicRmwOp::Umin => { 12752 let pattern5_0 = arg4; 12753 let pattern6_0 = arg5; 12754 let pattern7_0 = arg6; 12755 // Rule at src/isa/s390x/lower.isle line 1697. 12756 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12757 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12758 let expr2_0 = IntCC::UnsignedLessThan; 12759 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12760 let expr4_0 = constructor_atomic_rmw_body_minmax( 12761 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12762 pattern6_0, pattern7_0, 12763 )?; 12764 return Some(expr4_0); 12765 } 12766 _ => {} 12767 } 12768 return None; 12769 } 12770 12771 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12772 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12773 ctx: &mut C, 12774 arg0: &VecMInstBuilder, 12775 arg1: Type, 12776 arg2: MemFlags, 12777 arg3: &RxSBGOp, 12778 arg4: WritableReg, 12779 arg5: Reg, 12780 arg6: Reg, 12781 ) -> Option<Reg> { 12782 let pattern0_0 = arg0; 12783 let pattern1_0 = arg1; 12784 if pattern1_0 == I8 { 12785 let pattern3_0 = arg2; 12786 let pattern4_0 = arg3; 12787 let pattern5_0 = arg4; 12788 let pattern6_0 = arg5; 12789 let pattern7_0 = arg6; 12790 // Rule at src/isa/s390x/lower.isle line 1629. 12791 let expr0_0: u8 = 32; 12792 let expr1_0: u8 = 40; 12793 let expr2_0: i8 = 24; 12794 let expr3_0 = constructor_push_rxsbg( 12795 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12796 expr2_0, 12797 )?; 12798 return Some(expr3_0); 12799 } 12800 if pattern1_0 == I16 { 12801 let pattern3_0 = arg2; 12802 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12803 let pattern5_0 = arg3; 12804 let pattern6_0 = arg4; 12805 let pattern7_0 = arg5; 12806 let pattern8_0 = arg6; 12807 // Rule at src/isa/s390x/lower.isle line 1637. 12808 let expr0_0: Type = I32; 12809 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12810 let expr2_0: u8 = 48; 12811 let expr3_0: u8 = 64; 12812 let expr4_0: i8 = -16; 12813 let expr5_0 = constructor_push_rxsbg( 12814 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12815 expr4_0, 12816 )?; 12817 return Some(expr5_0); 12818 } 12819 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12820 let pattern5_0 = arg3; 12821 let pattern6_0 = arg4; 12822 let pattern7_0 = arg5; 12823 let pattern8_0 = arg6; 12824 // Rule at src/isa/s390x/lower.isle line 1633. 12825 let expr0_0: u8 = 32; 12826 let expr1_0: u8 = 48; 12827 let expr2_0: i8 = 16; 12828 let expr3_0 = constructor_push_rxsbg( 12829 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12830 expr2_0, 12831 )?; 12832 return Some(expr3_0); 12833 } 12834 } 12835 return None; 12836 } 12837 12838 // Generated as internal constructor for term atomic_rmw_body_invert. 12839 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12840 ctx: &mut C, 12841 arg0: &VecMInstBuilder, 12842 arg1: Type, 12843 arg2: MemFlags, 12844 arg3: WritableReg, 12845 arg4: Reg, 12846 ) -> Option<Reg> { 12847 let pattern0_0 = arg0; 12848 let pattern1_0 = arg1; 12849 if pattern1_0 == I8 { 12850 let pattern3_0 = arg2; 12851 let pattern4_0 = arg3; 12852 let pattern5_0 = arg4; 12853 // Rule at src/isa/s390x/lower.isle line 1643. 12854 let expr0_0: Type = I32; 12855 let expr1_0: u32 = 4278190080; 12856 let expr2_0: u8 = 0; 12857 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12858 let expr4_0 = constructor_push_xor_uimm32shifted( 12859 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12860 )?; 12861 return Some(expr4_0); 12862 } 12863 if pattern1_0 == I16 { 12864 let pattern3_0 = arg2; 12865 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12866 let pattern5_0 = arg3; 12867 let pattern6_0 = arg4; 12868 // Rule at src/isa/s390x/lower.isle line 1649. 12869 let expr0_0: Type = I32; 12870 let expr1_0: u32 = 65535; 12871 let expr2_0: u8 = 0; 12872 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12873 let expr4_0 = constructor_push_xor_uimm32shifted( 12874 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12875 )?; 12876 return Some(expr4_0); 12877 } 12878 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12879 let pattern5_0 = arg3; 12880 let pattern6_0 = arg4; 12881 // Rule at src/isa/s390x/lower.isle line 1646. 12882 let expr0_0: Type = I32; 12883 let expr1_0: u32 = 4294901760; 12884 let expr2_0: u8 = 0; 12885 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12886 let expr4_0 = constructor_push_xor_uimm32shifted( 12887 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12888 )?; 12889 return Some(expr4_0); 12890 } 12891 } 12892 return None; 12893 } 12894 12895 // Generated as internal constructor for term atomic_rmw_body_addsub. 12896 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12897 ctx: &mut C, 12898 arg0: &VecMInstBuilder, 12899 arg1: Type, 12900 arg2: MemFlags, 12901 arg3: &ALUOp, 12902 arg4: WritableReg, 12903 arg5: Reg, 12904 arg6: Reg, 12905 ) -> Option<Reg> { 12906 let pattern0_0 = arg0; 12907 let pattern1_0 = arg1; 12908 if pattern1_0 == I8 { 12909 let pattern3_0 = arg2; 12910 let pattern4_0 = arg3; 12911 let pattern5_0 = arg4; 12912 let pattern6_0 = arg5; 12913 let pattern7_0 = arg6; 12914 // Rule at src/isa/s390x/lower.isle line 1672. 12915 let expr0_0: Type = I32; 12916 let expr1_0: u8 = 24; 12917 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12918 let expr3_0 = 12919 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12920 return Some(expr3_0); 12921 } 12922 if pattern1_0 == I16 { 12923 let pattern3_0 = arg2; 12924 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12925 let pattern5_0 = arg3; 12926 let pattern6_0 = arg4; 12927 let pattern7_0 = arg5; 12928 let pattern8_0 = arg6; 12929 // Rule at src/isa/s390x/lower.isle line 1684. 12930 let expr0_0: Type = I32; 12931 let expr1_0: u8 = 16; 12932 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12933 let expr3_0: Type = I32; 12934 let expr4_0 = 12935 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12936 let expr5_0 = constructor_push_alu_reg( 12937 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12938 )?; 12939 let expr6_0: Type = I32; 12940 let expr7_0 = 12941 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12942 return Some(expr7_0); 12943 } 12944 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12945 let pattern5_0 = arg3; 12946 let pattern6_0 = arg4; 12947 let pattern7_0 = arg5; 12948 let pattern8_0 = arg6; 12949 // Rule at src/isa/s390x/lower.isle line 1676. 12950 let expr0_0: Type = I32; 12951 let expr1_0: u8 = 16; 12952 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12953 let expr3_0 = constructor_push_alu_reg( 12954 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12955 )?; 12956 return Some(expr3_0); 12957 } 12958 } 12959 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12960 let pattern3_0 = arg2; 12961 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12962 let pattern5_0 = arg3; 12963 let pattern6_0 = arg4; 12964 let pattern7_0 = arg5; 12965 let pattern8_0 = arg6; 12966 // Rule at src/isa/s390x/lower.isle line 1666. 12967 let expr0_0 = 12968 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12969 let expr1_0 = constructor_push_alu_reg( 12970 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12971 )?; 12972 let expr2_0 = 12973 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12974 return Some(expr2_0); 12975 } 12976 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12977 let pattern5_0 = arg3; 12978 let pattern6_0 = arg4; 12979 let pattern7_0 = arg5; 12980 let pattern8_0 = arg6; 12981 // Rule at src/isa/s390x/lower.isle line 1662. 12982 let expr0_0 = constructor_push_alu_reg( 12983 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12984 )?; 12985 return Some(expr0_0); 12986 } 12987 } 12988 return None; 12989 } 12990 12991 // Generated as internal constructor for term atomic_rmw_body_minmax. 12992 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12993 ctx: &mut C, 12994 arg0: &VecMInstBuilder, 12995 arg1: Type, 12996 arg2: MemFlags, 12997 arg3: &CmpOp, 12998 arg4: &Cond, 12999 arg5: WritableReg, 13000 arg6: Reg, 13001 arg7: Reg, 13002 ) -> Option<Reg> { 13003 let pattern0_0 = arg0; 13004 let pattern1_0 = arg1; 13005 if pattern1_0 == I8 { 13006 let pattern3_0 = arg2; 13007 let pattern4_0 = arg3; 13008 let pattern5_0 = arg4; 13009 let pattern6_0 = arg5; 13010 let pattern7_0 = arg6; 13011 let pattern8_0 = arg7; 13012 // Rule at src/isa/s390x/lower.isle line 1729. 13013 let expr0_0: Type = I32; 13014 let expr1_0: u8 = 24; 13015 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13016 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13017 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13018 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13019 let expr6_0 = RxSBGOp::Insert; 13020 let expr7_0: u8 = 32; 13021 let expr8_0: u8 = 40; 13022 let expr9_0: i8 = 0; 13023 let expr10_0 = constructor_push_rxsbg( 13024 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13025 )?; 13026 return Some(expr10_0); 13027 } 13028 if pattern1_0 == I16 { 13029 let pattern3_0 = arg2; 13030 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13031 let pattern5_0 = arg3; 13032 let pattern6_0 = arg4; 13033 let pattern7_0 = arg5; 13034 let pattern8_0 = arg6; 13035 let pattern9_0 = arg7; 13036 // Rule at src/isa/s390x/lower.isle line 1742. 13037 let expr0_0: Type = I32; 13038 let expr1_0: u8 = 16; 13039 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13040 let expr3_0: Type = I32; 13041 let expr4_0 = 13042 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13043 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13044 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13045 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13046 let expr8_0 = RxSBGOp::Insert; 13047 let expr9_0: u8 = 32; 13048 let expr10_0: u8 = 48; 13049 let expr11_0: i8 = 0; 13050 let expr12_0 = constructor_push_rxsbg( 13051 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13052 expr11_0, 13053 )?; 13054 let expr13_0: Type = I32; 13055 let expr14_0 = 13056 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13057 return Some(expr14_0); 13058 } 13059 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13060 let pattern5_0 = arg3; 13061 let pattern6_0 = arg4; 13062 let pattern7_0 = arg5; 13063 let pattern8_0 = arg6; 13064 let pattern9_0 = arg7; 13065 // Rule at src/isa/s390x/lower.isle line 1735. 13066 let expr0_0: Type = I32; 13067 let expr1_0: u8 = 16; 13068 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13069 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13070 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13071 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13072 let expr6_0 = RxSBGOp::Insert; 13073 let expr7_0: u8 = 32; 13074 let expr8_0: u8 = 48; 13075 let expr9_0: i8 = 0; 13076 let expr10_0 = constructor_push_rxsbg( 13077 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13078 expr9_0, 13079 )?; 13080 return Some(expr10_0); 13081 } 13082 } 13083 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13084 let pattern3_0 = arg2; 13085 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13086 let pattern5_0 = arg3; 13087 let pattern6_0 = arg4; 13088 let pattern7_0 = arg5; 13089 let pattern8_0 = arg6; 13090 let pattern9_0 = arg7; 13091 // Rule at src/isa/s390x/lower.isle line 1717. 13092 let expr0_0 = 13093 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13094 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13095 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13096 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13097 let expr4_0 = 13098 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13099 return Some(expr4_0); 13100 } 13101 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13102 let pattern5_0 = arg3; 13103 let pattern6_0 = arg4; 13104 let pattern7_0 = arg5; 13105 let pattern8_0 = arg6; 13106 let pattern9_0 = arg7; 13107 // Rule at src/isa/s390x/lower.isle line 1710. 13108 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13109 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13110 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13111 return Some(pattern9_0); 13112 } 13113 } 13114 return None; 13115 } 13116 13117 // Generated as internal constructor for term atomic_cas_body. 13118 pub fn constructor_atomic_cas_body<C: Context>( 13119 ctx: &mut C, 13120 arg0: &VecMInstBuilder, 13121 arg1: Type, 13122 arg2: MemFlags, 13123 arg3: WritableReg, 13124 arg4: Reg, 13125 arg5: Reg, 13126 arg6: Reg, 13127 ) -> Option<Reg> { 13128 let pattern0_0 = arg0; 13129 let pattern1_0 = arg1; 13130 if pattern1_0 == I8 { 13131 let pattern3_0 = arg2; 13132 let pattern4_0 = arg3; 13133 let pattern5_0 = arg4; 13134 let pattern6_0 = arg5; 13135 let pattern7_0 = arg6; 13136 // Rule at src/isa/s390x/lower.isle line 1794. 13137 let expr0_0 = RxSBGOp::Xor; 13138 let expr1_0: u8 = 32; 13139 let expr2_0: u8 = 40; 13140 let expr3_0: i8 = 24; 13141 let expr4_0 = constructor_rxsbg_test( 13142 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13143 )?; 13144 let expr5_0 = IntCC::NotEqual; 13145 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13146 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13147 let expr8_0 = RxSBGOp::Insert; 13148 let expr9_0: u8 = 32; 13149 let expr10_0: u8 = 40; 13150 let expr11_0: i8 = 24; 13151 let expr12_0 = constructor_push_rxsbg( 13152 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13153 expr11_0, 13154 )?; 13155 return Some(expr12_0); 13156 } 13157 if pattern1_0 == I16 { 13158 let pattern3_0 = arg2; 13159 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13160 let pattern5_0 = arg3; 13161 let pattern6_0 = arg4; 13162 let pattern7_0 = arg5; 13163 let pattern8_0 = arg6; 13164 // Rule at src/isa/s390x/lower.isle line 1812. 13165 let expr0_0: Type = I32; 13166 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13167 let expr2_0: Type = I32; 13168 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13169 let expr4_0 = RxSBGOp::Xor; 13170 let expr5_0: u8 = 48; 13171 let expr6_0: u8 = 64; 13172 let expr7_0: i8 = -16; 13173 let expr8_0 = constructor_rxsbg_test( 13174 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13175 )?; 13176 let expr9_0 = IntCC::NotEqual; 13177 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13178 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13179 let expr12_0 = RxSBGOp::Insert; 13180 let expr13_0: u8 = 48; 13181 let expr14_0: u8 = 64; 13182 let expr15_0: i8 = -16; 13183 let expr16_0 = constructor_push_rxsbg( 13184 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13185 expr15_0, 13186 )?; 13187 return Some(expr16_0); 13188 } 13189 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13190 let pattern5_0 = arg3; 13191 let pattern6_0 = arg4; 13192 let pattern7_0 = arg5; 13193 let pattern8_0 = arg6; 13194 // Rule at src/isa/s390x/lower.isle line 1801. 13195 let expr0_0 = RxSBGOp::Xor; 13196 let expr1_0: u8 = 32; 13197 let expr2_0: u8 = 48; 13198 let expr3_0: i8 = 16; 13199 let expr4_0 = constructor_rxsbg_test( 13200 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13201 )?; 13202 let expr5_0 = IntCC::NotEqual; 13203 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13204 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13205 let expr8_0 = RxSBGOp::Insert; 13206 let expr9_0: u8 = 32; 13207 let expr10_0: u8 = 48; 13208 let expr11_0: i8 = 16; 13209 let expr12_0 = constructor_push_rxsbg( 13210 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13211 expr11_0, 13212 )?; 13213 return Some(expr12_0); 13214 } 13215 } 13216 return None; 13217 } 13218 13219 // Generated as internal constructor for term atomic_store_impl. 13220 pub fn constructor_atomic_store_impl<C: Context>( 13221 ctx: &mut C, 13222 arg0: &SideEffectNoResult, 13223 ) -> Option<InstOutput> { 13224 let pattern0_0 = arg0; 13225 // Rule at src/isa/s390x/lower.isle line 1858. 13226 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13227 let expr1_0 = constructor_fence_impl(ctx)?; 13228 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13229 return Some(expr2_0); 13230 } 13231 13232 // Generated as internal constructor for term icmp_val. 13233 pub fn constructor_icmp_val<C: Context>( 13234 ctx: &mut C, 13235 arg0: bool, 13236 arg1: &IntCC, 13237 arg2: Value, 13238 arg3: Value, 13239 ) -> Option<ProducesBool> { 13240 let pattern0_0 = arg0; 13241 let pattern1_0 = arg1; 13242 if let Some(()) = C::signed(ctx, pattern1_0) { 13243 let pattern3_0 = arg2; 13244 let pattern4_0 = arg3; 13245 // Rule at src/isa/s390x/lower.isle line 1925. 13246 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13247 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13248 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13249 return Some(expr2_0); 13250 } 13251 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13252 let pattern3_0 = arg2; 13253 let pattern4_0 = arg3; 13254 // Rule at src/isa/s390x/lower.isle line 1928. 13255 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13256 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13257 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13258 return Some(expr2_0); 13259 } 13260 return None; 13261 } 13262 13263 // Generated as internal constructor for term icmps_val. 13264 pub fn constructor_icmps_val<C: Context>( 13265 ctx: &mut C, 13266 arg0: bool, 13267 arg1: Value, 13268 arg2: Value, 13269 ) -> Option<ProducesFlags> { 13270 let pattern0_0 = arg0; 13271 if pattern0_0 == true { 13272 let pattern2_0 = arg1; 13273 let pattern3_0 = C::value_type(ctx, pattern2_0); 13274 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13275 let pattern5_0 = arg2; 13276 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13277 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13278 if let &InstructionData::Load { 13279 opcode: ref pattern8_0, 13280 arg: pattern8_1, 13281 flags: pattern8_2, 13282 offset: pattern8_3, 13283 } = &pattern7_0 13284 { 13285 match pattern8_0 { 13286 &Opcode::Sload16 => { 13287 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13288 // Rule at src/isa/s390x/lower.isle line 1958. 13289 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13290 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13291 let expr2_0 = constructor_icmps_mem_sext16( 13292 ctx, pattern4_0, expr0_0, &expr1_0, 13293 )?; 13294 return Some(expr2_0); 13295 } 13296 } 13297 &Opcode::Sload32 => { 13298 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13299 // Rule at src/isa/s390x/lower.isle line 1960. 13300 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13301 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13302 let expr2_0 = constructor_icmps_mem_sext32( 13303 ctx, pattern4_0, expr0_0, &expr1_0, 13304 )?; 13305 return Some(expr2_0); 13306 } 13307 } 13308 _ => {} 13309 } 13310 } 13311 } 13312 let pattern6_0 = C::value_type(ctx, pattern5_0); 13313 if pattern6_0 == I16 { 13314 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13315 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13316 if let &InstructionData::Load { 13317 opcode: ref pattern10_0, 13318 arg: pattern10_1, 13319 flags: pattern10_2, 13320 offset: pattern10_3, 13321 } = &pattern9_0 13322 { 13323 if let &Opcode::Load = pattern10_0 { 13324 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13325 // Rule at src/isa/s390x/lower.isle line 1954. 13326 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13327 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13328 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13329 let expr3_0 = 13330 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13331 return Some(expr3_0); 13332 } 13333 } 13334 } 13335 } 13336 } 13337 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13338 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13339 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13340 if let &InstructionData::Load { 13341 opcode: ref pattern10_0, 13342 arg: pattern10_1, 13343 flags: pattern10_2, 13344 offset: pattern10_3, 13345 } = &pattern9_0 13346 { 13347 if let &Opcode::Load = pattern10_0 { 13348 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13349 // Rule at src/isa/s390x/lower.isle line 1950. 13350 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13351 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13352 let expr2_0 = 13353 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13354 return Some(expr2_0); 13355 } 13356 } 13357 } 13358 } 13359 } 13360 } 13361 } 13362 let pattern1_0 = arg1; 13363 let pattern2_0 = C::value_type(ctx, pattern1_0); 13364 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13365 let pattern4_0 = arg2; 13366 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13367 // Rule at src/isa/s390x/lower.isle line 1944. 13368 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13369 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13370 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13371 return Some(expr2_0); 13372 } 13373 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13374 // Rule at src/isa/s390x/lower.isle line 1946. 13375 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13376 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13377 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13378 return Some(expr2_0); 13379 } 13380 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13381 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13382 if let &InstructionData::Unary { 13383 opcode: ref pattern7_0, 13384 arg: pattern7_1, 13385 } = &pattern6_0 13386 { 13387 if let &Opcode::Sextend = pattern7_0 { 13388 let pattern9_0 = C::value_type(ctx, pattern7_1); 13389 if pattern9_0 == I32 { 13390 // Rule at src/isa/s390x/lower.isle line 1940. 13391 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13392 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13393 let expr2_0 = 13394 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13395 return Some(expr2_0); 13396 } 13397 } 13398 } 13399 } 13400 // Rule at src/isa/s390x/lower.isle line 1936. 13401 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13402 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13403 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13404 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13405 return Some(expr3_0); 13406 } 13407 return None; 13408 } 13409 13410 // Generated as internal constructor for term icmpu_val. 13411 pub fn constructor_icmpu_val<C: Context>( 13412 ctx: &mut C, 13413 arg0: bool, 13414 arg1: Value, 13415 arg2: Value, 13416 ) -> Option<ProducesFlags> { 13417 let pattern0_0 = arg0; 13418 if pattern0_0 == true { 13419 let pattern2_0 = arg1; 13420 let pattern3_0 = C::value_type(ctx, pattern2_0); 13421 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13422 let pattern5_0 = arg2; 13423 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13424 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13425 if let &InstructionData::Load { 13426 opcode: ref pattern8_0, 13427 arg: pattern8_1, 13428 flags: pattern8_2, 13429 offset: pattern8_3, 13430 } = &pattern7_0 13431 { 13432 match pattern8_0 { 13433 &Opcode::Uload16 => { 13434 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13435 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13436 if let &InstructionData::UnaryGlobalValue { 13437 opcode: ref pattern12_0, 13438 global_value: pattern12_1, 13439 } = &pattern11_0 13440 { 13441 if let &Opcode::SymbolValue = pattern12_0 { 13442 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13443 C::symbol_value_data(ctx, pattern12_1) 13444 { 13445 if let Some(()) = 13446 C::reloc_distance_near(ctx, pattern14_1) 13447 { 13448 let pattern16_0 = 13449 C::i64_from_offset(ctx, pattern8_3); 13450 let closure17 = || { 13451 return Some(pattern14_2); 13452 }; 13453 if let Some(pattern17_0) = closure17() { 13454 if let Some(pattern18_0) = 13455 C::memarg_symbol_offset_sum( 13456 ctx, 13457 pattern16_0, 13458 pattern17_0, 13459 ) 13460 { 13461 let pattern19_0 = 13462 C::inst_data(ctx, pattern6_0); 13463 if let &InstructionData::Load { 13464 opcode: ref pattern20_0, 13465 arg: pattern20_1, 13466 flags: pattern20_2, 13467 offset: pattern20_3, 13468 } = &pattern19_0 13469 { 13470 if let &Opcode::Uload16 = pattern20_0 { 13471 if let Some(()) = 13472 C::bigendian(ctx, pattern20_2) 13473 { 13474 // Rule at src/isa/s390x/lower.isle line 1993. 13475 let expr0_0 = C::put_in_reg( 13476 ctx, pattern2_0, 13477 ); 13478 let expr1_0 = 13479 constructor_sink_uload16( 13480 ctx, pattern6_0, 13481 )?; 13482 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13483 return Some(expr2_0); 13484 } 13485 } 13486 } 13487 } 13488 } 13489 } 13490 } 13491 } 13492 } 13493 } 13494 } 13495 &Opcode::Uload32 => { 13496 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13497 // Rule at src/isa/s390x/lower.isle line 1996. 13498 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13499 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13500 let expr2_0 = constructor_icmpu_mem_zext32( 13501 ctx, pattern4_0, expr0_0, &expr1_0, 13502 )?; 13503 return Some(expr2_0); 13504 } 13505 } 13506 _ => {} 13507 } 13508 } 13509 } 13510 let pattern6_0 = C::value_type(ctx, pattern5_0); 13511 if pattern6_0 == I16 { 13512 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13513 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13514 if let &InstructionData::Load { 13515 opcode: ref pattern10_0, 13516 arg: pattern10_1, 13517 flags: pattern10_2, 13518 offset: pattern10_3, 13519 } = &pattern9_0 13520 { 13521 if let &Opcode::Load = pattern10_0 { 13522 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13523 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13524 if let &InstructionData::UnaryGlobalValue { 13525 opcode: ref pattern14_0, 13526 global_value: pattern14_1, 13527 } = &pattern13_0 13528 { 13529 if let &Opcode::SymbolValue = pattern14_0 { 13530 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13531 C::symbol_value_data(ctx, pattern14_1) 13532 { 13533 if let Some(()) = 13534 C::reloc_distance_near(ctx, pattern16_1) 13535 { 13536 let pattern18_0 = 13537 C::i64_from_offset(ctx, pattern10_3); 13538 let closure19 = || { 13539 return Some(pattern16_2); 13540 }; 13541 if let Some(pattern19_0) = closure19() { 13542 if let Some(pattern20_0) = 13543 C::memarg_symbol_offset_sum( 13544 ctx, 13545 pattern18_0, 13546 pattern19_0, 13547 ) 13548 { 13549 let pattern21_0 = 13550 C::inst_data(ctx, pattern8_0); 13551 if let &InstructionData::Load { 13552 opcode: ref pattern22_0, 13553 arg: pattern22_1, 13554 flags: pattern22_2, 13555 offset: pattern22_3, 13556 } = &pattern21_0 13557 { 13558 if let &Opcode::Load = pattern22_0 { 13559 if let Some(()) = 13560 C::bigendian(ctx, pattern22_2) 13561 { 13562 // Rule at src/isa/s390x/lower.isle line 1986. 13563 let expr0_0 = 13564 constructor_ty_ext32( 13565 ctx, pattern4_0, 13566 )?; 13567 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13568 let expr2_0 = 13569 constructor_sink_load( 13570 ctx, pattern8_0, 13571 )?; 13572 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13573 return Some(expr3_0); 13574 } 13575 } 13576 } 13577 } 13578 } 13579 } 13580 } 13581 } 13582 } 13583 } 13584 } 13585 } 13586 } 13587 } 13588 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13589 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13590 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13591 if let &InstructionData::Load { 13592 opcode: ref pattern10_0, 13593 arg: pattern10_1, 13594 flags: pattern10_2, 13595 offset: pattern10_3, 13596 } = &pattern9_0 13597 { 13598 if let &Opcode::Load = pattern10_0 { 13599 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13600 // Rule at src/isa/s390x/lower.isle line 1980. 13601 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13602 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13603 let expr2_0 = 13604 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13605 return Some(expr2_0); 13606 } 13607 } 13608 } 13609 } 13610 } 13611 } 13612 } 13613 let pattern1_0 = arg1; 13614 let pattern2_0 = C::value_type(ctx, pattern1_0); 13615 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13616 let pattern4_0 = arg2; 13617 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13618 // Rule at src/isa/s390x/lower.isle line 1976. 13619 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13620 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13621 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13622 return Some(expr2_0); 13623 } 13624 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13625 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13626 if let &InstructionData::Unary { 13627 opcode: ref pattern7_0, 13628 arg: pattern7_1, 13629 } = &pattern6_0 13630 { 13631 if let &Opcode::Uextend = pattern7_0 { 13632 let pattern9_0 = C::value_type(ctx, pattern7_1); 13633 if pattern9_0 == I32 { 13634 // Rule at src/isa/s390x/lower.isle line 1972. 13635 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13636 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13637 let expr2_0 = 13638 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13639 return Some(expr2_0); 13640 } 13641 } 13642 } 13643 } 13644 // Rule at src/isa/s390x/lower.isle line 1968. 13645 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13646 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13647 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13648 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13649 return Some(expr3_0); 13650 } 13651 return None; 13652 } 13653 13654 // Generated as internal constructor for term fcmp_val. 13655 pub fn constructor_fcmp_val<C: Context>( 13656 ctx: &mut C, 13657 arg0: &FloatCC, 13658 arg1: Value, 13659 arg2: Value, 13660 ) -> Option<ProducesBool> { 13661 let pattern0_0 = arg0; 13662 let pattern1_0 = arg1; 13663 let pattern2_0 = C::value_type(ctx, pattern1_0); 13664 let pattern3_0 = arg2; 13665 // Rule at src/isa/s390x/lower.isle line 2009. 13666 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13667 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13668 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13669 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13670 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13671 return Some(expr4_0); 13672 } 13673 13674 // Generated as internal constructor for term value_nonzero. 13675 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13676 let pattern0_0 = arg0; 13677 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13678 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13679 match &pattern2_0 { 13680 &InstructionData::FloatCompare { 13681 opcode: ref pattern3_0, 13682 args: ref pattern3_1, 13683 cond: ref pattern3_2, 13684 } => { 13685 if let &Opcode::Fcmp = pattern3_0 { 13686 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13687 // Rule at src/isa/s390x/lower.isle line 2037. 13688 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13689 return Some(expr0_0); 13690 } 13691 } 13692 &InstructionData::IntCompare { 13693 opcode: ref pattern3_0, 13694 args: ref pattern3_1, 13695 cond: ref pattern3_2, 13696 } => { 13697 if let &Opcode::Icmp = pattern3_0 { 13698 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13699 // Rule at src/isa/s390x/lower.isle line 2036. 13700 let expr0_0: bool = false; 13701 let expr1_0 = 13702 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13703 return Some(expr1_0); 13704 } 13705 } 13706 &InstructionData::Unary { 13707 opcode: ref pattern3_0, 13708 arg: pattern3_1, 13709 } => { 13710 if let &Opcode::Bint = pattern3_0 { 13711 // Rule at src/isa/s390x/lower.isle line 2035. 13712 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13713 return Some(expr0_0); 13714 } 13715 } 13716 _ => {} 13717 } 13718 } 13719 let pattern1_0 = C::value_type(ctx, pattern0_0); 13720 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13721 // Rule at src/isa/s390x/lower.isle line 2038. 13722 let expr0_0: Type = I32; 13723 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13724 let expr2_0: i16 = 0; 13725 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13726 let expr4_0 = IntCC::NotEqual; 13727 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13728 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13729 return Some(expr6_0); 13730 } 13731 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13732 // Rule at src/isa/s390x/lower.isle line 2041. 13733 let expr0_0: Type = I64; 13734 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13735 let expr2_0: i16 = 0; 13736 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13737 let expr4_0 = IntCC::NotEqual; 13738 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13739 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13740 return Some(expr6_0); 13741 } 13742 return None; 13743 } 13744