1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn i64_as_u64(&mut self, arg0: i64) -> u64; 43 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 44 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn ty_bits(&mut self, arg0: Type) -> u8; 47 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 48 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 49 fn ty_mask(&mut self, arg0: Type) -> u64; 50 fn ty_bytes(&mut self, arg0: Type) -> u16; 51 fn lane_type(&mut self, arg0: Type) -> Type; 52 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 53 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 55 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 57 fn vec128(&mut self, arg0: Type) -> Option<Type>; 58 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 59 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 60 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 61 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 62 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 63 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 64 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 65 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 66 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 67 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 68 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 69 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 70 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 71 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 72 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 73 fn value_type(&mut self, arg0: Value) -> Type; 74 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 75 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 76 fn emit(&mut self, arg0: &MInst) -> Unit; 77 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 78 fn trap_code_division_by_zero(&mut self) -> TrapCode; 79 fn trap_code_integer_overflow(&mut self) -> TrapCode; 80 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 81 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 82 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 83 fn symbol_value_data( 84 &mut self, 85 arg0: GlobalValue, 86 ) -> Option<(ExternalName, RelocDistance, i64)>; 87 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 88 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 89 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 90 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 91 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 92 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 93 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 94 fn zero_reg(&mut self) -> Reg; 95 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 96 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 97 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 98 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 99 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 100 fn u8_as_u16(&mut self, arg0: u8) -> u16; 101 fn u64_as_u32(&mut self, arg0: u64) -> u32; 102 fn u64_as_i16(&mut self, arg0: u64) -> i16; 103 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 104 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 105 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 106 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 107 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 108 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 109 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 110 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 111 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 112 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 113 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 114 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 115 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 116 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 117 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 118 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 119 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 120 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 121 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 122 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 123 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 124 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 125 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 126 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 127 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 128 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 129 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 130 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 131 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 132 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 133 fn zero_offset(&mut self) -> Offset32; 134 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 135 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 136 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 137 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 138 fn memflags_trusted(&mut self) -> MemFlags; 139 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 140 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 141 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 142 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 143 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 144 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 145 fn sink_inst(&mut self, arg0: Inst) -> Unit; 146 fn inst_builder_new(&mut self) -> VecMInstBuilder; 147 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 148 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 149 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 150 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 151 } 152 153 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 385. 154 #[derive(Clone, Debug)] 155 pub enum SideEffectNoResult { 156 Inst { inst: MInst }, 157 } 158 159 /// Internal type ProducesFlags: defined at src/prelude.isle line 407. 160 #[derive(Clone, Debug)] 161 pub enum ProducesFlags { 162 ProducesFlagsSideEffect { inst: MInst }, 163 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 164 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 165 } 166 167 /// Internal type ConsumesFlags: defined at src/prelude.isle line 418. 168 #[derive(Clone, Debug)] 169 pub enum ConsumesFlags { 170 ConsumesFlagsReturnsResultWithProducer { 171 inst: MInst, 172 result: Reg, 173 }, 174 ConsumesFlagsReturnsReg { 175 inst: MInst, 176 result: Reg, 177 }, 178 ConsumesFlagsTwiceReturnsValueRegs { 179 inst1: MInst, 180 inst2: MInst, 181 result: ValueRegs, 182 }, 183 ConsumesFlagsFourTimesReturnsValueRegs { 184 inst1: MInst, 185 inst2: MInst, 186 inst3: MInst, 187 inst4: MInst, 188 result: ValueRegs, 189 }, 190 } 191 192 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 193 #[derive(Clone, Debug)] 194 pub enum MInst { 195 Nop0, 196 Nop2, 197 AluRRR { 198 alu_op: ALUOp, 199 rd: WritableReg, 200 rn: Reg, 201 rm: Reg, 202 }, 203 AluRRSImm16 { 204 alu_op: ALUOp, 205 rd: WritableReg, 206 rn: Reg, 207 imm: i16, 208 }, 209 AluRR { 210 alu_op: ALUOp, 211 rd: WritableReg, 212 rm: Reg, 213 }, 214 AluRX { 215 alu_op: ALUOp, 216 rd: WritableReg, 217 mem: MemArg, 218 }, 219 AluRSImm16 { 220 alu_op: ALUOp, 221 rd: WritableReg, 222 imm: i16, 223 }, 224 AluRSImm32 { 225 alu_op: ALUOp, 226 rd: WritableReg, 227 imm: i32, 228 }, 229 AluRUImm32 { 230 alu_op: ALUOp, 231 rd: WritableReg, 232 imm: u32, 233 }, 234 AluRUImm16Shifted { 235 alu_op: ALUOp, 236 rd: WritableReg, 237 imm: UImm16Shifted, 238 }, 239 AluRUImm32Shifted { 240 alu_op: ALUOp, 241 rd: WritableReg, 242 imm: UImm32Shifted, 243 }, 244 SMulWide { 245 rn: Reg, 246 rm: Reg, 247 }, 248 UMulWide { 249 rn: Reg, 250 }, 251 SDivMod32 { 252 rn: Reg, 253 }, 254 SDivMod64 { 255 rn: Reg, 256 }, 257 UDivMod32 { 258 rn: Reg, 259 }, 260 UDivMod64 { 261 rn: Reg, 262 }, 263 Flogr { 264 rn: Reg, 265 }, 266 ShiftRR { 267 shift_op: ShiftOp, 268 rd: WritableReg, 269 rn: Reg, 270 shift_imm: u8, 271 shift_reg: Reg, 272 }, 273 RxSBG { 274 op: RxSBGOp, 275 rd: WritableReg, 276 rn: Reg, 277 start_bit: u8, 278 end_bit: u8, 279 rotate_amt: i8, 280 }, 281 RxSBGTest { 282 op: RxSBGOp, 283 rd: Reg, 284 rn: Reg, 285 start_bit: u8, 286 end_bit: u8, 287 rotate_amt: i8, 288 }, 289 UnaryRR { 290 op: UnaryOp, 291 rd: WritableReg, 292 rn: Reg, 293 }, 294 CmpRR { 295 op: CmpOp, 296 rn: Reg, 297 rm: Reg, 298 }, 299 CmpRX { 300 op: CmpOp, 301 rn: Reg, 302 mem: MemArg, 303 }, 304 CmpRSImm16 { 305 op: CmpOp, 306 rn: Reg, 307 imm: i16, 308 }, 309 CmpRSImm32 { 310 op: CmpOp, 311 rn: Reg, 312 imm: i32, 313 }, 314 CmpRUImm32 { 315 op: CmpOp, 316 rn: Reg, 317 imm: u32, 318 }, 319 CmpTrapRR { 320 op: CmpOp, 321 rn: Reg, 322 rm: Reg, 323 cond: Cond, 324 trap_code: TrapCode, 325 }, 326 CmpTrapRSImm16 { 327 op: CmpOp, 328 rn: Reg, 329 imm: i16, 330 cond: Cond, 331 trap_code: TrapCode, 332 }, 333 CmpTrapRUImm16 { 334 op: CmpOp, 335 rn: Reg, 336 imm: u16, 337 cond: Cond, 338 trap_code: TrapCode, 339 }, 340 AtomicRmw { 341 alu_op: ALUOp, 342 rd: WritableReg, 343 rn: Reg, 344 mem: MemArg, 345 }, 346 AtomicCas32 { 347 rd: WritableReg, 348 rn: Reg, 349 mem: MemArg, 350 }, 351 AtomicCas64 { 352 rd: WritableReg, 353 rn: Reg, 354 mem: MemArg, 355 }, 356 Fence, 357 Load32 { 358 rd: WritableReg, 359 mem: MemArg, 360 }, 361 Load32ZExt8 { 362 rd: WritableReg, 363 mem: MemArg, 364 }, 365 Load32SExt8 { 366 rd: WritableReg, 367 mem: MemArg, 368 }, 369 Load32ZExt16 { 370 rd: WritableReg, 371 mem: MemArg, 372 }, 373 Load32SExt16 { 374 rd: WritableReg, 375 mem: MemArg, 376 }, 377 Load64 { 378 rd: WritableReg, 379 mem: MemArg, 380 }, 381 Load64ZExt8 { 382 rd: WritableReg, 383 mem: MemArg, 384 }, 385 Load64SExt8 { 386 rd: WritableReg, 387 mem: MemArg, 388 }, 389 Load64ZExt16 { 390 rd: WritableReg, 391 mem: MemArg, 392 }, 393 Load64SExt16 { 394 rd: WritableReg, 395 mem: MemArg, 396 }, 397 Load64ZExt32 { 398 rd: WritableReg, 399 mem: MemArg, 400 }, 401 Load64SExt32 { 402 rd: WritableReg, 403 mem: MemArg, 404 }, 405 LoadRev16 { 406 rd: WritableReg, 407 mem: MemArg, 408 }, 409 LoadRev32 { 410 rd: WritableReg, 411 mem: MemArg, 412 }, 413 LoadRev64 { 414 rd: WritableReg, 415 mem: MemArg, 416 }, 417 Store8 { 418 rd: Reg, 419 mem: MemArg, 420 }, 421 Store16 { 422 rd: Reg, 423 mem: MemArg, 424 }, 425 Store32 { 426 rd: Reg, 427 mem: MemArg, 428 }, 429 Store64 { 430 rd: Reg, 431 mem: MemArg, 432 }, 433 StoreImm8 { 434 imm: u8, 435 mem: MemArg, 436 }, 437 StoreImm16 { 438 imm: i16, 439 mem: MemArg, 440 }, 441 StoreImm32SExt16 { 442 imm: i16, 443 mem: MemArg, 444 }, 445 StoreImm64SExt16 { 446 imm: i16, 447 mem: MemArg, 448 }, 449 StoreRev16 { 450 rd: Reg, 451 mem: MemArg, 452 }, 453 StoreRev32 { 454 rd: Reg, 455 mem: MemArg, 456 }, 457 StoreRev64 { 458 rd: Reg, 459 mem: MemArg, 460 }, 461 LoadMultiple64 { 462 rt: WritableReg, 463 rt2: WritableReg, 464 mem: MemArg, 465 }, 466 StoreMultiple64 { 467 rt: Reg, 468 rt2: Reg, 469 mem: MemArg, 470 }, 471 Mov32 { 472 rd: WritableReg, 473 rm: Reg, 474 }, 475 Mov64 { 476 rd: WritableReg, 477 rm: Reg, 478 }, 479 Mov32Imm { 480 rd: WritableReg, 481 imm: u32, 482 }, 483 Mov32SImm16 { 484 rd: WritableReg, 485 imm: i16, 486 }, 487 Mov64SImm16 { 488 rd: WritableReg, 489 imm: i16, 490 }, 491 Mov64SImm32 { 492 rd: WritableReg, 493 imm: i32, 494 }, 495 Mov64UImm16Shifted { 496 rd: WritableReg, 497 imm: UImm16Shifted, 498 }, 499 Mov64UImm32Shifted { 500 rd: WritableReg, 501 imm: UImm32Shifted, 502 }, 503 Insert64UImm16Shifted { 504 rd: WritableReg, 505 imm: UImm16Shifted, 506 }, 507 Insert64UImm32Shifted { 508 rd: WritableReg, 509 imm: UImm32Shifted, 510 }, 511 Extend { 512 rd: WritableReg, 513 rn: Reg, 514 signed: bool, 515 from_bits: u8, 516 to_bits: u8, 517 }, 518 CMov32 { 519 rd: WritableReg, 520 cond: Cond, 521 rm: Reg, 522 }, 523 CMov64 { 524 rd: WritableReg, 525 cond: Cond, 526 rm: Reg, 527 }, 528 CMov32SImm16 { 529 rd: WritableReg, 530 cond: Cond, 531 imm: i16, 532 }, 533 CMov64SImm16 { 534 rd: WritableReg, 535 cond: Cond, 536 imm: i16, 537 }, 538 FpuMove32 { 539 rd: WritableReg, 540 rn: Reg, 541 }, 542 FpuMove64 { 543 rd: WritableReg, 544 rn: Reg, 545 }, 546 FpuCMov32 { 547 rd: WritableReg, 548 cond: Cond, 549 rm: Reg, 550 }, 551 FpuCMov64 { 552 rd: WritableReg, 553 cond: Cond, 554 rm: Reg, 555 }, 556 MovToFpr { 557 rd: WritableReg, 558 rn: Reg, 559 }, 560 MovFromFpr { 561 rd: WritableReg, 562 rn: Reg, 563 }, 564 FpuRR { 565 fpu_op: FPUOp1, 566 rd: WritableReg, 567 rn: Reg, 568 }, 569 FpuRRR { 570 fpu_op: FPUOp2, 571 rd: WritableReg, 572 rm: Reg, 573 }, 574 FpuRRRR { 575 fpu_op: FPUOp3, 576 rd: WritableReg, 577 rn: Reg, 578 rm: Reg, 579 }, 580 FpuCopysign { 581 rd: WritableReg, 582 rn: Reg, 583 rm: Reg, 584 }, 585 FpuCmp32 { 586 rn: Reg, 587 rm: Reg, 588 }, 589 FpuCmp64 { 590 rn: Reg, 591 rm: Reg, 592 }, 593 FpuLoad32 { 594 rd: WritableReg, 595 mem: MemArg, 596 }, 597 FpuStore32 { 598 rd: Reg, 599 mem: MemArg, 600 }, 601 FpuLoad64 { 602 rd: WritableReg, 603 mem: MemArg, 604 }, 605 FpuStore64 { 606 rd: Reg, 607 mem: MemArg, 608 }, 609 FpuLoadRev32 { 610 rd: WritableReg, 611 mem: MemArg, 612 }, 613 FpuStoreRev32 { 614 rd: Reg, 615 mem: MemArg, 616 }, 617 FpuLoadRev64 { 618 rd: WritableReg, 619 mem: MemArg, 620 }, 621 FpuStoreRev64 { 622 rd: Reg, 623 mem: MemArg, 624 }, 625 LoadFpuConst32 { 626 rd: WritableReg, 627 const_data: u32, 628 }, 629 LoadFpuConst64 { 630 rd: WritableReg, 631 const_data: u64, 632 }, 633 FpuToInt { 634 op: FpuToIntOp, 635 rd: WritableReg, 636 rn: Reg, 637 }, 638 IntToFpu { 639 op: IntToFpuOp, 640 rd: WritableReg, 641 rn: Reg, 642 }, 643 FpuRound { 644 op: FpuRoundMode, 645 rd: WritableReg, 646 rn: Reg, 647 }, 648 FpuVecRRR { 649 fpu_op: FPUOp2, 650 rd: WritableReg, 651 rn: Reg, 652 rm: Reg, 653 }, 654 Call { 655 link: WritableReg, 656 info: BoxCallInfo, 657 }, 658 CallInd { 659 link: WritableReg, 660 info: BoxCallIndInfo, 661 }, 662 Ret { 663 link: Reg, 664 }, 665 EpiloguePlaceholder, 666 Jump { 667 dest: MachLabel, 668 }, 669 CondBr { 670 taken: MachLabel, 671 not_taken: MachLabel, 672 cond: Cond, 673 }, 674 TrapIf { 675 cond: Cond, 676 trap_code: TrapCode, 677 }, 678 OneWayCondBr { 679 target: MachLabel, 680 cond: Cond, 681 }, 682 IndirectBr { 683 rn: Reg, 684 targets: VecMachLabel, 685 }, 686 Debugtrap, 687 Trap { 688 trap_code: TrapCode, 689 }, 690 JTSequence { 691 ridx: Reg, 692 targets: VecMachLabel, 693 }, 694 LoadExtNameFar { 695 rd: WritableReg, 696 name: BoxExternalName, 697 offset: i64, 698 }, 699 LoadAddr { 700 rd: WritableReg, 701 mem: MemArg, 702 }, 703 Loop { 704 body: VecMInst, 705 cond: Cond, 706 }, 707 CondBreak { 708 cond: Cond, 709 }, 710 VirtualSPOffsetAdj { 711 offset: i64, 712 }, 713 ValueLabelMarker { 714 reg: Reg, 715 label: ValueLabel, 716 }, 717 Unwind { 718 inst: UnwindInst, 719 }, 720 } 721 722 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 723 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 724 pub enum ALUOp { 725 Add32, 726 Add32Ext16, 727 Add64, 728 Add64Ext16, 729 Add64Ext32, 730 AddLogical32, 731 AddLogical64, 732 AddLogical64Ext32, 733 Sub32, 734 Sub32Ext16, 735 Sub64, 736 Sub64Ext16, 737 Sub64Ext32, 738 SubLogical32, 739 SubLogical64, 740 SubLogical64Ext32, 741 Mul32, 742 Mul32Ext16, 743 Mul64, 744 Mul64Ext16, 745 Mul64Ext32, 746 And32, 747 And64, 748 Orr32, 749 Orr64, 750 Xor32, 751 Xor64, 752 AndNot32, 753 AndNot64, 754 OrrNot32, 755 OrrNot64, 756 XorNot32, 757 XorNot64, 758 } 759 760 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 761 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 762 pub enum UnaryOp { 763 Abs32, 764 Abs64, 765 Abs64Ext32, 766 Neg32, 767 Neg64, 768 Neg64Ext32, 769 PopcntByte, 770 PopcntReg, 771 BSwap32, 772 BSwap64, 773 } 774 775 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 776 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 777 pub enum ShiftOp { 778 RotL32, 779 RotL64, 780 LShL32, 781 LShL64, 782 LShR32, 783 LShR64, 784 AShR32, 785 AShR64, 786 } 787 788 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 789 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 790 pub enum RxSBGOp { 791 Insert, 792 And, 793 Or, 794 Xor, 795 } 796 797 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 798 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 799 pub enum CmpOp { 800 CmpS32, 801 CmpS32Ext16, 802 CmpS64, 803 CmpS64Ext16, 804 CmpS64Ext32, 805 CmpL32, 806 CmpL32Ext16, 807 CmpL64, 808 CmpL64Ext16, 809 CmpL64Ext32, 810 } 811 812 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 813 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 814 pub enum FPUOp1 { 815 Abs32, 816 Abs64, 817 Neg32, 818 Neg64, 819 NegAbs32, 820 NegAbs64, 821 Sqrt32, 822 Sqrt64, 823 Cvt32To64, 824 Cvt64To32, 825 } 826 827 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 828 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 829 pub enum FPUOp2 { 830 Add32, 831 Add64, 832 Sub32, 833 Sub64, 834 Mul32, 835 Mul64, 836 Div32, 837 Div64, 838 Max32, 839 Max64, 840 Min32, 841 Min64, 842 } 843 844 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 845 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 846 pub enum FPUOp3 { 847 MAdd32, 848 MAdd64, 849 MSub32, 850 MSub64, 851 } 852 853 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 854 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 855 pub enum FpuToIntOp { 856 F32ToU32, 857 F32ToI32, 858 F32ToU64, 859 F32ToI64, 860 F64ToU32, 861 F64ToI32, 862 F64ToU64, 863 F64ToI64, 864 } 865 866 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 867 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 868 pub enum IntToFpuOp { 869 U32ToF32, 870 I32ToF32, 871 U32ToF64, 872 I32ToF64, 873 U64ToF32, 874 I64ToF32, 875 U64ToF64, 876 I64ToF64, 877 } 878 879 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 880 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 881 pub enum FpuRoundMode { 882 Minus32, 883 Minus64, 884 Plus32, 885 Plus64, 886 Zero32, 887 Zero64, 888 Nearest32, 889 Nearest64, 890 } 891 892 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 893 #[derive(Clone, Debug)] 894 pub enum WritableRegPair { 895 WritableRegPair { hi: WritableReg, lo: WritableReg }, 896 } 897 898 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 899 #[derive(Clone, Debug)] 900 pub enum RegPair { 901 RegPair { hi: Reg, lo: Reg }, 902 } 903 904 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 905 #[derive(Clone, Debug)] 906 pub enum ProducesBool { 907 ProducesBool { producer: ProducesFlags, cond: Cond }, 908 } 909 910 // Generated as internal constructor for term output_reg. 911 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 912 let pattern0_0 = arg0; 913 // Rule at src/prelude.isle line 86. 914 let expr0_0 = C::value_reg(ctx, pattern0_0); 915 let expr1_0 = C::output(ctx, expr0_0); 916 return Some(expr1_0); 917 } 918 919 // Generated as internal constructor for term output_value. 920 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 921 let pattern0_0 = arg0; 922 // Rule at src/prelude.isle line 90. 923 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 924 let expr1_0 = C::output(ctx, expr0_0); 925 return Some(expr1_0); 926 } 927 928 // Generated as internal constructor for term temp_reg. 929 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 930 let pattern0_0 = arg0; 931 // Rule at src/prelude.isle line 110. 932 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 933 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 934 return Some(expr1_0); 935 } 936 937 // Generated as internal constructor for term lo_reg. 938 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 939 let pattern0_0 = arg0; 940 // Rule at src/prelude.isle line 145. 941 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 942 let expr1_0: usize = 0; 943 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 944 return Some(expr2_0); 945 } 946 947 // Generated as internal constructor for term side_effect. 948 pub fn constructor_side_effect<C: Context>( 949 ctx: &mut C, 950 arg0: &SideEffectNoResult, 951 ) -> Option<InstOutput> { 952 let pattern0_0 = arg0; 953 if let &SideEffectNoResult::Inst { 954 inst: ref pattern1_0, 955 } = pattern0_0 956 { 957 // Rule at src/prelude.isle line 390. 958 let expr0_0 = C::emit(ctx, pattern1_0); 959 let expr1_0 = C::output_none(ctx); 960 return Some(expr1_0); 961 } 962 return None; 963 } 964 965 // Generated as internal constructor for term safepoint. 966 pub fn constructor_safepoint<C: Context>( 967 ctx: &mut C, 968 arg0: &SideEffectNoResult, 969 ) -> Option<InstOutput> { 970 let pattern0_0 = arg0; 971 if let &SideEffectNoResult::Inst { 972 inst: ref pattern1_0, 973 } = pattern0_0 974 { 975 // Rule at src/prelude.isle line 396. 976 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 977 let expr1_0 = C::output_none(ctx); 978 return Some(expr1_0); 979 } 980 return None; 981 } 982 983 // Generated as internal constructor for term produces_flags_get_reg. 984 pub fn constructor_produces_flags_get_reg<C: Context>( 985 ctx: &mut C, 986 arg0: &ProducesFlags, 987 ) -> Option<Reg> { 988 let pattern0_0 = arg0; 989 if let &ProducesFlags::ProducesFlagsReturnsReg { 990 inst: ref pattern1_0, 991 result: pattern1_1, 992 } = pattern0_0 993 { 994 // Rule at src/prelude.isle line 434. 995 return Some(pattern1_1); 996 } 997 return None; 998 } 999 1000 // Generated as internal constructor for term produces_flags_ignore. 1001 pub fn constructor_produces_flags_ignore<C: Context>( 1002 ctx: &mut C, 1003 arg0: &ProducesFlags, 1004 ) -> Option<ProducesFlags> { 1005 let pattern0_0 = arg0; 1006 match pattern0_0 { 1007 &ProducesFlags::ProducesFlagsReturnsReg { 1008 inst: ref pattern1_0, 1009 result: pattern1_1, 1010 } => { 1011 // Rule at src/prelude.isle line 439. 1012 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1013 inst: pattern1_0.clone(), 1014 }; 1015 return Some(expr0_0); 1016 } 1017 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1018 inst: ref pattern1_0, 1019 result: pattern1_1, 1020 } => { 1021 // Rule at src/prelude.isle line 441. 1022 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1023 inst: pattern1_0.clone(), 1024 }; 1025 return Some(expr0_0); 1026 } 1027 _ => {} 1028 } 1029 return None; 1030 } 1031 1032 // Generated as internal constructor for term consumes_flags_concat. 1033 pub fn constructor_consumes_flags_concat<C: Context>( 1034 ctx: &mut C, 1035 arg0: &ConsumesFlags, 1036 arg1: &ConsumesFlags, 1037 ) -> Option<ConsumesFlags> { 1038 let pattern0_0 = arg0; 1039 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1040 inst: ref pattern1_0, 1041 result: pattern1_1, 1042 } = pattern0_0 1043 { 1044 let pattern2_0 = arg1; 1045 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1046 inst: ref pattern3_0, 1047 result: pattern3_1, 1048 } = pattern2_0 1049 { 1050 // Rule at src/prelude.isle line 448. 1051 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1052 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1053 inst1: pattern1_0.clone(), 1054 inst2: pattern3_0.clone(), 1055 result: expr0_0, 1056 }; 1057 return Some(expr1_0); 1058 } 1059 } 1060 return None; 1061 } 1062 1063 // Generated as internal constructor for term with_flags. 1064 pub fn constructor_with_flags<C: Context>( 1065 ctx: &mut C, 1066 arg0: &ProducesFlags, 1067 arg1: &ConsumesFlags, 1068 ) -> Option<ValueRegs> { 1069 let pattern0_0 = arg0; 1070 match pattern0_0 { 1071 &ProducesFlags::ProducesFlagsSideEffect { 1072 inst: ref pattern1_0, 1073 } => { 1074 let pattern2_0 = arg1; 1075 match pattern2_0 { 1076 &ConsumesFlags::ConsumesFlagsReturnsReg { 1077 inst: ref pattern3_0, 1078 result: pattern3_1, 1079 } => { 1080 // Rule at src/prelude.isle line 473. 1081 let expr0_0 = C::emit(ctx, pattern1_0); 1082 let expr1_0 = C::emit(ctx, pattern3_0); 1083 let expr2_0 = C::value_reg(ctx, pattern3_1); 1084 return Some(expr2_0); 1085 } 1086 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1087 inst1: ref pattern3_0, 1088 inst2: ref pattern3_1, 1089 result: pattern3_2, 1090 } => { 1091 // Rule at src/prelude.isle line 479. 1092 let expr0_0 = C::emit(ctx, pattern1_0); 1093 let expr1_0 = C::emit(ctx, pattern3_0); 1094 let expr2_0 = C::emit(ctx, pattern3_1); 1095 return Some(pattern3_2); 1096 } 1097 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1098 inst1: ref pattern3_0, 1099 inst2: ref pattern3_1, 1100 inst3: ref pattern3_2, 1101 inst4: ref pattern3_3, 1102 result: pattern3_4, 1103 } => { 1104 // Rule at src/prelude.isle line 491. 1105 let expr0_0 = C::emit(ctx, pattern1_0); 1106 let expr1_0 = C::emit(ctx, pattern3_0); 1107 let expr2_0 = C::emit(ctx, pattern3_1); 1108 let expr3_0 = C::emit(ctx, pattern3_2); 1109 let expr4_0 = C::emit(ctx, pattern3_3); 1110 return Some(pattern3_4); 1111 } 1112 _ => {} 1113 } 1114 } 1115 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1116 inst: ref pattern1_0, 1117 result: pattern1_1, 1118 } => { 1119 let pattern2_0 = arg1; 1120 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1121 inst: ref pattern3_0, 1122 result: pattern3_1, 1123 } = pattern2_0 1124 { 1125 // Rule at src/prelude.isle line 467. 1126 let expr0_0 = C::emit(ctx, pattern1_0); 1127 let expr1_0 = C::emit(ctx, pattern3_0); 1128 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1129 return Some(expr2_0); 1130 } 1131 } 1132 _ => {} 1133 } 1134 return None; 1135 } 1136 1137 // Generated as internal constructor for term with_flags_reg. 1138 pub fn constructor_with_flags_reg<C: Context>( 1139 ctx: &mut C, 1140 arg0: &ProducesFlags, 1141 arg1: &ConsumesFlags, 1142 ) -> Option<Reg> { 1143 let pattern0_0 = arg0; 1144 let pattern1_0 = arg1; 1145 // Rule at src/prelude.isle line 508. 1146 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1147 let expr1_0: usize = 0; 1148 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1149 return Some(expr2_0); 1150 } 1151 1152 // Generated as internal constructor for term mask_amt_reg. 1153 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1154 let pattern0_0 = arg0; 1155 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1156 let pattern2_0 = arg1; 1157 // Rule at src/isa/s390x/inst.isle line 1040. 1158 let expr0_0: i64 = -1; 1159 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1160 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1161 let expr3_0: u8 = 0; 1162 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1163 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1164 return Some(expr5_0); 1165 } 1166 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1167 let pattern2_0 = arg1; 1168 // Rule at src/isa/s390x/inst.isle line 1043. 1169 return Some(pattern2_0); 1170 } 1171 return None; 1172 } 1173 1174 // Generated as internal constructor for term lower_address. 1175 pub fn constructor_lower_address<C: Context>( 1176 ctx: &mut C, 1177 arg0: MemFlags, 1178 arg1: Value, 1179 arg2: Offset32, 1180 ) -> Option<MemArg> { 1181 let pattern0_0 = arg0; 1182 let pattern1_0 = arg1; 1183 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1184 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1185 match &pattern3_0 { 1186 &InstructionData::UnaryGlobalValue { 1187 opcode: ref pattern4_0, 1188 global_value: pattern4_1, 1189 } => { 1190 if let &Opcode::SymbolValue = pattern4_0 { 1191 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1192 C::symbol_value_data(ctx, pattern4_1) 1193 { 1194 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1195 let pattern8_0 = arg2; 1196 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1197 let closure10 = || { 1198 return Some(pattern6_2); 1199 }; 1200 if let Some(pattern10_0) = closure10() { 1201 if let Some(pattern11_0) = 1202 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1203 { 1204 // Rule at src/isa/s390x/inst.isle line 1136. 1205 let expr0_0 = 1206 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1207 return Some(expr0_0); 1208 } 1209 } 1210 } 1211 } 1212 } 1213 } 1214 &InstructionData::Binary { 1215 opcode: ref pattern4_0, 1216 args: ref pattern4_1, 1217 } => { 1218 if let &Opcode::Iadd = pattern4_0 { 1219 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1220 let pattern7_0 = arg2; 1221 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1222 if pattern8_0 == 0 { 1223 // Rule at src/isa/s390x/inst.isle line 1133. 1224 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1225 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1226 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1227 return Some(expr2_0); 1228 } 1229 } 1230 } 1231 _ => {} 1232 } 1233 } 1234 let pattern2_0 = arg2; 1235 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1236 // Rule at src/isa/s390x/inst.isle line 1130. 1237 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1238 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1239 return Some(expr1_0); 1240 } 1241 1242 // Generated as internal constructor for term stack_addr_impl. 1243 pub fn constructor_stack_addr_impl<C: Context>( 1244 ctx: &mut C, 1245 arg0: Type, 1246 arg1: StackSlot, 1247 arg2: Offset32, 1248 ) -> Option<Reg> { 1249 let pattern0_0 = arg0; 1250 let pattern1_0 = arg1; 1251 let pattern2_0 = arg2; 1252 // Rule at src/isa/s390x/inst.isle line 1163. 1253 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1254 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1255 let expr2_0 = C::emit(ctx, &expr1_0); 1256 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1257 return Some(expr3_0); 1258 } 1259 1260 // Generated as internal constructor for term sink_load. 1261 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1262 let pattern0_0 = arg0; 1263 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1264 if let &InstructionData::Load { 1265 opcode: ref pattern2_0, 1266 arg: pattern2_1, 1267 flags: pattern2_2, 1268 offset: pattern2_3, 1269 } = &pattern1_0 1270 { 1271 if let &Opcode::Load = pattern2_0 { 1272 // Rule at src/isa/s390x/inst.isle line 1233. 1273 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1274 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1275 return Some(expr1_0); 1276 } 1277 } 1278 return None; 1279 } 1280 1281 // Generated as internal constructor for term sink_sload16. 1282 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1283 let pattern0_0 = arg0; 1284 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1285 if let &InstructionData::Load { 1286 opcode: ref pattern2_0, 1287 arg: pattern2_1, 1288 flags: pattern2_2, 1289 offset: pattern2_3, 1290 } = &pattern1_0 1291 { 1292 if let &Opcode::Sload16 = pattern2_0 { 1293 // Rule at src/isa/s390x/inst.isle line 1240. 1294 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1295 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1296 return Some(expr1_0); 1297 } 1298 } 1299 return None; 1300 } 1301 1302 // Generated as internal constructor for term sink_sload32. 1303 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1304 let pattern0_0 = arg0; 1305 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1306 if let &InstructionData::Load { 1307 opcode: ref pattern2_0, 1308 arg: pattern2_1, 1309 flags: pattern2_2, 1310 offset: pattern2_3, 1311 } = &pattern1_0 1312 { 1313 if let &Opcode::Sload32 = pattern2_0 { 1314 // Rule at src/isa/s390x/inst.isle line 1247. 1315 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1316 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1317 return Some(expr1_0); 1318 } 1319 } 1320 return None; 1321 } 1322 1323 // Generated as internal constructor for term sink_uload16. 1324 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1325 let pattern0_0 = arg0; 1326 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1327 if let &InstructionData::Load { 1328 opcode: ref pattern2_0, 1329 arg: pattern2_1, 1330 flags: pattern2_2, 1331 offset: pattern2_3, 1332 } = &pattern1_0 1333 { 1334 if let &Opcode::Uload16 = pattern2_0 { 1335 // Rule at src/isa/s390x/inst.isle line 1254. 1336 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1337 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1338 return Some(expr1_0); 1339 } 1340 } 1341 return None; 1342 } 1343 1344 // Generated as internal constructor for term sink_uload32. 1345 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1346 let pattern0_0 = arg0; 1347 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1348 if let &InstructionData::Load { 1349 opcode: ref pattern2_0, 1350 arg: pattern2_1, 1351 flags: pattern2_2, 1352 offset: pattern2_3, 1353 } = &pattern1_0 1354 { 1355 if let &Opcode::Uload32 = pattern2_0 { 1356 // Rule at src/isa/s390x/inst.isle line 1261. 1357 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1358 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1359 return Some(expr1_0); 1360 } 1361 } 1362 return None; 1363 } 1364 1365 // Generated as internal constructor for term temp_writable_regpair. 1366 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1367 // Rule at src/isa/s390x/inst.isle line 1274. 1368 let expr0_0: u8 = 0; 1369 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1370 let expr2_0: u8 = 1; 1371 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1372 let expr4_0 = WritableRegPair::WritableRegPair { 1373 hi: expr1_0, 1374 lo: expr3_0, 1375 }; 1376 return Some(expr4_0); 1377 } 1378 1379 // Generated as internal constructor for term copy_writable_regpair. 1380 pub fn constructor_copy_writable_regpair<C: Context>( 1381 ctx: &mut C, 1382 arg0: &RegPair, 1383 ) -> Option<WritableRegPair> { 1384 let pattern0_0 = arg0; 1385 // Rule at src/isa/s390x/inst.isle line 1280. 1386 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1387 return Some(expr0_0); 1388 } 1389 1390 // Generated as internal constructor for term writable_regpair_hi. 1391 pub fn constructor_writable_regpair_hi<C: Context>( 1392 ctx: &mut C, 1393 arg0: &WritableRegPair, 1394 ) -> Option<WritableReg> { 1395 let pattern0_0 = arg0; 1396 if let &WritableRegPair::WritableRegPair { 1397 hi: pattern1_0, 1398 lo: pattern1_1, 1399 } = pattern0_0 1400 { 1401 // Rule at src/isa/s390x/inst.isle line 1284. 1402 return Some(pattern1_0); 1403 } 1404 return None; 1405 } 1406 1407 // Generated as internal constructor for term writable_regpair_lo. 1408 pub fn constructor_writable_regpair_lo<C: Context>( 1409 ctx: &mut C, 1410 arg0: &WritableRegPair, 1411 ) -> Option<WritableReg> { 1412 let pattern0_0 = arg0; 1413 if let &WritableRegPair::WritableRegPair { 1414 hi: pattern1_0, 1415 lo: pattern1_1, 1416 } = pattern0_0 1417 { 1418 // Rule at src/isa/s390x/inst.isle line 1288. 1419 return Some(pattern1_1); 1420 } 1421 return None; 1422 } 1423 1424 // Generated as internal constructor for term writable_regpair_to_regpair. 1425 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1426 ctx: &mut C, 1427 arg0: &WritableRegPair, 1428 ) -> Option<RegPair> { 1429 let pattern0_0 = arg0; 1430 if let &WritableRegPair::WritableRegPair { 1431 hi: pattern1_0, 1432 lo: pattern1_1, 1433 } = pattern0_0 1434 { 1435 // Rule at src/isa/s390x/inst.isle line 1295. 1436 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1437 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1438 let expr2_0 = RegPair::RegPair { 1439 hi: expr0_0, 1440 lo: expr1_0, 1441 }; 1442 return Some(expr2_0); 1443 } 1444 return None; 1445 } 1446 1447 // Generated as internal constructor for term uninitialized_regpair. 1448 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1449 // Rule at src/isa/s390x/inst.isle line 1300. 1450 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1451 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1452 return Some(expr1_0); 1453 } 1454 1455 // Generated as internal constructor for term regpair_hi. 1456 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1457 let pattern0_0 = arg0; 1458 if let &RegPair::RegPair { 1459 hi: pattern1_0, 1460 lo: pattern1_1, 1461 } = pattern0_0 1462 { 1463 // Rule at src/isa/s390x/inst.isle line 1305. 1464 return Some(pattern1_0); 1465 } 1466 return None; 1467 } 1468 1469 // Generated as internal constructor for term regpair_lo. 1470 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1471 let pattern0_0 = arg0; 1472 if let &RegPair::RegPair { 1473 hi: pattern1_0, 1474 lo: pattern1_1, 1475 } = pattern0_0 1476 { 1477 // Rule at src/isa/s390x/inst.isle line 1309. 1478 return Some(pattern1_1); 1479 } 1480 return None; 1481 } 1482 1483 // Generated as internal constructor for term alu_rrr. 1484 pub fn constructor_alu_rrr<C: Context>( 1485 ctx: &mut C, 1486 arg0: Type, 1487 arg1: &ALUOp, 1488 arg2: Reg, 1489 arg3: Reg, 1490 ) -> Option<Reg> { 1491 let pattern0_0 = arg0; 1492 let pattern1_0 = arg1; 1493 let pattern2_0 = arg2; 1494 let pattern3_0 = arg3; 1495 // Rule at src/isa/s390x/inst.isle line 1316. 1496 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1497 let expr1_0 = MInst::AluRRR { 1498 alu_op: pattern1_0.clone(), 1499 rd: expr0_0, 1500 rn: pattern2_0, 1501 rm: pattern3_0, 1502 }; 1503 let expr2_0 = C::emit(ctx, &expr1_0); 1504 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1505 return Some(expr3_0); 1506 } 1507 1508 // Generated as internal constructor for term alu_rrsimm16. 1509 pub fn constructor_alu_rrsimm16<C: Context>( 1510 ctx: &mut C, 1511 arg0: Type, 1512 arg1: &ALUOp, 1513 arg2: Reg, 1514 arg3: i16, 1515 ) -> Option<Reg> { 1516 let pattern0_0 = arg0; 1517 let pattern1_0 = arg1; 1518 let pattern2_0 = arg2; 1519 let pattern3_0 = arg3; 1520 // Rule at src/isa/s390x/inst.isle line 1323. 1521 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1522 let expr1_0 = MInst::AluRRSImm16 { 1523 alu_op: pattern1_0.clone(), 1524 rd: expr0_0, 1525 rn: pattern2_0, 1526 imm: pattern3_0, 1527 }; 1528 let expr2_0 = C::emit(ctx, &expr1_0); 1529 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1530 return Some(expr3_0); 1531 } 1532 1533 // Generated as internal constructor for term alu_rr. 1534 pub fn constructor_alu_rr<C: Context>( 1535 ctx: &mut C, 1536 arg0: Type, 1537 arg1: &ALUOp, 1538 arg2: Reg, 1539 arg3: Reg, 1540 ) -> Option<Reg> { 1541 let pattern0_0 = arg0; 1542 let pattern1_0 = arg1; 1543 let pattern2_0 = arg2; 1544 let pattern3_0 = arg3; 1545 // Rule at src/isa/s390x/inst.isle line 1330. 1546 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1547 let expr1_0 = MInst::AluRR { 1548 alu_op: pattern1_0.clone(), 1549 rd: expr0_0, 1550 rm: pattern3_0, 1551 }; 1552 let expr2_0 = C::emit(ctx, &expr1_0); 1553 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1554 return Some(expr3_0); 1555 } 1556 1557 // Generated as internal constructor for term alu_rx. 1558 pub fn constructor_alu_rx<C: Context>( 1559 ctx: &mut C, 1560 arg0: Type, 1561 arg1: &ALUOp, 1562 arg2: Reg, 1563 arg3: &MemArg, 1564 ) -> Option<Reg> { 1565 let pattern0_0 = arg0; 1566 let pattern1_0 = arg1; 1567 let pattern2_0 = arg2; 1568 let pattern3_0 = arg3; 1569 // Rule at src/isa/s390x/inst.isle line 1337. 1570 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1571 let expr1_0 = MInst::AluRX { 1572 alu_op: pattern1_0.clone(), 1573 rd: expr0_0, 1574 mem: pattern3_0.clone(), 1575 }; 1576 let expr2_0 = C::emit(ctx, &expr1_0); 1577 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1578 return Some(expr3_0); 1579 } 1580 1581 // Generated as internal constructor for term alu_rsimm16. 1582 pub fn constructor_alu_rsimm16<C: Context>( 1583 ctx: &mut C, 1584 arg0: Type, 1585 arg1: &ALUOp, 1586 arg2: Reg, 1587 arg3: i16, 1588 ) -> Option<Reg> { 1589 let pattern0_0 = arg0; 1590 let pattern1_0 = arg1; 1591 let pattern2_0 = arg2; 1592 let pattern3_0 = arg3; 1593 // Rule at src/isa/s390x/inst.isle line 1344. 1594 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1595 let expr1_0 = MInst::AluRSImm16 { 1596 alu_op: pattern1_0.clone(), 1597 rd: expr0_0, 1598 imm: pattern3_0, 1599 }; 1600 let expr2_0 = C::emit(ctx, &expr1_0); 1601 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1602 return Some(expr3_0); 1603 } 1604 1605 // Generated as internal constructor for term alu_rsimm32. 1606 pub fn constructor_alu_rsimm32<C: Context>( 1607 ctx: &mut C, 1608 arg0: Type, 1609 arg1: &ALUOp, 1610 arg2: Reg, 1611 arg3: i32, 1612 ) -> Option<Reg> { 1613 let pattern0_0 = arg0; 1614 let pattern1_0 = arg1; 1615 let pattern2_0 = arg2; 1616 let pattern3_0 = arg3; 1617 // Rule at src/isa/s390x/inst.isle line 1351. 1618 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1619 let expr1_0 = MInst::AluRSImm32 { 1620 alu_op: pattern1_0.clone(), 1621 rd: expr0_0, 1622 imm: pattern3_0, 1623 }; 1624 let expr2_0 = C::emit(ctx, &expr1_0); 1625 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1626 return Some(expr3_0); 1627 } 1628 1629 // Generated as internal constructor for term alu_ruimm32. 1630 pub fn constructor_alu_ruimm32<C: Context>( 1631 ctx: &mut C, 1632 arg0: Type, 1633 arg1: &ALUOp, 1634 arg2: Reg, 1635 arg3: u32, 1636 ) -> Option<Reg> { 1637 let pattern0_0 = arg0; 1638 let pattern1_0 = arg1; 1639 let pattern2_0 = arg2; 1640 let pattern3_0 = arg3; 1641 // Rule at src/isa/s390x/inst.isle line 1358. 1642 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1643 let expr1_0 = MInst::AluRUImm32 { 1644 alu_op: pattern1_0.clone(), 1645 rd: expr0_0, 1646 imm: pattern3_0, 1647 }; 1648 let expr2_0 = C::emit(ctx, &expr1_0); 1649 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1650 return Some(expr3_0); 1651 } 1652 1653 // Generated as internal constructor for term alu_ruimm16shifted. 1654 pub fn constructor_alu_ruimm16shifted<C: Context>( 1655 ctx: &mut C, 1656 arg0: Type, 1657 arg1: &ALUOp, 1658 arg2: Reg, 1659 arg3: UImm16Shifted, 1660 ) -> Option<Reg> { 1661 let pattern0_0 = arg0; 1662 let pattern1_0 = arg1; 1663 let pattern2_0 = arg2; 1664 let pattern3_0 = arg3; 1665 // Rule at src/isa/s390x/inst.isle line 1365. 1666 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1667 let expr1_0 = MInst::AluRUImm16Shifted { 1668 alu_op: pattern1_0.clone(), 1669 rd: expr0_0, 1670 imm: pattern3_0, 1671 }; 1672 let expr2_0 = C::emit(ctx, &expr1_0); 1673 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1674 return Some(expr3_0); 1675 } 1676 1677 // Generated as internal constructor for term alu_ruimm32shifted. 1678 pub fn constructor_alu_ruimm32shifted<C: Context>( 1679 ctx: &mut C, 1680 arg0: Type, 1681 arg1: &ALUOp, 1682 arg2: Reg, 1683 arg3: UImm32Shifted, 1684 ) -> Option<Reg> { 1685 let pattern0_0 = arg0; 1686 let pattern1_0 = arg1; 1687 let pattern2_0 = arg2; 1688 let pattern3_0 = arg3; 1689 // Rule at src/isa/s390x/inst.isle line 1372. 1690 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1691 let expr1_0 = MInst::AluRUImm32Shifted { 1692 alu_op: pattern1_0.clone(), 1693 rd: expr0_0, 1694 imm: pattern3_0, 1695 }; 1696 let expr2_0 = C::emit(ctx, &expr1_0); 1697 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1698 return Some(expr3_0); 1699 } 1700 1701 // Generated as internal constructor for term smul_wide. 1702 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1703 let pattern0_0 = arg0; 1704 let pattern1_0 = arg1; 1705 // Rule at src/isa/s390x/inst.isle line 1379. 1706 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1707 let expr1_0 = MInst::SMulWide { 1708 rn: pattern0_0, 1709 rm: pattern1_0, 1710 }; 1711 let expr2_0 = C::emit(ctx, &expr1_0); 1712 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1713 return Some(expr3_0); 1714 } 1715 1716 // Generated as internal constructor for term umul_wide. 1717 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1718 let pattern0_0 = arg0; 1719 let pattern1_0 = arg1; 1720 // Rule at src/isa/s390x/inst.isle line 1386. 1721 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1722 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1723 let expr2_0 = MInst::Mov64 { 1724 rd: expr1_0, 1725 rm: pattern1_0, 1726 }; 1727 let expr3_0 = C::emit(ctx, &expr2_0); 1728 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1729 let expr5_0 = C::emit(ctx, &expr4_0); 1730 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1731 return Some(expr6_0); 1732 } 1733 1734 // Generated as internal constructor for term sdivmod32. 1735 pub fn constructor_sdivmod32<C: Context>( 1736 ctx: &mut C, 1737 arg0: &RegPair, 1738 arg1: Reg, 1739 ) -> Option<RegPair> { 1740 let pattern0_0 = arg0; 1741 let pattern1_0 = arg1; 1742 // Rule at src/isa/s390x/inst.isle line 1394. 1743 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1744 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1745 let expr2_0 = C::emit(ctx, &expr1_0); 1746 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1747 return Some(expr3_0); 1748 } 1749 1750 // Generated as internal constructor for term sdivmod64. 1751 pub fn constructor_sdivmod64<C: Context>( 1752 ctx: &mut C, 1753 arg0: &RegPair, 1754 arg1: Reg, 1755 ) -> Option<RegPair> { 1756 let pattern0_0 = arg0; 1757 let pattern1_0 = arg1; 1758 // Rule at src/isa/s390x/inst.isle line 1401. 1759 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1760 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1761 let expr2_0 = C::emit(ctx, &expr1_0); 1762 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1763 return Some(expr3_0); 1764 } 1765 1766 // Generated as internal constructor for term udivmod32. 1767 pub fn constructor_udivmod32<C: Context>( 1768 ctx: &mut C, 1769 arg0: &RegPair, 1770 arg1: Reg, 1771 ) -> Option<RegPair> { 1772 let pattern0_0 = arg0; 1773 let pattern1_0 = arg1; 1774 // Rule at src/isa/s390x/inst.isle line 1408. 1775 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1776 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1777 let expr2_0 = C::emit(ctx, &expr1_0); 1778 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1779 return Some(expr3_0); 1780 } 1781 1782 // Generated as internal constructor for term udivmod64. 1783 pub fn constructor_udivmod64<C: Context>( 1784 ctx: &mut C, 1785 arg0: &RegPair, 1786 arg1: Reg, 1787 ) -> Option<RegPair> { 1788 let pattern0_0 = arg0; 1789 let pattern1_0 = arg1; 1790 // Rule at src/isa/s390x/inst.isle line 1415. 1791 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1792 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1793 let expr2_0 = C::emit(ctx, &expr1_0); 1794 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1795 return Some(expr3_0); 1796 } 1797 1798 // Generated as internal constructor for term shift_rr. 1799 pub fn constructor_shift_rr<C: Context>( 1800 ctx: &mut C, 1801 arg0: Type, 1802 arg1: &ShiftOp, 1803 arg2: Reg, 1804 arg3: u8, 1805 arg4: Reg, 1806 ) -> Option<Reg> { 1807 let pattern0_0 = arg0; 1808 let pattern1_0 = arg1; 1809 let pattern2_0 = arg2; 1810 let pattern3_0 = arg3; 1811 let pattern4_0 = arg4; 1812 // Rule at src/isa/s390x/inst.isle line 1422. 1813 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1814 let expr1_0 = MInst::ShiftRR { 1815 shift_op: pattern1_0.clone(), 1816 rd: expr0_0, 1817 rn: pattern2_0, 1818 shift_imm: pattern3_0, 1819 shift_reg: pattern4_0, 1820 }; 1821 let expr2_0 = C::emit(ctx, &expr1_0); 1822 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1823 return Some(expr3_0); 1824 } 1825 1826 // Generated as internal constructor for term rxsbg_test. 1827 pub fn constructor_rxsbg_test<C: Context>( 1828 ctx: &mut C, 1829 arg0: &RxSBGOp, 1830 arg1: Reg, 1831 arg2: Reg, 1832 arg3: u8, 1833 arg4: u8, 1834 arg5: i8, 1835 ) -> Option<ProducesFlags> { 1836 let pattern0_0 = arg0; 1837 let pattern1_0 = arg1; 1838 let pattern2_0 = arg2; 1839 let pattern3_0 = arg3; 1840 let pattern4_0 = arg4; 1841 let pattern5_0 = arg5; 1842 // Rule at src/isa/s390x/inst.isle line 1429. 1843 let expr0_0 = MInst::RxSBGTest { 1844 op: pattern0_0.clone(), 1845 rd: pattern1_0, 1846 rn: pattern2_0, 1847 start_bit: pattern3_0, 1848 end_bit: pattern4_0, 1849 rotate_amt: pattern5_0, 1850 }; 1851 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1852 return Some(expr1_0); 1853 } 1854 1855 // Generated as internal constructor for term unary_rr. 1856 pub fn constructor_unary_rr<C: Context>( 1857 ctx: &mut C, 1858 arg0: Type, 1859 arg1: &UnaryOp, 1860 arg2: Reg, 1861 ) -> Option<Reg> { 1862 let pattern0_0 = arg0; 1863 let pattern1_0 = arg1; 1864 let pattern2_0 = arg2; 1865 // Rule at src/isa/s390x/inst.isle line 1435. 1866 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1867 let expr1_0 = MInst::UnaryRR { 1868 op: pattern1_0.clone(), 1869 rd: expr0_0, 1870 rn: pattern2_0, 1871 }; 1872 let expr2_0 = C::emit(ctx, &expr1_0); 1873 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1874 return Some(expr3_0); 1875 } 1876 1877 // Generated as internal constructor for term cmp_rr. 1878 pub fn constructor_cmp_rr<C: Context>( 1879 ctx: &mut C, 1880 arg0: &CmpOp, 1881 arg1: Reg, 1882 arg2: Reg, 1883 ) -> Option<ProducesFlags> { 1884 let pattern0_0 = arg0; 1885 let pattern1_0 = arg1; 1886 let pattern2_0 = arg2; 1887 // Rule at src/isa/s390x/inst.isle line 1442. 1888 let expr0_0 = MInst::CmpRR { 1889 op: pattern0_0.clone(), 1890 rn: pattern1_0, 1891 rm: pattern2_0, 1892 }; 1893 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1894 return Some(expr1_0); 1895 } 1896 1897 // Generated as internal constructor for term cmp_rx. 1898 pub fn constructor_cmp_rx<C: Context>( 1899 ctx: &mut C, 1900 arg0: &CmpOp, 1901 arg1: Reg, 1902 arg2: &MemArg, 1903 ) -> Option<ProducesFlags> { 1904 let pattern0_0 = arg0; 1905 let pattern1_0 = arg1; 1906 let pattern2_0 = arg2; 1907 // Rule at src/isa/s390x/inst.isle line 1447. 1908 let expr0_0 = MInst::CmpRX { 1909 op: pattern0_0.clone(), 1910 rn: pattern1_0, 1911 mem: pattern2_0.clone(), 1912 }; 1913 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1914 return Some(expr1_0); 1915 } 1916 1917 // Generated as internal constructor for term cmp_rsimm16. 1918 pub fn constructor_cmp_rsimm16<C: Context>( 1919 ctx: &mut C, 1920 arg0: &CmpOp, 1921 arg1: Reg, 1922 arg2: i16, 1923 ) -> Option<ProducesFlags> { 1924 let pattern0_0 = arg0; 1925 let pattern1_0 = arg1; 1926 let pattern2_0 = arg2; 1927 // Rule at src/isa/s390x/inst.isle line 1452. 1928 let expr0_0 = MInst::CmpRSImm16 { 1929 op: pattern0_0.clone(), 1930 rn: pattern1_0, 1931 imm: pattern2_0, 1932 }; 1933 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1934 return Some(expr1_0); 1935 } 1936 1937 // Generated as internal constructor for term cmp_rsimm32. 1938 pub fn constructor_cmp_rsimm32<C: Context>( 1939 ctx: &mut C, 1940 arg0: &CmpOp, 1941 arg1: Reg, 1942 arg2: i32, 1943 ) -> Option<ProducesFlags> { 1944 let pattern0_0 = arg0; 1945 let pattern1_0 = arg1; 1946 let pattern2_0 = arg2; 1947 // Rule at src/isa/s390x/inst.isle line 1457. 1948 let expr0_0 = MInst::CmpRSImm32 { 1949 op: pattern0_0.clone(), 1950 rn: pattern1_0, 1951 imm: pattern2_0, 1952 }; 1953 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1954 return Some(expr1_0); 1955 } 1956 1957 // Generated as internal constructor for term cmp_ruimm32. 1958 pub fn constructor_cmp_ruimm32<C: Context>( 1959 ctx: &mut C, 1960 arg0: &CmpOp, 1961 arg1: Reg, 1962 arg2: u32, 1963 ) -> Option<ProducesFlags> { 1964 let pattern0_0 = arg0; 1965 let pattern1_0 = arg1; 1966 let pattern2_0 = arg2; 1967 // Rule at src/isa/s390x/inst.isle line 1462. 1968 let expr0_0 = MInst::CmpRUImm32 { 1969 op: pattern0_0.clone(), 1970 rn: pattern1_0, 1971 imm: pattern2_0, 1972 }; 1973 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1974 return Some(expr1_0); 1975 } 1976 1977 // Generated as internal constructor for term atomic_rmw_impl. 1978 pub fn constructor_atomic_rmw_impl<C: Context>( 1979 ctx: &mut C, 1980 arg0: Type, 1981 arg1: &ALUOp, 1982 arg2: Reg, 1983 arg3: &MemArg, 1984 ) -> Option<Reg> { 1985 let pattern0_0 = arg0; 1986 let pattern1_0 = arg1; 1987 let pattern2_0 = arg2; 1988 let pattern3_0 = arg3; 1989 // Rule at src/isa/s390x/inst.isle line 1467. 1990 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1991 let expr1_0 = MInst::AtomicRmw { 1992 alu_op: pattern1_0.clone(), 1993 rd: expr0_0, 1994 rn: pattern2_0, 1995 mem: pattern3_0.clone(), 1996 }; 1997 let expr2_0 = C::emit(ctx, &expr1_0); 1998 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1999 return Some(expr3_0); 2000 } 2001 2002 // Generated as internal constructor for term atomic_cas32. 2003 pub fn constructor_atomic_cas32<C: Context>( 2004 ctx: &mut C, 2005 arg0: Reg, 2006 arg1: Reg, 2007 arg2: &MemArg, 2008 ) -> Option<Reg> { 2009 let pattern0_0 = arg0; 2010 let pattern1_0 = arg1; 2011 let pattern2_0 = arg2; 2012 // Rule at src/isa/s390x/inst.isle line 1474. 2013 let expr0_0: Type = I32; 2014 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2015 let expr2_0 = MInst::AtomicCas32 { 2016 rd: expr1_0, 2017 rn: pattern1_0, 2018 mem: pattern2_0.clone(), 2019 }; 2020 let expr3_0 = C::emit(ctx, &expr2_0); 2021 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2022 return Some(expr4_0); 2023 } 2024 2025 // Generated as internal constructor for term atomic_cas64. 2026 pub fn constructor_atomic_cas64<C: Context>( 2027 ctx: &mut C, 2028 arg0: Reg, 2029 arg1: Reg, 2030 arg2: &MemArg, 2031 ) -> Option<Reg> { 2032 let pattern0_0 = arg0; 2033 let pattern1_0 = arg1; 2034 let pattern2_0 = arg2; 2035 // Rule at src/isa/s390x/inst.isle line 1481. 2036 let expr0_0: Type = I64; 2037 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2038 let expr2_0 = MInst::AtomicCas64 { 2039 rd: expr1_0, 2040 rn: pattern1_0, 2041 mem: pattern2_0.clone(), 2042 }; 2043 let expr3_0 = C::emit(ctx, &expr2_0); 2044 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2045 return Some(expr4_0); 2046 } 2047 2048 // Generated as internal constructor for term fence_impl. 2049 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2050 // Rule at src/isa/s390x/inst.isle line 1488. 2051 let expr0_0 = MInst::Fence; 2052 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2053 return Some(expr1_0); 2054 } 2055 2056 // Generated as internal constructor for term load32. 2057 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2058 let pattern0_0 = arg0; 2059 // Rule at src/isa/s390x/inst.isle line 1493. 2060 let expr0_0: Type = I32; 2061 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2062 let expr2_0 = MInst::Load32 { 2063 rd: expr1_0, 2064 mem: pattern0_0.clone(), 2065 }; 2066 let expr3_0 = C::emit(ctx, &expr2_0); 2067 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2068 return Some(expr4_0); 2069 } 2070 2071 // Generated as internal constructor for term load64. 2072 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2073 let pattern0_0 = arg0; 2074 // Rule at src/isa/s390x/inst.isle line 1500. 2075 let expr0_0: Type = I64; 2076 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2077 let expr2_0 = MInst::Load64 { 2078 rd: expr1_0, 2079 mem: pattern0_0.clone(), 2080 }; 2081 let expr3_0 = C::emit(ctx, &expr2_0); 2082 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2083 return Some(expr4_0); 2084 } 2085 2086 // Generated as internal constructor for term loadrev16. 2087 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2088 let pattern0_0 = arg0; 2089 // Rule at src/isa/s390x/inst.isle line 1507. 2090 let expr0_0: Type = I32; 2091 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2092 let expr2_0 = MInst::LoadRev16 { 2093 rd: expr1_0, 2094 mem: pattern0_0.clone(), 2095 }; 2096 let expr3_0 = C::emit(ctx, &expr2_0); 2097 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2098 return Some(expr4_0); 2099 } 2100 2101 // Generated as internal constructor for term loadrev32. 2102 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2103 let pattern0_0 = arg0; 2104 // Rule at src/isa/s390x/inst.isle line 1514. 2105 let expr0_0: Type = I32; 2106 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2107 let expr2_0 = MInst::LoadRev32 { 2108 rd: expr1_0, 2109 mem: pattern0_0.clone(), 2110 }; 2111 let expr3_0 = C::emit(ctx, &expr2_0); 2112 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2113 return Some(expr4_0); 2114 } 2115 2116 // Generated as internal constructor for term loadrev64. 2117 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2118 let pattern0_0 = arg0; 2119 // Rule at src/isa/s390x/inst.isle line 1521. 2120 let expr0_0: Type = I64; 2121 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2122 let expr2_0 = MInst::LoadRev64 { 2123 rd: expr1_0, 2124 mem: pattern0_0.clone(), 2125 }; 2126 let expr3_0 = C::emit(ctx, &expr2_0); 2127 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2128 return Some(expr4_0); 2129 } 2130 2131 // Generated as internal constructor for term store8. 2132 pub fn constructor_store8<C: Context>( 2133 ctx: &mut C, 2134 arg0: Reg, 2135 arg1: &MemArg, 2136 ) -> Option<SideEffectNoResult> { 2137 let pattern0_0 = arg0; 2138 let pattern1_0 = arg1; 2139 // Rule at src/isa/s390x/inst.isle line 1528. 2140 let expr0_0 = MInst::Store8 { 2141 rd: pattern0_0, 2142 mem: pattern1_0.clone(), 2143 }; 2144 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2145 return Some(expr1_0); 2146 } 2147 2148 // Generated as internal constructor for term store16. 2149 pub fn constructor_store16<C: Context>( 2150 ctx: &mut C, 2151 arg0: Reg, 2152 arg1: &MemArg, 2153 ) -> Option<SideEffectNoResult> { 2154 let pattern0_0 = arg0; 2155 let pattern1_0 = arg1; 2156 // Rule at src/isa/s390x/inst.isle line 1533. 2157 let expr0_0 = MInst::Store16 { 2158 rd: pattern0_0, 2159 mem: pattern1_0.clone(), 2160 }; 2161 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2162 return Some(expr1_0); 2163 } 2164 2165 // Generated as internal constructor for term store32. 2166 pub fn constructor_store32<C: Context>( 2167 ctx: &mut C, 2168 arg0: Reg, 2169 arg1: &MemArg, 2170 ) -> Option<SideEffectNoResult> { 2171 let pattern0_0 = arg0; 2172 let pattern1_0 = arg1; 2173 // Rule at src/isa/s390x/inst.isle line 1538. 2174 let expr0_0 = MInst::Store32 { 2175 rd: pattern0_0, 2176 mem: pattern1_0.clone(), 2177 }; 2178 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2179 return Some(expr1_0); 2180 } 2181 2182 // Generated as internal constructor for term store64. 2183 pub fn constructor_store64<C: Context>( 2184 ctx: &mut C, 2185 arg0: Reg, 2186 arg1: &MemArg, 2187 ) -> Option<SideEffectNoResult> { 2188 let pattern0_0 = arg0; 2189 let pattern1_0 = arg1; 2190 // Rule at src/isa/s390x/inst.isle line 1543. 2191 let expr0_0 = MInst::Store64 { 2192 rd: pattern0_0, 2193 mem: pattern1_0.clone(), 2194 }; 2195 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2196 return Some(expr1_0); 2197 } 2198 2199 // Generated as internal constructor for term store8_imm. 2200 pub fn constructor_store8_imm<C: Context>( 2201 ctx: &mut C, 2202 arg0: u8, 2203 arg1: &MemArg, 2204 ) -> Option<SideEffectNoResult> { 2205 let pattern0_0 = arg0; 2206 let pattern1_0 = arg1; 2207 // Rule at src/isa/s390x/inst.isle line 1548. 2208 let expr0_0 = MInst::StoreImm8 { 2209 imm: pattern0_0, 2210 mem: pattern1_0.clone(), 2211 }; 2212 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2213 return Some(expr1_0); 2214 } 2215 2216 // Generated as internal constructor for term store16_imm. 2217 pub fn constructor_store16_imm<C: Context>( 2218 ctx: &mut C, 2219 arg0: i16, 2220 arg1: &MemArg, 2221 ) -> Option<SideEffectNoResult> { 2222 let pattern0_0 = arg0; 2223 let pattern1_0 = arg1; 2224 // Rule at src/isa/s390x/inst.isle line 1553. 2225 let expr0_0 = MInst::StoreImm16 { 2226 imm: pattern0_0, 2227 mem: pattern1_0.clone(), 2228 }; 2229 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2230 return Some(expr1_0); 2231 } 2232 2233 // Generated as internal constructor for term store32_simm16. 2234 pub fn constructor_store32_simm16<C: Context>( 2235 ctx: &mut C, 2236 arg0: i16, 2237 arg1: &MemArg, 2238 ) -> Option<SideEffectNoResult> { 2239 let pattern0_0 = arg0; 2240 let pattern1_0 = arg1; 2241 // Rule at src/isa/s390x/inst.isle line 1558. 2242 let expr0_0 = MInst::StoreImm32SExt16 { 2243 imm: pattern0_0, 2244 mem: pattern1_0.clone(), 2245 }; 2246 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2247 return Some(expr1_0); 2248 } 2249 2250 // Generated as internal constructor for term store64_simm16. 2251 pub fn constructor_store64_simm16<C: Context>( 2252 ctx: &mut C, 2253 arg0: i16, 2254 arg1: &MemArg, 2255 ) -> Option<SideEffectNoResult> { 2256 let pattern0_0 = arg0; 2257 let pattern1_0 = arg1; 2258 // Rule at src/isa/s390x/inst.isle line 1563. 2259 let expr0_0 = MInst::StoreImm64SExt16 { 2260 imm: pattern0_0, 2261 mem: pattern1_0.clone(), 2262 }; 2263 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2264 return Some(expr1_0); 2265 } 2266 2267 // Generated as internal constructor for term storerev16. 2268 pub fn constructor_storerev16<C: Context>( 2269 ctx: &mut C, 2270 arg0: Reg, 2271 arg1: &MemArg, 2272 ) -> Option<SideEffectNoResult> { 2273 let pattern0_0 = arg0; 2274 let pattern1_0 = arg1; 2275 // Rule at src/isa/s390x/inst.isle line 1568. 2276 let expr0_0 = MInst::StoreRev16 { 2277 rd: pattern0_0, 2278 mem: pattern1_0.clone(), 2279 }; 2280 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2281 return Some(expr1_0); 2282 } 2283 2284 // Generated as internal constructor for term storerev32. 2285 pub fn constructor_storerev32<C: Context>( 2286 ctx: &mut C, 2287 arg0: Reg, 2288 arg1: &MemArg, 2289 ) -> Option<SideEffectNoResult> { 2290 let pattern0_0 = arg0; 2291 let pattern1_0 = arg1; 2292 // Rule at src/isa/s390x/inst.isle line 1573. 2293 let expr0_0 = MInst::StoreRev32 { 2294 rd: pattern0_0, 2295 mem: pattern1_0.clone(), 2296 }; 2297 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2298 return Some(expr1_0); 2299 } 2300 2301 // Generated as internal constructor for term storerev64. 2302 pub fn constructor_storerev64<C: Context>( 2303 ctx: &mut C, 2304 arg0: Reg, 2305 arg1: &MemArg, 2306 ) -> Option<SideEffectNoResult> { 2307 let pattern0_0 = arg0; 2308 let pattern1_0 = arg1; 2309 // Rule at src/isa/s390x/inst.isle line 1578. 2310 let expr0_0 = MInst::StoreRev64 { 2311 rd: pattern0_0, 2312 mem: pattern1_0.clone(), 2313 }; 2314 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2315 return Some(expr1_0); 2316 } 2317 2318 // Generated as internal constructor for term fpu_rr. 2319 pub fn constructor_fpu_rr<C: Context>( 2320 ctx: &mut C, 2321 arg0: Type, 2322 arg1: &FPUOp1, 2323 arg2: Reg, 2324 ) -> Option<Reg> { 2325 let pattern0_0 = arg0; 2326 let pattern1_0 = arg1; 2327 let pattern2_0 = arg2; 2328 // Rule at src/isa/s390x/inst.isle line 1583. 2329 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2330 let expr1_0 = MInst::FpuRR { 2331 fpu_op: pattern1_0.clone(), 2332 rd: expr0_0, 2333 rn: pattern2_0, 2334 }; 2335 let expr2_0 = C::emit(ctx, &expr1_0); 2336 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2337 return Some(expr3_0); 2338 } 2339 2340 // Generated as internal constructor for term fpu_rrr. 2341 pub fn constructor_fpu_rrr<C: Context>( 2342 ctx: &mut C, 2343 arg0: Type, 2344 arg1: &FPUOp2, 2345 arg2: Reg, 2346 arg3: Reg, 2347 ) -> Option<Reg> { 2348 let pattern0_0 = arg0; 2349 let pattern1_0 = arg1; 2350 let pattern2_0 = arg2; 2351 let pattern3_0 = arg3; 2352 // Rule at src/isa/s390x/inst.isle line 1590. 2353 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2354 let expr1_0 = MInst::FpuRRR { 2355 fpu_op: pattern1_0.clone(), 2356 rd: expr0_0, 2357 rm: pattern3_0, 2358 }; 2359 let expr2_0 = C::emit(ctx, &expr1_0); 2360 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2361 return Some(expr3_0); 2362 } 2363 2364 // Generated as internal constructor for term fpu_rrrr. 2365 pub fn constructor_fpu_rrrr<C: Context>( 2366 ctx: &mut C, 2367 arg0: Type, 2368 arg1: &FPUOp3, 2369 arg2: Reg, 2370 arg3: Reg, 2371 arg4: Reg, 2372 ) -> Option<Reg> { 2373 let pattern0_0 = arg0; 2374 let pattern1_0 = arg1; 2375 let pattern2_0 = arg2; 2376 let pattern3_0 = arg3; 2377 let pattern4_0 = arg4; 2378 // Rule at src/isa/s390x/inst.isle line 1597. 2379 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2380 let expr1_0 = MInst::FpuRRRR { 2381 fpu_op: pattern1_0.clone(), 2382 rd: expr0_0, 2383 rn: pattern3_0, 2384 rm: pattern4_0, 2385 }; 2386 let expr2_0 = C::emit(ctx, &expr1_0); 2387 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2388 return Some(expr3_0); 2389 } 2390 2391 // Generated as internal constructor for term fpu_copysign. 2392 pub fn constructor_fpu_copysign<C: Context>( 2393 ctx: &mut C, 2394 arg0: Type, 2395 arg1: Reg, 2396 arg2: Reg, 2397 ) -> Option<Reg> { 2398 let pattern0_0 = arg0; 2399 let pattern1_0 = arg1; 2400 let pattern2_0 = arg2; 2401 // Rule at src/isa/s390x/inst.isle line 1604. 2402 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2403 let expr1_0 = MInst::FpuCopysign { 2404 rd: expr0_0, 2405 rn: pattern1_0, 2406 rm: pattern2_0, 2407 }; 2408 let expr2_0 = C::emit(ctx, &expr1_0); 2409 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2410 return Some(expr3_0); 2411 } 2412 2413 // Generated as internal constructor for term fpu_cmp32. 2414 pub fn constructor_fpu_cmp32<C: Context>( 2415 ctx: &mut C, 2416 arg0: Reg, 2417 arg1: Reg, 2418 ) -> Option<ProducesFlags> { 2419 let pattern0_0 = arg0; 2420 let pattern1_0 = arg1; 2421 // Rule at src/isa/s390x/inst.isle line 1611. 2422 let expr0_0 = MInst::FpuCmp32 { 2423 rn: pattern0_0, 2424 rm: pattern1_0, 2425 }; 2426 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2427 return Some(expr1_0); 2428 } 2429 2430 // Generated as internal constructor for term fpu_cmp64. 2431 pub fn constructor_fpu_cmp64<C: Context>( 2432 ctx: &mut C, 2433 arg0: Reg, 2434 arg1: Reg, 2435 ) -> Option<ProducesFlags> { 2436 let pattern0_0 = arg0; 2437 let pattern1_0 = arg1; 2438 // Rule at src/isa/s390x/inst.isle line 1616. 2439 let expr0_0 = MInst::FpuCmp64 { 2440 rn: pattern0_0, 2441 rm: pattern1_0, 2442 }; 2443 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2444 return Some(expr1_0); 2445 } 2446 2447 // Generated as internal constructor for term fpu_to_int. 2448 pub fn constructor_fpu_to_int<C: Context>( 2449 ctx: &mut C, 2450 arg0: Type, 2451 arg1: &FpuToIntOp, 2452 arg2: Reg, 2453 ) -> Option<ProducesFlags> { 2454 let pattern0_0 = arg0; 2455 let pattern1_0 = arg1; 2456 let pattern2_0 = arg2; 2457 // Rule at src/isa/s390x/inst.isle line 1621. 2458 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2459 let expr1_0 = MInst::FpuToInt { 2460 op: pattern1_0.clone(), 2461 rd: expr0_0, 2462 rn: pattern2_0, 2463 }; 2464 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2465 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2466 inst: expr1_0, 2467 result: expr2_0, 2468 }; 2469 return Some(expr3_0); 2470 } 2471 2472 // Generated as internal constructor for term int_to_fpu. 2473 pub fn constructor_int_to_fpu<C: Context>( 2474 ctx: &mut C, 2475 arg0: Type, 2476 arg1: &IntToFpuOp, 2477 arg2: Reg, 2478 ) -> Option<Reg> { 2479 let pattern0_0 = arg0; 2480 let pattern1_0 = arg1; 2481 let pattern2_0 = arg2; 2482 // Rule at src/isa/s390x/inst.isle line 1628. 2483 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2484 let expr1_0 = MInst::IntToFpu { 2485 op: pattern1_0.clone(), 2486 rd: expr0_0, 2487 rn: pattern2_0, 2488 }; 2489 let expr2_0 = C::emit(ctx, &expr1_0); 2490 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2491 return Some(expr3_0); 2492 } 2493 2494 // Generated as internal constructor for term fpu_round. 2495 pub fn constructor_fpu_round<C: Context>( 2496 ctx: &mut C, 2497 arg0: Type, 2498 arg1: &FpuRoundMode, 2499 arg2: Reg, 2500 ) -> Option<Reg> { 2501 let pattern0_0 = arg0; 2502 let pattern1_0 = arg1; 2503 let pattern2_0 = arg2; 2504 // Rule at src/isa/s390x/inst.isle line 1635. 2505 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2506 let expr1_0 = MInst::FpuRound { 2507 op: pattern1_0.clone(), 2508 rd: expr0_0, 2509 rn: pattern2_0, 2510 }; 2511 let expr2_0 = C::emit(ctx, &expr1_0); 2512 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2513 return Some(expr3_0); 2514 } 2515 2516 // Generated as internal constructor for term fpuvec_rrr. 2517 pub fn constructor_fpuvec_rrr<C: Context>( 2518 ctx: &mut C, 2519 arg0: Type, 2520 arg1: &FPUOp2, 2521 arg2: Reg, 2522 arg3: Reg, 2523 ) -> Option<Reg> { 2524 let pattern0_0 = arg0; 2525 let pattern1_0 = arg1; 2526 let pattern2_0 = arg2; 2527 let pattern3_0 = arg3; 2528 // Rule at src/isa/s390x/inst.isle line 1642. 2529 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2530 let expr1_0 = MInst::FpuVecRRR { 2531 fpu_op: pattern1_0.clone(), 2532 rd: expr0_0, 2533 rn: pattern2_0, 2534 rm: pattern3_0, 2535 }; 2536 let expr2_0 = C::emit(ctx, &expr1_0); 2537 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2538 return Some(expr3_0); 2539 } 2540 2541 // Generated as internal constructor for term mov_to_fpr. 2542 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2543 let pattern0_0 = arg0; 2544 // Rule at src/isa/s390x/inst.isle line 1649. 2545 let expr0_0: Type = F64; 2546 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2547 let expr2_0 = MInst::MovToFpr { 2548 rd: expr1_0, 2549 rn: pattern0_0, 2550 }; 2551 let expr3_0 = C::emit(ctx, &expr2_0); 2552 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2553 return Some(expr4_0); 2554 } 2555 2556 // Generated as internal constructor for term mov_from_fpr. 2557 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2558 let pattern0_0 = arg0; 2559 // Rule at src/isa/s390x/inst.isle line 1656. 2560 let expr0_0: Type = I64; 2561 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2562 let expr2_0 = MInst::MovFromFpr { 2563 rd: expr1_0, 2564 rn: pattern0_0, 2565 }; 2566 let expr3_0 = C::emit(ctx, &expr2_0); 2567 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2568 return Some(expr4_0); 2569 } 2570 2571 // Generated as internal constructor for term fpu_load32. 2572 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2573 let pattern0_0 = arg0; 2574 // Rule at src/isa/s390x/inst.isle line 1663. 2575 let expr0_0: Type = F32; 2576 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2577 let expr2_0 = MInst::FpuLoad32 { 2578 rd: expr1_0, 2579 mem: pattern0_0.clone(), 2580 }; 2581 let expr3_0 = C::emit(ctx, &expr2_0); 2582 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2583 return Some(expr4_0); 2584 } 2585 2586 // Generated as internal constructor for term fpu_load64. 2587 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2588 let pattern0_0 = arg0; 2589 // Rule at src/isa/s390x/inst.isle line 1670. 2590 let expr0_0: Type = F64; 2591 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2592 let expr2_0 = MInst::FpuLoad64 { 2593 rd: expr1_0, 2594 mem: pattern0_0.clone(), 2595 }; 2596 let expr3_0 = C::emit(ctx, &expr2_0); 2597 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2598 return Some(expr4_0); 2599 } 2600 2601 // Generated as internal constructor for term fpu_loadrev32. 2602 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2603 let pattern0_0 = arg0; 2604 // Rule at src/isa/s390x/inst.isle line 1677. 2605 let expr0_0: Type = F32; 2606 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2607 let expr2_0 = MInst::FpuLoadRev32 { 2608 rd: expr1_0, 2609 mem: pattern0_0.clone(), 2610 }; 2611 let expr3_0 = C::emit(ctx, &expr2_0); 2612 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2613 return Some(expr4_0); 2614 } 2615 2616 // Generated as internal constructor for term fpu_loadrev64. 2617 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2618 let pattern0_0 = arg0; 2619 // Rule at src/isa/s390x/inst.isle line 1684. 2620 let expr0_0: Type = F64; 2621 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2622 let expr2_0 = MInst::FpuLoadRev64 { 2623 rd: expr1_0, 2624 mem: pattern0_0.clone(), 2625 }; 2626 let expr3_0 = C::emit(ctx, &expr2_0); 2627 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2628 return Some(expr4_0); 2629 } 2630 2631 // Generated as internal constructor for term fpu_store32. 2632 pub fn constructor_fpu_store32<C: Context>( 2633 ctx: &mut C, 2634 arg0: Reg, 2635 arg1: &MemArg, 2636 ) -> Option<SideEffectNoResult> { 2637 let pattern0_0 = arg0; 2638 let pattern1_0 = arg1; 2639 // Rule at src/isa/s390x/inst.isle line 1691. 2640 let expr0_0 = MInst::FpuStore32 { 2641 rd: pattern0_0, 2642 mem: pattern1_0.clone(), 2643 }; 2644 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2645 return Some(expr1_0); 2646 } 2647 2648 // Generated as internal constructor for term fpu_store64. 2649 pub fn constructor_fpu_store64<C: Context>( 2650 ctx: &mut C, 2651 arg0: Reg, 2652 arg1: &MemArg, 2653 ) -> Option<SideEffectNoResult> { 2654 let pattern0_0 = arg0; 2655 let pattern1_0 = arg1; 2656 // Rule at src/isa/s390x/inst.isle line 1696. 2657 let expr0_0 = MInst::FpuStore64 { 2658 rd: pattern0_0, 2659 mem: pattern1_0.clone(), 2660 }; 2661 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2662 return Some(expr1_0); 2663 } 2664 2665 // Generated as internal constructor for term fpu_storerev32. 2666 pub fn constructor_fpu_storerev32<C: Context>( 2667 ctx: &mut C, 2668 arg0: Reg, 2669 arg1: &MemArg, 2670 ) -> Option<SideEffectNoResult> { 2671 let pattern0_0 = arg0; 2672 let pattern1_0 = arg1; 2673 // Rule at src/isa/s390x/inst.isle line 1701. 2674 let expr0_0 = MInst::FpuStoreRev32 { 2675 rd: pattern0_0, 2676 mem: pattern1_0.clone(), 2677 }; 2678 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2679 return Some(expr1_0); 2680 } 2681 2682 // Generated as internal constructor for term fpu_storerev64. 2683 pub fn constructor_fpu_storerev64<C: Context>( 2684 ctx: &mut C, 2685 arg0: Reg, 2686 arg1: &MemArg, 2687 ) -> Option<SideEffectNoResult> { 2688 let pattern0_0 = arg0; 2689 let pattern1_0 = arg1; 2690 // Rule at src/isa/s390x/inst.isle line 1706. 2691 let expr0_0 = MInst::FpuStoreRev64 { 2692 rd: pattern0_0, 2693 mem: pattern1_0.clone(), 2694 }; 2695 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2696 return Some(expr1_0); 2697 } 2698 2699 // Generated as internal constructor for term load_ext_name_far. 2700 pub fn constructor_load_ext_name_far<C: Context>( 2701 ctx: &mut C, 2702 arg0: ExternalName, 2703 arg1: i64, 2704 ) -> Option<Reg> { 2705 let pattern0_0 = arg0; 2706 let pattern1_0 = arg1; 2707 // Rule at src/isa/s390x/inst.isle line 1711. 2708 let expr0_0: Type = I64; 2709 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2710 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2711 let expr3_0 = MInst::LoadExtNameFar { 2712 rd: expr1_0, 2713 name: expr2_0, 2714 offset: pattern1_0, 2715 }; 2716 let expr4_0 = C::emit(ctx, &expr3_0); 2717 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2718 return Some(expr5_0); 2719 } 2720 2721 // Generated as internal constructor for term load_addr. 2722 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2723 let pattern0_0 = arg0; 2724 // Rule at src/isa/s390x/inst.isle line 1719. 2725 let expr0_0: Type = I64; 2726 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2727 let expr2_0 = MInst::LoadAddr { 2728 rd: expr1_0, 2729 mem: pattern0_0.clone(), 2730 }; 2731 let expr3_0 = C::emit(ctx, &expr2_0); 2732 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2733 return Some(expr4_0); 2734 } 2735 2736 // Generated as internal constructor for term jump_impl. 2737 pub fn constructor_jump_impl<C: Context>( 2738 ctx: &mut C, 2739 arg0: MachLabel, 2740 ) -> Option<SideEffectNoResult> { 2741 let pattern0_0 = arg0; 2742 // Rule at src/isa/s390x/inst.isle line 1726. 2743 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2744 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2745 return Some(expr1_0); 2746 } 2747 2748 // Generated as internal constructor for term cond_br. 2749 pub fn constructor_cond_br<C: Context>( 2750 ctx: &mut C, 2751 arg0: MachLabel, 2752 arg1: MachLabel, 2753 arg2: &Cond, 2754 ) -> Option<SideEffectNoResult> { 2755 let pattern0_0 = arg0; 2756 let pattern1_0 = arg1; 2757 let pattern2_0 = arg2; 2758 // Rule at src/isa/s390x/inst.isle line 1731. 2759 let expr0_0 = MInst::CondBr { 2760 taken: pattern0_0, 2761 not_taken: pattern1_0, 2762 cond: pattern2_0.clone(), 2763 }; 2764 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2765 return Some(expr1_0); 2766 } 2767 2768 // Generated as internal constructor for term oneway_cond_br. 2769 pub fn constructor_oneway_cond_br<C: Context>( 2770 ctx: &mut C, 2771 arg0: MachLabel, 2772 arg1: &Cond, 2773 ) -> Option<SideEffectNoResult> { 2774 let pattern0_0 = arg0; 2775 let pattern1_0 = arg1; 2776 // Rule at src/isa/s390x/inst.isle line 1736. 2777 let expr0_0 = MInst::OneWayCondBr { 2778 target: pattern0_0, 2779 cond: pattern1_0.clone(), 2780 }; 2781 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2782 return Some(expr1_0); 2783 } 2784 2785 // Generated as internal constructor for term jt_sequence. 2786 pub fn constructor_jt_sequence<C: Context>( 2787 ctx: &mut C, 2788 arg0: Reg, 2789 arg1: &VecMachLabel, 2790 ) -> Option<SideEffectNoResult> { 2791 let pattern0_0 = arg0; 2792 let pattern1_0 = arg1; 2793 // Rule at src/isa/s390x/inst.isle line 1741. 2794 let expr0_0 = MInst::JTSequence { 2795 ridx: pattern0_0, 2796 targets: pattern1_0.clone(), 2797 }; 2798 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2799 return Some(expr1_0); 2800 } 2801 2802 // Generated as internal constructor for term drop_flags. 2803 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2804 let pattern0_0 = arg0; 2805 if let &ProducesFlags::ProducesFlagsReturnsReg { 2806 inst: ref pattern1_0, 2807 result: pattern1_1, 2808 } = pattern0_0 2809 { 2810 // Rule at src/isa/s390x/inst.isle line 1746. 2811 let expr0_0 = C::emit(ctx, pattern1_0); 2812 return Some(pattern1_1); 2813 } 2814 return None; 2815 } 2816 2817 // Generated as internal constructor for term push_alu_reg. 2818 pub fn constructor_push_alu_reg<C: Context>( 2819 ctx: &mut C, 2820 arg0: &VecMInstBuilder, 2821 arg1: &ALUOp, 2822 arg2: WritableReg, 2823 arg3: Reg, 2824 arg4: Reg, 2825 ) -> Option<Reg> { 2826 let pattern0_0 = arg0; 2827 let pattern1_0 = arg1; 2828 let pattern2_0 = arg2; 2829 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2830 let pattern4_0 = arg3; 2831 let pattern5_0 = arg4; 2832 // Rule at src/isa/s390x/inst.isle line 1785. 2833 let expr0_0 = MInst::AluRRR { 2834 alu_op: pattern1_0.clone(), 2835 rd: pattern3_0, 2836 rn: pattern4_0, 2837 rm: pattern5_0, 2838 }; 2839 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2840 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2841 return Some(expr2_0); 2842 } 2843 return None; 2844 } 2845 2846 // Generated as internal constructor for term push_alu_uimm32shifted. 2847 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2848 ctx: &mut C, 2849 arg0: &VecMInstBuilder, 2850 arg1: &ALUOp, 2851 arg2: WritableReg, 2852 arg3: Reg, 2853 arg4: UImm32Shifted, 2854 ) -> Option<Reg> { 2855 let pattern0_0 = arg0; 2856 let pattern1_0 = arg1; 2857 let pattern2_0 = arg2; 2858 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2859 let pattern4_0 = arg3; 2860 let closure5 = || { 2861 return Some(pattern3_0); 2862 }; 2863 if let Some(pattern5_0) = closure5() { 2864 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2865 let pattern7_0 = arg4; 2866 // Rule at src/isa/s390x/inst.isle line 1791. 2867 let expr0_0 = MInst::AluRUImm32Shifted { 2868 alu_op: pattern1_0.clone(), 2869 rd: pattern3_0, 2870 imm: pattern7_0, 2871 }; 2872 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2873 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2874 return Some(expr2_0); 2875 } 2876 } 2877 } 2878 return None; 2879 } 2880 2881 // Generated as internal constructor for term push_shift. 2882 pub fn constructor_push_shift<C: Context>( 2883 ctx: &mut C, 2884 arg0: &VecMInstBuilder, 2885 arg1: &ShiftOp, 2886 arg2: WritableReg, 2887 arg3: Reg, 2888 arg4: u8, 2889 arg5: Reg, 2890 ) -> Option<Reg> { 2891 let pattern0_0 = arg0; 2892 let pattern1_0 = arg1; 2893 let pattern2_0 = arg2; 2894 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2895 let pattern4_0 = arg3; 2896 let pattern5_0 = arg4; 2897 let pattern6_0 = arg5; 2898 // Rule at src/isa/s390x/inst.isle line 1797. 2899 let expr0_0 = MInst::ShiftRR { 2900 shift_op: pattern1_0.clone(), 2901 rd: pattern3_0, 2902 rn: pattern4_0, 2903 shift_imm: pattern5_0, 2904 shift_reg: pattern6_0, 2905 }; 2906 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2907 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2908 return Some(expr2_0); 2909 } 2910 return None; 2911 } 2912 2913 // Generated as internal constructor for term push_rxsbg. 2914 pub fn constructor_push_rxsbg<C: Context>( 2915 ctx: &mut C, 2916 arg0: &VecMInstBuilder, 2917 arg1: &RxSBGOp, 2918 arg2: WritableReg, 2919 arg3: Reg, 2920 arg4: Reg, 2921 arg5: u8, 2922 arg6: u8, 2923 arg7: i8, 2924 ) -> Option<Reg> { 2925 let pattern0_0 = arg0; 2926 let pattern1_0 = arg1; 2927 let pattern2_0 = arg2; 2928 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2929 let pattern4_0 = arg3; 2930 let closure5 = || { 2931 return Some(pattern3_0); 2932 }; 2933 if let Some(pattern5_0) = closure5() { 2934 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2935 let pattern7_0 = arg4; 2936 let pattern8_0 = arg5; 2937 let pattern9_0 = arg6; 2938 let pattern10_0 = arg7; 2939 // Rule at src/isa/s390x/inst.isle line 1804. 2940 let expr0_0 = MInst::RxSBG { 2941 op: pattern1_0.clone(), 2942 rd: pattern3_0, 2943 rn: pattern7_0, 2944 start_bit: pattern8_0, 2945 end_bit: pattern9_0, 2946 rotate_amt: pattern10_0, 2947 }; 2948 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2949 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2950 return Some(expr2_0); 2951 } 2952 } 2953 } 2954 return None; 2955 } 2956 2957 // Generated as internal constructor for term push_unary. 2958 pub fn constructor_push_unary<C: Context>( 2959 ctx: &mut C, 2960 arg0: &VecMInstBuilder, 2961 arg1: &UnaryOp, 2962 arg2: WritableReg, 2963 arg3: Reg, 2964 ) -> Option<Reg> { 2965 let pattern0_0 = arg0; 2966 let pattern1_0 = arg1; 2967 let pattern2_0 = arg2; 2968 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2969 let pattern4_0 = arg3; 2970 // Rule at src/isa/s390x/inst.isle line 1811. 2971 let expr0_0 = MInst::UnaryRR { 2972 op: pattern1_0.clone(), 2973 rd: pattern3_0, 2974 rn: pattern4_0, 2975 }; 2976 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2977 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2978 return Some(expr2_0); 2979 } 2980 return None; 2981 } 2982 2983 // Generated as internal constructor for term push_atomic_cas32. 2984 pub fn constructor_push_atomic_cas32<C: Context>( 2985 ctx: &mut C, 2986 arg0: &VecMInstBuilder, 2987 arg1: WritableReg, 2988 arg2: Reg, 2989 arg3: &MemArg, 2990 ) -> Option<Reg> { 2991 let pattern0_0 = arg0; 2992 let pattern1_0 = arg1; 2993 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2994 let pattern3_0 = arg2; 2995 let pattern4_0 = arg3; 2996 // Rule at src/isa/s390x/inst.isle line 1817. 2997 let expr0_0 = MInst::AtomicCas32 { 2998 rd: pattern2_0, 2999 rn: pattern3_0, 3000 mem: pattern4_0.clone(), 3001 }; 3002 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3003 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3004 return Some(expr2_0); 3005 } 3006 return None; 3007 } 3008 3009 // Generated as internal constructor for term push_atomic_cas64. 3010 pub fn constructor_push_atomic_cas64<C: Context>( 3011 ctx: &mut C, 3012 arg0: &VecMInstBuilder, 3013 arg1: WritableReg, 3014 arg2: Reg, 3015 arg3: &MemArg, 3016 ) -> Option<Reg> { 3017 let pattern0_0 = arg0; 3018 let pattern1_0 = arg1; 3019 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3020 let pattern3_0 = arg2; 3021 let pattern4_0 = arg3; 3022 // Rule at src/isa/s390x/inst.isle line 1823. 3023 let expr0_0 = MInst::AtomicCas64 { 3024 rd: pattern2_0, 3025 rn: pattern3_0, 3026 mem: pattern4_0.clone(), 3027 }; 3028 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3029 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3030 return Some(expr2_0); 3031 } 3032 return None; 3033 } 3034 3035 // Generated as internal constructor for term push_break_if. 3036 pub fn constructor_push_break_if<C: Context>( 3037 ctx: &mut C, 3038 arg0: &VecMInstBuilder, 3039 arg1: &ProducesFlags, 3040 arg2: &Cond, 3041 ) -> Option<Reg> { 3042 let pattern0_0 = arg0; 3043 let pattern1_0 = arg1; 3044 if let &ProducesFlags::ProducesFlagsSideEffect { 3045 inst: ref pattern2_0, 3046 } = pattern1_0 3047 { 3048 let pattern3_0 = arg2; 3049 // Rule at src/isa/s390x/inst.isle line 1829. 3050 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3051 let expr1_0 = MInst::CondBreak { 3052 cond: pattern3_0.clone(), 3053 }; 3054 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3055 let expr3_0 = C::invalid_reg(ctx); 3056 return Some(expr3_0); 3057 } 3058 return None; 3059 } 3060 3061 // Generated as internal constructor for term emit_loop. 3062 pub fn constructor_emit_loop<C: Context>( 3063 ctx: &mut C, 3064 arg0: &VecMInstBuilder, 3065 arg1: &Cond, 3066 ) -> Option<Unit> { 3067 let pattern0_0 = arg0; 3068 let pattern1_0 = arg1; 3069 // Rule at src/isa/s390x/inst.isle line 1836. 3070 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3071 let expr1_0 = MInst::Loop { 3072 body: expr0_0, 3073 cond: pattern1_0.clone(), 3074 }; 3075 let expr2_0 = C::emit(ctx, &expr1_0); 3076 return Some(expr2_0); 3077 } 3078 3079 // Generated as internal constructor for term emit_mov. 3080 pub fn constructor_emit_mov<C: Context>( 3081 ctx: &mut C, 3082 arg0: Type, 3083 arg1: WritableReg, 3084 arg2: Reg, 3085 ) -> Option<Unit> { 3086 let pattern0_0 = arg0; 3087 if pattern0_0 == F32 { 3088 let pattern2_0 = arg1; 3089 let pattern3_0 = arg2; 3090 // Rule at src/isa/s390x/inst.isle line 1851. 3091 let expr0_0 = MInst::FpuMove32 { 3092 rd: pattern2_0, 3093 rn: pattern3_0, 3094 }; 3095 let expr1_0 = C::emit(ctx, &expr0_0); 3096 return Some(expr1_0); 3097 } 3098 if pattern0_0 == F64 { 3099 let pattern2_0 = arg1; 3100 let pattern3_0 = arg2; 3101 // Rule at src/isa/s390x/inst.isle line 1854. 3102 let expr0_0 = MInst::FpuMove64 { 3103 rd: pattern2_0, 3104 rn: pattern3_0, 3105 }; 3106 let expr1_0 = C::emit(ctx, &expr0_0); 3107 return Some(expr1_0); 3108 } 3109 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3110 let pattern2_0 = arg1; 3111 let pattern3_0 = arg2; 3112 // Rule at src/isa/s390x/inst.isle line 1845. 3113 let expr0_0 = MInst::Mov32 { 3114 rd: pattern2_0, 3115 rm: pattern3_0, 3116 }; 3117 let expr1_0 = C::emit(ctx, &expr0_0); 3118 return Some(expr1_0); 3119 } 3120 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3121 let pattern2_0 = arg1; 3122 let pattern3_0 = arg2; 3123 // Rule at src/isa/s390x/inst.isle line 1848. 3124 let expr0_0 = MInst::Mov64 { 3125 rd: pattern2_0, 3126 rm: pattern3_0, 3127 }; 3128 let expr1_0 = C::emit(ctx, &expr0_0); 3129 return Some(expr1_0); 3130 } 3131 return None; 3132 } 3133 3134 // Generated as internal constructor for term copy_writable_reg. 3135 pub fn constructor_copy_writable_reg<C: Context>( 3136 ctx: &mut C, 3137 arg0: Type, 3138 arg1: Reg, 3139 ) -> Option<WritableReg> { 3140 let pattern0_0 = arg0; 3141 let pattern1_0 = arg1; 3142 // Rule at src/isa/s390x/inst.isle line 1859. 3143 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3144 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3145 return Some(expr0_0); 3146 } 3147 3148 // Generated as internal constructor for term copy_reg. 3149 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3150 let pattern0_0 = arg0; 3151 let pattern1_0 = arg1; 3152 // Rule at src/isa/s390x/inst.isle line 1866. 3153 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3154 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3155 return Some(expr1_0); 3156 } 3157 3158 // Generated as internal constructor for term emit_load. 3159 pub fn constructor_emit_load<C: Context>( 3160 ctx: &mut C, 3161 arg0: Type, 3162 arg1: WritableReg, 3163 arg2: &MemArg, 3164 ) -> Option<Unit> { 3165 let pattern0_0 = arg0; 3166 if pattern0_0 == I32 { 3167 let pattern2_0 = arg1; 3168 let pattern3_0 = arg2; 3169 // Rule at src/isa/s390x/inst.isle line 1870. 3170 let expr0_0 = MInst::Load32 { 3171 rd: pattern2_0, 3172 mem: pattern3_0.clone(), 3173 }; 3174 let expr1_0 = C::emit(ctx, &expr0_0); 3175 return Some(expr1_0); 3176 } 3177 if pattern0_0 == I64 { 3178 let pattern2_0 = arg1; 3179 let pattern3_0 = arg2; 3180 // Rule at src/isa/s390x/inst.isle line 1872. 3181 let expr0_0 = MInst::Load64 { 3182 rd: pattern2_0, 3183 mem: pattern3_0.clone(), 3184 }; 3185 let expr1_0 = C::emit(ctx, &expr0_0); 3186 return Some(expr1_0); 3187 } 3188 return None; 3189 } 3190 3191 // Generated as internal constructor for term emit_imm. 3192 pub fn constructor_emit_imm<C: Context>( 3193 ctx: &mut C, 3194 arg0: Type, 3195 arg1: WritableReg, 3196 arg2: u64, 3197 ) -> Option<Unit> { 3198 let pattern0_0 = arg0; 3199 if pattern0_0 == F32 { 3200 let pattern2_0 = arg1; 3201 let pattern3_0 = arg2; 3202 // Rule at src/isa/s390x/inst.isle line 1928. 3203 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3204 let expr1_0 = MInst::LoadFpuConst32 { 3205 rd: pattern2_0, 3206 const_data: expr0_0, 3207 }; 3208 let expr2_0 = C::emit(ctx, &expr1_0); 3209 return Some(expr2_0); 3210 } 3211 if pattern0_0 == F64 { 3212 let pattern2_0 = arg1; 3213 let pattern3_0 = arg2; 3214 // Rule at src/isa/s390x/inst.isle line 1933. 3215 let expr0_0 = MInst::LoadFpuConst64 { 3216 rd: pattern2_0, 3217 const_data: pattern3_0, 3218 }; 3219 let expr1_0 = C::emit(ctx, &expr0_0); 3220 return Some(expr1_0); 3221 } 3222 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3223 let pattern2_0 = arg1; 3224 let pattern3_0 = arg2; 3225 // Rule at src/isa/s390x/inst.isle line 1882. 3226 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3227 let expr1_0 = MInst::Mov32SImm16 { 3228 rd: pattern2_0, 3229 imm: expr0_0, 3230 }; 3231 let expr2_0 = C::emit(ctx, &expr1_0); 3232 return Some(expr2_0); 3233 } 3234 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3235 let pattern2_0 = arg1; 3236 let pattern3_0 = arg2; 3237 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3238 // Rule at src/isa/s390x/inst.isle line 1886. 3239 let expr0_0 = MInst::Mov32SImm16 { 3240 rd: pattern2_0, 3241 imm: pattern4_0, 3242 }; 3243 let expr1_0 = C::emit(ctx, &expr0_0); 3244 return Some(expr1_0); 3245 } 3246 // Rule at src/isa/s390x/inst.isle line 1890. 3247 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3248 let expr1_0 = MInst::Mov32Imm { 3249 rd: pattern2_0, 3250 imm: expr0_0, 3251 }; 3252 let expr2_0 = C::emit(ctx, &expr1_0); 3253 return Some(expr2_0); 3254 } 3255 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3256 let pattern2_0 = arg1; 3257 let pattern3_0 = arg2; 3258 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3259 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3260 // Rule at src/isa/s390x/inst.isle line 1910. 3261 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3262 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3263 return Some(expr1_0); 3264 } 3265 } 3266 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3267 // Rule at src/isa/s390x/inst.isle line 1894. 3268 let expr0_0 = MInst::Mov64SImm16 { 3269 rd: pattern2_0, 3270 imm: pattern4_0, 3271 }; 3272 let expr1_0 = C::emit(ctx, &expr0_0); 3273 return Some(expr1_0); 3274 } 3275 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3276 // Rule at src/isa/s390x/inst.isle line 1898. 3277 let expr0_0 = MInst::Mov64SImm32 { 3278 rd: pattern2_0, 3279 imm: pattern4_0, 3280 }; 3281 let expr1_0 = C::emit(ctx, &expr0_0); 3282 return Some(expr1_0); 3283 } 3284 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3285 // Rule at src/isa/s390x/inst.isle line 1906. 3286 let expr0_0 = MInst::Mov64UImm32Shifted { 3287 rd: pattern2_0, 3288 imm: pattern4_0, 3289 }; 3290 let expr1_0 = C::emit(ctx, &expr0_0); 3291 return Some(expr1_0); 3292 } 3293 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3294 // Rule at src/isa/s390x/inst.isle line 1902. 3295 let expr0_0 = MInst::Mov64UImm16Shifted { 3296 rd: pattern2_0, 3297 imm: pattern4_0, 3298 }; 3299 let expr1_0 = C::emit(ctx, &expr0_0); 3300 return Some(expr1_0); 3301 } 3302 } 3303 return None; 3304 } 3305 3306 // Generated as internal constructor for term emit_insert_imm. 3307 pub fn constructor_emit_insert_imm<C: Context>( 3308 ctx: &mut C, 3309 arg0: WritableReg, 3310 arg1: u64, 3311 ) -> Option<Unit> { 3312 let pattern0_0 = arg0; 3313 let pattern1_0 = arg1; 3314 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3315 // Rule at src/isa/s390x/inst.isle line 1923. 3316 let expr0_0 = MInst::Insert64UImm32Shifted { 3317 rd: pattern0_0, 3318 imm: pattern2_0, 3319 }; 3320 let expr1_0 = C::emit(ctx, &expr0_0); 3321 return Some(expr1_0); 3322 } 3323 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3324 // Rule at src/isa/s390x/inst.isle line 1919. 3325 let expr0_0 = MInst::Insert64UImm16Shifted { 3326 rd: pattern0_0, 3327 imm: pattern2_0, 3328 }; 3329 let expr1_0 = C::emit(ctx, &expr0_0); 3330 return Some(expr1_0); 3331 } 3332 return None; 3333 } 3334 3335 // Generated as internal constructor for term imm. 3336 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3337 let pattern0_0 = arg0; 3338 let pattern1_0 = arg1; 3339 // Rule at src/isa/s390x/inst.isle line 1938. 3340 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3341 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3342 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3343 return Some(expr2_0); 3344 } 3345 3346 // Generated as internal constructor for term imm_regpair_lo. 3347 pub fn constructor_imm_regpair_lo<C: Context>( 3348 ctx: &mut C, 3349 arg0: Type, 3350 arg1: u64, 3351 arg2: &RegPair, 3352 ) -> Option<RegPair> { 3353 let pattern0_0 = arg0; 3354 let pattern1_0 = arg1; 3355 let pattern2_0 = arg2; 3356 // Rule at src/isa/s390x/inst.isle line 1946. 3357 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3358 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3359 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3360 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3361 return Some(expr3_0); 3362 } 3363 3364 // Generated as internal constructor for term imm_regpair_hi. 3365 pub fn constructor_imm_regpair_hi<C: Context>( 3366 ctx: &mut C, 3367 arg0: Type, 3368 arg1: u64, 3369 arg2: &RegPair, 3370 ) -> Option<RegPair> { 3371 let pattern0_0 = arg0; 3372 let pattern1_0 = arg1; 3373 let pattern2_0 = arg2; 3374 // Rule at src/isa/s390x/inst.isle line 1954. 3375 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3376 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3377 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3378 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3379 return Some(expr3_0); 3380 } 3381 3382 // Generated as internal constructor for term ty_ext32. 3383 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3384 let pattern0_0 = arg0; 3385 if pattern0_0 == I8 { 3386 // Rule at src/isa/s390x/inst.isle line 1964. 3387 let expr0_0: Type = I32; 3388 return Some(expr0_0); 3389 } 3390 if pattern0_0 == I16 { 3391 // Rule at src/isa/s390x/inst.isle line 1965. 3392 let expr0_0: Type = I32; 3393 return Some(expr0_0); 3394 } 3395 if pattern0_0 == I32 { 3396 // Rule at src/isa/s390x/inst.isle line 1966. 3397 let expr0_0: Type = I32; 3398 return Some(expr0_0); 3399 } 3400 if pattern0_0 == I64 { 3401 // Rule at src/isa/s390x/inst.isle line 1967. 3402 let expr0_0: Type = I64; 3403 return Some(expr0_0); 3404 } 3405 return None; 3406 } 3407 3408 // Generated as internal constructor for term ty_ext64. 3409 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3410 let pattern0_0 = arg0; 3411 if pattern0_0 == I8 { 3412 // Rule at src/isa/s390x/inst.isle line 1971. 3413 let expr0_0: Type = I64; 3414 return Some(expr0_0); 3415 } 3416 if pattern0_0 == I16 { 3417 // Rule at src/isa/s390x/inst.isle line 1972. 3418 let expr0_0: Type = I64; 3419 return Some(expr0_0); 3420 } 3421 if pattern0_0 == I32 { 3422 // Rule at src/isa/s390x/inst.isle line 1973. 3423 let expr0_0: Type = I64; 3424 return Some(expr0_0); 3425 } 3426 if pattern0_0 == I64 { 3427 // Rule at src/isa/s390x/inst.isle line 1974. 3428 let expr0_0: Type = I64; 3429 return Some(expr0_0); 3430 } 3431 return None; 3432 } 3433 3434 // Generated as internal constructor for term emit_zext32_reg. 3435 pub fn constructor_emit_zext32_reg<C: Context>( 3436 ctx: &mut C, 3437 arg0: WritableReg, 3438 arg1: Type, 3439 arg2: Reg, 3440 ) -> Option<Unit> { 3441 let pattern0_0 = arg0; 3442 let pattern1_0 = arg1; 3443 let pattern2_0 = arg2; 3444 // Rule at src/isa/s390x/inst.isle line 1979. 3445 let expr0_0: bool = false; 3446 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3447 let expr2_0: u8 = 32; 3448 let expr3_0 = MInst::Extend { 3449 rd: pattern0_0, 3450 rn: pattern2_0, 3451 signed: expr0_0, 3452 from_bits: expr1_0, 3453 to_bits: expr2_0, 3454 }; 3455 let expr4_0 = C::emit(ctx, &expr3_0); 3456 return Some(expr4_0); 3457 } 3458 3459 // Generated as internal constructor for term emit_sext32_reg. 3460 pub fn constructor_emit_sext32_reg<C: Context>( 3461 ctx: &mut C, 3462 arg0: WritableReg, 3463 arg1: Type, 3464 arg2: Reg, 3465 ) -> Option<Unit> { 3466 let pattern0_0 = arg0; 3467 let pattern1_0 = arg1; 3468 let pattern2_0 = arg2; 3469 // Rule at src/isa/s390x/inst.isle line 1985. 3470 let expr0_0: bool = true; 3471 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3472 let expr2_0: u8 = 32; 3473 let expr3_0 = MInst::Extend { 3474 rd: pattern0_0, 3475 rn: pattern2_0, 3476 signed: expr0_0, 3477 from_bits: expr1_0, 3478 to_bits: expr2_0, 3479 }; 3480 let expr4_0 = C::emit(ctx, &expr3_0); 3481 return Some(expr4_0); 3482 } 3483 3484 // Generated as internal constructor for term emit_zext64_reg. 3485 pub fn constructor_emit_zext64_reg<C: Context>( 3486 ctx: &mut C, 3487 arg0: WritableReg, 3488 arg1: Type, 3489 arg2: Reg, 3490 ) -> Option<Unit> { 3491 let pattern0_0 = arg0; 3492 let pattern1_0 = arg1; 3493 let pattern2_0 = arg2; 3494 // Rule at src/isa/s390x/inst.isle line 1991. 3495 let expr0_0: bool = false; 3496 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3497 let expr2_0: u8 = 64; 3498 let expr3_0 = MInst::Extend { 3499 rd: pattern0_0, 3500 rn: pattern2_0, 3501 signed: expr0_0, 3502 from_bits: expr1_0, 3503 to_bits: expr2_0, 3504 }; 3505 let expr4_0 = C::emit(ctx, &expr3_0); 3506 return Some(expr4_0); 3507 } 3508 3509 // Generated as internal constructor for term emit_sext64_reg. 3510 pub fn constructor_emit_sext64_reg<C: Context>( 3511 ctx: &mut C, 3512 arg0: WritableReg, 3513 arg1: Type, 3514 arg2: Reg, 3515 ) -> Option<Unit> { 3516 let pattern0_0 = arg0; 3517 let pattern1_0 = arg1; 3518 let pattern2_0 = arg2; 3519 // Rule at src/isa/s390x/inst.isle line 1997. 3520 let expr0_0: bool = true; 3521 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3522 let expr2_0: u8 = 64; 3523 let expr3_0 = MInst::Extend { 3524 rd: pattern0_0, 3525 rn: pattern2_0, 3526 signed: expr0_0, 3527 from_bits: expr1_0, 3528 to_bits: expr2_0, 3529 }; 3530 let expr4_0 = C::emit(ctx, &expr3_0); 3531 return Some(expr4_0); 3532 } 3533 3534 // Generated as internal constructor for term zext32_reg. 3535 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3536 let pattern0_0 = arg0; 3537 let pattern1_0 = arg1; 3538 // Rule at src/isa/s390x/inst.isle line 2003. 3539 let expr0_0: Type = I32; 3540 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3541 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3542 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3543 return Some(expr3_0); 3544 } 3545 3546 // Generated as internal constructor for term sext32_reg. 3547 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3548 let pattern0_0 = arg0; 3549 let pattern1_0 = arg1; 3550 // Rule at src/isa/s390x/inst.isle line 2011. 3551 let expr0_0: Type = I32; 3552 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3553 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3554 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3555 return Some(expr3_0); 3556 } 3557 3558 // Generated as internal constructor for term zext64_reg. 3559 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3560 let pattern0_0 = arg0; 3561 let pattern1_0 = arg1; 3562 // Rule at src/isa/s390x/inst.isle line 2019. 3563 let expr0_0: Type = I64; 3564 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3565 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3566 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3567 return Some(expr3_0); 3568 } 3569 3570 // Generated as internal constructor for term sext64_reg. 3571 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3572 let pattern0_0 = arg0; 3573 let pattern1_0 = arg1; 3574 // Rule at src/isa/s390x/inst.isle line 2027. 3575 let expr0_0: Type = I64; 3576 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3577 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3578 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3579 return Some(expr3_0); 3580 } 3581 3582 // Generated as internal constructor for term emit_zext32_mem. 3583 pub fn constructor_emit_zext32_mem<C: Context>( 3584 ctx: &mut C, 3585 arg0: WritableReg, 3586 arg1: Type, 3587 arg2: &MemArg, 3588 ) -> Option<Unit> { 3589 let pattern0_0 = arg0; 3590 let pattern1_0 = arg1; 3591 if pattern1_0 == I8 { 3592 let pattern3_0 = arg2; 3593 // Rule at src/isa/s390x/inst.isle line 2035. 3594 let expr0_0 = MInst::Load32ZExt8 { 3595 rd: pattern0_0, 3596 mem: pattern3_0.clone(), 3597 }; 3598 let expr1_0 = C::emit(ctx, &expr0_0); 3599 return Some(expr1_0); 3600 } 3601 if pattern1_0 == I16 { 3602 let pattern3_0 = arg2; 3603 // Rule at src/isa/s390x/inst.isle line 2036. 3604 let expr0_0 = MInst::Load32ZExt16 { 3605 rd: pattern0_0, 3606 mem: pattern3_0.clone(), 3607 }; 3608 let expr1_0 = C::emit(ctx, &expr0_0); 3609 return Some(expr1_0); 3610 } 3611 return None; 3612 } 3613 3614 // Generated as internal constructor for term emit_sext32_mem. 3615 pub fn constructor_emit_sext32_mem<C: Context>( 3616 ctx: &mut C, 3617 arg0: WritableReg, 3618 arg1: Type, 3619 arg2: &MemArg, 3620 ) -> Option<Unit> { 3621 let pattern0_0 = arg0; 3622 let pattern1_0 = arg1; 3623 if pattern1_0 == I8 { 3624 let pattern3_0 = arg2; 3625 // Rule at src/isa/s390x/inst.isle line 2040. 3626 let expr0_0 = MInst::Load32SExt8 { 3627 rd: pattern0_0, 3628 mem: pattern3_0.clone(), 3629 }; 3630 let expr1_0 = C::emit(ctx, &expr0_0); 3631 return Some(expr1_0); 3632 } 3633 if pattern1_0 == I16 { 3634 let pattern3_0 = arg2; 3635 // Rule at src/isa/s390x/inst.isle line 2041. 3636 let expr0_0 = MInst::Load32SExt16 { 3637 rd: pattern0_0, 3638 mem: pattern3_0.clone(), 3639 }; 3640 let expr1_0 = C::emit(ctx, &expr0_0); 3641 return Some(expr1_0); 3642 } 3643 return None; 3644 } 3645 3646 // Generated as internal constructor for term emit_zext64_mem. 3647 pub fn constructor_emit_zext64_mem<C: Context>( 3648 ctx: &mut C, 3649 arg0: WritableReg, 3650 arg1: Type, 3651 arg2: &MemArg, 3652 ) -> Option<Unit> { 3653 let pattern0_0 = arg0; 3654 let pattern1_0 = arg1; 3655 if pattern1_0 == I8 { 3656 let pattern3_0 = arg2; 3657 // Rule at src/isa/s390x/inst.isle line 2045. 3658 let expr0_0 = MInst::Load64ZExt8 { 3659 rd: pattern0_0, 3660 mem: pattern3_0.clone(), 3661 }; 3662 let expr1_0 = C::emit(ctx, &expr0_0); 3663 return Some(expr1_0); 3664 } 3665 if pattern1_0 == I16 { 3666 let pattern3_0 = arg2; 3667 // Rule at src/isa/s390x/inst.isle line 2046. 3668 let expr0_0 = MInst::Load64ZExt16 { 3669 rd: pattern0_0, 3670 mem: pattern3_0.clone(), 3671 }; 3672 let expr1_0 = C::emit(ctx, &expr0_0); 3673 return Some(expr1_0); 3674 } 3675 if pattern1_0 == I32 { 3676 let pattern3_0 = arg2; 3677 // Rule at src/isa/s390x/inst.isle line 2047. 3678 let expr0_0 = MInst::Load64ZExt32 { 3679 rd: pattern0_0, 3680 mem: pattern3_0.clone(), 3681 }; 3682 let expr1_0 = C::emit(ctx, &expr0_0); 3683 return Some(expr1_0); 3684 } 3685 return None; 3686 } 3687 3688 // Generated as internal constructor for term emit_sext64_mem. 3689 pub fn constructor_emit_sext64_mem<C: Context>( 3690 ctx: &mut C, 3691 arg0: WritableReg, 3692 arg1: Type, 3693 arg2: &MemArg, 3694 ) -> Option<Unit> { 3695 let pattern0_0 = arg0; 3696 let pattern1_0 = arg1; 3697 if pattern1_0 == I8 { 3698 let pattern3_0 = arg2; 3699 // Rule at src/isa/s390x/inst.isle line 2051. 3700 let expr0_0 = MInst::Load64SExt8 { 3701 rd: pattern0_0, 3702 mem: pattern3_0.clone(), 3703 }; 3704 let expr1_0 = C::emit(ctx, &expr0_0); 3705 return Some(expr1_0); 3706 } 3707 if pattern1_0 == I16 { 3708 let pattern3_0 = arg2; 3709 // Rule at src/isa/s390x/inst.isle line 2052. 3710 let expr0_0 = MInst::Load64SExt16 { 3711 rd: pattern0_0, 3712 mem: pattern3_0.clone(), 3713 }; 3714 let expr1_0 = C::emit(ctx, &expr0_0); 3715 return Some(expr1_0); 3716 } 3717 if pattern1_0 == I32 { 3718 let pattern3_0 = arg2; 3719 // Rule at src/isa/s390x/inst.isle line 2053. 3720 let expr0_0 = MInst::Load64SExt32 { 3721 rd: pattern0_0, 3722 mem: pattern3_0.clone(), 3723 }; 3724 let expr1_0 = C::emit(ctx, &expr0_0); 3725 return Some(expr1_0); 3726 } 3727 return None; 3728 } 3729 3730 // Generated as internal constructor for term zext32_mem. 3731 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3732 let pattern0_0 = arg0; 3733 let pattern1_0 = arg1; 3734 // Rule at src/isa/s390x/inst.isle line 2057. 3735 let expr0_0: Type = I32; 3736 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3737 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3738 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3739 return Some(expr3_0); 3740 } 3741 3742 // Generated as internal constructor for term sext32_mem. 3743 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3744 let pattern0_0 = arg0; 3745 let pattern1_0 = arg1; 3746 // Rule at src/isa/s390x/inst.isle line 2064. 3747 let expr0_0: Type = I32; 3748 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3749 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3750 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3751 return Some(expr3_0); 3752 } 3753 3754 // Generated as internal constructor for term zext64_mem. 3755 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3756 let pattern0_0 = arg0; 3757 let pattern1_0 = arg1; 3758 // Rule at src/isa/s390x/inst.isle line 2071. 3759 let expr0_0: Type = I64; 3760 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3761 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3762 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3763 return Some(expr3_0); 3764 } 3765 3766 // Generated as internal constructor for term sext64_mem. 3767 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3768 let pattern0_0 = arg0; 3769 let pattern1_0 = arg1; 3770 // Rule at src/isa/s390x/inst.isle line 2078. 3771 let expr0_0: Type = I64; 3772 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3773 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3774 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3775 return Some(expr3_0); 3776 } 3777 3778 // Generated as internal constructor for term emit_put_in_reg_zext32. 3779 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3780 ctx: &mut C, 3781 arg0: WritableReg, 3782 arg1: Value, 3783 ) -> Option<Unit> { 3784 let pattern0_0 = arg0; 3785 let pattern1_0 = arg1; 3786 let pattern2_0 = C::value_type(ctx, pattern1_0); 3787 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3788 // Rule at src/isa/s390x/inst.isle line 2086. 3789 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3790 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3791 return Some(expr1_0); 3792 } 3793 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3794 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3795 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3796 if let &InstructionData::Load { 3797 opcode: ref pattern6_0, 3798 arg: pattern6_1, 3799 flags: pattern6_2, 3800 offset: pattern6_3, 3801 } = &pattern5_0 3802 { 3803 if let &Opcode::Load = pattern6_0 { 3804 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3805 // Rule at src/isa/s390x/inst.isle line 2088. 3806 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3807 let expr1_0 = 3808 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3809 return Some(expr1_0); 3810 } 3811 } 3812 } 3813 } 3814 // Rule at src/isa/s390x/inst.isle line 2090. 3815 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3816 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3817 return Some(expr1_0); 3818 } 3819 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3820 // Rule at src/isa/s390x/inst.isle line 2092. 3821 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3822 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3823 return Some(expr1_0); 3824 } 3825 return None; 3826 } 3827 3828 // Generated as internal constructor for term emit_put_in_reg_sext32. 3829 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3830 ctx: &mut C, 3831 arg0: WritableReg, 3832 arg1: Value, 3833 ) -> Option<Unit> { 3834 let pattern0_0 = arg0; 3835 let pattern1_0 = arg1; 3836 let pattern2_0 = C::value_type(ctx, pattern1_0); 3837 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3838 // Rule at src/isa/s390x/inst.isle line 2097. 3839 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3840 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3841 return Some(expr1_0); 3842 } 3843 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3844 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3845 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3846 if let &InstructionData::Load { 3847 opcode: ref pattern6_0, 3848 arg: pattern6_1, 3849 flags: pattern6_2, 3850 offset: pattern6_3, 3851 } = &pattern5_0 3852 { 3853 if let &Opcode::Load = pattern6_0 { 3854 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3855 // Rule at src/isa/s390x/inst.isle line 2099. 3856 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3857 let expr1_0 = 3858 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3859 return Some(expr1_0); 3860 } 3861 } 3862 } 3863 } 3864 // Rule at src/isa/s390x/inst.isle line 2101. 3865 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3866 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3867 return Some(expr1_0); 3868 } 3869 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3870 // Rule at src/isa/s390x/inst.isle line 2103. 3871 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3872 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3873 return Some(expr1_0); 3874 } 3875 return None; 3876 } 3877 3878 // Generated as internal constructor for term emit_put_in_reg_zext64. 3879 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3880 ctx: &mut C, 3881 arg0: WritableReg, 3882 arg1: Value, 3883 ) -> Option<Unit> { 3884 let pattern0_0 = arg0; 3885 let pattern1_0 = arg1; 3886 let pattern2_0 = C::value_type(ctx, pattern1_0); 3887 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3888 // Rule at src/isa/s390x/inst.isle line 2108. 3889 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3890 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3891 return Some(expr1_0); 3892 } 3893 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3894 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3895 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3896 if let &InstructionData::Load { 3897 opcode: ref pattern6_0, 3898 arg: pattern6_1, 3899 flags: pattern6_2, 3900 offset: pattern6_3, 3901 } = &pattern5_0 3902 { 3903 if let &Opcode::Load = pattern6_0 { 3904 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3905 // Rule at src/isa/s390x/inst.isle line 2110. 3906 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3907 let expr1_0 = 3908 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3909 return Some(expr1_0); 3910 } 3911 } 3912 } 3913 } 3914 // Rule at src/isa/s390x/inst.isle line 2112. 3915 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3916 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3917 return Some(expr1_0); 3918 } 3919 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3920 // Rule at src/isa/s390x/inst.isle line 2114. 3921 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3922 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3923 return Some(expr1_0); 3924 } 3925 return None; 3926 } 3927 3928 // Generated as internal constructor for term emit_put_in_reg_sext64. 3929 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3930 ctx: &mut C, 3931 arg0: WritableReg, 3932 arg1: Value, 3933 ) -> Option<Unit> { 3934 let pattern0_0 = arg0; 3935 let pattern1_0 = arg1; 3936 let pattern2_0 = C::value_type(ctx, pattern1_0); 3937 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3938 // Rule at src/isa/s390x/inst.isle line 2119. 3939 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3940 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3941 return Some(expr1_0); 3942 } 3943 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3944 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3945 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3946 if let &InstructionData::Load { 3947 opcode: ref pattern6_0, 3948 arg: pattern6_1, 3949 flags: pattern6_2, 3950 offset: pattern6_3, 3951 } = &pattern5_0 3952 { 3953 if let &Opcode::Load = pattern6_0 { 3954 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3955 // Rule at src/isa/s390x/inst.isle line 2121. 3956 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3957 let expr1_0 = 3958 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3959 return Some(expr1_0); 3960 } 3961 } 3962 } 3963 } 3964 // Rule at src/isa/s390x/inst.isle line 2123. 3965 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3966 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3967 return Some(expr1_0); 3968 } 3969 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3970 // Rule at src/isa/s390x/inst.isle line 2125. 3971 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3972 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3973 return Some(expr1_0); 3974 } 3975 return None; 3976 } 3977 3978 // Generated as internal constructor for term put_in_reg_zext32. 3979 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3980 let pattern0_0 = arg0; 3981 let pattern1_0 = C::value_type(ctx, pattern0_0); 3982 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3983 // Rule at src/isa/s390x/inst.isle line 2130. 3984 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3985 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3986 return Some(expr1_0); 3987 } 3988 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3989 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3990 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3991 if let &InstructionData::Load { 3992 opcode: ref pattern5_0, 3993 arg: pattern5_1, 3994 flags: pattern5_2, 3995 offset: pattern5_3, 3996 } = &pattern4_0 3997 { 3998 if let &Opcode::Load = pattern5_0 { 3999 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4000 // Rule at src/isa/s390x/inst.isle line 2132. 4001 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4002 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4003 return Some(expr1_0); 4004 } 4005 } 4006 } 4007 } 4008 // Rule at src/isa/s390x/inst.isle line 2134. 4009 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4010 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4011 return Some(expr1_0); 4012 } 4013 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4014 // Rule at src/isa/s390x/inst.isle line 2136. 4015 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4016 return Some(expr0_0); 4017 } 4018 return None; 4019 } 4020 4021 // Generated as internal constructor for term put_in_reg_sext32. 4022 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4023 let pattern0_0 = arg0; 4024 let pattern1_0 = C::value_type(ctx, pattern0_0); 4025 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4026 // Rule at src/isa/s390x/inst.isle line 2141. 4027 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4028 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4029 return Some(expr1_0); 4030 } 4031 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4032 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4033 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4034 if let &InstructionData::Load { 4035 opcode: ref pattern5_0, 4036 arg: pattern5_1, 4037 flags: pattern5_2, 4038 offset: pattern5_3, 4039 } = &pattern4_0 4040 { 4041 if let &Opcode::Load = pattern5_0 { 4042 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4043 // Rule at src/isa/s390x/inst.isle line 2143. 4044 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4045 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4046 return Some(expr1_0); 4047 } 4048 } 4049 } 4050 } 4051 // Rule at src/isa/s390x/inst.isle line 2145. 4052 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4053 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4054 return Some(expr1_0); 4055 } 4056 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4057 // Rule at src/isa/s390x/inst.isle line 2147. 4058 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4059 return Some(expr0_0); 4060 } 4061 return None; 4062 } 4063 4064 // Generated as internal constructor for term put_in_reg_zext64. 4065 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4066 let pattern0_0 = arg0; 4067 let pattern1_0 = C::value_type(ctx, pattern0_0); 4068 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4069 // Rule at src/isa/s390x/inst.isle line 2152. 4070 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4071 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4072 return Some(expr1_0); 4073 } 4074 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4075 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4076 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4077 if let &InstructionData::Load { 4078 opcode: ref pattern5_0, 4079 arg: pattern5_1, 4080 flags: pattern5_2, 4081 offset: pattern5_3, 4082 } = &pattern4_0 4083 { 4084 if let &Opcode::Load = pattern5_0 { 4085 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4086 // Rule at src/isa/s390x/inst.isle line 2154. 4087 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4088 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4089 return Some(expr1_0); 4090 } 4091 } 4092 } 4093 } 4094 // Rule at src/isa/s390x/inst.isle line 2156. 4095 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4096 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4097 return Some(expr1_0); 4098 } 4099 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4100 // Rule at src/isa/s390x/inst.isle line 2158. 4101 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4102 return Some(expr0_0); 4103 } 4104 return None; 4105 } 4106 4107 // Generated as internal constructor for term put_in_reg_sext64. 4108 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4109 let pattern0_0 = arg0; 4110 let pattern1_0 = C::value_type(ctx, pattern0_0); 4111 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4112 // Rule at src/isa/s390x/inst.isle line 2163. 4113 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4114 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4115 return Some(expr1_0); 4116 } 4117 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4118 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4119 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4120 if let &InstructionData::Load { 4121 opcode: ref pattern5_0, 4122 arg: pattern5_1, 4123 flags: pattern5_2, 4124 offset: pattern5_3, 4125 } = &pattern4_0 4126 { 4127 if let &Opcode::Load = pattern5_0 { 4128 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4129 // Rule at src/isa/s390x/inst.isle line 2165. 4130 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4131 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4132 return Some(expr1_0); 4133 } 4134 } 4135 } 4136 } 4137 // Rule at src/isa/s390x/inst.isle line 2167. 4138 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4139 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4140 return Some(expr1_0); 4141 } 4142 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4143 // Rule at src/isa/s390x/inst.isle line 2169. 4144 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4145 return Some(expr0_0); 4146 } 4147 return None; 4148 } 4149 4150 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4151 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4152 ctx: &mut C, 4153 arg0: Value, 4154 arg1: &RegPair, 4155 ) -> Option<RegPair> { 4156 let pattern0_0 = arg0; 4157 let pattern1_0 = arg1; 4158 // Rule at src/isa/s390x/inst.isle line 2175. 4159 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4160 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4161 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4162 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4163 return Some(expr3_0); 4164 } 4165 4166 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4167 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4168 ctx: &mut C, 4169 arg0: Value, 4170 arg1: &RegPair, 4171 ) -> Option<RegPair> { 4172 let pattern0_0 = arg0; 4173 let pattern1_0 = arg1; 4174 // Rule at src/isa/s390x/inst.isle line 2183. 4175 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4176 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4177 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4178 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4179 return Some(expr3_0); 4180 } 4181 4182 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4183 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4184 ctx: &mut C, 4185 arg0: Value, 4186 arg1: &RegPair, 4187 ) -> Option<RegPair> { 4188 let pattern0_0 = arg0; 4189 let pattern1_0 = arg1; 4190 // Rule at src/isa/s390x/inst.isle line 2191. 4191 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4192 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4193 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4194 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4195 return Some(expr3_0); 4196 } 4197 4198 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4199 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4200 ctx: &mut C, 4201 arg0: Value, 4202 arg1: &RegPair, 4203 ) -> Option<RegPair> { 4204 let pattern0_0 = arg0; 4205 let pattern1_0 = arg1; 4206 // Rule at src/isa/s390x/inst.isle line 2199. 4207 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4208 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4209 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4210 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4211 return Some(expr3_0); 4212 } 4213 4214 // Generated as internal constructor for term emit_cmov_imm. 4215 pub fn constructor_emit_cmov_imm<C: Context>( 4216 ctx: &mut C, 4217 arg0: Type, 4218 arg1: WritableReg, 4219 arg2: &Cond, 4220 arg3: i16, 4221 ) -> Option<ConsumesFlags> { 4222 let pattern0_0 = arg0; 4223 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4224 let pattern2_0 = arg1; 4225 let pattern3_0 = arg2; 4226 let pattern4_0 = arg3; 4227 // Rule at src/isa/s390x/inst.isle line 2209. 4228 let expr0_0 = MInst::CMov32SImm16 { 4229 rd: pattern2_0, 4230 cond: pattern3_0.clone(), 4231 imm: pattern4_0, 4232 }; 4233 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4234 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4235 inst: expr0_0, 4236 result: expr1_0, 4237 }; 4238 return Some(expr2_0); 4239 } 4240 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4241 let pattern2_0 = arg1; 4242 let pattern3_0 = arg2; 4243 let pattern4_0 = arg3; 4244 // Rule at src/isa/s390x/inst.isle line 2212. 4245 let expr0_0 = MInst::CMov64SImm16 { 4246 rd: pattern2_0, 4247 cond: pattern3_0.clone(), 4248 imm: pattern4_0, 4249 }; 4250 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4251 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4252 inst: expr0_0, 4253 result: expr1_0, 4254 }; 4255 return Some(expr2_0); 4256 } 4257 return None; 4258 } 4259 4260 // Generated as internal constructor for term cmov_imm. 4261 pub fn constructor_cmov_imm<C: Context>( 4262 ctx: &mut C, 4263 arg0: Type, 4264 arg1: &Cond, 4265 arg2: i16, 4266 arg3: Reg, 4267 ) -> Option<ConsumesFlags> { 4268 let pattern0_0 = arg0; 4269 let pattern1_0 = arg1; 4270 let pattern2_0 = arg2; 4271 let pattern3_0 = arg3; 4272 // Rule at src/isa/s390x/inst.isle line 2218. 4273 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4274 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4275 return Some(expr1_0); 4276 } 4277 4278 // Generated as internal constructor for term cmov_imm_regpair_lo. 4279 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4280 ctx: &mut C, 4281 arg0: Type, 4282 arg1: &ProducesFlags, 4283 arg2: &Cond, 4284 arg3: i16, 4285 arg4: &RegPair, 4286 ) -> Option<RegPair> { 4287 let pattern0_0 = arg0; 4288 let pattern1_0 = arg1; 4289 let pattern2_0 = arg2; 4290 let pattern3_0 = arg3; 4291 let pattern4_0 = arg4; 4292 // Rule at src/isa/s390x/inst.isle line 2225. 4293 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4294 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4295 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4296 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4297 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4298 return Some(expr4_0); 4299 } 4300 4301 // Generated as internal constructor for term cmov_imm_regpair_hi. 4302 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4303 ctx: &mut C, 4304 arg0: Type, 4305 arg1: &ProducesFlags, 4306 arg2: &Cond, 4307 arg3: i16, 4308 arg4: &RegPair, 4309 ) -> Option<RegPair> { 4310 let pattern0_0 = arg0; 4311 let pattern1_0 = arg1; 4312 let pattern2_0 = arg2; 4313 let pattern3_0 = arg3; 4314 let pattern4_0 = arg4; 4315 // Rule at src/isa/s390x/inst.isle line 2234. 4316 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4317 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4318 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4319 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4320 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4321 return Some(expr4_0); 4322 } 4323 4324 // Generated as internal constructor for term emit_cmov_reg. 4325 pub fn constructor_emit_cmov_reg<C: Context>( 4326 ctx: &mut C, 4327 arg0: Type, 4328 arg1: WritableReg, 4329 arg2: &Cond, 4330 arg3: Reg, 4331 ) -> Option<ConsumesFlags> { 4332 let pattern0_0 = arg0; 4333 if pattern0_0 == F32 { 4334 let pattern2_0 = arg1; 4335 let pattern3_0 = arg2; 4336 let pattern4_0 = arg3; 4337 // Rule at src/isa/s390x/inst.isle line 2248. 4338 let expr0_0 = MInst::FpuCMov32 { 4339 rd: pattern2_0, 4340 cond: pattern3_0.clone(), 4341 rm: pattern4_0, 4342 }; 4343 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4344 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4345 inst: expr0_0, 4346 result: expr1_0, 4347 }; 4348 return Some(expr2_0); 4349 } 4350 if pattern0_0 == F64 { 4351 let pattern2_0 = arg1; 4352 let pattern3_0 = arg2; 4353 let pattern4_0 = arg3; 4354 // Rule at src/isa/s390x/inst.isle line 2251. 4355 let expr0_0 = MInst::FpuCMov64 { 4356 rd: pattern2_0, 4357 cond: pattern3_0.clone(), 4358 rm: pattern4_0, 4359 }; 4360 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4361 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4362 inst: expr0_0, 4363 result: expr1_0, 4364 }; 4365 return Some(expr2_0); 4366 } 4367 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4368 let pattern2_0 = arg1; 4369 let pattern3_0 = arg2; 4370 let pattern4_0 = arg3; 4371 // Rule at src/isa/s390x/inst.isle line 2242. 4372 let expr0_0 = MInst::CMov32 { 4373 rd: pattern2_0, 4374 cond: pattern3_0.clone(), 4375 rm: pattern4_0, 4376 }; 4377 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4378 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4379 inst: expr0_0, 4380 result: expr1_0, 4381 }; 4382 return Some(expr2_0); 4383 } 4384 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4385 let pattern2_0 = arg1; 4386 let pattern3_0 = arg2; 4387 let pattern4_0 = arg3; 4388 // Rule at src/isa/s390x/inst.isle line 2245. 4389 let expr0_0 = MInst::CMov64 { 4390 rd: pattern2_0, 4391 cond: pattern3_0.clone(), 4392 rm: pattern4_0, 4393 }; 4394 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4395 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4396 inst: expr0_0, 4397 result: expr1_0, 4398 }; 4399 return Some(expr2_0); 4400 } 4401 return None; 4402 } 4403 4404 // Generated as internal constructor for term cmov_reg. 4405 pub fn constructor_cmov_reg<C: Context>( 4406 ctx: &mut C, 4407 arg0: Type, 4408 arg1: &Cond, 4409 arg2: Reg, 4410 arg3: Reg, 4411 ) -> Option<ConsumesFlags> { 4412 let pattern0_0 = arg0; 4413 let pattern1_0 = arg1; 4414 let pattern2_0 = arg2; 4415 let pattern3_0 = arg3; 4416 // Rule at src/isa/s390x/inst.isle line 2257. 4417 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4418 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4419 return Some(expr1_0); 4420 } 4421 4422 // Generated as internal constructor for term trap_if. 4423 pub fn constructor_trap_if<C: Context>( 4424 ctx: &mut C, 4425 arg0: &ProducesFlags, 4426 arg1: &Cond, 4427 arg2: &TrapCode, 4428 ) -> Option<Reg> { 4429 let pattern0_0 = arg0; 4430 match pattern0_0 { 4431 &ProducesFlags::ProducesFlagsSideEffect { 4432 inst: ref pattern1_0, 4433 } => { 4434 let pattern2_0 = arg1; 4435 let pattern3_0 = arg2; 4436 // Rule at src/isa/s390x/inst.isle line 2269. 4437 let expr0_0 = C::emit(ctx, pattern1_0); 4438 let expr1_0 = MInst::TrapIf { 4439 cond: pattern2_0.clone(), 4440 trap_code: pattern3_0.clone(), 4441 }; 4442 let expr2_0 = C::emit(ctx, &expr1_0); 4443 let expr3_0 = C::invalid_reg(ctx); 4444 return Some(expr3_0); 4445 } 4446 &ProducesFlags::ProducesFlagsReturnsReg { 4447 inst: ref pattern1_0, 4448 result: pattern1_1, 4449 } => { 4450 let pattern2_0 = arg1; 4451 let pattern3_0 = arg2; 4452 // Rule at src/isa/s390x/inst.isle line 2265. 4453 let expr0_0 = C::emit(ctx, pattern1_0); 4454 let expr1_0 = MInst::TrapIf { 4455 cond: pattern2_0.clone(), 4456 trap_code: pattern3_0.clone(), 4457 }; 4458 let expr2_0 = C::emit(ctx, &expr1_0); 4459 return Some(pattern1_1); 4460 } 4461 _ => {} 4462 } 4463 return None; 4464 } 4465 4466 // Generated as internal constructor for term icmps_reg_and_trap. 4467 pub fn constructor_icmps_reg_and_trap<C: Context>( 4468 ctx: &mut C, 4469 arg0: Type, 4470 arg1: Reg, 4471 arg2: Reg, 4472 arg3: &Cond, 4473 arg4: &TrapCode, 4474 ) -> Option<Reg> { 4475 let pattern0_0 = arg0; 4476 let pattern1_0 = arg1; 4477 let pattern2_0 = arg2; 4478 let pattern3_0 = arg3; 4479 let pattern4_0 = arg4; 4480 // Rule at src/isa/s390x/inst.isle line 2275. 4481 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4482 let expr1_0 = MInst::CmpTrapRR { 4483 op: expr0_0, 4484 rn: pattern1_0, 4485 rm: pattern2_0, 4486 cond: pattern3_0.clone(), 4487 trap_code: pattern4_0.clone(), 4488 }; 4489 let expr2_0 = C::emit(ctx, &expr1_0); 4490 let expr3_0 = C::invalid_reg(ctx); 4491 return Some(expr3_0); 4492 } 4493 4494 // Generated as internal constructor for term icmps_simm16_and_trap. 4495 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4496 ctx: &mut C, 4497 arg0: Type, 4498 arg1: Reg, 4499 arg2: i16, 4500 arg3: &Cond, 4501 arg4: &TrapCode, 4502 ) -> Option<Reg> { 4503 let pattern0_0 = arg0; 4504 let pattern1_0 = arg1; 4505 let pattern2_0 = arg2; 4506 let pattern3_0 = arg3; 4507 let pattern4_0 = arg4; 4508 // Rule at src/isa/s390x/inst.isle line 2281. 4509 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4510 let expr1_0 = MInst::CmpTrapRSImm16 { 4511 op: expr0_0, 4512 rn: pattern1_0, 4513 imm: pattern2_0, 4514 cond: pattern3_0.clone(), 4515 trap_code: pattern4_0.clone(), 4516 }; 4517 let expr2_0 = C::emit(ctx, &expr1_0); 4518 let expr3_0 = C::invalid_reg(ctx); 4519 return Some(expr3_0); 4520 } 4521 4522 // Generated as internal constructor for term icmpu_reg_and_trap. 4523 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4524 ctx: &mut C, 4525 arg0: Type, 4526 arg1: Reg, 4527 arg2: Reg, 4528 arg3: &Cond, 4529 arg4: &TrapCode, 4530 ) -> Option<Reg> { 4531 let pattern0_0 = arg0; 4532 let pattern1_0 = arg1; 4533 let pattern2_0 = arg2; 4534 let pattern3_0 = arg3; 4535 let pattern4_0 = arg4; 4536 // Rule at src/isa/s390x/inst.isle line 2287. 4537 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4538 let expr1_0 = MInst::CmpTrapRR { 4539 op: expr0_0, 4540 rn: pattern1_0, 4541 rm: pattern2_0, 4542 cond: pattern3_0.clone(), 4543 trap_code: pattern4_0.clone(), 4544 }; 4545 let expr2_0 = C::emit(ctx, &expr1_0); 4546 let expr3_0 = C::invalid_reg(ctx); 4547 return Some(expr3_0); 4548 } 4549 4550 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4551 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4552 ctx: &mut C, 4553 arg0: Type, 4554 arg1: Reg, 4555 arg2: u16, 4556 arg3: &Cond, 4557 arg4: &TrapCode, 4558 ) -> Option<Reg> { 4559 let pattern0_0 = arg0; 4560 let pattern1_0 = arg1; 4561 let pattern2_0 = arg2; 4562 let pattern3_0 = arg3; 4563 let pattern4_0 = arg4; 4564 // Rule at src/isa/s390x/inst.isle line 2293. 4565 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4566 let expr1_0 = MInst::CmpTrapRUImm16 { 4567 op: expr0_0, 4568 rn: pattern1_0, 4569 imm: pattern2_0, 4570 cond: pattern3_0.clone(), 4571 trap_code: pattern4_0.clone(), 4572 }; 4573 let expr2_0 = C::emit(ctx, &expr1_0); 4574 let expr3_0 = C::invalid_reg(ctx); 4575 return Some(expr3_0); 4576 } 4577 4578 // Generated as internal constructor for term trap_impl. 4579 pub fn constructor_trap_impl<C: Context>( 4580 ctx: &mut C, 4581 arg0: &TrapCode, 4582 ) -> Option<SideEffectNoResult> { 4583 let pattern0_0 = arg0; 4584 // Rule at src/isa/s390x/inst.isle line 2299. 4585 let expr0_0 = MInst::Trap { 4586 trap_code: pattern0_0.clone(), 4587 }; 4588 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4589 return Some(expr1_0); 4590 } 4591 4592 // Generated as internal constructor for term trap_if_impl. 4593 pub fn constructor_trap_if_impl<C: Context>( 4594 ctx: &mut C, 4595 arg0: &Cond, 4596 arg1: &TrapCode, 4597 ) -> Option<SideEffectNoResult> { 4598 let pattern0_0 = arg0; 4599 let pattern1_0 = arg1; 4600 // Rule at src/isa/s390x/inst.isle line 2303. 4601 let expr0_0 = MInst::TrapIf { 4602 cond: pattern0_0.clone(), 4603 trap_code: pattern1_0.clone(), 4604 }; 4605 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4606 return Some(expr1_0); 4607 } 4608 4609 // Generated as internal constructor for term debugtrap_impl. 4610 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4611 // Rule at src/isa/s390x/inst.isle line 2307. 4612 let expr0_0 = MInst::Debugtrap; 4613 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4614 return Some(expr1_0); 4615 } 4616 4617 // Generated as internal constructor for term bool. 4618 pub fn constructor_bool<C: Context>( 4619 ctx: &mut C, 4620 arg0: &ProducesFlags, 4621 arg1: &Cond, 4622 ) -> Option<ProducesBool> { 4623 let pattern0_0 = arg0; 4624 let pattern1_0 = arg1; 4625 // Rule at src/isa/s390x/inst.isle line 2318. 4626 let expr0_0 = ProducesBool::ProducesBool { 4627 producer: pattern0_0.clone(), 4628 cond: pattern1_0.clone(), 4629 }; 4630 return Some(expr0_0); 4631 } 4632 4633 // Generated as internal constructor for term invert_bool. 4634 pub fn constructor_invert_bool<C: Context>( 4635 ctx: &mut C, 4636 arg0: &ProducesBool, 4637 ) -> Option<ProducesBool> { 4638 let pattern0_0 = arg0; 4639 if let &ProducesBool::ProducesBool { 4640 producer: ref pattern1_0, 4641 cond: ref pattern1_1, 4642 } = pattern0_0 4643 { 4644 // Rule at src/isa/s390x/inst.isle line 2322. 4645 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4646 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4647 return Some(expr1_0); 4648 } 4649 return None; 4650 } 4651 4652 // Generated as internal constructor for term emit_producer. 4653 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4654 let pattern0_0 = arg0; 4655 if let &ProducesFlags::ProducesFlagsSideEffect { 4656 inst: ref pattern1_0, 4657 } = pattern0_0 4658 { 4659 // Rule at src/isa/s390x/inst.isle line 2331. 4660 let expr0_0 = C::emit(ctx, pattern1_0); 4661 return Some(expr0_0); 4662 } 4663 return None; 4664 } 4665 4666 // Generated as internal constructor for term emit_consumer. 4667 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4668 let pattern0_0 = arg0; 4669 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4670 inst: ref pattern1_0, 4671 result: pattern1_1, 4672 } = pattern0_0 4673 { 4674 // Rule at src/isa/s390x/inst.isle line 2333. 4675 let expr0_0 = C::emit(ctx, pattern1_0); 4676 return Some(expr0_0); 4677 } 4678 return None; 4679 } 4680 4681 // Generated as internal constructor for term select_bool_reg. 4682 pub fn constructor_select_bool_reg<C: Context>( 4683 ctx: &mut C, 4684 arg0: Type, 4685 arg1: &ProducesBool, 4686 arg2: Reg, 4687 arg3: Reg, 4688 ) -> Option<Reg> { 4689 let pattern0_0 = arg0; 4690 let pattern1_0 = arg1; 4691 if let &ProducesBool::ProducesBool { 4692 producer: ref pattern2_0, 4693 cond: ref pattern2_1, 4694 } = pattern1_0 4695 { 4696 let pattern3_0 = arg2; 4697 let pattern4_0 = arg3; 4698 // Rule at src/isa/s390x/inst.isle line 2337. 4699 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4700 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4701 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4702 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4703 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4704 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4705 return Some(expr5_0); 4706 } 4707 return None; 4708 } 4709 4710 // Generated as internal constructor for term select_bool_imm. 4711 pub fn constructor_select_bool_imm<C: Context>( 4712 ctx: &mut C, 4713 arg0: Type, 4714 arg1: &ProducesBool, 4715 arg2: i16, 4716 arg3: u64, 4717 ) -> Option<Reg> { 4718 let pattern0_0 = arg0; 4719 let pattern1_0 = arg1; 4720 if let &ProducesBool::ProducesBool { 4721 producer: ref pattern2_0, 4722 cond: ref pattern2_1, 4723 } = pattern1_0 4724 { 4725 let pattern3_0 = arg2; 4726 let pattern4_0 = arg3; 4727 // Rule at src/isa/s390x/inst.isle line 2346. 4728 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4729 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4730 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4731 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4732 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4733 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4734 return Some(expr5_0); 4735 } 4736 return None; 4737 } 4738 4739 // Generated as internal constructor for term lower_bool. 4740 pub fn constructor_lower_bool<C: Context>( 4741 ctx: &mut C, 4742 arg0: Type, 4743 arg1: &ProducesBool, 4744 ) -> Option<Reg> { 4745 let pattern0_0 = arg0; 4746 if pattern0_0 == B1 { 4747 let pattern2_0 = arg1; 4748 // Rule at src/isa/s390x/inst.isle line 2356. 4749 let expr0_0: Type = B1; 4750 let expr1_0: i16 = 1; 4751 let expr2_0: u64 = 0; 4752 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4753 return Some(expr3_0); 4754 } 4755 if pattern0_0 == B8 { 4756 let pattern2_0 = arg1; 4757 // Rule at src/isa/s390x/inst.isle line 2357. 4758 let expr0_0: Type = B8; 4759 let expr1_0: i16 = -1; 4760 let expr2_0: u64 = 0; 4761 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4762 return Some(expr3_0); 4763 } 4764 if pattern0_0 == B16 { 4765 let pattern2_0 = arg1; 4766 // Rule at src/isa/s390x/inst.isle line 2358. 4767 let expr0_0: Type = B16; 4768 let expr1_0: i16 = -1; 4769 let expr2_0: u64 = 0; 4770 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4771 return Some(expr3_0); 4772 } 4773 if pattern0_0 == B32 { 4774 let pattern2_0 = arg1; 4775 // Rule at src/isa/s390x/inst.isle line 2359. 4776 let expr0_0: Type = B32; 4777 let expr1_0: i16 = -1; 4778 let expr2_0: u64 = 0; 4779 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4780 return Some(expr3_0); 4781 } 4782 if pattern0_0 == B64 { 4783 let pattern2_0 = arg1; 4784 // Rule at src/isa/s390x/inst.isle line 2360. 4785 let expr0_0: Type = B64; 4786 let expr1_0: i16 = -1; 4787 let expr2_0: u64 = 0; 4788 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4789 return Some(expr3_0); 4790 } 4791 return None; 4792 } 4793 4794 // Generated as internal constructor for term cond_br_bool. 4795 pub fn constructor_cond_br_bool<C: Context>( 4796 ctx: &mut C, 4797 arg0: &ProducesBool, 4798 arg1: MachLabel, 4799 arg2: MachLabel, 4800 ) -> Option<SideEffectNoResult> { 4801 let pattern0_0 = arg0; 4802 if let &ProducesBool::ProducesBool { 4803 producer: ref pattern1_0, 4804 cond: ref pattern1_1, 4805 } = pattern0_0 4806 { 4807 let pattern2_0 = arg1; 4808 let pattern3_0 = arg2; 4809 // Rule at src/isa/s390x/inst.isle line 2364. 4810 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4811 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4812 return Some(expr1_0); 4813 } 4814 return None; 4815 } 4816 4817 // Generated as internal constructor for term oneway_cond_br_bool. 4818 pub fn constructor_oneway_cond_br_bool<C: Context>( 4819 ctx: &mut C, 4820 arg0: &ProducesBool, 4821 arg1: MachLabel, 4822 ) -> Option<SideEffectNoResult> { 4823 let pattern0_0 = arg0; 4824 if let &ProducesBool::ProducesBool { 4825 producer: ref pattern1_0, 4826 cond: ref pattern1_1, 4827 } = pattern0_0 4828 { 4829 let pattern2_0 = arg1; 4830 // Rule at src/isa/s390x/inst.isle line 2370. 4831 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4832 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4833 return Some(expr1_0); 4834 } 4835 return None; 4836 } 4837 4838 // Generated as internal constructor for term trap_if_bool. 4839 pub fn constructor_trap_if_bool<C: Context>( 4840 ctx: &mut C, 4841 arg0: &ProducesBool, 4842 arg1: &TrapCode, 4843 ) -> Option<SideEffectNoResult> { 4844 let pattern0_0 = arg0; 4845 if let &ProducesBool::ProducesBool { 4846 producer: ref pattern1_0, 4847 cond: ref pattern1_1, 4848 } = pattern0_0 4849 { 4850 let pattern2_0 = arg1; 4851 // Rule at src/isa/s390x/inst.isle line 2376. 4852 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4853 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4854 return Some(expr1_0); 4855 } 4856 return None; 4857 } 4858 4859 // Generated as internal constructor for term casloop_val_reg. 4860 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4861 // Rule at src/isa/s390x/inst.isle line 2390. 4862 let expr0_0: u8 = 0; 4863 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4864 return Some(expr1_0); 4865 } 4866 4867 // Generated as internal constructor for term casloop_tmp_reg. 4868 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4869 // Rule at src/isa/s390x/inst.isle line 2394. 4870 let expr0_0: u8 = 1; 4871 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4872 return Some(expr1_0); 4873 } 4874 4875 // Generated as internal constructor for term casloop_emit. 4876 pub fn constructor_casloop_emit<C: Context>( 4877 ctx: &mut C, 4878 arg0: &VecMInstBuilder, 4879 arg1: Type, 4880 arg2: MemFlags, 4881 arg3: Reg, 4882 arg4: Reg, 4883 ) -> Option<Reg> { 4884 let pattern0_0 = arg0; 4885 let pattern1_0 = arg1; 4886 let pattern2_0 = arg2; 4887 let pattern3_0 = arg3; 4888 let pattern4_0 = arg4; 4889 // Rule at src/isa/s390x/inst.isle line 2403. 4890 let expr0_0: i64 = 0; 4891 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4892 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4893 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4894 let expr4_0 = 4895 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4896 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4897 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4898 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4899 let expr8_0 = IntCC::NotEqual; 4900 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4901 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4902 return Some(expr4_0); 4903 } 4904 4905 // Generated as internal constructor for term casloop_result. 4906 pub fn constructor_casloop_result<C: Context>( 4907 ctx: &mut C, 4908 arg0: Type, 4909 arg1: MemFlags, 4910 arg2: Reg, 4911 ) -> Option<Reg> { 4912 let pattern0_0 = arg0; 4913 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4914 let pattern2_0 = arg1; 4915 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4916 let pattern4_0 = arg2; 4917 // Rule at src/isa/s390x/inst.isle line 2421. 4918 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4919 return Some(expr0_0); 4920 } 4921 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4922 let pattern4_0 = arg2; 4923 // Rule at src/isa/s390x/inst.isle line 2419. 4924 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4925 return Some(expr0_0); 4926 } 4927 } 4928 return None; 4929 } 4930 4931 // Generated as internal constructor for term casloop. 4932 pub fn constructor_casloop<C: Context>( 4933 ctx: &mut C, 4934 arg0: &VecMInstBuilder, 4935 arg1: Type, 4936 arg2: MemFlags, 4937 arg3: Reg, 4938 arg4: Reg, 4939 ) -> Option<Reg> { 4940 let pattern0_0 = arg0; 4941 let pattern1_0 = arg1; 4942 let pattern2_0 = arg2; 4943 let pattern3_0 = arg3; 4944 let pattern4_0 = arg4; 4945 // Rule at src/isa/s390x/inst.isle line 2426. 4946 let expr0_0 = constructor_casloop_emit( 4947 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4948 )?; 4949 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4950 return Some(expr1_0); 4951 } 4952 4953 // Generated as internal constructor for term casloop_bitshift. 4954 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4955 let pattern0_0 = arg0; 4956 // Rule at src/isa/s390x/inst.isle line 2441. 4957 let expr0_0: Type = I32; 4958 let expr1_0: u8 = 3; 4959 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4960 return Some(expr2_0); 4961 } 4962 4963 // Generated as internal constructor for term casloop_aligned_addr. 4964 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4965 let pattern0_0 = arg0; 4966 // Rule at src/isa/s390x/inst.isle line 2446. 4967 let expr0_0: Type = I64; 4968 let expr1_0: u16 = 65532; 4969 let expr2_0: u8 = 0; 4970 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4971 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4972 return Some(expr4_0); 4973 } 4974 4975 // Generated as internal constructor for term casloop_rotate_in. 4976 pub fn constructor_casloop_rotate_in<C: Context>( 4977 ctx: &mut C, 4978 arg0: &VecMInstBuilder, 4979 arg1: Type, 4980 arg2: MemFlags, 4981 arg3: Reg, 4982 arg4: Reg, 4983 ) -> Option<Reg> { 4984 let pattern0_0 = arg0; 4985 let pattern1_0 = arg1; 4986 if pattern1_0 == I8 { 4987 let pattern3_0 = arg2; 4988 let pattern4_0 = arg3; 4989 let pattern5_0 = arg4; 4990 // Rule at src/isa/s390x/inst.isle line 2456. 4991 let expr0_0: Type = I32; 4992 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4993 let expr2_0: u8 = 0; 4994 let expr3_0 = constructor_push_rot_imm_reg( 4995 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 4996 )?; 4997 return Some(expr3_0); 4998 } 4999 if pattern1_0 == I16 { 5000 let pattern3_0 = arg2; 5001 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5002 let pattern5_0 = arg3; 5003 let pattern6_0 = arg4; 5004 // Rule at src/isa/s390x/inst.isle line 2460. 5005 let expr0_0: Type = I32; 5006 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5007 let expr2_0: u8 = 16; 5008 let expr3_0 = constructor_push_rot_imm_reg( 5009 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5010 )?; 5011 return Some(expr3_0); 5012 } 5013 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5014 let pattern5_0 = arg3; 5015 let pattern6_0 = arg4; 5016 // Rule at src/isa/s390x/inst.isle line 2458. 5017 let expr0_0: Type = I32; 5018 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5019 let expr2_0: u8 = 0; 5020 let expr3_0 = constructor_push_rot_imm_reg( 5021 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5022 )?; 5023 return Some(expr3_0); 5024 } 5025 } 5026 return None; 5027 } 5028 5029 // Generated as internal constructor for term casloop_rotate_out. 5030 pub fn constructor_casloop_rotate_out<C: Context>( 5031 ctx: &mut C, 5032 arg0: &VecMInstBuilder, 5033 arg1: Type, 5034 arg2: MemFlags, 5035 arg3: Reg, 5036 arg4: Reg, 5037 ) -> Option<Reg> { 5038 let pattern0_0 = arg0; 5039 let pattern1_0 = arg1; 5040 if pattern1_0 == I8 { 5041 let pattern3_0 = arg2; 5042 let pattern4_0 = arg3; 5043 let pattern5_0 = arg4; 5044 // Rule at src/isa/s390x/inst.isle line 2469. 5045 let expr0_0: Type = I32; 5046 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5047 let expr2_0: u8 = 0; 5048 let expr3_0: Type = I32; 5049 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5050 let expr5_0 = constructor_push_rot_imm_reg( 5051 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5052 )?; 5053 return Some(expr5_0); 5054 } 5055 if pattern1_0 == I16 { 5056 let pattern3_0 = arg2; 5057 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5058 let pattern5_0 = arg3; 5059 let pattern6_0 = arg4; 5060 // Rule at src/isa/s390x/inst.isle line 2473. 5061 let expr0_0: Type = I32; 5062 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5063 let expr2_0: u8 = 16; 5064 let expr3_0 = constructor_push_rot_imm_reg( 5065 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5066 )?; 5067 return Some(expr3_0); 5068 } 5069 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5070 let pattern5_0 = arg3; 5071 let pattern6_0 = arg4; 5072 // Rule at src/isa/s390x/inst.isle line 2471. 5073 let expr0_0: Type = I32; 5074 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5075 let expr2_0: u8 = 0; 5076 let expr3_0 = constructor_push_rot_imm_reg( 5077 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5078 )?; 5079 return Some(expr3_0); 5080 } 5081 } 5082 return None; 5083 } 5084 5085 // Generated as internal constructor for term casloop_rotate_result. 5086 pub fn constructor_casloop_rotate_result<C: Context>( 5087 ctx: &mut C, 5088 arg0: Type, 5089 arg1: MemFlags, 5090 arg2: Reg, 5091 arg3: Reg, 5092 ) -> Option<Reg> { 5093 let pattern0_0 = arg0; 5094 if pattern0_0 == I8 { 5095 let pattern2_0 = arg1; 5096 let pattern3_0 = arg2; 5097 let pattern4_0 = arg3; 5098 // Rule at src/isa/s390x/inst.isle line 2484. 5099 let expr0_0: Type = I32; 5100 let expr1_0: u8 = 8; 5101 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5102 return Some(expr2_0); 5103 } 5104 if pattern0_0 == I16 { 5105 let pattern2_0 = arg1; 5106 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5107 let pattern4_0 = arg2; 5108 let pattern5_0 = arg3; 5109 // Rule at src/isa/s390x/inst.isle line 2488. 5110 let expr0_0: Type = I32; 5111 let expr1_0: Type = I32; 5112 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5113 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5114 return Some(expr3_0); 5115 } 5116 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5117 let pattern4_0 = arg2; 5118 let pattern5_0 = arg3; 5119 // Rule at src/isa/s390x/inst.isle line 2486. 5120 let expr0_0: Type = I32; 5121 let expr1_0: u8 = 16; 5122 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5123 return Some(expr2_0); 5124 } 5125 } 5126 return None; 5127 } 5128 5129 // Generated as internal constructor for term casloop_subword. 5130 pub fn constructor_casloop_subword<C: Context>( 5131 ctx: &mut C, 5132 arg0: &VecMInstBuilder, 5133 arg1: Type, 5134 arg2: MemFlags, 5135 arg3: Reg, 5136 arg4: Reg, 5137 arg5: Reg, 5138 ) -> Option<Reg> { 5139 let pattern0_0 = arg0; 5140 let pattern1_0 = arg1; 5141 let pattern2_0 = arg2; 5142 let pattern3_0 = arg3; 5143 let pattern4_0 = arg4; 5144 let pattern5_0 = arg5; 5145 // Rule at src/isa/s390x/inst.isle line 2493. 5146 let expr0_0 = constructor_casloop_emit( 5147 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5148 )?; 5149 let expr1_0 = 5150 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5151 return Some(expr1_0); 5152 } 5153 5154 // Generated as internal constructor for term clz_reg. 5155 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5156 let pattern0_0 = arg0; 5157 if pattern0_0 == 64 { 5158 let pattern2_0 = arg1; 5159 // Rule at src/isa/s390x/inst.isle line 2504. 5160 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5161 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5162 let expr2_0 = C::emit(ctx, &expr1_0); 5163 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5164 return Some(expr3_0); 5165 } 5166 let pattern1_0 = arg1; 5167 // Rule at src/isa/s390x/inst.isle line 2513. 5168 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5169 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5170 let expr2_0 = C::emit(ctx, &expr1_0); 5171 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5172 let expr4_0 = IntCC::Equal; 5173 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5174 let expr6_0 = MInst::CMov64SImm16 { 5175 rd: expr3_0, 5176 cond: expr5_0, 5177 imm: pattern0_0, 5178 }; 5179 let expr7_0 = C::emit(ctx, &expr6_0); 5180 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5181 return Some(expr8_0); 5182 } 5183 5184 // Generated as internal constructor for term aluop_add. 5185 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5186 let pattern0_0 = arg0; 5187 if pattern0_0 == I8 { 5188 // Rule at src/isa/s390x/inst.isle line 2524. 5189 let expr0_0 = ALUOp::Add32; 5190 return Some(expr0_0); 5191 } 5192 if pattern0_0 == I16 { 5193 // Rule at src/isa/s390x/inst.isle line 2525. 5194 let expr0_0 = ALUOp::Add32; 5195 return Some(expr0_0); 5196 } 5197 if pattern0_0 == I32 { 5198 // Rule at src/isa/s390x/inst.isle line 2526. 5199 let expr0_0 = ALUOp::Add32; 5200 return Some(expr0_0); 5201 } 5202 if pattern0_0 == I64 { 5203 // Rule at src/isa/s390x/inst.isle line 2527. 5204 let expr0_0 = ALUOp::Add64; 5205 return Some(expr0_0); 5206 } 5207 return None; 5208 } 5209 5210 // Generated as internal constructor for term aluop_add_sext16. 5211 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5212 let pattern0_0 = arg0; 5213 if pattern0_0 == I16 { 5214 // Rule at src/isa/s390x/inst.isle line 2530. 5215 let expr0_0 = ALUOp::Add32Ext16; 5216 return Some(expr0_0); 5217 } 5218 if pattern0_0 == I32 { 5219 // Rule at src/isa/s390x/inst.isle line 2531. 5220 let expr0_0 = ALUOp::Add32Ext16; 5221 return Some(expr0_0); 5222 } 5223 if pattern0_0 == I64 { 5224 // Rule at src/isa/s390x/inst.isle line 2532. 5225 let expr0_0 = ALUOp::Add64Ext16; 5226 return Some(expr0_0); 5227 } 5228 return None; 5229 } 5230 5231 // Generated as internal constructor for term aluop_add_sext32. 5232 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5233 let pattern0_0 = arg0; 5234 if pattern0_0 == I64 { 5235 // Rule at src/isa/s390x/inst.isle line 2535. 5236 let expr0_0 = ALUOp::Add64Ext32; 5237 return Some(expr0_0); 5238 } 5239 return None; 5240 } 5241 5242 // Generated as internal constructor for term add_reg. 5243 pub fn constructor_add_reg<C: Context>( 5244 ctx: &mut C, 5245 arg0: Type, 5246 arg1: Reg, 5247 arg2: Reg, 5248 ) -> Option<Reg> { 5249 let pattern0_0 = arg0; 5250 let pattern1_0 = arg1; 5251 let pattern2_0 = arg2; 5252 // Rule at src/isa/s390x/inst.isle line 2538. 5253 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5254 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5255 return Some(expr1_0); 5256 } 5257 5258 // Generated as internal constructor for term add_reg_sext32. 5259 pub fn constructor_add_reg_sext32<C: Context>( 5260 ctx: &mut C, 5261 arg0: Type, 5262 arg1: Reg, 5263 arg2: Reg, 5264 ) -> Option<Reg> { 5265 let pattern0_0 = arg0; 5266 let pattern1_0 = arg1; 5267 let pattern2_0 = arg2; 5268 // Rule at src/isa/s390x/inst.isle line 2541. 5269 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5270 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5271 return Some(expr1_0); 5272 } 5273 5274 // Generated as internal constructor for term add_simm16. 5275 pub fn constructor_add_simm16<C: Context>( 5276 ctx: &mut C, 5277 arg0: Type, 5278 arg1: Reg, 5279 arg2: i16, 5280 ) -> Option<Reg> { 5281 let pattern0_0 = arg0; 5282 let pattern1_0 = arg1; 5283 let pattern2_0 = arg2; 5284 // Rule at src/isa/s390x/inst.isle line 2544. 5285 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5286 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5287 return Some(expr1_0); 5288 } 5289 5290 // Generated as internal constructor for term add_simm32. 5291 pub fn constructor_add_simm32<C: Context>( 5292 ctx: &mut C, 5293 arg0: Type, 5294 arg1: Reg, 5295 arg2: i32, 5296 ) -> Option<Reg> { 5297 let pattern0_0 = arg0; 5298 let pattern1_0 = arg1; 5299 let pattern2_0 = arg2; 5300 // Rule at src/isa/s390x/inst.isle line 2547. 5301 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5302 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5303 return Some(expr1_0); 5304 } 5305 5306 // Generated as internal constructor for term add_mem. 5307 pub fn constructor_add_mem<C: Context>( 5308 ctx: &mut C, 5309 arg0: Type, 5310 arg1: Reg, 5311 arg2: &MemArg, 5312 ) -> Option<Reg> { 5313 let pattern0_0 = arg0; 5314 let pattern1_0 = arg1; 5315 let pattern2_0 = arg2; 5316 // Rule at src/isa/s390x/inst.isle line 2550. 5317 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5318 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5319 return Some(expr1_0); 5320 } 5321 5322 // Generated as internal constructor for term add_mem_sext16. 5323 pub fn constructor_add_mem_sext16<C: Context>( 5324 ctx: &mut C, 5325 arg0: Type, 5326 arg1: Reg, 5327 arg2: &MemArg, 5328 ) -> Option<Reg> { 5329 let pattern0_0 = arg0; 5330 let pattern1_0 = arg1; 5331 let pattern2_0 = arg2; 5332 // Rule at src/isa/s390x/inst.isle line 2553. 5333 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5334 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5335 return Some(expr1_0); 5336 } 5337 5338 // Generated as internal constructor for term add_mem_sext32. 5339 pub fn constructor_add_mem_sext32<C: Context>( 5340 ctx: &mut C, 5341 arg0: Type, 5342 arg1: Reg, 5343 arg2: &MemArg, 5344 ) -> Option<Reg> { 5345 let pattern0_0 = arg0; 5346 let pattern1_0 = arg1; 5347 let pattern2_0 = arg2; 5348 // Rule at src/isa/s390x/inst.isle line 2556. 5349 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5350 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5351 return Some(expr1_0); 5352 } 5353 5354 // Generated as internal constructor for term aluop_add_logical. 5355 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5356 let pattern0_0 = arg0; 5357 if pattern0_0 == I32 { 5358 // Rule at src/isa/s390x/inst.isle line 2562. 5359 let expr0_0 = ALUOp::AddLogical32; 5360 return Some(expr0_0); 5361 } 5362 if pattern0_0 == I64 { 5363 // Rule at src/isa/s390x/inst.isle line 2563. 5364 let expr0_0 = ALUOp::AddLogical64; 5365 return Some(expr0_0); 5366 } 5367 return None; 5368 } 5369 5370 // Generated as internal constructor for term aluop_add_logical_zext32. 5371 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5372 let pattern0_0 = arg0; 5373 if pattern0_0 == I64 { 5374 // Rule at src/isa/s390x/inst.isle line 2566. 5375 let expr0_0 = ALUOp::AddLogical64Ext32; 5376 return Some(expr0_0); 5377 } 5378 return None; 5379 } 5380 5381 // Generated as internal constructor for term add_logical_reg. 5382 pub fn constructor_add_logical_reg<C: Context>( 5383 ctx: &mut C, 5384 arg0: Type, 5385 arg1: Reg, 5386 arg2: Reg, 5387 ) -> Option<Reg> { 5388 let pattern0_0 = arg0; 5389 let pattern1_0 = arg1; 5390 let pattern2_0 = arg2; 5391 // Rule at src/isa/s390x/inst.isle line 2569. 5392 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5393 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5394 return Some(expr1_0); 5395 } 5396 5397 // Generated as internal constructor for term add_logical_reg_zext32. 5398 pub fn constructor_add_logical_reg_zext32<C: Context>( 5399 ctx: &mut C, 5400 arg0: Type, 5401 arg1: Reg, 5402 arg2: Reg, 5403 ) -> Option<Reg> { 5404 let pattern0_0 = arg0; 5405 let pattern1_0 = arg1; 5406 let pattern2_0 = arg2; 5407 // Rule at src/isa/s390x/inst.isle line 2572. 5408 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5409 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5410 return Some(expr1_0); 5411 } 5412 5413 // Generated as internal constructor for term add_logical_zimm32. 5414 pub fn constructor_add_logical_zimm32<C: Context>( 5415 ctx: &mut C, 5416 arg0: Type, 5417 arg1: Reg, 5418 arg2: u32, 5419 ) -> Option<Reg> { 5420 let pattern0_0 = arg0; 5421 let pattern1_0 = arg1; 5422 let pattern2_0 = arg2; 5423 // Rule at src/isa/s390x/inst.isle line 2575. 5424 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5425 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5426 return Some(expr1_0); 5427 } 5428 5429 // Generated as internal constructor for term add_logical_mem. 5430 pub fn constructor_add_logical_mem<C: Context>( 5431 ctx: &mut C, 5432 arg0: Type, 5433 arg1: Reg, 5434 arg2: &MemArg, 5435 ) -> Option<Reg> { 5436 let pattern0_0 = arg0; 5437 let pattern1_0 = arg1; 5438 let pattern2_0 = arg2; 5439 // Rule at src/isa/s390x/inst.isle line 2578. 5440 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5441 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5442 return Some(expr1_0); 5443 } 5444 5445 // Generated as internal constructor for term add_logical_mem_zext32. 5446 pub fn constructor_add_logical_mem_zext32<C: Context>( 5447 ctx: &mut C, 5448 arg0: Type, 5449 arg1: Reg, 5450 arg2: &MemArg, 5451 ) -> Option<Reg> { 5452 let pattern0_0 = arg0; 5453 let pattern1_0 = arg1; 5454 let pattern2_0 = arg2; 5455 // Rule at src/isa/s390x/inst.isle line 2581. 5456 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5457 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5458 return Some(expr1_0); 5459 } 5460 5461 // Generated as internal constructor for term aluop_sub. 5462 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5463 let pattern0_0 = arg0; 5464 if pattern0_0 == I8 { 5465 // Rule at src/isa/s390x/inst.isle line 2587. 5466 let expr0_0 = ALUOp::Sub32; 5467 return Some(expr0_0); 5468 } 5469 if pattern0_0 == I16 { 5470 // Rule at src/isa/s390x/inst.isle line 2588. 5471 let expr0_0 = ALUOp::Sub32; 5472 return Some(expr0_0); 5473 } 5474 if pattern0_0 == I32 { 5475 // Rule at src/isa/s390x/inst.isle line 2589. 5476 let expr0_0 = ALUOp::Sub32; 5477 return Some(expr0_0); 5478 } 5479 if pattern0_0 == I64 { 5480 // Rule at src/isa/s390x/inst.isle line 2590. 5481 let expr0_0 = ALUOp::Sub64; 5482 return Some(expr0_0); 5483 } 5484 return None; 5485 } 5486 5487 // Generated as internal constructor for term aluop_sub_sext16. 5488 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5489 let pattern0_0 = arg0; 5490 if pattern0_0 == I16 { 5491 // Rule at src/isa/s390x/inst.isle line 2593. 5492 let expr0_0 = ALUOp::Sub32Ext16; 5493 return Some(expr0_0); 5494 } 5495 if pattern0_0 == I32 { 5496 // Rule at src/isa/s390x/inst.isle line 2594. 5497 let expr0_0 = ALUOp::Sub32Ext16; 5498 return Some(expr0_0); 5499 } 5500 if pattern0_0 == I64 { 5501 // Rule at src/isa/s390x/inst.isle line 2595. 5502 let expr0_0 = ALUOp::Sub64Ext16; 5503 return Some(expr0_0); 5504 } 5505 return None; 5506 } 5507 5508 // Generated as internal constructor for term aluop_sub_sext32. 5509 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5510 let pattern0_0 = arg0; 5511 if pattern0_0 == I64 { 5512 // Rule at src/isa/s390x/inst.isle line 2598. 5513 let expr0_0 = ALUOp::Sub64Ext32; 5514 return Some(expr0_0); 5515 } 5516 return None; 5517 } 5518 5519 // Generated as internal constructor for term sub_reg. 5520 pub fn constructor_sub_reg<C: Context>( 5521 ctx: &mut C, 5522 arg0: Type, 5523 arg1: Reg, 5524 arg2: Reg, 5525 ) -> Option<Reg> { 5526 let pattern0_0 = arg0; 5527 let pattern1_0 = arg1; 5528 let pattern2_0 = arg2; 5529 // Rule at src/isa/s390x/inst.isle line 2601. 5530 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5531 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5532 return Some(expr1_0); 5533 } 5534 5535 // Generated as internal constructor for term sub_reg_sext32. 5536 pub fn constructor_sub_reg_sext32<C: Context>( 5537 ctx: &mut C, 5538 arg0: Type, 5539 arg1: Reg, 5540 arg2: Reg, 5541 ) -> Option<Reg> { 5542 let pattern0_0 = arg0; 5543 let pattern1_0 = arg1; 5544 let pattern2_0 = arg2; 5545 // Rule at src/isa/s390x/inst.isle line 2604. 5546 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5547 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5548 return Some(expr1_0); 5549 } 5550 5551 // Generated as internal constructor for term sub_mem. 5552 pub fn constructor_sub_mem<C: Context>( 5553 ctx: &mut C, 5554 arg0: Type, 5555 arg1: Reg, 5556 arg2: &MemArg, 5557 ) -> Option<Reg> { 5558 let pattern0_0 = arg0; 5559 let pattern1_0 = arg1; 5560 let pattern2_0 = arg2; 5561 // Rule at src/isa/s390x/inst.isle line 2607. 5562 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5563 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5564 return Some(expr1_0); 5565 } 5566 5567 // Generated as internal constructor for term sub_mem_sext16. 5568 pub fn constructor_sub_mem_sext16<C: Context>( 5569 ctx: &mut C, 5570 arg0: Type, 5571 arg1: Reg, 5572 arg2: &MemArg, 5573 ) -> Option<Reg> { 5574 let pattern0_0 = arg0; 5575 let pattern1_0 = arg1; 5576 let pattern2_0 = arg2; 5577 // Rule at src/isa/s390x/inst.isle line 2610. 5578 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5579 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5580 return Some(expr1_0); 5581 } 5582 5583 // Generated as internal constructor for term sub_mem_sext32. 5584 pub fn constructor_sub_mem_sext32<C: Context>( 5585 ctx: &mut C, 5586 arg0: Type, 5587 arg1: Reg, 5588 arg2: &MemArg, 5589 ) -> Option<Reg> { 5590 let pattern0_0 = arg0; 5591 let pattern1_0 = arg1; 5592 let pattern2_0 = arg2; 5593 // Rule at src/isa/s390x/inst.isle line 2613. 5594 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5595 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5596 return Some(expr1_0); 5597 } 5598 5599 // Generated as internal constructor for term aluop_sub_logical. 5600 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5601 let pattern0_0 = arg0; 5602 if pattern0_0 == I32 { 5603 // Rule at src/isa/s390x/inst.isle line 2619. 5604 let expr0_0 = ALUOp::SubLogical32; 5605 return Some(expr0_0); 5606 } 5607 if pattern0_0 == I64 { 5608 // Rule at src/isa/s390x/inst.isle line 2620. 5609 let expr0_0 = ALUOp::SubLogical64; 5610 return Some(expr0_0); 5611 } 5612 return None; 5613 } 5614 5615 // Generated as internal constructor for term aluop_sub_logical_zext32. 5616 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5617 let pattern0_0 = arg0; 5618 if pattern0_0 == I64 { 5619 // Rule at src/isa/s390x/inst.isle line 2623. 5620 let expr0_0 = ALUOp::SubLogical64Ext32; 5621 return Some(expr0_0); 5622 } 5623 return None; 5624 } 5625 5626 // Generated as internal constructor for term sub_logical_reg. 5627 pub fn constructor_sub_logical_reg<C: Context>( 5628 ctx: &mut C, 5629 arg0: Type, 5630 arg1: Reg, 5631 arg2: Reg, 5632 ) -> Option<Reg> { 5633 let pattern0_0 = arg0; 5634 let pattern1_0 = arg1; 5635 let pattern2_0 = arg2; 5636 // Rule at src/isa/s390x/inst.isle line 2626. 5637 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5638 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5639 return Some(expr1_0); 5640 } 5641 5642 // Generated as internal constructor for term sub_logical_reg_zext32. 5643 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5644 ctx: &mut C, 5645 arg0: Type, 5646 arg1: Reg, 5647 arg2: Reg, 5648 ) -> Option<Reg> { 5649 let pattern0_0 = arg0; 5650 let pattern1_0 = arg1; 5651 let pattern2_0 = arg2; 5652 // Rule at src/isa/s390x/inst.isle line 2629. 5653 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5654 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5655 return Some(expr1_0); 5656 } 5657 5658 // Generated as internal constructor for term sub_logical_zimm32. 5659 pub fn constructor_sub_logical_zimm32<C: Context>( 5660 ctx: &mut C, 5661 arg0: Type, 5662 arg1: Reg, 5663 arg2: u32, 5664 ) -> Option<Reg> { 5665 let pattern0_0 = arg0; 5666 let pattern1_0 = arg1; 5667 let pattern2_0 = arg2; 5668 // Rule at src/isa/s390x/inst.isle line 2632. 5669 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5670 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5671 return Some(expr1_0); 5672 } 5673 5674 // Generated as internal constructor for term sub_logical_mem. 5675 pub fn constructor_sub_logical_mem<C: Context>( 5676 ctx: &mut C, 5677 arg0: Type, 5678 arg1: Reg, 5679 arg2: &MemArg, 5680 ) -> Option<Reg> { 5681 let pattern0_0 = arg0; 5682 let pattern1_0 = arg1; 5683 let pattern2_0 = arg2; 5684 // Rule at src/isa/s390x/inst.isle line 2635. 5685 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5686 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5687 return Some(expr1_0); 5688 } 5689 5690 // Generated as internal constructor for term sub_logical_mem_zext32. 5691 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5692 ctx: &mut C, 5693 arg0: Type, 5694 arg1: Reg, 5695 arg2: &MemArg, 5696 ) -> Option<Reg> { 5697 let pattern0_0 = arg0; 5698 let pattern1_0 = arg1; 5699 let pattern2_0 = arg2; 5700 // Rule at src/isa/s390x/inst.isle line 2638. 5701 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5702 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5703 return Some(expr1_0); 5704 } 5705 5706 // Generated as internal constructor for term aluop_mul. 5707 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5708 let pattern0_0 = arg0; 5709 if pattern0_0 == I8 { 5710 // Rule at src/isa/s390x/inst.isle line 2644. 5711 let expr0_0 = ALUOp::Mul32; 5712 return Some(expr0_0); 5713 } 5714 if pattern0_0 == I16 { 5715 // Rule at src/isa/s390x/inst.isle line 2645. 5716 let expr0_0 = ALUOp::Mul32; 5717 return Some(expr0_0); 5718 } 5719 if pattern0_0 == I32 { 5720 // Rule at src/isa/s390x/inst.isle line 2646. 5721 let expr0_0 = ALUOp::Mul32; 5722 return Some(expr0_0); 5723 } 5724 if pattern0_0 == I64 { 5725 // Rule at src/isa/s390x/inst.isle line 2647. 5726 let expr0_0 = ALUOp::Mul64; 5727 return Some(expr0_0); 5728 } 5729 return None; 5730 } 5731 5732 // Generated as internal constructor for term aluop_mul_sext16. 5733 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5734 let pattern0_0 = arg0; 5735 if pattern0_0 == I16 { 5736 // Rule at src/isa/s390x/inst.isle line 2650. 5737 let expr0_0 = ALUOp::Mul32Ext16; 5738 return Some(expr0_0); 5739 } 5740 if pattern0_0 == I32 { 5741 // Rule at src/isa/s390x/inst.isle line 2651. 5742 let expr0_0 = ALUOp::Mul32Ext16; 5743 return Some(expr0_0); 5744 } 5745 if pattern0_0 == I64 { 5746 // Rule at src/isa/s390x/inst.isle line 2652. 5747 let expr0_0 = ALUOp::Mul64Ext16; 5748 return Some(expr0_0); 5749 } 5750 return None; 5751 } 5752 5753 // Generated as internal constructor for term aluop_mul_sext32. 5754 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5755 let pattern0_0 = arg0; 5756 if pattern0_0 == I64 { 5757 // Rule at src/isa/s390x/inst.isle line 2655. 5758 let expr0_0 = ALUOp::Mul64Ext32; 5759 return Some(expr0_0); 5760 } 5761 return None; 5762 } 5763 5764 // Generated as internal constructor for term mul_reg. 5765 pub fn constructor_mul_reg<C: Context>( 5766 ctx: &mut C, 5767 arg0: Type, 5768 arg1: Reg, 5769 arg2: Reg, 5770 ) -> Option<Reg> { 5771 let pattern0_0 = arg0; 5772 let pattern1_0 = arg1; 5773 let pattern2_0 = arg2; 5774 // Rule at src/isa/s390x/inst.isle line 2658. 5775 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5776 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5777 return Some(expr1_0); 5778 } 5779 5780 // Generated as internal constructor for term mul_reg_sext32. 5781 pub fn constructor_mul_reg_sext32<C: Context>( 5782 ctx: &mut C, 5783 arg0: Type, 5784 arg1: Reg, 5785 arg2: Reg, 5786 ) -> Option<Reg> { 5787 let pattern0_0 = arg0; 5788 let pattern1_0 = arg1; 5789 let pattern2_0 = arg2; 5790 // Rule at src/isa/s390x/inst.isle line 2661. 5791 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5792 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5793 return Some(expr1_0); 5794 } 5795 5796 // Generated as internal constructor for term mul_simm16. 5797 pub fn constructor_mul_simm16<C: Context>( 5798 ctx: &mut C, 5799 arg0: Type, 5800 arg1: Reg, 5801 arg2: i16, 5802 ) -> Option<Reg> { 5803 let pattern0_0 = arg0; 5804 let pattern1_0 = arg1; 5805 let pattern2_0 = arg2; 5806 // Rule at src/isa/s390x/inst.isle line 2664. 5807 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5808 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5809 return Some(expr1_0); 5810 } 5811 5812 // Generated as internal constructor for term mul_simm32. 5813 pub fn constructor_mul_simm32<C: Context>( 5814 ctx: &mut C, 5815 arg0: Type, 5816 arg1: Reg, 5817 arg2: i32, 5818 ) -> Option<Reg> { 5819 let pattern0_0 = arg0; 5820 let pattern1_0 = arg1; 5821 let pattern2_0 = arg2; 5822 // Rule at src/isa/s390x/inst.isle line 2667. 5823 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5824 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5825 return Some(expr1_0); 5826 } 5827 5828 // Generated as internal constructor for term mul_mem. 5829 pub fn constructor_mul_mem<C: Context>( 5830 ctx: &mut C, 5831 arg0: Type, 5832 arg1: Reg, 5833 arg2: &MemArg, 5834 ) -> Option<Reg> { 5835 let pattern0_0 = arg0; 5836 let pattern1_0 = arg1; 5837 let pattern2_0 = arg2; 5838 // Rule at src/isa/s390x/inst.isle line 2670. 5839 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5840 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5841 return Some(expr1_0); 5842 } 5843 5844 // Generated as internal constructor for term mul_mem_sext16. 5845 pub fn constructor_mul_mem_sext16<C: Context>( 5846 ctx: &mut C, 5847 arg0: Type, 5848 arg1: Reg, 5849 arg2: &MemArg, 5850 ) -> Option<Reg> { 5851 let pattern0_0 = arg0; 5852 let pattern1_0 = arg1; 5853 let pattern2_0 = arg2; 5854 // Rule at src/isa/s390x/inst.isle line 2673. 5855 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5856 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5857 return Some(expr1_0); 5858 } 5859 5860 // Generated as internal constructor for term mul_mem_sext32. 5861 pub fn constructor_mul_mem_sext32<C: Context>( 5862 ctx: &mut C, 5863 arg0: Type, 5864 arg1: Reg, 5865 arg2: &MemArg, 5866 ) -> Option<Reg> { 5867 let pattern0_0 = arg0; 5868 let pattern1_0 = arg1; 5869 let pattern2_0 = arg2; 5870 // Rule at src/isa/s390x/inst.isle line 2676. 5871 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5872 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5873 return Some(expr1_0); 5874 } 5875 5876 // Generated as internal constructor for term udivmod. 5877 pub fn constructor_udivmod<C: Context>( 5878 ctx: &mut C, 5879 arg0: Type, 5880 arg1: &RegPair, 5881 arg2: Reg, 5882 ) -> Option<RegPair> { 5883 let pattern0_0 = arg0; 5884 if pattern0_0 == I32 { 5885 let pattern2_0 = arg1; 5886 let pattern3_0 = arg2; 5887 // Rule at src/isa/s390x/inst.isle line 2682. 5888 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5889 return Some(expr0_0); 5890 } 5891 if pattern0_0 == I64 { 5892 let pattern2_0 = arg1; 5893 let pattern3_0 = arg2; 5894 // Rule at src/isa/s390x/inst.isle line 2683. 5895 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5896 return Some(expr0_0); 5897 } 5898 return None; 5899 } 5900 5901 // Generated as internal constructor for term sdivmod. 5902 pub fn constructor_sdivmod<C: Context>( 5903 ctx: &mut C, 5904 arg0: Type, 5905 arg1: &RegPair, 5906 arg2: Reg, 5907 ) -> Option<RegPair> { 5908 let pattern0_0 = arg0; 5909 if pattern0_0 == I32 { 5910 let pattern2_0 = arg1; 5911 let pattern3_0 = arg2; 5912 // Rule at src/isa/s390x/inst.isle line 2689. 5913 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5914 return Some(expr0_0); 5915 } 5916 if pattern0_0 == I64 { 5917 let pattern2_0 = arg1; 5918 let pattern3_0 = arg2; 5919 // Rule at src/isa/s390x/inst.isle line 2690. 5920 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5921 return Some(expr0_0); 5922 } 5923 return None; 5924 } 5925 5926 // Generated as internal constructor for term aluop_and. 5927 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5928 let pattern0_0 = arg0; 5929 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5930 // Rule at src/isa/s390x/inst.isle line 2696. 5931 let expr0_0 = ALUOp::And32; 5932 return Some(expr0_0); 5933 } 5934 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5935 // Rule at src/isa/s390x/inst.isle line 2697. 5936 let expr0_0 = ALUOp::And64; 5937 return Some(expr0_0); 5938 } 5939 return None; 5940 } 5941 5942 // Generated as internal constructor for term and_reg. 5943 pub fn constructor_and_reg<C: Context>( 5944 ctx: &mut C, 5945 arg0: Type, 5946 arg1: Reg, 5947 arg2: Reg, 5948 ) -> Option<Reg> { 5949 let pattern0_0 = arg0; 5950 let pattern1_0 = arg1; 5951 let pattern2_0 = arg2; 5952 // Rule at src/isa/s390x/inst.isle line 2700. 5953 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5954 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5955 return Some(expr1_0); 5956 } 5957 5958 // Generated as internal constructor for term and_uimm16shifted. 5959 pub fn constructor_and_uimm16shifted<C: Context>( 5960 ctx: &mut C, 5961 arg0: Type, 5962 arg1: Reg, 5963 arg2: UImm16Shifted, 5964 ) -> Option<Reg> { 5965 let pattern0_0 = arg0; 5966 let pattern1_0 = arg1; 5967 let pattern2_0 = arg2; 5968 // Rule at src/isa/s390x/inst.isle line 2703. 5969 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5970 let expr1_0 = 5971 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5972 return Some(expr1_0); 5973 } 5974 5975 // Generated as internal constructor for term and_uimm32shifted. 5976 pub fn constructor_and_uimm32shifted<C: Context>( 5977 ctx: &mut C, 5978 arg0: Type, 5979 arg1: Reg, 5980 arg2: UImm32Shifted, 5981 ) -> Option<Reg> { 5982 let pattern0_0 = arg0; 5983 let pattern1_0 = arg1; 5984 let pattern2_0 = arg2; 5985 // Rule at src/isa/s390x/inst.isle line 2706. 5986 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5987 let expr1_0 = 5988 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5989 return Some(expr1_0); 5990 } 5991 5992 // Generated as internal constructor for term and_mem. 5993 pub fn constructor_and_mem<C: Context>( 5994 ctx: &mut C, 5995 arg0: Type, 5996 arg1: Reg, 5997 arg2: &MemArg, 5998 ) -> Option<Reg> { 5999 let pattern0_0 = arg0; 6000 let pattern1_0 = arg1; 6001 let pattern2_0 = arg2; 6002 // Rule at src/isa/s390x/inst.isle line 2709. 6003 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6004 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6005 return Some(expr1_0); 6006 } 6007 6008 // Generated as internal constructor for term aluop_or. 6009 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6010 let pattern0_0 = arg0; 6011 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6012 // Rule at src/isa/s390x/inst.isle line 2715. 6013 let expr0_0 = ALUOp::Orr32; 6014 return Some(expr0_0); 6015 } 6016 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6017 // Rule at src/isa/s390x/inst.isle line 2716. 6018 let expr0_0 = ALUOp::Orr64; 6019 return Some(expr0_0); 6020 } 6021 return None; 6022 } 6023 6024 // Generated as internal constructor for term or_reg. 6025 pub fn constructor_or_reg<C: Context>( 6026 ctx: &mut C, 6027 arg0: Type, 6028 arg1: Reg, 6029 arg2: Reg, 6030 ) -> Option<Reg> { 6031 let pattern0_0 = arg0; 6032 let pattern1_0 = arg1; 6033 let pattern2_0 = arg2; 6034 // Rule at src/isa/s390x/inst.isle line 2719. 6035 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6036 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6037 return Some(expr1_0); 6038 } 6039 6040 // Generated as internal constructor for term or_uimm16shifted. 6041 pub fn constructor_or_uimm16shifted<C: Context>( 6042 ctx: &mut C, 6043 arg0: Type, 6044 arg1: Reg, 6045 arg2: UImm16Shifted, 6046 ) -> Option<Reg> { 6047 let pattern0_0 = arg0; 6048 let pattern1_0 = arg1; 6049 let pattern2_0 = arg2; 6050 // Rule at src/isa/s390x/inst.isle line 2722. 6051 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6052 let expr1_0 = 6053 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6054 return Some(expr1_0); 6055 } 6056 6057 // Generated as internal constructor for term or_uimm32shifted. 6058 pub fn constructor_or_uimm32shifted<C: Context>( 6059 ctx: &mut C, 6060 arg0: Type, 6061 arg1: Reg, 6062 arg2: UImm32Shifted, 6063 ) -> Option<Reg> { 6064 let pattern0_0 = arg0; 6065 let pattern1_0 = arg1; 6066 let pattern2_0 = arg2; 6067 // Rule at src/isa/s390x/inst.isle line 2725. 6068 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6069 let expr1_0 = 6070 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6071 return Some(expr1_0); 6072 } 6073 6074 // Generated as internal constructor for term or_mem. 6075 pub fn constructor_or_mem<C: Context>( 6076 ctx: &mut C, 6077 arg0: Type, 6078 arg1: Reg, 6079 arg2: &MemArg, 6080 ) -> Option<Reg> { 6081 let pattern0_0 = arg0; 6082 let pattern1_0 = arg1; 6083 let pattern2_0 = arg2; 6084 // Rule at src/isa/s390x/inst.isle line 2728. 6085 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6086 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6087 return Some(expr1_0); 6088 } 6089 6090 // Generated as internal constructor for term aluop_xor. 6091 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6092 let pattern0_0 = arg0; 6093 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6094 // Rule at src/isa/s390x/inst.isle line 2734. 6095 let expr0_0 = ALUOp::Xor32; 6096 return Some(expr0_0); 6097 } 6098 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6099 // Rule at src/isa/s390x/inst.isle line 2735. 6100 let expr0_0 = ALUOp::Xor64; 6101 return Some(expr0_0); 6102 } 6103 return None; 6104 } 6105 6106 // Generated as internal constructor for term xor_reg. 6107 pub fn constructor_xor_reg<C: Context>( 6108 ctx: &mut C, 6109 arg0: Type, 6110 arg1: Reg, 6111 arg2: Reg, 6112 ) -> Option<Reg> { 6113 let pattern0_0 = arg0; 6114 let pattern1_0 = arg1; 6115 let pattern2_0 = arg2; 6116 // Rule at src/isa/s390x/inst.isle line 2738. 6117 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6118 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6119 return Some(expr1_0); 6120 } 6121 6122 // Generated as internal constructor for term xor_uimm32shifted. 6123 pub fn constructor_xor_uimm32shifted<C: Context>( 6124 ctx: &mut C, 6125 arg0: Type, 6126 arg1: Reg, 6127 arg2: UImm32Shifted, 6128 ) -> Option<Reg> { 6129 let pattern0_0 = arg0; 6130 let pattern1_0 = arg1; 6131 let pattern2_0 = arg2; 6132 // Rule at src/isa/s390x/inst.isle line 2741. 6133 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6134 let expr1_0 = 6135 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6136 return Some(expr1_0); 6137 } 6138 6139 // Generated as internal constructor for term xor_mem. 6140 pub fn constructor_xor_mem<C: Context>( 6141 ctx: &mut C, 6142 arg0: Type, 6143 arg1: Reg, 6144 arg2: &MemArg, 6145 ) -> Option<Reg> { 6146 let pattern0_0 = arg0; 6147 let pattern1_0 = arg1; 6148 let pattern2_0 = arg2; 6149 // Rule at src/isa/s390x/inst.isle line 2744. 6150 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6151 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6152 return Some(expr1_0); 6153 } 6154 6155 // Generated as internal constructor for term push_xor_uimm32shifted. 6156 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6157 ctx: &mut C, 6158 arg0: &VecMInstBuilder, 6159 arg1: Type, 6160 arg2: WritableReg, 6161 arg3: Reg, 6162 arg4: UImm32Shifted, 6163 ) -> Option<Reg> { 6164 let pattern0_0 = arg0; 6165 let pattern1_0 = arg1; 6166 let pattern2_0 = arg2; 6167 let pattern3_0 = arg3; 6168 let pattern4_0 = arg4; 6169 // Rule at src/isa/s390x/inst.isle line 2747. 6170 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6171 let expr1_0 = constructor_push_alu_uimm32shifted( 6172 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6173 )?; 6174 return Some(expr1_0); 6175 } 6176 6177 // Generated as internal constructor for term not_reg. 6178 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6179 let pattern0_0 = arg0; 6180 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6181 let pattern2_0 = arg1; 6182 // Rule at src/isa/s390x/inst.isle line 2753. 6183 let expr0_0: u32 = 4294967295; 6184 let expr1_0: u8 = 0; 6185 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6186 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6187 return Some(expr3_0); 6188 } 6189 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6190 let pattern2_0 = arg1; 6191 // Rule at src/isa/s390x/inst.isle line 2755. 6192 let expr0_0: u32 = 4294967295; 6193 let expr1_0: u8 = 0; 6194 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6195 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6196 let expr4_0: u32 = 4294967295; 6197 let expr5_0: u8 = 32; 6198 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6199 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6200 return Some(expr7_0); 6201 } 6202 return None; 6203 } 6204 6205 // Generated as internal constructor for term push_not_reg. 6206 pub fn constructor_push_not_reg<C: Context>( 6207 ctx: &mut C, 6208 arg0: &VecMInstBuilder, 6209 arg1: Type, 6210 arg2: WritableReg, 6211 arg3: Reg, 6212 ) -> Option<Reg> { 6213 let pattern0_0 = arg0; 6214 let pattern1_0 = arg1; 6215 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6216 let pattern3_0 = arg2; 6217 let pattern4_0 = arg3; 6218 // Rule at src/isa/s390x/inst.isle line 2761. 6219 let expr0_0: u32 = 4294967295; 6220 let expr1_0: u8 = 0; 6221 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6222 let expr3_0 = constructor_push_xor_uimm32shifted( 6223 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6224 )?; 6225 return Some(expr3_0); 6226 } 6227 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6228 let pattern3_0 = arg2; 6229 let pattern4_0 = arg3; 6230 // Rule at src/isa/s390x/inst.isle line 2763. 6231 let expr0_0: u32 = 4294967295; 6232 let expr1_0: u8 = 0; 6233 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6234 let expr3_0 = constructor_push_xor_uimm32shifted( 6235 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6236 )?; 6237 let expr4_0: u32 = 4294967295; 6238 let expr5_0: u8 = 32; 6239 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6240 let expr7_0 = constructor_push_xor_uimm32shifted( 6241 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6242 )?; 6243 return Some(expr7_0); 6244 } 6245 return None; 6246 } 6247 6248 // Generated as internal constructor for term aluop_and_not. 6249 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6250 let pattern0_0 = arg0; 6251 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6252 // Rule at src/isa/s390x/inst.isle line 2771. 6253 let expr0_0 = ALUOp::AndNot32; 6254 return Some(expr0_0); 6255 } 6256 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6257 // Rule at src/isa/s390x/inst.isle line 2772. 6258 let expr0_0 = ALUOp::AndNot64; 6259 return Some(expr0_0); 6260 } 6261 return None; 6262 } 6263 6264 // Generated as internal constructor for term and_not_reg. 6265 pub fn constructor_and_not_reg<C: Context>( 6266 ctx: &mut C, 6267 arg0: Type, 6268 arg1: Reg, 6269 arg2: Reg, 6270 ) -> Option<Reg> { 6271 let pattern0_0 = arg0; 6272 let pattern1_0 = arg1; 6273 let pattern2_0 = arg2; 6274 // Rule at src/isa/s390x/inst.isle line 2775. 6275 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6276 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6277 return Some(expr1_0); 6278 } 6279 6280 // Generated as internal constructor for term aluop_or_not. 6281 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6282 let pattern0_0 = arg0; 6283 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6284 // Rule at src/isa/s390x/inst.isle line 2781. 6285 let expr0_0 = ALUOp::OrrNot32; 6286 return Some(expr0_0); 6287 } 6288 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6289 // Rule at src/isa/s390x/inst.isle line 2782. 6290 let expr0_0 = ALUOp::OrrNot64; 6291 return Some(expr0_0); 6292 } 6293 return None; 6294 } 6295 6296 // Generated as internal constructor for term or_not_reg. 6297 pub fn constructor_or_not_reg<C: Context>( 6298 ctx: &mut C, 6299 arg0: Type, 6300 arg1: Reg, 6301 arg2: Reg, 6302 ) -> Option<Reg> { 6303 let pattern0_0 = arg0; 6304 let pattern1_0 = arg1; 6305 let pattern2_0 = arg2; 6306 // Rule at src/isa/s390x/inst.isle line 2785. 6307 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6308 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6309 return Some(expr1_0); 6310 } 6311 6312 // Generated as internal constructor for term aluop_xor_not. 6313 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6314 let pattern0_0 = arg0; 6315 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6316 // Rule at src/isa/s390x/inst.isle line 2791. 6317 let expr0_0 = ALUOp::XorNot32; 6318 return Some(expr0_0); 6319 } 6320 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6321 // Rule at src/isa/s390x/inst.isle line 2792. 6322 let expr0_0 = ALUOp::XorNot64; 6323 return Some(expr0_0); 6324 } 6325 return None; 6326 } 6327 6328 // Generated as internal constructor for term xor_not_reg. 6329 pub fn constructor_xor_not_reg<C: Context>( 6330 ctx: &mut C, 6331 arg0: Type, 6332 arg1: Reg, 6333 arg2: Reg, 6334 ) -> Option<Reg> { 6335 let pattern0_0 = arg0; 6336 let pattern1_0 = arg1; 6337 let pattern2_0 = arg2; 6338 // Rule at src/isa/s390x/inst.isle line 2795. 6339 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6340 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6341 return Some(expr1_0); 6342 } 6343 6344 // Generated as internal constructor for term unaryop_abs. 6345 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6346 let pattern0_0 = arg0; 6347 if pattern0_0 == I32 { 6348 // Rule at src/isa/s390x/inst.isle line 2801. 6349 let expr0_0 = UnaryOp::Abs32; 6350 return Some(expr0_0); 6351 } 6352 if pattern0_0 == I64 { 6353 // Rule at src/isa/s390x/inst.isle line 2802. 6354 let expr0_0 = UnaryOp::Abs64; 6355 return Some(expr0_0); 6356 } 6357 return None; 6358 } 6359 6360 // Generated as internal constructor for term unaryop_abs_sext32. 6361 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6362 let pattern0_0 = arg0; 6363 if pattern0_0 == I64 { 6364 // Rule at src/isa/s390x/inst.isle line 2805. 6365 let expr0_0 = UnaryOp::Abs64Ext32; 6366 return Some(expr0_0); 6367 } 6368 return None; 6369 } 6370 6371 // Generated as internal constructor for term abs_reg. 6372 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6373 let pattern0_0 = arg0; 6374 let pattern1_0 = arg1; 6375 // Rule at src/isa/s390x/inst.isle line 2808. 6376 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6377 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6378 return Some(expr1_0); 6379 } 6380 6381 // Generated as internal constructor for term abs_reg_sext32. 6382 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6383 let pattern0_0 = arg0; 6384 let pattern1_0 = arg1; 6385 // Rule at src/isa/s390x/inst.isle line 2811. 6386 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6387 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6388 return Some(expr1_0); 6389 } 6390 6391 // Generated as internal constructor for term unaryop_neg. 6392 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6393 let pattern0_0 = arg0; 6394 if pattern0_0 == I8 { 6395 // Rule at src/isa/s390x/inst.isle line 2817. 6396 let expr0_0 = UnaryOp::Neg32; 6397 return Some(expr0_0); 6398 } 6399 if pattern0_0 == I16 { 6400 // Rule at src/isa/s390x/inst.isle line 2818. 6401 let expr0_0 = UnaryOp::Neg32; 6402 return Some(expr0_0); 6403 } 6404 if pattern0_0 == I32 { 6405 // Rule at src/isa/s390x/inst.isle line 2819. 6406 let expr0_0 = UnaryOp::Neg32; 6407 return Some(expr0_0); 6408 } 6409 if pattern0_0 == I64 { 6410 // Rule at src/isa/s390x/inst.isle line 2820. 6411 let expr0_0 = UnaryOp::Neg64; 6412 return Some(expr0_0); 6413 } 6414 return None; 6415 } 6416 6417 // Generated as internal constructor for term unaryop_neg_sext32. 6418 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6419 let pattern0_0 = arg0; 6420 if pattern0_0 == I64 { 6421 // Rule at src/isa/s390x/inst.isle line 2823. 6422 let expr0_0 = UnaryOp::Neg64Ext32; 6423 return Some(expr0_0); 6424 } 6425 return None; 6426 } 6427 6428 // Generated as internal constructor for term neg_reg. 6429 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6430 let pattern0_0 = arg0; 6431 let pattern1_0 = arg1; 6432 // Rule at src/isa/s390x/inst.isle line 2826. 6433 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6434 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6435 return Some(expr1_0); 6436 } 6437 6438 // Generated as internal constructor for term neg_reg_sext32. 6439 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6440 let pattern0_0 = arg0; 6441 let pattern1_0 = arg1; 6442 // Rule at src/isa/s390x/inst.isle line 2829. 6443 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6444 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6445 return Some(expr1_0); 6446 } 6447 6448 // Generated as internal constructor for term unaryop_bswap. 6449 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6450 let pattern0_0 = arg0; 6451 if pattern0_0 == I32 { 6452 // Rule at src/isa/s390x/inst.isle line 2835. 6453 let expr0_0 = UnaryOp::BSwap32; 6454 return Some(expr0_0); 6455 } 6456 if pattern0_0 == I64 { 6457 // Rule at src/isa/s390x/inst.isle line 2836. 6458 let expr0_0 = UnaryOp::BSwap64; 6459 return Some(expr0_0); 6460 } 6461 return None; 6462 } 6463 6464 // Generated as internal constructor for term bswap_reg. 6465 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6466 let pattern0_0 = arg0; 6467 let pattern1_0 = arg1; 6468 // Rule at src/isa/s390x/inst.isle line 2839. 6469 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6470 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6471 return Some(expr1_0); 6472 } 6473 6474 // Generated as internal constructor for term push_bswap_reg. 6475 pub fn constructor_push_bswap_reg<C: Context>( 6476 ctx: &mut C, 6477 arg0: &VecMInstBuilder, 6478 arg1: Type, 6479 arg2: WritableReg, 6480 arg3: Reg, 6481 ) -> Option<Reg> { 6482 let pattern0_0 = arg0; 6483 let pattern1_0 = arg1; 6484 let pattern2_0 = arg2; 6485 let pattern3_0 = arg3; 6486 // Rule at src/isa/s390x/inst.isle line 2842. 6487 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6488 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6489 return Some(expr1_0); 6490 } 6491 6492 // Generated as internal constructor for term shiftop_rot. 6493 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6494 let pattern0_0 = arg0; 6495 if pattern0_0 == I32 { 6496 // Rule at src/isa/s390x/inst.isle line 2848. 6497 let expr0_0 = ShiftOp::RotL32; 6498 return Some(expr0_0); 6499 } 6500 if pattern0_0 == I64 { 6501 // Rule at src/isa/s390x/inst.isle line 2849. 6502 let expr0_0 = ShiftOp::RotL64; 6503 return Some(expr0_0); 6504 } 6505 return None; 6506 } 6507 6508 // Generated as internal constructor for term rot_reg. 6509 pub fn constructor_rot_reg<C: Context>( 6510 ctx: &mut C, 6511 arg0: Type, 6512 arg1: Reg, 6513 arg2: Reg, 6514 ) -> Option<Reg> { 6515 let pattern0_0 = arg0; 6516 let pattern1_0 = arg1; 6517 let pattern2_0 = arg2; 6518 // Rule at src/isa/s390x/inst.isle line 2852. 6519 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6520 let expr1_0: u8 = 0; 6521 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6522 return Some(expr2_0); 6523 } 6524 6525 // Generated as internal constructor for term rot_imm. 6526 pub fn constructor_rot_imm<C: Context>( 6527 ctx: &mut C, 6528 arg0: Type, 6529 arg1: Reg, 6530 arg2: u8, 6531 ) -> Option<Reg> { 6532 let pattern0_0 = arg0; 6533 let pattern1_0 = arg1; 6534 let pattern2_0 = arg2; 6535 // Rule at src/isa/s390x/inst.isle line 2856. 6536 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6537 let expr1_0 = C::zero_reg(ctx); 6538 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6539 return Some(expr2_0); 6540 } 6541 6542 // Generated as internal constructor for term rot_imm_reg. 6543 pub fn constructor_rot_imm_reg<C: Context>( 6544 ctx: &mut C, 6545 arg0: Type, 6546 arg1: Reg, 6547 arg2: u8, 6548 arg3: Reg, 6549 ) -> Option<Reg> { 6550 let pattern0_0 = arg0; 6551 let pattern1_0 = arg1; 6552 let pattern2_0 = arg2; 6553 let pattern3_0 = arg3; 6554 // Rule at src/isa/s390x/inst.isle line 2860. 6555 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6556 let expr1_0 = constructor_shift_rr( 6557 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6558 )?; 6559 return Some(expr1_0); 6560 } 6561 6562 // Generated as internal constructor for term push_rot_imm_reg. 6563 pub fn constructor_push_rot_imm_reg<C: Context>( 6564 ctx: &mut C, 6565 arg0: &VecMInstBuilder, 6566 arg1: Type, 6567 arg2: WritableReg, 6568 arg3: Reg, 6569 arg4: u8, 6570 arg5: Reg, 6571 ) -> Option<Reg> { 6572 let pattern0_0 = arg0; 6573 let pattern1_0 = arg1; 6574 let pattern2_0 = arg2; 6575 let pattern3_0 = arg3; 6576 let pattern4_0 = arg4; 6577 let pattern5_0 = arg5; 6578 // Rule at src/isa/s390x/inst.isle line 2864. 6579 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6580 let expr1_0 = constructor_push_shift( 6581 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6582 )?; 6583 return Some(expr1_0); 6584 } 6585 6586 // Generated as internal constructor for term shiftop_lshl. 6587 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6588 let pattern0_0 = arg0; 6589 if pattern0_0 == I8 { 6590 // Rule at src/isa/s390x/inst.isle line 2871. 6591 let expr0_0 = ShiftOp::LShL32; 6592 return Some(expr0_0); 6593 } 6594 if pattern0_0 == I16 { 6595 // Rule at src/isa/s390x/inst.isle line 2872. 6596 let expr0_0 = ShiftOp::LShL32; 6597 return Some(expr0_0); 6598 } 6599 if pattern0_0 == I32 { 6600 // Rule at src/isa/s390x/inst.isle line 2873. 6601 let expr0_0 = ShiftOp::LShL32; 6602 return Some(expr0_0); 6603 } 6604 if pattern0_0 == I64 { 6605 // Rule at src/isa/s390x/inst.isle line 2874. 6606 let expr0_0 = ShiftOp::LShL64; 6607 return Some(expr0_0); 6608 } 6609 return None; 6610 } 6611 6612 // Generated as internal constructor for term lshl_reg. 6613 pub fn constructor_lshl_reg<C: Context>( 6614 ctx: &mut C, 6615 arg0: Type, 6616 arg1: Reg, 6617 arg2: Reg, 6618 ) -> Option<Reg> { 6619 let pattern0_0 = arg0; 6620 let pattern1_0 = arg1; 6621 let pattern2_0 = arg2; 6622 // Rule at src/isa/s390x/inst.isle line 2877. 6623 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6624 let expr1_0: u8 = 0; 6625 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6626 return Some(expr2_0); 6627 } 6628 6629 // Generated as internal constructor for term lshl_imm. 6630 pub fn constructor_lshl_imm<C: Context>( 6631 ctx: &mut C, 6632 arg0: Type, 6633 arg1: Reg, 6634 arg2: u8, 6635 ) -> Option<Reg> { 6636 let pattern0_0 = arg0; 6637 let pattern1_0 = arg1; 6638 let pattern2_0 = arg2; 6639 // Rule at src/isa/s390x/inst.isle line 2881. 6640 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6641 let expr1_0 = C::zero_reg(ctx); 6642 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6643 return Some(expr2_0); 6644 } 6645 6646 // Generated as internal constructor for term shiftop_lshr. 6647 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6648 let pattern0_0 = arg0; 6649 if pattern0_0 == I32 { 6650 // Rule at src/isa/s390x/inst.isle line 2888. 6651 let expr0_0 = ShiftOp::LShR32; 6652 return Some(expr0_0); 6653 } 6654 if pattern0_0 == I64 { 6655 // Rule at src/isa/s390x/inst.isle line 2889. 6656 let expr0_0 = ShiftOp::LShR64; 6657 return Some(expr0_0); 6658 } 6659 return None; 6660 } 6661 6662 // Generated as internal constructor for term lshr_reg. 6663 pub fn constructor_lshr_reg<C: Context>( 6664 ctx: &mut C, 6665 arg0: Type, 6666 arg1: Reg, 6667 arg2: Reg, 6668 ) -> Option<Reg> { 6669 let pattern0_0 = arg0; 6670 let pattern1_0 = arg1; 6671 let pattern2_0 = arg2; 6672 // Rule at src/isa/s390x/inst.isle line 2892. 6673 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6674 let expr1_0: u8 = 0; 6675 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6676 return Some(expr2_0); 6677 } 6678 6679 // Generated as internal constructor for term lshr_imm. 6680 pub fn constructor_lshr_imm<C: Context>( 6681 ctx: &mut C, 6682 arg0: Type, 6683 arg1: Reg, 6684 arg2: u8, 6685 ) -> Option<Reg> { 6686 let pattern0_0 = arg0; 6687 let pattern1_0 = arg1; 6688 let pattern2_0 = arg2; 6689 // Rule at src/isa/s390x/inst.isle line 2896. 6690 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6691 let expr1_0 = C::zero_reg(ctx); 6692 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6693 return Some(expr2_0); 6694 } 6695 6696 // Generated as internal constructor for term shiftop_ashr. 6697 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6698 let pattern0_0 = arg0; 6699 if pattern0_0 == I32 { 6700 // Rule at src/isa/s390x/inst.isle line 2903. 6701 let expr0_0 = ShiftOp::AShR32; 6702 return Some(expr0_0); 6703 } 6704 if pattern0_0 == I64 { 6705 // Rule at src/isa/s390x/inst.isle line 2904. 6706 let expr0_0 = ShiftOp::AShR64; 6707 return Some(expr0_0); 6708 } 6709 return None; 6710 } 6711 6712 // Generated as internal constructor for term ashr_reg. 6713 pub fn constructor_ashr_reg<C: Context>( 6714 ctx: &mut C, 6715 arg0: Type, 6716 arg1: Reg, 6717 arg2: Reg, 6718 ) -> Option<Reg> { 6719 let pattern0_0 = arg0; 6720 let pattern1_0 = arg1; 6721 let pattern2_0 = arg2; 6722 // Rule at src/isa/s390x/inst.isle line 2907. 6723 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6724 let expr1_0: u8 = 0; 6725 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6726 return Some(expr2_0); 6727 } 6728 6729 // Generated as internal constructor for term ashr_imm. 6730 pub fn constructor_ashr_imm<C: Context>( 6731 ctx: &mut C, 6732 arg0: Type, 6733 arg1: Reg, 6734 arg2: u8, 6735 ) -> Option<Reg> { 6736 let pattern0_0 = arg0; 6737 let pattern1_0 = arg1; 6738 let pattern2_0 = arg2; 6739 // Rule at src/isa/s390x/inst.isle line 2911. 6740 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6741 let expr1_0 = C::zero_reg(ctx); 6742 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6743 return Some(expr2_0); 6744 } 6745 6746 // Generated as internal constructor for term popcnt_byte. 6747 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6748 let pattern0_0 = arg0; 6749 // Rule at src/isa/s390x/inst.isle line 2918. 6750 let expr0_0: Type = I64; 6751 let expr1_0 = UnaryOp::PopcntByte; 6752 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6753 return Some(expr2_0); 6754 } 6755 6756 // Generated as internal constructor for term popcnt_reg. 6757 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6758 let pattern0_0 = arg0; 6759 // Rule at src/isa/s390x/inst.isle line 2921. 6760 let expr0_0: Type = I64; 6761 let expr1_0 = UnaryOp::PopcntReg; 6762 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6763 return Some(expr2_0); 6764 } 6765 6766 // Generated as internal constructor for term atomic_rmw_and. 6767 pub fn constructor_atomic_rmw_and<C: Context>( 6768 ctx: &mut C, 6769 arg0: Type, 6770 arg1: Reg, 6771 arg2: &MemArg, 6772 ) -> Option<Reg> { 6773 let pattern0_0 = arg0; 6774 if pattern0_0 == I32 { 6775 let pattern2_0 = arg1; 6776 let pattern3_0 = arg2; 6777 // Rule at src/isa/s390x/inst.isle line 2927. 6778 let expr0_0: Type = I32; 6779 let expr1_0 = ALUOp::And32; 6780 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6781 return Some(expr2_0); 6782 } 6783 if pattern0_0 == I64 { 6784 let pattern2_0 = arg1; 6785 let pattern3_0 = arg2; 6786 // Rule at src/isa/s390x/inst.isle line 2928. 6787 let expr0_0: Type = I64; 6788 let expr1_0 = ALUOp::And64; 6789 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6790 return Some(expr2_0); 6791 } 6792 return None; 6793 } 6794 6795 // Generated as internal constructor for term atomic_rmw_or. 6796 pub fn constructor_atomic_rmw_or<C: Context>( 6797 ctx: &mut C, 6798 arg0: Type, 6799 arg1: Reg, 6800 arg2: &MemArg, 6801 ) -> Option<Reg> { 6802 let pattern0_0 = arg0; 6803 if pattern0_0 == I32 { 6804 let pattern2_0 = arg1; 6805 let pattern3_0 = arg2; 6806 // Rule at src/isa/s390x/inst.isle line 2931. 6807 let expr0_0: Type = I32; 6808 let expr1_0 = ALUOp::Orr32; 6809 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6810 return Some(expr2_0); 6811 } 6812 if pattern0_0 == I64 { 6813 let pattern2_0 = arg1; 6814 let pattern3_0 = arg2; 6815 // Rule at src/isa/s390x/inst.isle line 2932. 6816 let expr0_0: Type = I64; 6817 let expr1_0 = ALUOp::Orr64; 6818 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6819 return Some(expr2_0); 6820 } 6821 return None; 6822 } 6823 6824 // Generated as internal constructor for term atomic_rmw_xor. 6825 pub fn constructor_atomic_rmw_xor<C: Context>( 6826 ctx: &mut C, 6827 arg0: Type, 6828 arg1: Reg, 6829 arg2: &MemArg, 6830 ) -> Option<Reg> { 6831 let pattern0_0 = arg0; 6832 if pattern0_0 == I32 { 6833 let pattern2_0 = arg1; 6834 let pattern3_0 = arg2; 6835 // Rule at src/isa/s390x/inst.isle line 2935. 6836 let expr0_0: Type = I32; 6837 let expr1_0 = ALUOp::Xor32; 6838 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6839 return Some(expr2_0); 6840 } 6841 if pattern0_0 == I64 { 6842 let pattern2_0 = arg1; 6843 let pattern3_0 = arg2; 6844 // Rule at src/isa/s390x/inst.isle line 2936. 6845 let expr0_0: Type = I64; 6846 let expr1_0 = ALUOp::Xor64; 6847 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6848 return Some(expr2_0); 6849 } 6850 return None; 6851 } 6852 6853 // Generated as internal constructor for term atomic_rmw_add. 6854 pub fn constructor_atomic_rmw_add<C: Context>( 6855 ctx: &mut C, 6856 arg0: Type, 6857 arg1: Reg, 6858 arg2: &MemArg, 6859 ) -> Option<Reg> { 6860 let pattern0_0 = arg0; 6861 if pattern0_0 == I32 { 6862 let pattern2_0 = arg1; 6863 let pattern3_0 = arg2; 6864 // Rule at src/isa/s390x/inst.isle line 2939. 6865 let expr0_0: Type = I32; 6866 let expr1_0 = ALUOp::Add32; 6867 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6868 return Some(expr2_0); 6869 } 6870 if pattern0_0 == I64 { 6871 let pattern2_0 = arg1; 6872 let pattern3_0 = arg2; 6873 // Rule at src/isa/s390x/inst.isle line 2940. 6874 let expr0_0: Type = I64; 6875 let expr1_0 = ALUOp::Add64; 6876 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6877 return Some(expr2_0); 6878 } 6879 return None; 6880 } 6881 6882 // Generated as internal constructor for term atomic_cas_impl. 6883 pub fn constructor_atomic_cas_impl<C: Context>( 6884 ctx: &mut C, 6885 arg0: Type, 6886 arg1: Reg, 6887 arg2: Reg, 6888 arg3: &MemArg, 6889 ) -> Option<Reg> { 6890 let pattern0_0 = arg0; 6891 if pattern0_0 == I32 { 6892 let pattern2_0 = arg1; 6893 let pattern3_0 = arg2; 6894 let pattern4_0 = arg3; 6895 // Rule at src/isa/s390x/inst.isle line 2946. 6896 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6897 return Some(expr0_0); 6898 } 6899 if pattern0_0 == I64 { 6900 let pattern2_0 = arg1; 6901 let pattern3_0 = arg2; 6902 let pattern4_0 = arg3; 6903 // Rule at src/isa/s390x/inst.isle line 2947. 6904 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6905 return Some(expr0_0); 6906 } 6907 return None; 6908 } 6909 6910 // Generated as internal constructor for term push_atomic_cas. 6911 pub fn constructor_push_atomic_cas<C: Context>( 6912 ctx: &mut C, 6913 arg0: &VecMInstBuilder, 6914 arg1: Type, 6915 arg2: WritableReg, 6916 arg3: Reg, 6917 arg4: &MemArg, 6918 ) -> Option<Reg> { 6919 let pattern0_0 = arg0; 6920 let pattern1_0 = arg1; 6921 if pattern1_0 == I32 { 6922 let pattern3_0 = arg2; 6923 let pattern4_0 = arg3; 6924 let pattern5_0 = arg4; 6925 // Rule at src/isa/s390x/inst.isle line 2950. 6926 let expr0_0 = 6927 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6928 return Some(expr0_0); 6929 } 6930 if pattern1_0 == I64 { 6931 let pattern3_0 = arg2; 6932 let pattern4_0 = arg3; 6933 let pattern5_0 = arg4; 6934 // Rule at src/isa/s390x/inst.isle line 2951. 6935 let expr0_0 = 6936 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6937 return Some(expr0_0); 6938 } 6939 return None; 6940 } 6941 6942 // Generated as internal constructor for term fpuop2_add. 6943 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6944 let pattern0_0 = arg0; 6945 if pattern0_0 == F32 { 6946 // Rule at src/isa/s390x/inst.isle line 2957. 6947 let expr0_0 = FPUOp2::Add32; 6948 return Some(expr0_0); 6949 } 6950 if pattern0_0 == F64 { 6951 // Rule at src/isa/s390x/inst.isle line 2958. 6952 let expr0_0 = FPUOp2::Add64; 6953 return Some(expr0_0); 6954 } 6955 return None; 6956 } 6957 6958 // Generated as internal constructor for term fadd_reg. 6959 pub fn constructor_fadd_reg<C: Context>( 6960 ctx: &mut C, 6961 arg0: Type, 6962 arg1: Reg, 6963 arg2: Reg, 6964 ) -> Option<Reg> { 6965 let pattern0_0 = arg0; 6966 let pattern1_0 = arg1; 6967 let pattern2_0 = arg2; 6968 // Rule at src/isa/s390x/inst.isle line 2961. 6969 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6970 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6971 return Some(expr1_0); 6972 } 6973 6974 // Generated as internal constructor for term fpuop2_sub. 6975 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6976 let pattern0_0 = arg0; 6977 if pattern0_0 == F32 { 6978 // Rule at src/isa/s390x/inst.isle line 2967. 6979 let expr0_0 = FPUOp2::Sub32; 6980 return Some(expr0_0); 6981 } 6982 if pattern0_0 == F64 { 6983 // Rule at src/isa/s390x/inst.isle line 2968. 6984 let expr0_0 = FPUOp2::Sub64; 6985 return Some(expr0_0); 6986 } 6987 return None; 6988 } 6989 6990 // Generated as internal constructor for term fsub_reg. 6991 pub fn constructor_fsub_reg<C: Context>( 6992 ctx: &mut C, 6993 arg0: Type, 6994 arg1: Reg, 6995 arg2: Reg, 6996 ) -> Option<Reg> { 6997 let pattern0_0 = arg0; 6998 let pattern1_0 = arg1; 6999 let pattern2_0 = arg2; 7000 // Rule at src/isa/s390x/inst.isle line 2971. 7001 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7002 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7003 return Some(expr1_0); 7004 } 7005 7006 // Generated as internal constructor for term fpuop2_mul. 7007 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7008 let pattern0_0 = arg0; 7009 if pattern0_0 == F32 { 7010 // Rule at src/isa/s390x/inst.isle line 2977. 7011 let expr0_0 = FPUOp2::Mul32; 7012 return Some(expr0_0); 7013 } 7014 if pattern0_0 == F64 { 7015 // Rule at src/isa/s390x/inst.isle line 2978. 7016 let expr0_0 = FPUOp2::Mul64; 7017 return Some(expr0_0); 7018 } 7019 return None; 7020 } 7021 7022 // Generated as internal constructor for term fmul_reg. 7023 pub fn constructor_fmul_reg<C: Context>( 7024 ctx: &mut C, 7025 arg0: Type, 7026 arg1: Reg, 7027 arg2: Reg, 7028 ) -> Option<Reg> { 7029 let pattern0_0 = arg0; 7030 let pattern1_0 = arg1; 7031 let pattern2_0 = arg2; 7032 // Rule at src/isa/s390x/inst.isle line 2981. 7033 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7034 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7035 return Some(expr1_0); 7036 } 7037 7038 // Generated as internal constructor for term fpuop2_div. 7039 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7040 let pattern0_0 = arg0; 7041 if pattern0_0 == F32 { 7042 // Rule at src/isa/s390x/inst.isle line 2987. 7043 let expr0_0 = FPUOp2::Div32; 7044 return Some(expr0_0); 7045 } 7046 if pattern0_0 == F64 { 7047 // Rule at src/isa/s390x/inst.isle line 2988. 7048 let expr0_0 = FPUOp2::Div64; 7049 return Some(expr0_0); 7050 } 7051 return None; 7052 } 7053 7054 // Generated as internal constructor for term fdiv_reg. 7055 pub fn constructor_fdiv_reg<C: Context>( 7056 ctx: &mut C, 7057 arg0: Type, 7058 arg1: Reg, 7059 arg2: Reg, 7060 ) -> Option<Reg> { 7061 let pattern0_0 = arg0; 7062 let pattern1_0 = arg1; 7063 let pattern2_0 = arg2; 7064 // Rule at src/isa/s390x/inst.isle line 2991. 7065 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7066 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7067 return Some(expr1_0); 7068 } 7069 7070 // Generated as internal constructor for term fpuop2_min. 7071 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7072 let pattern0_0 = arg0; 7073 if pattern0_0 == F32 { 7074 // Rule at src/isa/s390x/inst.isle line 2997. 7075 let expr0_0 = FPUOp2::Min32; 7076 return Some(expr0_0); 7077 } 7078 if pattern0_0 == F64 { 7079 // Rule at src/isa/s390x/inst.isle line 2998. 7080 let expr0_0 = FPUOp2::Min64; 7081 return Some(expr0_0); 7082 } 7083 return None; 7084 } 7085 7086 // Generated as internal constructor for term fmin_reg. 7087 pub fn constructor_fmin_reg<C: Context>( 7088 ctx: &mut C, 7089 arg0: Type, 7090 arg1: Reg, 7091 arg2: Reg, 7092 ) -> Option<Reg> { 7093 let pattern0_0 = arg0; 7094 let pattern1_0 = arg1; 7095 let pattern2_0 = arg2; 7096 // Rule at src/isa/s390x/inst.isle line 3001. 7097 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7098 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7099 return Some(expr1_0); 7100 } 7101 7102 // Generated as internal constructor for term fpuop2_max. 7103 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7104 let pattern0_0 = arg0; 7105 if pattern0_0 == F32 { 7106 // Rule at src/isa/s390x/inst.isle line 3007. 7107 let expr0_0 = FPUOp2::Max32; 7108 return Some(expr0_0); 7109 } 7110 if pattern0_0 == F64 { 7111 // Rule at src/isa/s390x/inst.isle line 3008. 7112 let expr0_0 = FPUOp2::Max64; 7113 return Some(expr0_0); 7114 } 7115 return None; 7116 } 7117 7118 // Generated as internal constructor for term fmax_reg. 7119 pub fn constructor_fmax_reg<C: Context>( 7120 ctx: &mut C, 7121 arg0: Type, 7122 arg1: Reg, 7123 arg2: Reg, 7124 ) -> Option<Reg> { 7125 let pattern0_0 = arg0; 7126 let pattern1_0 = arg1; 7127 let pattern2_0 = arg2; 7128 // Rule at src/isa/s390x/inst.isle line 3011. 7129 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7130 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7131 return Some(expr1_0); 7132 } 7133 7134 // Generated as internal constructor for term fpuop3_fma. 7135 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7136 let pattern0_0 = arg0; 7137 if pattern0_0 == F32 { 7138 // Rule at src/isa/s390x/inst.isle line 3017. 7139 let expr0_0 = FPUOp3::MAdd32; 7140 return Some(expr0_0); 7141 } 7142 if pattern0_0 == F64 { 7143 // Rule at src/isa/s390x/inst.isle line 3018. 7144 let expr0_0 = FPUOp3::MAdd64; 7145 return Some(expr0_0); 7146 } 7147 return None; 7148 } 7149 7150 // Generated as internal constructor for term fma_reg. 7151 pub fn constructor_fma_reg<C: Context>( 7152 ctx: &mut C, 7153 arg0: Type, 7154 arg1: Reg, 7155 arg2: Reg, 7156 arg3: Reg, 7157 ) -> Option<Reg> { 7158 let pattern0_0 = arg0; 7159 let pattern1_0 = arg1; 7160 let pattern2_0 = arg2; 7161 let pattern3_0 = arg3; 7162 // Rule at src/isa/s390x/inst.isle line 3021. 7163 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7164 let expr1_0 = constructor_fpu_rrrr( 7165 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7166 )?; 7167 return Some(expr1_0); 7168 } 7169 7170 // Generated as internal constructor for term fpuop1_sqrt. 7171 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7172 let pattern0_0 = arg0; 7173 if pattern0_0 == F32 { 7174 // Rule at src/isa/s390x/inst.isle line 3027. 7175 let expr0_0 = FPUOp1::Sqrt32; 7176 return Some(expr0_0); 7177 } 7178 if pattern0_0 == F64 { 7179 // Rule at src/isa/s390x/inst.isle line 3028. 7180 let expr0_0 = FPUOp1::Sqrt64; 7181 return Some(expr0_0); 7182 } 7183 return None; 7184 } 7185 7186 // Generated as internal constructor for term sqrt_reg. 7187 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7188 let pattern0_0 = arg0; 7189 let pattern1_0 = arg1; 7190 // Rule at src/isa/s390x/inst.isle line 3031. 7191 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7192 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7193 return Some(expr1_0); 7194 } 7195 7196 // Generated as internal constructor for term fpuop1_neg. 7197 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7198 let pattern0_0 = arg0; 7199 if pattern0_0 == F32 { 7200 // Rule at src/isa/s390x/inst.isle line 3037. 7201 let expr0_0 = FPUOp1::Neg32; 7202 return Some(expr0_0); 7203 } 7204 if pattern0_0 == F64 { 7205 // Rule at src/isa/s390x/inst.isle line 3038. 7206 let expr0_0 = FPUOp1::Neg64; 7207 return Some(expr0_0); 7208 } 7209 return None; 7210 } 7211 7212 // Generated as internal constructor for term fneg_reg. 7213 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7214 let pattern0_0 = arg0; 7215 let pattern1_0 = arg1; 7216 // Rule at src/isa/s390x/inst.isle line 3041. 7217 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7218 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7219 return Some(expr1_0); 7220 } 7221 7222 // Generated as internal constructor for term fpuop1_abs. 7223 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7224 let pattern0_0 = arg0; 7225 if pattern0_0 == F32 { 7226 // Rule at src/isa/s390x/inst.isle line 3047. 7227 let expr0_0 = FPUOp1::Abs32; 7228 return Some(expr0_0); 7229 } 7230 if pattern0_0 == F64 { 7231 // Rule at src/isa/s390x/inst.isle line 3048. 7232 let expr0_0 = FPUOp1::Abs64; 7233 return Some(expr0_0); 7234 } 7235 return None; 7236 } 7237 7238 // Generated as internal constructor for term fabs_reg. 7239 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7240 let pattern0_0 = arg0; 7241 let pattern1_0 = arg1; 7242 // Rule at src/isa/s390x/inst.isle line 3051. 7243 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7244 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7245 return Some(expr1_0); 7246 } 7247 7248 // Generated as internal constructor for term fpuroundmode_ceil. 7249 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7250 let pattern0_0 = arg0; 7251 if pattern0_0 == F32 { 7252 // Rule at src/isa/s390x/inst.isle line 3057. 7253 let expr0_0 = FpuRoundMode::Plus32; 7254 return Some(expr0_0); 7255 } 7256 if pattern0_0 == F64 { 7257 // Rule at src/isa/s390x/inst.isle line 3058. 7258 let expr0_0 = FpuRoundMode::Plus64; 7259 return Some(expr0_0); 7260 } 7261 return None; 7262 } 7263 7264 // Generated as internal constructor for term ceil_reg. 7265 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7266 let pattern0_0 = arg0; 7267 let pattern1_0 = arg1; 7268 // Rule at src/isa/s390x/inst.isle line 3061. 7269 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7270 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7271 return Some(expr1_0); 7272 } 7273 7274 // Generated as internal constructor for term fpuroundmode_floor. 7275 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7276 let pattern0_0 = arg0; 7277 if pattern0_0 == F32 { 7278 // Rule at src/isa/s390x/inst.isle line 3067. 7279 let expr0_0 = FpuRoundMode::Minus32; 7280 return Some(expr0_0); 7281 } 7282 if pattern0_0 == F64 { 7283 // Rule at src/isa/s390x/inst.isle line 3068. 7284 let expr0_0 = FpuRoundMode::Minus64; 7285 return Some(expr0_0); 7286 } 7287 return None; 7288 } 7289 7290 // Generated as internal constructor for term floor_reg. 7291 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7292 let pattern0_0 = arg0; 7293 let pattern1_0 = arg1; 7294 // Rule at src/isa/s390x/inst.isle line 3071. 7295 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7296 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7297 return Some(expr1_0); 7298 } 7299 7300 // Generated as internal constructor for term fpuroundmode_trunc. 7301 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7302 let pattern0_0 = arg0; 7303 if pattern0_0 == F32 { 7304 // Rule at src/isa/s390x/inst.isle line 3077. 7305 let expr0_0 = FpuRoundMode::Zero32; 7306 return Some(expr0_0); 7307 } 7308 if pattern0_0 == F64 { 7309 // Rule at src/isa/s390x/inst.isle line 3078. 7310 let expr0_0 = FpuRoundMode::Zero64; 7311 return Some(expr0_0); 7312 } 7313 return None; 7314 } 7315 7316 // Generated as internal constructor for term trunc_reg. 7317 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7318 let pattern0_0 = arg0; 7319 let pattern1_0 = arg1; 7320 // Rule at src/isa/s390x/inst.isle line 3081. 7321 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7322 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7323 return Some(expr1_0); 7324 } 7325 7326 // Generated as internal constructor for term fpuroundmode_nearest. 7327 pub fn constructor_fpuroundmode_nearest<C: Context>( 7328 ctx: &mut C, 7329 arg0: Type, 7330 ) -> Option<FpuRoundMode> { 7331 let pattern0_0 = arg0; 7332 if pattern0_0 == F32 { 7333 // Rule at src/isa/s390x/inst.isle line 3087. 7334 let expr0_0 = FpuRoundMode::Nearest32; 7335 return Some(expr0_0); 7336 } 7337 if pattern0_0 == F64 { 7338 // Rule at src/isa/s390x/inst.isle line 3088. 7339 let expr0_0 = FpuRoundMode::Nearest64; 7340 return Some(expr0_0); 7341 } 7342 return None; 7343 } 7344 7345 // Generated as internal constructor for term nearest_reg. 7346 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7347 let pattern0_0 = arg0; 7348 let pattern1_0 = arg1; 7349 // Rule at src/isa/s390x/inst.isle line 3091. 7350 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7351 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7352 return Some(expr1_0); 7353 } 7354 7355 // Generated as internal constructor for term fpuop1_promote. 7356 pub fn constructor_fpuop1_promote<C: Context>( 7357 ctx: &mut C, 7358 arg0: Type, 7359 arg1: Type, 7360 ) -> Option<FPUOp1> { 7361 let pattern0_0 = arg0; 7362 if pattern0_0 == F64 { 7363 let pattern2_0 = arg1; 7364 if pattern2_0 == F32 { 7365 // Rule at src/isa/s390x/inst.isle line 3097. 7366 let expr0_0 = FPUOp1::Cvt32To64; 7367 return Some(expr0_0); 7368 } 7369 } 7370 return None; 7371 } 7372 7373 // Generated as internal constructor for term fpromote_reg. 7374 pub fn constructor_fpromote_reg<C: Context>( 7375 ctx: &mut C, 7376 arg0: Type, 7377 arg1: Type, 7378 arg2: Reg, 7379 ) -> Option<Reg> { 7380 let pattern0_0 = arg0; 7381 let pattern1_0 = arg1; 7382 let pattern2_0 = arg2; 7383 // Rule at src/isa/s390x/inst.isle line 3100. 7384 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7385 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7386 return Some(expr1_0); 7387 } 7388 7389 // Generated as internal constructor for term fpuop1_demote. 7390 pub fn constructor_fpuop1_demote<C: Context>( 7391 ctx: &mut C, 7392 arg0: Type, 7393 arg1: Type, 7394 ) -> Option<FPUOp1> { 7395 let pattern0_0 = arg0; 7396 if pattern0_0 == F32 { 7397 let pattern2_0 = arg1; 7398 if pattern2_0 == F64 { 7399 // Rule at src/isa/s390x/inst.isle line 3107. 7400 let expr0_0 = FPUOp1::Cvt64To32; 7401 return Some(expr0_0); 7402 } 7403 } 7404 return None; 7405 } 7406 7407 // Generated as internal constructor for term fdemote_reg. 7408 pub fn constructor_fdemote_reg<C: Context>( 7409 ctx: &mut C, 7410 arg0: Type, 7411 arg1: Type, 7412 arg2: Reg, 7413 ) -> Option<Reg> { 7414 let pattern0_0 = arg0; 7415 let pattern1_0 = arg1; 7416 let pattern2_0 = arg2; 7417 // Rule at src/isa/s390x/inst.isle line 3110. 7418 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7419 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7420 return Some(expr1_0); 7421 } 7422 7423 // Generated as internal constructor for term uint_to_fpu_op. 7424 pub fn constructor_uint_to_fpu_op<C: Context>( 7425 ctx: &mut C, 7426 arg0: Type, 7427 arg1: Type, 7428 ) -> Option<IntToFpuOp> { 7429 let pattern0_0 = arg0; 7430 if pattern0_0 == F32 { 7431 let pattern2_0 = arg1; 7432 if pattern2_0 == I32 { 7433 // Rule at src/isa/s390x/inst.isle line 3117. 7434 let expr0_0 = IntToFpuOp::U32ToF32; 7435 return Some(expr0_0); 7436 } 7437 if pattern2_0 == I64 { 7438 // Rule at src/isa/s390x/inst.isle line 3119. 7439 let expr0_0 = IntToFpuOp::U64ToF32; 7440 return Some(expr0_0); 7441 } 7442 } 7443 if pattern0_0 == F64 { 7444 let pattern2_0 = arg1; 7445 if pattern2_0 == I32 { 7446 // Rule at src/isa/s390x/inst.isle line 3118. 7447 let expr0_0 = IntToFpuOp::U32ToF64; 7448 return Some(expr0_0); 7449 } 7450 if pattern2_0 == I64 { 7451 // Rule at src/isa/s390x/inst.isle line 3120. 7452 let expr0_0 = IntToFpuOp::U64ToF64; 7453 return Some(expr0_0); 7454 } 7455 } 7456 return None; 7457 } 7458 7459 // Generated as internal constructor for term fcvt_from_uint_reg. 7460 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7461 ctx: &mut C, 7462 arg0: Type, 7463 arg1: Type, 7464 arg2: Reg, 7465 ) -> Option<Reg> { 7466 let pattern0_0 = arg0; 7467 let pattern1_0 = arg1; 7468 let pattern2_0 = arg2; 7469 // Rule at src/isa/s390x/inst.isle line 3123. 7470 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7471 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7472 return Some(expr1_0); 7473 } 7474 7475 // Generated as internal constructor for term sint_to_fpu_op. 7476 pub fn constructor_sint_to_fpu_op<C: Context>( 7477 ctx: &mut C, 7478 arg0: Type, 7479 arg1: Type, 7480 ) -> Option<IntToFpuOp> { 7481 let pattern0_0 = arg0; 7482 if pattern0_0 == F32 { 7483 let pattern2_0 = arg1; 7484 if pattern2_0 == I32 { 7485 // Rule at src/isa/s390x/inst.isle line 3130. 7486 let expr0_0 = IntToFpuOp::I32ToF32; 7487 return Some(expr0_0); 7488 } 7489 if pattern2_0 == I64 { 7490 // Rule at src/isa/s390x/inst.isle line 3132. 7491 let expr0_0 = IntToFpuOp::I64ToF32; 7492 return Some(expr0_0); 7493 } 7494 } 7495 if pattern0_0 == F64 { 7496 let pattern2_0 = arg1; 7497 if pattern2_0 == I32 { 7498 // Rule at src/isa/s390x/inst.isle line 3131. 7499 let expr0_0 = IntToFpuOp::I32ToF64; 7500 return Some(expr0_0); 7501 } 7502 if pattern2_0 == I64 { 7503 // Rule at src/isa/s390x/inst.isle line 3133. 7504 let expr0_0 = IntToFpuOp::I64ToF64; 7505 return Some(expr0_0); 7506 } 7507 } 7508 return None; 7509 } 7510 7511 // Generated as internal constructor for term fcvt_from_sint_reg. 7512 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7513 ctx: &mut C, 7514 arg0: Type, 7515 arg1: Type, 7516 arg2: Reg, 7517 ) -> Option<Reg> { 7518 let pattern0_0 = arg0; 7519 let pattern1_0 = arg1; 7520 let pattern2_0 = arg2; 7521 // Rule at src/isa/s390x/inst.isle line 3136. 7522 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7523 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7524 return Some(expr1_0); 7525 } 7526 7527 // Generated as internal constructor for term fpu_to_uint_op. 7528 pub fn constructor_fpu_to_uint_op<C: Context>( 7529 ctx: &mut C, 7530 arg0: Type, 7531 arg1: Type, 7532 ) -> Option<FpuToIntOp> { 7533 let pattern0_0 = arg0; 7534 if pattern0_0 == I32 { 7535 let pattern2_0 = arg1; 7536 if pattern2_0 == F32 { 7537 // Rule at src/isa/s390x/inst.isle line 3143. 7538 let expr0_0 = FpuToIntOp::F32ToU32; 7539 return Some(expr0_0); 7540 } 7541 if pattern2_0 == F64 { 7542 // Rule at src/isa/s390x/inst.isle line 3144. 7543 let expr0_0 = FpuToIntOp::F64ToU32; 7544 return Some(expr0_0); 7545 } 7546 } 7547 if pattern0_0 == I64 { 7548 let pattern2_0 = arg1; 7549 if pattern2_0 == F32 { 7550 // Rule at src/isa/s390x/inst.isle line 3145. 7551 let expr0_0 = FpuToIntOp::F32ToU64; 7552 return Some(expr0_0); 7553 } 7554 if pattern2_0 == F64 { 7555 // Rule at src/isa/s390x/inst.isle line 3146. 7556 let expr0_0 = FpuToIntOp::F64ToU64; 7557 return Some(expr0_0); 7558 } 7559 } 7560 return None; 7561 } 7562 7563 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7564 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7565 ctx: &mut C, 7566 arg0: Type, 7567 arg1: Type, 7568 arg2: Reg, 7569 ) -> Option<ProducesFlags> { 7570 let pattern0_0 = arg0; 7571 let pattern1_0 = arg1; 7572 let pattern2_0 = arg2; 7573 // Rule at src/isa/s390x/inst.isle line 3149. 7574 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7575 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7576 return Some(expr1_0); 7577 } 7578 7579 // Generated as internal constructor for term fcvt_to_uint_reg. 7580 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7581 ctx: &mut C, 7582 arg0: Type, 7583 arg1: Type, 7584 arg2: Reg, 7585 ) -> Option<Reg> { 7586 let pattern0_0 = arg0; 7587 let pattern1_0 = arg1; 7588 let pattern2_0 = arg2; 7589 // Rule at src/isa/s390x/inst.isle line 3153. 7590 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7591 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7592 return Some(expr1_0); 7593 } 7594 7595 // Generated as internal constructor for term fpu_to_sint_op. 7596 pub fn constructor_fpu_to_sint_op<C: Context>( 7597 ctx: &mut C, 7598 arg0: Type, 7599 arg1: Type, 7600 ) -> Option<FpuToIntOp> { 7601 let pattern0_0 = arg0; 7602 if pattern0_0 == I32 { 7603 let pattern2_0 = arg1; 7604 if pattern2_0 == F32 { 7605 // Rule at src/isa/s390x/inst.isle line 3160. 7606 let expr0_0 = FpuToIntOp::F32ToI32; 7607 return Some(expr0_0); 7608 } 7609 if pattern2_0 == F64 { 7610 // Rule at src/isa/s390x/inst.isle line 3161. 7611 let expr0_0 = FpuToIntOp::F64ToI32; 7612 return Some(expr0_0); 7613 } 7614 } 7615 if pattern0_0 == I64 { 7616 let pattern2_0 = arg1; 7617 if pattern2_0 == F32 { 7618 // Rule at src/isa/s390x/inst.isle line 3162. 7619 let expr0_0 = FpuToIntOp::F32ToI64; 7620 return Some(expr0_0); 7621 } 7622 if pattern2_0 == F64 { 7623 // Rule at src/isa/s390x/inst.isle line 3163. 7624 let expr0_0 = FpuToIntOp::F64ToI64; 7625 return Some(expr0_0); 7626 } 7627 } 7628 return None; 7629 } 7630 7631 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7632 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7633 ctx: &mut C, 7634 arg0: Type, 7635 arg1: Type, 7636 arg2: Reg, 7637 ) -> Option<ProducesFlags> { 7638 let pattern0_0 = arg0; 7639 let pattern1_0 = arg1; 7640 let pattern2_0 = arg2; 7641 // Rule at src/isa/s390x/inst.isle line 3166. 7642 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7643 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7644 return Some(expr1_0); 7645 } 7646 7647 // Generated as internal constructor for term fcvt_to_sint_reg. 7648 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7649 ctx: &mut C, 7650 arg0: Type, 7651 arg1: Type, 7652 arg2: Reg, 7653 ) -> Option<Reg> { 7654 let pattern0_0 = arg0; 7655 let pattern1_0 = arg1; 7656 let pattern2_0 = arg2; 7657 // Rule at src/isa/s390x/inst.isle line 3170. 7658 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7659 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7660 return Some(expr1_0); 7661 } 7662 7663 // Generated as internal constructor for term cmpop_cmps. 7664 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7665 let pattern0_0 = arg0; 7666 if pattern0_0 == I32 { 7667 // Rule at src/isa/s390x/inst.isle line 3177. 7668 let expr0_0 = CmpOp::CmpS32; 7669 return Some(expr0_0); 7670 } 7671 if pattern0_0 == I64 { 7672 // Rule at src/isa/s390x/inst.isle line 3178. 7673 let expr0_0 = CmpOp::CmpS64; 7674 return Some(expr0_0); 7675 } 7676 return None; 7677 } 7678 7679 // Generated as internal constructor for term cmpop_cmps_sext16. 7680 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7681 let pattern0_0 = arg0; 7682 if pattern0_0 == I32 { 7683 // Rule at src/isa/s390x/inst.isle line 3181. 7684 let expr0_0 = CmpOp::CmpS32Ext16; 7685 return Some(expr0_0); 7686 } 7687 if pattern0_0 == I64 { 7688 // Rule at src/isa/s390x/inst.isle line 3182. 7689 let expr0_0 = CmpOp::CmpS64Ext16; 7690 return Some(expr0_0); 7691 } 7692 return None; 7693 } 7694 7695 // Generated as internal constructor for term cmpop_cmps_sext32. 7696 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7697 let pattern0_0 = arg0; 7698 if pattern0_0 == I64 { 7699 // Rule at src/isa/s390x/inst.isle line 3185. 7700 let expr0_0 = CmpOp::CmpS64Ext32; 7701 return Some(expr0_0); 7702 } 7703 return None; 7704 } 7705 7706 // Generated as internal constructor for term icmps_reg. 7707 pub fn constructor_icmps_reg<C: Context>( 7708 ctx: &mut C, 7709 arg0: Type, 7710 arg1: Reg, 7711 arg2: Reg, 7712 ) -> Option<ProducesFlags> { 7713 let pattern0_0 = arg0; 7714 let pattern1_0 = arg1; 7715 let pattern2_0 = arg2; 7716 // Rule at src/isa/s390x/inst.isle line 3188. 7717 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7718 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7719 return Some(expr1_0); 7720 } 7721 7722 // Generated as internal constructor for term icmps_reg_sext32. 7723 pub fn constructor_icmps_reg_sext32<C: Context>( 7724 ctx: &mut C, 7725 arg0: Type, 7726 arg1: Reg, 7727 arg2: Reg, 7728 ) -> Option<ProducesFlags> { 7729 let pattern0_0 = arg0; 7730 let pattern1_0 = arg1; 7731 let pattern2_0 = arg2; 7732 // Rule at src/isa/s390x/inst.isle line 3191. 7733 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7734 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7735 return Some(expr1_0); 7736 } 7737 7738 // Generated as internal constructor for term icmps_simm16. 7739 pub fn constructor_icmps_simm16<C: Context>( 7740 ctx: &mut C, 7741 arg0: Type, 7742 arg1: Reg, 7743 arg2: i16, 7744 ) -> Option<ProducesFlags> { 7745 let pattern0_0 = arg0; 7746 let pattern1_0 = arg1; 7747 let pattern2_0 = arg2; 7748 // Rule at src/isa/s390x/inst.isle line 3194. 7749 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7750 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7751 return Some(expr1_0); 7752 } 7753 7754 // Generated as internal constructor for term icmps_simm32. 7755 pub fn constructor_icmps_simm32<C: Context>( 7756 ctx: &mut C, 7757 arg0: Type, 7758 arg1: Reg, 7759 arg2: i32, 7760 ) -> Option<ProducesFlags> { 7761 let pattern0_0 = arg0; 7762 let pattern1_0 = arg1; 7763 let pattern2_0 = arg2; 7764 // Rule at src/isa/s390x/inst.isle line 3197. 7765 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7766 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7767 return Some(expr1_0); 7768 } 7769 7770 // Generated as internal constructor for term icmps_mem. 7771 pub fn constructor_icmps_mem<C: Context>( 7772 ctx: &mut C, 7773 arg0: Type, 7774 arg1: Reg, 7775 arg2: &MemArg, 7776 ) -> Option<ProducesFlags> { 7777 let pattern0_0 = arg0; 7778 let pattern1_0 = arg1; 7779 let pattern2_0 = arg2; 7780 // Rule at src/isa/s390x/inst.isle line 3200. 7781 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7782 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7783 return Some(expr1_0); 7784 } 7785 7786 // Generated as internal constructor for term icmps_mem_sext16. 7787 pub fn constructor_icmps_mem_sext16<C: Context>( 7788 ctx: &mut C, 7789 arg0: Type, 7790 arg1: Reg, 7791 arg2: &MemArg, 7792 ) -> Option<ProducesFlags> { 7793 let pattern0_0 = arg0; 7794 let pattern1_0 = arg1; 7795 let pattern2_0 = arg2; 7796 // Rule at src/isa/s390x/inst.isle line 3203. 7797 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7798 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7799 return Some(expr1_0); 7800 } 7801 7802 // Generated as internal constructor for term icmps_mem_sext32. 7803 pub fn constructor_icmps_mem_sext32<C: Context>( 7804 ctx: &mut C, 7805 arg0: Type, 7806 arg1: Reg, 7807 arg2: &MemArg, 7808 ) -> Option<ProducesFlags> { 7809 let pattern0_0 = arg0; 7810 let pattern1_0 = arg1; 7811 let pattern2_0 = arg2; 7812 // Rule at src/isa/s390x/inst.isle line 3206. 7813 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7814 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7815 return Some(expr1_0); 7816 } 7817 7818 // Generated as internal constructor for term cmpop_cmpu. 7819 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7820 let pattern0_0 = arg0; 7821 if pattern0_0 == I32 { 7822 // Rule at src/isa/s390x/inst.isle line 3212. 7823 let expr0_0 = CmpOp::CmpL32; 7824 return Some(expr0_0); 7825 } 7826 if pattern0_0 == I64 { 7827 // Rule at src/isa/s390x/inst.isle line 3213. 7828 let expr0_0 = CmpOp::CmpL64; 7829 return Some(expr0_0); 7830 } 7831 return None; 7832 } 7833 7834 // Generated as internal constructor for term cmpop_cmpu_zext16. 7835 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7836 let pattern0_0 = arg0; 7837 if pattern0_0 == I32 { 7838 // Rule at src/isa/s390x/inst.isle line 3216. 7839 let expr0_0 = CmpOp::CmpL32Ext16; 7840 return Some(expr0_0); 7841 } 7842 if pattern0_0 == I64 { 7843 // Rule at src/isa/s390x/inst.isle line 3217. 7844 let expr0_0 = CmpOp::CmpL64Ext16; 7845 return Some(expr0_0); 7846 } 7847 return None; 7848 } 7849 7850 // Generated as internal constructor for term cmpop_cmpu_zext32. 7851 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7852 let pattern0_0 = arg0; 7853 if pattern0_0 == I64 { 7854 // Rule at src/isa/s390x/inst.isle line 3220. 7855 let expr0_0 = CmpOp::CmpL64Ext32; 7856 return Some(expr0_0); 7857 } 7858 return None; 7859 } 7860 7861 // Generated as internal constructor for term icmpu_reg. 7862 pub fn constructor_icmpu_reg<C: Context>( 7863 ctx: &mut C, 7864 arg0: Type, 7865 arg1: Reg, 7866 arg2: Reg, 7867 ) -> Option<ProducesFlags> { 7868 let pattern0_0 = arg0; 7869 let pattern1_0 = arg1; 7870 let pattern2_0 = arg2; 7871 // Rule at src/isa/s390x/inst.isle line 3223. 7872 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7873 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7874 return Some(expr1_0); 7875 } 7876 7877 // Generated as internal constructor for term icmpu_reg_zext32. 7878 pub fn constructor_icmpu_reg_zext32<C: Context>( 7879 ctx: &mut C, 7880 arg0: Type, 7881 arg1: Reg, 7882 arg2: Reg, 7883 ) -> Option<ProducesFlags> { 7884 let pattern0_0 = arg0; 7885 let pattern1_0 = arg1; 7886 let pattern2_0 = arg2; 7887 // Rule at src/isa/s390x/inst.isle line 3226. 7888 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7889 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7890 return Some(expr1_0); 7891 } 7892 7893 // Generated as internal constructor for term icmpu_uimm32. 7894 pub fn constructor_icmpu_uimm32<C: Context>( 7895 ctx: &mut C, 7896 arg0: Type, 7897 arg1: Reg, 7898 arg2: u32, 7899 ) -> Option<ProducesFlags> { 7900 let pattern0_0 = arg0; 7901 let pattern1_0 = arg1; 7902 let pattern2_0 = arg2; 7903 // Rule at src/isa/s390x/inst.isle line 3229. 7904 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7905 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7906 return Some(expr1_0); 7907 } 7908 7909 // Generated as internal constructor for term icmpu_mem. 7910 pub fn constructor_icmpu_mem<C: Context>( 7911 ctx: &mut C, 7912 arg0: Type, 7913 arg1: Reg, 7914 arg2: &MemArg, 7915 ) -> Option<ProducesFlags> { 7916 let pattern0_0 = arg0; 7917 let pattern1_0 = arg1; 7918 let pattern2_0 = arg2; 7919 // Rule at src/isa/s390x/inst.isle line 3232. 7920 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7921 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7922 return Some(expr1_0); 7923 } 7924 7925 // Generated as internal constructor for term icmpu_mem_zext16. 7926 pub fn constructor_icmpu_mem_zext16<C: Context>( 7927 ctx: &mut C, 7928 arg0: Type, 7929 arg1: Reg, 7930 arg2: &MemArg, 7931 ) -> Option<ProducesFlags> { 7932 let pattern0_0 = arg0; 7933 let pattern1_0 = arg1; 7934 let pattern2_0 = arg2; 7935 // Rule at src/isa/s390x/inst.isle line 3235. 7936 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7937 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7938 return Some(expr1_0); 7939 } 7940 7941 // Generated as internal constructor for term icmpu_mem_zext32. 7942 pub fn constructor_icmpu_mem_zext32<C: Context>( 7943 ctx: &mut C, 7944 arg0: Type, 7945 arg1: Reg, 7946 arg2: &MemArg, 7947 ) -> Option<ProducesFlags> { 7948 let pattern0_0 = arg0; 7949 let pattern1_0 = arg1; 7950 let pattern2_0 = arg2; 7951 // Rule at src/isa/s390x/inst.isle line 3238. 7952 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7953 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7954 return Some(expr1_0); 7955 } 7956 7957 // Generated as internal constructor for term fcmp_reg. 7958 pub fn constructor_fcmp_reg<C: Context>( 7959 ctx: &mut C, 7960 arg0: Type, 7961 arg1: Reg, 7962 arg2: Reg, 7963 ) -> Option<ProducesFlags> { 7964 let pattern0_0 = arg0; 7965 if pattern0_0 == F32 { 7966 let pattern2_0 = arg1; 7967 let pattern3_0 = arg2; 7968 // Rule at src/isa/s390x/inst.isle line 3244. 7969 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7970 return Some(expr0_0); 7971 } 7972 if pattern0_0 == F64 { 7973 let pattern2_0 = arg1; 7974 let pattern3_0 = arg2; 7975 // Rule at src/isa/s390x/inst.isle line 3245. 7976 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7977 return Some(expr0_0); 7978 } 7979 return None; 7980 } 7981 7982 // Generated as internal constructor for term lower. 7983 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7984 let pattern0_0 = arg0; 7985 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7986 match &pattern1_0 { 7987 &InstructionData::NullAry { 7988 opcode: ref pattern2_0, 7989 } => { 7990 match pattern2_0 { 7991 &Opcode::Debugtrap => { 7992 // Rule at src/isa/s390x/lower.isle line 2169. 7993 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7994 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7995 return Some(expr1_0); 7996 } 7997 &Opcode::Nop => { 7998 // Rule at src/isa/s390x/lower.isle line 47. 7999 let expr0_0 = C::invalid_reg(ctx); 8000 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8001 return Some(expr1_0); 8002 } 8003 &Opcode::Fence => { 8004 // Rule at src/isa/s390x/lower.isle line 1882. 8005 let expr0_0 = constructor_fence_impl(ctx)?; 8006 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8007 return Some(expr1_0); 8008 } 8009 _ => {} 8010 } 8011 } 8012 &InstructionData::FuncAddr { 8013 opcode: ref pattern2_0, 8014 func_ref: pattern2_1, 8015 } => { 8016 if let &Opcode::FuncAddr = pattern2_0 { 8017 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8018 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8019 // Rule at src/isa/s390x/lower.isle line 1159. 8020 let expr0_0: i32 = 0; 8021 let expr1_0 = C::memflags_trusted(ctx); 8022 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8023 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8024 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8025 return Some(expr4_0); 8026 } 8027 // Rule at src/isa/s390x/lower.isle line 1163. 8028 let expr0_0: i64 = 0; 8029 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8030 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8031 return Some(expr2_0); 8032 } 8033 } 8034 &InstructionData::UnaryGlobalValue { 8035 opcode: ref pattern2_0, 8036 global_value: pattern2_1, 8037 } => { 8038 if let &Opcode::SymbolValue = pattern2_0 { 8039 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8040 C::symbol_value_data(ctx, pattern2_1) 8041 { 8042 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8043 let pattern6_0 = 0; 8044 if let Some(pattern7_0) = 8045 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8046 { 8047 // Rule at src/isa/s390x/lower.isle line 1170. 8048 let expr0_0 = C::memflags_trusted(ctx); 8049 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8050 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8051 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8052 return Some(expr3_0); 8053 } 8054 } 8055 // Rule at src/isa/s390x/lower.isle line 1175. 8056 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8057 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8058 return Some(expr1_0); 8059 } 8060 } 8061 } 8062 &InstructionData::UnaryIeee32 { 8063 opcode: ref pattern2_0, 8064 imm: pattern2_1, 8065 } => { 8066 if let &Opcode::F32const = pattern2_0 { 8067 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8068 // Rule at src/isa/s390x/lower.isle line 29. 8069 let expr0_0: Type = F32; 8070 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8071 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8072 return Some(expr2_0); 8073 } 8074 } 8075 &InstructionData::UnaryIeee64 { 8076 opcode: ref pattern2_0, 8077 imm: pattern2_1, 8078 } => { 8079 if let &Opcode::F64const = pattern2_0 { 8080 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8081 // Rule at src/isa/s390x/lower.isle line 35. 8082 let expr0_0: Type = F64; 8083 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8084 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8085 return Some(expr2_0); 8086 } 8087 } 8088 &InstructionData::Trap { 8089 opcode: ref pattern2_0, 8090 code: ref pattern2_1, 8091 } => { 8092 match pattern2_0 { 8093 &Opcode::Trap => { 8094 // Rule at src/isa/s390x/lower.isle line 2139. 8095 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8096 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8097 return Some(expr1_0); 8098 } 8099 &Opcode::ResumableTrap => { 8100 // Rule at src/isa/s390x/lower.isle line 2145. 8101 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8102 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8103 return Some(expr1_0); 8104 } 8105 _ => {} 8106 } 8107 } 8108 &InstructionData::StoreNoOffset { 8109 opcode: ref pattern2_0, 8110 args: ref pattern2_1, 8111 flags: pattern2_2, 8112 } => { 8113 if let &Opcode::AtomicStore = pattern2_0 { 8114 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8115 let pattern5_0 = C::value_type(ctx, pattern4_0); 8116 if pattern5_0 == I8 { 8117 // Rule at src/isa/s390x/lower.isle line 1863. 8118 let expr0_0 = C::zero_offset(ctx); 8119 let expr1_0 = 8120 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8121 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8122 return Some(expr2_0); 8123 } 8124 if pattern5_0 == I16 { 8125 // Rule at src/isa/s390x/lower.isle line 1867. 8126 let expr0_0 = C::zero_offset(ctx); 8127 let expr1_0 = constructor_istore16_impl( 8128 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8129 )?; 8130 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8131 return Some(expr2_0); 8132 } 8133 if pattern5_0 == I32 { 8134 // Rule at src/isa/s390x/lower.isle line 1871. 8135 let expr0_0 = C::zero_offset(ctx); 8136 let expr1_0 = constructor_istore32_impl( 8137 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8138 )?; 8139 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8140 return Some(expr2_0); 8141 } 8142 if pattern5_0 == I64 { 8143 // Rule at src/isa/s390x/lower.isle line 1875. 8144 let expr0_0 = C::zero_offset(ctx); 8145 let expr1_0 = constructor_istore64_impl( 8146 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8147 )?; 8148 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8149 return Some(expr2_0); 8150 } 8151 } 8152 } 8153 &InstructionData::Store { 8154 opcode: ref pattern2_0, 8155 args: ref pattern2_1, 8156 flags: pattern2_2, 8157 offset: pattern2_3, 8158 } => { 8159 match pattern2_0 { 8160 &Opcode::Store => { 8161 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8162 let pattern5_0 = C::value_type(ctx, pattern4_0); 8163 if pattern5_0 == I8 { 8164 // Rule at src/isa/s390x/lower.isle line 1354. 8165 let expr0_0 = constructor_istore8_impl( 8166 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8167 )?; 8168 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8169 return Some(expr1_0); 8170 } 8171 if pattern5_0 == I16 { 8172 // Rule at src/isa/s390x/lower.isle line 1358. 8173 let expr0_0 = constructor_istore16_impl( 8174 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8175 )?; 8176 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8177 return Some(expr1_0); 8178 } 8179 if pattern5_0 == I32 { 8180 // Rule at src/isa/s390x/lower.isle line 1362. 8181 let expr0_0 = constructor_istore32_impl( 8182 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8183 )?; 8184 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8185 return Some(expr1_0); 8186 } 8187 if pattern5_0 == I64 { 8188 // Rule at src/isa/s390x/lower.isle line 1366. 8189 let expr0_0 = constructor_istore64_impl( 8190 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8191 )?; 8192 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8193 return Some(expr1_0); 8194 } 8195 if pattern5_0 == R64 { 8196 // Rule at src/isa/s390x/lower.isle line 1370. 8197 let expr0_0 = constructor_istore64_impl( 8198 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8199 )?; 8200 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8201 return Some(expr1_0); 8202 } 8203 if pattern5_0 == F32 { 8204 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8205 // Rule at src/isa/s390x/lower.isle line 1374. 8206 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8207 let expr1_0 = 8208 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8209 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8210 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8211 return Some(expr3_0); 8212 } 8213 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8214 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8215 // Rule at src/isa/s390x/lower.isle line 1380. 8216 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8217 let expr1_0 = constructor_lower_address( 8218 ctx, pattern2_2, pattern4_1, pattern2_3, 8219 )?; 8220 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8221 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8222 return Some(expr3_0); 8223 } 8224 } 8225 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8226 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8227 // Rule at src/isa/s390x/lower.isle line 1386. 8228 let expr0_0: Type = I64; 8229 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8230 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8231 let expr3_0: u8 = 32; 8232 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8233 let expr5_0 = constructor_lower_address( 8234 ctx, pattern2_2, pattern4_1, pattern2_3, 8235 )?; 8236 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8237 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8238 return Some(expr7_0); 8239 } 8240 } 8241 } 8242 if pattern5_0 == F64 { 8243 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8244 // Rule at src/isa/s390x/lower.isle line 1392. 8245 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8246 let expr1_0 = 8247 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8248 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8249 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8250 return Some(expr3_0); 8251 } 8252 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8253 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8254 // Rule at src/isa/s390x/lower.isle line 1398. 8255 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8256 let expr1_0 = constructor_lower_address( 8257 ctx, pattern2_2, pattern4_1, pattern2_3, 8258 )?; 8259 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8260 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8261 return Some(expr3_0); 8262 } 8263 } 8264 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8265 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8266 // Rule at src/isa/s390x/lower.isle line 1404. 8267 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8268 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8269 let expr2_0 = constructor_lower_address( 8270 ctx, pattern2_2, pattern4_1, pattern2_3, 8271 )?; 8272 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8273 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8274 return Some(expr4_0); 8275 } 8276 } 8277 } 8278 } 8279 &Opcode::Istore8 => { 8280 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8281 // Rule at src/isa/s390x/lower.isle line 1413. 8282 let expr0_0 = constructor_istore8_impl( 8283 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8284 )?; 8285 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8286 return Some(expr1_0); 8287 } 8288 &Opcode::Istore16 => { 8289 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8290 // Rule at src/isa/s390x/lower.isle line 1431. 8291 let expr0_0 = constructor_istore16_impl( 8292 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8293 )?; 8294 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8295 return Some(expr1_0); 8296 } 8297 &Opcode::Istore32 => { 8298 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8299 // Rule at src/isa/s390x/lower.isle line 1457. 8300 let expr0_0 = constructor_istore32_impl( 8301 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8302 )?; 8303 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8304 return Some(expr1_0); 8305 } 8306 _ => {} 8307 } 8308 } 8309 &InstructionData::Unary { 8310 opcode: ref pattern2_0, 8311 arg: pattern2_1, 8312 } => { 8313 match pattern2_0 { 8314 &Opcode::Copy => { 8315 // Rule at src/isa/s390x/lower.isle line 53. 8316 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8317 return Some(expr0_0); 8318 } 8319 &Opcode::Breduce => { 8320 // Rule at src/isa/s390x/lower.isle line 752. 8321 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8322 return Some(expr0_0); 8323 } 8324 &Opcode::Ireduce => { 8325 // Rule at src/isa/s390x/lower.isle line 596. 8326 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8327 return Some(expr0_0); 8328 } 8329 _ => {} 8330 } 8331 } 8332 &InstructionData::IntCondTrap { 8333 opcode: ref pattern2_0, 8334 arg: pattern2_1, 8335 cond: ref pattern2_2, 8336 code: ref pattern2_3, 8337 } => { 8338 if let &Opcode::Trapif = pattern2_0 { 8339 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8340 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8341 if let &InstructionData::Binary { 8342 opcode: ref pattern6_0, 8343 args: ref pattern6_1, 8344 } = &pattern5_0 8345 { 8346 match pattern6_0 { 8347 &Opcode::Ifcmp => { 8348 let (pattern8_0, pattern8_1) = 8349 C::unpack_value_array_2(ctx, pattern6_1); 8350 // Rule at src/isa/s390x/lower.isle line 2181. 8351 let expr0_0: bool = false; 8352 let expr1_0 = constructor_icmp_val( 8353 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8354 )?; 8355 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8356 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8357 return Some(expr3_0); 8358 } 8359 &Opcode::IaddIfcout => { 8360 let (pattern8_0, pattern8_1) = 8361 C::unpack_value_array_2(ctx, pattern6_1); 8362 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8363 // Rule at src/isa/s390x/lower.isle line 2206. 8364 let expr0_0: u8 = 3; 8365 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8366 let expr2_0 = 8367 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8368 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8369 return Some(expr3_0); 8370 } 8371 } 8372 _ => {} 8373 } 8374 } 8375 } 8376 } 8377 } 8378 &InstructionData::CondTrap { 8379 opcode: ref pattern2_0, 8380 arg: pattern2_1, 8381 code: ref pattern2_2, 8382 } => { 8383 match pattern2_0 { 8384 &Opcode::Trapz => { 8385 // Rule at src/isa/s390x/lower.isle line 2151. 8386 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8387 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8388 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8389 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8390 return Some(expr3_0); 8391 } 8392 &Opcode::Trapnz => { 8393 // Rule at src/isa/s390x/lower.isle line 2157. 8394 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8395 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8396 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8397 return Some(expr2_0); 8398 } 8399 &Opcode::ResumableTrapnz => { 8400 // Rule at src/isa/s390x/lower.isle line 2163. 8401 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8402 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8403 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8404 return Some(expr2_0); 8405 } 8406 _ => {} 8407 } 8408 } 8409 _ => {} 8410 } 8411 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8412 let pattern2_0 = C::value_type(ctx, pattern1_0); 8413 if pattern2_0 == B1 { 8414 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8415 if let &InstructionData::Unary { 8416 opcode: ref pattern5_0, 8417 arg: pattern5_1, 8418 } = &pattern4_0 8419 { 8420 match pattern5_0 { 8421 &Opcode::IsNull => { 8422 let pattern7_0 = C::value_type(ctx, pattern5_1); 8423 if pattern7_0 == R64 { 8424 // Rule at src/isa/s390x/lower.isle line 2017. 8425 let expr0_0: Type = B1; 8426 let expr1_0: Type = I64; 8427 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8428 let expr3_0: i16 = 0; 8429 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8430 let expr5_0 = IntCC::Equal; 8431 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8432 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8433 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8434 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8435 return Some(expr9_0); 8436 } 8437 } 8438 &Opcode::IsInvalid => { 8439 let pattern7_0 = C::value_type(ctx, pattern5_1); 8440 if pattern7_0 == R64 { 8441 // Rule at src/isa/s390x/lower.isle line 2023. 8442 let expr0_0: Type = B1; 8443 let expr1_0: Type = I64; 8444 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8445 let expr3_0: i16 = -1; 8446 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8447 let expr5_0 = IntCC::Equal; 8448 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8449 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8450 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8451 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8452 return Some(expr9_0); 8453 } 8454 } 8455 _ => {} 8456 } 8457 } 8458 } 8459 if pattern2_0 == I8 { 8460 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8461 match &pattern4_0 { 8462 &InstructionData::Unary { 8463 opcode: ref pattern5_0, 8464 arg: pattern5_1, 8465 } => { 8466 if let &Opcode::Popcnt = pattern5_0 { 8467 // Rule at src/isa/s390x/lower.isle line 884. 8468 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8469 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8470 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8471 return Some(expr2_0); 8472 } 8473 } 8474 &InstructionData::LoadNoOffset { 8475 opcode: ref pattern5_0, 8476 arg: pattern5_1, 8477 flags: pattern5_2, 8478 } => { 8479 if let &Opcode::AtomicLoad = pattern5_0 { 8480 // Rule at src/isa/s390x/lower.isle line 1826. 8481 let expr0_0: Type = I8; 8482 let expr1_0 = C::zero_offset(ctx); 8483 let expr2_0 = 8484 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8485 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8486 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8487 return Some(expr4_0); 8488 } 8489 } 8490 &InstructionData::Load { 8491 opcode: ref pattern5_0, 8492 arg: pattern5_1, 8493 flags: pattern5_2, 8494 offset: pattern5_3, 8495 } => { 8496 if let &Opcode::Load = pattern5_0 { 8497 // Rule at src/isa/s390x/lower.isle line 1182. 8498 let expr0_0: Type = I8; 8499 let expr1_0 = 8500 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8501 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8502 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8503 return Some(expr3_0); 8504 } 8505 } 8506 _ => {} 8507 } 8508 } 8509 if pattern2_0 == I16 { 8510 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8511 match &pattern4_0 { 8512 &InstructionData::LoadNoOffset { 8513 opcode: ref pattern5_0, 8514 arg: pattern5_1, 8515 flags: pattern5_2, 8516 } => { 8517 if let &Opcode::AtomicLoad = pattern5_0 { 8518 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8519 // Rule at src/isa/s390x/lower.isle line 1834. 8520 let expr0_0 = C::zero_offset(ctx); 8521 let expr1_0 = 8522 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8523 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8524 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8525 return Some(expr3_0); 8526 } 8527 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8528 // Rule at src/isa/s390x/lower.isle line 1830. 8529 let expr0_0: Type = I16; 8530 let expr1_0 = C::zero_offset(ctx); 8531 let expr2_0 = 8532 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8533 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8534 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8535 return Some(expr4_0); 8536 } 8537 } 8538 } 8539 &InstructionData::Load { 8540 opcode: ref pattern5_0, 8541 arg: pattern5_1, 8542 flags: pattern5_2, 8543 offset: pattern5_3, 8544 } => { 8545 if let &Opcode::Load = pattern5_0 { 8546 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8547 // Rule at src/isa/s390x/lower.isle line 1190. 8548 let expr0_0 = 8549 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8550 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8551 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8552 return Some(expr2_0); 8553 } 8554 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8555 // Rule at src/isa/s390x/lower.isle line 1186. 8556 let expr0_0: Type = I16; 8557 let expr1_0 = 8558 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8559 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8560 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8561 return Some(expr3_0); 8562 } 8563 } 8564 } 8565 _ => {} 8566 } 8567 } 8568 if pattern2_0 == I32 { 8569 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8570 match &pattern4_0 { 8571 &InstructionData::Binary { 8572 opcode: ref pattern5_0, 8573 args: ref pattern5_1, 8574 } => { 8575 match pattern5_0 { 8576 &Opcode::Umulhi => { 8577 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8578 // Rule at src/isa/s390x/lower.isle line 252. 8579 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8580 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8581 let expr2_0: Type = I64; 8582 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8583 let expr4_0: Type = I64; 8584 let expr5_0: u8 = 32; 8585 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8586 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8587 return Some(expr7_0); 8588 } 8589 &Opcode::Smulhi => { 8590 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8591 // Rule at src/isa/s390x/lower.isle line 274. 8592 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8593 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8594 let expr2_0: Type = I64; 8595 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8596 let expr4_0: Type = I64; 8597 let expr5_0: u8 = 32; 8598 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8599 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8600 return Some(expr7_0); 8601 } 8602 _ => {} 8603 } 8604 } 8605 &InstructionData::Unary { 8606 opcode: ref pattern5_0, 8607 arg: pattern5_1, 8608 } => { 8609 if let &Opcode::Bitcast = pattern5_0 { 8610 let pattern7_0 = C::value_type(ctx, pattern5_1); 8611 if pattern7_0 == F32 { 8612 // Rule at src/isa/s390x/lower.isle line 1145. 8613 let expr0_0: Type = I64; 8614 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8615 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8616 let expr3_0: u8 = 32; 8617 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8618 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8619 return Some(expr5_0); 8620 } 8621 } 8622 } 8623 &InstructionData::LoadNoOffset { 8624 opcode: ref pattern5_0, 8625 arg: pattern5_1, 8626 flags: pattern5_2, 8627 } => { 8628 if let &Opcode::AtomicLoad = pattern5_0 { 8629 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8630 // Rule at src/isa/s390x/lower.isle line 1842. 8631 let expr0_0 = C::zero_offset(ctx); 8632 let expr1_0 = 8633 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8634 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8635 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8636 return Some(expr3_0); 8637 } 8638 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8639 // Rule at src/isa/s390x/lower.isle line 1838. 8640 let expr0_0 = C::zero_offset(ctx); 8641 let expr1_0 = 8642 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8643 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8644 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8645 return Some(expr3_0); 8646 } 8647 } 8648 } 8649 &InstructionData::Load { 8650 opcode: ref pattern5_0, 8651 arg: pattern5_1, 8652 flags: pattern5_2, 8653 offset: pattern5_3, 8654 } => { 8655 if let &Opcode::Load = pattern5_0 { 8656 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8657 // Rule at src/isa/s390x/lower.isle line 1198. 8658 let expr0_0 = 8659 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8660 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8661 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8662 return Some(expr2_0); 8663 } 8664 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8665 // Rule at src/isa/s390x/lower.isle line 1194. 8666 let expr0_0 = 8667 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8668 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8669 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8670 return Some(expr2_0); 8671 } 8672 } 8673 } 8674 _ => {} 8675 } 8676 } 8677 if pattern2_0 == I64 { 8678 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8679 match &pattern4_0 { 8680 &InstructionData::Binary { 8681 opcode: ref pattern5_0, 8682 args: ref pattern5_1, 8683 } => { 8684 match pattern5_0 { 8685 &Opcode::Umulhi => { 8686 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8687 // Rule at src/isa/s390x/lower.isle line 259. 8688 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8689 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8690 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8691 let expr3_0: Type = I64; 8692 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8693 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8694 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8695 return Some(expr6_0); 8696 } 8697 &Opcode::Smulhi => { 8698 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8699 // Rule at src/isa/s390x/lower.isle line 281. 8700 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8701 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8702 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8703 let expr3_0: Type = I64; 8704 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8705 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8706 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8707 return Some(expr6_0); 8708 } 8709 _ => {} 8710 } 8711 } 8712 &InstructionData::Unary { 8713 opcode: ref pattern5_0, 8714 arg: pattern5_1, 8715 } => { 8716 if let &Opcode::Bitcast = pattern5_0 { 8717 let pattern7_0 = C::value_type(ctx, pattern5_1); 8718 if pattern7_0 == F64 { 8719 // Rule at src/isa/s390x/lower.isle line 1135. 8720 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8721 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8722 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8723 return Some(expr2_0); 8724 } 8725 } 8726 } 8727 &InstructionData::LoadNoOffset { 8728 opcode: ref pattern5_0, 8729 arg: pattern5_1, 8730 flags: pattern5_2, 8731 } => { 8732 if let &Opcode::AtomicLoad = pattern5_0 { 8733 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8734 // Rule at src/isa/s390x/lower.isle line 1850. 8735 let expr0_0 = C::zero_offset(ctx); 8736 let expr1_0 = 8737 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8738 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8739 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8740 return Some(expr3_0); 8741 } 8742 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8743 // Rule at src/isa/s390x/lower.isle line 1846. 8744 let expr0_0 = C::zero_offset(ctx); 8745 let expr1_0 = 8746 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8747 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8748 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8749 return Some(expr3_0); 8750 } 8751 } 8752 } 8753 &InstructionData::Load { 8754 opcode: ref pattern5_0, 8755 arg: pattern5_1, 8756 flags: pattern5_2, 8757 offset: pattern5_3, 8758 } => { 8759 if let &Opcode::Load = pattern5_0 { 8760 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8761 // Rule at src/isa/s390x/lower.isle line 1206. 8762 let expr0_0 = 8763 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8764 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8765 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8766 return Some(expr2_0); 8767 } 8768 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8769 // Rule at src/isa/s390x/lower.isle line 1202. 8770 let expr0_0 = 8771 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8772 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8773 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8774 return Some(expr2_0); 8775 } 8776 } 8777 } 8778 _ => {} 8779 } 8780 } 8781 if pattern2_0 == R64 { 8782 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8783 if let &InstructionData::Load { 8784 opcode: ref pattern5_0, 8785 arg: pattern5_1, 8786 flags: pattern5_2, 8787 offset: pattern5_3, 8788 } = &pattern4_0 8789 { 8790 if let &Opcode::Load = pattern5_0 { 8791 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8792 // Rule at src/isa/s390x/lower.isle line 1214. 8793 let expr0_0 = 8794 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8795 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8796 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8797 return Some(expr2_0); 8798 } 8799 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8800 // Rule at src/isa/s390x/lower.isle line 1210. 8801 let expr0_0 = 8802 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8803 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8804 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8805 return Some(expr2_0); 8806 } 8807 } 8808 } 8809 } 8810 if pattern2_0 == F32 { 8811 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8812 match &pattern4_0 { 8813 &InstructionData::Unary { 8814 opcode: ref pattern5_0, 8815 arg: pattern5_1, 8816 } => { 8817 if let &Opcode::Bitcast = pattern5_0 { 8818 let pattern7_0 = C::value_type(ctx, pattern5_1); 8819 if pattern7_0 == I32 { 8820 // Rule at src/isa/s390x/lower.isle line 1140. 8821 let expr0_0: Type = I64; 8822 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8823 let expr2_0: u8 = 32; 8824 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8825 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8826 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8827 return Some(expr5_0); 8828 } 8829 } 8830 } 8831 &InstructionData::Load { 8832 opcode: ref pattern5_0, 8833 arg: pattern5_1, 8834 flags: pattern5_2, 8835 offset: pattern5_3, 8836 } => { 8837 if let &Opcode::Load = pattern5_0 { 8838 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8839 // Rule at src/isa/s390x/lower.isle line 1218. 8840 let expr0_0 = 8841 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8842 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8843 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8844 return Some(expr2_0); 8845 } 8846 } 8847 } 8848 _ => {} 8849 } 8850 } 8851 if pattern2_0 == F64 { 8852 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8853 match &pattern4_0 { 8854 &InstructionData::Unary { 8855 opcode: ref pattern5_0, 8856 arg: pattern5_1, 8857 } => { 8858 if let &Opcode::Bitcast = pattern5_0 { 8859 let pattern7_0 = C::value_type(ctx, pattern5_1); 8860 if pattern7_0 == I64 { 8861 // Rule at src/isa/s390x/lower.isle line 1131. 8862 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8863 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8864 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8865 return Some(expr2_0); 8866 } 8867 } 8868 } 8869 &InstructionData::Load { 8870 opcode: ref pattern5_0, 8871 arg: pattern5_1, 8872 flags: pattern5_2, 8873 offset: pattern5_3, 8874 } => { 8875 if let &Opcode::Load = pattern5_0 { 8876 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8877 // Rule at src/isa/s390x/lower.isle line 1233. 8878 let expr0_0 = 8879 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8880 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8881 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8882 return Some(expr2_0); 8883 } 8884 } 8885 } 8886 _ => {} 8887 } 8888 } 8889 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8890 match &pattern3_0 { 8891 &InstructionData::NullAry { 8892 opcode: ref pattern4_0, 8893 } => { 8894 if let &Opcode::Null = pattern4_0 { 8895 // Rule at src/isa/s390x/lower.isle line 41. 8896 let expr0_0: u64 = 0; 8897 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8898 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8899 return Some(expr2_0); 8900 } 8901 } 8902 &InstructionData::UnaryImm { 8903 opcode: ref pattern4_0, 8904 imm: pattern4_1, 8905 } => { 8906 if let &Opcode::Iconst = pattern4_0 { 8907 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8908 // Rule at src/isa/s390x/lower.isle line 15. 8909 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8910 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8911 return Some(expr1_0); 8912 } 8913 } 8914 &InstructionData::StackLoad { 8915 opcode: ref pattern4_0, 8916 stack_slot: pattern4_1, 8917 offset: pattern4_2, 8918 } => { 8919 if let &Opcode::StackAddr = pattern4_0 { 8920 // Rule at src/isa/s390x/lower.isle line 1152. 8921 let expr0_0 = 8922 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8923 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8924 return Some(expr1_0); 8925 } 8926 } 8927 &InstructionData::UnaryBool { 8928 opcode: ref pattern4_0, 8929 imm: pattern4_1, 8930 } => { 8931 if let &Opcode::Bconst = pattern4_0 { 8932 if pattern4_1 == true { 8933 // Rule at src/isa/s390x/lower.isle line 23. 8934 let expr0_0: u64 = 1; 8935 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8936 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8937 return Some(expr2_0); 8938 } 8939 if pattern4_1 == false { 8940 // Rule at src/isa/s390x/lower.isle line 21. 8941 let expr0_0: u64 = 0; 8942 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8943 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8944 return Some(expr2_0); 8945 } 8946 } 8947 } 8948 &InstructionData::Binary { 8949 opcode: ref pattern4_0, 8950 args: ref pattern4_1, 8951 } => { 8952 match pattern4_0 { 8953 &Opcode::Fadd => { 8954 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8955 // Rule at src/isa/s390x/lower.isle line 920. 8956 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8957 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8958 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8959 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8960 return Some(expr3_0); 8961 } 8962 &Opcode::Fsub => { 8963 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8964 // Rule at src/isa/s390x/lower.isle line 927. 8965 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8966 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8967 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8968 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8969 return Some(expr3_0); 8970 } 8971 &Opcode::Fmul => { 8972 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8973 // Rule at src/isa/s390x/lower.isle line 934. 8974 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8975 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8976 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8977 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8978 return Some(expr3_0); 8979 } 8980 &Opcode::Fdiv => { 8981 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8982 // Rule at src/isa/s390x/lower.isle line 941. 8983 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8984 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8985 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8986 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8987 return Some(expr3_0); 8988 } 8989 &Opcode::Fcopysign => { 8990 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8991 // Rule at src/isa/s390x/lower.isle line 962. 8992 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8993 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8994 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8995 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8996 return Some(expr3_0); 8997 } 8998 &Opcode::Fmin => { 8999 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9000 // Rule at src/isa/s390x/lower.isle line 948. 9001 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9002 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9003 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9004 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9005 return Some(expr3_0); 9006 } 9007 &Opcode::Fmax => { 9008 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9009 // Rule at src/isa/s390x/lower.isle line 955. 9010 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9011 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9012 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9013 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9014 return Some(expr3_0); 9015 } 9016 _ => {} 9017 } 9018 } 9019 &InstructionData::FloatCompare { 9020 opcode: ref pattern4_0, 9021 args: ref pattern4_1, 9022 cond: ref pattern4_2, 9023 } => { 9024 if let &Opcode::Fcmp = pattern4_0 { 9025 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9026 // Rule at src/isa/s390x/lower.isle line 2004. 9027 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9028 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9029 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9030 return Some(expr2_0); 9031 } 9032 } 9033 &InstructionData::IntCompare { 9034 opcode: ref pattern4_0, 9035 args: ref pattern4_1, 9036 cond: ref pattern4_2, 9037 } => { 9038 if let &Opcode::Icmp = pattern4_0 { 9039 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9040 // Rule at src/isa/s390x/lower.isle line 1915. 9041 let expr0_0: bool = true; 9042 let expr1_0 = 9043 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9044 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9045 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9046 return Some(expr3_0); 9047 } 9048 } 9049 &InstructionData::Ternary { 9050 opcode: ref pattern4_0, 9051 args: ref pattern4_1, 9052 } => { 9053 match pattern4_0 { 9054 &Opcode::Select => { 9055 let (pattern6_0, pattern6_1, pattern6_2) = 9056 C::unpack_value_array_3(ctx, pattern4_1); 9057 // Rule at src/isa/s390x/lower.isle line 2046. 9058 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9059 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9060 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9061 let expr3_0 = constructor_select_bool_reg( 9062 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9063 )?; 9064 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9065 return Some(expr4_0); 9066 } 9067 &Opcode::Fma => { 9068 let (pattern6_0, pattern6_1, pattern6_2) = 9069 C::unpack_value_array_3(ctx, pattern4_1); 9070 // Rule at src/isa/s390x/lower.isle line 969. 9071 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9072 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9073 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9074 let expr3_0 = 9075 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9076 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9077 return Some(expr4_0); 9078 } 9079 _ => {} 9080 } 9081 } 9082 &InstructionData::IntSelect { 9083 opcode: ref pattern4_0, 9084 args: ref pattern4_1, 9085 cond: ref pattern4_2, 9086 } => { 9087 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9088 let (pattern6_0, pattern6_1, pattern6_2) = 9089 C::unpack_value_array_3(ctx, pattern4_1); 9090 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9091 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9092 if let &InstructionData::Binary { 9093 opcode: ref pattern9_0, 9094 args: ref pattern9_1, 9095 } = &pattern8_0 9096 { 9097 if let &Opcode::Ifcmp = pattern9_0 { 9098 let (pattern11_0, pattern11_1) = 9099 C::unpack_value_array_2(ctx, pattern9_1); 9100 // Rule at src/isa/s390x/lower.isle line 2058. 9101 let expr0_0: bool = false; 9102 let expr1_0 = constructor_icmp_val( 9103 ctx, 9104 expr0_0, 9105 pattern4_2, 9106 pattern11_0, 9107 pattern11_1, 9108 )?; 9109 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9110 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9111 let expr4_0 = constructor_select_bool_reg( 9112 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9113 )?; 9114 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9115 return Some(expr5_0); 9116 } 9117 } 9118 } 9119 } 9120 } 9121 &InstructionData::Unary { 9122 opcode: ref pattern4_0, 9123 arg: pattern4_1, 9124 } => { 9125 match pattern4_0 { 9126 &Opcode::Sqrt => { 9127 // Rule at src/isa/s390x/lower.isle line 976. 9128 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9129 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9130 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9131 return Some(expr2_0); 9132 } 9133 &Opcode::Fneg => { 9134 // Rule at src/isa/s390x/lower.isle line 983. 9135 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9136 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9137 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9138 return Some(expr2_0); 9139 } 9140 &Opcode::Fabs => { 9141 // Rule at src/isa/s390x/lower.isle line 990. 9142 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9143 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9144 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9145 return Some(expr2_0); 9146 } 9147 &Opcode::Ceil => { 9148 // Rule at src/isa/s390x/lower.isle line 997. 9149 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9150 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9151 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9152 return Some(expr2_0); 9153 } 9154 &Opcode::Floor => { 9155 // Rule at src/isa/s390x/lower.isle line 1004. 9156 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9157 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9158 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9159 return Some(expr2_0); 9160 } 9161 &Opcode::Trunc => { 9162 // Rule at src/isa/s390x/lower.isle line 1011. 9163 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9164 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9165 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9166 return Some(expr2_0); 9167 } 9168 &Opcode::Nearest => { 9169 // Rule at src/isa/s390x/lower.isle line 1018. 9170 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9171 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9172 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9173 return Some(expr2_0); 9174 } 9175 &Opcode::Bextend => { 9176 // Rule at src/isa/s390x/lower.isle line 760. 9177 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9178 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9179 return Some(expr1_0); 9180 } 9181 &Opcode::Bmask => { 9182 // Rule at src/isa/s390x/lower.isle line 762. 9183 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9184 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9185 return Some(expr1_0); 9186 } 9187 &Opcode::Fpromote => { 9188 let pattern6_0 = C::value_type(ctx, pattern4_1); 9189 // Rule at src/isa/s390x/lower.isle line 1025. 9190 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9191 let expr1_0 = 9192 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9193 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9194 return Some(expr2_0); 9195 } 9196 &Opcode::Fdemote => { 9197 let pattern6_0 = C::value_type(ctx, pattern4_1); 9198 // Rule at src/isa/s390x/lower.isle line 1032. 9199 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9200 let expr1_0 = 9201 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9202 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9203 return Some(expr2_0); 9204 } 9205 &Opcode::FcvtFromUint => { 9206 let pattern6_0 = C::value_type(ctx, pattern4_1); 9207 // Rule at src/isa/s390x/lower.isle line 1039. 9208 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9209 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9210 let expr2_0 = 9211 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9212 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9213 return Some(expr3_0); 9214 } 9215 &Opcode::FcvtFromSint => { 9216 let pattern6_0 = C::value_type(ctx, pattern4_1); 9217 // Rule at src/isa/s390x/lower.isle line 1047. 9218 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9219 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9220 let expr2_0 = 9221 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9222 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9223 return Some(expr3_0); 9224 } 9225 _ => {} 9226 } 9227 } 9228 _ => {} 9229 } 9230 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9231 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9232 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9233 match &pattern5_0 { 9234 &InstructionData::Binary { 9235 opcode: ref pattern6_0, 9236 args: ref pattern6_1, 9237 } => { 9238 match pattern6_0 { 9239 &Opcode::BandNot => { 9240 let (pattern8_0, pattern8_1) = 9241 C::unpack_value_array_2(ctx, pattern6_1); 9242 // Rule at src/isa/s390x/lower.isle line 702. 9243 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9244 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9245 let expr2_0 = 9246 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9247 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9248 return Some(expr3_0); 9249 } 9250 &Opcode::BorNot => { 9251 let (pattern8_0, pattern8_1) = 9252 C::unpack_value_array_2(ctx, pattern6_1); 9253 // Rule at src/isa/s390x/lower.isle line 713. 9254 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9255 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9256 let expr2_0 = 9257 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9258 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9259 return Some(expr3_0); 9260 } 9261 &Opcode::BxorNot => { 9262 let (pattern8_0, pattern8_1) = 9263 C::unpack_value_array_2(ctx, pattern6_1); 9264 // Rule at src/isa/s390x/lower.isle line 724. 9265 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9266 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9267 let expr2_0 = 9268 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9269 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9270 return Some(expr3_0); 9271 } 9272 _ => {} 9273 } 9274 } 9275 &InstructionData::Ternary { 9276 opcode: ref pattern6_0, 9277 args: ref pattern6_1, 9278 } => { 9279 if let &Opcode::Bitselect = pattern6_0 { 9280 let (pattern8_0, pattern8_1, pattern8_2) = 9281 C::unpack_value_array_3(ctx, pattern6_1); 9282 // Rule at src/isa/s390x/lower.isle line 735. 9283 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9284 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9285 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9286 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9287 let expr4_0 = 9288 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9289 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9290 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9291 return Some(expr6_0); 9292 } 9293 } 9294 &InstructionData::Unary { 9295 opcode: ref pattern6_0, 9296 arg: pattern6_1, 9297 } => { 9298 match pattern6_0 { 9299 &Opcode::Bnot => { 9300 // Rule at src/isa/s390x/lower.isle line 625. 9301 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9302 let expr1_0 = 9303 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9304 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9305 return Some(expr2_0); 9306 } 9307 &Opcode::Popcnt => { 9308 // Rule at src/isa/s390x/lower.isle line 889. 9309 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9310 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9311 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9312 return Some(expr2_0); 9313 } 9314 _ => {} 9315 } 9316 } 9317 _ => {} 9318 } 9319 } 9320 } 9321 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9322 if pattern2_0 == I16 { 9323 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9324 if let &InstructionData::Unary { 9325 opcode: ref pattern6_0, 9326 arg: pattern6_1, 9327 } = &pattern5_0 9328 { 9329 if let &Opcode::Popcnt = pattern6_0 { 9330 // Rule at src/isa/s390x/lower.isle line 898. 9331 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9332 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9333 let expr2_0: Type = I32; 9334 let expr3_0: Type = I32; 9335 let expr4_0: u8 = 8; 9336 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9337 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9338 let expr7_0: Type = I32; 9339 let expr8_0: u8 = 8; 9340 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9341 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9342 return Some(expr10_0); 9343 } 9344 } 9345 } 9346 if pattern2_0 == I32 { 9347 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9348 if let &InstructionData::Unary { 9349 opcode: ref pattern6_0, 9350 arg: pattern6_1, 9351 } = &pattern5_0 9352 { 9353 if let &Opcode::Popcnt = pattern6_0 { 9354 // Rule at src/isa/s390x/lower.isle line 903. 9355 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9356 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9357 let expr2_0: Type = I32; 9358 let expr3_0: Type = I32; 9359 let expr4_0: u8 = 16; 9360 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9361 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9362 let expr7_0: Type = I32; 9363 let expr8_0: Type = I32; 9364 let expr9_0: u8 = 8; 9365 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9366 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9367 let expr12_0: Type = I32; 9368 let expr13_0: u8 = 24; 9369 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9370 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9371 return Some(expr15_0); 9372 } 9373 } 9374 } 9375 if pattern2_0 == I64 { 9376 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9377 if let &InstructionData::Unary { 9378 opcode: ref pattern6_0, 9379 arg: pattern6_1, 9380 } = &pattern5_0 9381 { 9382 if let &Opcode::Popcnt = pattern6_0 { 9383 // Rule at src/isa/s390x/lower.isle line 909. 9384 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9385 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9386 let expr2_0: Type = I64; 9387 let expr3_0: Type = I64; 9388 let expr4_0: u8 = 32; 9389 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9390 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9391 let expr7_0: Type = I64; 9392 let expr8_0: Type = I64; 9393 let expr9_0: u8 = 16; 9394 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9395 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9396 let expr12_0: Type = I64; 9397 let expr13_0: Type = I64; 9398 let expr14_0: u8 = 8; 9399 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9400 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9401 let expr17_0: Type = I64; 9402 let expr18_0: u8 = 56; 9403 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9404 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9405 return Some(expr20_0); 9406 } 9407 } 9408 } 9409 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9410 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9411 match &pattern5_0 { 9412 &InstructionData::Binary { 9413 opcode: ref pattern6_0, 9414 args: ref pattern6_1, 9415 } => { 9416 match pattern6_0 { 9417 &Opcode::BandNot => { 9418 let (pattern8_0, pattern8_1) = 9419 C::unpack_value_array_2(ctx, pattern6_1); 9420 // Rule at src/isa/s390x/lower.isle line 706. 9421 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9422 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9423 let expr2_0 = 9424 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9425 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9426 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9427 return Some(expr4_0); 9428 } 9429 &Opcode::BorNot => { 9430 let (pattern8_0, pattern8_1) = 9431 C::unpack_value_array_2(ctx, pattern6_1); 9432 // Rule at src/isa/s390x/lower.isle line 717. 9433 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9434 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9435 let expr2_0 = 9436 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9437 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9438 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9439 return Some(expr4_0); 9440 } 9441 &Opcode::BxorNot => { 9442 let (pattern8_0, pattern8_1) = 9443 C::unpack_value_array_2(ctx, pattern6_1); 9444 // Rule at src/isa/s390x/lower.isle line 728. 9445 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9446 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9447 let expr2_0 = 9448 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9449 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9450 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9451 return Some(expr4_0); 9452 } 9453 _ => {} 9454 } 9455 } 9456 &InstructionData::Ternary { 9457 opcode: ref pattern6_0, 9458 args: ref pattern6_1, 9459 } => { 9460 if let &Opcode::Bitselect = pattern6_0 { 9461 let (pattern8_0, pattern8_1, pattern8_2) = 9462 C::unpack_value_array_3(ctx, pattern6_1); 9463 // Rule at src/isa/s390x/lower.isle line 742. 9464 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9465 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9466 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9467 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9468 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9469 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9470 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9471 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9472 return Some(expr7_0); 9473 } 9474 } 9475 &InstructionData::Unary { 9476 opcode: ref pattern6_0, 9477 arg: pattern6_1, 9478 } => { 9479 if let &Opcode::Bnot = pattern6_0 { 9480 // Rule at src/isa/s390x/lower.isle line 630. 9481 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9482 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9483 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9484 return Some(expr2_0); 9485 } 9486 } 9487 _ => {} 9488 } 9489 } 9490 } 9491 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9492 if pattern2_0 == F32 { 9493 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9494 if let &InstructionData::Load { 9495 opcode: ref pattern6_0, 9496 arg: pattern6_1, 9497 flags: pattern6_2, 9498 offset: pattern6_3, 9499 } = &pattern5_0 9500 { 9501 if let &Opcode::Load = pattern6_0 { 9502 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9503 // Rule at src/isa/s390x/lower.isle line 1222. 9504 let expr0_0 = 9505 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9506 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9507 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9508 return Some(expr2_0); 9509 } 9510 } 9511 } 9512 } 9513 if pattern2_0 == F64 { 9514 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9515 if let &InstructionData::Load { 9516 opcode: ref pattern6_0, 9517 arg: pattern6_1, 9518 flags: pattern6_2, 9519 offset: pattern6_3, 9520 } = &pattern5_0 9521 { 9522 if let &Opcode::Load = pattern6_0 { 9523 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9524 // Rule at src/isa/s390x/lower.isle line 1237. 9525 let expr0_0 = 9526 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9527 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9528 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9529 return Some(expr2_0); 9530 } 9531 } 9532 } 9533 } 9534 } 9535 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9536 if pattern2_0 == F32 { 9537 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9538 if let &InstructionData::Load { 9539 opcode: ref pattern6_0, 9540 arg: pattern6_1, 9541 flags: pattern6_2, 9542 offset: pattern6_3, 9543 } = &pattern5_0 9544 { 9545 if let &Opcode::Load = pattern6_0 { 9546 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9547 // Rule at src/isa/s390x/lower.isle line 1227. 9548 let expr0_0 = 9549 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9550 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9551 let expr2_0: Type = I64; 9552 let expr3_0: u8 = 32; 9553 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9554 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9555 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9556 return Some(expr6_0); 9557 } 9558 } 9559 } 9560 } 9561 if pattern2_0 == F64 { 9562 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9563 if let &InstructionData::Load { 9564 opcode: ref pattern6_0, 9565 arg: pattern6_1, 9566 flags: pattern6_2, 9567 offset: pattern6_3, 9568 } = &pattern5_0 9569 { 9570 if let &Opcode::Load = pattern6_0 { 9571 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9572 // Rule at src/isa/s390x/lower.isle line 1242. 9573 let expr0_0 = 9574 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9575 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9576 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9577 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9578 return Some(expr3_0); 9579 } 9580 } 9581 } 9582 } 9583 } 9584 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9585 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9586 if let &InstructionData::Unary { 9587 opcode: ref pattern5_0, 9588 arg: pattern5_1, 9589 } = &pattern4_0 9590 { 9591 if let &Opcode::Bint = pattern5_0 { 9592 // Rule at src/isa/s390x/lower.isle line 796. 9593 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9594 let expr1_0: u16 = 1; 9595 let expr2_0: u8 = 0; 9596 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9597 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9598 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9599 return Some(expr5_0); 9600 } 9601 } 9602 } 9603 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9604 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9605 if let &InstructionData::Unary { 9606 opcode: ref pattern5_0, 9607 arg: pattern5_1, 9608 } = &pattern4_0 9609 { 9610 if let &Opcode::Bint = pattern5_0 { 9611 // Rule at src/isa/s390x/lower.isle line 800. 9612 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9613 let expr1_0: u32 = 1; 9614 let expr2_0: u8 = 0; 9615 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9616 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9617 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9618 return Some(expr5_0); 9619 } 9620 } 9621 } 9622 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9623 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9624 match &pattern4_0 { 9625 &InstructionData::Binary { 9626 opcode: ref pattern5_0, 9627 args: ref pattern5_1, 9628 } => { 9629 match pattern5_0 { 9630 &Opcode::Iadd => { 9631 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9632 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9633 // Rule at src/isa/s390x/lower.isle line 72. 9634 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9635 let expr1_0 = 9636 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9637 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9638 return Some(expr2_0); 9639 } 9640 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9641 // Rule at src/isa/s390x/lower.isle line 76. 9642 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9643 let expr1_0 = 9644 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9645 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9646 return Some(expr2_0); 9647 } 9648 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9649 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9650 if let &InstructionData::Unary { 9651 opcode: ref pattern10_0, 9652 arg: pattern10_1, 9653 } = &pattern9_0 9654 { 9655 if let &Opcode::Sextend = pattern10_0 { 9656 let pattern12_0 = C::value_type(ctx, pattern10_1); 9657 if pattern12_0 == I32 { 9658 // Rule at src/isa/s390x/lower.isle line 66. 9659 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9660 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9661 let expr2_0 = constructor_add_reg_sext32( 9662 ctx, pattern3_0, expr0_0, expr1_0, 9663 )?; 9664 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9665 return Some(expr3_0); 9666 } 9667 } 9668 } 9669 } 9670 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9671 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9672 if let &InstructionData::Load { 9673 opcode: ref pattern10_0, 9674 arg: pattern10_1, 9675 flags: pattern10_2, 9676 offset: pattern10_3, 9677 } = &pattern9_0 9678 { 9679 match pattern10_0 { 9680 &Opcode::Sload16 => { 9681 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9682 // Rule at src/isa/s390x/lower.isle line 94. 9683 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9684 let expr1_0 = 9685 constructor_sink_sload16(ctx, pattern8_0)?; 9686 let expr2_0 = constructor_add_mem_sext16( 9687 ctx, pattern3_0, expr0_0, &expr1_0, 9688 )?; 9689 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9690 return Some(expr3_0); 9691 } 9692 } 9693 &Opcode::Sload32 => { 9694 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9695 // Rule at src/isa/s390x/lower.isle line 98. 9696 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9697 let expr1_0 = 9698 constructor_sink_sload32(ctx, pattern8_0)?; 9699 let expr2_0 = constructor_add_mem_sext32( 9700 ctx, pattern3_0, expr0_0, &expr1_0, 9701 )?; 9702 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9703 return Some(expr3_0); 9704 } 9705 } 9706 _ => {} 9707 } 9708 } 9709 } 9710 let pattern8_0 = C::value_type(ctx, pattern7_0); 9711 if pattern8_0 == I16 { 9712 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9713 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9714 if let &InstructionData::Load { 9715 opcode: ref pattern12_0, 9716 arg: pattern12_1, 9717 flags: pattern12_2, 9718 offset: pattern12_3, 9719 } = &pattern11_0 9720 { 9721 if let &Opcode::Load = pattern12_0 { 9722 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9723 // Rule at src/isa/s390x/lower.isle line 88. 9724 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9725 let expr1_0 = 9726 constructor_sink_load(ctx, pattern10_0)?; 9727 let expr2_0 = constructor_add_mem_sext16( 9728 ctx, pattern3_0, expr0_0, &expr1_0, 9729 )?; 9730 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9731 return Some(expr3_0); 9732 } 9733 } 9734 } 9735 } 9736 } 9737 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9738 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9739 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9740 if let &InstructionData::Load { 9741 opcode: ref pattern12_0, 9742 arg: pattern12_1, 9743 flags: pattern12_2, 9744 offset: pattern12_3, 9745 } = &pattern11_0 9746 { 9747 if let &Opcode::Load = pattern12_0 { 9748 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9749 // Rule at src/isa/s390x/lower.isle line 82. 9750 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9751 let expr1_0 = 9752 constructor_sink_load(ctx, pattern10_0)?; 9753 let expr2_0 = constructor_add_mem( 9754 ctx, pattern3_0, expr0_0, &expr1_0, 9755 )?; 9756 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9757 return Some(expr3_0); 9758 } 9759 } 9760 } 9761 } 9762 } 9763 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9764 // Rule at src/isa/s390x/lower.isle line 70. 9765 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9766 let expr1_0 = 9767 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9768 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9769 return Some(expr2_0); 9770 } 9771 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9772 // Rule at src/isa/s390x/lower.isle line 74. 9773 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9774 let expr1_0 = 9775 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9776 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9777 return Some(expr2_0); 9778 } 9779 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9780 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9781 if let &InstructionData::Unary { 9782 opcode: ref pattern10_0, 9783 arg: pattern10_1, 9784 } = &pattern9_0 9785 { 9786 if let &Opcode::Sextend = pattern10_0 { 9787 let pattern12_0 = C::value_type(ctx, pattern10_1); 9788 if pattern12_0 == I32 { 9789 // Rule at src/isa/s390x/lower.isle line 64. 9790 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9791 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9792 let expr2_0 = constructor_add_reg_sext32( 9793 ctx, pattern3_0, expr0_0, expr1_0, 9794 )?; 9795 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9796 return Some(expr3_0); 9797 } 9798 } 9799 } 9800 } 9801 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9802 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9803 if let &InstructionData::Load { 9804 opcode: ref pattern10_0, 9805 arg: pattern10_1, 9806 flags: pattern10_2, 9807 offset: pattern10_3, 9808 } = &pattern9_0 9809 { 9810 match pattern10_0 { 9811 &Opcode::Sload16 => { 9812 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9813 // Rule at src/isa/s390x/lower.isle line 92. 9814 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9815 let expr1_0 = 9816 constructor_sink_sload16(ctx, pattern8_0)?; 9817 let expr2_0 = constructor_add_mem_sext16( 9818 ctx, pattern3_0, expr0_0, &expr1_0, 9819 )?; 9820 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9821 return Some(expr3_0); 9822 } 9823 } 9824 &Opcode::Sload32 => { 9825 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9826 // Rule at src/isa/s390x/lower.isle line 96. 9827 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9828 let expr1_0 = 9829 constructor_sink_sload32(ctx, pattern8_0)?; 9830 let expr2_0 = constructor_add_mem_sext32( 9831 ctx, pattern3_0, expr0_0, &expr1_0, 9832 )?; 9833 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9834 return Some(expr3_0); 9835 } 9836 } 9837 _ => {} 9838 } 9839 } 9840 } 9841 let pattern8_0 = C::value_type(ctx, pattern7_1); 9842 if pattern8_0 == I16 { 9843 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9844 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9845 if let &InstructionData::Load { 9846 opcode: ref pattern12_0, 9847 arg: pattern12_1, 9848 flags: pattern12_2, 9849 offset: pattern12_3, 9850 } = &pattern11_0 9851 { 9852 if let &Opcode::Load = pattern12_0 { 9853 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9854 // Rule at src/isa/s390x/lower.isle line 86. 9855 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9856 let expr1_0 = 9857 constructor_sink_load(ctx, pattern10_0)?; 9858 let expr2_0 = constructor_add_mem_sext16( 9859 ctx, pattern3_0, expr0_0, &expr1_0, 9860 )?; 9861 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9862 return Some(expr3_0); 9863 } 9864 } 9865 } 9866 } 9867 } 9868 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9869 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9870 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9871 if let &InstructionData::Load { 9872 opcode: ref pattern12_0, 9873 arg: pattern12_1, 9874 flags: pattern12_2, 9875 offset: pattern12_3, 9876 } = &pattern11_0 9877 { 9878 if let &Opcode::Load = pattern12_0 { 9879 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9880 // Rule at src/isa/s390x/lower.isle line 80. 9881 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9882 let expr1_0 = 9883 constructor_sink_load(ctx, pattern10_0)?; 9884 let expr2_0 = constructor_add_mem( 9885 ctx, pattern3_0, expr0_0, &expr1_0, 9886 )?; 9887 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9888 return Some(expr3_0); 9889 } 9890 } 9891 } 9892 } 9893 } 9894 // Rule at src/isa/s390x/lower.isle line 60. 9895 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9896 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9897 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9898 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9899 return Some(expr3_0); 9900 } 9901 &Opcode::Isub => { 9902 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9903 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9904 // Rule at src/isa/s390x/lower.isle line 113. 9905 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9906 let expr1_0 = 9907 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9908 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9909 return Some(expr2_0); 9910 } 9911 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9912 // Rule at src/isa/s390x/lower.isle line 115. 9913 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9914 let expr1_0 = 9915 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9916 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9917 return Some(expr2_0); 9918 } 9919 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9920 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9921 if let &InstructionData::Unary { 9922 opcode: ref pattern10_0, 9923 arg: pattern10_1, 9924 } = &pattern9_0 9925 { 9926 if let &Opcode::Sextend = pattern10_0 { 9927 let pattern12_0 = C::value_type(ctx, pattern10_1); 9928 if pattern12_0 == I32 { 9929 // Rule at src/isa/s390x/lower.isle line 109. 9930 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9931 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9932 let expr2_0 = constructor_sub_reg_sext32( 9933 ctx, pattern3_0, expr0_0, expr1_0, 9934 )?; 9935 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9936 return Some(expr3_0); 9937 } 9938 } 9939 } 9940 } 9941 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9942 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9943 if let &InstructionData::Load { 9944 opcode: ref pattern10_0, 9945 arg: pattern10_1, 9946 flags: pattern10_2, 9947 offset: pattern10_3, 9948 } = &pattern9_0 9949 { 9950 match pattern10_0 { 9951 &Opcode::Sload16 => { 9952 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9953 // Rule at src/isa/s390x/lower.isle line 127. 9954 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9955 let expr1_0 = 9956 constructor_sink_sload16(ctx, pattern8_0)?; 9957 let expr2_0 = constructor_sub_mem_sext16( 9958 ctx, pattern3_0, expr0_0, &expr1_0, 9959 )?; 9960 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9961 return Some(expr3_0); 9962 } 9963 } 9964 &Opcode::Sload32 => { 9965 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9966 // Rule at src/isa/s390x/lower.isle line 129. 9967 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9968 let expr1_0 = 9969 constructor_sink_sload32(ctx, pattern8_0)?; 9970 let expr2_0 = constructor_sub_mem_sext32( 9971 ctx, pattern3_0, expr0_0, &expr1_0, 9972 )?; 9973 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9974 return Some(expr3_0); 9975 } 9976 } 9977 _ => {} 9978 } 9979 } 9980 } 9981 let pattern8_0 = C::value_type(ctx, pattern7_1); 9982 if pattern8_0 == I16 { 9983 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9984 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9985 if let &InstructionData::Load { 9986 opcode: ref pattern12_0, 9987 arg: pattern12_1, 9988 flags: pattern12_2, 9989 offset: pattern12_3, 9990 } = &pattern11_0 9991 { 9992 if let &Opcode::Load = pattern12_0 { 9993 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9994 // Rule at src/isa/s390x/lower.isle line 123. 9995 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9996 let expr1_0 = 9997 constructor_sink_load(ctx, pattern10_0)?; 9998 let expr2_0 = constructor_sub_mem_sext16( 9999 ctx, pattern3_0, expr0_0, &expr1_0, 10000 )?; 10001 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10002 return Some(expr3_0); 10003 } 10004 } 10005 } 10006 } 10007 } 10008 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10009 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10010 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10011 if let &InstructionData::Load { 10012 opcode: ref pattern12_0, 10013 arg: pattern12_1, 10014 flags: pattern12_2, 10015 offset: pattern12_3, 10016 } = &pattern11_0 10017 { 10018 if let &Opcode::Load = pattern12_0 { 10019 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10020 // Rule at src/isa/s390x/lower.isle line 119. 10021 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10022 let expr1_0 = 10023 constructor_sink_load(ctx, pattern10_0)?; 10024 let expr2_0 = constructor_sub_mem( 10025 ctx, pattern3_0, expr0_0, &expr1_0, 10026 )?; 10027 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10028 return Some(expr3_0); 10029 } 10030 } 10031 } 10032 } 10033 } 10034 // Rule at src/isa/s390x/lower.isle line 105. 10035 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10036 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10037 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10038 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10039 return Some(expr3_0); 10040 } 10041 &Opcode::Imul => { 10042 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10043 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10044 // Rule at src/isa/s390x/lower.isle line 212. 10045 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10046 let expr1_0 = 10047 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10048 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10049 return Some(expr2_0); 10050 } 10051 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10052 // Rule at src/isa/s390x/lower.isle line 216. 10053 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10054 let expr1_0 = 10055 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10056 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10057 return Some(expr2_0); 10058 } 10059 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10060 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10061 if let &InstructionData::Unary { 10062 opcode: ref pattern10_0, 10063 arg: pattern10_1, 10064 } = &pattern9_0 10065 { 10066 if let &Opcode::Sextend = pattern10_0 { 10067 let pattern12_0 = C::value_type(ctx, pattern10_1); 10068 if pattern12_0 == I32 { 10069 // Rule at src/isa/s390x/lower.isle line 206. 10070 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10071 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10072 let expr2_0 = constructor_mul_reg_sext32( 10073 ctx, pattern3_0, expr0_0, expr1_0, 10074 )?; 10075 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10076 return Some(expr3_0); 10077 } 10078 } 10079 } 10080 } 10081 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10082 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10083 if let &InstructionData::Load { 10084 opcode: ref pattern10_0, 10085 arg: pattern10_1, 10086 flags: pattern10_2, 10087 offset: pattern10_3, 10088 } = &pattern9_0 10089 { 10090 match pattern10_0 { 10091 &Opcode::Sload16 => { 10092 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10093 // Rule at src/isa/s390x/lower.isle line 234. 10094 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10095 let expr1_0 = 10096 constructor_sink_sload16(ctx, pattern8_0)?; 10097 let expr2_0 = constructor_mul_mem_sext16( 10098 ctx, pattern3_0, expr0_0, &expr1_0, 10099 )?; 10100 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10101 return Some(expr3_0); 10102 } 10103 } 10104 &Opcode::Sload32 => { 10105 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10106 // Rule at src/isa/s390x/lower.isle line 238. 10107 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10108 let expr1_0 = 10109 constructor_sink_sload32(ctx, pattern8_0)?; 10110 let expr2_0 = constructor_mul_mem_sext32( 10111 ctx, pattern3_0, expr0_0, &expr1_0, 10112 )?; 10113 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10114 return Some(expr3_0); 10115 } 10116 } 10117 _ => {} 10118 } 10119 } 10120 } 10121 let pattern8_0 = C::value_type(ctx, pattern7_0); 10122 if pattern8_0 == I16 { 10123 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10124 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10125 if let &InstructionData::Load { 10126 opcode: ref pattern12_0, 10127 arg: pattern12_1, 10128 flags: pattern12_2, 10129 offset: pattern12_3, 10130 } = &pattern11_0 10131 { 10132 if let &Opcode::Load = pattern12_0 { 10133 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10134 // Rule at src/isa/s390x/lower.isle line 228. 10135 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10136 let expr1_0 = 10137 constructor_sink_load(ctx, pattern10_0)?; 10138 let expr2_0 = constructor_mul_mem_sext16( 10139 ctx, pattern3_0, expr0_0, &expr1_0, 10140 )?; 10141 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10142 return Some(expr3_0); 10143 } 10144 } 10145 } 10146 } 10147 } 10148 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10149 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10150 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10151 if let &InstructionData::Load { 10152 opcode: ref pattern12_0, 10153 arg: pattern12_1, 10154 flags: pattern12_2, 10155 offset: pattern12_3, 10156 } = &pattern11_0 10157 { 10158 if let &Opcode::Load = pattern12_0 { 10159 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10160 // Rule at src/isa/s390x/lower.isle line 222. 10161 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10162 let expr1_0 = 10163 constructor_sink_load(ctx, pattern10_0)?; 10164 let expr2_0 = constructor_mul_mem( 10165 ctx, pattern3_0, expr0_0, &expr1_0, 10166 )?; 10167 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10168 return Some(expr3_0); 10169 } 10170 } 10171 } 10172 } 10173 } 10174 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10175 // Rule at src/isa/s390x/lower.isle line 210. 10176 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10177 let expr1_0 = 10178 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10179 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10180 return Some(expr2_0); 10181 } 10182 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10183 // Rule at src/isa/s390x/lower.isle line 214. 10184 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10185 let expr1_0 = 10186 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10187 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10188 return Some(expr2_0); 10189 } 10190 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10191 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10192 if let &InstructionData::Unary { 10193 opcode: ref pattern10_0, 10194 arg: pattern10_1, 10195 } = &pattern9_0 10196 { 10197 if let &Opcode::Sextend = pattern10_0 { 10198 let pattern12_0 = C::value_type(ctx, pattern10_1); 10199 if pattern12_0 == I32 { 10200 // Rule at src/isa/s390x/lower.isle line 204. 10201 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10202 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10203 let expr2_0 = constructor_mul_reg_sext32( 10204 ctx, pattern3_0, expr0_0, expr1_0, 10205 )?; 10206 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10207 return Some(expr3_0); 10208 } 10209 } 10210 } 10211 } 10212 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10213 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10214 if let &InstructionData::Load { 10215 opcode: ref pattern10_0, 10216 arg: pattern10_1, 10217 flags: pattern10_2, 10218 offset: pattern10_3, 10219 } = &pattern9_0 10220 { 10221 match pattern10_0 { 10222 &Opcode::Sload16 => { 10223 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10224 // Rule at src/isa/s390x/lower.isle line 232. 10225 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10226 let expr1_0 = 10227 constructor_sink_sload16(ctx, pattern8_0)?; 10228 let expr2_0 = constructor_mul_mem_sext16( 10229 ctx, pattern3_0, expr0_0, &expr1_0, 10230 )?; 10231 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10232 return Some(expr3_0); 10233 } 10234 } 10235 &Opcode::Sload32 => { 10236 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10237 // Rule at src/isa/s390x/lower.isle line 236. 10238 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10239 let expr1_0 = 10240 constructor_sink_sload32(ctx, pattern8_0)?; 10241 let expr2_0 = constructor_mul_mem_sext32( 10242 ctx, pattern3_0, expr0_0, &expr1_0, 10243 )?; 10244 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10245 return Some(expr3_0); 10246 } 10247 } 10248 _ => {} 10249 } 10250 } 10251 } 10252 let pattern8_0 = C::value_type(ctx, pattern7_1); 10253 if pattern8_0 == I16 { 10254 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10255 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10256 if let &InstructionData::Load { 10257 opcode: ref pattern12_0, 10258 arg: pattern12_1, 10259 flags: pattern12_2, 10260 offset: pattern12_3, 10261 } = &pattern11_0 10262 { 10263 if let &Opcode::Load = pattern12_0 { 10264 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10265 // Rule at src/isa/s390x/lower.isle line 226. 10266 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10267 let expr1_0 = 10268 constructor_sink_load(ctx, pattern10_0)?; 10269 let expr2_0 = constructor_mul_mem_sext16( 10270 ctx, pattern3_0, expr0_0, &expr1_0, 10271 )?; 10272 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10273 return Some(expr3_0); 10274 } 10275 } 10276 } 10277 } 10278 } 10279 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10280 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10281 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10282 if let &InstructionData::Load { 10283 opcode: ref pattern12_0, 10284 arg: pattern12_1, 10285 flags: pattern12_2, 10286 offset: pattern12_3, 10287 } = &pattern11_0 10288 { 10289 if let &Opcode::Load = pattern12_0 { 10290 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10291 // Rule at src/isa/s390x/lower.isle line 220. 10292 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10293 let expr1_0 = 10294 constructor_sink_load(ctx, pattern10_0)?; 10295 let expr2_0 = constructor_mul_mem( 10296 ctx, pattern3_0, expr0_0, &expr1_0, 10297 )?; 10298 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10299 return Some(expr3_0); 10300 } 10301 } 10302 } 10303 } 10304 } 10305 // Rule at src/isa/s390x/lower.isle line 200. 10306 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10307 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10308 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10309 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10310 return Some(expr3_0); 10311 } 10312 &Opcode::Udiv => { 10313 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10314 // Rule at src/isa/s390x/lower.isle line 303. 10315 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10316 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10317 let expr2_0: u64 = 0; 10318 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10319 let expr4_0 = 10320 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10321 let expr5_0 = 10322 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10323 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10324 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10325 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10326 ctx, expr0_0, expr7_0, expr6_0, 10327 )?; 10328 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10329 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10330 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10331 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10332 return Some(expr12_0); 10333 } 10334 &Opcode::Sdiv => { 10335 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10336 // Rule at src/isa/s390x/lower.isle line 375. 10337 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10338 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10339 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10340 let expr3_0 = 10341 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10342 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10343 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10344 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10345 ctx, expr0_0, expr5_0, expr4_0, 10346 )?; 10347 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10348 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10349 )?; 10350 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10351 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10352 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10353 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10354 return Some(expr11_0); 10355 } 10356 &Opcode::Urem => { 10357 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10358 // Rule at src/isa/s390x/lower.isle line 326. 10359 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10360 let expr1_0: u64 = 0; 10361 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10362 let expr3_0 = 10363 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10364 let expr4_0 = 10365 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10366 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10367 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10368 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10369 ctx, expr0_0, expr6_0, expr5_0, 10370 )?; 10371 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10372 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10373 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10374 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10375 return Some(expr11_0); 10376 } 10377 &Opcode::Srem => { 10378 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10379 // Rule at src/isa/s390x/lower.isle line 398. 10380 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10381 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10382 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10383 let expr3_0 = 10384 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10385 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10386 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10387 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10388 ctx, expr0_0, expr5_0, expr4_0, 10389 )?; 10390 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10391 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10392 )?; 10393 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10394 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10395 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10396 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10397 return Some(expr11_0); 10398 } 10399 &Opcode::IaddIfcout => { 10400 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10401 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10402 // Rule at src/isa/s390x/lower.isle line 170. 10403 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10404 let expr1_0 = constructor_add_logical_zimm32( 10405 ctx, pattern3_0, expr0_0, pattern8_0, 10406 )?; 10407 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10408 return Some(expr2_0); 10409 } 10410 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10411 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10412 if let &InstructionData::Unary { 10413 opcode: ref pattern10_0, 10414 arg: pattern10_1, 10415 } = &pattern9_0 10416 { 10417 if let &Opcode::Uextend = pattern10_0 { 10418 let pattern12_0 = C::value_type(ctx, pattern10_1); 10419 if pattern12_0 == I32 { 10420 // Rule at src/isa/s390x/lower.isle line 164. 10421 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10422 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10423 let expr2_0 = constructor_add_logical_reg_zext32( 10424 ctx, pattern3_0, expr0_0, expr1_0, 10425 )?; 10426 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10427 return Some(expr3_0); 10428 } 10429 } 10430 } 10431 } 10432 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10433 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10434 if let &InstructionData::Load { 10435 opcode: ref pattern10_0, 10436 arg: pattern10_1, 10437 flags: pattern10_2, 10438 offset: pattern10_3, 10439 } = &pattern9_0 10440 { 10441 if let &Opcode::Uload32 = pattern10_0 { 10442 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10443 // Rule at src/isa/s390x/lower.isle line 182. 10444 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10445 let expr1_0 = 10446 constructor_sink_uload32(ctx, pattern8_0)?; 10447 let expr2_0 = constructor_add_logical_mem_zext32( 10448 ctx, pattern3_0, expr0_0, &expr1_0, 10449 )?; 10450 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10451 return Some(expr3_0); 10452 } 10453 } 10454 } 10455 } 10456 let pattern8_0 = C::value_type(ctx, pattern7_0); 10457 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10458 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10459 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10460 if let &InstructionData::Load { 10461 opcode: ref pattern12_0, 10462 arg: pattern12_1, 10463 flags: pattern12_2, 10464 offset: pattern12_3, 10465 } = &pattern11_0 10466 { 10467 if let &Opcode::Load = pattern12_0 { 10468 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10469 // Rule at src/isa/s390x/lower.isle line 176. 10470 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10471 let expr1_0 = 10472 constructor_sink_load(ctx, pattern10_0)?; 10473 let expr2_0 = constructor_add_logical_mem( 10474 ctx, pattern3_0, expr0_0, &expr1_0, 10475 )?; 10476 let expr3_0 = 10477 constructor_output_ifcout(ctx, expr2_0)?; 10478 return Some(expr3_0); 10479 } 10480 } 10481 } 10482 } 10483 } 10484 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10485 // Rule at src/isa/s390x/lower.isle line 168. 10486 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10487 let expr1_0 = constructor_add_logical_zimm32( 10488 ctx, pattern3_0, expr0_0, pattern8_0, 10489 )?; 10490 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10491 return Some(expr2_0); 10492 } 10493 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10494 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10495 if let &InstructionData::Unary { 10496 opcode: ref pattern10_0, 10497 arg: pattern10_1, 10498 } = &pattern9_0 10499 { 10500 if let &Opcode::Uextend = pattern10_0 { 10501 let pattern12_0 = C::value_type(ctx, pattern10_1); 10502 if pattern12_0 == I32 { 10503 // Rule at src/isa/s390x/lower.isle line 162. 10504 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10505 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10506 let expr2_0 = constructor_add_logical_reg_zext32( 10507 ctx, pattern3_0, expr0_0, expr1_0, 10508 )?; 10509 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10510 return Some(expr3_0); 10511 } 10512 } 10513 } 10514 } 10515 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10516 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10517 if let &InstructionData::Load { 10518 opcode: ref pattern10_0, 10519 arg: pattern10_1, 10520 flags: pattern10_2, 10521 offset: pattern10_3, 10522 } = &pattern9_0 10523 { 10524 if let &Opcode::Uload32 = pattern10_0 { 10525 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10526 // Rule at src/isa/s390x/lower.isle line 180. 10527 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10528 let expr1_0 = 10529 constructor_sink_uload32(ctx, pattern8_0)?; 10530 let expr2_0 = constructor_add_logical_mem_zext32( 10531 ctx, pattern3_0, expr0_0, &expr1_0, 10532 )?; 10533 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10534 return Some(expr3_0); 10535 } 10536 } 10537 } 10538 } 10539 let pattern8_0 = C::value_type(ctx, pattern7_1); 10540 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10541 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10542 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10543 if let &InstructionData::Load { 10544 opcode: ref pattern12_0, 10545 arg: pattern12_1, 10546 flags: pattern12_2, 10547 offset: pattern12_3, 10548 } = &pattern11_0 10549 { 10550 if let &Opcode::Load = pattern12_0 { 10551 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10552 // Rule at src/isa/s390x/lower.isle line 174. 10553 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10554 let expr1_0 = 10555 constructor_sink_load(ctx, pattern10_0)?; 10556 let expr2_0 = constructor_add_logical_mem( 10557 ctx, pattern3_0, expr0_0, &expr1_0, 10558 )?; 10559 let expr3_0 = 10560 constructor_output_ifcout(ctx, expr2_0)?; 10561 return Some(expr3_0); 10562 } 10563 } 10564 } 10565 } 10566 } 10567 // Rule at src/isa/s390x/lower.isle line 158. 10568 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10569 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10570 let expr2_0 = 10571 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10572 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10573 return Some(expr3_0); 10574 } 10575 &Opcode::Band => { 10576 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10577 let pattern8_0 = C::value_type(ctx, pattern7_0); 10578 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10579 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10580 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10581 if let &InstructionData::Load { 10582 opcode: ref pattern12_0, 10583 arg: pattern12_1, 10584 flags: pattern12_2, 10585 offset: pattern12_3, 10586 } = &pattern11_0 10587 { 10588 if let &Opcode::Load = pattern12_0 { 10589 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10590 // Rule at src/isa/s390x/lower.isle line 653. 10591 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10592 let expr1_0 = 10593 constructor_sink_load(ctx, pattern10_0)?; 10594 let expr2_0 = constructor_and_mem( 10595 ctx, pattern3_0, expr0_0, &expr1_0, 10596 )?; 10597 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10598 return Some(expr3_0); 10599 } 10600 } 10601 } 10602 } 10603 } 10604 if let Some(pattern8_0) = 10605 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10606 { 10607 // Rule at src/isa/s390x/lower.isle line 647. 10608 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10609 let expr1_0 = constructor_and_uimm32shifted( 10610 ctx, pattern3_0, expr0_0, pattern8_0, 10611 )?; 10612 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10613 return Some(expr2_0); 10614 } 10615 if let Some(pattern8_0) = 10616 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10617 { 10618 // Rule at src/isa/s390x/lower.isle line 643. 10619 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10620 let expr1_0 = constructor_and_uimm16shifted( 10621 ctx, pattern3_0, expr0_0, pattern8_0, 10622 )?; 10623 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10624 return Some(expr2_0); 10625 } 10626 let pattern8_0 = C::value_type(ctx, pattern7_1); 10627 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10628 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10629 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10630 if let &InstructionData::Load { 10631 opcode: ref pattern12_0, 10632 arg: pattern12_1, 10633 flags: pattern12_2, 10634 offset: pattern12_3, 10635 } = &pattern11_0 10636 { 10637 if let &Opcode::Load = pattern12_0 { 10638 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10639 // Rule at src/isa/s390x/lower.isle line 651. 10640 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10641 let expr1_0 = 10642 constructor_sink_load(ctx, pattern10_0)?; 10643 let expr2_0 = constructor_and_mem( 10644 ctx, pattern3_0, expr0_0, &expr1_0, 10645 )?; 10646 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10647 return Some(expr3_0); 10648 } 10649 } 10650 } 10651 } 10652 } 10653 if let Some(pattern8_0) = 10654 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10655 { 10656 // Rule at src/isa/s390x/lower.isle line 645. 10657 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10658 let expr1_0 = constructor_and_uimm32shifted( 10659 ctx, pattern3_0, expr0_0, pattern8_0, 10660 )?; 10661 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10662 return Some(expr2_0); 10663 } 10664 if let Some(pattern8_0) = 10665 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10666 { 10667 // Rule at src/isa/s390x/lower.isle line 641. 10668 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10669 let expr1_0 = constructor_and_uimm16shifted( 10670 ctx, pattern3_0, expr0_0, pattern8_0, 10671 )?; 10672 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10673 return Some(expr2_0); 10674 } 10675 // Rule at src/isa/s390x/lower.isle line 637. 10676 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10677 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10678 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10679 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10680 return Some(expr3_0); 10681 } 10682 &Opcode::Bor => { 10683 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10684 let pattern8_0 = C::value_type(ctx, pattern7_0); 10685 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10686 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10687 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10688 if let &InstructionData::Load { 10689 opcode: ref pattern12_0, 10690 arg: pattern12_1, 10691 flags: pattern12_2, 10692 offset: pattern12_3, 10693 } = &pattern11_0 10694 { 10695 if let &Opcode::Load = pattern12_0 { 10696 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10697 // Rule at src/isa/s390x/lower.isle line 676. 10698 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10699 let expr1_0 = 10700 constructor_sink_load(ctx, pattern10_0)?; 10701 let expr2_0 = constructor_or_mem( 10702 ctx, pattern3_0, expr0_0, &expr1_0, 10703 )?; 10704 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10705 return Some(expr3_0); 10706 } 10707 } 10708 } 10709 } 10710 } 10711 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10712 // Rule at src/isa/s390x/lower.isle line 670. 10713 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10714 let expr1_0 = constructor_or_uimm32shifted( 10715 ctx, pattern3_0, expr0_0, pattern8_0, 10716 )?; 10717 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10718 return Some(expr2_0); 10719 } 10720 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10721 // Rule at src/isa/s390x/lower.isle line 666. 10722 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10723 let expr1_0 = constructor_or_uimm16shifted( 10724 ctx, pattern3_0, expr0_0, pattern8_0, 10725 )?; 10726 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10727 return Some(expr2_0); 10728 } 10729 let pattern8_0 = C::value_type(ctx, pattern7_1); 10730 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10731 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10732 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10733 if let &InstructionData::Load { 10734 opcode: ref pattern12_0, 10735 arg: pattern12_1, 10736 flags: pattern12_2, 10737 offset: pattern12_3, 10738 } = &pattern11_0 10739 { 10740 if let &Opcode::Load = pattern12_0 { 10741 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10742 // Rule at src/isa/s390x/lower.isle line 674. 10743 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10744 let expr1_0 = 10745 constructor_sink_load(ctx, pattern10_0)?; 10746 let expr2_0 = constructor_or_mem( 10747 ctx, pattern3_0, expr0_0, &expr1_0, 10748 )?; 10749 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10750 return Some(expr3_0); 10751 } 10752 } 10753 } 10754 } 10755 } 10756 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10757 // Rule at src/isa/s390x/lower.isle line 668. 10758 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10759 let expr1_0 = constructor_or_uimm32shifted( 10760 ctx, pattern3_0, expr0_0, pattern8_0, 10761 )?; 10762 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10763 return Some(expr2_0); 10764 } 10765 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10766 // Rule at src/isa/s390x/lower.isle line 664. 10767 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10768 let expr1_0 = constructor_or_uimm16shifted( 10769 ctx, pattern3_0, expr0_0, pattern8_0, 10770 )?; 10771 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10772 return Some(expr2_0); 10773 } 10774 // Rule at src/isa/s390x/lower.isle line 660. 10775 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10776 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10777 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10778 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10779 return Some(expr3_0); 10780 } 10781 &Opcode::Bxor => { 10782 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10783 let pattern8_0 = C::value_type(ctx, pattern7_0); 10784 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10785 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10786 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10787 if let &InstructionData::Load { 10788 opcode: ref pattern12_0, 10789 arg: pattern12_1, 10790 flags: pattern12_2, 10791 offset: pattern12_3, 10792 } = &pattern11_0 10793 { 10794 if let &Opcode::Load = pattern12_0 { 10795 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10796 // Rule at src/isa/s390x/lower.isle line 695. 10797 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10798 let expr1_0 = 10799 constructor_sink_load(ctx, pattern10_0)?; 10800 let expr2_0 = constructor_xor_mem( 10801 ctx, pattern3_0, expr0_0, &expr1_0, 10802 )?; 10803 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10804 return Some(expr3_0); 10805 } 10806 } 10807 } 10808 } 10809 } 10810 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10811 // Rule at src/isa/s390x/lower.isle line 689. 10812 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10813 let expr1_0 = constructor_xor_uimm32shifted( 10814 ctx, pattern3_0, expr0_0, pattern8_0, 10815 )?; 10816 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10817 return Some(expr2_0); 10818 } 10819 let pattern8_0 = C::value_type(ctx, pattern7_1); 10820 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10821 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10822 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10823 if let &InstructionData::Load { 10824 opcode: ref pattern12_0, 10825 arg: pattern12_1, 10826 flags: pattern12_2, 10827 offset: pattern12_3, 10828 } = &pattern11_0 10829 { 10830 if let &Opcode::Load = pattern12_0 { 10831 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10832 // Rule at src/isa/s390x/lower.isle line 693. 10833 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10834 let expr1_0 = 10835 constructor_sink_load(ctx, pattern10_0)?; 10836 let expr2_0 = constructor_xor_mem( 10837 ctx, pattern3_0, expr0_0, &expr1_0, 10838 )?; 10839 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10840 return Some(expr3_0); 10841 } 10842 } 10843 } 10844 } 10845 } 10846 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10847 // Rule at src/isa/s390x/lower.isle line 687. 10848 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10849 let expr1_0 = constructor_xor_uimm32shifted( 10850 ctx, pattern3_0, expr0_0, pattern8_0, 10851 )?; 10852 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10853 return Some(expr2_0); 10854 } 10855 // Rule at src/isa/s390x/lower.isle line 683. 10856 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10857 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10858 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10859 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10860 return Some(expr3_0); 10861 } 10862 &Opcode::Ishl => { 10863 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10864 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10865 // Rule at src/isa/s390x/lower.isle line 482. 10866 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10867 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10868 let expr2_0 = 10869 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10870 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10871 return Some(expr3_0); 10872 } 10873 // Rule at src/isa/s390x/lower.isle line 477. 10874 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10875 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10876 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10877 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10878 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10879 return Some(expr4_0); 10880 } 10881 &Opcode::Ushr => { 10882 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10883 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10884 // Rule at src/isa/s390x/lower.isle line 498. 10885 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10886 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10887 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10888 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10889 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10890 return Some(expr4_0); 10891 } 10892 // Rule at src/isa/s390x/lower.isle line 491. 10893 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10894 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10895 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10896 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10897 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10898 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10899 return Some(expr5_0); 10900 } 10901 &Opcode::Sshr => { 10902 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10903 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10904 // Rule at src/isa/s390x/lower.isle line 515. 10905 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10906 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10907 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10908 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10909 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10910 return Some(expr4_0); 10911 } 10912 // Rule at src/isa/s390x/lower.isle line 508. 10913 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10914 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10915 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10916 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10917 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10918 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10919 return Some(expr5_0); 10920 } 10921 _ => {} 10922 } 10923 } 10924 &InstructionData::Unary { 10925 opcode: ref pattern5_0, 10926 arg: pattern5_1, 10927 } => { 10928 match pattern5_0 { 10929 &Opcode::Ineg => { 10930 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10931 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10932 if let &InstructionData::Unary { 10933 opcode: ref pattern9_0, 10934 arg: pattern9_1, 10935 } = &pattern8_0 10936 { 10937 if let &Opcode::Sextend = pattern9_0 { 10938 let pattern11_0 = C::value_type(ctx, pattern9_1); 10939 if pattern11_0 == I32 { 10940 // Rule at src/isa/s390x/lower.isle line 193. 10941 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10942 let expr1_0 = constructor_neg_reg_sext32( 10943 ctx, pattern3_0, expr0_0, 10944 )?; 10945 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10946 return Some(expr2_0); 10947 } 10948 } 10949 } 10950 } 10951 // Rule at src/isa/s390x/lower.isle line 189. 10952 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10953 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10954 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10955 return Some(expr2_0); 10956 } 10957 &Opcode::Iabs => { 10958 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10959 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10960 if let &InstructionData::Unary { 10961 opcode: ref pattern9_0, 10962 arg: pattern9_1, 10963 } = &pattern8_0 10964 { 10965 if let &Opcode::Sextend = pattern9_0 { 10966 let pattern11_0 = C::value_type(ctx, pattern9_1); 10967 if pattern11_0 == I32 { 10968 // Rule at src/isa/s390x/lower.isle line 141. 10969 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10970 let expr1_0 = constructor_abs_reg_sext32( 10971 ctx, pattern3_0, expr0_0, 10972 )?; 10973 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10974 return Some(expr2_0); 10975 } 10976 } 10977 } 10978 } 10979 // Rule at src/isa/s390x/lower.isle line 137. 10980 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10981 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10982 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10983 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10984 return Some(expr3_0); 10985 } 10986 &Opcode::Clz => { 10987 // Rule at src/isa/s390x/lower.isle line 821. 10988 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10989 let expr1_0: i16 = 64; 10990 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10991 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10992 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10993 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10994 return Some(expr5_0); 10995 } 10996 &Opcode::Cls => { 10997 // Rule at src/isa/s390x/lower.isle line 836. 10998 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 10999 let expr1_0: Type = I64; 11000 let expr2_0: u8 = 63; 11001 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11002 let expr4_0: Type = I64; 11003 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11004 let expr6_0: i16 = 64; 11005 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11006 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11007 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11008 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11009 return Some(expr10_0); 11010 } 11011 &Opcode::Bint => { 11012 // Rule at src/isa/s390x/lower.isle line 804. 11013 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11014 let expr1_0: u64 = 1; 11015 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11016 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11017 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11018 return Some(expr4_0); 11019 } 11020 _ => {} 11021 } 11022 } 11023 _ => {} 11024 } 11025 } 11026 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11027 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11028 match &pattern4_0 { 11029 &InstructionData::Binary { 11030 opcode: ref pattern5_0, 11031 args: ref pattern5_1, 11032 } => { 11033 match pattern5_0 { 11034 &Opcode::Rotl => { 11035 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11036 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11037 // Rule at src/isa/s390x/lower.isle line 528. 11038 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11039 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11040 let expr2_0 = 11041 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11042 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11043 return Some(expr3_0); 11044 } 11045 // Rule at src/isa/s390x/lower.isle line 524. 11046 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11047 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11048 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11049 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11050 return Some(expr3_0); 11051 } 11052 &Opcode::Rotr => { 11053 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11054 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11055 // Rule at src/isa/s390x/lower.isle line 566. 11056 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11057 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11058 let expr2_0 = 11059 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11060 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11061 return Some(expr3_0); 11062 } 11063 // Rule at src/isa/s390x/lower.isle line 560. 11064 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11065 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11066 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11067 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11068 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11069 return Some(expr4_0); 11070 } 11071 _ => {} 11072 } 11073 } 11074 &InstructionData::AtomicRmw { 11075 opcode: ref pattern5_0, 11076 args: ref pattern5_1, 11077 flags: pattern5_2, 11078 op: ref pattern5_3, 11079 } => { 11080 if let &Opcode::AtomicRmw = pattern5_0 { 11081 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11082 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11083 match pattern5_3 { 11084 &AtomicRmwOp::And => { 11085 // Rule at src/isa/s390x/lower.isle line 1505. 11086 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11087 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11088 let expr2_0 = C::zero_offset(ctx); 11089 let expr3_0 = constructor_lower_address( 11090 ctx, pattern5_2, pattern7_0, expr2_0, 11091 )?; 11092 let expr4_0 = constructor_atomic_rmw_and( 11093 ctx, pattern3_0, expr1_0, &expr3_0, 11094 )?; 11095 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11096 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11097 return Some(expr6_0); 11098 } 11099 &AtomicRmwOp::Or => { 11100 // Rule at src/isa/s390x/lower.isle line 1517. 11101 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11102 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11103 let expr2_0 = C::zero_offset(ctx); 11104 let expr3_0 = constructor_lower_address( 11105 ctx, pattern5_2, pattern7_0, expr2_0, 11106 )?; 11107 let expr4_0 = constructor_atomic_rmw_or( 11108 ctx, pattern3_0, expr1_0, &expr3_0, 11109 )?; 11110 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11111 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11112 return Some(expr6_0); 11113 } 11114 &AtomicRmwOp::Xor => { 11115 // Rule at src/isa/s390x/lower.isle line 1529. 11116 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11117 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11118 let expr2_0 = C::zero_offset(ctx); 11119 let expr3_0 = constructor_lower_address( 11120 ctx, pattern5_2, pattern7_0, expr2_0, 11121 )?; 11122 let expr4_0 = constructor_atomic_rmw_xor( 11123 ctx, pattern3_0, expr1_0, &expr3_0, 11124 )?; 11125 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11126 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11127 return Some(expr6_0); 11128 } 11129 _ => {} 11130 } 11131 } 11132 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11133 match pattern5_3 { 11134 &AtomicRmwOp::Add => { 11135 // Rule at src/isa/s390x/lower.isle line 1535. 11136 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11137 let expr1_0 = C::zero_offset(ctx); 11138 let expr2_0 = constructor_lower_address( 11139 ctx, pattern5_2, pattern7_0, expr1_0, 11140 )?; 11141 let expr3_0 = constructor_atomic_rmw_add( 11142 ctx, pattern3_0, expr0_0, &expr2_0, 11143 )?; 11144 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11145 return Some(expr4_0); 11146 } 11147 &AtomicRmwOp::And => { 11148 // Rule at src/isa/s390x/lower.isle line 1499. 11149 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11150 let expr1_0 = C::zero_offset(ctx); 11151 let expr2_0 = constructor_lower_address( 11152 ctx, pattern5_2, pattern7_0, expr1_0, 11153 )?; 11154 let expr3_0 = constructor_atomic_rmw_and( 11155 ctx, pattern3_0, expr0_0, &expr2_0, 11156 )?; 11157 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11158 return Some(expr4_0); 11159 } 11160 &AtomicRmwOp::Or => { 11161 // Rule at src/isa/s390x/lower.isle line 1511. 11162 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11163 let expr1_0 = C::zero_offset(ctx); 11164 let expr2_0 = constructor_lower_address( 11165 ctx, pattern5_2, pattern7_0, expr1_0, 11166 )?; 11167 let expr3_0 = constructor_atomic_rmw_or( 11168 ctx, pattern3_0, expr0_0, &expr2_0, 11169 )?; 11170 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11171 return Some(expr4_0); 11172 } 11173 &AtomicRmwOp::Sub => { 11174 // Rule at src/isa/s390x/lower.isle line 1541. 11175 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11176 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11177 let expr2_0 = C::zero_offset(ctx); 11178 let expr3_0 = constructor_lower_address( 11179 ctx, pattern5_2, pattern7_0, expr2_0, 11180 )?; 11181 let expr4_0 = constructor_atomic_rmw_add( 11182 ctx, pattern3_0, expr1_0, &expr3_0, 11183 )?; 11184 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11185 return Some(expr5_0); 11186 } 11187 &AtomicRmwOp::Xor => { 11188 // Rule at src/isa/s390x/lower.isle line 1523. 11189 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11190 let expr1_0 = C::zero_offset(ctx); 11191 let expr2_0 = constructor_lower_address( 11192 ctx, pattern5_2, pattern7_0, expr1_0, 11193 )?; 11194 let expr3_0 = constructor_atomic_rmw_xor( 11195 ctx, pattern3_0, expr0_0, &expr2_0, 11196 )?; 11197 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11198 return Some(expr4_0); 11199 } 11200 _ => {} 11201 } 11202 } 11203 // Rule at src/isa/s390x/lower.isle line 1550. 11204 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11205 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11206 let expr2_0 = C::inst_builder_new(ctx); 11207 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11208 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11209 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11210 let expr6_0 = constructor_atomic_rmw_body( 11211 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11212 expr0_0, 11213 )?; 11214 let expr7_0 = constructor_casloop( 11215 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11216 )?; 11217 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11218 return Some(expr8_0); 11219 } 11220 } 11221 &InstructionData::AtomicCas { 11222 opcode: ref pattern5_0, 11223 args: ref pattern5_1, 11224 flags: pattern5_2, 11225 } => { 11226 if let &Opcode::AtomicCas = pattern5_0 { 11227 let (pattern7_0, pattern7_1, pattern7_2) = 11228 C::unpack_value_array_3(ctx, pattern5_1); 11229 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11230 // Rule at src/isa/s390x/lower.isle line 1762. 11231 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11232 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11233 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11234 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11235 let expr4_0 = C::zero_offset(ctx); 11236 let expr5_0 = 11237 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11238 let expr6_0 = constructor_atomic_cas_impl( 11239 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11240 )?; 11241 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11242 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11243 return Some(expr8_0); 11244 } 11245 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11246 // Rule at src/isa/s390x/lower.isle line 1755. 11247 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11248 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11249 let expr2_0 = C::zero_offset(ctx); 11250 let expr3_0 = 11251 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11252 let expr4_0 = constructor_atomic_cas_impl( 11253 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11254 )?; 11255 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11256 return Some(expr5_0); 11257 } 11258 } 11259 } 11260 &InstructionData::Unary { 11261 opcode: ref pattern5_0, 11262 arg: pattern5_1, 11263 } => { 11264 match pattern5_0 { 11265 &Opcode::FcvtToUint => { 11266 let pattern7_0 = C::value_type(ctx, pattern5_1); 11267 // Rule at src/isa/s390x/lower.isle line 1057. 11268 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11269 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11270 let expr2_0 = FloatCC::Unordered; 11271 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11272 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11273 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11274 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11275 ctx, pattern3_0, pattern7_0, expr0_0, 11276 )?; 11277 let expr7_0 = FloatCC::Unordered; 11278 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11279 let expr9_0 = C::trap_code_integer_overflow(ctx); 11280 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11281 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11282 return Some(expr11_0); 11283 } 11284 &Opcode::FcvtToUintSat => { 11285 let pattern7_0 = C::value_type(ctx, pattern5_1); 11286 // Rule at src/isa/s390x/lower.isle line 1098. 11287 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11288 let expr1_0 = 11289 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11290 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11291 let expr3_0 = FloatCC::Unordered; 11292 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11293 let expr5_0: i16 = 0; 11294 let expr6_0 = 11295 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11296 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11297 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11298 return Some(expr8_0); 11299 } 11300 &Opcode::FcvtToSint => { 11301 let pattern7_0 = C::value_type(ctx, pattern5_1); 11302 // Rule at src/isa/s390x/lower.isle line 1078. 11303 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11304 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11305 let expr2_0 = FloatCC::Unordered; 11306 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11307 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11308 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11309 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11310 ctx, pattern3_0, pattern7_0, expr0_0, 11311 )?; 11312 let expr7_0 = FloatCC::Unordered; 11313 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11314 let expr9_0 = C::trap_code_integer_overflow(ctx); 11315 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11316 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11317 return Some(expr11_0); 11318 } 11319 &Opcode::FcvtToSintSat => { 11320 let pattern7_0 = C::value_type(ctx, pattern5_1); 11321 // Rule at src/isa/s390x/lower.isle line 1115. 11322 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11323 let expr1_0 = 11324 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11325 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11326 let expr3_0 = FloatCC::Unordered; 11327 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11328 let expr5_0: i16 = 0; 11329 let expr6_0 = 11330 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11331 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11332 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11333 return Some(expr8_0); 11334 } 11335 _ => {} 11336 } 11337 } 11338 _ => {} 11339 } 11340 } 11341 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11342 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11343 match &pattern4_0 { 11344 &InstructionData::Binary { 11345 opcode: ref pattern5_0, 11346 args: ref pattern5_1, 11347 } => { 11348 match pattern5_0 { 11349 &Opcode::Umulhi => { 11350 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11351 // Rule at src/isa/s390x/lower.isle line 245. 11352 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11353 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11354 let expr2_0: Type = I32; 11355 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11356 let expr4_0: Type = I32; 11357 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11358 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11359 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11360 return Some(expr7_0); 11361 } 11362 &Opcode::Smulhi => { 11363 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11364 // Rule at src/isa/s390x/lower.isle line 267. 11365 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11366 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11367 let expr2_0: Type = I32; 11368 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11369 let expr4_0: Type = I32; 11370 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11371 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11372 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11373 return Some(expr7_0); 11374 } 11375 &Opcode::Rotl => { 11376 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11377 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11378 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11379 { 11380 // Rule at src/isa/s390x/lower.isle line 546. 11381 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11382 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11383 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11384 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11385 let expr4_0 = 11386 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11387 let expr5_0 = 11388 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11389 let expr6_0 = 11390 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11391 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11392 return Some(expr7_0); 11393 } 11394 } 11395 // Rule at src/isa/s390x/lower.isle line 534. 11396 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11397 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11398 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11399 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11400 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11401 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11402 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11403 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11404 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11405 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11406 return Some(expr9_0); 11407 } 11408 &Opcode::Rotr => { 11409 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11410 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11411 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11412 { 11413 // Rule at src/isa/s390x/lower.isle line 584. 11414 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11415 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11416 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11417 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11418 let expr4_0 = 11419 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11420 let expr5_0 = 11421 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11422 let expr6_0 = 11423 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11424 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11425 return Some(expr7_0); 11426 } 11427 } 11428 // Rule at src/isa/s390x/lower.isle line 572. 11429 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11430 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11431 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11432 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11433 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11434 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11435 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11436 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11437 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11438 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11439 return Some(expr9_0); 11440 } 11441 _ => {} 11442 } 11443 } 11444 &InstructionData::AtomicRmw { 11445 opcode: ref pattern5_0, 11446 args: ref pattern5_1, 11447 flags: pattern5_2, 11448 op: ref pattern5_3, 11449 } => { 11450 if let &Opcode::AtomicRmw = pattern5_0 { 11451 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11452 // Rule at src/isa/s390x/lower.isle line 1562. 11453 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11454 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11455 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11456 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11457 let expr4_0 = C::inst_builder_new(ctx); 11458 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11459 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11460 let expr7_0 = constructor_casloop_rotate_in( 11461 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11462 )?; 11463 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11464 let expr9_0 = constructor_atomic_rmw_body( 11465 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11466 expr0_0, 11467 )?; 11468 let expr10_0 = constructor_casloop_rotate_out( 11469 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11470 )?; 11471 let expr11_0 = constructor_casloop_subword( 11472 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11473 )?; 11474 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11475 return Some(expr12_0); 11476 } 11477 } 11478 &InstructionData::AtomicCas { 11479 opcode: ref pattern5_0, 11480 args: ref pattern5_1, 11481 flags: pattern5_2, 11482 } => { 11483 if let &Opcode::AtomicCas = pattern5_0 { 11484 let (pattern7_0, pattern7_1, pattern7_2) = 11485 C::unpack_value_array_3(ctx, pattern5_1); 11486 // Rule at src/isa/s390x/lower.isle line 1769. 11487 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11488 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11489 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11490 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11491 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11492 let expr5_0 = C::inst_builder_new(ctx); 11493 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11494 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11495 let expr8_0 = constructor_casloop_rotate_in( 11496 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11497 )?; 11498 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11499 let expr10_0 = constructor_atomic_cas_body( 11500 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11501 expr1_0, 11502 )?; 11503 let expr11_0 = constructor_casloop_rotate_out( 11504 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11505 )?; 11506 let expr12_0 = constructor_casloop_subword( 11507 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11508 )?; 11509 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11510 return Some(expr13_0); 11511 } 11512 } 11513 _ => {} 11514 } 11515 } 11516 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11517 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11518 match &pattern4_0 { 11519 &InstructionData::Unary { 11520 opcode: ref pattern5_0, 11521 arg: pattern5_1, 11522 } => { 11523 match pattern5_0 { 11524 &Opcode::Ctz => { 11525 // Rule at src/isa/s390x/lower.isle line 859. 11526 let expr0_0: Type = I64; 11527 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11528 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11529 let expr3_0 = 11530 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11531 let expr4_0: Type = I64; 11532 let expr5_0: Type = I64; 11533 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11534 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11535 let expr8_0: i16 = 64; 11536 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11537 let expr10_0: u64 = 63; 11538 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11539 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11540 let expr13_0 = 11541 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11542 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11543 return Some(expr14_0); 11544 } 11545 &Opcode::Uextend => { 11546 // Rule at src/isa/s390x/lower.isle line 603. 11547 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11548 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11549 return Some(expr1_0); 11550 } 11551 &Opcode::Sextend => { 11552 // Rule at src/isa/s390x/lower.isle line 614. 11553 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11554 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11555 return Some(expr1_0); 11556 } 11557 _ => {} 11558 } 11559 } 11560 &InstructionData::Load { 11561 opcode: ref pattern5_0, 11562 arg: pattern5_1, 11563 flags: pattern5_2, 11564 offset: pattern5_3, 11565 } => { 11566 match pattern5_0 { 11567 &Opcode::Uload8 => { 11568 // Rule at src/isa/s390x/lower.isle line 1251. 11569 let expr0_0: Type = I8; 11570 let expr1_0 = 11571 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11572 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11573 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11574 return Some(expr3_0); 11575 } 11576 &Opcode::Sload8 => { 11577 // Rule at src/isa/s390x/lower.isle line 1262. 11578 let expr0_0: Type = I8; 11579 let expr1_0 = 11580 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11581 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11582 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11583 return Some(expr3_0); 11584 } 11585 &Opcode::Uload16 => { 11586 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11587 // Rule at src/isa/s390x/lower.isle line 1278. 11588 let expr0_0 = constructor_lower_address( 11589 ctx, pattern5_2, pattern5_1, pattern5_3, 11590 )?; 11591 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11592 let expr2_0: Type = I16; 11593 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11594 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11595 return Some(expr4_0); 11596 } 11597 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11598 // Rule at src/isa/s390x/lower.isle line 1273. 11599 let expr0_0: Type = I16; 11600 let expr1_0 = constructor_lower_address( 11601 ctx, pattern5_2, pattern5_1, pattern5_3, 11602 )?; 11603 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11604 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11605 return Some(expr3_0); 11606 } 11607 } 11608 &Opcode::Sload16 => { 11609 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11610 // Rule at src/isa/s390x/lower.isle line 1303. 11611 let expr0_0 = constructor_lower_address( 11612 ctx, pattern5_2, pattern5_1, pattern5_3, 11613 )?; 11614 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11615 let expr2_0: Type = I16; 11616 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11617 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11618 return Some(expr4_0); 11619 } 11620 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11621 // Rule at src/isa/s390x/lower.isle line 1298. 11622 let expr0_0: Type = I16; 11623 let expr1_0 = constructor_lower_address( 11624 ctx, pattern5_2, pattern5_1, pattern5_3, 11625 )?; 11626 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11627 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11628 return Some(expr3_0); 11629 } 11630 } 11631 _ => {} 11632 } 11633 } 11634 _ => {} 11635 } 11636 } 11637 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11638 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11639 match &pattern4_0 { 11640 &InstructionData::Unary { 11641 opcode: ref pattern5_0, 11642 arg: pattern5_1, 11643 } => { 11644 match pattern5_0 { 11645 &Opcode::Ctz => { 11646 // Rule at src/isa/s390x/lower.isle line 874. 11647 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11648 let expr1_0: Type = I64; 11649 let expr2_0: Type = I64; 11650 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11651 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11652 let expr5_0: i16 = -1; 11653 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11654 let expr7_0: Type = I64; 11655 let expr8_0: Type = I64; 11656 let expr9_0: u64 = 63; 11657 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11658 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11659 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11660 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11661 return Some(expr13_0); 11662 } 11663 &Opcode::Uextend => { 11664 // Rule at src/isa/s390x/lower.isle line 607. 11665 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11666 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11667 return Some(expr1_0); 11668 } 11669 &Opcode::Sextend => { 11670 // Rule at src/isa/s390x/lower.isle line 618. 11671 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11672 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11673 return Some(expr1_0); 11674 } 11675 _ => {} 11676 } 11677 } 11678 &InstructionData::Load { 11679 opcode: ref pattern5_0, 11680 arg: pattern5_1, 11681 flags: pattern5_2, 11682 offset: pattern5_3, 11683 } => { 11684 match pattern5_0 { 11685 &Opcode::Uload8 => { 11686 // Rule at src/isa/s390x/lower.isle line 1255. 11687 let expr0_0: Type = I8; 11688 let expr1_0 = 11689 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11690 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11691 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11692 return Some(expr3_0); 11693 } 11694 &Opcode::Sload8 => { 11695 // Rule at src/isa/s390x/lower.isle line 1266. 11696 let expr0_0: Type = I8; 11697 let expr1_0 = 11698 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11699 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11700 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11701 return Some(expr3_0); 11702 } 11703 &Opcode::Uload16 => { 11704 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11705 // Rule at src/isa/s390x/lower.isle line 1289. 11706 let expr0_0 = constructor_lower_address( 11707 ctx, pattern5_2, pattern5_1, pattern5_3, 11708 )?; 11709 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11710 let expr2_0: Type = I16; 11711 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11712 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11713 return Some(expr4_0); 11714 } 11715 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11716 // Rule at src/isa/s390x/lower.isle line 1284. 11717 let expr0_0: Type = I16; 11718 let expr1_0 = constructor_lower_address( 11719 ctx, pattern5_2, pattern5_1, pattern5_3, 11720 )?; 11721 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11722 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11723 return Some(expr3_0); 11724 } 11725 } 11726 &Opcode::Sload16 => { 11727 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11728 // Rule at src/isa/s390x/lower.isle line 1314. 11729 let expr0_0 = constructor_lower_address( 11730 ctx, pattern5_2, pattern5_1, pattern5_3, 11731 )?; 11732 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11733 let expr2_0: Type = I16; 11734 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11735 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11736 return Some(expr4_0); 11737 } 11738 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11739 // Rule at src/isa/s390x/lower.isle line 1309. 11740 let expr0_0: Type = I16; 11741 let expr1_0 = constructor_lower_address( 11742 ctx, pattern5_2, pattern5_1, pattern5_3, 11743 )?; 11744 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11745 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11746 return Some(expr3_0); 11747 } 11748 } 11749 &Opcode::Uload32 => { 11750 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11751 // Rule at src/isa/s390x/lower.isle line 1328. 11752 let expr0_0 = constructor_lower_address( 11753 ctx, pattern5_2, pattern5_1, pattern5_3, 11754 )?; 11755 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11756 let expr2_0: Type = I32; 11757 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11758 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11759 return Some(expr4_0); 11760 } 11761 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11762 // Rule at src/isa/s390x/lower.isle line 1323. 11763 let expr0_0: Type = I32; 11764 let expr1_0 = constructor_lower_address( 11765 ctx, pattern5_2, pattern5_1, pattern5_3, 11766 )?; 11767 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11768 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11769 return Some(expr3_0); 11770 } 11771 } 11772 &Opcode::Sload32 => { 11773 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11774 // Rule at src/isa/s390x/lower.isle line 1342. 11775 let expr0_0 = constructor_lower_address( 11776 ctx, pattern5_2, pattern5_1, pattern5_3, 11777 )?; 11778 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11779 let expr2_0: Type = I32; 11780 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11781 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11782 return Some(expr4_0); 11783 } 11784 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11785 // Rule at src/isa/s390x/lower.isle line 1337. 11786 let expr0_0: Type = I32; 11787 let expr1_0 = constructor_lower_address( 11788 ctx, pattern5_2, pattern5_1, pattern5_3, 11789 )?; 11790 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11791 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11792 return Some(expr3_0); 11793 } 11794 } 11795 _ => {} 11796 } 11797 } 11798 _ => {} 11799 } 11800 } 11801 } 11802 return None; 11803 } 11804 11805 // Generated as internal constructor for term lower_branch. 11806 pub fn constructor_lower_branch<C: Context>( 11807 ctx: &mut C, 11808 arg0: Inst, 11809 arg1: &VecMachLabel, 11810 ) -> Option<InstOutput> { 11811 let pattern0_0 = arg0; 11812 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11813 match &pattern1_0 { 11814 &InstructionData::BranchTable { 11815 opcode: ref pattern2_0, 11816 arg: pattern2_1, 11817 destination: pattern2_2, 11818 table: pattern2_3, 11819 } => { 11820 if let &Opcode::BrTable = pattern2_0 { 11821 let pattern4_0 = arg1; 11822 // Rule at src/isa/s390x/lower.isle line 2076. 11823 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11824 let expr1_0: Type = I64; 11825 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11826 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11827 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11828 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11829 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11830 let expr7_0: u8 = 0; 11831 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11832 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11833 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11834 let expr11_0: Type = I64; 11835 let expr12_0: u8 = 2; 11836 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11837 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11838 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11839 return Some(expr15_0); 11840 } 11841 } 11842 &InstructionData::Branch { 11843 opcode: ref pattern2_0, 11844 args: pattern2_1, 11845 destination: pattern2_2, 11846 } => { 11847 match pattern2_0 { 11848 &Opcode::Brz => { 11849 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11850 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11851 let pattern6_0 = arg1; 11852 // Rule at src/isa/s390x/lower.isle line 2109. 11853 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11854 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11855 let expr2_0: u8 = 0; 11856 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11857 let expr4_0: u8 = 1; 11858 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11859 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11860 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11861 return Some(expr7_0); 11862 } 11863 } 11864 &Opcode::Brnz => { 11865 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11866 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11867 let pattern6_0 = arg1; 11868 // Rule at src/isa/s390x/lower.isle line 2120. 11869 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11870 let expr1_0: u8 = 0; 11871 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11872 let expr3_0: u8 = 1; 11873 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11874 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11875 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11876 return Some(expr6_0); 11877 } 11878 } 11879 _ => {} 11880 } 11881 } 11882 &InstructionData::Jump { 11883 opcode: ref pattern2_0, 11884 args: pattern2_1, 11885 destination: pattern2_2, 11886 } => { 11887 if let &Opcode::Jump = pattern2_0 { 11888 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11889 let pattern5_0 = arg1; 11890 // Rule at src/isa/s390x/lower.isle line 2068. 11891 let expr0_0: u8 = 0; 11892 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11893 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11894 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11895 return Some(expr3_0); 11896 } 11897 } 11898 &InstructionData::BranchInt { 11899 opcode: ref pattern2_0, 11900 args: pattern2_1, 11901 cond: ref pattern2_2, 11902 destination: pattern2_3, 11903 } => { 11904 if let &Opcode::Brif = pattern2_0 { 11905 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11906 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11907 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11908 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11909 if let &InstructionData::Binary { 11910 opcode: ref pattern8_0, 11911 args: ref pattern8_1, 11912 } = &pattern7_0 11913 { 11914 if let &Opcode::Ifcmp = pattern8_0 { 11915 let (pattern10_0, pattern10_1) = 11916 C::unpack_value_array_2(ctx, pattern8_1); 11917 let pattern11_0 = arg1; 11918 // Rule at src/isa/s390x/lower.isle line 2131. 11919 let expr0_0: bool = false; 11920 let expr1_0 = constructor_icmp_val( 11921 ctx, 11922 expr0_0, 11923 pattern2_2, 11924 pattern10_0, 11925 pattern10_1, 11926 )?; 11927 let expr2_0: u8 = 0; 11928 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11929 let expr4_0: u8 = 1; 11930 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11931 let expr6_0 = 11932 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11933 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11934 return Some(expr7_0); 11935 } 11936 } 11937 } 11938 } 11939 } 11940 } 11941 _ => {} 11942 } 11943 return None; 11944 } 11945 11946 // Generated as internal constructor for term output_ifcout. 11947 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11948 let pattern0_0 = arg0; 11949 // Rule at src/isa/s390x/lower.isle line 154. 11950 let expr0_0 = C::value_reg(ctx, pattern0_0); 11951 let expr1_0 = C::value_regs_invalid(ctx); 11952 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11953 return Some(expr2_0); 11954 } 11955 11956 // Generated as internal constructor for term zero_divisor_check_needed. 11957 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11958 let pattern0_0 = arg0; 11959 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11960 let pattern2_0 = 0; 11961 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11962 // Rule at src/isa/s390x/lower.isle line 344. 11963 let expr0_0: bool = false; 11964 return Some(expr0_0); 11965 } 11966 } 11967 let pattern1_0 = C::value_type(ctx, pattern0_0); 11968 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11969 // Rule at src/isa/s390x/lower.isle line 345. 11970 let expr0_0: bool = false; 11971 return Some(expr0_0); 11972 } 11973 // Rule at src/isa/s390x/lower.isle line 346. 11974 let expr0_0: bool = true; 11975 return Some(expr0_0); 11976 } 11977 11978 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11979 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11980 ctx: &mut C, 11981 arg0: bool, 11982 arg1: Type, 11983 arg2: Reg, 11984 ) -> Option<Reg> { 11985 let pattern0_0 = arg0; 11986 if pattern0_0 == true { 11987 let pattern2_0 = arg1; 11988 let pattern3_0 = arg2; 11989 // Rule at src/isa/s390x/lower.isle line 352. 11990 let expr0_0: i16 = 0; 11991 let expr1_0 = IntCC::Equal; 11992 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11993 let expr3_0 = C::trap_code_division_by_zero(ctx); 11994 let expr4_0 = constructor_icmps_simm16_and_trap( 11995 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 11996 )?; 11997 return Some(expr4_0); 11998 } 11999 if pattern0_0 == false { 12000 let pattern2_0 = arg1; 12001 let pattern3_0 = arg2; 12002 // Rule at src/isa/s390x/lower.isle line 351. 12003 let expr0_0 = C::invalid_reg(ctx); 12004 return Some(expr0_0); 12005 } 12006 return None; 12007 } 12008 12009 // Generated as internal constructor for term div_overflow_check_needed. 12010 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12011 let pattern0_0 = arg0; 12012 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12013 let pattern2_0 = -1; 12014 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12015 // Rule at src/isa/s390x/lower.isle line 425. 12016 let expr0_0: bool = false; 12017 return Some(expr0_0); 12018 } 12019 } 12020 // Rule at src/isa/s390x/lower.isle line 426. 12021 let expr0_0: bool = true; 12022 return Some(expr0_0); 12023 } 12024 12025 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12026 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12027 ctx: &mut C, 12028 arg0: bool, 12029 arg1: Type, 12030 arg2: Type, 12031 arg3: &RegPair, 12032 arg4: Reg, 12033 ) -> Option<Reg> { 12034 let pattern0_0 = arg0; 12035 if pattern0_0 == true { 12036 let pattern2_0 = arg1; 12037 let pattern3_0 = arg2; 12038 let pattern4_0 = arg3; 12039 let pattern5_0 = arg4; 12040 // Rule at src/isa/s390x/lower.isle line 439. 12041 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12042 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12043 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12044 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12045 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12046 let expr5_0: i16 = -1; 12047 let expr6_0 = IntCC::Equal; 12048 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12049 let expr8_0 = C::trap_code_integer_overflow(ctx); 12050 let expr9_0 = constructor_icmps_simm16_and_trap( 12051 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12052 )?; 12053 return Some(expr9_0); 12054 } 12055 if pattern0_0 == false { 12056 let pattern2_0 = arg1; 12057 let pattern3_0 = arg2; 12058 let pattern4_0 = arg3; 12059 let pattern5_0 = arg4; 12060 // Rule at src/isa/s390x/lower.isle line 438. 12061 let expr0_0 = C::invalid_reg(ctx); 12062 return Some(expr0_0); 12063 } 12064 return None; 12065 } 12066 12067 // Generated as internal constructor for term int_max. 12068 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12069 let pattern0_0 = arg0; 12070 if pattern0_0 == I8 { 12071 // Rule at src/isa/s390x/lower.isle line 447. 12072 let expr0_0: u64 = 127; 12073 return Some(expr0_0); 12074 } 12075 if pattern0_0 == I16 { 12076 // Rule at src/isa/s390x/lower.isle line 448. 12077 let expr0_0: u64 = 32767; 12078 return Some(expr0_0); 12079 } 12080 if pattern0_0 == I32 { 12081 // Rule at src/isa/s390x/lower.isle line 449. 12082 let expr0_0: u64 = 2147483647; 12083 return Some(expr0_0); 12084 } 12085 if pattern0_0 == I64 { 12086 // Rule at src/isa/s390x/lower.isle line 450. 12087 let expr0_0: u64 = 9223372036854775807; 12088 return Some(expr0_0); 12089 } 12090 return None; 12091 } 12092 12093 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12094 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12095 ctx: &mut C, 12096 arg0: bool, 12097 arg1: Type, 12098 arg2: &RegPair, 12099 arg3: Reg, 12100 ) -> Option<RegPair> { 12101 let pattern0_0 = arg0; 12102 if pattern0_0 == true { 12103 let pattern2_0 = arg1; 12104 if pattern2_0 == I32 { 12105 let pattern4_0 = arg2; 12106 let pattern5_0 = arg3; 12107 // Rule at src/isa/s390x/lower.isle line 468. 12108 return Some(pattern4_0.clone()); 12109 } 12110 if pattern2_0 == I64 { 12111 let pattern4_0 = arg2; 12112 let pattern5_0 = arg3; 12113 // Rule at src/isa/s390x/lower.isle line 469. 12114 let expr0_0: Type = I64; 12115 let expr1_0: Type = I64; 12116 let expr2_0: i16 = -1; 12117 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12118 let expr4_0 = IntCC::Equal; 12119 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12120 let expr6_0: i16 = 0; 12121 let expr7_0 = constructor_cmov_imm_regpair_lo( 12122 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12123 )?; 12124 return Some(expr7_0); 12125 } 12126 } 12127 if pattern0_0 == false { 12128 let pattern2_0 = arg1; 12129 let pattern3_0 = arg2; 12130 let pattern4_0 = arg3; 12131 // Rule at src/isa/s390x/lower.isle line 467. 12132 return Some(pattern3_0.clone()); 12133 } 12134 return None; 12135 } 12136 12137 // Generated as internal constructor for term cast_bool. 12138 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12139 let pattern0_0 = arg0; 12140 if pattern0_0 == B1 { 12141 let pattern2_0 = arg1; 12142 let pattern3_0 = C::value_type(ctx, pattern2_0); 12143 if pattern3_0 == B1 { 12144 // Rule at src/isa/s390x/lower.isle line 766. 12145 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12146 return Some(expr0_0); 12147 } 12148 if pattern3_0 == B8 { 12149 // Rule at src/isa/s390x/lower.isle line 767. 12150 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12151 return Some(expr0_0); 12152 } 12153 } 12154 if pattern0_0 == B8 { 12155 let pattern2_0 = arg1; 12156 let pattern3_0 = C::value_type(ctx, pattern2_0); 12157 if pattern3_0 == B8 { 12158 // Rule at src/isa/s390x/lower.isle line 768. 12159 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12160 return Some(expr0_0); 12161 } 12162 } 12163 if pattern0_0 == I8 { 12164 let pattern2_0 = arg1; 12165 let pattern3_0 = C::value_type(ctx, pattern2_0); 12166 if pattern3_0 == B8 { 12167 // Rule at src/isa/s390x/lower.isle line 769. 12168 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12169 return Some(expr0_0); 12170 } 12171 } 12172 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12173 let pattern2_0 = arg1; 12174 let pattern3_0 = C::value_type(ctx, pattern2_0); 12175 if pattern3_0 == B16 { 12176 // Rule at src/isa/s390x/lower.isle line 770. 12177 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12178 return Some(expr0_0); 12179 } 12180 } 12181 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12182 let pattern2_0 = arg1; 12183 let pattern3_0 = C::value_type(ctx, pattern2_0); 12184 if pattern3_0 == B32 { 12185 // Rule at src/isa/s390x/lower.isle line 771. 12186 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12187 return Some(expr0_0); 12188 } 12189 } 12190 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12191 let pattern2_0 = arg1; 12192 let pattern3_0 = C::value_type(ctx, pattern2_0); 12193 if pattern3_0 == B64 { 12194 // Rule at src/isa/s390x/lower.isle line 772. 12195 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12196 return Some(expr0_0); 12197 } 12198 } 12199 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12200 let pattern2_0 = arg1; 12201 let pattern3_0 = C::value_type(ctx, pattern2_0); 12202 if pattern3_0 == B1 { 12203 // Rule at src/isa/s390x/lower.isle line 775. 12204 let expr0_0: Type = I32; 12205 let expr1_0: Type = I32; 12206 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12207 let expr3_0: u8 = 31; 12208 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12209 let expr5_0: u8 = 31; 12210 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12211 return Some(expr6_0); 12212 } 12213 if pattern3_0 == B8 { 12214 // Rule at src/isa/s390x/lower.isle line 781. 12215 let expr0_0: Type = I8; 12216 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12217 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12218 return Some(expr2_0); 12219 } 12220 if pattern3_0 == B16 { 12221 // Rule at src/isa/s390x/lower.isle line 783. 12222 let expr0_0: Type = I16; 12223 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12224 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12225 return Some(expr2_0); 12226 } 12227 } 12228 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12229 let pattern2_0 = arg1; 12230 let pattern3_0 = C::value_type(ctx, pattern2_0); 12231 if pattern3_0 == B1 { 12232 // Rule at src/isa/s390x/lower.isle line 777. 12233 let expr0_0: Type = I64; 12234 let expr1_0: Type = I64; 12235 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12236 let expr3_0: u8 = 63; 12237 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12238 let expr5_0: u8 = 63; 12239 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12240 return Some(expr6_0); 12241 } 12242 if pattern3_0 == B8 { 12243 // Rule at src/isa/s390x/lower.isle line 785. 12244 let expr0_0: Type = I8; 12245 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12246 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12247 return Some(expr2_0); 12248 } 12249 if pattern3_0 == B16 { 12250 // Rule at src/isa/s390x/lower.isle line 787. 12251 let expr0_0: Type = I16; 12252 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12253 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12254 return Some(expr2_0); 12255 } 12256 if pattern3_0 == B32 { 12257 // Rule at src/isa/s390x/lower.isle line 789. 12258 let expr0_0: Type = I32; 12259 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12260 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12261 return Some(expr2_0); 12262 } 12263 } 12264 return None; 12265 } 12266 12267 // Generated as internal constructor for term clz_offset. 12268 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12269 let pattern0_0 = arg0; 12270 if pattern0_0 == I8 { 12271 let pattern2_0 = arg1; 12272 // Rule at src/isa/s390x/lower.isle line 814. 12273 let expr0_0: Type = I8; 12274 let expr1_0: i16 = -56; 12275 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12276 return Some(expr2_0); 12277 } 12278 if pattern0_0 == I16 { 12279 let pattern2_0 = arg1; 12280 // Rule at src/isa/s390x/lower.isle line 815. 12281 let expr0_0: Type = I16; 12282 let expr1_0: i16 = -48; 12283 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12284 return Some(expr2_0); 12285 } 12286 if pattern0_0 == I32 { 12287 let pattern2_0 = arg1; 12288 // Rule at src/isa/s390x/lower.isle line 816. 12289 let expr0_0: Type = I32; 12290 let expr1_0: i16 = -32; 12291 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12292 return Some(expr2_0); 12293 } 12294 if pattern0_0 == I64 { 12295 let pattern2_0 = arg1; 12296 // Rule at src/isa/s390x/lower.isle line 817. 12297 let expr0_0: Type = I64; 12298 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12299 return Some(expr1_0); 12300 } 12301 return None; 12302 } 12303 12304 // Generated as internal constructor for term ctz_guardbit. 12305 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12306 let pattern0_0 = arg0; 12307 if pattern0_0 == I8 { 12308 // Rule at src/isa/s390x/lower.isle line 866. 12309 let expr0_0: u16 = 256; 12310 let expr1_0: u8 = 0; 12311 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12312 return Some(expr2_0); 12313 } 12314 if pattern0_0 == I16 { 12315 // Rule at src/isa/s390x/lower.isle line 867. 12316 let expr0_0: u16 = 1; 12317 let expr1_0: u8 = 16; 12318 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12319 return Some(expr2_0); 12320 } 12321 if pattern0_0 == I32 { 12322 // Rule at src/isa/s390x/lower.isle line 868. 12323 let expr0_0: u16 = 1; 12324 let expr1_0: u8 = 32; 12325 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12326 return Some(expr2_0); 12327 } 12328 return None; 12329 } 12330 12331 // Generated as internal constructor for term istore8_impl. 12332 pub fn constructor_istore8_impl<C: Context>( 12333 ctx: &mut C, 12334 arg0: MemFlags, 12335 arg1: Value, 12336 arg2: Value, 12337 arg3: Offset32, 12338 ) -> Option<SideEffectNoResult> { 12339 let pattern0_0 = arg0; 12340 let pattern1_0 = arg1; 12341 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12342 let pattern3_0 = arg2; 12343 let pattern4_0 = arg3; 12344 // Rule at src/isa/s390x/lower.isle line 1424. 12345 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12346 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12347 return Some(expr1_0); 12348 } 12349 let pattern2_0 = arg2; 12350 let pattern3_0 = arg3; 12351 // Rule at src/isa/s390x/lower.isle line 1420. 12352 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12353 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12354 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12355 return Some(expr2_0); 12356 } 12357 12358 // Generated as internal constructor for term istore16_impl. 12359 pub fn constructor_istore16_impl<C: Context>( 12360 ctx: &mut C, 12361 arg0: MemFlags, 12362 arg1: Value, 12363 arg2: Value, 12364 arg3: Offset32, 12365 ) -> Option<SideEffectNoResult> { 12366 let pattern0_0 = arg0; 12367 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12368 let pattern2_0 = arg1; 12369 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12370 let pattern4_0 = arg2; 12371 let pattern5_0 = arg3; 12372 // Rule at src/isa/s390x/lower.isle line 1450. 12373 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12374 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12375 return Some(expr1_0); 12376 } 12377 let pattern3_0 = arg2; 12378 let pattern4_0 = arg3; 12379 // Rule at src/isa/s390x/lower.isle line 1442. 12380 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12381 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12382 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12383 return Some(expr2_0); 12384 } 12385 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12386 let pattern2_0 = arg1; 12387 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12388 let pattern4_0 = arg2; 12389 let pattern5_0 = arg3; 12390 // Rule at src/isa/s390x/lower.isle line 1446. 12391 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12392 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12393 return Some(expr1_0); 12394 } 12395 let pattern3_0 = arg2; 12396 let pattern4_0 = arg3; 12397 // Rule at src/isa/s390x/lower.isle line 1438. 12398 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12399 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12400 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12401 return Some(expr2_0); 12402 } 12403 return None; 12404 } 12405 12406 // Generated as internal constructor for term istore32_impl. 12407 pub fn constructor_istore32_impl<C: Context>( 12408 ctx: &mut C, 12409 arg0: MemFlags, 12410 arg1: Value, 12411 arg2: Value, 12412 arg3: Offset32, 12413 ) -> Option<SideEffectNoResult> { 12414 let pattern0_0 = arg0; 12415 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12416 let pattern2_0 = arg1; 12417 let pattern3_0 = arg2; 12418 let pattern4_0 = arg3; 12419 // Rule at src/isa/s390x/lower.isle line 1472. 12420 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12421 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12422 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12423 return Some(expr2_0); 12424 } 12425 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12426 let pattern2_0 = arg1; 12427 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12428 let pattern4_0 = arg2; 12429 let pattern5_0 = arg3; 12430 // Rule at src/isa/s390x/lower.isle line 1468. 12431 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12432 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12433 return Some(expr1_0); 12434 } 12435 let pattern3_0 = arg2; 12436 let pattern4_0 = arg3; 12437 // Rule at src/isa/s390x/lower.isle line 1464. 12438 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12439 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12440 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12441 return Some(expr2_0); 12442 } 12443 return None; 12444 } 12445 12446 // Generated as internal constructor for term istore64_impl. 12447 pub fn constructor_istore64_impl<C: Context>( 12448 ctx: &mut C, 12449 arg0: MemFlags, 12450 arg1: Value, 12451 arg2: Value, 12452 arg3: Offset32, 12453 ) -> Option<SideEffectNoResult> { 12454 let pattern0_0 = arg0; 12455 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12456 let pattern2_0 = arg1; 12457 let pattern3_0 = arg2; 12458 let pattern4_0 = arg3; 12459 // Rule at src/isa/s390x/lower.isle line 1490. 12460 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12461 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12462 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12463 return Some(expr2_0); 12464 } 12465 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12466 let pattern2_0 = arg1; 12467 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12468 let pattern4_0 = arg2; 12469 let pattern5_0 = arg3; 12470 // Rule at src/isa/s390x/lower.isle line 1486. 12471 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12472 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12473 return Some(expr1_0); 12474 } 12475 let pattern3_0 = arg2; 12476 let pattern4_0 = arg3; 12477 // Rule at src/isa/s390x/lower.isle line 1482. 12478 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12479 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12480 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12481 return Some(expr2_0); 12482 } 12483 return None; 12484 } 12485 12486 // Generated as internal constructor for term atomic_rmw_body. 12487 pub fn constructor_atomic_rmw_body<C: Context>( 12488 ctx: &mut C, 12489 arg0: &VecMInstBuilder, 12490 arg1: Type, 12491 arg2: MemFlags, 12492 arg3: &AtomicRmwOp, 12493 arg4: WritableReg, 12494 arg5: Reg, 12495 arg6: Reg, 12496 ) -> Option<Reg> { 12497 let pattern0_0 = arg0; 12498 let pattern1_0 = arg1; 12499 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12500 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12501 let pattern4_0 = arg2; 12502 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12503 let pattern6_0 = arg3; 12504 if let &AtomicRmwOp::Nand = pattern6_0 { 12505 let pattern8_0 = arg4; 12506 let pattern9_0 = arg5; 12507 let pattern10_0 = arg6; 12508 // Rule at src/isa/s390x/lower.isle line 1598. 12509 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12510 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12511 let expr2_0 = constructor_push_alu_reg( 12512 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12513 )?; 12514 return Some(expr2_0); 12515 } 12516 } 12517 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12518 let pattern6_0 = arg3; 12519 if let &AtomicRmwOp::Nand = pattern6_0 { 12520 let pattern8_0 = arg4; 12521 let pattern9_0 = arg5; 12522 let pattern10_0 = arg6; 12523 // Rule at src/isa/s390x/lower.isle line 1595. 12524 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12525 let expr1_0 = constructor_push_alu_reg( 12526 ctx, 12527 pattern0_0, 12528 &expr0_0, 12529 pattern8_0, 12530 pattern9_0, 12531 pattern10_0, 12532 )?; 12533 return Some(expr1_0); 12534 } 12535 } 12536 } 12537 } 12538 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12539 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12540 let pattern4_0 = arg2; 12541 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12542 let pattern6_0 = arg3; 12543 if let &AtomicRmwOp::Nand = pattern6_0 { 12544 let pattern8_0 = arg4; 12545 let pattern9_0 = arg5; 12546 let pattern10_0 = arg6; 12547 // Rule at src/isa/s390x/lower.isle line 1605. 12548 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12549 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12550 let expr2_0 = constructor_push_alu_reg( 12551 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12552 )?; 12553 let expr3_0 = 12554 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12555 return Some(expr3_0); 12556 } 12557 } 12558 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12559 let pattern6_0 = arg3; 12560 if let &AtomicRmwOp::Nand = pattern6_0 { 12561 let pattern8_0 = arg4; 12562 let pattern9_0 = arg5; 12563 let pattern10_0 = arg6; 12564 // Rule at src/isa/s390x/lower.isle line 1601. 12565 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12566 let expr1_0 = constructor_push_alu_reg( 12567 ctx, 12568 pattern0_0, 12569 &expr0_0, 12570 pattern8_0, 12571 pattern9_0, 12572 pattern10_0, 12573 )?; 12574 let expr2_0 = 12575 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12576 return Some(expr2_0); 12577 } 12578 } 12579 } 12580 } 12581 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12582 let pattern3_0 = arg2; 12583 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12584 let pattern5_0 = arg3; 12585 if let &AtomicRmwOp::Xchg = pattern5_0 { 12586 let pattern7_0 = arg4; 12587 let pattern8_0 = arg5; 12588 let pattern9_0 = arg6; 12589 // Rule at src/isa/s390x/lower.isle line 1587. 12590 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12591 return Some(expr0_0); 12592 } 12593 } 12594 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12595 let pattern5_0 = arg3; 12596 if let &AtomicRmwOp::Xchg = pattern5_0 { 12597 let pattern7_0 = arg4; 12598 let pattern8_0 = arg5; 12599 let pattern9_0 = arg6; 12600 // Rule at src/isa/s390x/lower.isle line 1584. 12601 return Some(pattern9_0); 12602 } 12603 } 12604 } 12605 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12606 let pattern3_0 = arg2; 12607 let pattern4_0 = arg3; 12608 match pattern4_0 { 12609 &AtomicRmwOp::And => { 12610 let pattern6_0 = arg4; 12611 let pattern7_0 = arg5; 12612 let pattern8_0 = arg6; 12613 // Rule at src/isa/s390x/lower.isle line 1615. 12614 let expr0_0 = RxSBGOp::And; 12615 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12616 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12617 pattern8_0, 12618 )?; 12619 return Some(expr1_0); 12620 } 12621 &AtomicRmwOp::Nand => { 12622 let pattern6_0 = arg4; 12623 let pattern7_0 = arg5; 12624 let pattern8_0 = arg6; 12625 // Rule at src/isa/s390x/lower.isle line 1621. 12626 let expr0_0 = RxSBGOp::And; 12627 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12628 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12629 pattern8_0, 12630 )?; 12631 let expr2_0 = constructor_atomic_rmw_body_invert( 12632 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12633 )?; 12634 return Some(expr2_0); 12635 } 12636 &AtomicRmwOp::Or => { 12637 let pattern6_0 = arg4; 12638 let pattern7_0 = arg5; 12639 let pattern8_0 = arg6; 12640 // Rule at src/isa/s390x/lower.isle line 1617. 12641 let expr0_0 = RxSBGOp::Or; 12642 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12643 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12644 pattern8_0, 12645 )?; 12646 return Some(expr1_0); 12647 } 12648 &AtomicRmwOp::Xchg => { 12649 let pattern6_0 = arg4; 12650 let pattern7_0 = arg5; 12651 let pattern8_0 = arg6; 12652 // Rule at src/isa/s390x/lower.isle line 1613. 12653 let expr0_0 = RxSBGOp::Insert; 12654 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12655 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12656 pattern8_0, 12657 )?; 12658 return Some(expr1_0); 12659 } 12660 &AtomicRmwOp::Xor => { 12661 let pattern6_0 = arg4; 12662 let pattern7_0 = arg5; 12663 let pattern8_0 = arg6; 12664 // Rule at src/isa/s390x/lower.isle line 1619. 12665 let expr0_0 = RxSBGOp::Xor; 12666 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12667 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12668 pattern8_0, 12669 )?; 12670 return Some(expr1_0); 12671 } 12672 _ => {} 12673 } 12674 } 12675 let pattern2_0 = arg2; 12676 let pattern3_0 = arg3; 12677 match pattern3_0 { 12678 &AtomicRmwOp::Add => { 12679 let pattern5_0 = arg4; 12680 let pattern6_0 = arg5; 12681 let pattern7_0 = arg6; 12682 // Rule at src/isa/s390x/lower.isle line 1653. 12683 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12684 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12685 let expr2_0 = constructor_atomic_rmw_body_addsub( 12686 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12687 pattern7_0, 12688 )?; 12689 return Some(expr2_0); 12690 } 12691 &AtomicRmwOp::Smax => { 12692 let pattern5_0 = arg4; 12693 let pattern6_0 = arg5; 12694 let pattern7_0 = arg6; 12695 // Rule at src/isa/s390x/lower.isle line 1694. 12696 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12697 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12698 let expr2_0 = IntCC::SignedGreaterThan; 12699 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12700 let expr4_0 = constructor_atomic_rmw_body_minmax( 12701 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12702 pattern6_0, pattern7_0, 12703 )?; 12704 return Some(expr4_0); 12705 } 12706 &AtomicRmwOp::Smin => { 12707 let pattern5_0 = arg4; 12708 let pattern6_0 = arg5; 12709 let pattern7_0 = arg6; 12710 // Rule at src/isa/s390x/lower.isle line 1691. 12711 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12712 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12713 let expr2_0 = IntCC::SignedLessThan; 12714 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12715 let expr4_0 = constructor_atomic_rmw_body_minmax( 12716 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12717 pattern6_0, pattern7_0, 12718 )?; 12719 return Some(expr4_0); 12720 } 12721 &AtomicRmwOp::Sub => { 12722 let pattern5_0 = arg4; 12723 let pattern6_0 = arg5; 12724 let pattern7_0 = arg6; 12725 // Rule at src/isa/s390x/lower.isle line 1655. 12726 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12727 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12728 let expr2_0 = constructor_atomic_rmw_body_addsub( 12729 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12730 pattern7_0, 12731 )?; 12732 return Some(expr2_0); 12733 } 12734 &AtomicRmwOp::Umax => { 12735 let pattern5_0 = arg4; 12736 let pattern6_0 = arg5; 12737 let pattern7_0 = arg6; 12738 // Rule at src/isa/s390x/lower.isle line 1700. 12739 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12740 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12741 let expr2_0 = IntCC::UnsignedGreaterThan; 12742 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12743 let expr4_0 = constructor_atomic_rmw_body_minmax( 12744 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12745 pattern6_0, pattern7_0, 12746 )?; 12747 return Some(expr4_0); 12748 } 12749 &AtomicRmwOp::Umin => { 12750 let pattern5_0 = arg4; 12751 let pattern6_0 = arg5; 12752 let pattern7_0 = arg6; 12753 // Rule at src/isa/s390x/lower.isle line 1697. 12754 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12755 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12756 let expr2_0 = IntCC::UnsignedLessThan; 12757 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12758 let expr4_0 = constructor_atomic_rmw_body_minmax( 12759 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12760 pattern6_0, pattern7_0, 12761 )?; 12762 return Some(expr4_0); 12763 } 12764 _ => {} 12765 } 12766 return None; 12767 } 12768 12769 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12770 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12771 ctx: &mut C, 12772 arg0: &VecMInstBuilder, 12773 arg1: Type, 12774 arg2: MemFlags, 12775 arg3: &RxSBGOp, 12776 arg4: WritableReg, 12777 arg5: Reg, 12778 arg6: Reg, 12779 ) -> Option<Reg> { 12780 let pattern0_0 = arg0; 12781 let pattern1_0 = arg1; 12782 if pattern1_0 == I8 { 12783 let pattern3_0 = arg2; 12784 let pattern4_0 = arg3; 12785 let pattern5_0 = arg4; 12786 let pattern6_0 = arg5; 12787 let pattern7_0 = arg6; 12788 // Rule at src/isa/s390x/lower.isle line 1629. 12789 let expr0_0: u8 = 32; 12790 let expr1_0: u8 = 40; 12791 let expr2_0: i8 = 24; 12792 let expr3_0 = constructor_push_rxsbg( 12793 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12794 expr2_0, 12795 )?; 12796 return Some(expr3_0); 12797 } 12798 if pattern1_0 == I16 { 12799 let pattern3_0 = arg2; 12800 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12801 let pattern5_0 = arg3; 12802 let pattern6_0 = arg4; 12803 let pattern7_0 = arg5; 12804 let pattern8_0 = arg6; 12805 // Rule at src/isa/s390x/lower.isle line 1637. 12806 let expr0_0: Type = I32; 12807 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12808 let expr2_0: u8 = 48; 12809 let expr3_0: u8 = 64; 12810 let expr4_0: i8 = -16; 12811 let expr5_0 = constructor_push_rxsbg( 12812 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12813 expr4_0, 12814 )?; 12815 return Some(expr5_0); 12816 } 12817 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12818 let pattern5_0 = arg3; 12819 let pattern6_0 = arg4; 12820 let pattern7_0 = arg5; 12821 let pattern8_0 = arg6; 12822 // Rule at src/isa/s390x/lower.isle line 1633. 12823 let expr0_0: u8 = 32; 12824 let expr1_0: u8 = 48; 12825 let expr2_0: i8 = 16; 12826 let expr3_0 = constructor_push_rxsbg( 12827 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12828 expr2_0, 12829 )?; 12830 return Some(expr3_0); 12831 } 12832 } 12833 return None; 12834 } 12835 12836 // Generated as internal constructor for term atomic_rmw_body_invert. 12837 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12838 ctx: &mut C, 12839 arg0: &VecMInstBuilder, 12840 arg1: Type, 12841 arg2: MemFlags, 12842 arg3: WritableReg, 12843 arg4: Reg, 12844 ) -> Option<Reg> { 12845 let pattern0_0 = arg0; 12846 let pattern1_0 = arg1; 12847 if pattern1_0 == I8 { 12848 let pattern3_0 = arg2; 12849 let pattern4_0 = arg3; 12850 let pattern5_0 = arg4; 12851 // Rule at src/isa/s390x/lower.isle line 1643. 12852 let expr0_0: Type = I32; 12853 let expr1_0: u32 = 4278190080; 12854 let expr2_0: u8 = 0; 12855 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12856 let expr4_0 = constructor_push_xor_uimm32shifted( 12857 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12858 )?; 12859 return Some(expr4_0); 12860 } 12861 if pattern1_0 == I16 { 12862 let pattern3_0 = arg2; 12863 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12864 let pattern5_0 = arg3; 12865 let pattern6_0 = arg4; 12866 // Rule at src/isa/s390x/lower.isle line 1649. 12867 let expr0_0: Type = I32; 12868 let expr1_0: u32 = 65535; 12869 let expr2_0: u8 = 0; 12870 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12871 let expr4_0 = constructor_push_xor_uimm32shifted( 12872 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12873 )?; 12874 return Some(expr4_0); 12875 } 12876 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12877 let pattern5_0 = arg3; 12878 let pattern6_0 = arg4; 12879 // Rule at src/isa/s390x/lower.isle line 1646. 12880 let expr0_0: Type = I32; 12881 let expr1_0: u32 = 4294901760; 12882 let expr2_0: u8 = 0; 12883 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12884 let expr4_0 = constructor_push_xor_uimm32shifted( 12885 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12886 )?; 12887 return Some(expr4_0); 12888 } 12889 } 12890 return None; 12891 } 12892 12893 // Generated as internal constructor for term atomic_rmw_body_addsub. 12894 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12895 ctx: &mut C, 12896 arg0: &VecMInstBuilder, 12897 arg1: Type, 12898 arg2: MemFlags, 12899 arg3: &ALUOp, 12900 arg4: WritableReg, 12901 arg5: Reg, 12902 arg6: Reg, 12903 ) -> Option<Reg> { 12904 let pattern0_0 = arg0; 12905 let pattern1_0 = arg1; 12906 if pattern1_0 == I8 { 12907 let pattern3_0 = arg2; 12908 let pattern4_0 = arg3; 12909 let pattern5_0 = arg4; 12910 let pattern6_0 = arg5; 12911 let pattern7_0 = arg6; 12912 // Rule at src/isa/s390x/lower.isle line 1672. 12913 let expr0_0: Type = I32; 12914 let expr1_0: u8 = 24; 12915 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12916 let expr3_0 = 12917 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12918 return Some(expr3_0); 12919 } 12920 if pattern1_0 == I16 { 12921 let pattern3_0 = arg2; 12922 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12923 let pattern5_0 = arg3; 12924 let pattern6_0 = arg4; 12925 let pattern7_0 = arg5; 12926 let pattern8_0 = arg6; 12927 // Rule at src/isa/s390x/lower.isle line 1684. 12928 let expr0_0: Type = I32; 12929 let expr1_0: u8 = 16; 12930 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12931 let expr3_0: Type = I32; 12932 let expr4_0 = 12933 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12934 let expr5_0 = constructor_push_alu_reg( 12935 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12936 )?; 12937 let expr6_0: Type = I32; 12938 let expr7_0 = 12939 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12940 return Some(expr7_0); 12941 } 12942 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12943 let pattern5_0 = arg3; 12944 let pattern6_0 = arg4; 12945 let pattern7_0 = arg5; 12946 let pattern8_0 = arg6; 12947 // Rule at src/isa/s390x/lower.isle line 1676. 12948 let expr0_0: Type = I32; 12949 let expr1_0: u8 = 16; 12950 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12951 let expr3_0 = constructor_push_alu_reg( 12952 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12953 )?; 12954 return Some(expr3_0); 12955 } 12956 } 12957 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12958 let pattern3_0 = arg2; 12959 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12960 let pattern5_0 = arg3; 12961 let pattern6_0 = arg4; 12962 let pattern7_0 = arg5; 12963 let pattern8_0 = arg6; 12964 // Rule at src/isa/s390x/lower.isle line 1666. 12965 let expr0_0 = 12966 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12967 let expr1_0 = constructor_push_alu_reg( 12968 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12969 )?; 12970 let expr2_0 = 12971 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12972 return Some(expr2_0); 12973 } 12974 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12975 let pattern5_0 = arg3; 12976 let pattern6_0 = arg4; 12977 let pattern7_0 = arg5; 12978 let pattern8_0 = arg6; 12979 // Rule at src/isa/s390x/lower.isle line 1662. 12980 let expr0_0 = constructor_push_alu_reg( 12981 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12982 )?; 12983 return Some(expr0_0); 12984 } 12985 } 12986 return None; 12987 } 12988 12989 // Generated as internal constructor for term atomic_rmw_body_minmax. 12990 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12991 ctx: &mut C, 12992 arg0: &VecMInstBuilder, 12993 arg1: Type, 12994 arg2: MemFlags, 12995 arg3: &CmpOp, 12996 arg4: &Cond, 12997 arg5: WritableReg, 12998 arg6: Reg, 12999 arg7: Reg, 13000 ) -> Option<Reg> { 13001 let pattern0_0 = arg0; 13002 let pattern1_0 = arg1; 13003 if pattern1_0 == I8 { 13004 let pattern3_0 = arg2; 13005 let pattern4_0 = arg3; 13006 let pattern5_0 = arg4; 13007 let pattern6_0 = arg5; 13008 let pattern7_0 = arg6; 13009 let pattern8_0 = arg7; 13010 // Rule at src/isa/s390x/lower.isle line 1729. 13011 let expr0_0: Type = I32; 13012 let expr1_0: u8 = 24; 13013 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13014 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13015 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13016 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13017 let expr6_0 = RxSBGOp::Insert; 13018 let expr7_0: u8 = 32; 13019 let expr8_0: u8 = 40; 13020 let expr9_0: i8 = 0; 13021 let expr10_0 = constructor_push_rxsbg( 13022 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13023 )?; 13024 return Some(expr10_0); 13025 } 13026 if pattern1_0 == I16 { 13027 let pattern3_0 = arg2; 13028 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13029 let pattern5_0 = arg3; 13030 let pattern6_0 = arg4; 13031 let pattern7_0 = arg5; 13032 let pattern8_0 = arg6; 13033 let pattern9_0 = arg7; 13034 // Rule at src/isa/s390x/lower.isle line 1742. 13035 let expr0_0: Type = I32; 13036 let expr1_0: u8 = 16; 13037 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13038 let expr3_0: Type = I32; 13039 let expr4_0 = 13040 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13041 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13042 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13043 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13044 let expr8_0 = RxSBGOp::Insert; 13045 let expr9_0: u8 = 32; 13046 let expr10_0: u8 = 48; 13047 let expr11_0: i8 = 0; 13048 let expr12_0 = constructor_push_rxsbg( 13049 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13050 expr11_0, 13051 )?; 13052 let expr13_0: Type = I32; 13053 let expr14_0 = 13054 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13055 return Some(expr14_0); 13056 } 13057 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13058 let pattern5_0 = arg3; 13059 let pattern6_0 = arg4; 13060 let pattern7_0 = arg5; 13061 let pattern8_0 = arg6; 13062 let pattern9_0 = arg7; 13063 // Rule at src/isa/s390x/lower.isle line 1735. 13064 let expr0_0: Type = I32; 13065 let expr1_0: u8 = 16; 13066 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13067 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13068 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13069 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13070 let expr6_0 = RxSBGOp::Insert; 13071 let expr7_0: u8 = 32; 13072 let expr8_0: u8 = 48; 13073 let expr9_0: i8 = 0; 13074 let expr10_0 = constructor_push_rxsbg( 13075 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13076 expr9_0, 13077 )?; 13078 return Some(expr10_0); 13079 } 13080 } 13081 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13082 let pattern3_0 = arg2; 13083 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13084 let pattern5_0 = arg3; 13085 let pattern6_0 = arg4; 13086 let pattern7_0 = arg5; 13087 let pattern8_0 = arg6; 13088 let pattern9_0 = arg7; 13089 // Rule at src/isa/s390x/lower.isle line 1717. 13090 let expr0_0 = 13091 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13092 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13093 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13094 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13095 let expr4_0 = 13096 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13097 return Some(expr4_0); 13098 } 13099 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13100 let pattern5_0 = arg3; 13101 let pattern6_0 = arg4; 13102 let pattern7_0 = arg5; 13103 let pattern8_0 = arg6; 13104 let pattern9_0 = arg7; 13105 // Rule at src/isa/s390x/lower.isle line 1710. 13106 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13107 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13108 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13109 return Some(pattern9_0); 13110 } 13111 } 13112 return None; 13113 } 13114 13115 // Generated as internal constructor for term atomic_cas_body. 13116 pub fn constructor_atomic_cas_body<C: Context>( 13117 ctx: &mut C, 13118 arg0: &VecMInstBuilder, 13119 arg1: Type, 13120 arg2: MemFlags, 13121 arg3: WritableReg, 13122 arg4: Reg, 13123 arg5: Reg, 13124 arg6: Reg, 13125 ) -> Option<Reg> { 13126 let pattern0_0 = arg0; 13127 let pattern1_0 = arg1; 13128 if pattern1_0 == I8 { 13129 let pattern3_0 = arg2; 13130 let pattern4_0 = arg3; 13131 let pattern5_0 = arg4; 13132 let pattern6_0 = arg5; 13133 let pattern7_0 = arg6; 13134 // Rule at src/isa/s390x/lower.isle line 1794. 13135 let expr0_0 = RxSBGOp::Xor; 13136 let expr1_0: u8 = 32; 13137 let expr2_0: u8 = 40; 13138 let expr3_0: i8 = 24; 13139 let expr4_0 = constructor_rxsbg_test( 13140 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13141 )?; 13142 let expr5_0 = IntCC::NotEqual; 13143 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13144 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13145 let expr8_0 = RxSBGOp::Insert; 13146 let expr9_0: u8 = 32; 13147 let expr10_0: u8 = 40; 13148 let expr11_0: i8 = 24; 13149 let expr12_0 = constructor_push_rxsbg( 13150 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13151 expr11_0, 13152 )?; 13153 return Some(expr12_0); 13154 } 13155 if pattern1_0 == I16 { 13156 let pattern3_0 = arg2; 13157 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13158 let pattern5_0 = arg3; 13159 let pattern6_0 = arg4; 13160 let pattern7_0 = arg5; 13161 let pattern8_0 = arg6; 13162 // Rule at src/isa/s390x/lower.isle line 1812. 13163 let expr0_0: Type = I32; 13164 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13165 let expr2_0: Type = I32; 13166 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13167 let expr4_0 = RxSBGOp::Xor; 13168 let expr5_0: u8 = 48; 13169 let expr6_0: u8 = 64; 13170 let expr7_0: i8 = -16; 13171 let expr8_0 = constructor_rxsbg_test( 13172 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13173 )?; 13174 let expr9_0 = IntCC::NotEqual; 13175 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13176 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13177 let expr12_0 = RxSBGOp::Insert; 13178 let expr13_0: u8 = 48; 13179 let expr14_0: u8 = 64; 13180 let expr15_0: i8 = -16; 13181 let expr16_0 = constructor_push_rxsbg( 13182 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13183 expr15_0, 13184 )?; 13185 return Some(expr16_0); 13186 } 13187 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13188 let pattern5_0 = arg3; 13189 let pattern6_0 = arg4; 13190 let pattern7_0 = arg5; 13191 let pattern8_0 = arg6; 13192 // Rule at src/isa/s390x/lower.isle line 1801. 13193 let expr0_0 = RxSBGOp::Xor; 13194 let expr1_0: u8 = 32; 13195 let expr2_0: u8 = 48; 13196 let expr3_0: i8 = 16; 13197 let expr4_0 = constructor_rxsbg_test( 13198 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13199 )?; 13200 let expr5_0 = IntCC::NotEqual; 13201 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13202 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13203 let expr8_0 = RxSBGOp::Insert; 13204 let expr9_0: u8 = 32; 13205 let expr10_0: u8 = 48; 13206 let expr11_0: i8 = 16; 13207 let expr12_0 = constructor_push_rxsbg( 13208 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13209 expr11_0, 13210 )?; 13211 return Some(expr12_0); 13212 } 13213 } 13214 return None; 13215 } 13216 13217 // Generated as internal constructor for term atomic_store_impl. 13218 pub fn constructor_atomic_store_impl<C: Context>( 13219 ctx: &mut C, 13220 arg0: &SideEffectNoResult, 13221 ) -> Option<InstOutput> { 13222 let pattern0_0 = arg0; 13223 // Rule at src/isa/s390x/lower.isle line 1858. 13224 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13225 let expr1_0 = constructor_fence_impl(ctx)?; 13226 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13227 return Some(expr2_0); 13228 } 13229 13230 // Generated as internal constructor for term icmp_val. 13231 pub fn constructor_icmp_val<C: Context>( 13232 ctx: &mut C, 13233 arg0: bool, 13234 arg1: &IntCC, 13235 arg2: Value, 13236 arg3: Value, 13237 ) -> Option<ProducesBool> { 13238 let pattern0_0 = arg0; 13239 let pattern1_0 = arg1; 13240 if let Some(()) = C::signed(ctx, pattern1_0) { 13241 let pattern3_0 = arg2; 13242 let pattern4_0 = arg3; 13243 // Rule at src/isa/s390x/lower.isle line 1925. 13244 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13245 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13246 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13247 return Some(expr2_0); 13248 } 13249 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13250 let pattern3_0 = arg2; 13251 let pattern4_0 = arg3; 13252 // Rule at src/isa/s390x/lower.isle line 1928. 13253 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13254 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13255 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13256 return Some(expr2_0); 13257 } 13258 return None; 13259 } 13260 13261 // Generated as internal constructor for term icmps_val. 13262 pub fn constructor_icmps_val<C: Context>( 13263 ctx: &mut C, 13264 arg0: bool, 13265 arg1: Value, 13266 arg2: Value, 13267 ) -> Option<ProducesFlags> { 13268 let pattern0_0 = arg0; 13269 if pattern0_0 == true { 13270 let pattern2_0 = arg1; 13271 let pattern3_0 = C::value_type(ctx, pattern2_0); 13272 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13273 let pattern5_0 = arg2; 13274 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13275 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13276 if let &InstructionData::Load { 13277 opcode: ref pattern8_0, 13278 arg: pattern8_1, 13279 flags: pattern8_2, 13280 offset: pattern8_3, 13281 } = &pattern7_0 13282 { 13283 match pattern8_0 { 13284 &Opcode::Sload16 => { 13285 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13286 // Rule at src/isa/s390x/lower.isle line 1958. 13287 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13288 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13289 let expr2_0 = constructor_icmps_mem_sext16( 13290 ctx, pattern4_0, expr0_0, &expr1_0, 13291 )?; 13292 return Some(expr2_0); 13293 } 13294 } 13295 &Opcode::Sload32 => { 13296 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13297 // Rule at src/isa/s390x/lower.isle line 1960. 13298 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13299 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13300 let expr2_0 = constructor_icmps_mem_sext32( 13301 ctx, pattern4_0, expr0_0, &expr1_0, 13302 )?; 13303 return Some(expr2_0); 13304 } 13305 } 13306 _ => {} 13307 } 13308 } 13309 } 13310 let pattern6_0 = C::value_type(ctx, pattern5_0); 13311 if pattern6_0 == I16 { 13312 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13313 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13314 if let &InstructionData::Load { 13315 opcode: ref pattern10_0, 13316 arg: pattern10_1, 13317 flags: pattern10_2, 13318 offset: pattern10_3, 13319 } = &pattern9_0 13320 { 13321 if let &Opcode::Load = pattern10_0 { 13322 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13323 // Rule at src/isa/s390x/lower.isle line 1954. 13324 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13325 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13326 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13327 let expr3_0 = 13328 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13329 return Some(expr3_0); 13330 } 13331 } 13332 } 13333 } 13334 } 13335 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13336 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13337 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13338 if let &InstructionData::Load { 13339 opcode: ref pattern10_0, 13340 arg: pattern10_1, 13341 flags: pattern10_2, 13342 offset: pattern10_3, 13343 } = &pattern9_0 13344 { 13345 if let &Opcode::Load = pattern10_0 { 13346 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13347 // Rule at src/isa/s390x/lower.isle line 1950. 13348 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13349 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13350 let expr2_0 = 13351 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13352 return Some(expr2_0); 13353 } 13354 } 13355 } 13356 } 13357 } 13358 } 13359 } 13360 let pattern1_0 = arg1; 13361 let pattern2_0 = C::value_type(ctx, pattern1_0); 13362 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13363 let pattern4_0 = arg2; 13364 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13365 // Rule at src/isa/s390x/lower.isle line 1944. 13366 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13367 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13368 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13369 return Some(expr2_0); 13370 } 13371 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13372 // Rule at src/isa/s390x/lower.isle line 1946. 13373 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13374 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13375 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13376 return Some(expr2_0); 13377 } 13378 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13379 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13380 if let &InstructionData::Unary { 13381 opcode: ref pattern7_0, 13382 arg: pattern7_1, 13383 } = &pattern6_0 13384 { 13385 if let &Opcode::Sextend = pattern7_0 { 13386 let pattern9_0 = C::value_type(ctx, pattern7_1); 13387 if pattern9_0 == I32 { 13388 // Rule at src/isa/s390x/lower.isle line 1940. 13389 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13390 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13391 let expr2_0 = 13392 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13393 return Some(expr2_0); 13394 } 13395 } 13396 } 13397 } 13398 // Rule at src/isa/s390x/lower.isle line 1936. 13399 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13400 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13401 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13402 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13403 return Some(expr3_0); 13404 } 13405 return None; 13406 } 13407 13408 // Generated as internal constructor for term icmpu_val. 13409 pub fn constructor_icmpu_val<C: Context>( 13410 ctx: &mut C, 13411 arg0: bool, 13412 arg1: Value, 13413 arg2: Value, 13414 ) -> Option<ProducesFlags> { 13415 let pattern0_0 = arg0; 13416 if pattern0_0 == true { 13417 let pattern2_0 = arg1; 13418 let pattern3_0 = C::value_type(ctx, pattern2_0); 13419 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13420 let pattern5_0 = arg2; 13421 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13422 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13423 if let &InstructionData::Load { 13424 opcode: ref pattern8_0, 13425 arg: pattern8_1, 13426 flags: pattern8_2, 13427 offset: pattern8_3, 13428 } = &pattern7_0 13429 { 13430 match pattern8_0 { 13431 &Opcode::Uload16 => { 13432 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13433 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13434 if let &InstructionData::UnaryGlobalValue { 13435 opcode: ref pattern12_0, 13436 global_value: pattern12_1, 13437 } = &pattern11_0 13438 { 13439 if let &Opcode::SymbolValue = pattern12_0 { 13440 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13441 C::symbol_value_data(ctx, pattern12_1) 13442 { 13443 if let Some(()) = 13444 C::reloc_distance_near(ctx, pattern14_1) 13445 { 13446 let pattern16_0 = 13447 C::i64_from_offset(ctx, pattern8_3); 13448 let closure17 = || { 13449 return Some(pattern14_2); 13450 }; 13451 if let Some(pattern17_0) = closure17() { 13452 if let Some(pattern18_0) = 13453 C::memarg_symbol_offset_sum( 13454 ctx, 13455 pattern16_0, 13456 pattern17_0, 13457 ) 13458 { 13459 let pattern19_0 = 13460 C::inst_data(ctx, pattern6_0); 13461 if let &InstructionData::Load { 13462 opcode: ref pattern20_0, 13463 arg: pattern20_1, 13464 flags: pattern20_2, 13465 offset: pattern20_3, 13466 } = &pattern19_0 13467 { 13468 if let &Opcode::Uload16 = pattern20_0 { 13469 if let Some(()) = 13470 C::bigendian(ctx, pattern20_2) 13471 { 13472 // Rule at src/isa/s390x/lower.isle line 1993. 13473 let expr0_0 = C::put_in_reg( 13474 ctx, pattern2_0, 13475 ); 13476 let expr1_0 = 13477 constructor_sink_uload16( 13478 ctx, pattern6_0, 13479 )?; 13480 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13481 return Some(expr2_0); 13482 } 13483 } 13484 } 13485 } 13486 } 13487 } 13488 } 13489 } 13490 } 13491 } 13492 } 13493 &Opcode::Uload32 => { 13494 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13495 // Rule at src/isa/s390x/lower.isle line 1996. 13496 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13497 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13498 let expr2_0 = constructor_icmpu_mem_zext32( 13499 ctx, pattern4_0, expr0_0, &expr1_0, 13500 )?; 13501 return Some(expr2_0); 13502 } 13503 } 13504 _ => {} 13505 } 13506 } 13507 } 13508 let pattern6_0 = C::value_type(ctx, pattern5_0); 13509 if pattern6_0 == I16 { 13510 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13511 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13512 if let &InstructionData::Load { 13513 opcode: ref pattern10_0, 13514 arg: pattern10_1, 13515 flags: pattern10_2, 13516 offset: pattern10_3, 13517 } = &pattern9_0 13518 { 13519 if let &Opcode::Load = pattern10_0 { 13520 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13521 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13522 if let &InstructionData::UnaryGlobalValue { 13523 opcode: ref pattern14_0, 13524 global_value: pattern14_1, 13525 } = &pattern13_0 13526 { 13527 if let &Opcode::SymbolValue = pattern14_0 { 13528 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13529 C::symbol_value_data(ctx, pattern14_1) 13530 { 13531 if let Some(()) = 13532 C::reloc_distance_near(ctx, pattern16_1) 13533 { 13534 let pattern18_0 = 13535 C::i64_from_offset(ctx, pattern10_3); 13536 let closure19 = || { 13537 return Some(pattern16_2); 13538 }; 13539 if let Some(pattern19_0) = closure19() { 13540 if let Some(pattern20_0) = 13541 C::memarg_symbol_offset_sum( 13542 ctx, 13543 pattern18_0, 13544 pattern19_0, 13545 ) 13546 { 13547 let pattern21_0 = 13548 C::inst_data(ctx, pattern8_0); 13549 if let &InstructionData::Load { 13550 opcode: ref pattern22_0, 13551 arg: pattern22_1, 13552 flags: pattern22_2, 13553 offset: pattern22_3, 13554 } = &pattern21_0 13555 { 13556 if let &Opcode::Load = pattern22_0 { 13557 if let Some(()) = 13558 C::bigendian(ctx, pattern22_2) 13559 { 13560 // Rule at src/isa/s390x/lower.isle line 1986. 13561 let expr0_0 = 13562 constructor_ty_ext32( 13563 ctx, pattern4_0, 13564 )?; 13565 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13566 let expr2_0 = 13567 constructor_sink_load( 13568 ctx, pattern8_0, 13569 )?; 13570 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13571 return Some(expr3_0); 13572 } 13573 } 13574 } 13575 } 13576 } 13577 } 13578 } 13579 } 13580 } 13581 } 13582 } 13583 } 13584 } 13585 } 13586 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13587 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13588 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13589 if let &InstructionData::Load { 13590 opcode: ref pattern10_0, 13591 arg: pattern10_1, 13592 flags: pattern10_2, 13593 offset: pattern10_3, 13594 } = &pattern9_0 13595 { 13596 if let &Opcode::Load = pattern10_0 { 13597 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13598 // Rule at src/isa/s390x/lower.isle line 1980. 13599 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13600 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13601 let expr2_0 = 13602 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13603 return Some(expr2_0); 13604 } 13605 } 13606 } 13607 } 13608 } 13609 } 13610 } 13611 let pattern1_0 = arg1; 13612 let pattern2_0 = C::value_type(ctx, pattern1_0); 13613 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13614 let pattern4_0 = arg2; 13615 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13616 // Rule at src/isa/s390x/lower.isle line 1976. 13617 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13618 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13619 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13620 return Some(expr2_0); 13621 } 13622 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13623 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13624 if let &InstructionData::Unary { 13625 opcode: ref pattern7_0, 13626 arg: pattern7_1, 13627 } = &pattern6_0 13628 { 13629 if let &Opcode::Uextend = pattern7_0 { 13630 let pattern9_0 = C::value_type(ctx, pattern7_1); 13631 if pattern9_0 == I32 { 13632 // Rule at src/isa/s390x/lower.isle line 1972. 13633 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13634 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13635 let expr2_0 = 13636 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13637 return Some(expr2_0); 13638 } 13639 } 13640 } 13641 } 13642 // Rule at src/isa/s390x/lower.isle line 1968. 13643 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13644 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13645 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13646 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13647 return Some(expr3_0); 13648 } 13649 return None; 13650 } 13651 13652 // Generated as internal constructor for term fcmp_val. 13653 pub fn constructor_fcmp_val<C: Context>( 13654 ctx: &mut C, 13655 arg0: &FloatCC, 13656 arg1: Value, 13657 arg2: Value, 13658 ) -> Option<ProducesBool> { 13659 let pattern0_0 = arg0; 13660 let pattern1_0 = arg1; 13661 let pattern2_0 = C::value_type(ctx, pattern1_0); 13662 let pattern3_0 = arg2; 13663 // Rule at src/isa/s390x/lower.isle line 2009. 13664 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13665 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13666 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13667 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13668 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13669 return Some(expr4_0); 13670 } 13671 13672 // Generated as internal constructor for term value_nonzero. 13673 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13674 let pattern0_0 = arg0; 13675 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13676 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13677 match &pattern2_0 { 13678 &InstructionData::FloatCompare { 13679 opcode: ref pattern3_0, 13680 args: ref pattern3_1, 13681 cond: ref pattern3_2, 13682 } => { 13683 if let &Opcode::Fcmp = pattern3_0 { 13684 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13685 // Rule at src/isa/s390x/lower.isle line 2037. 13686 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13687 return Some(expr0_0); 13688 } 13689 } 13690 &InstructionData::IntCompare { 13691 opcode: ref pattern3_0, 13692 args: ref pattern3_1, 13693 cond: ref pattern3_2, 13694 } => { 13695 if let &Opcode::Icmp = pattern3_0 { 13696 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13697 // Rule at src/isa/s390x/lower.isle line 2036. 13698 let expr0_0: bool = false; 13699 let expr1_0 = 13700 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13701 return Some(expr1_0); 13702 } 13703 } 13704 &InstructionData::Unary { 13705 opcode: ref pattern3_0, 13706 arg: pattern3_1, 13707 } => { 13708 if let &Opcode::Bint = pattern3_0 { 13709 // Rule at src/isa/s390x/lower.isle line 2035. 13710 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13711 return Some(expr0_0); 13712 } 13713 } 13714 _ => {} 13715 } 13716 } 13717 let pattern1_0 = C::value_type(ctx, pattern0_0); 13718 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13719 // Rule at src/isa/s390x/lower.isle line 2038. 13720 let expr0_0: Type = I32; 13721 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13722 let expr2_0: i16 = 0; 13723 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13724 let expr4_0 = IntCC::NotEqual; 13725 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13726 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13727 return Some(expr6_0); 13728 } 13729 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13730 // Rule at src/isa/s390x/lower.isle line 2041. 13731 let expr0_0: Type = I64; 13732 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13733 let expr2_0: i16 = 0; 13734 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13735 let expr4_0 = IntCC::NotEqual; 13736 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13737 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13738 return Some(expr6_0); 13739 } 13740 return None; 13741 } 13742