1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn i64_as_u64(&mut self, arg0: i64) -> u64; 43 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 44 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn ty_bits(&mut self, arg0: Type) -> u8; 47 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 48 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 49 fn ty_mask(&mut self, arg0: Type) -> u64; 50 fn ty_bytes(&mut self, arg0: Type) -> u16; 51 fn lane_type(&mut self, arg0: Type) -> Type; 52 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 53 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 55 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 57 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 58 fn ty_int_bool_ref_64(&mut self, arg0: Type) -> Option<Type>; 59 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 60 fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>; 61 fn ty_vec128(&mut self, arg0: Type) -> Option<Type>; 62 fn ty_vec128_int(&mut self, arg0: Type) -> Option<Type>; 63 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 64 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 65 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 66 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 67 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 68 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 69 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 70 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 71 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 72 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 73 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 74 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 75 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 76 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 77 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 78 fn value_type(&mut self, arg0: Value) -> Type; 79 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 80 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 81 fn offset32_to_u32(&mut self, arg0: Offset32) -> u32; 82 fn emit(&mut self, arg0: &MInst) -> Unit; 83 fn trap_code_division_by_zero(&mut self) -> TrapCode; 84 fn trap_code_integer_overflow(&mut self) -> TrapCode; 85 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 86 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 87 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 88 fn symbol_value_data( 89 &mut self, 90 arg0: GlobalValue, 91 ) -> Option<(ExternalName, RelocDistance, i64)>; 92 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 93 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 94 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 95 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 96 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 97 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 98 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 99 fn zero_reg(&mut self) -> Reg; 100 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 101 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 102 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 103 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 104 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 105 fn u8_as_u16(&mut self, arg0: u8) -> u16; 106 fn u64_as_u32(&mut self, arg0: u64) -> u32; 107 fn u64_as_i16(&mut self, arg0: u64) -> i16; 108 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 109 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 110 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 111 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 112 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 113 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 114 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 115 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 116 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 117 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 118 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 119 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 120 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 121 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 122 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 123 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 124 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 125 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 126 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 127 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 128 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 129 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 130 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 131 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 132 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 133 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 134 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 135 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 136 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 137 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 138 fn zero_offset(&mut self) -> Offset32; 139 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 140 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 141 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 142 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 143 fn memflags_trusted(&mut self) -> MemFlags; 144 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 145 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 146 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 147 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 148 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 149 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 150 fn sink_inst(&mut self, arg0: Inst) -> Unit; 151 fn inst_builder_new(&mut self) -> VecMInstBuilder; 152 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 153 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 154 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 155 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 156 } 157 158 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 407. 159 #[derive(Clone, Debug)] 160 pub enum SideEffectNoResult { 161 Inst { inst: MInst }, 162 Inst2 { inst1: MInst, inst2: MInst }, 163 } 164 165 /// Internal type ProducesFlags: defined at src/prelude.isle line 434. 166 #[derive(Clone, Debug)] 167 pub enum ProducesFlags { 168 ProducesFlagsSideEffect { inst: MInst }, 169 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 170 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 171 } 172 173 /// Internal type ConsumesFlags: defined at src/prelude.isle line 445. 174 #[derive(Clone, Debug)] 175 pub enum ConsumesFlags { 176 ConsumesFlagsReturnsResultWithProducer { 177 inst: MInst, 178 result: Reg, 179 }, 180 ConsumesFlagsReturnsReg { 181 inst: MInst, 182 result: Reg, 183 }, 184 ConsumesFlagsTwiceReturnsValueRegs { 185 inst1: MInst, 186 inst2: MInst, 187 result: ValueRegs, 188 }, 189 ConsumesFlagsFourTimesReturnsValueRegs { 190 inst1: MInst, 191 inst2: MInst, 192 inst3: MInst, 193 inst4: MInst, 194 result: ValueRegs, 195 }, 196 } 197 198 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 199 #[derive(Clone, Debug)] 200 pub enum MInst { 201 Nop0, 202 Nop2, 203 AluRRR { 204 alu_op: ALUOp, 205 rd: WritableReg, 206 rn: Reg, 207 rm: Reg, 208 }, 209 AluRRSImm16 { 210 alu_op: ALUOp, 211 rd: WritableReg, 212 rn: Reg, 213 imm: i16, 214 }, 215 AluRR { 216 alu_op: ALUOp, 217 rd: WritableReg, 218 rm: Reg, 219 }, 220 AluRX { 221 alu_op: ALUOp, 222 rd: WritableReg, 223 mem: MemArg, 224 }, 225 AluRSImm16 { 226 alu_op: ALUOp, 227 rd: WritableReg, 228 imm: i16, 229 }, 230 AluRSImm32 { 231 alu_op: ALUOp, 232 rd: WritableReg, 233 imm: i32, 234 }, 235 AluRUImm32 { 236 alu_op: ALUOp, 237 rd: WritableReg, 238 imm: u32, 239 }, 240 AluRUImm16Shifted { 241 alu_op: ALUOp, 242 rd: WritableReg, 243 imm: UImm16Shifted, 244 }, 245 AluRUImm32Shifted { 246 alu_op: ALUOp, 247 rd: WritableReg, 248 imm: UImm32Shifted, 249 }, 250 SMulWide { 251 rn: Reg, 252 rm: Reg, 253 }, 254 UMulWide { 255 rn: Reg, 256 }, 257 SDivMod32 { 258 rn: Reg, 259 }, 260 SDivMod64 { 261 rn: Reg, 262 }, 263 UDivMod32 { 264 rn: Reg, 265 }, 266 UDivMod64 { 267 rn: Reg, 268 }, 269 Flogr { 270 rn: Reg, 271 }, 272 ShiftRR { 273 shift_op: ShiftOp, 274 rd: WritableReg, 275 rn: Reg, 276 shift_imm: u8, 277 shift_reg: Reg, 278 }, 279 RxSBG { 280 op: RxSBGOp, 281 rd: WritableReg, 282 rn: Reg, 283 start_bit: u8, 284 end_bit: u8, 285 rotate_amt: i8, 286 }, 287 RxSBGTest { 288 op: RxSBGOp, 289 rd: Reg, 290 rn: Reg, 291 start_bit: u8, 292 end_bit: u8, 293 rotate_amt: i8, 294 }, 295 UnaryRR { 296 op: UnaryOp, 297 rd: WritableReg, 298 rn: Reg, 299 }, 300 CmpRR { 301 op: CmpOp, 302 rn: Reg, 303 rm: Reg, 304 }, 305 CmpRX { 306 op: CmpOp, 307 rn: Reg, 308 mem: MemArg, 309 }, 310 CmpRSImm16 { 311 op: CmpOp, 312 rn: Reg, 313 imm: i16, 314 }, 315 CmpRSImm32 { 316 op: CmpOp, 317 rn: Reg, 318 imm: i32, 319 }, 320 CmpRUImm32 { 321 op: CmpOp, 322 rn: Reg, 323 imm: u32, 324 }, 325 CmpTrapRR { 326 op: CmpOp, 327 rn: Reg, 328 rm: Reg, 329 cond: Cond, 330 trap_code: TrapCode, 331 }, 332 CmpTrapRSImm16 { 333 op: CmpOp, 334 rn: Reg, 335 imm: i16, 336 cond: Cond, 337 trap_code: TrapCode, 338 }, 339 CmpTrapRUImm16 { 340 op: CmpOp, 341 rn: Reg, 342 imm: u16, 343 cond: Cond, 344 trap_code: TrapCode, 345 }, 346 AtomicRmw { 347 alu_op: ALUOp, 348 rd: WritableReg, 349 rn: Reg, 350 mem: MemArg, 351 }, 352 AtomicCas32 { 353 rd: WritableReg, 354 rn: Reg, 355 mem: MemArg, 356 }, 357 AtomicCas64 { 358 rd: WritableReg, 359 rn: Reg, 360 mem: MemArg, 361 }, 362 Fence, 363 Load32 { 364 rd: WritableReg, 365 mem: MemArg, 366 }, 367 Load32ZExt8 { 368 rd: WritableReg, 369 mem: MemArg, 370 }, 371 Load32SExt8 { 372 rd: WritableReg, 373 mem: MemArg, 374 }, 375 Load32ZExt16 { 376 rd: WritableReg, 377 mem: MemArg, 378 }, 379 Load32SExt16 { 380 rd: WritableReg, 381 mem: MemArg, 382 }, 383 Load64 { 384 rd: WritableReg, 385 mem: MemArg, 386 }, 387 Load64ZExt8 { 388 rd: WritableReg, 389 mem: MemArg, 390 }, 391 Load64SExt8 { 392 rd: WritableReg, 393 mem: MemArg, 394 }, 395 Load64ZExt16 { 396 rd: WritableReg, 397 mem: MemArg, 398 }, 399 Load64SExt16 { 400 rd: WritableReg, 401 mem: MemArg, 402 }, 403 Load64ZExt32 { 404 rd: WritableReg, 405 mem: MemArg, 406 }, 407 Load64SExt32 { 408 rd: WritableReg, 409 mem: MemArg, 410 }, 411 LoadRev16 { 412 rd: WritableReg, 413 mem: MemArg, 414 }, 415 LoadRev32 { 416 rd: WritableReg, 417 mem: MemArg, 418 }, 419 LoadRev64 { 420 rd: WritableReg, 421 mem: MemArg, 422 }, 423 Store8 { 424 rd: Reg, 425 mem: MemArg, 426 }, 427 Store16 { 428 rd: Reg, 429 mem: MemArg, 430 }, 431 Store32 { 432 rd: Reg, 433 mem: MemArg, 434 }, 435 Store64 { 436 rd: Reg, 437 mem: MemArg, 438 }, 439 StoreImm8 { 440 imm: u8, 441 mem: MemArg, 442 }, 443 StoreImm16 { 444 imm: i16, 445 mem: MemArg, 446 }, 447 StoreImm32SExt16 { 448 imm: i16, 449 mem: MemArg, 450 }, 451 StoreImm64SExt16 { 452 imm: i16, 453 mem: MemArg, 454 }, 455 StoreRev16 { 456 rd: Reg, 457 mem: MemArg, 458 }, 459 StoreRev32 { 460 rd: Reg, 461 mem: MemArg, 462 }, 463 StoreRev64 { 464 rd: Reg, 465 mem: MemArg, 466 }, 467 LoadMultiple64 { 468 rt: WritableReg, 469 rt2: WritableReg, 470 mem: MemArg, 471 }, 472 StoreMultiple64 { 473 rt: Reg, 474 rt2: Reg, 475 mem: MemArg, 476 }, 477 Mov32 { 478 rd: WritableReg, 479 rm: Reg, 480 }, 481 Mov64 { 482 rd: WritableReg, 483 rm: Reg, 484 }, 485 Mov32Imm { 486 rd: WritableReg, 487 imm: u32, 488 }, 489 Mov32SImm16 { 490 rd: WritableReg, 491 imm: i16, 492 }, 493 Mov64SImm16 { 494 rd: WritableReg, 495 imm: i16, 496 }, 497 Mov64SImm32 { 498 rd: WritableReg, 499 imm: i32, 500 }, 501 Mov64UImm16Shifted { 502 rd: WritableReg, 503 imm: UImm16Shifted, 504 }, 505 Mov64UImm32Shifted { 506 rd: WritableReg, 507 imm: UImm32Shifted, 508 }, 509 Insert64UImm16Shifted { 510 rd: WritableReg, 511 imm: UImm16Shifted, 512 }, 513 Insert64UImm32Shifted { 514 rd: WritableReg, 515 imm: UImm32Shifted, 516 }, 517 Extend { 518 rd: WritableReg, 519 rn: Reg, 520 signed: bool, 521 from_bits: u8, 522 to_bits: u8, 523 }, 524 CMov32 { 525 rd: WritableReg, 526 cond: Cond, 527 rm: Reg, 528 }, 529 CMov64 { 530 rd: WritableReg, 531 cond: Cond, 532 rm: Reg, 533 }, 534 CMov32SImm16 { 535 rd: WritableReg, 536 cond: Cond, 537 imm: i16, 538 }, 539 CMov64SImm16 { 540 rd: WritableReg, 541 cond: Cond, 542 imm: i16, 543 }, 544 FpuMove32 { 545 rd: WritableReg, 546 rn: Reg, 547 }, 548 FpuMove64 { 549 rd: WritableReg, 550 rn: Reg, 551 }, 552 FpuCMov32 { 553 rd: WritableReg, 554 cond: Cond, 555 rm: Reg, 556 }, 557 FpuCMov64 { 558 rd: WritableReg, 559 cond: Cond, 560 rm: Reg, 561 }, 562 MovToFpr { 563 rd: WritableReg, 564 rn: Reg, 565 }, 566 MovFromFpr { 567 rd: WritableReg, 568 rn: Reg, 569 }, 570 FpuRR { 571 fpu_op: FPUOp1, 572 rd: WritableReg, 573 rn: Reg, 574 }, 575 FpuRRR { 576 fpu_op: FPUOp2, 577 rd: WritableReg, 578 rm: Reg, 579 }, 580 FpuRRRR { 581 fpu_op: FPUOp3, 582 rd: WritableReg, 583 rn: Reg, 584 rm: Reg, 585 }, 586 FpuCopysign { 587 rd: WritableReg, 588 rn: Reg, 589 rm: Reg, 590 }, 591 FpuCmp32 { 592 rn: Reg, 593 rm: Reg, 594 }, 595 FpuCmp64 { 596 rn: Reg, 597 rm: Reg, 598 }, 599 FpuLoad32 { 600 rd: WritableReg, 601 mem: MemArg, 602 }, 603 FpuStore32 { 604 rd: Reg, 605 mem: MemArg, 606 }, 607 FpuLoad64 { 608 rd: WritableReg, 609 mem: MemArg, 610 }, 611 FpuStore64 { 612 rd: Reg, 613 mem: MemArg, 614 }, 615 FpuLoadRev32 { 616 rd: WritableReg, 617 mem: MemArg, 618 }, 619 FpuStoreRev32 { 620 rd: Reg, 621 mem: MemArg, 622 }, 623 FpuLoadRev64 { 624 rd: WritableReg, 625 mem: MemArg, 626 }, 627 FpuStoreRev64 { 628 rd: Reg, 629 mem: MemArg, 630 }, 631 LoadFpuConst32 { 632 rd: WritableReg, 633 const_data: u32, 634 }, 635 LoadFpuConst64 { 636 rd: WritableReg, 637 const_data: u64, 638 }, 639 FpuToInt { 640 op: FpuToIntOp, 641 rd: WritableReg, 642 rn: Reg, 643 }, 644 IntToFpu { 645 op: IntToFpuOp, 646 rd: WritableReg, 647 rn: Reg, 648 }, 649 FpuRound { 650 op: FpuRoundMode, 651 rd: WritableReg, 652 rn: Reg, 653 }, 654 FpuVecRRR { 655 fpu_op: FPUOp2, 656 rd: WritableReg, 657 rn: Reg, 658 rm: Reg, 659 }, 660 Call { 661 link: WritableReg, 662 info: BoxCallInfo, 663 }, 664 CallInd { 665 link: WritableReg, 666 info: BoxCallIndInfo, 667 }, 668 Ret { 669 link: Reg, 670 rets: VecReg, 671 }, 672 EpiloguePlaceholder, 673 Jump { 674 dest: MachLabel, 675 }, 676 CondBr { 677 taken: MachLabel, 678 not_taken: MachLabel, 679 cond: Cond, 680 }, 681 TrapIf { 682 cond: Cond, 683 trap_code: TrapCode, 684 }, 685 OneWayCondBr { 686 target: MachLabel, 687 cond: Cond, 688 }, 689 IndirectBr { 690 rn: Reg, 691 targets: VecMachLabel, 692 }, 693 Debugtrap, 694 Trap { 695 trap_code: TrapCode, 696 }, 697 JTSequence { 698 ridx: Reg, 699 targets: VecMachLabel, 700 }, 701 LoadExtNameFar { 702 rd: WritableReg, 703 name: BoxExternalName, 704 offset: i64, 705 }, 706 LoadAddr { 707 rd: WritableReg, 708 mem: MemArg, 709 }, 710 Loop { 711 body: VecMInst, 712 cond: Cond, 713 }, 714 CondBreak { 715 cond: Cond, 716 }, 717 VirtualSPOffsetAdj { 718 offset: i64, 719 }, 720 DummyUse { 721 reg: Reg, 722 }, 723 Unwind { 724 inst: UnwindInst, 725 }, 726 } 727 728 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 729 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 730 pub enum ALUOp { 731 Add32, 732 Add32Ext16, 733 Add64, 734 Add64Ext16, 735 Add64Ext32, 736 AddLogical32, 737 AddLogical64, 738 AddLogical64Ext32, 739 Sub32, 740 Sub32Ext16, 741 Sub64, 742 Sub64Ext16, 743 Sub64Ext32, 744 SubLogical32, 745 SubLogical64, 746 SubLogical64Ext32, 747 Mul32, 748 Mul32Ext16, 749 Mul64, 750 Mul64Ext16, 751 Mul64Ext32, 752 And32, 753 And64, 754 Orr32, 755 Orr64, 756 Xor32, 757 Xor64, 758 AndNot32, 759 AndNot64, 760 OrrNot32, 761 OrrNot64, 762 XorNot32, 763 XorNot64, 764 } 765 766 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 767 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 768 pub enum UnaryOp { 769 Abs32, 770 Abs64, 771 Abs64Ext32, 772 Neg32, 773 Neg64, 774 Neg64Ext32, 775 PopcntByte, 776 PopcntReg, 777 BSwap32, 778 BSwap64, 779 } 780 781 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 782 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 783 pub enum ShiftOp { 784 RotL32, 785 RotL64, 786 LShL32, 787 LShL64, 788 LShR32, 789 LShR64, 790 AShR32, 791 AShR64, 792 } 793 794 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 795 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 796 pub enum RxSBGOp { 797 Insert, 798 And, 799 Or, 800 Xor, 801 } 802 803 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 804 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 805 pub enum CmpOp { 806 CmpS32, 807 CmpS32Ext16, 808 CmpS64, 809 CmpS64Ext16, 810 CmpS64Ext32, 811 CmpL32, 812 CmpL32Ext16, 813 CmpL64, 814 CmpL64Ext16, 815 CmpL64Ext32, 816 } 817 818 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 819 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 820 pub enum FPUOp1 { 821 Abs32, 822 Abs64, 823 Neg32, 824 Neg64, 825 NegAbs32, 826 NegAbs64, 827 Sqrt32, 828 Sqrt64, 829 Cvt32To64, 830 Cvt64To32, 831 } 832 833 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 834 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 835 pub enum FPUOp2 { 836 Add32, 837 Add64, 838 Sub32, 839 Sub64, 840 Mul32, 841 Mul64, 842 Div32, 843 Div64, 844 Max32, 845 Max64, 846 Min32, 847 Min64, 848 } 849 850 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 851 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 852 pub enum FPUOp3 { 853 MAdd32, 854 MAdd64, 855 MSub32, 856 MSub64, 857 } 858 859 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 860 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 861 pub enum FpuToIntOp { 862 F32ToU32, 863 F32ToI32, 864 F32ToU64, 865 F32ToI64, 866 F64ToU32, 867 F64ToI32, 868 F64ToU64, 869 F64ToI64, 870 } 871 872 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 873 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 874 pub enum IntToFpuOp { 875 U32ToF32, 876 I32ToF32, 877 U32ToF64, 878 I32ToF64, 879 U64ToF32, 880 I64ToF32, 881 U64ToF64, 882 I64ToF64, 883 } 884 885 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 886 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 887 pub enum FpuRoundMode { 888 Minus32, 889 Minus64, 890 Plus32, 891 Plus64, 892 Zero32, 893 Zero64, 894 Nearest32, 895 Nearest64, 896 } 897 898 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 899 #[derive(Clone, Debug)] 900 pub enum WritableRegPair { 901 WritableRegPair { hi: WritableReg, lo: WritableReg }, 902 } 903 904 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 905 #[derive(Clone, Debug)] 906 pub enum RegPair { 907 RegPair { hi: Reg, lo: Reg }, 908 } 909 910 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 911 #[derive(Clone, Debug)] 912 pub enum ProducesBool { 913 ProducesBool { producer: ProducesFlags, cond: Cond }, 914 } 915 916 // Generated as internal constructor for term output_reg. 917 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 918 let pattern0_0 = arg0; 919 // Rule at src/prelude.isle line 86. 920 let expr0_0 = C::value_reg(ctx, pattern0_0); 921 let expr1_0 = C::output(ctx, expr0_0); 922 return Some(expr1_0); 923 } 924 925 // Generated as internal constructor for term output_value. 926 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 927 let pattern0_0 = arg0; 928 // Rule at src/prelude.isle line 90. 929 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 930 let expr1_0 = C::output(ctx, expr0_0); 931 return Some(expr1_0); 932 } 933 934 // Generated as internal constructor for term temp_reg. 935 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 936 let pattern0_0 = arg0; 937 // Rule at src/prelude.isle line 110. 938 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 939 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 940 return Some(expr1_0); 941 } 942 943 // Generated as internal constructor for term lo_reg. 944 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 945 let pattern0_0 = arg0; 946 // Rule at src/prelude.isle line 145. 947 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 948 let expr1_0: usize = 0; 949 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 950 return Some(expr2_0); 951 } 952 953 // Generated as internal constructor for term side_effect. 954 pub fn constructor_side_effect<C: Context>( 955 ctx: &mut C, 956 arg0: &SideEffectNoResult, 957 ) -> Option<InstOutput> { 958 let pattern0_0 = arg0; 959 match pattern0_0 { 960 &SideEffectNoResult::Inst { 961 inst: ref pattern1_0, 962 } => { 963 // Rule at src/prelude.isle line 415. 964 let expr0_0 = C::emit(ctx, pattern1_0); 965 let expr1_0 = C::output_none(ctx); 966 return Some(expr1_0); 967 } 968 &SideEffectNoResult::Inst2 { 969 inst1: ref pattern1_0, 970 inst2: ref pattern1_1, 971 } => { 972 // Rule at src/prelude.isle line 418. 973 let expr0_0 = C::emit(ctx, pattern1_0); 974 let expr1_0 = C::emit(ctx, pattern1_1); 975 let expr2_0 = C::output_none(ctx); 976 return Some(expr2_0); 977 } 978 _ => {} 979 } 980 return None; 981 } 982 983 // Generated as internal constructor for term side_effect_concat. 984 pub fn constructor_side_effect_concat<C: Context>( 985 ctx: &mut C, 986 arg0: &SideEffectNoResult, 987 arg1: &SideEffectNoResult, 988 ) -> Option<SideEffectNoResult> { 989 let pattern0_0 = arg0; 990 if let &SideEffectNoResult::Inst { 991 inst: ref pattern1_0, 992 } = pattern0_0 993 { 994 let pattern2_0 = arg1; 995 if let &SideEffectNoResult::Inst { 996 inst: ref pattern3_0, 997 } = pattern2_0 998 { 999 // Rule at src/prelude.isle line 424. 1000 let expr0_0 = SideEffectNoResult::Inst2 { 1001 inst1: pattern1_0.clone(), 1002 inst2: pattern3_0.clone(), 1003 }; 1004 return Some(expr0_0); 1005 } 1006 } 1007 return None; 1008 } 1009 1010 // Generated as internal constructor for term produces_flags_get_reg. 1011 pub fn constructor_produces_flags_get_reg<C: Context>( 1012 ctx: &mut C, 1013 arg0: &ProducesFlags, 1014 ) -> Option<Reg> { 1015 let pattern0_0 = arg0; 1016 if let &ProducesFlags::ProducesFlagsReturnsReg { 1017 inst: ref pattern1_0, 1018 result: pattern1_1, 1019 } = pattern0_0 1020 { 1021 // Rule at src/prelude.isle line 461. 1022 return Some(pattern1_1); 1023 } 1024 return None; 1025 } 1026 1027 // Generated as internal constructor for term produces_flags_ignore. 1028 pub fn constructor_produces_flags_ignore<C: Context>( 1029 ctx: &mut C, 1030 arg0: &ProducesFlags, 1031 ) -> Option<ProducesFlags> { 1032 let pattern0_0 = arg0; 1033 match pattern0_0 { 1034 &ProducesFlags::ProducesFlagsReturnsReg { 1035 inst: ref pattern1_0, 1036 result: pattern1_1, 1037 } => { 1038 // Rule at src/prelude.isle line 466. 1039 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1040 inst: pattern1_0.clone(), 1041 }; 1042 return Some(expr0_0); 1043 } 1044 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1045 inst: ref pattern1_0, 1046 result: pattern1_1, 1047 } => { 1048 // Rule at src/prelude.isle line 468. 1049 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1050 inst: pattern1_0.clone(), 1051 }; 1052 return Some(expr0_0); 1053 } 1054 _ => {} 1055 } 1056 return None; 1057 } 1058 1059 // Generated as internal constructor for term consumes_flags_concat. 1060 pub fn constructor_consumes_flags_concat<C: Context>( 1061 ctx: &mut C, 1062 arg0: &ConsumesFlags, 1063 arg1: &ConsumesFlags, 1064 ) -> Option<ConsumesFlags> { 1065 let pattern0_0 = arg0; 1066 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1067 inst: ref pattern1_0, 1068 result: pattern1_1, 1069 } = pattern0_0 1070 { 1071 let pattern2_0 = arg1; 1072 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1073 inst: ref pattern3_0, 1074 result: pattern3_1, 1075 } = pattern2_0 1076 { 1077 // Rule at src/prelude.isle line 475. 1078 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1079 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1080 inst1: pattern1_0.clone(), 1081 inst2: pattern3_0.clone(), 1082 result: expr0_0, 1083 }; 1084 return Some(expr1_0); 1085 } 1086 } 1087 return None; 1088 } 1089 1090 // Generated as internal constructor for term with_flags. 1091 pub fn constructor_with_flags<C: Context>( 1092 ctx: &mut C, 1093 arg0: &ProducesFlags, 1094 arg1: &ConsumesFlags, 1095 ) -> Option<ValueRegs> { 1096 let pattern0_0 = arg0; 1097 match pattern0_0 { 1098 &ProducesFlags::ProducesFlagsSideEffect { 1099 inst: ref pattern1_0, 1100 } => { 1101 let pattern2_0 = arg1; 1102 match pattern2_0 { 1103 &ConsumesFlags::ConsumesFlagsReturnsReg { 1104 inst: ref pattern3_0, 1105 result: pattern3_1, 1106 } => { 1107 // Rule at src/prelude.isle line 500. 1108 let expr0_0 = C::emit(ctx, pattern1_0); 1109 let expr1_0 = C::emit(ctx, pattern3_0); 1110 let expr2_0 = C::value_reg(ctx, pattern3_1); 1111 return Some(expr2_0); 1112 } 1113 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1114 inst1: ref pattern3_0, 1115 inst2: ref pattern3_1, 1116 result: pattern3_2, 1117 } => { 1118 // Rule at src/prelude.isle line 506. 1119 let expr0_0 = C::emit(ctx, pattern1_0); 1120 let expr1_0 = C::emit(ctx, pattern3_0); 1121 let expr2_0 = C::emit(ctx, pattern3_1); 1122 return Some(pattern3_2); 1123 } 1124 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1125 inst1: ref pattern3_0, 1126 inst2: ref pattern3_1, 1127 inst3: ref pattern3_2, 1128 inst4: ref pattern3_3, 1129 result: pattern3_4, 1130 } => { 1131 // Rule at src/prelude.isle line 518. 1132 let expr0_0 = C::emit(ctx, pattern1_0); 1133 let expr1_0 = C::emit(ctx, pattern3_0); 1134 let expr2_0 = C::emit(ctx, pattern3_1); 1135 let expr3_0 = C::emit(ctx, pattern3_2); 1136 let expr4_0 = C::emit(ctx, pattern3_3); 1137 return Some(pattern3_4); 1138 } 1139 _ => {} 1140 } 1141 } 1142 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1143 inst: ref pattern1_0, 1144 result: pattern1_1, 1145 } => { 1146 let pattern2_0 = arg1; 1147 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1148 inst: ref pattern3_0, 1149 result: pattern3_1, 1150 } = pattern2_0 1151 { 1152 // Rule at src/prelude.isle line 494. 1153 let expr0_0 = C::emit(ctx, pattern1_0); 1154 let expr1_0 = C::emit(ctx, pattern3_0); 1155 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1156 return Some(expr2_0); 1157 } 1158 } 1159 _ => {} 1160 } 1161 return None; 1162 } 1163 1164 // Generated as internal constructor for term with_flags_reg. 1165 pub fn constructor_with_flags_reg<C: Context>( 1166 ctx: &mut C, 1167 arg0: &ProducesFlags, 1168 arg1: &ConsumesFlags, 1169 ) -> Option<Reg> { 1170 let pattern0_0 = arg0; 1171 let pattern1_0 = arg1; 1172 // Rule at src/prelude.isle line 535. 1173 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1174 let expr1_0: usize = 0; 1175 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1176 return Some(expr2_0); 1177 } 1178 1179 // Generated as internal constructor for term mask_amt_reg. 1180 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1181 let pattern0_0 = arg0; 1182 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1183 let pattern2_0 = arg1; 1184 // Rule at src/isa/s390x/inst.isle line 1040. 1185 let expr0_0: i64 = -1; 1186 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1187 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1188 let expr3_0: u8 = 0; 1189 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1190 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1191 return Some(expr5_0); 1192 } 1193 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1194 let pattern2_0 = arg1; 1195 // Rule at src/isa/s390x/inst.isle line 1043. 1196 return Some(pattern2_0); 1197 } 1198 return None; 1199 } 1200 1201 // Generated as internal constructor for term lower_address. 1202 pub fn constructor_lower_address<C: Context>( 1203 ctx: &mut C, 1204 arg0: MemFlags, 1205 arg1: Value, 1206 arg2: Offset32, 1207 ) -> Option<MemArg> { 1208 let pattern0_0 = arg0; 1209 let pattern1_0 = arg1; 1210 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1211 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1212 match &pattern3_0 { 1213 &InstructionData::UnaryGlobalValue { 1214 opcode: ref pattern4_0, 1215 global_value: pattern4_1, 1216 } => { 1217 if let &Opcode::SymbolValue = pattern4_0 { 1218 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1219 C::symbol_value_data(ctx, pattern4_1) 1220 { 1221 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1222 let pattern8_0 = arg2; 1223 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1224 let closure10 = || { 1225 return Some(pattern6_2); 1226 }; 1227 if let Some(pattern10_0) = closure10() { 1228 if let Some(pattern11_0) = 1229 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1230 { 1231 // Rule at src/isa/s390x/inst.isle line 1136. 1232 let expr0_0 = 1233 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1234 return Some(expr0_0); 1235 } 1236 } 1237 } 1238 } 1239 } 1240 } 1241 &InstructionData::Binary { 1242 opcode: ref pattern4_0, 1243 args: ref pattern4_1, 1244 } => { 1245 if let &Opcode::Iadd = pattern4_0 { 1246 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1247 let pattern7_0 = arg2; 1248 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1249 if pattern8_0 == 0 { 1250 // Rule at src/isa/s390x/inst.isle line 1133. 1251 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1252 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1253 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1254 return Some(expr2_0); 1255 } 1256 } 1257 } 1258 _ => {} 1259 } 1260 } 1261 let pattern2_0 = arg2; 1262 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1263 // Rule at src/isa/s390x/inst.isle line 1130. 1264 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1265 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1266 return Some(expr1_0); 1267 } 1268 1269 // Generated as internal constructor for term stack_addr_impl. 1270 pub fn constructor_stack_addr_impl<C: Context>( 1271 ctx: &mut C, 1272 arg0: Type, 1273 arg1: StackSlot, 1274 arg2: Offset32, 1275 ) -> Option<Reg> { 1276 let pattern0_0 = arg0; 1277 let pattern1_0 = arg1; 1278 let pattern2_0 = arg2; 1279 // Rule at src/isa/s390x/inst.isle line 1163. 1280 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1281 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1282 let expr2_0 = C::emit(ctx, &expr1_0); 1283 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1284 return Some(expr3_0); 1285 } 1286 1287 // Generated as internal constructor for term sink_load. 1288 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1289 let pattern0_0 = arg0; 1290 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1291 if let &InstructionData::Load { 1292 opcode: ref pattern2_0, 1293 arg: pattern2_1, 1294 flags: pattern2_2, 1295 offset: pattern2_3, 1296 } = &pattern1_0 1297 { 1298 if let &Opcode::Load = pattern2_0 { 1299 // Rule at src/isa/s390x/inst.isle line 1233. 1300 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1301 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1302 return Some(expr1_0); 1303 } 1304 } 1305 return None; 1306 } 1307 1308 // Generated as internal constructor for term sink_sload16. 1309 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1310 let pattern0_0 = arg0; 1311 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1312 if let &InstructionData::Load { 1313 opcode: ref pattern2_0, 1314 arg: pattern2_1, 1315 flags: pattern2_2, 1316 offset: pattern2_3, 1317 } = &pattern1_0 1318 { 1319 if let &Opcode::Sload16 = pattern2_0 { 1320 // Rule at src/isa/s390x/inst.isle line 1240. 1321 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1322 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1323 return Some(expr1_0); 1324 } 1325 } 1326 return None; 1327 } 1328 1329 // Generated as internal constructor for term sink_sload32. 1330 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1331 let pattern0_0 = arg0; 1332 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1333 if let &InstructionData::Load { 1334 opcode: ref pattern2_0, 1335 arg: pattern2_1, 1336 flags: pattern2_2, 1337 offset: pattern2_3, 1338 } = &pattern1_0 1339 { 1340 if let &Opcode::Sload32 = pattern2_0 { 1341 // Rule at src/isa/s390x/inst.isle line 1247. 1342 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1343 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1344 return Some(expr1_0); 1345 } 1346 } 1347 return None; 1348 } 1349 1350 // Generated as internal constructor for term sink_uload16. 1351 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1352 let pattern0_0 = arg0; 1353 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1354 if let &InstructionData::Load { 1355 opcode: ref pattern2_0, 1356 arg: pattern2_1, 1357 flags: pattern2_2, 1358 offset: pattern2_3, 1359 } = &pattern1_0 1360 { 1361 if let &Opcode::Uload16 = pattern2_0 { 1362 // Rule at src/isa/s390x/inst.isle line 1254. 1363 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1364 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1365 return Some(expr1_0); 1366 } 1367 } 1368 return None; 1369 } 1370 1371 // Generated as internal constructor for term sink_uload32. 1372 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1373 let pattern0_0 = arg0; 1374 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1375 if let &InstructionData::Load { 1376 opcode: ref pattern2_0, 1377 arg: pattern2_1, 1378 flags: pattern2_2, 1379 offset: pattern2_3, 1380 } = &pattern1_0 1381 { 1382 if let &Opcode::Uload32 = pattern2_0 { 1383 // Rule at src/isa/s390x/inst.isle line 1261. 1384 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1385 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1386 return Some(expr1_0); 1387 } 1388 } 1389 return None; 1390 } 1391 1392 // Generated as internal constructor for term temp_writable_regpair. 1393 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1394 // Rule at src/isa/s390x/inst.isle line 1274. 1395 let expr0_0: u8 = 0; 1396 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1397 let expr2_0: u8 = 1; 1398 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1399 let expr4_0 = WritableRegPair::WritableRegPair { 1400 hi: expr1_0, 1401 lo: expr3_0, 1402 }; 1403 return Some(expr4_0); 1404 } 1405 1406 // Generated as internal constructor for term copy_writable_regpair. 1407 pub fn constructor_copy_writable_regpair<C: Context>( 1408 ctx: &mut C, 1409 arg0: &RegPair, 1410 ) -> Option<WritableRegPair> { 1411 let pattern0_0 = arg0; 1412 // Rule at src/isa/s390x/inst.isle line 1280. 1413 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1414 return Some(expr0_0); 1415 } 1416 1417 // Generated as internal constructor for term writable_regpair_hi. 1418 pub fn constructor_writable_regpair_hi<C: Context>( 1419 ctx: &mut C, 1420 arg0: &WritableRegPair, 1421 ) -> Option<WritableReg> { 1422 let pattern0_0 = arg0; 1423 if let &WritableRegPair::WritableRegPair { 1424 hi: pattern1_0, 1425 lo: pattern1_1, 1426 } = pattern0_0 1427 { 1428 // Rule at src/isa/s390x/inst.isle line 1284. 1429 return Some(pattern1_0); 1430 } 1431 return None; 1432 } 1433 1434 // Generated as internal constructor for term writable_regpair_lo. 1435 pub fn constructor_writable_regpair_lo<C: Context>( 1436 ctx: &mut C, 1437 arg0: &WritableRegPair, 1438 ) -> Option<WritableReg> { 1439 let pattern0_0 = arg0; 1440 if let &WritableRegPair::WritableRegPair { 1441 hi: pattern1_0, 1442 lo: pattern1_1, 1443 } = pattern0_0 1444 { 1445 // Rule at src/isa/s390x/inst.isle line 1288. 1446 return Some(pattern1_1); 1447 } 1448 return None; 1449 } 1450 1451 // Generated as internal constructor for term writable_regpair_to_regpair. 1452 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1453 ctx: &mut C, 1454 arg0: &WritableRegPair, 1455 ) -> Option<RegPair> { 1456 let pattern0_0 = arg0; 1457 if let &WritableRegPair::WritableRegPair { 1458 hi: pattern1_0, 1459 lo: pattern1_1, 1460 } = pattern0_0 1461 { 1462 // Rule at src/isa/s390x/inst.isle line 1295. 1463 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1464 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1465 let expr2_0 = RegPair::RegPair { 1466 hi: expr0_0, 1467 lo: expr1_0, 1468 }; 1469 return Some(expr2_0); 1470 } 1471 return None; 1472 } 1473 1474 // Generated as internal constructor for term uninitialized_regpair. 1475 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1476 // Rule at src/isa/s390x/inst.isle line 1300. 1477 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1478 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1479 return Some(expr1_0); 1480 } 1481 1482 // Generated as internal constructor for term regpair_hi. 1483 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1484 let pattern0_0 = arg0; 1485 if let &RegPair::RegPair { 1486 hi: pattern1_0, 1487 lo: pattern1_1, 1488 } = pattern0_0 1489 { 1490 // Rule at src/isa/s390x/inst.isle line 1305. 1491 return Some(pattern1_0); 1492 } 1493 return None; 1494 } 1495 1496 // Generated as internal constructor for term regpair_lo. 1497 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1498 let pattern0_0 = arg0; 1499 if let &RegPair::RegPair { 1500 hi: pattern1_0, 1501 lo: pattern1_1, 1502 } = pattern0_0 1503 { 1504 // Rule at src/isa/s390x/inst.isle line 1309. 1505 return Some(pattern1_1); 1506 } 1507 return None; 1508 } 1509 1510 // Generated as internal constructor for term alu_rrr. 1511 pub fn constructor_alu_rrr<C: Context>( 1512 ctx: &mut C, 1513 arg0: Type, 1514 arg1: &ALUOp, 1515 arg2: Reg, 1516 arg3: Reg, 1517 ) -> Option<Reg> { 1518 let pattern0_0 = arg0; 1519 let pattern1_0 = arg1; 1520 let pattern2_0 = arg2; 1521 let pattern3_0 = arg3; 1522 // Rule at src/isa/s390x/inst.isle line 1316. 1523 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1524 let expr1_0 = MInst::AluRRR { 1525 alu_op: pattern1_0.clone(), 1526 rd: expr0_0, 1527 rn: pattern2_0, 1528 rm: pattern3_0, 1529 }; 1530 let expr2_0 = C::emit(ctx, &expr1_0); 1531 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1532 return Some(expr3_0); 1533 } 1534 1535 // Generated as internal constructor for term alu_rrsimm16. 1536 pub fn constructor_alu_rrsimm16<C: Context>( 1537 ctx: &mut C, 1538 arg0: Type, 1539 arg1: &ALUOp, 1540 arg2: Reg, 1541 arg3: i16, 1542 ) -> Option<Reg> { 1543 let pattern0_0 = arg0; 1544 let pattern1_0 = arg1; 1545 let pattern2_0 = arg2; 1546 let pattern3_0 = arg3; 1547 // Rule at src/isa/s390x/inst.isle line 1323. 1548 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1549 let expr1_0 = MInst::AluRRSImm16 { 1550 alu_op: pattern1_0.clone(), 1551 rd: expr0_0, 1552 rn: pattern2_0, 1553 imm: pattern3_0, 1554 }; 1555 let expr2_0 = C::emit(ctx, &expr1_0); 1556 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1557 return Some(expr3_0); 1558 } 1559 1560 // Generated as internal constructor for term alu_rr. 1561 pub fn constructor_alu_rr<C: Context>( 1562 ctx: &mut C, 1563 arg0: Type, 1564 arg1: &ALUOp, 1565 arg2: Reg, 1566 arg3: Reg, 1567 ) -> Option<Reg> { 1568 let pattern0_0 = arg0; 1569 let pattern1_0 = arg1; 1570 let pattern2_0 = arg2; 1571 let pattern3_0 = arg3; 1572 // Rule at src/isa/s390x/inst.isle line 1330. 1573 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1574 let expr1_0 = MInst::AluRR { 1575 alu_op: pattern1_0.clone(), 1576 rd: expr0_0, 1577 rm: pattern3_0, 1578 }; 1579 let expr2_0 = C::emit(ctx, &expr1_0); 1580 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1581 return Some(expr3_0); 1582 } 1583 1584 // Generated as internal constructor for term alu_rx. 1585 pub fn constructor_alu_rx<C: Context>( 1586 ctx: &mut C, 1587 arg0: Type, 1588 arg1: &ALUOp, 1589 arg2: Reg, 1590 arg3: &MemArg, 1591 ) -> Option<Reg> { 1592 let pattern0_0 = arg0; 1593 let pattern1_0 = arg1; 1594 let pattern2_0 = arg2; 1595 let pattern3_0 = arg3; 1596 // Rule at src/isa/s390x/inst.isle line 1337. 1597 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1598 let expr1_0 = MInst::AluRX { 1599 alu_op: pattern1_0.clone(), 1600 rd: expr0_0, 1601 mem: pattern3_0.clone(), 1602 }; 1603 let expr2_0 = C::emit(ctx, &expr1_0); 1604 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1605 return Some(expr3_0); 1606 } 1607 1608 // Generated as internal constructor for term alu_rsimm16. 1609 pub fn constructor_alu_rsimm16<C: Context>( 1610 ctx: &mut C, 1611 arg0: Type, 1612 arg1: &ALUOp, 1613 arg2: Reg, 1614 arg3: i16, 1615 ) -> Option<Reg> { 1616 let pattern0_0 = arg0; 1617 let pattern1_0 = arg1; 1618 let pattern2_0 = arg2; 1619 let pattern3_0 = arg3; 1620 // Rule at src/isa/s390x/inst.isle line 1344. 1621 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1622 let expr1_0 = MInst::AluRSImm16 { 1623 alu_op: pattern1_0.clone(), 1624 rd: expr0_0, 1625 imm: pattern3_0, 1626 }; 1627 let expr2_0 = C::emit(ctx, &expr1_0); 1628 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1629 return Some(expr3_0); 1630 } 1631 1632 // Generated as internal constructor for term alu_rsimm32. 1633 pub fn constructor_alu_rsimm32<C: Context>( 1634 ctx: &mut C, 1635 arg0: Type, 1636 arg1: &ALUOp, 1637 arg2: Reg, 1638 arg3: i32, 1639 ) -> Option<Reg> { 1640 let pattern0_0 = arg0; 1641 let pattern1_0 = arg1; 1642 let pattern2_0 = arg2; 1643 let pattern3_0 = arg3; 1644 // Rule at src/isa/s390x/inst.isle line 1351. 1645 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1646 let expr1_0 = MInst::AluRSImm32 { 1647 alu_op: pattern1_0.clone(), 1648 rd: expr0_0, 1649 imm: pattern3_0, 1650 }; 1651 let expr2_0 = C::emit(ctx, &expr1_0); 1652 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1653 return Some(expr3_0); 1654 } 1655 1656 // Generated as internal constructor for term alu_ruimm32. 1657 pub fn constructor_alu_ruimm32<C: Context>( 1658 ctx: &mut C, 1659 arg0: Type, 1660 arg1: &ALUOp, 1661 arg2: Reg, 1662 arg3: u32, 1663 ) -> Option<Reg> { 1664 let pattern0_0 = arg0; 1665 let pattern1_0 = arg1; 1666 let pattern2_0 = arg2; 1667 let pattern3_0 = arg3; 1668 // Rule at src/isa/s390x/inst.isle line 1358. 1669 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1670 let expr1_0 = MInst::AluRUImm32 { 1671 alu_op: pattern1_0.clone(), 1672 rd: expr0_0, 1673 imm: pattern3_0, 1674 }; 1675 let expr2_0 = C::emit(ctx, &expr1_0); 1676 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1677 return Some(expr3_0); 1678 } 1679 1680 // Generated as internal constructor for term alu_ruimm16shifted. 1681 pub fn constructor_alu_ruimm16shifted<C: Context>( 1682 ctx: &mut C, 1683 arg0: Type, 1684 arg1: &ALUOp, 1685 arg2: Reg, 1686 arg3: UImm16Shifted, 1687 ) -> Option<Reg> { 1688 let pattern0_0 = arg0; 1689 let pattern1_0 = arg1; 1690 let pattern2_0 = arg2; 1691 let pattern3_0 = arg3; 1692 // Rule at src/isa/s390x/inst.isle line 1365. 1693 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1694 let expr1_0 = MInst::AluRUImm16Shifted { 1695 alu_op: pattern1_0.clone(), 1696 rd: expr0_0, 1697 imm: pattern3_0, 1698 }; 1699 let expr2_0 = C::emit(ctx, &expr1_0); 1700 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1701 return Some(expr3_0); 1702 } 1703 1704 // Generated as internal constructor for term alu_ruimm32shifted. 1705 pub fn constructor_alu_ruimm32shifted<C: Context>( 1706 ctx: &mut C, 1707 arg0: Type, 1708 arg1: &ALUOp, 1709 arg2: Reg, 1710 arg3: UImm32Shifted, 1711 ) -> Option<Reg> { 1712 let pattern0_0 = arg0; 1713 let pattern1_0 = arg1; 1714 let pattern2_0 = arg2; 1715 let pattern3_0 = arg3; 1716 // Rule at src/isa/s390x/inst.isle line 1372. 1717 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1718 let expr1_0 = MInst::AluRUImm32Shifted { 1719 alu_op: pattern1_0.clone(), 1720 rd: expr0_0, 1721 imm: pattern3_0, 1722 }; 1723 let expr2_0 = C::emit(ctx, &expr1_0); 1724 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1725 return Some(expr3_0); 1726 } 1727 1728 // Generated as internal constructor for term smul_wide. 1729 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1730 let pattern0_0 = arg0; 1731 let pattern1_0 = arg1; 1732 // Rule at src/isa/s390x/inst.isle line 1379. 1733 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1734 let expr1_0 = MInst::SMulWide { 1735 rn: pattern0_0, 1736 rm: pattern1_0, 1737 }; 1738 let expr2_0 = C::emit(ctx, &expr1_0); 1739 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1740 return Some(expr3_0); 1741 } 1742 1743 // Generated as internal constructor for term umul_wide. 1744 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1745 let pattern0_0 = arg0; 1746 let pattern1_0 = arg1; 1747 // Rule at src/isa/s390x/inst.isle line 1386. 1748 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1749 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1750 let expr2_0 = MInst::Mov64 { 1751 rd: expr1_0, 1752 rm: pattern1_0, 1753 }; 1754 let expr3_0 = C::emit(ctx, &expr2_0); 1755 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1756 let expr5_0 = C::emit(ctx, &expr4_0); 1757 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1758 return Some(expr6_0); 1759 } 1760 1761 // Generated as internal constructor for term sdivmod32. 1762 pub fn constructor_sdivmod32<C: Context>( 1763 ctx: &mut C, 1764 arg0: &RegPair, 1765 arg1: Reg, 1766 ) -> Option<RegPair> { 1767 let pattern0_0 = arg0; 1768 let pattern1_0 = arg1; 1769 // Rule at src/isa/s390x/inst.isle line 1394. 1770 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1771 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1772 let expr2_0 = C::emit(ctx, &expr1_0); 1773 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1774 return Some(expr3_0); 1775 } 1776 1777 // Generated as internal constructor for term sdivmod64. 1778 pub fn constructor_sdivmod64<C: Context>( 1779 ctx: &mut C, 1780 arg0: &RegPair, 1781 arg1: Reg, 1782 ) -> Option<RegPair> { 1783 let pattern0_0 = arg0; 1784 let pattern1_0 = arg1; 1785 // Rule at src/isa/s390x/inst.isle line 1401. 1786 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1787 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1788 let expr2_0 = C::emit(ctx, &expr1_0); 1789 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1790 return Some(expr3_0); 1791 } 1792 1793 // Generated as internal constructor for term udivmod32. 1794 pub fn constructor_udivmod32<C: Context>( 1795 ctx: &mut C, 1796 arg0: &RegPair, 1797 arg1: Reg, 1798 ) -> Option<RegPair> { 1799 let pattern0_0 = arg0; 1800 let pattern1_0 = arg1; 1801 // Rule at src/isa/s390x/inst.isle line 1408. 1802 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1803 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1804 let expr2_0 = C::emit(ctx, &expr1_0); 1805 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1806 return Some(expr3_0); 1807 } 1808 1809 // Generated as internal constructor for term udivmod64. 1810 pub fn constructor_udivmod64<C: Context>( 1811 ctx: &mut C, 1812 arg0: &RegPair, 1813 arg1: Reg, 1814 ) -> Option<RegPair> { 1815 let pattern0_0 = arg0; 1816 let pattern1_0 = arg1; 1817 // Rule at src/isa/s390x/inst.isle line 1415. 1818 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1819 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1820 let expr2_0 = C::emit(ctx, &expr1_0); 1821 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1822 return Some(expr3_0); 1823 } 1824 1825 // Generated as internal constructor for term shift_rr. 1826 pub fn constructor_shift_rr<C: Context>( 1827 ctx: &mut C, 1828 arg0: Type, 1829 arg1: &ShiftOp, 1830 arg2: Reg, 1831 arg3: u8, 1832 arg4: Reg, 1833 ) -> Option<Reg> { 1834 let pattern0_0 = arg0; 1835 let pattern1_0 = arg1; 1836 let pattern2_0 = arg2; 1837 let pattern3_0 = arg3; 1838 let pattern4_0 = arg4; 1839 // Rule at src/isa/s390x/inst.isle line 1422. 1840 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1841 let expr1_0 = MInst::ShiftRR { 1842 shift_op: pattern1_0.clone(), 1843 rd: expr0_0, 1844 rn: pattern2_0, 1845 shift_imm: pattern3_0, 1846 shift_reg: pattern4_0, 1847 }; 1848 let expr2_0 = C::emit(ctx, &expr1_0); 1849 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1850 return Some(expr3_0); 1851 } 1852 1853 // Generated as internal constructor for term rxsbg_test. 1854 pub fn constructor_rxsbg_test<C: Context>( 1855 ctx: &mut C, 1856 arg0: &RxSBGOp, 1857 arg1: Reg, 1858 arg2: Reg, 1859 arg3: u8, 1860 arg4: u8, 1861 arg5: i8, 1862 ) -> Option<ProducesFlags> { 1863 let pattern0_0 = arg0; 1864 let pattern1_0 = arg1; 1865 let pattern2_0 = arg2; 1866 let pattern3_0 = arg3; 1867 let pattern4_0 = arg4; 1868 let pattern5_0 = arg5; 1869 // Rule at src/isa/s390x/inst.isle line 1429. 1870 let expr0_0 = MInst::RxSBGTest { 1871 op: pattern0_0.clone(), 1872 rd: pattern1_0, 1873 rn: pattern2_0, 1874 start_bit: pattern3_0, 1875 end_bit: pattern4_0, 1876 rotate_amt: pattern5_0, 1877 }; 1878 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1879 return Some(expr1_0); 1880 } 1881 1882 // Generated as internal constructor for term unary_rr. 1883 pub fn constructor_unary_rr<C: Context>( 1884 ctx: &mut C, 1885 arg0: Type, 1886 arg1: &UnaryOp, 1887 arg2: Reg, 1888 ) -> Option<Reg> { 1889 let pattern0_0 = arg0; 1890 let pattern1_0 = arg1; 1891 let pattern2_0 = arg2; 1892 // Rule at src/isa/s390x/inst.isle line 1435. 1893 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1894 let expr1_0 = MInst::UnaryRR { 1895 op: pattern1_0.clone(), 1896 rd: expr0_0, 1897 rn: pattern2_0, 1898 }; 1899 let expr2_0 = C::emit(ctx, &expr1_0); 1900 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1901 return Some(expr3_0); 1902 } 1903 1904 // Generated as internal constructor for term cmp_rr. 1905 pub fn constructor_cmp_rr<C: Context>( 1906 ctx: &mut C, 1907 arg0: &CmpOp, 1908 arg1: Reg, 1909 arg2: Reg, 1910 ) -> Option<ProducesFlags> { 1911 let pattern0_0 = arg0; 1912 let pattern1_0 = arg1; 1913 let pattern2_0 = arg2; 1914 // Rule at src/isa/s390x/inst.isle line 1442. 1915 let expr0_0 = MInst::CmpRR { 1916 op: pattern0_0.clone(), 1917 rn: pattern1_0, 1918 rm: pattern2_0, 1919 }; 1920 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1921 return Some(expr1_0); 1922 } 1923 1924 // Generated as internal constructor for term cmp_rx. 1925 pub fn constructor_cmp_rx<C: Context>( 1926 ctx: &mut C, 1927 arg0: &CmpOp, 1928 arg1: Reg, 1929 arg2: &MemArg, 1930 ) -> Option<ProducesFlags> { 1931 let pattern0_0 = arg0; 1932 let pattern1_0 = arg1; 1933 let pattern2_0 = arg2; 1934 // Rule at src/isa/s390x/inst.isle line 1447. 1935 let expr0_0 = MInst::CmpRX { 1936 op: pattern0_0.clone(), 1937 rn: pattern1_0, 1938 mem: pattern2_0.clone(), 1939 }; 1940 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1941 return Some(expr1_0); 1942 } 1943 1944 // Generated as internal constructor for term cmp_rsimm16. 1945 pub fn constructor_cmp_rsimm16<C: Context>( 1946 ctx: &mut C, 1947 arg0: &CmpOp, 1948 arg1: Reg, 1949 arg2: i16, 1950 ) -> Option<ProducesFlags> { 1951 let pattern0_0 = arg0; 1952 let pattern1_0 = arg1; 1953 let pattern2_0 = arg2; 1954 // Rule at src/isa/s390x/inst.isle line 1452. 1955 let expr0_0 = MInst::CmpRSImm16 { 1956 op: pattern0_0.clone(), 1957 rn: pattern1_0, 1958 imm: pattern2_0, 1959 }; 1960 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1961 return Some(expr1_0); 1962 } 1963 1964 // Generated as internal constructor for term cmp_rsimm32. 1965 pub fn constructor_cmp_rsimm32<C: Context>( 1966 ctx: &mut C, 1967 arg0: &CmpOp, 1968 arg1: Reg, 1969 arg2: i32, 1970 ) -> Option<ProducesFlags> { 1971 let pattern0_0 = arg0; 1972 let pattern1_0 = arg1; 1973 let pattern2_0 = arg2; 1974 // Rule at src/isa/s390x/inst.isle line 1457. 1975 let expr0_0 = MInst::CmpRSImm32 { 1976 op: pattern0_0.clone(), 1977 rn: pattern1_0, 1978 imm: pattern2_0, 1979 }; 1980 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1981 return Some(expr1_0); 1982 } 1983 1984 // Generated as internal constructor for term cmp_ruimm32. 1985 pub fn constructor_cmp_ruimm32<C: Context>( 1986 ctx: &mut C, 1987 arg0: &CmpOp, 1988 arg1: Reg, 1989 arg2: u32, 1990 ) -> Option<ProducesFlags> { 1991 let pattern0_0 = arg0; 1992 let pattern1_0 = arg1; 1993 let pattern2_0 = arg2; 1994 // Rule at src/isa/s390x/inst.isle line 1462. 1995 let expr0_0 = MInst::CmpRUImm32 { 1996 op: pattern0_0.clone(), 1997 rn: pattern1_0, 1998 imm: pattern2_0, 1999 }; 2000 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2001 return Some(expr1_0); 2002 } 2003 2004 // Generated as internal constructor for term atomic_rmw_impl. 2005 pub fn constructor_atomic_rmw_impl<C: Context>( 2006 ctx: &mut C, 2007 arg0: Type, 2008 arg1: &ALUOp, 2009 arg2: Reg, 2010 arg3: &MemArg, 2011 ) -> Option<Reg> { 2012 let pattern0_0 = arg0; 2013 let pattern1_0 = arg1; 2014 let pattern2_0 = arg2; 2015 let pattern3_0 = arg3; 2016 // Rule at src/isa/s390x/inst.isle line 1467. 2017 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2018 let expr1_0 = MInst::AtomicRmw { 2019 alu_op: pattern1_0.clone(), 2020 rd: expr0_0, 2021 rn: pattern2_0, 2022 mem: pattern3_0.clone(), 2023 }; 2024 let expr2_0 = C::emit(ctx, &expr1_0); 2025 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2026 return Some(expr3_0); 2027 } 2028 2029 // Generated as internal constructor for term atomic_cas32. 2030 pub fn constructor_atomic_cas32<C: Context>( 2031 ctx: &mut C, 2032 arg0: Reg, 2033 arg1: Reg, 2034 arg2: &MemArg, 2035 ) -> Option<Reg> { 2036 let pattern0_0 = arg0; 2037 let pattern1_0 = arg1; 2038 let pattern2_0 = arg2; 2039 // Rule at src/isa/s390x/inst.isle line 1474. 2040 let expr0_0: Type = I32; 2041 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2042 let expr2_0 = MInst::AtomicCas32 { 2043 rd: expr1_0, 2044 rn: pattern1_0, 2045 mem: pattern2_0.clone(), 2046 }; 2047 let expr3_0 = C::emit(ctx, &expr2_0); 2048 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2049 return Some(expr4_0); 2050 } 2051 2052 // Generated as internal constructor for term atomic_cas64. 2053 pub fn constructor_atomic_cas64<C: Context>( 2054 ctx: &mut C, 2055 arg0: Reg, 2056 arg1: Reg, 2057 arg2: &MemArg, 2058 ) -> Option<Reg> { 2059 let pattern0_0 = arg0; 2060 let pattern1_0 = arg1; 2061 let pattern2_0 = arg2; 2062 // Rule at src/isa/s390x/inst.isle line 1481. 2063 let expr0_0: Type = I64; 2064 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2065 let expr2_0 = MInst::AtomicCas64 { 2066 rd: expr1_0, 2067 rn: pattern1_0, 2068 mem: pattern2_0.clone(), 2069 }; 2070 let expr3_0 = C::emit(ctx, &expr2_0); 2071 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2072 return Some(expr4_0); 2073 } 2074 2075 // Generated as internal constructor for term fence_impl. 2076 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2077 // Rule at src/isa/s390x/inst.isle line 1488. 2078 let expr0_0 = MInst::Fence; 2079 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2080 return Some(expr1_0); 2081 } 2082 2083 // Generated as internal constructor for term load32. 2084 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2085 let pattern0_0 = arg0; 2086 // Rule at src/isa/s390x/inst.isle line 1493. 2087 let expr0_0: Type = I32; 2088 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2089 let expr2_0 = MInst::Load32 { 2090 rd: expr1_0, 2091 mem: pattern0_0.clone(), 2092 }; 2093 let expr3_0 = C::emit(ctx, &expr2_0); 2094 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2095 return Some(expr4_0); 2096 } 2097 2098 // Generated as internal constructor for term load64. 2099 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2100 let pattern0_0 = arg0; 2101 // Rule at src/isa/s390x/inst.isle line 1500. 2102 let expr0_0: Type = I64; 2103 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2104 let expr2_0 = MInst::Load64 { 2105 rd: expr1_0, 2106 mem: pattern0_0.clone(), 2107 }; 2108 let expr3_0 = C::emit(ctx, &expr2_0); 2109 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2110 return Some(expr4_0); 2111 } 2112 2113 // Generated as internal constructor for term loadrev16. 2114 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2115 let pattern0_0 = arg0; 2116 // Rule at src/isa/s390x/inst.isle line 1507. 2117 let expr0_0: Type = I32; 2118 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2119 let expr2_0 = MInst::LoadRev16 { 2120 rd: expr1_0, 2121 mem: pattern0_0.clone(), 2122 }; 2123 let expr3_0 = C::emit(ctx, &expr2_0); 2124 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2125 return Some(expr4_0); 2126 } 2127 2128 // Generated as internal constructor for term loadrev32. 2129 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2130 let pattern0_0 = arg0; 2131 // Rule at src/isa/s390x/inst.isle line 1514. 2132 let expr0_0: Type = I32; 2133 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2134 let expr2_0 = MInst::LoadRev32 { 2135 rd: expr1_0, 2136 mem: pattern0_0.clone(), 2137 }; 2138 let expr3_0 = C::emit(ctx, &expr2_0); 2139 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2140 return Some(expr4_0); 2141 } 2142 2143 // Generated as internal constructor for term loadrev64. 2144 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2145 let pattern0_0 = arg0; 2146 // Rule at src/isa/s390x/inst.isle line 1521. 2147 let expr0_0: Type = I64; 2148 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2149 let expr2_0 = MInst::LoadRev64 { 2150 rd: expr1_0, 2151 mem: pattern0_0.clone(), 2152 }; 2153 let expr3_0 = C::emit(ctx, &expr2_0); 2154 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2155 return Some(expr4_0); 2156 } 2157 2158 // Generated as internal constructor for term store8. 2159 pub fn constructor_store8<C: Context>( 2160 ctx: &mut C, 2161 arg0: Reg, 2162 arg1: &MemArg, 2163 ) -> Option<SideEffectNoResult> { 2164 let pattern0_0 = arg0; 2165 let pattern1_0 = arg1; 2166 // Rule at src/isa/s390x/inst.isle line 1528. 2167 let expr0_0 = MInst::Store8 { 2168 rd: pattern0_0, 2169 mem: pattern1_0.clone(), 2170 }; 2171 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2172 return Some(expr1_0); 2173 } 2174 2175 // Generated as internal constructor for term store16. 2176 pub fn constructor_store16<C: Context>( 2177 ctx: &mut C, 2178 arg0: Reg, 2179 arg1: &MemArg, 2180 ) -> Option<SideEffectNoResult> { 2181 let pattern0_0 = arg0; 2182 let pattern1_0 = arg1; 2183 // Rule at src/isa/s390x/inst.isle line 1533. 2184 let expr0_0 = MInst::Store16 { 2185 rd: pattern0_0, 2186 mem: pattern1_0.clone(), 2187 }; 2188 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2189 return Some(expr1_0); 2190 } 2191 2192 // Generated as internal constructor for term store32. 2193 pub fn constructor_store32<C: Context>( 2194 ctx: &mut C, 2195 arg0: Reg, 2196 arg1: &MemArg, 2197 ) -> Option<SideEffectNoResult> { 2198 let pattern0_0 = arg0; 2199 let pattern1_0 = arg1; 2200 // Rule at src/isa/s390x/inst.isle line 1538. 2201 let expr0_0 = MInst::Store32 { 2202 rd: pattern0_0, 2203 mem: pattern1_0.clone(), 2204 }; 2205 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2206 return Some(expr1_0); 2207 } 2208 2209 // Generated as internal constructor for term store64. 2210 pub fn constructor_store64<C: Context>( 2211 ctx: &mut C, 2212 arg0: Reg, 2213 arg1: &MemArg, 2214 ) -> Option<SideEffectNoResult> { 2215 let pattern0_0 = arg0; 2216 let pattern1_0 = arg1; 2217 // Rule at src/isa/s390x/inst.isle line 1543. 2218 let expr0_0 = MInst::Store64 { 2219 rd: pattern0_0, 2220 mem: pattern1_0.clone(), 2221 }; 2222 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2223 return Some(expr1_0); 2224 } 2225 2226 // Generated as internal constructor for term store8_imm. 2227 pub fn constructor_store8_imm<C: Context>( 2228 ctx: &mut C, 2229 arg0: u8, 2230 arg1: &MemArg, 2231 ) -> Option<SideEffectNoResult> { 2232 let pattern0_0 = arg0; 2233 let pattern1_0 = arg1; 2234 // Rule at src/isa/s390x/inst.isle line 1548. 2235 let expr0_0 = MInst::StoreImm8 { 2236 imm: pattern0_0, 2237 mem: pattern1_0.clone(), 2238 }; 2239 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2240 return Some(expr1_0); 2241 } 2242 2243 // Generated as internal constructor for term store16_imm. 2244 pub fn constructor_store16_imm<C: Context>( 2245 ctx: &mut C, 2246 arg0: i16, 2247 arg1: &MemArg, 2248 ) -> Option<SideEffectNoResult> { 2249 let pattern0_0 = arg0; 2250 let pattern1_0 = arg1; 2251 // Rule at src/isa/s390x/inst.isle line 1553. 2252 let expr0_0 = MInst::StoreImm16 { 2253 imm: pattern0_0, 2254 mem: pattern1_0.clone(), 2255 }; 2256 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2257 return Some(expr1_0); 2258 } 2259 2260 // Generated as internal constructor for term store32_simm16. 2261 pub fn constructor_store32_simm16<C: Context>( 2262 ctx: &mut C, 2263 arg0: i16, 2264 arg1: &MemArg, 2265 ) -> Option<SideEffectNoResult> { 2266 let pattern0_0 = arg0; 2267 let pattern1_0 = arg1; 2268 // Rule at src/isa/s390x/inst.isle line 1558. 2269 let expr0_0 = MInst::StoreImm32SExt16 { 2270 imm: pattern0_0, 2271 mem: pattern1_0.clone(), 2272 }; 2273 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2274 return Some(expr1_0); 2275 } 2276 2277 // Generated as internal constructor for term store64_simm16. 2278 pub fn constructor_store64_simm16<C: Context>( 2279 ctx: &mut C, 2280 arg0: i16, 2281 arg1: &MemArg, 2282 ) -> Option<SideEffectNoResult> { 2283 let pattern0_0 = arg0; 2284 let pattern1_0 = arg1; 2285 // Rule at src/isa/s390x/inst.isle line 1563. 2286 let expr0_0 = MInst::StoreImm64SExt16 { 2287 imm: pattern0_0, 2288 mem: pattern1_0.clone(), 2289 }; 2290 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2291 return Some(expr1_0); 2292 } 2293 2294 // Generated as internal constructor for term storerev16. 2295 pub fn constructor_storerev16<C: Context>( 2296 ctx: &mut C, 2297 arg0: Reg, 2298 arg1: &MemArg, 2299 ) -> Option<SideEffectNoResult> { 2300 let pattern0_0 = arg0; 2301 let pattern1_0 = arg1; 2302 // Rule at src/isa/s390x/inst.isle line 1568. 2303 let expr0_0 = MInst::StoreRev16 { 2304 rd: pattern0_0, 2305 mem: pattern1_0.clone(), 2306 }; 2307 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2308 return Some(expr1_0); 2309 } 2310 2311 // Generated as internal constructor for term storerev32. 2312 pub fn constructor_storerev32<C: Context>( 2313 ctx: &mut C, 2314 arg0: Reg, 2315 arg1: &MemArg, 2316 ) -> Option<SideEffectNoResult> { 2317 let pattern0_0 = arg0; 2318 let pattern1_0 = arg1; 2319 // Rule at src/isa/s390x/inst.isle line 1573. 2320 let expr0_0 = MInst::StoreRev32 { 2321 rd: pattern0_0, 2322 mem: pattern1_0.clone(), 2323 }; 2324 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2325 return Some(expr1_0); 2326 } 2327 2328 // Generated as internal constructor for term storerev64. 2329 pub fn constructor_storerev64<C: Context>( 2330 ctx: &mut C, 2331 arg0: Reg, 2332 arg1: &MemArg, 2333 ) -> Option<SideEffectNoResult> { 2334 let pattern0_0 = arg0; 2335 let pattern1_0 = arg1; 2336 // Rule at src/isa/s390x/inst.isle line 1578. 2337 let expr0_0 = MInst::StoreRev64 { 2338 rd: pattern0_0, 2339 mem: pattern1_0.clone(), 2340 }; 2341 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2342 return Some(expr1_0); 2343 } 2344 2345 // Generated as internal constructor for term fpu_rr. 2346 pub fn constructor_fpu_rr<C: Context>( 2347 ctx: &mut C, 2348 arg0: Type, 2349 arg1: &FPUOp1, 2350 arg2: Reg, 2351 ) -> Option<Reg> { 2352 let pattern0_0 = arg0; 2353 let pattern1_0 = arg1; 2354 let pattern2_0 = arg2; 2355 // Rule at src/isa/s390x/inst.isle line 1583. 2356 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2357 let expr1_0 = MInst::FpuRR { 2358 fpu_op: pattern1_0.clone(), 2359 rd: expr0_0, 2360 rn: pattern2_0, 2361 }; 2362 let expr2_0 = C::emit(ctx, &expr1_0); 2363 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2364 return Some(expr3_0); 2365 } 2366 2367 // Generated as internal constructor for term fpu_rrr. 2368 pub fn constructor_fpu_rrr<C: Context>( 2369 ctx: &mut C, 2370 arg0: Type, 2371 arg1: &FPUOp2, 2372 arg2: Reg, 2373 arg3: Reg, 2374 ) -> Option<Reg> { 2375 let pattern0_0 = arg0; 2376 let pattern1_0 = arg1; 2377 let pattern2_0 = arg2; 2378 let pattern3_0 = arg3; 2379 // Rule at src/isa/s390x/inst.isle line 1590. 2380 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2381 let expr1_0 = MInst::FpuRRR { 2382 fpu_op: pattern1_0.clone(), 2383 rd: expr0_0, 2384 rm: pattern3_0, 2385 }; 2386 let expr2_0 = C::emit(ctx, &expr1_0); 2387 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2388 return Some(expr3_0); 2389 } 2390 2391 // Generated as internal constructor for term fpu_rrrr. 2392 pub fn constructor_fpu_rrrr<C: Context>( 2393 ctx: &mut C, 2394 arg0: Type, 2395 arg1: &FPUOp3, 2396 arg2: Reg, 2397 arg3: Reg, 2398 arg4: Reg, 2399 ) -> Option<Reg> { 2400 let pattern0_0 = arg0; 2401 let pattern1_0 = arg1; 2402 let pattern2_0 = arg2; 2403 let pattern3_0 = arg3; 2404 let pattern4_0 = arg4; 2405 // Rule at src/isa/s390x/inst.isle line 1597. 2406 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2407 let expr1_0 = MInst::FpuRRRR { 2408 fpu_op: pattern1_0.clone(), 2409 rd: expr0_0, 2410 rn: pattern3_0, 2411 rm: pattern4_0, 2412 }; 2413 let expr2_0 = C::emit(ctx, &expr1_0); 2414 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2415 return Some(expr3_0); 2416 } 2417 2418 // Generated as internal constructor for term fpu_copysign. 2419 pub fn constructor_fpu_copysign<C: Context>( 2420 ctx: &mut C, 2421 arg0: Type, 2422 arg1: Reg, 2423 arg2: Reg, 2424 ) -> Option<Reg> { 2425 let pattern0_0 = arg0; 2426 let pattern1_0 = arg1; 2427 let pattern2_0 = arg2; 2428 // Rule at src/isa/s390x/inst.isle line 1604. 2429 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2430 let expr1_0 = MInst::FpuCopysign { 2431 rd: expr0_0, 2432 rn: pattern1_0, 2433 rm: pattern2_0, 2434 }; 2435 let expr2_0 = C::emit(ctx, &expr1_0); 2436 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2437 return Some(expr3_0); 2438 } 2439 2440 // Generated as internal constructor for term fpu_cmp32. 2441 pub fn constructor_fpu_cmp32<C: Context>( 2442 ctx: &mut C, 2443 arg0: Reg, 2444 arg1: Reg, 2445 ) -> Option<ProducesFlags> { 2446 let pattern0_0 = arg0; 2447 let pattern1_0 = arg1; 2448 // Rule at src/isa/s390x/inst.isle line 1611. 2449 let expr0_0 = MInst::FpuCmp32 { 2450 rn: pattern0_0, 2451 rm: pattern1_0, 2452 }; 2453 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2454 return Some(expr1_0); 2455 } 2456 2457 // Generated as internal constructor for term fpu_cmp64. 2458 pub fn constructor_fpu_cmp64<C: Context>( 2459 ctx: &mut C, 2460 arg0: Reg, 2461 arg1: Reg, 2462 ) -> Option<ProducesFlags> { 2463 let pattern0_0 = arg0; 2464 let pattern1_0 = arg1; 2465 // Rule at src/isa/s390x/inst.isle line 1616. 2466 let expr0_0 = MInst::FpuCmp64 { 2467 rn: pattern0_0, 2468 rm: pattern1_0, 2469 }; 2470 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2471 return Some(expr1_0); 2472 } 2473 2474 // Generated as internal constructor for term fpu_to_int. 2475 pub fn constructor_fpu_to_int<C: Context>( 2476 ctx: &mut C, 2477 arg0: Type, 2478 arg1: &FpuToIntOp, 2479 arg2: Reg, 2480 ) -> Option<ProducesFlags> { 2481 let pattern0_0 = arg0; 2482 let pattern1_0 = arg1; 2483 let pattern2_0 = arg2; 2484 // Rule at src/isa/s390x/inst.isle line 1621. 2485 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2486 let expr1_0 = MInst::FpuToInt { 2487 op: pattern1_0.clone(), 2488 rd: expr0_0, 2489 rn: pattern2_0, 2490 }; 2491 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2492 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2493 inst: expr1_0, 2494 result: expr2_0, 2495 }; 2496 return Some(expr3_0); 2497 } 2498 2499 // Generated as internal constructor for term int_to_fpu. 2500 pub fn constructor_int_to_fpu<C: Context>( 2501 ctx: &mut C, 2502 arg0: Type, 2503 arg1: &IntToFpuOp, 2504 arg2: Reg, 2505 ) -> Option<Reg> { 2506 let pattern0_0 = arg0; 2507 let pattern1_0 = arg1; 2508 let pattern2_0 = arg2; 2509 // Rule at src/isa/s390x/inst.isle line 1628. 2510 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2511 let expr1_0 = MInst::IntToFpu { 2512 op: pattern1_0.clone(), 2513 rd: expr0_0, 2514 rn: pattern2_0, 2515 }; 2516 let expr2_0 = C::emit(ctx, &expr1_0); 2517 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2518 return Some(expr3_0); 2519 } 2520 2521 // Generated as internal constructor for term fpu_round. 2522 pub fn constructor_fpu_round<C: Context>( 2523 ctx: &mut C, 2524 arg0: Type, 2525 arg1: &FpuRoundMode, 2526 arg2: Reg, 2527 ) -> Option<Reg> { 2528 let pattern0_0 = arg0; 2529 let pattern1_0 = arg1; 2530 let pattern2_0 = arg2; 2531 // Rule at src/isa/s390x/inst.isle line 1635. 2532 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2533 let expr1_0 = MInst::FpuRound { 2534 op: pattern1_0.clone(), 2535 rd: expr0_0, 2536 rn: pattern2_0, 2537 }; 2538 let expr2_0 = C::emit(ctx, &expr1_0); 2539 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2540 return Some(expr3_0); 2541 } 2542 2543 // Generated as internal constructor for term fpuvec_rrr. 2544 pub fn constructor_fpuvec_rrr<C: Context>( 2545 ctx: &mut C, 2546 arg0: Type, 2547 arg1: &FPUOp2, 2548 arg2: Reg, 2549 arg3: Reg, 2550 ) -> Option<Reg> { 2551 let pattern0_0 = arg0; 2552 let pattern1_0 = arg1; 2553 let pattern2_0 = arg2; 2554 let pattern3_0 = arg3; 2555 // Rule at src/isa/s390x/inst.isle line 1642. 2556 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2557 let expr1_0 = MInst::FpuVecRRR { 2558 fpu_op: pattern1_0.clone(), 2559 rd: expr0_0, 2560 rn: pattern2_0, 2561 rm: pattern3_0, 2562 }; 2563 let expr2_0 = C::emit(ctx, &expr1_0); 2564 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2565 return Some(expr3_0); 2566 } 2567 2568 // Generated as internal constructor for term mov_to_fpr. 2569 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2570 let pattern0_0 = arg0; 2571 // Rule at src/isa/s390x/inst.isle line 1649. 2572 let expr0_0: Type = F64; 2573 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2574 let expr2_0 = MInst::MovToFpr { 2575 rd: expr1_0, 2576 rn: pattern0_0, 2577 }; 2578 let expr3_0 = C::emit(ctx, &expr2_0); 2579 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2580 return Some(expr4_0); 2581 } 2582 2583 // Generated as internal constructor for term mov_from_fpr. 2584 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2585 let pattern0_0 = arg0; 2586 // Rule at src/isa/s390x/inst.isle line 1656. 2587 let expr0_0: Type = I64; 2588 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2589 let expr2_0 = MInst::MovFromFpr { 2590 rd: expr1_0, 2591 rn: pattern0_0, 2592 }; 2593 let expr3_0 = C::emit(ctx, &expr2_0); 2594 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2595 return Some(expr4_0); 2596 } 2597 2598 // Generated as internal constructor for term fpu_load32. 2599 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2600 let pattern0_0 = arg0; 2601 // Rule at src/isa/s390x/inst.isle line 1663. 2602 let expr0_0: Type = F32; 2603 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2604 let expr2_0 = MInst::FpuLoad32 { 2605 rd: expr1_0, 2606 mem: pattern0_0.clone(), 2607 }; 2608 let expr3_0 = C::emit(ctx, &expr2_0); 2609 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2610 return Some(expr4_0); 2611 } 2612 2613 // Generated as internal constructor for term fpu_load64. 2614 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2615 let pattern0_0 = arg0; 2616 // Rule at src/isa/s390x/inst.isle line 1670. 2617 let expr0_0: Type = F64; 2618 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2619 let expr2_0 = MInst::FpuLoad64 { 2620 rd: expr1_0, 2621 mem: pattern0_0.clone(), 2622 }; 2623 let expr3_0 = C::emit(ctx, &expr2_0); 2624 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2625 return Some(expr4_0); 2626 } 2627 2628 // Generated as internal constructor for term fpu_loadrev32. 2629 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2630 let pattern0_0 = arg0; 2631 // Rule at src/isa/s390x/inst.isle line 1677. 2632 let expr0_0: Type = F32; 2633 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2634 let expr2_0 = MInst::FpuLoadRev32 { 2635 rd: expr1_0, 2636 mem: pattern0_0.clone(), 2637 }; 2638 let expr3_0 = C::emit(ctx, &expr2_0); 2639 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2640 return Some(expr4_0); 2641 } 2642 2643 // Generated as internal constructor for term fpu_loadrev64. 2644 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2645 let pattern0_0 = arg0; 2646 // Rule at src/isa/s390x/inst.isle line 1684. 2647 let expr0_0: Type = F64; 2648 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2649 let expr2_0 = MInst::FpuLoadRev64 { 2650 rd: expr1_0, 2651 mem: pattern0_0.clone(), 2652 }; 2653 let expr3_0 = C::emit(ctx, &expr2_0); 2654 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2655 return Some(expr4_0); 2656 } 2657 2658 // Generated as internal constructor for term fpu_store32. 2659 pub fn constructor_fpu_store32<C: Context>( 2660 ctx: &mut C, 2661 arg0: Reg, 2662 arg1: &MemArg, 2663 ) -> Option<SideEffectNoResult> { 2664 let pattern0_0 = arg0; 2665 let pattern1_0 = arg1; 2666 // Rule at src/isa/s390x/inst.isle line 1691. 2667 let expr0_0 = MInst::FpuStore32 { 2668 rd: pattern0_0, 2669 mem: pattern1_0.clone(), 2670 }; 2671 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2672 return Some(expr1_0); 2673 } 2674 2675 // Generated as internal constructor for term fpu_store64. 2676 pub fn constructor_fpu_store64<C: Context>( 2677 ctx: &mut C, 2678 arg0: Reg, 2679 arg1: &MemArg, 2680 ) -> Option<SideEffectNoResult> { 2681 let pattern0_0 = arg0; 2682 let pattern1_0 = arg1; 2683 // Rule at src/isa/s390x/inst.isle line 1696. 2684 let expr0_0 = MInst::FpuStore64 { 2685 rd: pattern0_0, 2686 mem: pattern1_0.clone(), 2687 }; 2688 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2689 return Some(expr1_0); 2690 } 2691 2692 // Generated as internal constructor for term fpu_storerev32. 2693 pub fn constructor_fpu_storerev32<C: Context>( 2694 ctx: &mut C, 2695 arg0: Reg, 2696 arg1: &MemArg, 2697 ) -> Option<SideEffectNoResult> { 2698 let pattern0_0 = arg0; 2699 let pattern1_0 = arg1; 2700 // Rule at src/isa/s390x/inst.isle line 1701. 2701 let expr0_0 = MInst::FpuStoreRev32 { 2702 rd: pattern0_0, 2703 mem: pattern1_0.clone(), 2704 }; 2705 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2706 return Some(expr1_0); 2707 } 2708 2709 // Generated as internal constructor for term fpu_storerev64. 2710 pub fn constructor_fpu_storerev64<C: Context>( 2711 ctx: &mut C, 2712 arg0: Reg, 2713 arg1: &MemArg, 2714 ) -> Option<SideEffectNoResult> { 2715 let pattern0_0 = arg0; 2716 let pattern1_0 = arg1; 2717 // Rule at src/isa/s390x/inst.isle line 1706. 2718 let expr0_0 = MInst::FpuStoreRev64 { 2719 rd: pattern0_0, 2720 mem: pattern1_0.clone(), 2721 }; 2722 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2723 return Some(expr1_0); 2724 } 2725 2726 // Generated as internal constructor for term load_ext_name_far. 2727 pub fn constructor_load_ext_name_far<C: Context>( 2728 ctx: &mut C, 2729 arg0: ExternalName, 2730 arg1: i64, 2731 ) -> Option<Reg> { 2732 let pattern0_0 = arg0; 2733 let pattern1_0 = arg1; 2734 // Rule at src/isa/s390x/inst.isle line 1711. 2735 let expr0_0: Type = I64; 2736 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2737 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2738 let expr3_0 = MInst::LoadExtNameFar { 2739 rd: expr1_0, 2740 name: expr2_0, 2741 offset: pattern1_0, 2742 }; 2743 let expr4_0 = C::emit(ctx, &expr3_0); 2744 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2745 return Some(expr5_0); 2746 } 2747 2748 // Generated as internal constructor for term load_addr. 2749 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2750 let pattern0_0 = arg0; 2751 // Rule at src/isa/s390x/inst.isle line 1719. 2752 let expr0_0: Type = I64; 2753 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2754 let expr2_0 = MInst::LoadAddr { 2755 rd: expr1_0, 2756 mem: pattern0_0.clone(), 2757 }; 2758 let expr3_0 = C::emit(ctx, &expr2_0); 2759 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2760 return Some(expr4_0); 2761 } 2762 2763 // Generated as internal constructor for term jump_impl. 2764 pub fn constructor_jump_impl<C: Context>( 2765 ctx: &mut C, 2766 arg0: MachLabel, 2767 ) -> Option<SideEffectNoResult> { 2768 let pattern0_0 = arg0; 2769 // Rule at src/isa/s390x/inst.isle line 1726. 2770 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2771 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2772 return Some(expr1_0); 2773 } 2774 2775 // Generated as internal constructor for term cond_br. 2776 pub fn constructor_cond_br<C: Context>( 2777 ctx: &mut C, 2778 arg0: MachLabel, 2779 arg1: MachLabel, 2780 arg2: &Cond, 2781 ) -> Option<SideEffectNoResult> { 2782 let pattern0_0 = arg0; 2783 let pattern1_0 = arg1; 2784 let pattern2_0 = arg2; 2785 // Rule at src/isa/s390x/inst.isle line 1731. 2786 let expr0_0 = MInst::CondBr { 2787 taken: pattern0_0, 2788 not_taken: pattern1_0, 2789 cond: pattern2_0.clone(), 2790 }; 2791 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2792 return Some(expr1_0); 2793 } 2794 2795 // Generated as internal constructor for term oneway_cond_br. 2796 pub fn constructor_oneway_cond_br<C: Context>( 2797 ctx: &mut C, 2798 arg0: MachLabel, 2799 arg1: &Cond, 2800 ) -> Option<SideEffectNoResult> { 2801 let pattern0_0 = arg0; 2802 let pattern1_0 = arg1; 2803 // Rule at src/isa/s390x/inst.isle line 1736. 2804 let expr0_0 = MInst::OneWayCondBr { 2805 target: pattern0_0, 2806 cond: pattern1_0.clone(), 2807 }; 2808 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2809 return Some(expr1_0); 2810 } 2811 2812 // Generated as internal constructor for term jt_sequence. 2813 pub fn constructor_jt_sequence<C: Context>( 2814 ctx: &mut C, 2815 arg0: Reg, 2816 arg1: &VecMachLabel, 2817 ) -> Option<SideEffectNoResult> { 2818 let pattern0_0 = arg0; 2819 let pattern1_0 = arg1; 2820 // Rule at src/isa/s390x/inst.isle line 1741. 2821 let expr0_0 = MInst::JTSequence { 2822 ridx: pattern0_0, 2823 targets: pattern1_0.clone(), 2824 }; 2825 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2826 return Some(expr1_0); 2827 } 2828 2829 // Generated as internal constructor for term drop_flags. 2830 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2831 let pattern0_0 = arg0; 2832 if let &ProducesFlags::ProducesFlagsReturnsReg { 2833 inst: ref pattern1_0, 2834 result: pattern1_1, 2835 } = pattern0_0 2836 { 2837 // Rule at src/isa/s390x/inst.isle line 1746. 2838 let expr0_0 = C::emit(ctx, pattern1_0); 2839 return Some(pattern1_1); 2840 } 2841 return None; 2842 } 2843 2844 // Generated as internal constructor for term push_alu_reg. 2845 pub fn constructor_push_alu_reg<C: Context>( 2846 ctx: &mut C, 2847 arg0: &VecMInstBuilder, 2848 arg1: &ALUOp, 2849 arg2: WritableReg, 2850 arg3: Reg, 2851 arg4: Reg, 2852 ) -> Option<Reg> { 2853 let pattern0_0 = arg0; 2854 let pattern1_0 = arg1; 2855 let pattern2_0 = arg2; 2856 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2857 let pattern4_0 = arg3; 2858 let pattern5_0 = arg4; 2859 // Rule at src/isa/s390x/inst.isle line 1785. 2860 let expr0_0 = MInst::AluRRR { 2861 alu_op: pattern1_0.clone(), 2862 rd: pattern3_0, 2863 rn: pattern4_0, 2864 rm: pattern5_0, 2865 }; 2866 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2867 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2868 return Some(expr2_0); 2869 } 2870 return None; 2871 } 2872 2873 // Generated as internal constructor for term push_alu_uimm32shifted. 2874 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2875 ctx: &mut C, 2876 arg0: &VecMInstBuilder, 2877 arg1: &ALUOp, 2878 arg2: WritableReg, 2879 arg3: Reg, 2880 arg4: UImm32Shifted, 2881 ) -> Option<Reg> { 2882 let pattern0_0 = arg0; 2883 let pattern1_0 = arg1; 2884 let pattern2_0 = arg2; 2885 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2886 let pattern4_0 = arg3; 2887 let closure5 = || { 2888 return Some(pattern3_0); 2889 }; 2890 if let Some(pattern5_0) = closure5() { 2891 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2892 let pattern7_0 = arg4; 2893 // Rule at src/isa/s390x/inst.isle line 1791. 2894 let expr0_0 = MInst::AluRUImm32Shifted { 2895 alu_op: pattern1_0.clone(), 2896 rd: pattern3_0, 2897 imm: pattern7_0, 2898 }; 2899 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2900 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2901 return Some(expr2_0); 2902 } 2903 } 2904 } 2905 return None; 2906 } 2907 2908 // Generated as internal constructor for term push_shift. 2909 pub fn constructor_push_shift<C: Context>( 2910 ctx: &mut C, 2911 arg0: &VecMInstBuilder, 2912 arg1: &ShiftOp, 2913 arg2: WritableReg, 2914 arg3: Reg, 2915 arg4: u8, 2916 arg5: Reg, 2917 ) -> Option<Reg> { 2918 let pattern0_0 = arg0; 2919 let pattern1_0 = arg1; 2920 let pattern2_0 = arg2; 2921 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2922 let pattern4_0 = arg3; 2923 let pattern5_0 = arg4; 2924 let pattern6_0 = arg5; 2925 // Rule at src/isa/s390x/inst.isle line 1797. 2926 let expr0_0 = MInst::ShiftRR { 2927 shift_op: pattern1_0.clone(), 2928 rd: pattern3_0, 2929 rn: pattern4_0, 2930 shift_imm: pattern5_0, 2931 shift_reg: pattern6_0, 2932 }; 2933 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2934 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2935 return Some(expr2_0); 2936 } 2937 return None; 2938 } 2939 2940 // Generated as internal constructor for term push_rxsbg. 2941 pub fn constructor_push_rxsbg<C: Context>( 2942 ctx: &mut C, 2943 arg0: &VecMInstBuilder, 2944 arg1: &RxSBGOp, 2945 arg2: WritableReg, 2946 arg3: Reg, 2947 arg4: Reg, 2948 arg5: u8, 2949 arg6: u8, 2950 arg7: i8, 2951 ) -> Option<Reg> { 2952 let pattern0_0 = arg0; 2953 let pattern1_0 = arg1; 2954 let pattern2_0 = arg2; 2955 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2956 let pattern4_0 = arg3; 2957 let closure5 = || { 2958 return Some(pattern3_0); 2959 }; 2960 if let Some(pattern5_0) = closure5() { 2961 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2962 let pattern7_0 = arg4; 2963 let pattern8_0 = arg5; 2964 let pattern9_0 = arg6; 2965 let pattern10_0 = arg7; 2966 // Rule at src/isa/s390x/inst.isle line 1804. 2967 let expr0_0 = MInst::RxSBG { 2968 op: pattern1_0.clone(), 2969 rd: pattern3_0, 2970 rn: pattern7_0, 2971 start_bit: pattern8_0, 2972 end_bit: pattern9_0, 2973 rotate_amt: pattern10_0, 2974 }; 2975 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2976 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2977 return Some(expr2_0); 2978 } 2979 } 2980 } 2981 return None; 2982 } 2983 2984 // Generated as internal constructor for term push_unary. 2985 pub fn constructor_push_unary<C: Context>( 2986 ctx: &mut C, 2987 arg0: &VecMInstBuilder, 2988 arg1: &UnaryOp, 2989 arg2: WritableReg, 2990 arg3: Reg, 2991 ) -> Option<Reg> { 2992 let pattern0_0 = arg0; 2993 let pattern1_0 = arg1; 2994 let pattern2_0 = arg2; 2995 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2996 let pattern4_0 = arg3; 2997 // Rule at src/isa/s390x/inst.isle line 1811. 2998 let expr0_0 = MInst::UnaryRR { 2999 op: pattern1_0.clone(), 3000 rd: pattern3_0, 3001 rn: pattern4_0, 3002 }; 3003 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3004 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 3005 return Some(expr2_0); 3006 } 3007 return None; 3008 } 3009 3010 // Generated as internal constructor for term push_atomic_cas32. 3011 pub fn constructor_push_atomic_cas32<C: Context>( 3012 ctx: &mut C, 3013 arg0: &VecMInstBuilder, 3014 arg1: WritableReg, 3015 arg2: Reg, 3016 arg3: &MemArg, 3017 ) -> Option<Reg> { 3018 let pattern0_0 = arg0; 3019 let pattern1_0 = arg1; 3020 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3021 let pattern3_0 = arg2; 3022 let pattern4_0 = arg3; 3023 // Rule at src/isa/s390x/inst.isle line 1817. 3024 let expr0_0 = MInst::AtomicCas32 { 3025 rd: pattern2_0, 3026 rn: pattern3_0, 3027 mem: pattern4_0.clone(), 3028 }; 3029 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3030 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3031 return Some(expr2_0); 3032 } 3033 return None; 3034 } 3035 3036 // Generated as internal constructor for term push_atomic_cas64. 3037 pub fn constructor_push_atomic_cas64<C: Context>( 3038 ctx: &mut C, 3039 arg0: &VecMInstBuilder, 3040 arg1: WritableReg, 3041 arg2: Reg, 3042 arg3: &MemArg, 3043 ) -> Option<Reg> { 3044 let pattern0_0 = arg0; 3045 let pattern1_0 = arg1; 3046 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3047 let pattern3_0 = arg2; 3048 let pattern4_0 = arg3; 3049 // Rule at src/isa/s390x/inst.isle line 1823. 3050 let expr0_0 = MInst::AtomicCas64 { 3051 rd: pattern2_0, 3052 rn: pattern3_0, 3053 mem: pattern4_0.clone(), 3054 }; 3055 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3056 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3057 return Some(expr2_0); 3058 } 3059 return None; 3060 } 3061 3062 // Generated as internal constructor for term push_break_if. 3063 pub fn constructor_push_break_if<C: Context>( 3064 ctx: &mut C, 3065 arg0: &VecMInstBuilder, 3066 arg1: &ProducesFlags, 3067 arg2: &Cond, 3068 ) -> Option<Reg> { 3069 let pattern0_0 = arg0; 3070 let pattern1_0 = arg1; 3071 if let &ProducesFlags::ProducesFlagsSideEffect { 3072 inst: ref pattern2_0, 3073 } = pattern1_0 3074 { 3075 let pattern3_0 = arg2; 3076 // Rule at src/isa/s390x/inst.isle line 1829. 3077 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3078 let expr1_0 = MInst::CondBreak { 3079 cond: pattern3_0.clone(), 3080 }; 3081 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3082 let expr3_0 = C::invalid_reg(ctx); 3083 return Some(expr3_0); 3084 } 3085 return None; 3086 } 3087 3088 // Generated as internal constructor for term emit_loop. 3089 pub fn constructor_emit_loop<C: Context>( 3090 ctx: &mut C, 3091 arg0: &VecMInstBuilder, 3092 arg1: &Cond, 3093 ) -> Option<Unit> { 3094 let pattern0_0 = arg0; 3095 let pattern1_0 = arg1; 3096 // Rule at src/isa/s390x/inst.isle line 1836. 3097 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3098 let expr1_0 = MInst::Loop { 3099 body: expr0_0, 3100 cond: pattern1_0.clone(), 3101 }; 3102 let expr2_0 = C::emit(ctx, &expr1_0); 3103 return Some(expr2_0); 3104 } 3105 3106 // Generated as internal constructor for term emit_mov. 3107 pub fn constructor_emit_mov<C: Context>( 3108 ctx: &mut C, 3109 arg0: Type, 3110 arg1: WritableReg, 3111 arg2: Reg, 3112 ) -> Option<Unit> { 3113 let pattern0_0 = arg0; 3114 if pattern0_0 == F32 { 3115 let pattern2_0 = arg1; 3116 let pattern3_0 = arg2; 3117 // Rule at src/isa/s390x/inst.isle line 1851. 3118 let expr0_0 = MInst::FpuMove32 { 3119 rd: pattern2_0, 3120 rn: pattern3_0, 3121 }; 3122 let expr1_0 = C::emit(ctx, &expr0_0); 3123 return Some(expr1_0); 3124 } 3125 if pattern0_0 == F64 { 3126 let pattern2_0 = arg1; 3127 let pattern3_0 = arg2; 3128 // Rule at src/isa/s390x/inst.isle line 1854. 3129 let expr0_0 = MInst::FpuMove64 { 3130 rd: pattern2_0, 3131 rn: pattern3_0, 3132 }; 3133 let expr1_0 = C::emit(ctx, &expr0_0); 3134 return Some(expr1_0); 3135 } 3136 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3137 let pattern2_0 = arg1; 3138 let pattern3_0 = arg2; 3139 // Rule at src/isa/s390x/inst.isle line 1845. 3140 let expr0_0 = MInst::Mov32 { 3141 rd: pattern2_0, 3142 rm: pattern3_0, 3143 }; 3144 let expr1_0 = C::emit(ctx, &expr0_0); 3145 return Some(expr1_0); 3146 } 3147 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3148 let pattern2_0 = arg1; 3149 let pattern3_0 = arg2; 3150 // Rule at src/isa/s390x/inst.isle line 1848. 3151 let expr0_0 = MInst::Mov64 { 3152 rd: pattern2_0, 3153 rm: pattern3_0, 3154 }; 3155 let expr1_0 = C::emit(ctx, &expr0_0); 3156 return Some(expr1_0); 3157 } 3158 return None; 3159 } 3160 3161 // Generated as internal constructor for term copy_writable_reg. 3162 pub fn constructor_copy_writable_reg<C: Context>( 3163 ctx: &mut C, 3164 arg0: Type, 3165 arg1: Reg, 3166 ) -> Option<WritableReg> { 3167 let pattern0_0 = arg0; 3168 let pattern1_0 = arg1; 3169 // Rule at src/isa/s390x/inst.isle line 1859. 3170 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3171 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3172 return Some(expr0_0); 3173 } 3174 3175 // Generated as internal constructor for term copy_reg. 3176 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3177 let pattern0_0 = arg0; 3178 let pattern1_0 = arg1; 3179 // Rule at src/isa/s390x/inst.isle line 1866. 3180 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3181 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3182 return Some(expr1_0); 3183 } 3184 3185 // Generated as internal constructor for term emit_load. 3186 pub fn constructor_emit_load<C: Context>( 3187 ctx: &mut C, 3188 arg0: Type, 3189 arg1: WritableReg, 3190 arg2: &MemArg, 3191 ) -> Option<Unit> { 3192 let pattern0_0 = arg0; 3193 if pattern0_0 == I32 { 3194 let pattern2_0 = arg1; 3195 let pattern3_0 = arg2; 3196 // Rule at src/isa/s390x/inst.isle line 1870. 3197 let expr0_0 = MInst::Load32 { 3198 rd: pattern2_0, 3199 mem: pattern3_0.clone(), 3200 }; 3201 let expr1_0 = C::emit(ctx, &expr0_0); 3202 return Some(expr1_0); 3203 } 3204 if pattern0_0 == I64 { 3205 let pattern2_0 = arg1; 3206 let pattern3_0 = arg2; 3207 // Rule at src/isa/s390x/inst.isle line 1872. 3208 let expr0_0 = MInst::Load64 { 3209 rd: pattern2_0, 3210 mem: pattern3_0.clone(), 3211 }; 3212 let expr1_0 = C::emit(ctx, &expr0_0); 3213 return Some(expr1_0); 3214 } 3215 return None; 3216 } 3217 3218 // Generated as internal constructor for term emit_imm. 3219 pub fn constructor_emit_imm<C: Context>( 3220 ctx: &mut C, 3221 arg0: Type, 3222 arg1: WritableReg, 3223 arg2: u64, 3224 ) -> Option<Unit> { 3225 let pattern0_0 = arg0; 3226 if pattern0_0 == F32 { 3227 let pattern2_0 = arg1; 3228 let pattern3_0 = arg2; 3229 // Rule at src/isa/s390x/inst.isle line 1928. 3230 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3231 let expr1_0 = MInst::LoadFpuConst32 { 3232 rd: pattern2_0, 3233 const_data: expr0_0, 3234 }; 3235 let expr2_0 = C::emit(ctx, &expr1_0); 3236 return Some(expr2_0); 3237 } 3238 if pattern0_0 == F64 { 3239 let pattern2_0 = arg1; 3240 let pattern3_0 = arg2; 3241 // Rule at src/isa/s390x/inst.isle line 1933. 3242 let expr0_0 = MInst::LoadFpuConst64 { 3243 rd: pattern2_0, 3244 const_data: pattern3_0, 3245 }; 3246 let expr1_0 = C::emit(ctx, &expr0_0); 3247 return Some(expr1_0); 3248 } 3249 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3250 let pattern2_0 = arg1; 3251 let pattern3_0 = arg2; 3252 // Rule at src/isa/s390x/inst.isle line 1882. 3253 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3254 let expr1_0 = MInst::Mov32SImm16 { 3255 rd: pattern2_0, 3256 imm: expr0_0, 3257 }; 3258 let expr2_0 = C::emit(ctx, &expr1_0); 3259 return Some(expr2_0); 3260 } 3261 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3262 let pattern2_0 = arg1; 3263 let pattern3_0 = arg2; 3264 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3265 // Rule at src/isa/s390x/inst.isle line 1886. 3266 let expr0_0 = MInst::Mov32SImm16 { 3267 rd: pattern2_0, 3268 imm: pattern4_0, 3269 }; 3270 let expr1_0 = C::emit(ctx, &expr0_0); 3271 return Some(expr1_0); 3272 } 3273 // Rule at src/isa/s390x/inst.isle line 1890. 3274 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3275 let expr1_0 = MInst::Mov32Imm { 3276 rd: pattern2_0, 3277 imm: expr0_0, 3278 }; 3279 let expr2_0 = C::emit(ctx, &expr1_0); 3280 return Some(expr2_0); 3281 } 3282 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3283 let pattern2_0 = arg1; 3284 let pattern3_0 = arg2; 3285 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3286 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3287 // Rule at src/isa/s390x/inst.isle line 1910. 3288 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3289 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3290 return Some(expr1_0); 3291 } 3292 } 3293 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3294 // Rule at src/isa/s390x/inst.isle line 1894. 3295 let expr0_0 = MInst::Mov64SImm16 { 3296 rd: pattern2_0, 3297 imm: pattern4_0, 3298 }; 3299 let expr1_0 = C::emit(ctx, &expr0_0); 3300 return Some(expr1_0); 3301 } 3302 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3303 // Rule at src/isa/s390x/inst.isle line 1898. 3304 let expr0_0 = MInst::Mov64SImm32 { 3305 rd: pattern2_0, 3306 imm: pattern4_0, 3307 }; 3308 let expr1_0 = C::emit(ctx, &expr0_0); 3309 return Some(expr1_0); 3310 } 3311 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3312 // Rule at src/isa/s390x/inst.isle line 1906. 3313 let expr0_0 = MInst::Mov64UImm32Shifted { 3314 rd: pattern2_0, 3315 imm: pattern4_0, 3316 }; 3317 let expr1_0 = C::emit(ctx, &expr0_0); 3318 return Some(expr1_0); 3319 } 3320 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3321 // Rule at src/isa/s390x/inst.isle line 1902. 3322 let expr0_0 = MInst::Mov64UImm16Shifted { 3323 rd: pattern2_0, 3324 imm: pattern4_0, 3325 }; 3326 let expr1_0 = C::emit(ctx, &expr0_0); 3327 return Some(expr1_0); 3328 } 3329 } 3330 return None; 3331 } 3332 3333 // Generated as internal constructor for term emit_insert_imm. 3334 pub fn constructor_emit_insert_imm<C: Context>( 3335 ctx: &mut C, 3336 arg0: WritableReg, 3337 arg1: u64, 3338 ) -> Option<Unit> { 3339 let pattern0_0 = arg0; 3340 let pattern1_0 = arg1; 3341 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3342 // Rule at src/isa/s390x/inst.isle line 1923. 3343 let expr0_0 = MInst::Insert64UImm32Shifted { 3344 rd: pattern0_0, 3345 imm: pattern2_0, 3346 }; 3347 let expr1_0 = C::emit(ctx, &expr0_0); 3348 return Some(expr1_0); 3349 } 3350 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3351 // Rule at src/isa/s390x/inst.isle line 1919. 3352 let expr0_0 = MInst::Insert64UImm16Shifted { 3353 rd: pattern0_0, 3354 imm: pattern2_0, 3355 }; 3356 let expr1_0 = C::emit(ctx, &expr0_0); 3357 return Some(expr1_0); 3358 } 3359 return None; 3360 } 3361 3362 // Generated as internal constructor for term imm. 3363 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3364 let pattern0_0 = arg0; 3365 let pattern1_0 = arg1; 3366 // Rule at src/isa/s390x/inst.isle line 1938. 3367 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3368 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3369 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3370 return Some(expr2_0); 3371 } 3372 3373 // Generated as internal constructor for term imm_regpair_lo. 3374 pub fn constructor_imm_regpair_lo<C: Context>( 3375 ctx: &mut C, 3376 arg0: Type, 3377 arg1: u64, 3378 arg2: &RegPair, 3379 ) -> Option<RegPair> { 3380 let pattern0_0 = arg0; 3381 let pattern1_0 = arg1; 3382 let pattern2_0 = arg2; 3383 // Rule at src/isa/s390x/inst.isle line 1946. 3384 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3385 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3386 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3387 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3388 return Some(expr3_0); 3389 } 3390 3391 // Generated as internal constructor for term imm_regpair_hi. 3392 pub fn constructor_imm_regpair_hi<C: Context>( 3393 ctx: &mut C, 3394 arg0: Type, 3395 arg1: u64, 3396 arg2: &RegPair, 3397 ) -> Option<RegPair> { 3398 let pattern0_0 = arg0; 3399 let pattern1_0 = arg1; 3400 let pattern2_0 = arg2; 3401 // Rule at src/isa/s390x/inst.isle line 1954. 3402 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3403 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3404 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3405 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3406 return Some(expr3_0); 3407 } 3408 3409 // Generated as internal constructor for term ty_ext32. 3410 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3411 let pattern0_0 = arg0; 3412 if pattern0_0 == I8 { 3413 // Rule at src/isa/s390x/inst.isle line 1964. 3414 let expr0_0: Type = I32; 3415 return Some(expr0_0); 3416 } 3417 if pattern0_0 == I16 { 3418 // Rule at src/isa/s390x/inst.isle line 1965. 3419 let expr0_0: Type = I32; 3420 return Some(expr0_0); 3421 } 3422 if pattern0_0 == I32 { 3423 // Rule at src/isa/s390x/inst.isle line 1966. 3424 let expr0_0: Type = I32; 3425 return Some(expr0_0); 3426 } 3427 if pattern0_0 == I64 { 3428 // Rule at src/isa/s390x/inst.isle line 1967. 3429 let expr0_0: Type = I64; 3430 return Some(expr0_0); 3431 } 3432 return None; 3433 } 3434 3435 // Generated as internal constructor for term ty_ext64. 3436 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3437 let pattern0_0 = arg0; 3438 if pattern0_0 == I8 { 3439 // Rule at src/isa/s390x/inst.isle line 1971. 3440 let expr0_0: Type = I64; 3441 return Some(expr0_0); 3442 } 3443 if pattern0_0 == I16 { 3444 // Rule at src/isa/s390x/inst.isle line 1972. 3445 let expr0_0: Type = I64; 3446 return Some(expr0_0); 3447 } 3448 if pattern0_0 == I32 { 3449 // Rule at src/isa/s390x/inst.isle line 1973. 3450 let expr0_0: Type = I64; 3451 return Some(expr0_0); 3452 } 3453 if pattern0_0 == I64 { 3454 // Rule at src/isa/s390x/inst.isle line 1974. 3455 let expr0_0: Type = I64; 3456 return Some(expr0_0); 3457 } 3458 return None; 3459 } 3460 3461 // Generated as internal constructor for term emit_zext32_reg. 3462 pub fn constructor_emit_zext32_reg<C: Context>( 3463 ctx: &mut C, 3464 arg0: WritableReg, 3465 arg1: Type, 3466 arg2: Reg, 3467 ) -> Option<Unit> { 3468 let pattern0_0 = arg0; 3469 let pattern1_0 = arg1; 3470 let pattern2_0 = arg2; 3471 // Rule at src/isa/s390x/inst.isle line 1979. 3472 let expr0_0: bool = false; 3473 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3474 let expr2_0: u8 = 32; 3475 let expr3_0 = MInst::Extend { 3476 rd: pattern0_0, 3477 rn: pattern2_0, 3478 signed: expr0_0, 3479 from_bits: expr1_0, 3480 to_bits: expr2_0, 3481 }; 3482 let expr4_0 = C::emit(ctx, &expr3_0); 3483 return Some(expr4_0); 3484 } 3485 3486 // Generated as internal constructor for term emit_sext32_reg. 3487 pub fn constructor_emit_sext32_reg<C: Context>( 3488 ctx: &mut C, 3489 arg0: WritableReg, 3490 arg1: Type, 3491 arg2: Reg, 3492 ) -> Option<Unit> { 3493 let pattern0_0 = arg0; 3494 let pattern1_0 = arg1; 3495 let pattern2_0 = arg2; 3496 // Rule at src/isa/s390x/inst.isle line 1985. 3497 let expr0_0: bool = true; 3498 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3499 let expr2_0: u8 = 32; 3500 let expr3_0 = MInst::Extend { 3501 rd: pattern0_0, 3502 rn: pattern2_0, 3503 signed: expr0_0, 3504 from_bits: expr1_0, 3505 to_bits: expr2_0, 3506 }; 3507 let expr4_0 = C::emit(ctx, &expr3_0); 3508 return Some(expr4_0); 3509 } 3510 3511 // Generated as internal constructor for term emit_zext64_reg. 3512 pub fn constructor_emit_zext64_reg<C: Context>( 3513 ctx: &mut C, 3514 arg0: WritableReg, 3515 arg1: Type, 3516 arg2: Reg, 3517 ) -> Option<Unit> { 3518 let pattern0_0 = arg0; 3519 let pattern1_0 = arg1; 3520 let pattern2_0 = arg2; 3521 // Rule at src/isa/s390x/inst.isle line 1991. 3522 let expr0_0: bool = false; 3523 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3524 let expr2_0: u8 = 64; 3525 let expr3_0 = MInst::Extend { 3526 rd: pattern0_0, 3527 rn: pattern2_0, 3528 signed: expr0_0, 3529 from_bits: expr1_0, 3530 to_bits: expr2_0, 3531 }; 3532 let expr4_0 = C::emit(ctx, &expr3_0); 3533 return Some(expr4_0); 3534 } 3535 3536 // Generated as internal constructor for term emit_sext64_reg. 3537 pub fn constructor_emit_sext64_reg<C: Context>( 3538 ctx: &mut C, 3539 arg0: WritableReg, 3540 arg1: Type, 3541 arg2: Reg, 3542 ) -> Option<Unit> { 3543 let pattern0_0 = arg0; 3544 let pattern1_0 = arg1; 3545 let pattern2_0 = arg2; 3546 // Rule at src/isa/s390x/inst.isle line 1997. 3547 let expr0_0: bool = true; 3548 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3549 let expr2_0: u8 = 64; 3550 let expr3_0 = MInst::Extend { 3551 rd: pattern0_0, 3552 rn: pattern2_0, 3553 signed: expr0_0, 3554 from_bits: expr1_0, 3555 to_bits: expr2_0, 3556 }; 3557 let expr4_0 = C::emit(ctx, &expr3_0); 3558 return Some(expr4_0); 3559 } 3560 3561 // Generated as internal constructor for term zext32_reg. 3562 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3563 let pattern0_0 = arg0; 3564 let pattern1_0 = arg1; 3565 // Rule at src/isa/s390x/inst.isle line 2003. 3566 let expr0_0: Type = I32; 3567 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3568 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3569 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3570 return Some(expr3_0); 3571 } 3572 3573 // Generated as internal constructor for term sext32_reg. 3574 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3575 let pattern0_0 = arg0; 3576 let pattern1_0 = arg1; 3577 // Rule at src/isa/s390x/inst.isle line 2011. 3578 let expr0_0: Type = I32; 3579 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3580 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3581 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3582 return Some(expr3_0); 3583 } 3584 3585 // Generated as internal constructor for term zext64_reg. 3586 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3587 let pattern0_0 = arg0; 3588 let pattern1_0 = arg1; 3589 // Rule at src/isa/s390x/inst.isle line 2019. 3590 let expr0_0: Type = I64; 3591 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3592 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3593 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3594 return Some(expr3_0); 3595 } 3596 3597 // Generated as internal constructor for term sext64_reg. 3598 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3599 let pattern0_0 = arg0; 3600 let pattern1_0 = arg1; 3601 // Rule at src/isa/s390x/inst.isle line 2027. 3602 let expr0_0: Type = I64; 3603 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3604 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3605 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3606 return Some(expr3_0); 3607 } 3608 3609 // Generated as internal constructor for term emit_zext32_mem. 3610 pub fn constructor_emit_zext32_mem<C: Context>( 3611 ctx: &mut C, 3612 arg0: WritableReg, 3613 arg1: Type, 3614 arg2: &MemArg, 3615 ) -> Option<Unit> { 3616 let pattern0_0 = arg0; 3617 let pattern1_0 = arg1; 3618 if pattern1_0 == I8 { 3619 let pattern3_0 = arg2; 3620 // Rule at src/isa/s390x/inst.isle line 2035. 3621 let expr0_0 = MInst::Load32ZExt8 { 3622 rd: pattern0_0, 3623 mem: pattern3_0.clone(), 3624 }; 3625 let expr1_0 = C::emit(ctx, &expr0_0); 3626 return Some(expr1_0); 3627 } 3628 if pattern1_0 == I16 { 3629 let pattern3_0 = arg2; 3630 // Rule at src/isa/s390x/inst.isle line 2036. 3631 let expr0_0 = MInst::Load32ZExt16 { 3632 rd: pattern0_0, 3633 mem: pattern3_0.clone(), 3634 }; 3635 let expr1_0 = C::emit(ctx, &expr0_0); 3636 return Some(expr1_0); 3637 } 3638 return None; 3639 } 3640 3641 // Generated as internal constructor for term emit_sext32_mem. 3642 pub fn constructor_emit_sext32_mem<C: Context>( 3643 ctx: &mut C, 3644 arg0: WritableReg, 3645 arg1: Type, 3646 arg2: &MemArg, 3647 ) -> Option<Unit> { 3648 let pattern0_0 = arg0; 3649 let pattern1_0 = arg1; 3650 if pattern1_0 == I8 { 3651 let pattern3_0 = arg2; 3652 // Rule at src/isa/s390x/inst.isle line 2040. 3653 let expr0_0 = MInst::Load32SExt8 { 3654 rd: pattern0_0, 3655 mem: pattern3_0.clone(), 3656 }; 3657 let expr1_0 = C::emit(ctx, &expr0_0); 3658 return Some(expr1_0); 3659 } 3660 if pattern1_0 == I16 { 3661 let pattern3_0 = arg2; 3662 // Rule at src/isa/s390x/inst.isle line 2041. 3663 let expr0_0 = MInst::Load32SExt16 { 3664 rd: pattern0_0, 3665 mem: pattern3_0.clone(), 3666 }; 3667 let expr1_0 = C::emit(ctx, &expr0_0); 3668 return Some(expr1_0); 3669 } 3670 return None; 3671 } 3672 3673 // Generated as internal constructor for term emit_zext64_mem. 3674 pub fn constructor_emit_zext64_mem<C: Context>( 3675 ctx: &mut C, 3676 arg0: WritableReg, 3677 arg1: Type, 3678 arg2: &MemArg, 3679 ) -> Option<Unit> { 3680 let pattern0_0 = arg0; 3681 let pattern1_0 = arg1; 3682 if pattern1_0 == I8 { 3683 let pattern3_0 = arg2; 3684 // Rule at src/isa/s390x/inst.isle line 2045. 3685 let expr0_0 = MInst::Load64ZExt8 { 3686 rd: pattern0_0, 3687 mem: pattern3_0.clone(), 3688 }; 3689 let expr1_0 = C::emit(ctx, &expr0_0); 3690 return Some(expr1_0); 3691 } 3692 if pattern1_0 == I16 { 3693 let pattern3_0 = arg2; 3694 // Rule at src/isa/s390x/inst.isle line 2046. 3695 let expr0_0 = MInst::Load64ZExt16 { 3696 rd: pattern0_0, 3697 mem: pattern3_0.clone(), 3698 }; 3699 let expr1_0 = C::emit(ctx, &expr0_0); 3700 return Some(expr1_0); 3701 } 3702 if pattern1_0 == I32 { 3703 let pattern3_0 = arg2; 3704 // Rule at src/isa/s390x/inst.isle line 2047. 3705 let expr0_0 = MInst::Load64ZExt32 { 3706 rd: pattern0_0, 3707 mem: pattern3_0.clone(), 3708 }; 3709 let expr1_0 = C::emit(ctx, &expr0_0); 3710 return Some(expr1_0); 3711 } 3712 return None; 3713 } 3714 3715 // Generated as internal constructor for term emit_sext64_mem. 3716 pub fn constructor_emit_sext64_mem<C: Context>( 3717 ctx: &mut C, 3718 arg0: WritableReg, 3719 arg1: Type, 3720 arg2: &MemArg, 3721 ) -> Option<Unit> { 3722 let pattern0_0 = arg0; 3723 let pattern1_0 = arg1; 3724 if pattern1_0 == I8 { 3725 let pattern3_0 = arg2; 3726 // Rule at src/isa/s390x/inst.isle line 2051. 3727 let expr0_0 = MInst::Load64SExt8 { 3728 rd: pattern0_0, 3729 mem: pattern3_0.clone(), 3730 }; 3731 let expr1_0 = C::emit(ctx, &expr0_0); 3732 return Some(expr1_0); 3733 } 3734 if pattern1_0 == I16 { 3735 let pattern3_0 = arg2; 3736 // Rule at src/isa/s390x/inst.isle line 2052. 3737 let expr0_0 = MInst::Load64SExt16 { 3738 rd: pattern0_0, 3739 mem: pattern3_0.clone(), 3740 }; 3741 let expr1_0 = C::emit(ctx, &expr0_0); 3742 return Some(expr1_0); 3743 } 3744 if pattern1_0 == I32 { 3745 let pattern3_0 = arg2; 3746 // Rule at src/isa/s390x/inst.isle line 2053. 3747 let expr0_0 = MInst::Load64SExt32 { 3748 rd: pattern0_0, 3749 mem: pattern3_0.clone(), 3750 }; 3751 let expr1_0 = C::emit(ctx, &expr0_0); 3752 return Some(expr1_0); 3753 } 3754 return None; 3755 } 3756 3757 // Generated as internal constructor for term zext32_mem. 3758 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3759 let pattern0_0 = arg0; 3760 let pattern1_0 = arg1; 3761 // Rule at src/isa/s390x/inst.isle line 2057. 3762 let expr0_0: Type = I32; 3763 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3764 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3765 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3766 return Some(expr3_0); 3767 } 3768 3769 // Generated as internal constructor for term sext32_mem. 3770 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3771 let pattern0_0 = arg0; 3772 let pattern1_0 = arg1; 3773 // Rule at src/isa/s390x/inst.isle line 2064. 3774 let expr0_0: Type = I32; 3775 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3776 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3777 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3778 return Some(expr3_0); 3779 } 3780 3781 // Generated as internal constructor for term zext64_mem. 3782 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3783 let pattern0_0 = arg0; 3784 let pattern1_0 = arg1; 3785 // Rule at src/isa/s390x/inst.isle line 2071. 3786 let expr0_0: Type = I64; 3787 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3788 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3789 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3790 return Some(expr3_0); 3791 } 3792 3793 // Generated as internal constructor for term sext64_mem. 3794 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3795 let pattern0_0 = arg0; 3796 let pattern1_0 = arg1; 3797 // Rule at src/isa/s390x/inst.isle line 2078. 3798 let expr0_0: Type = I64; 3799 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3800 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3801 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3802 return Some(expr3_0); 3803 } 3804 3805 // Generated as internal constructor for term emit_put_in_reg_zext32. 3806 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3807 ctx: &mut C, 3808 arg0: WritableReg, 3809 arg1: Value, 3810 ) -> Option<Unit> { 3811 let pattern0_0 = arg0; 3812 let pattern1_0 = arg1; 3813 let pattern2_0 = C::value_type(ctx, pattern1_0); 3814 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3815 // Rule at src/isa/s390x/inst.isle line 2086. 3816 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3817 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3818 return Some(expr1_0); 3819 } 3820 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3821 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3822 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3823 if let &InstructionData::Load { 3824 opcode: ref pattern6_0, 3825 arg: pattern6_1, 3826 flags: pattern6_2, 3827 offset: pattern6_3, 3828 } = &pattern5_0 3829 { 3830 if let &Opcode::Load = pattern6_0 { 3831 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3832 // Rule at src/isa/s390x/inst.isle line 2088. 3833 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3834 let expr1_0 = 3835 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3836 return Some(expr1_0); 3837 } 3838 } 3839 } 3840 } 3841 // Rule at src/isa/s390x/inst.isle line 2090. 3842 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3843 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3844 return Some(expr1_0); 3845 } 3846 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3847 // Rule at src/isa/s390x/inst.isle line 2092. 3848 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3849 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3850 return Some(expr1_0); 3851 } 3852 return None; 3853 } 3854 3855 // Generated as internal constructor for term emit_put_in_reg_sext32. 3856 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3857 ctx: &mut C, 3858 arg0: WritableReg, 3859 arg1: Value, 3860 ) -> Option<Unit> { 3861 let pattern0_0 = arg0; 3862 let pattern1_0 = arg1; 3863 let pattern2_0 = C::value_type(ctx, pattern1_0); 3864 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3865 // Rule at src/isa/s390x/inst.isle line 2097. 3866 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3867 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3868 return Some(expr1_0); 3869 } 3870 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3871 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3872 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3873 if let &InstructionData::Load { 3874 opcode: ref pattern6_0, 3875 arg: pattern6_1, 3876 flags: pattern6_2, 3877 offset: pattern6_3, 3878 } = &pattern5_0 3879 { 3880 if let &Opcode::Load = pattern6_0 { 3881 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3882 // Rule at src/isa/s390x/inst.isle line 2099. 3883 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3884 let expr1_0 = 3885 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3886 return Some(expr1_0); 3887 } 3888 } 3889 } 3890 } 3891 // Rule at src/isa/s390x/inst.isle line 2101. 3892 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3893 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3894 return Some(expr1_0); 3895 } 3896 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3897 // Rule at src/isa/s390x/inst.isle line 2103. 3898 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3899 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3900 return Some(expr1_0); 3901 } 3902 return None; 3903 } 3904 3905 // Generated as internal constructor for term emit_put_in_reg_zext64. 3906 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3907 ctx: &mut C, 3908 arg0: WritableReg, 3909 arg1: Value, 3910 ) -> Option<Unit> { 3911 let pattern0_0 = arg0; 3912 let pattern1_0 = arg1; 3913 let pattern2_0 = C::value_type(ctx, pattern1_0); 3914 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3915 // Rule at src/isa/s390x/inst.isle line 2108. 3916 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3917 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3918 return Some(expr1_0); 3919 } 3920 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3921 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3922 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3923 if let &InstructionData::Load { 3924 opcode: ref pattern6_0, 3925 arg: pattern6_1, 3926 flags: pattern6_2, 3927 offset: pattern6_3, 3928 } = &pattern5_0 3929 { 3930 if let &Opcode::Load = pattern6_0 { 3931 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3932 // Rule at src/isa/s390x/inst.isle line 2110. 3933 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3934 let expr1_0 = 3935 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3936 return Some(expr1_0); 3937 } 3938 } 3939 } 3940 } 3941 // Rule at src/isa/s390x/inst.isle line 2112. 3942 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3943 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3944 return Some(expr1_0); 3945 } 3946 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3947 // Rule at src/isa/s390x/inst.isle line 2114. 3948 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3949 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3950 return Some(expr1_0); 3951 } 3952 return None; 3953 } 3954 3955 // Generated as internal constructor for term emit_put_in_reg_sext64. 3956 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3957 ctx: &mut C, 3958 arg0: WritableReg, 3959 arg1: Value, 3960 ) -> Option<Unit> { 3961 let pattern0_0 = arg0; 3962 let pattern1_0 = arg1; 3963 let pattern2_0 = C::value_type(ctx, pattern1_0); 3964 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3965 // Rule at src/isa/s390x/inst.isle line 2119. 3966 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3967 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3968 return Some(expr1_0); 3969 } 3970 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3971 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3972 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3973 if let &InstructionData::Load { 3974 opcode: ref pattern6_0, 3975 arg: pattern6_1, 3976 flags: pattern6_2, 3977 offset: pattern6_3, 3978 } = &pattern5_0 3979 { 3980 if let &Opcode::Load = pattern6_0 { 3981 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3982 // Rule at src/isa/s390x/inst.isle line 2121. 3983 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3984 let expr1_0 = 3985 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3986 return Some(expr1_0); 3987 } 3988 } 3989 } 3990 } 3991 // Rule at src/isa/s390x/inst.isle line 2123. 3992 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3993 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3994 return Some(expr1_0); 3995 } 3996 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3997 // Rule at src/isa/s390x/inst.isle line 2125. 3998 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3999 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 4000 return Some(expr1_0); 4001 } 4002 return None; 4003 } 4004 4005 // Generated as internal constructor for term put_in_reg_zext32. 4006 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4007 let pattern0_0 = arg0; 4008 let pattern1_0 = C::value_type(ctx, pattern0_0); 4009 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4010 // Rule at src/isa/s390x/inst.isle line 2130. 4011 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4012 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4013 return Some(expr1_0); 4014 } 4015 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4016 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4017 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4018 if let &InstructionData::Load { 4019 opcode: ref pattern5_0, 4020 arg: pattern5_1, 4021 flags: pattern5_2, 4022 offset: pattern5_3, 4023 } = &pattern4_0 4024 { 4025 if let &Opcode::Load = pattern5_0 { 4026 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4027 // Rule at src/isa/s390x/inst.isle line 2132. 4028 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4029 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4030 return Some(expr1_0); 4031 } 4032 } 4033 } 4034 } 4035 // Rule at src/isa/s390x/inst.isle line 2134. 4036 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4037 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4038 return Some(expr1_0); 4039 } 4040 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4041 // Rule at src/isa/s390x/inst.isle line 2136. 4042 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4043 return Some(expr0_0); 4044 } 4045 return None; 4046 } 4047 4048 // Generated as internal constructor for term put_in_reg_sext32. 4049 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4050 let pattern0_0 = arg0; 4051 let pattern1_0 = C::value_type(ctx, pattern0_0); 4052 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4053 // Rule at src/isa/s390x/inst.isle line 2141. 4054 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4055 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4056 return Some(expr1_0); 4057 } 4058 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4059 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4060 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4061 if let &InstructionData::Load { 4062 opcode: ref pattern5_0, 4063 arg: pattern5_1, 4064 flags: pattern5_2, 4065 offset: pattern5_3, 4066 } = &pattern4_0 4067 { 4068 if let &Opcode::Load = pattern5_0 { 4069 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4070 // Rule at src/isa/s390x/inst.isle line 2143. 4071 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4072 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4073 return Some(expr1_0); 4074 } 4075 } 4076 } 4077 } 4078 // Rule at src/isa/s390x/inst.isle line 2145. 4079 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4080 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4081 return Some(expr1_0); 4082 } 4083 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4084 // Rule at src/isa/s390x/inst.isle line 2147. 4085 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4086 return Some(expr0_0); 4087 } 4088 return None; 4089 } 4090 4091 // Generated as internal constructor for term put_in_reg_zext64. 4092 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4093 let pattern0_0 = arg0; 4094 let pattern1_0 = C::value_type(ctx, pattern0_0); 4095 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4096 // Rule at src/isa/s390x/inst.isle line 2152. 4097 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4098 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4099 return Some(expr1_0); 4100 } 4101 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4102 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4103 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4104 if let &InstructionData::Load { 4105 opcode: ref pattern5_0, 4106 arg: pattern5_1, 4107 flags: pattern5_2, 4108 offset: pattern5_3, 4109 } = &pattern4_0 4110 { 4111 if let &Opcode::Load = pattern5_0 { 4112 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4113 // Rule at src/isa/s390x/inst.isle line 2154. 4114 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4115 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4116 return Some(expr1_0); 4117 } 4118 } 4119 } 4120 } 4121 // Rule at src/isa/s390x/inst.isle line 2156. 4122 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4123 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4124 return Some(expr1_0); 4125 } 4126 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4127 // Rule at src/isa/s390x/inst.isle line 2158. 4128 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4129 return Some(expr0_0); 4130 } 4131 return None; 4132 } 4133 4134 // Generated as internal constructor for term put_in_reg_sext64. 4135 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4136 let pattern0_0 = arg0; 4137 let pattern1_0 = C::value_type(ctx, pattern0_0); 4138 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4139 // Rule at src/isa/s390x/inst.isle line 2163. 4140 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4141 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4142 return Some(expr1_0); 4143 } 4144 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4145 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4146 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4147 if let &InstructionData::Load { 4148 opcode: ref pattern5_0, 4149 arg: pattern5_1, 4150 flags: pattern5_2, 4151 offset: pattern5_3, 4152 } = &pattern4_0 4153 { 4154 if let &Opcode::Load = pattern5_0 { 4155 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4156 // Rule at src/isa/s390x/inst.isle line 2165. 4157 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4158 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4159 return Some(expr1_0); 4160 } 4161 } 4162 } 4163 } 4164 // Rule at src/isa/s390x/inst.isle line 2167. 4165 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4166 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4167 return Some(expr1_0); 4168 } 4169 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4170 // Rule at src/isa/s390x/inst.isle line 2169. 4171 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4172 return Some(expr0_0); 4173 } 4174 return None; 4175 } 4176 4177 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4178 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4179 ctx: &mut C, 4180 arg0: Value, 4181 arg1: &RegPair, 4182 ) -> Option<RegPair> { 4183 let pattern0_0 = arg0; 4184 let pattern1_0 = arg1; 4185 // Rule at src/isa/s390x/inst.isle line 2175. 4186 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4187 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4188 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4189 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4190 return Some(expr3_0); 4191 } 4192 4193 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4194 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4195 ctx: &mut C, 4196 arg0: Value, 4197 arg1: &RegPair, 4198 ) -> Option<RegPair> { 4199 let pattern0_0 = arg0; 4200 let pattern1_0 = arg1; 4201 // Rule at src/isa/s390x/inst.isle line 2183. 4202 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4203 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4204 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4205 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4206 return Some(expr3_0); 4207 } 4208 4209 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4210 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4211 ctx: &mut C, 4212 arg0: Value, 4213 arg1: &RegPair, 4214 ) -> Option<RegPair> { 4215 let pattern0_0 = arg0; 4216 let pattern1_0 = arg1; 4217 // Rule at src/isa/s390x/inst.isle line 2191. 4218 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4219 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4220 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4221 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4222 return Some(expr3_0); 4223 } 4224 4225 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4226 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4227 ctx: &mut C, 4228 arg0: Value, 4229 arg1: &RegPair, 4230 ) -> Option<RegPair> { 4231 let pattern0_0 = arg0; 4232 let pattern1_0 = arg1; 4233 // Rule at src/isa/s390x/inst.isle line 2199. 4234 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4235 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4236 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4237 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4238 return Some(expr3_0); 4239 } 4240 4241 // Generated as internal constructor for term emit_cmov_imm. 4242 pub fn constructor_emit_cmov_imm<C: Context>( 4243 ctx: &mut C, 4244 arg0: Type, 4245 arg1: WritableReg, 4246 arg2: &Cond, 4247 arg3: i16, 4248 ) -> Option<ConsumesFlags> { 4249 let pattern0_0 = arg0; 4250 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4251 let pattern2_0 = arg1; 4252 let pattern3_0 = arg2; 4253 let pattern4_0 = arg3; 4254 // Rule at src/isa/s390x/inst.isle line 2209. 4255 let expr0_0 = MInst::CMov32SImm16 { 4256 rd: pattern2_0, 4257 cond: pattern3_0.clone(), 4258 imm: pattern4_0, 4259 }; 4260 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4261 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4262 inst: expr0_0, 4263 result: expr1_0, 4264 }; 4265 return Some(expr2_0); 4266 } 4267 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4268 let pattern2_0 = arg1; 4269 let pattern3_0 = arg2; 4270 let pattern4_0 = arg3; 4271 // Rule at src/isa/s390x/inst.isle line 2212. 4272 let expr0_0 = MInst::CMov64SImm16 { 4273 rd: pattern2_0, 4274 cond: pattern3_0.clone(), 4275 imm: pattern4_0, 4276 }; 4277 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4278 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4279 inst: expr0_0, 4280 result: expr1_0, 4281 }; 4282 return Some(expr2_0); 4283 } 4284 return None; 4285 } 4286 4287 // Generated as internal constructor for term cmov_imm. 4288 pub fn constructor_cmov_imm<C: Context>( 4289 ctx: &mut C, 4290 arg0: Type, 4291 arg1: &Cond, 4292 arg2: i16, 4293 arg3: Reg, 4294 ) -> Option<ConsumesFlags> { 4295 let pattern0_0 = arg0; 4296 let pattern1_0 = arg1; 4297 let pattern2_0 = arg2; 4298 let pattern3_0 = arg3; 4299 // Rule at src/isa/s390x/inst.isle line 2218. 4300 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4301 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4302 return Some(expr1_0); 4303 } 4304 4305 // Generated as internal constructor for term cmov_imm_regpair_lo. 4306 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4307 ctx: &mut C, 4308 arg0: Type, 4309 arg1: &ProducesFlags, 4310 arg2: &Cond, 4311 arg3: i16, 4312 arg4: &RegPair, 4313 ) -> Option<RegPair> { 4314 let pattern0_0 = arg0; 4315 let pattern1_0 = arg1; 4316 let pattern2_0 = arg2; 4317 let pattern3_0 = arg3; 4318 let pattern4_0 = arg4; 4319 // Rule at src/isa/s390x/inst.isle line 2225. 4320 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4321 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4322 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4323 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4324 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4325 return Some(expr4_0); 4326 } 4327 4328 // Generated as internal constructor for term cmov_imm_regpair_hi. 4329 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4330 ctx: &mut C, 4331 arg0: Type, 4332 arg1: &ProducesFlags, 4333 arg2: &Cond, 4334 arg3: i16, 4335 arg4: &RegPair, 4336 ) -> Option<RegPair> { 4337 let pattern0_0 = arg0; 4338 let pattern1_0 = arg1; 4339 let pattern2_0 = arg2; 4340 let pattern3_0 = arg3; 4341 let pattern4_0 = arg4; 4342 // Rule at src/isa/s390x/inst.isle line 2234. 4343 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4344 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4345 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4346 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4347 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4348 return Some(expr4_0); 4349 } 4350 4351 // Generated as internal constructor for term emit_cmov_reg. 4352 pub fn constructor_emit_cmov_reg<C: Context>( 4353 ctx: &mut C, 4354 arg0: Type, 4355 arg1: WritableReg, 4356 arg2: &Cond, 4357 arg3: Reg, 4358 ) -> Option<ConsumesFlags> { 4359 let pattern0_0 = arg0; 4360 if pattern0_0 == F32 { 4361 let pattern2_0 = arg1; 4362 let pattern3_0 = arg2; 4363 let pattern4_0 = arg3; 4364 // Rule at src/isa/s390x/inst.isle line 2248. 4365 let expr0_0 = MInst::FpuCMov32 { 4366 rd: pattern2_0, 4367 cond: pattern3_0.clone(), 4368 rm: pattern4_0, 4369 }; 4370 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4371 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4372 inst: expr0_0, 4373 result: expr1_0, 4374 }; 4375 return Some(expr2_0); 4376 } 4377 if pattern0_0 == F64 { 4378 let pattern2_0 = arg1; 4379 let pattern3_0 = arg2; 4380 let pattern4_0 = arg3; 4381 // Rule at src/isa/s390x/inst.isle line 2251. 4382 let expr0_0 = MInst::FpuCMov64 { 4383 rd: pattern2_0, 4384 cond: pattern3_0.clone(), 4385 rm: pattern4_0, 4386 }; 4387 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4388 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4389 inst: expr0_0, 4390 result: expr1_0, 4391 }; 4392 return Some(expr2_0); 4393 } 4394 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4395 let pattern2_0 = arg1; 4396 let pattern3_0 = arg2; 4397 let pattern4_0 = arg3; 4398 // Rule at src/isa/s390x/inst.isle line 2242. 4399 let expr0_0 = MInst::CMov32 { 4400 rd: pattern2_0, 4401 cond: pattern3_0.clone(), 4402 rm: pattern4_0, 4403 }; 4404 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4405 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4406 inst: expr0_0, 4407 result: expr1_0, 4408 }; 4409 return Some(expr2_0); 4410 } 4411 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4412 let pattern2_0 = arg1; 4413 let pattern3_0 = arg2; 4414 let pattern4_0 = arg3; 4415 // Rule at src/isa/s390x/inst.isle line 2245. 4416 let expr0_0 = MInst::CMov64 { 4417 rd: pattern2_0, 4418 cond: pattern3_0.clone(), 4419 rm: pattern4_0, 4420 }; 4421 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4422 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4423 inst: expr0_0, 4424 result: expr1_0, 4425 }; 4426 return Some(expr2_0); 4427 } 4428 return None; 4429 } 4430 4431 // Generated as internal constructor for term cmov_reg. 4432 pub fn constructor_cmov_reg<C: Context>( 4433 ctx: &mut C, 4434 arg0: Type, 4435 arg1: &Cond, 4436 arg2: Reg, 4437 arg3: Reg, 4438 ) -> Option<ConsumesFlags> { 4439 let pattern0_0 = arg0; 4440 let pattern1_0 = arg1; 4441 let pattern2_0 = arg2; 4442 let pattern3_0 = arg3; 4443 // Rule at src/isa/s390x/inst.isle line 2257. 4444 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4445 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4446 return Some(expr1_0); 4447 } 4448 4449 // Generated as internal constructor for term trap_if. 4450 pub fn constructor_trap_if<C: Context>( 4451 ctx: &mut C, 4452 arg0: &ProducesFlags, 4453 arg1: &Cond, 4454 arg2: &TrapCode, 4455 ) -> Option<Reg> { 4456 let pattern0_0 = arg0; 4457 match pattern0_0 { 4458 &ProducesFlags::ProducesFlagsSideEffect { 4459 inst: ref pattern1_0, 4460 } => { 4461 let pattern2_0 = arg1; 4462 let pattern3_0 = arg2; 4463 // Rule at src/isa/s390x/inst.isle line 2269. 4464 let expr0_0 = C::emit(ctx, pattern1_0); 4465 let expr1_0 = MInst::TrapIf { 4466 cond: pattern2_0.clone(), 4467 trap_code: pattern3_0.clone(), 4468 }; 4469 let expr2_0 = C::emit(ctx, &expr1_0); 4470 let expr3_0 = C::invalid_reg(ctx); 4471 return Some(expr3_0); 4472 } 4473 &ProducesFlags::ProducesFlagsReturnsReg { 4474 inst: ref pattern1_0, 4475 result: pattern1_1, 4476 } => { 4477 let pattern2_0 = arg1; 4478 let pattern3_0 = arg2; 4479 // Rule at src/isa/s390x/inst.isle line 2265. 4480 let expr0_0 = C::emit(ctx, pattern1_0); 4481 let expr1_0 = MInst::TrapIf { 4482 cond: pattern2_0.clone(), 4483 trap_code: pattern3_0.clone(), 4484 }; 4485 let expr2_0 = C::emit(ctx, &expr1_0); 4486 return Some(pattern1_1); 4487 } 4488 _ => {} 4489 } 4490 return None; 4491 } 4492 4493 // Generated as internal constructor for term icmps_reg_and_trap. 4494 pub fn constructor_icmps_reg_and_trap<C: Context>( 4495 ctx: &mut C, 4496 arg0: Type, 4497 arg1: Reg, 4498 arg2: Reg, 4499 arg3: &Cond, 4500 arg4: &TrapCode, 4501 ) -> Option<Reg> { 4502 let pattern0_0 = arg0; 4503 let pattern1_0 = arg1; 4504 let pattern2_0 = arg2; 4505 let pattern3_0 = arg3; 4506 let pattern4_0 = arg4; 4507 // Rule at src/isa/s390x/inst.isle line 2275. 4508 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4509 let expr1_0 = MInst::CmpTrapRR { 4510 op: expr0_0, 4511 rn: pattern1_0, 4512 rm: pattern2_0, 4513 cond: pattern3_0.clone(), 4514 trap_code: pattern4_0.clone(), 4515 }; 4516 let expr2_0 = C::emit(ctx, &expr1_0); 4517 let expr3_0 = C::invalid_reg(ctx); 4518 return Some(expr3_0); 4519 } 4520 4521 // Generated as internal constructor for term icmps_simm16_and_trap. 4522 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4523 ctx: &mut C, 4524 arg0: Type, 4525 arg1: Reg, 4526 arg2: i16, 4527 arg3: &Cond, 4528 arg4: &TrapCode, 4529 ) -> Option<Reg> { 4530 let pattern0_0 = arg0; 4531 let pattern1_0 = arg1; 4532 let pattern2_0 = arg2; 4533 let pattern3_0 = arg3; 4534 let pattern4_0 = arg4; 4535 // Rule at src/isa/s390x/inst.isle line 2281. 4536 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4537 let expr1_0 = MInst::CmpTrapRSImm16 { 4538 op: expr0_0, 4539 rn: pattern1_0, 4540 imm: pattern2_0, 4541 cond: pattern3_0.clone(), 4542 trap_code: pattern4_0.clone(), 4543 }; 4544 let expr2_0 = C::emit(ctx, &expr1_0); 4545 let expr3_0 = C::invalid_reg(ctx); 4546 return Some(expr3_0); 4547 } 4548 4549 // Generated as internal constructor for term icmpu_reg_and_trap. 4550 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4551 ctx: &mut C, 4552 arg0: Type, 4553 arg1: Reg, 4554 arg2: Reg, 4555 arg3: &Cond, 4556 arg4: &TrapCode, 4557 ) -> Option<Reg> { 4558 let pattern0_0 = arg0; 4559 let pattern1_0 = arg1; 4560 let pattern2_0 = arg2; 4561 let pattern3_0 = arg3; 4562 let pattern4_0 = arg4; 4563 // Rule at src/isa/s390x/inst.isle line 2287. 4564 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4565 let expr1_0 = MInst::CmpTrapRR { 4566 op: expr0_0, 4567 rn: pattern1_0, 4568 rm: pattern2_0, 4569 cond: pattern3_0.clone(), 4570 trap_code: pattern4_0.clone(), 4571 }; 4572 let expr2_0 = C::emit(ctx, &expr1_0); 4573 let expr3_0 = C::invalid_reg(ctx); 4574 return Some(expr3_0); 4575 } 4576 4577 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4578 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4579 ctx: &mut C, 4580 arg0: Type, 4581 arg1: Reg, 4582 arg2: u16, 4583 arg3: &Cond, 4584 arg4: &TrapCode, 4585 ) -> Option<Reg> { 4586 let pattern0_0 = arg0; 4587 let pattern1_0 = arg1; 4588 let pattern2_0 = arg2; 4589 let pattern3_0 = arg3; 4590 let pattern4_0 = arg4; 4591 // Rule at src/isa/s390x/inst.isle line 2293. 4592 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4593 let expr1_0 = MInst::CmpTrapRUImm16 { 4594 op: expr0_0, 4595 rn: pattern1_0, 4596 imm: pattern2_0, 4597 cond: pattern3_0.clone(), 4598 trap_code: pattern4_0.clone(), 4599 }; 4600 let expr2_0 = C::emit(ctx, &expr1_0); 4601 let expr3_0 = C::invalid_reg(ctx); 4602 return Some(expr3_0); 4603 } 4604 4605 // Generated as internal constructor for term trap_impl. 4606 pub fn constructor_trap_impl<C: Context>( 4607 ctx: &mut C, 4608 arg0: &TrapCode, 4609 ) -> Option<SideEffectNoResult> { 4610 let pattern0_0 = arg0; 4611 // Rule at src/isa/s390x/inst.isle line 2299. 4612 let expr0_0 = MInst::Trap { 4613 trap_code: pattern0_0.clone(), 4614 }; 4615 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4616 return Some(expr1_0); 4617 } 4618 4619 // Generated as internal constructor for term trap_if_impl. 4620 pub fn constructor_trap_if_impl<C: Context>( 4621 ctx: &mut C, 4622 arg0: &Cond, 4623 arg1: &TrapCode, 4624 ) -> Option<SideEffectNoResult> { 4625 let pattern0_0 = arg0; 4626 let pattern1_0 = arg1; 4627 // Rule at src/isa/s390x/inst.isle line 2303. 4628 let expr0_0 = MInst::TrapIf { 4629 cond: pattern0_0.clone(), 4630 trap_code: pattern1_0.clone(), 4631 }; 4632 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4633 return Some(expr1_0); 4634 } 4635 4636 // Generated as internal constructor for term debugtrap_impl. 4637 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4638 // Rule at src/isa/s390x/inst.isle line 2307. 4639 let expr0_0 = MInst::Debugtrap; 4640 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4641 return Some(expr1_0); 4642 } 4643 4644 // Generated as internal constructor for term bool. 4645 pub fn constructor_bool<C: Context>( 4646 ctx: &mut C, 4647 arg0: &ProducesFlags, 4648 arg1: &Cond, 4649 ) -> Option<ProducesBool> { 4650 let pattern0_0 = arg0; 4651 let pattern1_0 = arg1; 4652 // Rule at src/isa/s390x/inst.isle line 2318. 4653 let expr0_0 = ProducesBool::ProducesBool { 4654 producer: pattern0_0.clone(), 4655 cond: pattern1_0.clone(), 4656 }; 4657 return Some(expr0_0); 4658 } 4659 4660 // Generated as internal constructor for term invert_bool. 4661 pub fn constructor_invert_bool<C: Context>( 4662 ctx: &mut C, 4663 arg0: &ProducesBool, 4664 ) -> Option<ProducesBool> { 4665 let pattern0_0 = arg0; 4666 if let &ProducesBool::ProducesBool { 4667 producer: ref pattern1_0, 4668 cond: ref pattern1_1, 4669 } = pattern0_0 4670 { 4671 // Rule at src/isa/s390x/inst.isle line 2322. 4672 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4673 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4674 return Some(expr1_0); 4675 } 4676 return None; 4677 } 4678 4679 // Generated as internal constructor for term emit_producer. 4680 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4681 let pattern0_0 = arg0; 4682 if let &ProducesFlags::ProducesFlagsSideEffect { 4683 inst: ref pattern1_0, 4684 } = pattern0_0 4685 { 4686 // Rule at src/isa/s390x/inst.isle line 2331. 4687 let expr0_0 = C::emit(ctx, pattern1_0); 4688 return Some(expr0_0); 4689 } 4690 return None; 4691 } 4692 4693 // Generated as internal constructor for term emit_consumer. 4694 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4695 let pattern0_0 = arg0; 4696 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4697 inst: ref pattern1_0, 4698 result: pattern1_1, 4699 } = pattern0_0 4700 { 4701 // Rule at src/isa/s390x/inst.isle line 2333. 4702 let expr0_0 = C::emit(ctx, pattern1_0); 4703 return Some(expr0_0); 4704 } 4705 return None; 4706 } 4707 4708 // Generated as internal constructor for term select_bool_reg. 4709 pub fn constructor_select_bool_reg<C: Context>( 4710 ctx: &mut C, 4711 arg0: Type, 4712 arg1: &ProducesBool, 4713 arg2: Reg, 4714 arg3: Reg, 4715 ) -> Option<Reg> { 4716 let pattern0_0 = arg0; 4717 let pattern1_0 = arg1; 4718 if let &ProducesBool::ProducesBool { 4719 producer: ref pattern2_0, 4720 cond: ref pattern2_1, 4721 } = pattern1_0 4722 { 4723 let pattern3_0 = arg2; 4724 let pattern4_0 = arg3; 4725 // Rule at src/isa/s390x/inst.isle line 2337. 4726 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4727 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4728 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4729 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4730 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4731 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4732 return Some(expr5_0); 4733 } 4734 return None; 4735 } 4736 4737 // Generated as internal constructor for term select_bool_imm. 4738 pub fn constructor_select_bool_imm<C: Context>( 4739 ctx: &mut C, 4740 arg0: Type, 4741 arg1: &ProducesBool, 4742 arg2: i16, 4743 arg3: u64, 4744 ) -> Option<Reg> { 4745 let pattern0_0 = arg0; 4746 let pattern1_0 = arg1; 4747 if let &ProducesBool::ProducesBool { 4748 producer: ref pattern2_0, 4749 cond: ref pattern2_1, 4750 } = pattern1_0 4751 { 4752 let pattern3_0 = arg2; 4753 let pattern4_0 = arg3; 4754 // Rule at src/isa/s390x/inst.isle line 2346. 4755 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4756 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4757 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4758 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4759 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4760 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4761 return Some(expr5_0); 4762 } 4763 return None; 4764 } 4765 4766 // Generated as internal constructor for term lower_bool. 4767 pub fn constructor_lower_bool<C: Context>( 4768 ctx: &mut C, 4769 arg0: Type, 4770 arg1: &ProducesBool, 4771 ) -> Option<Reg> { 4772 let pattern0_0 = arg0; 4773 if pattern0_0 == B1 { 4774 let pattern2_0 = arg1; 4775 // Rule at src/isa/s390x/inst.isle line 2356. 4776 let expr0_0: Type = B1; 4777 let expr1_0: i16 = 1; 4778 let expr2_0: u64 = 0; 4779 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4780 return Some(expr3_0); 4781 } 4782 if pattern0_0 == B8 { 4783 let pattern2_0 = arg1; 4784 // Rule at src/isa/s390x/inst.isle line 2357. 4785 let expr0_0: Type = B8; 4786 let expr1_0: i16 = -1; 4787 let expr2_0: u64 = 0; 4788 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4789 return Some(expr3_0); 4790 } 4791 if pattern0_0 == B16 { 4792 let pattern2_0 = arg1; 4793 // Rule at src/isa/s390x/inst.isle line 2358. 4794 let expr0_0: Type = B16; 4795 let expr1_0: i16 = -1; 4796 let expr2_0: u64 = 0; 4797 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4798 return Some(expr3_0); 4799 } 4800 if pattern0_0 == B32 { 4801 let pattern2_0 = arg1; 4802 // Rule at src/isa/s390x/inst.isle line 2359. 4803 let expr0_0: Type = B32; 4804 let expr1_0: i16 = -1; 4805 let expr2_0: u64 = 0; 4806 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4807 return Some(expr3_0); 4808 } 4809 if pattern0_0 == B64 { 4810 let pattern2_0 = arg1; 4811 // Rule at src/isa/s390x/inst.isle line 2360. 4812 let expr0_0: Type = B64; 4813 let expr1_0: i16 = -1; 4814 let expr2_0: u64 = 0; 4815 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4816 return Some(expr3_0); 4817 } 4818 return None; 4819 } 4820 4821 // Generated as internal constructor for term cond_br_bool. 4822 pub fn constructor_cond_br_bool<C: Context>( 4823 ctx: &mut C, 4824 arg0: &ProducesBool, 4825 arg1: MachLabel, 4826 arg2: MachLabel, 4827 ) -> Option<SideEffectNoResult> { 4828 let pattern0_0 = arg0; 4829 if let &ProducesBool::ProducesBool { 4830 producer: ref pattern1_0, 4831 cond: ref pattern1_1, 4832 } = pattern0_0 4833 { 4834 let pattern2_0 = arg1; 4835 let pattern3_0 = arg2; 4836 // Rule at src/isa/s390x/inst.isle line 2364. 4837 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4838 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4839 return Some(expr1_0); 4840 } 4841 return None; 4842 } 4843 4844 // Generated as internal constructor for term oneway_cond_br_bool. 4845 pub fn constructor_oneway_cond_br_bool<C: Context>( 4846 ctx: &mut C, 4847 arg0: &ProducesBool, 4848 arg1: MachLabel, 4849 ) -> Option<SideEffectNoResult> { 4850 let pattern0_0 = arg0; 4851 if let &ProducesBool::ProducesBool { 4852 producer: ref pattern1_0, 4853 cond: ref pattern1_1, 4854 } = pattern0_0 4855 { 4856 let pattern2_0 = arg1; 4857 // Rule at src/isa/s390x/inst.isle line 2370. 4858 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4859 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4860 return Some(expr1_0); 4861 } 4862 return None; 4863 } 4864 4865 // Generated as internal constructor for term trap_if_bool. 4866 pub fn constructor_trap_if_bool<C: Context>( 4867 ctx: &mut C, 4868 arg0: &ProducesBool, 4869 arg1: &TrapCode, 4870 ) -> Option<SideEffectNoResult> { 4871 let pattern0_0 = arg0; 4872 if let &ProducesBool::ProducesBool { 4873 producer: ref pattern1_0, 4874 cond: ref pattern1_1, 4875 } = pattern0_0 4876 { 4877 let pattern2_0 = arg1; 4878 // Rule at src/isa/s390x/inst.isle line 2376. 4879 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4880 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4881 return Some(expr1_0); 4882 } 4883 return None; 4884 } 4885 4886 // Generated as internal constructor for term casloop_val_reg. 4887 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4888 // Rule at src/isa/s390x/inst.isle line 2390. 4889 let expr0_0: u8 = 0; 4890 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4891 return Some(expr1_0); 4892 } 4893 4894 // Generated as internal constructor for term casloop_tmp_reg. 4895 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4896 // Rule at src/isa/s390x/inst.isle line 2394. 4897 let expr0_0: u8 = 1; 4898 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4899 return Some(expr1_0); 4900 } 4901 4902 // Generated as internal constructor for term casloop_emit. 4903 pub fn constructor_casloop_emit<C: Context>( 4904 ctx: &mut C, 4905 arg0: &VecMInstBuilder, 4906 arg1: Type, 4907 arg2: MemFlags, 4908 arg3: Reg, 4909 arg4: Reg, 4910 ) -> Option<Reg> { 4911 let pattern0_0 = arg0; 4912 let pattern1_0 = arg1; 4913 let pattern2_0 = arg2; 4914 let pattern3_0 = arg3; 4915 let pattern4_0 = arg4; 4916 // Rule at src/isa/s390x/inst.isle line 2403. 4917 let expr0_0: i64 = 0; 4918 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4919 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4920 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4921 let expr4_0 = 4922 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4923 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4924 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4925 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4926 let expr8_0 = IntCC::NotEqual; 4927 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4928 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4929 return Some(expr4_0); 4930 } 4931 4932 // Generated as internal constructor for term casloop_result. 4933 pub fn constructor_casloop_result<C: Context>( 4934 ctx: &mut C, 4935 arg0: Type, 4936 arg1: MemFlags, 4937 arg2: Reg, 4938 ) -> Option<Reg> { 4939 let pattern0_0 = arg0; 4940 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4941 let pattern2_0 = arg1; 4942 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4943 let pattern4_0 = arg2; 4944 // Rule at src/isa/s390x/inst.isle line 2421. 4945 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4946 return Some(expr0_0); 4947 } 4948 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4949 let pattern4_0 = arg2; 4950 // Rule at src/isa/s390x/inst.isle line 2419. 4951 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4952 return Some(expr0_0); 4953 } 4954 } 4955 return None; 4956 } 4957 4958 // Generated as internal constructor for term casloop. 4959 pub fn constructor_casloop<C: Context>( 4960 ctx: &mut C, 4961 arg0: &VecMInstBuilder, 4962 arg1: Type, 4963 arg2: MemFlags, 4964 arg3: Reg, 4965 arg4: Reg, 4966 ) -> Option<Reg> { 4967 let pattern0_0 = arg0; 4968 let pattern1_0 = arg1; 4969 let pattern2_0 = arg2; 4970 let pattern3_0 = arg3; 4971 let pattern4_0 = arg4; 4972 // Rule at src/isa/s390x/inst.isle line 2426. 4973 let expr0_0 = constructor_casloop_emit( 4974 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4975 )?; 4976 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4977 return Some(expr1_0); 4978 } 4979 4980 // Generated as internal constructor for term casloop_bitshift. 4981 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4982 let pattern0_0 = arg0; 4983 // Rule at src/isa/s390x/inst.isle line 2441. 4984 let expr0_0: Type = I32; 4985 let expr1_0: u8 = 3; 4986 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4987 return Some(expr2_0); 4988 } 4989 4990 // Generated as internal constructor for term casloop_aligned_addr. 4991 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4992 let pattern0_0 = arg0; 4993 // Rule at src/isa/s390x/inst.isle line 2446. 4994 let expr0_0: Type = I64; 4995 let expr1_0: u16 = 65532; 4996 let expr2_0: u8 = 0; 4997 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4998 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4999 return Some(expr4_0); 5000 } 5001 5002 // Generated as internal constructor for term casloop_rotate_in. 5003 pub fn constructor_casloop_rotate_in<C: Context>( 5004 ctx: &mut C, 5005 arg0: &VecMInstBuilder, 5006 arg1: Type, 5007 arg2: MemFlags, 5008 arg3: Reg, 5009 arg4: Reg, 5010 ) -> Option<Reg> { 5011 let pattern0_0 = arg0; 5012 let pattern1_0 = arg1; 5013 if pattern1_0 == I8 { 5014 let pattern3_0 = arg2; 5015 let pattern4_0 = arg3; 5016 let pattern5_0 = arg4; 5017 // Rule at src/isa/s390x/inst.isle line 2456. 5018 let expr0_0: Type = I32; 5019 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5020 let expr2_0: u8 = 0; 5021 let expr3_0 = constructor_push_rot_imm_reg( 5022 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 5023 )?; 5024 return Some(expr3_0); 5025 } 5026 if pattern1_0 == I16 { 5027 let pattern3_0 = arg2; 5028 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5029 let pattern5_0 = arg3; 5030 let pattern6_0 = arg4; 5031 // Rule at src/isa/s390x/inst.isle line 2460. 5032 let expr0_0: Type = I32; 5033 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5034 let expr2_0: u8 = 16; 5035 let expr3_0 = constructor_push_rot_imm_reg( 5036 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5037 )?; 5038 return Some(expr3_0); 5039 } 5040 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5041 let pattern5_0 = arg3; 5042 let pattern6_0 = arg4; 5043 // Rule at src/isa/s390x/inst.isle line 2458. 5044 let expr0_0: Type = I32; 5045 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5046 let expr2_0: u8 = 0; 5047 let expr3_0 = constructor_push_rot_imm_reg( 5048 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5049 )?; 5050 return Some(expr3_0); 5051 } 5052 } 5053 return None; 5054 } 5055 5056 // Generated as internal constructor for term casloop_rotate_out. 5057 pub fn constructor_casloop_rotate_out<C: Context>( 5058 ctx: &mut C, 5059 arg0: &VecMInstBuilder, 5060 arg1: Type, 5061 arg2: MemFlags, 5062 arg3: Reg, 5063 arg4: Reg, 5064 ) -> Option<Reg> { 5065 let pattern0_0 = arg0; 5066 let pattern1_0 = arg1; 5067 if pattern1_0 == I8 { 5068 let pattern3_0 = arg2; 5069 let pattern4_0 = arg3; 5070 let pattern5_0 = arg4; 5071 // Rule at src/isa/s390x/inst.isle line 2469. 5072 let expr0_0: Type = I32; 5073 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5074 let expr2_0: u8 = 0; 5075 let expr3_0: Type = I32; 5076 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5077 let expr5_0 = constructor_push_rot_imm_reg( 5078 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5079 )?; 5080 return Some(expr5_0); 5081 } 5082 if pattern1_0 == I16 { 5083 let pattern3_0 = arg2; 5084 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5085 let pattern5_0 = arg3; 5086 let pattern6_0 = arg4; 5087 // Rule at src/isa/s390x/inst.isle line 2473. 5088 let expr0_0: Type = I32; 5089 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5090 let expr2_0: u8 = 16; 5091 let expr3_0 = constructor_push_rot_imm_reg( 5092 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5093 )?; 5094 return Some(expr3_0); 5095 } 5096 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5097 let pattern5_0 = arg3; 5098 let pattern6_0 = arg4; 5099 // Rule at src/isa/s390x/inst.isle line 2471. 5100 let expr0_0: Type = I32; 5101 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5102 let expr2_0: u8 = 0; 5103 let expr3_0 = constructor_push_rot_imm_reg( 5104 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5105 )?; 5106 return Some(expr3_0); 5107 } 5108 } 5109 return None; 5110 } 5111 5112 // Generated as internal constructor for term casloop_rotate_result. 5113 pub fn constructor_casloop_rotate_result<C: Context>( 5114 ctx: &mut C, 5115 arg0: Type, 5116 arg1: MemFlags, 5117 arg2: Reg, 5118 arg3: Reg, 5119 ) -> Option<Reg> { 5120 let pattern0_0 = arg0; 5121 if pattern0_0 == I8 { 5122 let pattern2_0 = arg1; 5123 let pattern3_0 = arg2; 5124 let pattern4_0 = arg3; 5125 // Rule at src/isa/s390x/inst.isle line 2484. 5126 let expr0_0: Type = I32; 5127 let expr1_0: u8 = 8; 5128 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5129 return Some(expr2_0); 5130 } 5131 if pattern0_0 == I16 { 5132 let pattern2_0 = arg1; 5133 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5134 let pattern4_0 = arg2; 5135 let pattern5_0 = arg3; 5136 // Rule at src/isa/s390x/inst.isle line 2488. 5137 let expr0_0: Type = I32; 5138 let expr1_0: Type = I32; 5139 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5140 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5141 return Some(expr3_0); 5142 } 5143 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5144 let pattern4_0 = arg2; 5145 let pattern5_0 = arg3; 5146 // Rule at src/isa/s390x/inst.isle line 2486. 5147 let expr0_0: Type = I32; 5148 let expr1_0: u8 = 16; 5149 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5150 return Some(expr2_0); 5151 } 5152 } 5153 return None; 5154 } 5155 5156 // Generated as internal constructor for term casloop_subword. 5157 pub fn constructor_casloop_subword<C: Context>( 5158 ctx: &mut C, 5159 arg0: &VecMInstBuilder, 5160 arg1: Type, 5161 arg2: MemFlags, 5162 arg3: Reg, 5163 arg4: Reg, 5164 arg5: Reg, 5165 ) -> Option<Reg> { 5166 let pattern0_0 = arg0; 5167 let pattern1_0 = arg1; 5168 let pattern2_0 = arg2; 5169 let pattern3_0 = arg3; 5170 let pattern4_0 = arg4; 5171 let pattern5_0 = arg5; 5172 // Rule at src/isa/s390x/inst.isle line 2493. 5173 let expr0_0 = constructor_casloop_emit( 5174 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5175 )?; 5176 let expr1_0 = 5177 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5178 return Some(expr1_0); 5179 } 5180 5181 // Generated as internal constructor for term clz_reg. 5182 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5183 let pattern0_0 = arg0; 5184 if pattern0_0 == 64 { 5185 let pattern2_0 = arg1; 5186 // Rule at src/isa/s390x/inst.isle line 2504. 5187 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5188 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5189 let expr2_0 = C::emit(ctx, &expr1_0); 5190 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5191 return Some(expr3_0); 5192 } 5193 let pattern1_0 = arg1; 5194 // Rule at src/isa/s390x/inst.isle line 2513. 5195 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5196 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5197 let expr2_0 = C::emit(ctx, &expr1_0); 5198 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5199 let expr4_0 = IntCC::Equal; 5200 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5201 let expr6_0 = MInst::CMov64SImm16 { 5202 rd: expr3_0, 5203 cond: expr5_0, 5204 imm: pattern0_0, 5205 }; 5206 let expr7_0 = C::emit(ctx, &expr6_0); 5207 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5208 return Some(expr8_0); 5209 } 5210 5211 // Generated as internal constructor for term aluop_add. 5212 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5213 let pattern0_0 = arg0; 5214 if pattern0_0 == I8 { 5215 // Rule at src/isa/s390x/inst.isle line 2524. 5216 let expr0_0 = ALUOp::Add32; 5217 return Some(expr0_0); 5218 } 5219 if pattern0_0 == I16 { 5220 // Rule at src/isa/s390x/inst.isle line 2525. 5221 let expr0_0 = ALUOp::Add32; 5222 return Some(expr0_0); 5223 } 5224 if pattern0_0 == I32 { 5225 // Rule at src/isa/s390x/inst.isle line 2526. 5226 let expr0_0 = ALUOp::Add32; 5227 return Some(expr0_0); 5228 } 5229 if pattern0_0 == I64 { 5230 // Rule at src/isa/s390x/inst.isle line 2527. 5231 let expr0_0 = ALUOp::Add64; 5232 return Some(expr0_0); 5233 } 5234 return None; 5235 } 5236 5237 // Generated as internal constructor for term aluop_add_sext16. 5238 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5239 let pattern0_0 = arg0; 5240 if pattern0_0 == I16 { 5241 // Rule at src/isa/s390x/inst.isle line 2530. 5242 let expr0_0 = ALUOp::Add32Ext16; 5243 return Some(expr0_0); 5244 } 5245 if pattern0_0 == I32 { 5246 // Rule at src/isa/s390x/inst.isle line 2531. 5247 let expr0_0 = ALUOp::Add32Ext16; 5248 return Some(expr0_0); 5249 } 5250 if pattern0_0 == I64 { 5251 // Rule at src/isa/s390x/inst.isle line 2532. 5252 let expr0_0 = ALUOp::Add64Ext16; 5253 return Some(expr0_0); 5254 } 5255 return None; 5256 } 5257 5258 // Generated as internal constructor for term aluop_add_sext32. 5259 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5260 let pattern0_0 = arg0; 5261 if pattern0_0 == I64 { 5262 // Rule at src/isa/s390x/inst.isle line 2535. 5263 let expr0_0 = ALUOp::Add64Ext32; 5264 return Some(expr0_0); 5265 } 5266 return None; 5267 } 5268 5269 // Generated as internal constructor for term add_reg. 5270 pub fn constructor_add_reg<C: Context>( 5271 ctx: &mut C, 5272 arg0: Type, 5273 arg1: Reg, 5274 arg2: Reg, 5275 ) -> Option<Reg> { 5276 let pattern0_0 = arg0; 5277 let pattern1_0 = arg1; 5278 let pattern2_0 = arg2; 5279 // Rule at src/isa/s390x/inst.isle line 2538. 5280 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5281 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5282 return Some(expr1_0); 5283 } 5284 5285 // Generated as internal constructor for term add_reg_sext32. 5286 pub fn constructor_add_reg_sext32<C: Context>( 5287 ctx: &mut C, 5288 arg0: Type, 5289 arg1: Reg, 5290 arg2: Reg, 5291 ) -> Option<Reg> { 5292 let pattern0_0 = arg0; 5293 let pattern1_0 = arg1; 5294 let pattern2_0 = arg2; 5295 // Rule at src/isa/s390x/inst.isle line 2541. 5296 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5297 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5298 return Some(expr1_0); 5299 } 5300 5301 // Generated as internal constructor for term add_simm16. 5302 pub fn constructor_add_simm16<C: Context>( 5303 ctx: &mut C, 5304 arg0: Type, 5305 arg1: Reg, 5306 arg2: i16, 5307 ) -> Option<Reg> { 5308 let pattern0_0 = arg0; 5309 let pattern1_0 = arg1; 5310 let pattern2_0 = arg2; 5311 // Rule at src/isa/s390x/inst.isle line 2544. 5312 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5313 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5314 return Some(expr1_0); 5315 } 5316 5317 // Generated as internal constructor for term add_simm32. 5318 pub fn constructor_add_simm32<C: Context>( 5319 ctx: &mut C, 5320 arg0: Type, 5321 arg1: Reg, 5322 arg2: i32, 5323 ) -> Option<Reg> { 5324 let pattern0_0 = arg0; 5325 let pattern1_0 = arg1; 5326 let pattern2_0 = arg2; 5327 // Rule at src/isa/s390x/inst.isle line 2547. 5328 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5329 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5330 return Some(expr1_0); 5331 } 5332 5333 // Generated as internal constructor for term add_mem. 5334 pub fn constructor_add_mem<C: Context>( 5335 ctx: &mut C, 5336 arg0: Type, 5337 arg1: Reg, 5338 arg2: &MemArg, 5339 ) -> Option<Reg> { 5340 let pattern0_0 = arg0; 5341 let pattern1_0 = arg1; 5342 let pattern2_0 = arg2; 5343 // Rule at src/isa/s390x/inst.isle line 2550. 5344 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5345 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5346 return Some(expr1_0); 5347 } 5348 5349 // Generated as internal constructor for term add_mem_sext16. 5350 pub fn constructor_add_mem_sext16<C: Context>( 5351 ctx: &mut C, 5352 arg0: Type, 5353 arg1: Reg, 5354 arg2: &MemArg, 5355 ) -> Option<Reg> { 5356 let pattern0_0 = arg0; 5357 let pattern1_0 = arg1; 5358 let pattern2_0 = arg2; 5359 // Rule at src/isa/s390x/inst.isle line 2553. 5360 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5361 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5362 return Some(expr1_0); 5363 } 5364 5365 // Generated as internal constructor for term add_mem_sext32. 5366 pub fn constructor_add_mem_sext32<C: Context>( 5367 ctx: &mut C, 5368 arg0: Type, 5369 arg1: Reg, 5370 arg2: &MemArg, 5371 ) -> Option<Reg> { 5372 let pattern0_0 = arg0; 5373 let pattern1_0 = arg1; 5374 let pattern2_0 = arg2; 5375 // Rule at src/isa/s390x/inst.isle line 2556. 5376 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5377 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5378 return Some(expr1_0); 5379 } 5380 5381 // Generated as internal constructor for term aluop_add_logical. 5382 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5383 let pattern0_0 = arg0; 5384 if pattern0_0 == I32 { 5385 // Rule at src/isa/s390x/inst.isle line 2562. 5386 let expr0_0 = ALUOp::AddLogical32; 5387 return Some(expr0_0); 5388 } 5389 if pattern0_0 == I64 { 5390 // Rule at src/isa/s390x/inst.isle line 2563. 5391 let expr0_0 = ALUOp::AddLogical64; 5392 return Some(expr0_0); 5393 } 5394 return None; 5395 } 5396 5397 // Generated as internal constructor for term aluop_add_logical_zext32. 5398 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5399 let pattern0_0 = arg0; 5400 if pattern0_0 == I64 { 5401 // Rule at src/isa/s390x/inst.isle line 2566. 5402 let expr0_0 = ALUOp::AddLogical64Ext32; 5403 return Some(expr0_0); 5404 } 5405 return None; 5406 } 5407 5408 // Generated as internal constructor for term add_logical_reg. 5409 pub fn constructor_add_logical_reg<C: Context>( 5410 ctx: &mut C, 5411 arg0: Type, 5412 arg1: Reg, 5413 arg2: Reg, 5414 ) -> Option<Reg> { 5415 let pattern0_0 = arg0; 5416 let pattern1_0 = arg1; 5417 let pattern2_0 = arg2; 5418 // Rule at src/isa/s390x/inst.isle line 2569. 5419 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5420 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5421 return Some(expr1_0); 5422 } 5423 5424 // Generated as internal constructor for term add_logical_reg_zext32. 5425 pub fn constructor_add_logical_reg_zext32<C: Context>( 5426 ctx: &mut C, 5427 arg0: Type, 5428 arg1: Reg, 5429 arg2: Reg, 5430 ) -> Option<Reg> { 5431 let pattern0_0 = arg0; 5432 let pattern1_0 = arg1; 5433 let pattern2_0 = arg2; 5434 // Rule at src/isa/s390x/inst.isle line 2572. 5435 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5436 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5437 return Some(expr1_0); 5438 } 5439 5440 // Generated as internal constructor for term add_logical_zimm32. 5441 pub fn constructor_add_logical_zimm32<C: Context>( 5442 ctx: &mut C, 5443 arg0: Type, 5444 arg1: Reg, 5445 arg2: u32, 5446 ) -> Option<Reg> { 5447 let pattern0_0 = arg0; 5448 let pattern1_0 = arg1; 5449 let pattern2_0 = arg2; 5450 // Rule at src/isa/s390x/inst.isle line 2575. 5451 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5452 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5453 return Some(expr1_0); 5454 } 5455 5456 // Generated as internal constructor for term add_logical_mem. 5457 pub fn constructor_add_logical_mem<C: Context>( 5458 ctx: &mut C, 5459 arg0: Type, 5460 arg1: Reg, 5461 arg2: &MemArg, 5462 ) -> Option<Reg> { 5463 let pattern0_0 = arg0; 5464 let pattern1_0 = arg1; 5465 let pattern2_0 = arg2; 5466 // Rule at src/isa/s390x/inst.isle line 2578. 5467 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5468 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5469 return Some(expr1_0); 5470 } 5471 5472 // Generated as internal constructor for term add_logical_mem_zext32. 5473 pub fn constructor_add_logical_mem_zext32<C: Context>( 5474 ctx: &mut C, 5475 arg0: Type, 5476 arg1: Reg, 5477 arg2: &MemArg, 5478 ) -> Option<Reg> { 5479 let pattern0_0 = arg0; 5480 let pattern1_0 = arg1; 5481 let pattern2_0 = arg2; 5482 // Rule at src/isa/s390x/inst.isle line 2581. 5483 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5484 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5485 return Some(expr1_0); 5486 } 5487 5488 // Generated as internal constructor for term aluop_sub. 5489 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5490 let pattern0_0 = arg0; 5491 if pattern0_0 == I8 { 5492 // Rule at src/isa/s390x/inst.isle line 2587. 5493 let expr0_0 = ALUOp::Sub32; 5494 return Some(expr0_0); 5495 } 5496 if pattern0_0 == I16 { 5497 // Rule at src/isa/s390x/inst.isle line 2588. 5498 let expr0_0 = ALUOp::Sub32; 5499 return Some(expr0_0); 5500 } 5501 if pattern0_0 == I32 { 5502 // Rule at src/isa/s390x/inst.isle line 2589. 5503 let expr0_0 = ALUOp::Sub32; 5504 return Some(expr0_0); 5505 } 5506 if pattern0_0 == I64 { 5507 // Rule at src/isa/s390x/inst.isle line 2590. 5508 let expr0_0 = ALUOp::Sub64; 5509 return Some(expr0_0); 5510 } 5511 return None; 5512 } 5513 5514 // Generated as internal constructor for term aluop_sub_sext16. 5515 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5516 let pattern0_0 = arg0; 5517 if pattern0_0 == I16 { 5518 // Rule at src/isa/s390x/inst.isle line 2593. 5519 let expr0_0 = ALUOp::Sub32Ext16; 5520 return Some(expr0_0); 5521 } 5522 if pattern0_0 == I32 { 5523 // Rule at src/isa/s390x/inst.isle line 2594. 5524 let expr0_0 = ALUOp::Sub32Ext16; 5525 return Some(expr0_0); 5526 } 5527 if pattern0_0 == I64 { 5528 // Rule at src/isa/s390x/inst.isle line 2595. 5529 let expr0_0 = ALUOp::Sub64Ext16; 5530 return Some(expr0_0); 5531 } 5532 return None; 5533 } 5534 5535 // Generated as internal constructor for term aluop_sub_sext32. 5536 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5537 let pattern0_0 = arg0; 5538 if pattern0_0 == I64 { 5539 // Rule at src/isa/s390x/inst.isle line 2598. 5540 let expr0_0 = ALUOp::Sub64Ext32; 5541 return Some(expr0_0); 5542 } 5543 return None; 5544 } 5545 5546 // Generated as internal constructor for term sub_reg. 5547 pub fn constructor_sub_reg<C: Context>( 5548 ctx: &mut C, 5549 arg0: Type, 5550 arg1: Reg, 5551 arg2: Reg, 5552 ) -> Option<Reg> { 5553 let pattern0_0 = arg0; 5554 let pattern1_0 = arg1; 5555 let pattern2_0 = arg2; 5556 // Rule at src/isa/s390x/inst.isle line 2601. 5557 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5558 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5559 return Some(expr1_0); 5560 } 5561 5562 // Generated as internal constructor for term sub_reg_sext32. 5563 pub fn constructor_sub_reg_sext32<C: Context>( 5564 ctx: &mut C, 5565 arg0: Type, 5566 arg1: Reg, 5567 arg2: Reg, 5568 ) -> Option<Reg> { 5569 let pattern0_0 = arg0; 5570 let pattern1_0 = arg1; 5571 let pattern2_0 = arg2; 5572 // Rule at src/isa/s390x/inst.isle line 2604. 5573 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5574 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5575 return Some(expr1_0); 5576 } 5577 5578 // Generated as internal constructor for term sub_mem. 5579 pub fn constructor_sub_mem<C: Context>( 5580 ctx: &mut C, 5581 arg0: Type, 5582 arg1: Reg, 5583 arg2: &MemArg, 5584 ) -> Option<Reg> { 5585 let pattern0_0 = arg0; 5586 let pattern1_0 = arg1; 5587 let pattern2_0 = arg2; 5588 // Rule at src/isa/s390x/inst.isle line 2607. 5589 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5590 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5591 return Some(expr1_0); 5592 } 5593 5594 // Generated as internal constructor for term sub_mem_sext16. 5595 pub fn constructor_sub_mem_sext16<C: Context>( 5596 ctx: &mut C, 5597 arg0: Type, 5598 arg1: Reg, 5599 arg2: &MemArg, 5600 ) -> Option<Reg> { 5601 let pattern0_0 = arg0; 5602 let pattern1_0 = arg1; 5603 let pattern2_0 = arg2; 5604 // Rule at src/isa/s390x/inst.isle line 2610. 5605 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5606 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5607 return Some(expr1_0); 5608 } 5609 5610 // Generated as internal constructor for term sub_mem_sext32. 5611 pub fn constructor_sub_mem_sext32<C: Context>( 5612 ctx: &mut C, 5613 arg0: Type, 5614 arg1: Reg, 5615 arg2: &MemArg, 5616 ) -> Option<Reg> { 5617 let pattern0_0 = arg0; 5618 let pattern1_0 = arg1; 5619 let pattern2_0 = arg2; 5620 // Rule at src/isa/s390x/inst.isle line 2613. 5621 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5622 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5623 return Some(expr1_0); 5624 } 5625 5626 // Generated as internal constructor for term aluop_sub_logical. 5627 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5628 let pattern0_0 = arg0; 5629 if pattern0_0 == I32 { 5630 // Rule at src/isa/s390x/inst.isle line 2619. 5631 let expr0_0 = ALUOp::SubLogical32; 5632 return Some(expr0_0); 5633 } 5634 if pattern0_0 == I64 { 5635 // Rule at src/isa/s390x/inst.isle line 2620. 5636 let expr0_0 = ALUOp::SubLogical64; 5637 return Some(expr0_0); 5638 } 5639 return None; 5640 } 5641 5642 // Generated as internal constructor for term aluop_sub_logical_zext32. 5643 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5644 let pattern0_0 = arg0; 5645 if pattern0_0 == I64 { 5646 // Rule at src/isa/s390x/inst.isle line 2623. 5647 let expr0_0 = ALUOp::SubLogical64Ext32; 5648 return Some(expr0_0); 5649 } 5650 return None; 5651 } 5652 5653 // Generated as internal constructor for term sub_logical_reg. 5654 pub fn constructor_sub_logical_reg<C: Context>( 5655 ctx: &mut C, 5656 arg0: Type, 5657 arg1: Reg, 5658 arg2: Reg, 5659 ) -> Option<Reg> { 5660 let pattern0_0 = arg0; 5661 let pattern1_0 = arg1; 5662 let pattern2_0 = arg2; 5663 // Rule at src/isa/s390x/inst.isle line 2626. 5664 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5665 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5666 return Some(expr1_0); 5667 } 5668 5669 // Generated as internal constructor for term sub_logical_reg_zext32. 5670 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5671 ctx: &mut C, 5672 arg0: Type, 5673 arg1: Reg, 5674 arg2: Reg, 5675 ) -> Option<Reg> { 5676 let pattern0_0 = arg0; 5677 let pattern1_0 = arg1; 5678 let pattern2_0 = arg2; 5679 // Rule at src/isa/s390x/inst.isle line 2629. 5680 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5681 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5682 return Some(expr1_0); 5683 } 5684 5685 // Generated as internal constructor for term sub_logical_zimm32. 5686 pub fn constructor_sub_logical_zimm32<C: Context>( 5687 ctx: &mut C, 5688 arg0: Type, 5689 arg1: Reg, 5690 arg2: u32, 5691 ) -> Option<Reg> { 5692 let pattern0_0 = arg0; 5693 let pattern1_0 = arg1; 5694 let pattern2_0 = arg2; 5695 // Rule at src/isa/s390x/inst.isle line 2632. 5696 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5697 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5698 return Some(expr1_0); 5699 } 5700 5701 // Generated as internal constructor for term sub_logical_mem. 5702 pub fn constructor_sub_logical_mem<C: Context>( 5703 ctx: &mut C, 5704 arg0: Type, 5705 arg1: Reg, 5706 arg2: &MemArg, 5707 ) -> Option<Reg> { 5708 let pattern0_0 = arg0; 5709 let pattern1_0 = arg1; 5710 let pattern2_0 = arg2; 5711 // Rule at src/isa/s390x/inst.isle line 2635. 5712 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5713 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5714 return Some(expr1_0); 5715 } 5716 5717 // Generated as internal constructor for term sub_logical_mem_zext32. 5718 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5719 ctx: &mut C, 5720 arg0: Type, 5721 arg1: Reg, 5722 arg2: &MemArg, 5723 ) -> Option<Reg> { 5724 let pattern0_0 = arg0; 5725 let pattern1_0 = arg1; 5726 let pattern2_0 = arg2; 5727 // Rule at src/isa/s390x/inst.isle line 2638. 5728 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5729 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5730 return Some(expr1_0); 5731 } 5732 5733 // Generated as internal constructor for term aluop_mul. 5734 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5735 let pattern0_0 = arg0; 5736 if pattern0_0 == I8 { 5737 // Rule at src/isa/s390x/inst.isle line 2644. 5738 let expr0_0 = ALUOp::Mul32; 5739 return Some(expr0_0); 5740 } 5741 if pattern0_0 == I16 { 5742 // Rule at src/isa/s390x/inst.isle line 2645. 5743 let expr0_0 = ALUOp::Mul32; 5744 return Some(expr0_0); 5745 } 5746 if pattern0_0 == I32 { 5747 // Rule at src/isa/s390x/inst.isle line 2646. 5748 let expr0_0 = ALUOp::Mul32; 5749 return Some(expr0_0); 5750 } 5751 if pattern0_0 == I64 { 5752 // Rule at src/isa/s390x/inst.isle line 2647. 5753 let expr0_0 = ALUOp::Mul64; 5754 return Some(expr0_0); 5755 } 5756 return None; 5757 } 5758 5759 // Generated as internal constructor for term aluop_mul_sext16. 5760 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5761 let pattern0_0 = arg0; 5762 if pattern0_0 == I16 { 5763 // Rule at src/isa/s390x/inst.isle line 2650. 5764 let expr0_0 = ALUOp::Mul32Ext16; 5765 return Some(expr0_0); 5766 } 5767 if pattern0_0 == I32 { 5768 // Rule at src/isa/s390x/inst.isle line 2651. 5769 let expr0_0 = ALUOp::Mul32Ext16; 5770 return Some(expr0_0); 5771 } 5772 if pattern0_0 == I64 { 5773 // Rule at src/isa/s390x/inst.isle line 2652. 5774 let expr0_0 = ALUOp::Mul64Ext16; 5775 return Some(expr0_0); 5776 } 5777 return None; 5778 } 5779 5780 // Generated as internal constructor for term aluop_mul_sext32. 5781 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5782 let pattern0_0 = arg0; 5783 if pattern0_0 == I64 { 5784 // Rule at src/isa/s390x/inst.isle line 2655. 5785 let expr0_0 = ALUOp::Mul64Ext32; 5786 return Some(expr0_0); 5787 } 5788 return None; 5789 } 5790 5791 // Generated as internal constructor for term mul_reg. 5792 pub fn constructor_mul_reg<C: Context>( 5793 ctx: &mut C, 5794 arg0: Type, 5795 arg1: Reg, 5796 arg2: Reg, 5797 ) -> Option<Reg> { 5798 let pattern0_0 = arg0; 5799 let pattern1_0 = arg1; 5800 let pattern2_0 = arg2; 5801 // Rule at src/isa/s390x/inst.isle line 2658. 5802 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5803 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5804 return Some(expr1_0); 5805 } 5806 5807 // Generated as internal constructor for term mul_reg_sext32. 5808 pub fn constructor_mul_reg_sext32<C: Context>( 5809 ctx: &mut C, 5810 arg0: Type, 5811 arg1: Reg, 5812 arg2: Reg, 5813 ) -> Option<Reg> { 5814 let pattern0_0 = arg0; 5815 let pattern1_0 = arg1; 5816 let pattern2_0 = arg2; 5817 // Rule at src/isa/s390x/inst.isle line 2661. 5818 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5819 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5820 return Some(expr1_0); 5821 } 5822 5823 // Generated as internal constructor for term mul_simm16. 5824 pub fn constructor_mul_simm16<C: Context>( 5825 ctx: &mut C, 5826 arg0: Type, 5827 arg1: Reg, 5828 arg2: i16, 5829 ) -> Option<Reg> { 5830 let pattern0_0 = arg0; 5831 let pattern1_0 = arg1; 5832 let pattern2_0 = arg2; 5833 // Rule at src/isa/s390x/inst.isle line 2664. 5834 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5835 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5836 return Some(expr1_0); 5837 } 5838 5839 // Generated as internal constructor for term mul_simm32. 5840 pub fn constructor_mul_simm32<C: Context>( 5841 ctx: &mut C, 5842 arg0: Type, 5843 arg1: Reg, 5844 arg2: i32, 5845 ) -> Option<Reg> { 5846 let pattern0_0 = arg0; 5847 let pattern1_0 = arg1; 5848 let pattern2_0 = arg2; 5849 // Rule at src/isa/s390x/inst.isle line 2667. 5850 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5851 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5852 return Some(expr1_0); 5853 } 5854 5855 // Generated as internal constructor for term mul_mem. 5856 pub fn constructor_mul_mem<C: Context>( 5857 ctx: &mut C, 5858 arg0: Type, 5859 arg1: Reg, 5860 arg2: &MemArg, 5861 ) -> Option<Reg> { 5862 let pattern0_0 = arg0; 5863 let pattern1_0 = arg1; 5864 let pattern2_0 = arg2; 5865 // Rule at src/isa/s390x/inst.isle line 2670. 5866 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5867 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5868 return Some(expr1_0); 5869 } 5870 5871 // Generated as internal constructor for term mul_mem_sext16. 5872 pub fn constructor_mul_mem_sext16<C: Context>( 5873 ctx: &mut C, 5874 arg0: Type, 5875 arg1: Reg, 5876 arg2: &MemArg, 5877 ) -> Option<Reg> { 5878 let pattern0_0 = arg0; 5879 let pattern1_0 = arg1; 5880 let pattern2_0 = arg2; 5881 // Rule at src/isa/s390x/inst.isle line 2673. 5882 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5883 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5884 return Some(expr1_0); 5885 } 5886 5887 // Generated as internal constructor for term mul_mem_sext32. 5888 pub fn constructor_mul_mem_sext32<C: Context>( 5889 ctx: &mut C, 5890 arg0: Type, 5891 arg1: Reg, 5892 arg2: &MemArg, 5893 ) -> Option<Reg> { 5894 let pattern0_0 = arg0; 5895 let pattern1_0 = arg1; 5896 let pattern2_0 = arg2; 5897 // Rule at src/isa/s390x/inst.isle line 2676. 5898 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5899 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5900 return Some(expr1_0); 5901 } 5902 5903 // Generated as internal constructor for term udivmod. 5904 pub fn constructor_udivmod<C: Context>( 5905 ctx: &mut C, 5906 arg0: Type, 5907 arg1: &RegPair, 5908 arg2: Reg, 5909 ) -> Option<RegPair> { 5910 let pattern0_0 = arg0; 5911 if pattern0_0 == I32 { 5912 let pattern2_0 = arg1; 5913 let pattern3_0 = arg2; 5914 // Rule at src/isa/s390x/inst.isle line 2682. 5915 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5916 return Some(expr0_0); 5917 } 5918 if pattern0_0 == I64 { 5919 let pattern2_0 = arg1; 5920 let pattern3_0 = arg2; 5921 // Rule at src/isa/s390x/inst.isle line 2683. 5922 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5923 return Some(expr0_0); 5924 } 5925 return None; 5926 } 5927 5928 // Generated as internal constructor for term sdivmod. 5929 pub fn constructor_sdivmod<C: Context>( 5930 ctx: &mut C, 5931 arg0: Type, 5932 arg1: &RegPair, 5933 arg2: Reg, 5934 ) -> Option<RegPair> { 5935 let pattern0_0 = arg0; 5936 if pattern0_0 == I32 { 5937 let pattern2_0 = arg1; 5938 let pattern3_0 = arg2; 5939 // Rule at src/isa/s390x/inst.isle line 2689. 5940 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5941 return Some(expr0_0); 5942 } 5943 if pattern0_0 == I64 { 5944 let pattern2_0 = arg1; 5945 let pattern3_0 = arg2; 5946 // Rule at src/isa/s390x/inst.isle line 2690. 5947 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5948 return Some(expr0_0); 5949 } 5950 return None; 5951 } 5952 5953 // Generated as internal constructor for term aluop_and. 5954 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5955 let pattern0_0 = arg0; 5956 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5957 // Rule at src/isa/s390x/inst.isle line 2696. 5958 let expr0_0 = ALUOp::And32; 5959 return Some(expr0_0); 5960 } 5961 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5962 // Rule at src/isa/s390x/inst.isle line 2697. 5963 let expr0_0 = ALUOp::And64; 5964 return Some(expr0_0); 5965 } 5966 return None; 5967 } 5968 5969 // Generated as internal constructor for term and_reg. 5970 pub fn constructor_and_reg<C: Context>( 5971 ctx: &mut C, 5972 arg0: Type, 5973 arg1: Reg, 5974 arg2: Reg, 5975 ) -> Option<Reg> { 5976 let pattern0_0 = arg0; 5977 let pattern1_0 = arg1; 5978 let pattern2_0 = arg2; 5979 // Rule at src/isa/s390x/inst.isle line 2700. 5980 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5981 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5982 return Some(expr1_0); 5983 } 5984 5985 // Generated as internal constructor for term and_uimm16shifted. 5986 pub fn constructor_and_uimm16shifted<C: Context>( 5987 ctx: &mut C, 5988 arg0: Type, 5989 arg1: Reg, 5990 arg2: UImm16Shifted, 5991 ) -> Option<Reg> { 5992 let pattern0_0 = arg0; 5993 let pattern1_0 = arg1; 5994 let pattern2_0 = arg2; 5995 // Rule at src/isa/s390x/inst.isle line 2703. 5996 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5997 let expr1_0 = 5998 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5999 return Some(expr1_0); 6000 } 6001 6002 // Generated as internal constructor for term and_uimm32shifted. 6003 pub fn constructor_and_uimm32shifted<C: Context>( 6004 ctx: &mut C, 6005 arg0: Type, 6006 arg1: Reg, 6007 arg2: UImm32Shifted, 6008 ) -> Option<Reg> { 6009 let pattern0_0 = arg0; 6010 let pattern1_0 = arg1; 6011 let pattern2_0 = arg2; 6012 // Rule at src/isa/s390x/inst.isle line 2706. 6013 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6014 let expr1_0 = 6015 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6016 return Some(expr1_0); 6017 } 6018 6019 // Generated as internal constructor for term and_mem. 6020 pub fn constructor_and_mem<C: Context>( 6021 ctx: &mut C, 6022 arg0: Type, 6023 arg1: Reg, 6024 arg2: &MemArg, 6025 ) -> Option<Reg> { 6026 let pattern0_0 = arg0; 6027 let pattern1_0 = arg1; 6028 let pattern2_0 = arg2; 6029 // Rule at src/isa/s390x/inst.isle line 2709. 6030 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6031 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6032 return Some(expr1_0); 6033 } 6034 6035 // Generated as internal constructor for term aluop_or. 6036 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6037 let pattern0_0 = arg0; 6038 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6039 // Rule at src/isa/s390x/inst.isle line 2715. 6040 let expr0_0 = ALUOp::Orr32; 6041 return Some(expr0_0); 6042 } 6043 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6044 // Rule at src/isa/s390x/inst.isle line 2716. 6045 let expr0_0 = ALUOp::Orr64; 6046 return Some(expr0_0); 6047 } 6048 return None; 6049 } 6050 6051 // Generated as internal constructor for term or_reg. 6052 pub fn constructor_or_reg<C: Context>( 6053 ctx: &mut C, 6054 arg0: Type, 6055 arg1: Reg, 6056 arg2: Reg, 6057 ) -> Option<Reg> { 6058 let pattern0_0 = arg0; 6059 let pattern1_0 = arg1; 6060 let pattern2_0 = arg2; 6061 // Rule at src/isa/s390x/inst.isle line 2719. 6062 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6063 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6064 return Some(expr1_0); 6065 } 6066 6067 // Generated as internal constructor for term or_uimm16shifted. 6068 pub fn constructor_or_uimm16shifted<C: Context>( 6069 ctx: &mut C, 6070 arg0: Type, 6071 arg1: Reg, 6072 arg2: UImm16Shifted, 6073 ) -> Option<Reg> { 6074 let pattern0_0 = arg0; 6075 let pattern1_0 = arg1; 6076 let pattern2_0 = arg2; 6077 // Rule at src/isa/s390x/inst.isle line 2722. 6078 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6079 let expr1_0 = 6080 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6081 return Some(expr1_0); 6082 } 6083 6084 // Generated as internal constructor for term or_uimm32shifted. 6085 pub fn constructor_or_uimm32shifted<C: Context>( 6086 ctx: &mut C, 6087 arg0: Type, 6088 arg1: Reg, 6089 arg2: UImm32Shifted, 6090 ) -> Option<Reg> { 6091 let pattern0_0 = arg0; 6092 let pattern1_0 = arg1; 6093 let pattern2_0 = arg2; 6094 // Rule at src/isa/s390x/inst.isle line 2725. 6095 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6096 let expr1_0 = 6097 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6098 return Some(expr1_0); 6099 } 6100 6101 // Generated as internal constructor for term or_mem. 6102 pub fn constructor_or_mem<C: Context>( 6103 ctx: &mut C, 6104 arg0: Type, 6105 arg1: Reg, 6106 arg2: &MemArg, 6107 ) -> Option<Reg> { 6108 let pattern0_0 = arg0; 6109 let pattern1_0 = arg1; 6110 let pattern2_0 = arg2; 6111 // Rule at src/isa/s390x/inst.isle line 2728. 6112 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6113 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6114 return Some(expr1_0); 6115 } 6116 6117 // Generated as internal constructor for term aluop_xor. 6118 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6119 let pattern0_0 = arg0; 6120 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6121 // Rule at src/isa/s390x/inst.isle line 2734. 6122 let expr0_0 = ALUOp::Xor32; 6123 return Some(expr0_0); 6124 } 6125 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6126 // Rule at src/isa/s390x/inst.isle line 2735. 6127 let expr0_0 = ALUOp::Xor64; 6128 return Some(expr0_0); 6129 } 6130 return None; 6131 } 6132 6133 // Generated as internal constructor for term xor_reg. 6134 pub fn constructor_xor_reg<C: Context>( 6135 ctx: &mut C, 6136 arg0: Type, 6137 arg1: Reg, 6138 arg2: Reg, 6139 ) -> Option<Reg> { 6140 let pattern0_0 = arg0; 6141 let pattern1_0 = arg1; 6142 let pattern2_0 = arg2; 6143 // Rule at src/isa/s390x/inst.isle line 2738. 6144 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6145 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6146 return Some(expr1_0); 6147 } 6148 6149 // Generated as internal constructor for term xor_uimm32shifted. 6150 pub fn constructor_xor_uimm32shifted<C: Context>( 6151 ctx: &mut C, 6152 arg0: Type, 6153 arg1: Reg, 6154 arg2: UImm32Shifted, 6155 ) -> Option<Reg> { 6156 let pattern0_0 = arg0; 6157 let pattern1_0 = arg1; 6158 let pattern2_0 = arg2; 6159 // Rule at src/isa/s390x/inst.isle line 2741. 6160 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6161 let expr1_0 = 6162 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6163 return Some(expr1_0); 6164 } 6165 6166 // Generated as internal constructor for term xor_mem. 6167 pub fn constructor_xor_mem<C: Context>( 6168 ctx: &mut C, 6169 arg0: Type, 6170 arg1: Reg, 6171 arg2: &MemArg, 6172 ) -> Option<Reg> { 6173 let pattern0_0 = arg0; 6174 let pattern1_0 = arg1; 6175 let pattern2_0 = arg2; 6176 // Rule at src/isa/s390x/inst.isle line 2744. 6177 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6178 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6179 return Some(expr1_0); 6180 } 6181 6182 // Generated as internal constructor for term push_xor_uimm32shifted. 6183 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6184 ctx: &mut C, 6185 arg0: &VecMInstBuilder, 6186 arg1: Type, 6187 arg2: WritableReg, 6188 arg3: Reg, 6189 arg4: UImm32Shifted, 6190 ) -> Option<Reg> { 6191 let pattern0_0 = arg0; 6192 let pattern1_0 = arg1; 6193 let pattern2_0 = arg2; 6194 let pattern3_0 = arg3; 6195 let pattern4_0 = arg4; 6196 // Rule at src/isa/s390x/inst.isle line 2747. 6197 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6198 let expr1_0 = constructor_push_alu_uimm32shifted( 6199 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6200 )?; 6201 return Some(expr1_0); 6202 } 6203 6204 // Generated as internal constructor for term not_reg. 6205 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6206 let pattern0_0 = arg0; 6207 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6208 let pattern2_0 = arg1; 6209 // Rule at src/isa/s390x/inst.isle line 2753. 6210 let expr0_0: u32 = 4294967295; 6211 let expr1_0: u8 = 0; 6212 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6213 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6214 return Some(expr3_0); 6215 } 6216 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6217 let pattern2_0 = arg1; 6218 // Rule at src/isa/s390x/inst.isle line 2755. 6219 let expr0_0: u32 = 4294967295; 6220 let expr1_0: u8 = 0; 6221 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6222 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6223 let expr4_0: u32 = 4294967295; 6224 let expr5_0: u8 = 32; 6225 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6226 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6227 return Some(expr7_0); 6228 } 6229 return None; 6230 } 6231 6232 // Generated as internal constructor for term push_not_reg. 6233 pub fn constructor_push_not_reg<C: Context>( 6234 ctx: &mut C, 6235 arg0: &VecMInstBuilder, 6236 arg1: Type, 6237 arg2: WritableReg, 6238 arg3: Reg, 6239 ) -> Option<Reg> { 6240 let pattern0_0 = arg0; 6241 let pattern1_0 = arg1; 6242 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6243 let pattern3_0 = arg2; 6244 let pattern4_0 = arg3; 6245 // Rule at src/isa/s390x/inst.isle line 2761. 6246 let expr0_0: u32 = 4294967295; 6247 let expr1_0: u8 = 0; 6248 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6249 let expr3_0 = constructor_push_xor_uimm32shifted( 6250 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6251 )?; 6252 return Some(expr3_0); 6253 } 6254 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6255 let pattern3_0 = arg2; 6256 let pattern4_0 = arg3; 6257 // Rule at src/isa/s390x/inst.isle line 2763. 6258 let expr0_0: u32 = 4294967295; 6259 let expr1_0: u8 = 0; 6260 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6261 let expr3_0 = constructor_push_xor_uimm32shifted( 6262 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6263 )?; 6264 let expr4_0: u32 = 4294967295; 6265 let expr5_0: u8 = 32; 6266 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6267 let expr7_0 = constructor_push_xor_uimm32shifted( 6268 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6269 )?; 6270 return Some(expr7_0); 6271 } 6272 return None; 6273 } 6274 6275 // Generated as internal constructor for term aluop_and_not. 6276 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6277 let pattern0_0 = arg0; 6278 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6279 // Rule at src/isa/s390x/inst.isle line 2771. 6280 let expr0_0 = ALUOp::AndNot32; 6281 return Some(expr0_0); 6282 } 6283 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6284 // Rule at src/isa/s390x/inst.isle line 2772. 6285 let expr0_0 = ALUOp::AndNot64; 6286 return Some(expr0_0); 6287 } 6288 return None; 6289 } 6290 6291 // Generated as internal constructor for term and_not_reg. 6292 pub fn constructor_and_not_reg<C: Context>( 6293 ctx: &mut C, 6294 arg0: Type, 6295 arg1: Reg, 6296 arg2: Reg, 6297 ) -> Option<Reg> { 6298 let pattern0_0 = arg0; 6299 let pattern1_0 = arg1; 6300 let pattern2_0 = arg2; 6301 // Rule at src/isa/s390x/inst.isle line 2775. 6302 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6303 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6304 return Some(expr1_0); 6305 } 6306 6307 // Generated as internal constructor for term aluop_or_not. 6308 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6309 let pattern0_0 = arg0; 6310 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6311 // Rule at src/isa/s390x/inst.isle line 2781. 6312 let expr0_0 = ALUOp::OrrNot32; 6313 return Some(expr0_0); 6314 } 6315 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6316 // Rule at src/isa/s390x/inst.isle line 2782. 6317 let expr0_0 = ALUOp::OrrNot64; 6318 return Some(expr0_0); 6319 } 6320 return None; 6321 } 6322 6323 // Generated as internal constructor for term or_not_reg. 6324 pub fn constructor_or_not_reg<C: Context>( 6325 ctx: &mut C, 6326 arg0: Type, 6327 arg1: Reg, 6328 arg2: Reg, 6329 ) -> Option<Reg> { 6330 let pattern0_0 = arg0; 6331 let pattern1_0 = arg1; 6332 let pattern2_0 = arg2; 6333 // Rule at src/isa/s390x/inst.isle line 2785. 6334 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6335 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6336 return Some(expr1_0); 6337 } 6338 6339 // Generated as internal constructor for term aluop_xor_not. 6340 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6341 let pattern0_0 = arg0; 6342 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6343 // Rule at src/isa/s390x/inst.isle line 2791. 6344 let expr0_0 = ALUOp::XorNot32; 6345 return Some(expr0_0); 6346 } 6347 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6348 // Rule at src/isa/s390x/inst.isle line 2792. 6349 let expr0_0 = ALUOp::XorNot64; 6350 return Some(expr0_0); 6351 } 6352 return None; 6353 } 6354 6355 // Generated as internal constructor for term xor_not_reg. 6356 pub fn constructor_xor_not_reg<C: Context>( 6357 ctx: &mut C, 6358 arg0: Type, 6359 arg1: Reg, 6360 arg2: Reg, 6361 ) -> Option<Reg> { 6362 let pattern0_0 = arg0; 6363 let pattern1_0 = arg1; 6364 let pattern2_0 = arg2; 6365 // Rule at src/isa/s390x/inst.isle line 2795. 6366 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6367 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6368 return Some(expr1_0); 6369 } 6370 6371 // Generated as internal constructor for term unaryop_abs. 6372 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6373 let pattern0_0 = arg0; 6374 if pattern0_0 == I32 { 6375 // Rule at src/isa/s390x/inst.isle line 2801. 6376 let expr0_0 = UnaryOp::Abs32; 6377 return Some(expr0_0); 6378 } 6379 if pattern0_0 == I64 { 6380 // Rule at src/isa/s390x/inst.isle line 2802. 6381 let expr0_0 = UnaryOp::Abs64; 6382 return Some(expr0_0); 6383 } 6384 return None; 6385 } 6386 6387 // Generated as internal constructor for term unaryop_abs_sext32. 6388 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6389 let pattern0_0 = arg0; 6390 if pattern0_0 == I64 { 6391 // Rule at src/isa/s390x/inst.isle line 2805. 6392 let expr0_0 = UnaryOp::Abs64Ext32; 6393 return Some(expr0_0); 6394 } 6395 return None; 6396 } 6397 6398 // Generated as internal constructor for term abs_reg. 6399 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6400 let pattern0_0 = arg0; 6401 let pattern1_0 = arg1; 6402 // Rule at src/isa/s390x/inst.isle line 2808. 6403 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6404 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6405 return Some(expr1_0); 6406 } 6407 6408 // Generated as internal constructor for term abs_reg_sext32. 6409 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6410 let pattern0_0 = arg0; 6411 let pattern1_0 = arg1; 6412 // Rule at src/isa/s390x/inst.isle line 2811. 6413 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6414 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6415 return Some(expr1_0); 6416 } 6417 6418 // Generated as internal constructor for term unaryop_neg. 6419 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6420 let pattern0_0 = arg0; 6421 if pattern0_0 == I8 { 6422 // Rule at src/isa/s390x/inst.isle line 2817. 6423 let expr0_0 = UnaryOp::Neg32; 6424 return Some(expr0_0); 6425 } 6426 if pattern0_0 == I16 { 6427 // Rule at src/isa/s390x/inst.isle line 2818. 6428 let expr0_0 = UnaryOp::Neg32; 6429 return Some(expr0_0); 6430 } 6431 if pattern0_0 == I32 { 6432 // Rule at src/isa/s390x/inst.isle line 2819. 6433 let expr0_0 = UnaryOp::Neg32; 6434 return Some(expr0_0); 6435 } 6436 if pattern0_0 == I64 { 6437 // Rule at src/isa/s390x/inst.isle line 2820. 6438 let expr0_0 = UnaryOp::Neg64; 6439 return Some(expr0_0); 6440 } 6441 return None; 6442 } 6443 6444 // Generated as internal constructor for term unaryop_neg_sext32. 6445 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6446 let pattern0_0 = arg0; 6447 if pattern0_0 == I64 { 6448 // Rule at src/isa/s390x/inst.isle line 2823. 6449 let expr0_0 = UnaryOp::Neg64Ext32; 6450 return Some(expr0_0); 6451 } 6452 return None; 6453 } 6454 6455 // Generated as internal constructor for term neg_reg. 6456 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6457 let pattern0_0 = arg0; 6458 let pattern1_0 = arg1; 6459 // Rule at src/isa/s390x/inst.isle line 2826. 6460 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6461 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6462 return Some(expr1_0); 6463 } 6464 6465 // Generated as internal constructor for term neg_reg_sext32. 6466 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6467 let pattern0_0 = arg0; 6468 let pattern1_0 = arg1; 6469 // Rule at src/isa/s390x/inst.isle line 2829. 6470 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6471 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6472 return Some(expr1_0); 6473 } 6474 6475 // Generated as internal constructor for term unaryop_bswap. 6476 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6477 let pattern0_0 = arg0; 6478 if pattern0_0 == I32 { 6479 // Rule at src/isa/s390x/inst.isle line 2835. 6480 let expr0_0 = UnaryOp::BSwap32; 6481 return Some(expr0_0); 6482 } 6483 if pattern0_0 == I64 { 6484 // Rule at src/isa/s390x/inst.isle line 2836. 6485 let expr0_0 = UnaryOp::BSwap64; 6486 return Some(expr0_0); 6487 } 6488 return None; 6489 } 6490 6491 // Generated as internal constructor for term bswap_reg. 6492 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6493 let pattern0_0 = arg0; 6494 let pattern1_0 = arg1; 6495 // Rule at src/isa/s390x/inst.isle line 2839. 6496 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6497 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6498 return Some(expr1_0); 6499 } 6500 6501 // Generated as internal constructor for term push_bswap_reg. 6502 pub fn constructor_push_bswap_reg<C: Context>( 6503 ctx: &mut C, 6504 arg0: &VecMInstBuilder, 6505 arg1: Type, 6506 arg2: WritableReg, 6507 arg3: Reg, 6508 ) -> Option<Reg> { 6509 let pattern0_0 = arg0; 6510 let pattern1_0 = arg1; 6511 let pattern2_0 = arg2; 6512 let pattern3_0 = arg3; 6513 // Rule at src/isa/s390x/inst.isle line 2842. 6514 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6515 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6516 return Some(expr1_0); 6517 } 6518 6519 // Generated as internal constructor for term shiftop_rot. 6520 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6521 let pattern0_0 = arg0; 6522 if pattern0_0 == I32 { 6523 // Rule at src/isa/s390x/inst.isle line 2848. 6524 let expr0_0 = ShiftOp::RotL32; 6525 return Some(expr0_0); 6526 } 6527 if pattern0_0 == I64 { 6528 // Rule at src/isa/s390x/inst.isle line 2849. 6529 let expr0_0 = ShiftOp::RotL64; 6530 return Some(expr0_0); 6531 } 6532 return None; 6533 } 6534 6535 // Generated as internal constructor for term rot_reg. 6536 pub fn constructor_rot_reg<C: Context>( 6537 ctx: &mut C, 6538 arg0: Type, 6539 arg1: Reg, 6540 arg2: Reg, 6541 ) -> Option<Reg> { 6542 let pattern0_0 = arg0; 6543 let pattern1_0 = arg1; 6544 let pattern2_0 = arg2; 6545 // Rule at src/isa/s390x/inst.isle line 2852. 6546 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6547 let expr1_0: u8 = 0; 6548 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6549 return Some(expr2_0); 6550 } 6551 6552 // Generated as internal constructor for term rot_imm. 6553 pub fn constructor_rot_imm<C: Context>( 6554 ctx: &mut C, 6555 arg0: Type, 6556 arg1: Reg, 6557 arg2: u8, 6558 ) -> Option<Reg> { 6559 let pattern0_0 = arg0; 6560 let pattern1_0 = arg1; 6561 let pattern2_0 = arg2; 6562 // Rule at src/isa/s390x/inst.isle line 2856. 6563 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6564 let expr1_0 = C::zero_reg(ctx); 6565 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6566 return Some(expr2_0); 6567 } 6568 6569 // Generated as internal constructor for term rot_imm_reg. 6570 pub fn constructor_rot_imm_reg<C: Context>( 6571 ctx: &mut C, 6572 arg0: Type, 6573 arg1: Reg, 6574 arg2: u8, 6575 arg3: Reg, 6576 ) -> Option<Reg> { 6577 let pattern0_0 = arg0; 6578 let pattern1_0 = arg1; 6579 let pattern2_0 = arg2; 6580 let pattern3_0 = arg3; 6581 // Rule at src/isa/s390x/inst.isle line 2860. 6582 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6583 let expr1_0 = constructor_shift_rr( 6584 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6585 )?; 6586 return Some(expr1_0); 6587 } 6588 6589 // Generated as internal constructor for term push_rot_imm_reg. 6590 pub fn constructor_push_rot_imm_reg<C: Context>( 6591 ctx: &mut C, 6592 arg0: &VecMInstBuilder, 6593 arg1: Type, 6594 arg2: WritableReg, 6595 arg3: Reg, 6596 arg4: u8, 6597 arg5: Reg, 6598 ) -> Option<Reg> { 6599 let pattern0_0 = arg0; 6600 let pattern1_0 = arg1; 6601 let pattern2_0 = arg2; 6602 let pattern3_0 = arg3; 6603 let pattern4_0 = arg4; 6604 let pattern5_0 = arg5; 6605 // Rule at src/isa/s390x/inst.isle line 2864. 6606 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6607 let expr1_0 = constructor_push_shift( 6608 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6609 )?; 6610 return Some(expr1_0); 6611 } 6612 6613 // Generated as internal constructor for term shiftop_lshl. 6614 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6615 let pattern0_0 = arg0; 6616 if pattern0_0 == I8 { 6617 // Rule at src/isa/s390x/inst.isle line 2871. 6618 let expr0_0 = ShiftOp::LShL32; 6619 return Some(expr0_0); 6620 } 6621 if pattern0_0 == I16 { 6622 // Rule at src/isa/s390x/inst.isle line 2872. 6623 let expr0_0 = ShiftOp::LShL32; 6624 return Some(expr0_0); 6625 } 6626 if pattern0_0 == I32 { 6627 // Rule at src/isa/s390x/inst.isle line 2873. 6628 let expr0_0 = ShiftOp::LShL32; 6629 return Some(expr0_0); 6630 } 6631 if pattern0_0 == I64 { 6632 // Rule at src/isa/s390x/inst.isle line 2874. 6633 let expr0_0 = ShiftOp::LShL64; 6634 return Some(expr0_0); 6635 } 6636 return None; 6637 } 6638 6639 // Generated as internal constructor for term lshl_reg. 6640 pub fn constructor_lshl_reg<C: Context>( 6641 ctx: &mut C, 6642 arg0: Type, 6643 arg1: Reg, 6644 arg2: Reg, 6645 ) -> Option<Reg> { 6646 let pattern0_0 = arg0; 6647 let pattern1_0 = arg1; 6648 let pattern2_0 = arg2; 6649 // Rule at src/isa/s390x/inst.isle line 2877. 6650 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6651 let expr1_0: u8 = 0; 6652 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6653 return Some(expr2_0); 6654 } 6655 6656 // Generated as internal constructor for term lshl_imm. 6657 pub fn constructor_lshl_imm<C: Context>( 6658 ctx: &mut C, 6659 arg0: Type, 6660 arg1: Reg, 6661 arg2: u8, 6662 ) -> Option<Reg> { 6663 let pattern0_0 = arg0; 6664 let pattern1_0 = arg1; 6665 let pattern2_0 = arg2; 6666 // Rule at src/isa/s390x/inst.isle line 2881. 6667 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6668 let expr1_0 = C::zero_reg(ctx); 6669 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6670 return Some(expr2_0); 6671 } 6672 6673 // Generated as internal constructor for term shiftop_lshr. 6674 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6675 let pattern0_0 = arg0; 6676 if pattern0_0 == I32 { 6677 // Rule at src/isa/s390x/inst.isle line 2888. 6678 let expr0_0 = ShiftOp::LShR32; 6679 return Some(expr0_0); 6680 } 6681 if pattern0_0 == I64 { 6682 // Rule at src/isa/s390x/inst.isle line 2889. 6683 let expr0_0 = ShiftOp::LShR64; 6684 return Some(expr0_0); 6685 } 6686 return None; 6687 } 6688 6689 // Generated as internal constructor for term lshr_reg. 6690 pub fn constructor_lshr_reg<C: Context>( 6691 ctx: &mut C, 6692 arg0: Type, 6693 arg1: Reg, 6694 arg2: Reg, 6695 ) -> Option<Reg> { 6696 let pattern0_0 = arg0; 6697 let pattern1_0 = arg1; 6698 let pattern2_0 = arg2; 6699 // Rule at src/isa/s390x/inst.isle line 2892. 6700 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6701 let expr1_0: u8 = 0; 6702 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6703 return Some(expr2_0); 6704 } 6705 6706 // Generated as internal constructor for term lshr_imm. 6707 pub fn constructor_lshr_imm<C: Context>( 6708 ctx: &mut C, 6709 arg0: Type, 6710 arg1: Reg, 6711 arg2: u8, 6712 ) -> Option<Reg> { 6713 let pattern0_0 = arg0; 6714 let pattern1_0 = arg1; 6715 let pattern2_0 = arg2; 6716 // Rule at src/isa/s390x/inst.isle line 2896. 6717 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6718 let expr1_0 = C::zero_reg(ctx); 6719 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6720 return Some(expr2_0); 6721 } 6722 6723 // Generated as internal constructor for term shiftop_ashr. 6724 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6725 let pattern0_0 = arg0; 6726 if pattern0_0 == I32 { 6727 // Rule at src/isa/s390x/inst.isle line 2903. 6728 let expr0_0 = ShiftOp::AShR32; 6729 return Some(expr0_0); 6730 } 6731 if pattern0_0 == I64 { 6732 // Rule at src/isa/s390x/inst.isle line 2904. 6733 let expr0_0 = ShiftOp::AShR64; 6734 return Some(expr0_0); 6735 } 6736 return None; 6737 } 6738 6739 // Generated as internal constructor for term ashr_reg. 6740 pub fn constructor_ashr_reg<C: Context>( 6741 ctx: &mut C, 6742 arg0: Type, 6743 arg1: Reg, 6744 arg2: Reg, 6745 ) -> Option<Reg> { 6746 let pattern0_0 = arg0; 6747 let pattern1_0 = arg1; 6748 let pattern2_0 = arg2; 6749 // Rule at src/isa/s390x/inst.isle line 2907. 6750 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6751 let expr1_0: u8 = 0; 6752 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6753 return Some(expr2_0); 6754 } 6755 6756 // Generated as internal constructor for term ashr_imm. 6757 pub fn constructor_ashr_imm<C: Context>( 6758 ctx: &mut C, 6759 arg0: Type, 6760 arg1: Reg, 6761 arg2: u8, 6762 ) -> Option<Reg> { 6763 let pattern0_0 = arg0; 6764 let pattern1_0 = arg1; 6765 let pattern2_0 = arg2; 6766 // Rule at src/isa/s390x/inst.isle line 2911. 6767 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6768 let expr1_0 = C::zero_reg(ctx); 6769 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6770 return Some(expr2_0); 6771 } 6772 6773 // Generated as internal constructor for term popcnt_byte. 6774 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6775 let pattern0_0 = arg0; 6776 // Rule at src/isa/s390x/inst.isle line 2918. 6777 let expr0_0: Type = I64; 6778 let expr1_0 = UnaryOp::PopcntByte; 6779 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6780 return Some(expr2_0); 6781 } 6782 6783 // Generated as internal constructor for term popcnt_reg. 6784 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6785 let pattern0_0 = arg0; 6786 // Rule at src/isa/s390x/inst.isle line 2921. 6787 let expr0_0: Type = I64; 6788 let expr1_0 = UnaryOp::PopcntReg; 6789 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6790 return Some(expr2_0); 6791 } 6792 6793 // Generated as internal constructor for term atomic_rmw_and. 6794 pub fn constructor_atomic_rmw_and<C: Context>( 6795 ctx: &mut C, 6796 arg0: Type, 6797 arg1: Reg, 6798 arg2: &MemArg, 6799 ) -> Option<Reg> { 6800 let pattern0_0 = arg0; 6801 if pattern0_0 == I32 { 6802 let pattern2_0 = arg1; 6803 let pattern3_0 = arg2; 6804 // Rule at src/isa/s390x/inst.isle line 2927. 6805 let expr0_0: Type = I32; 6806 let expr1_0 = ALUOp::And32; 6807 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6808 return Some(expr2_0); 6809 } 6810 if pattern0_0 == I64 { 6811 let pattern2_0 = arg1; 6812 let pattern3_0 = arg2; 6813 // Rule at src/isa/s390x/inst.isle line 2928. 6814 let expr0_0: Type = I64; 6815 let expr1_0 = ALUOp::And64; 6816 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6817 return Some(expr2_0); 6818 } 6819 return None; 6820 } 6821 6822 // Generated as internal constructor for term atomic_rmw_or. 6823 pub fn constructor_atomic_rmw_or<C: Context>( 6824 ctx: &mut C, 6825 arg0: Type, 6826 arg1: Reg, 6827 arg2: &MemArg, 6828 ) -> Option<Reg> { 6829 let pattern0_0 = arg0; 6830 if pattern0_0 == I32 { 6831 let pattern2_0 = arg1; 6832 let pattern3_0 = arg2; 6833 // Rule at src/isa/s390x/inst.isle line 2931. 6834 let expr0_0: Type = I32; 6835 let expr1_0 = ALUOp::Orr32; 6836 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6837 return Some(expr2_0); 6838 } 6839 if pattern0_0 == I64 { 6840 let pattern2_0 = arg1; 6841 let pattern3_0 = arg2; 6842 // Rule at src/isa/s390x/inst.isle line 2932. 6843 let expr0_0: Type = I64; 6844 let expr1_0 = ALUOp::Orr64; 6845 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6846 return Some(expr2_0); 6847 } 6848 return None; 6849 } 6850 6851 // Generated as internal constructor for term atomic_rmw_xor. 6852 pub fn constructor_atomic_rmw_xor<C: Context>( 6853 ctx: &mut C, 6854 arg0: Type, 6855 arg1: Reg, 6856 arg2: &MemArg, 6857 ) -> Option<Reg> { 6858 let pattern0_0 = arg0; 6859 if pattern0_0 == I32 { 6860 let pattern2_0 = arg1; 6861 let pattern3_0 = arg2; 6862 // Rule at src/isa/s390x/inst.isle line 2935. 6863 let expr0_0: Type = I32; 6864 let expr1_0 = ALUOp::Xor32; 6865 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6866 return Some(expr2_0); 6867 } 6868 if pattern0_0 == I64 { 6869 let pattern2_0 = arg1; 6870 let pattern3_0 = arg2; 6871 // Rule at src/isa/s390x/inst.isle line 2936. 6872 let expr0_0: Type = I64; 6873 let expr1_0 = ALUOp::Xor64; 6874 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6875 return Some(expr2_0); 6876 } 6877 return None; 6878 } 6879 6880 // Generated as internal constructor for term atomic_rmw_add. 6881 pub fn constructor_atomic_rmw_add<C: Context>( 6882 ctx: &mut C, 6883 arg0: Type, 6884 arg1: Reg, 6885 arg2: &MemArg, 6886 ) -> Option<Reg> { 6887 let pattern0_0 = arg0; 6888 if pattern0_0 == I32 { 6889 let pattern2_0 = arg1; 6890 let pattern3_0 = arg2; 6891 // Rule at src/isa/s390x/inst.isle line 2939. 6892 let expr0_0: Type = I32; 6893 let expr1_0 = ALUOp::Add32; 6894 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6895 return Some(expr2_0); 6896 } 6897 if pattern0_0 == I64 { 6898 let pattern2_0 = arg1; 6899 let pattern3_0 = arg2; 6900 // Rule at src/isa/s390x/inst.isle line 2940. 6901 let expr0_0: Type = I64; 6902 let expr1_0 = ALUOp::Add64; 6903 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6904 return Some(expr2_0); 6905 } 6906 return None; 6907 } 6908 6909 // Generated as internal constructor for term atomic_cas_impl. 6910 pub fn constructor_atomic_cas_impl<C: Context>( 6911 ctx: &mut C, 6912 arg0: Type, 6913 arg1: Reg, 6914 arg2: Reg, 6915 arg3: &MemArg, 6916 ) -> Option<Reg> { 6917 let pattern0_0 = arg0; 6918 if pattern0_0 == I32 { 6919 let pattern2_0 = arg1; 6920 let pattern3_0 = arg2; 6921 let pattern4_0 = arg3; 6922 // Rule at src/isa/s390x/inst.isle line 2946. 6923 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6924 return Some(expr0_0); 6925 } 6926 if pattern0_0 == I64 { 6927 let pattern2_0 = arg1; 6928 let pattern3_0 = arg2; 6929 let pattern4_0 = arg3; 6930 // Rule at src/isa/s390x/inst.isle line 2947. 6931 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6932 return Some(expr0_0); 6933 } 6934 return None; 6935 } 6936 6937 // Generated as internal constructor for term push_atomic_cas. 6938 pub fn constructor_push_atomic_cas<C: Context>( 6939 ctx: &mut C, 6940 arg0: &VecMInstBuilder, 6941 arg1: Type, 6942 arg2: WritableReg, 6943 arg3: Reg, 6944 arg4: &MemArg, 6945 ) -> Option<Reg> { 6946 let pattern0_0 = arg0; 6947 let pattern1_0 = arg1; 6948 if pattern1_0 == I32 { 6949 let pattern3_0 = arg2; 6950 let pattern4_0 = arg3; 6951 let pattern5_0 = arg4; 6952 // Rule at src/isa/s390x/inst.isle line 2950. 6953 let expr0_0 = 6954 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6955 return Some(expr0_0); 6956 } 6957 if pattern1_0 == I64 { 6958 let pattern3_0 = arg2; 6959 let pattern4_0 = arg3; 6960 let pattern5_0 = arg4; 6961 // Rule at src/isa/s390x/inst.isle line 2951. 6962 let expr0_0 = 6963 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6964 return Some(expr0_0); 6965 } 6966 return None; 6967 } 6968 6969 // Generated as internal constructor for term fpuop2_add. 6970 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6971 let pattern0_0 = arg0; 6972 if pattern0_0 == F32 { 6973 // Rule at src/isa/s390x/inst.isle line 2957. 6974 let expr0_0 = FPUOp2::Add32; 6975 return Some(expr0_0); 6976 } 6977 if pattern0_0 == F64 { 6978 // Rule at src/isa/s390x/inst.isle line 2958. 6979 let expr0_0 = FPUOp2::Add64; 6980 return Some(expr0_0); 6981 } 6982 return None; 6983 } 6984 6985 // Generated as internal constructor for term fadd_reg. 6986 pub fn constructor_fadd_reg<C: Context>( 6987 ctx: &mut C, 6988 arg0: Type, 6989 arg1: Reg, 6990 arg2: Reg, 6991 ) -> Option<Reg> { 6992 let pattern0_0 = arg0; 6993 let pattern1_0 = arg1; 6994 let pattern2_0 = arg2; 6995 // Rule at src/isa/s390x/inst.isle line 2961. 6996 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6997 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6998 return Some(expr1_0); 6999 } 7000 7001 // Generated as internal constructor for term fpuop2_sub. 7002 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7003 let pattern0_0 = arg0; 7004 if pattern0_0 == F32 { 7005 // Rule at src/isa/s390x/inst.isle line 2967. 7006 let expr0_0 = FPUOp2::Sub32; 7007 return Some(expr0_0); 7008 } 7009 if pattern0_0 == F64 { 7010 // Rule at src/isa/s390x/inst.isle line 2968. 7011 let expr0_0 = FPUOp2::Sub64; 7012 return Some(expr0_0); 7013 } 7014 return None; 7015 } 7016 7017 // Generated as internal constructor for term fsub_reg. 7018 pub fn constructor_fsub_reg<C: Context>( 7019 ctx: &mut C, 7020 arg0: Type, 7021 arg1: Reg, 7022 arg2: Reg, 7023 ) -> Option<Reg> { 7024 let pattern0_0 = arg0; 7025 let pattern1_0 = arg1; 7026 let pattern2_0 = arg2; 7027 // Rule at src/isa/s390x/inst.isle line 2971. 7028 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7029 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7030 return Some(expr1_0); 7031 } 7032 7033 // Generated as internal constructor for term fpuop2_mul. 7034 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7035 let pattern0_0 = arg0; 7036 if pattern0_0 == F32 { 7037 // Rule at src/isa/s390x/inst.isle line 2977. 7038 let expr0_0 = FPUOp2::Mul32; 7039 return Some(expr0_0); 7040 } 7041 if pattern0_0 == F64 { 7042 // Rule at src/isa/s390x/inst.isle line 2978. 7043 let expr0_0 = FPUOp2::Mul64; 7044 return Some(expr0_0); 7045 } 7046 return None; 7047 } 7048 7049 // Generated as internal constructor for term fmul_reg. 7050 pub fn constructor_fmul_reg<C: Context>( 7051 ctx: &mut C, 7052 arg0: Type, 7053 arg1: Reg, 7054 arg2: Reg, 7055 ) -> Option<Reg> { 7056 let pattern0_0 = arg0; 7057 let pattern1_0 = arg1; 7058 let pattern2_0 = arg2; 7059 // Rule at src/isa/s390x/inst.isle line 2981. 7060 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7061 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7062 return Some(expr1_0); 7063 } 7064 7065 // Generated as internal constructor for term fpuop2_div. 7066 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7067 let pattern0_0 = arg0; 7068 if pattern0_0 == F32 { 7069 // Rule at src/isa/s390x/inst.isle line 2987. 7070 let expr0_0 = FPUOp2::Div32; 7071 return Some(expr0_0); 7072 } 7073 if pattern0_0 == F64 { 7074 // Rule at src/isa/s390x/inst.isle line 2988. 7075 let expr0_0 = FPUOp2::Div64; 7076 return Some(expr0_0); 7077 } 7078 return None; 7079 } 7080 7081 // Generated as internal constructor for term fdiv_reg. 7082 pub fn constructor_fdiv_reg<C: Context>( 7083 ctx: &mut C, 7084 arg0: Type, 7085 arg1: Reg, 7086 arg2: Reg, 7087 ) -> Option<Reg> { 7088 let pattern0_0 = arg0; 7089 let pattern1_0 = arg1; 7090 let pattern2_0 = arg2; 7091 // Rule at src/isa/s390x/inst.isle line 2991. 7092 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7093 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7094 return Some(expr1_0); 7095 } 7096 7097 // Generated as internal constructor for term fpuop2_min. 7098 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7099 let pattern0_0 = arg0; 7100 if pattern0_0 == F32 { 7101 // Rule at src/isa/s390x/inst.isle line 2997. 7102 let expr0_0 = FPUOp2::Min32; 7103 return Some(expr0_0); 7104 } 7105 if pattern0_0 == F64 { 7106 // Rule at src/isa/s390x/inst.isle line 2998. 7107 let expr0_0 = FPUOp2::Min64; 7108 return Some(expr0_0); 7109 } 7110 return None; 7111 } 7112 7113 // Generated as internal constructor for term fmin_reg. 7114 pub fn constructor_fmin_reg<C: Context>( 7115 ctx: &mut C, 7116 arg0: Type, 7117 arg1: Reg, 7118 arg2: Reg, 7119 ) -> Option<Reg> { 7120 let pattern0_0 = arg0; 7121 let pattern1_0 = arg1; 7122 let pattern2_0 = arg2; 7123 // Rule at src/isa/s390x/inst.isle line 3001. 7124 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7125 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7126 return Some(expr1_0); 7127 } 7128 7129 // Generated as internal constructor for term fpuop2_max. 7130 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7131 let pattern0_0 = arg0; 7132 if pattern0_0 == F32 { 7133 // Rule at src/isa/s390x/inst.isle line 3007. 7134 let expr0_0 = FPUOp2::Max32; 7135 return Some(expr0_0); 7136 } 7137 if pattern0_0 == F64 { 7138 // Rule at src/isa/s390x/inst.isle line 3008. 7139 let expr0_0 = FPUOp2::Max64; 7140 return Some(expr0_0); 7141 } 7142 return None; 7143 } 7144 7145 // Generated as internal constructor for term fmax_reg. 7146 pub fn constructor_fmax_reg<C: Context>( 7147 ctx: &mut C, 7148 arg0: Type, 7149 arg1: Reg, 7150 arg2: Reg, 7151 ) -> Option<Reg> { 7152 let pattern0_0 = arg0; 7153 let pattern1_0 = arg1; 7154 let pattern2_0 = arg2; 7155 // Rule at src/isa/s390x/inst.isle line 3011. 7156 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7157 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7158 return Some(expr1_0); 7159 } 7160 7161 // Generated as internal constructor for term fpuop3_fma. 7162 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7163 let pattern0_0 = arg0; 7164 if pattern0_0 == F32 { 7165 // Rule at src/isa/s390x/inst.isle line 3017. 7166 let expr0_0 = FPUOp3::MAdd32; 7167 return Some(expr0_0); 7168 } 7169 if pattern0_0 == F64 { 7170 // Rule at src/isa/s390x/inst.isle line 3018. 7171 let expr0_0 = FPUOp3::MAdd64; 7172 return Some(expr0_0); 7173 } 7174 return None; 7175 } 7176 7177 // Generated as internal constructor for term fma_reg. 7178 pub fn constructor_fma_reg<C: Context>( 7179 ctx: &mut C, 7180 arg0: Type, 7181 arg1: Reg, 7182 arg2: Reg, 7183 arg3: Reg, 7184 ) -> Option<Reg> { 7185 let pattern0_0 = arg0; 7186 let pattern1_0 = arg1; 7187 let pattern2_0 = arg2; 7188 let pattern3_0 = arg3; 7189 // Rule at src/isa/s390x/inst.isle line 3021. 7190 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7191 let expr1_0 = constructor_fpu_rrrr( 7192 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7193 )?; 7194 return Some(expr1_0); 7195 } 7196 7197 // Generated as internal constructor for term fpuop1_sqrt. 7198 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7199 let pattern0_0 = arg0; 7200 if pattern0_0 == F32 { 7201 // Rule at src/isa/s390x/inst.isle line 3027. 7202 let expr0_0 = FPUOp1::Sqrt32; 7203 return Some(expr0_0); 7204 } 7205 if pattern0_0 == F64 { 7206 // Rule at src/isa/s390x/inst.isle line 3028. 7207 let expr0_0 = FPUOp1::Sqrt64; 7208 return Some(expr0_0); 7209 } 7210 return None; 7211 } 7212 7213 // Generated as internal constructor for term sqrt_reg. 7214 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7215 let pattern0_0 = arg0; 7216 let pattern1_0 = arg1; 7217 // Rule at src/isa/s390x/inst.isle line 3031. 7218 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7219 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7220 return Some(expr1_0); 7221 } 7222 7223 // Generated as internal constructor for term fpuop1_neg. 7224 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7225 let pattern0_0 = arg0; 7226 if pattern0_0 == F32 { 7227 // Rule at src/isa/s390x/inst.isle line 3037. 7228 let expr0_0 = FPUOp1::Neg32; 7229 return Some(expr0_0); 7230 } 7231 if pattern0_0 == F64 { 7232 // Rule at src/isa/s390x/inst.isle line 3038. 7233 let expr0_0 = FPUOp1::Neg64; 7234 return Some(expr0_0); 7235 } 7236 return None; 7237 } 7238 7239 // Generated as internal constructor for term fneg_reg. 7240 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7241 let pattern0_0 = arg0; 7242 let pattern1_0 = arg1; 7243 // Rule at src/isa/s390x/inst.isle line 3041. 7244 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7245 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7246 return Some(expr1_0); 7247 } 7248 7249 // Generated as internal constructor for term fpuop1_abs. 7250 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7251 let pattern0_0 = arg0; 7252 if pattern0_0 == F32 { 7253 // Rule at src/isa/s390x/inst.isle line 3047. 7254 let expr0_0 = FPUOp1::Abs32; 7255 return Some(expr0_0); 7256 } 7257 if pattern0_0 == F64 { 7258 // Rule at src/isa/s390x/inst.isle line 3048. 7259 let expr0_0 = FPUOp1::Abs64; 7260 return Some(expr0_0); 7261 } 7262 return None; 7263 } 7264 7265 // Generated as internal constructor for term fabs_reg. 7266 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7267 let pattern0_0 = arg0; 7268 let pattern1_0 = arg1; 7269 // Rule at src/isa/s390x/inst.isle line 3051. 7270 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7271 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7272 return Some(expr1_0); 7273 } 7274 7275 // Generated as internal constructor for term fpuroundmode_ceil. 7276 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7277 let pattern0_0 = arg0; 7278 if pattern0_0 == F32 { 7279 // Rule at src/isa/s390x/inst.isle line 3057. 7280 let expr0_0 = FpuRoundMode::Plus32; 7281 return Some(expr0_0); 7282 } 7283 if pattern0_0 == F64 { 7284 // Rule at src/isa/s390x/inst.isle line 3058. 7285 let expr0_0 = FpuRoundMode::Plus64; 7286 return Some(expr0_0); 7287 } 7288 return None; 7289 } 7290 7291 // Generated as internal constructor for term ceil_reg. 7292 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7293 let pattern0_0 = arg0; 7294 let pattern1_0 = arg1; 7295 // Rule at src/isa/s390x/inst.isle line 3061. 7296 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7297 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7298 return Some(expr1_0); 7299 } 7300 7301 // Generated as internal constructor for term fpuroundmode_floor. 7302 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7303 let pattern0_0 = arg0; 7304 if pattern0_0 == F32 { 7305 // Rule at src/isa/s390x/inst.isle line 3067. 7306 let expr0_0 = FpuRoundMode::Minus32; 7307 return Some(expr0_0); 7308 } 7309 if pattern0_0 == F64 { 7310 // Rule at src/isa/s390x/inst.isle line 3068. 7311 let expr0_0 = FpuRoundMode::Minus64; 7312 return Some(expr0_0); 7313 } 7314 return None; 7315 } 7316 7317 // Generated as internal constructor for term floor_reg. 7318 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7319 let pattern0_0 = arg0; 7320 let pattern1_0 = arg1; 7321 // Rule at src/isa/s390x/inst.isle line 3071. 7322 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7323 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7324 return Some(expr1_0); 7325 } 7326 7327 // Generated as internal constructor for term fpuroundmode_trunc. 7328 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7329 let pattern0_0 = arg0; 7330 if pattern0_0 == F32 { 7331 // Rule at src/isa/s390x/inst.isle line 3077. 7332 let expr0_0 = FpuRoundMode::Zero32; 7333 return Some(expr0_0); 7334 } 7335 if pattern0_0 == F64 { 7336 // Rule at src/isa/s390x/inst.isle line 3078. 7337 let expr0_0 = FpuRoundMode::Zero64; 7338 return Some(expr0_0); 7339 } 7340 return None; 7341 } 7342 7343 // Generated as internal constructor for term trunc_reg. 7344 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7345 let pattern0_0 = arg0; 7346 let pattern1_0 = arg1; 7347 // Rule at src/isa/s390x/inst.isle line 3081. 7348 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7349 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7350 return Some(expr1_0); 7351 } 7352 7353 // Generated as internal constructor for term fpuroundmode_nearest. 7354 pub fn constructor_fpuroundmode_nearest<C: Context>( 7355 ctx: &mut C, 7356 arg0: Type, 7357 ) -> Option<FpuRoundMode> { 7358 let pattern0_0 = arg0; 7359 if pattern0_0 == F32 { 7360 // Rule at src/isa/s390x/inst.isle line 3087. 7361 let expr0_0 = FpuRoundMode::Nearest32; 7362 return Some(expr0_0); 7363 } 7364 if pattern0_0 == F64 { 7365 // Rule at src/isa/s390x/inst.isle line 3088. 7366 let expr0_0 = FpuRoundMode::Nearest64; 7367 return Some(expr0_0); 7368 } 7369 return None; 7370 } 7371 7372 // Generated as internal constructor for term nearest_reg. 7373 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7374 let pattern0_0 = arg0; 7375 let pattern1_0 = arg1; 7376 // Rule at src/isa/s390x/inst.isle line 3091. 7377 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7378 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7379 return Some(expr1_0); 7380 } 7381 7382 // Generated as internal constructor for term fpuop1_promote. 7383 pub fn constructor_fpuop1_promote<C: Context>( 7384 ctx: &mut C, 7385 arg0: Type, 7386 arg1: Type, 7387 ) -> Option<FPUOp1> { 7388 let pattern0_0 = arg0; 7389 if pattern0_0 == F64 { 7390 let pattern2_0 = arg1; 7391 if pattern2_0 == F32 { 7392 // Rule at src/isa/s390x/inst.isle line 3097. 7393 let expr0_0 = FPUOp1::Cvt32To64; 7394 return Some(expr0_0); 7395 } 7396 } 7397 return None; 7398 } 7399 7400 // Generated as internal constructor for term fpromote_reg. 7401 pub fn constructor_fpromote_reg<C: Context>( 7402 ctx: &mut C, 7403 arg0: Type, 7404 arg1: Type, 7405 arg2: Reg, 7406 ) -> Option<Reg> { 7407 let pattern0_0 = arg0; 7408 let pattern1_0 = arg1; 7409 let pattern2_0 = arg2; 7410 // Rule at src/isa/s390x/inst.isle line 3100. 7411 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7412 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7413 return Some(expr1_0); 7414 } 7415 7416 // Generated as internal constructor for term fpuop1_demote. 7417 pub fn constructor_fpuop1_demote<C: Context>( 7418 ctx: &mut C, 7419 arg0: Type, 7420 arg1: Type, 7421 ) -> Option<FPUOp1> { 7422 let pattern0_0 = arg0; 7423 if pattern0_0 == F32 { 7424 let pattern2_0 = arg1; 7425 if pattern2_0 == F64 { 7426 // Rule at src/isa/s390x/inst.isle line 3107. 7427 let expr0_0 = FPUOp1::Cvt64To32; 7428 return Some(expr0_0); 7429 } 7430 } 7431 return None; 7432 } 7433 7434 // Generated as internal constructor for term fdemote_reg. 7435 pub fn constructor_fdemote_reg<C: Context>( 7436 ctx: &mut C, 7437 arg0: Type, 7438 arg1: Type, 7439 arg2: Reg, 7440 ) -> Option<Reg> { 7441 let pattern0_0 = arg0; 7442 let pattern1_0 = arg1; 7443 let pattern2_0 = arg2; 7444 // Rule at src/isa/s390x/inst.isle line 3110. 7445 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7446 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7447 return Some(expr1_0); 7448 } 7449 7450 // Generated as internal constructor for term uint_to_fpu_op. 7451 pub fn constructor_uint_to_fpu_op<C: Context>( 7452 ctx: &mut C, 7453 arg0: Type, 7454 arg1: Type, 7455 ) -> Option<IntToFpuOp> { 7456 let pattern0_0 = arg0; 7457 if pattern0_0 == F32 { 7458 let pattern2_0 = arg1; 7459 if pattern2_0 == I32 { 7460 // Rule at src/isa/s390x/inst.isle line 3117. 7461 let expr0_0 = IntToFpuOp::U32ToF32; 7462 return Some(expr0_0); 7463 } 7464 if pattern2_0 == I64 { 7465 // Rule at src/isa/s390x/inst.isle line 3119. 7466 let expr0_0 = IntToFpuOp::U64ToF32; 7467 return Some(expr0_0); 7468 } 7469 } 7470 if pattern0_0 == F64 { 7471 let pattern2_0 = arg1; 7472 if pattern2_0 == I32 { 7473 // Rule at src/isa/s390x/inst.isle line 3118. 7474 let expr0_0 = IntToFpuOp::U32ToF64; 7475 return Some(expr0_0); 7476 } 7477 if pattern2_0 == I64 { 7478 // Rule at src/isa/s390x/inst.isle line 3120. 7479 let expr0_0 = IntToFpuOp::U64ToF64; 7480 return Some(expr0_0); 7481 } 7482 } 7483 return None; 7484 } 7485 7486 // Generated as internal constructor for term fcvt_from_uint_reg. 7487 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7488 ctx: &mut C, 7489 arg0: Type, 7490 arg1: Type, 7491 arg2: Reg, 7492 ) -> Option<Reg> { 7493 let pattern0_0 = arg0; 7494 let pattern1_0 = arg1; 7495 let pattern2_0 = arg2; 7496 // Rule at src/isa/s390x/inst.isle line 3123. 7497 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7498 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7499 return Some(expr1_0); 7500 } 7501 7502 // Generated as internal constructor for term sint_to_fpu_op. 7503 pub fn constructor_sint_to_fpu_op<C: Context>( 7504 ctx: &mut C, 7505 arg0: Type, 7506 arg1: Type, 7507 ) -> Option<IntToFpuOp> { 7508 let pattern0_0 = arg0; 7509 if pattern0_0 == F32 { 7510 let pattern2_0 = arg1; 7511 if pattern2_0 == I32 { 7512 // Rule at src/isa/s390x/inst.isle line 3130. 7513 let expr0_0 = IntToFpuOp::I32ToF32; 7514 return Some(expr0_0); 7515 } 7516 if pattern2_0 == I64 { 7517 // Rule at src/isa/s390x/inst.isle line 3132. 7518 let expr0_0 = IntToFpuOp::I64ToF32; 7519 return Some(expr0_0); 7520 } 7521 } 7522 if pattern0_0 == F64 { 7523 let pattern2_0 = arg1; 7524 if pattern2_0 == I32 { 7525 // Rule at src/isa/s390x/inst.isle line 3131. 7526 let expr0_0 = IntToFpuOp::I32ToF64; 7527 return Some(expr0_0); 7528 } 7529 if pattern2_0 == I64 { 7530 // Rule at src/isa/s390x/inst.isle line 3133. 7531 let expr0_0 = IntToFpuOp::I64ToF64; 7532 return Some(expr0_0); 7533 } 7534 } 7535 return None; 7536 } 7537 7538 // Generated as internal constructor for term fcvt_from_sint_reg. 7539 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7540 ctx: &mut C, 7541 arg0: Type, 7542 arg1: Type, 7543 arg2: Reg, 7544 ) -> Option<Reg> { 7545 let pattern0_0 = arg0; 7546 let pattern1_0 = arg1; 7547 let pattern2_0 = arg2; 7548 // Rule at src/isa/s390x/inst.isle line 3136. 7549 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7550 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7551 return Some(expr1_0); 7552 } 7553 7554 // Generated as internal constructor for term fpu_to_uint_op. 7555 pub fn constructor_fpu_to_uint_op<C: Context>( 7556 ctx: &mut C, 7557 arg0: Type, 7558 arg1: Type, 7559 ) -> Option<FpuToIntOp> { 7560 let pattern0_0 = arg0; 7561 if pattern0_0 == I32 { 7562 let pattern2_0 = arg1; 7563 if pattern2_0 == F32 { 7564 // Rule at src/isa/s390x/inst.isle line 3143. 7565 let expr0_0 = FpuToIntOp::F32ToU32; 7566 return Some(expr0_0); 7567 } 7568 if pattern2_0 == F64 { 7569 // Rule at src/isa/s390x/inst.isle line 3144. 7570 let expr0_0 = FpuToIntOp::F64ToU32; 7571 return Some(expr0_0); 7572 } 7573 } 7574 if pattern0_0 == I64 { 7575 let pattern2_0 = arg1; 7576 if pattern2_0 == F32 { 7577 // Rule at src/isa/s390x/inst.isle line 3145. 7578 let expr0_0 = FpuToIntOp::F32ToU64; 7579 return Some(expr0_0); 7580 } 7581 if pattern2_0 == F64 { 7582 // Rule at src/isa/s390x/inst.isle line 3146. 7583 let expr0_0 = FpuToIntOp::F64ToU64; 7584 return Some(expr0_0); 7585 } 7586 } 7587 return None; 7588 } 7589 7590 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7591 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7592 ctx: &mut C, 7593 arg0: Type, 7594 arg1: Type, 7595 arg2: Reg, 7596 ) -> Option<ProducesFlags> { 7597 let pattern0_0 = arg0; 7598 let pattern1_0 = arg1; 7599 let pattern2_0 = arg2; 7600 // Rule at src/isa/s390x/inst.isle line 3149. 7601 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7602 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7603 return Some(expr1_0); 7604 } 7605 7606 // Generated as internal constructor for term fcvt_to_uint_reg. 7607 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7608 ctx: &mut C, 7609 arg0: Type, 7610 arg1: Type, 7611 arg2: Reg, 7612 ) -> Option<Reg> { 7613 let pattern0_0 = arg0; 7614 let pattern1_0 = arg1; 7615 let pattern2_0 = arg2; 7616 // Rule at src/isa/s390x/inst.isle line 3153. 7617 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7618 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7619 return Some(expr1_0); 7620 } 7621 7622 // Generated as internal constructor for term fpu_to_sint_op. 7623 pub fn constructor_fpu_to_sint_op<C: Context>( 7624 ctx: &mut C, 7625 arg0: Type, 7626 arg1: Type, 7627 ) -> Option<FpuToIntOp> { 7628 let pattern0_0 = arg0; 7629 if pattern0_0 == I32 { 7630 let pattern2_0 = arg1; 7631 if pattern2_0 == F32 { 7632 // Rule at src/isa/s390x/inst.isle line 3160. 7633 let expr0_0 = FpuToIntOp::F32ToI32; 7634 return Some(expr0_0); 7635 } 7636 if pattern2_0 == F64 { 7637 // Rule at src/isa/s390x/inst.isle line 3161. 7638 let expr0_0 = FpuToIntOp::F64ToI32; 7639 return Some(expr0_0); 7640 } 7641 } 7642 if pattern0_0 == I64 { 7643 let pattern2_0 = arg1; 7644 if pattern2_0 == F32 { 7645 // Rule at src/isa/s390x/inst.isle line 3162. 7646 let expr0_0 = FpuToIntOp::F32ToI64; 7647 return Some(expr0_0); 7648 } 7649 if pattern2_0 == F64 { 7650 // Rule at src/isa/s390x/inst.isle line 3163. 7651 let expr0_0 = FpuToIntOp::F64ToI64; 7652 return Some(expr0_0); 7653 } 7654 } 7655 return None; 7656 } 7657 7658 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7659 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7660 ctx: &mut C, 7661 arg0: Type, 7662 arg1: Type, 7663 arg2: Reg, 7664 ) -> Option<ProducesFlags> { 7665 let pattern0_0 = arg0; 7666 let pattern1_0 = arg1; 7667 let pattern2_0 = arg2; 7668 // Rule at src/isa/s390x/inst.isle line 3166. 7669 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7670 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7671 return Some(expr1_0); 7672 } 7673 7674 // Generated as internal constructor for term fcvt_to_sint_reg. 7675 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7676 ctx: &mut C, 7677 arg0: Type, 7678 arg1: Type, 7679 arg2: Reg, 7680 ) -> Option<Reg> { 7681 let pattern0_0 = arg0; 7682 let pattern1_0 = arg1; 7683 let pattern2_0 = arg2; 7684 // Rule at src/isa/s390x/inst.isle line 3170. 7685 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7686 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7687 return Some(expr1_0); 7688 } 7689 7690 // Generated as internal constructor for term cmpop_cmps. 7691 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7692 let pattern0_0 = arg0; 7693 if pattern0_0 == I32 { 7694 // Rule at src/isa/s390x/inst.isle line 3177. 7695 let expr0_0 = CmpOp::CmpS32; 7696 return Some(expr0_0); 7697 } 7698 if pattern0_0 == I64 { 7699 // Rule at src/isa/s390x/inst.isle line 3178. 7700 let expr0_0 = CmpOp::CmpS64; 7701 return Some(expr0_0); 7702 } 7703 return None; 7704 } 7705 7706 // Generated as internal constructor for term cmpop_cmps_sext16. 7707 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7708 let pattern0_0 = arg0; 7709 if pattern0_0 == I32 { 7710 // Rule at src/isa/s390x/inst.isle line 3181. 7711 let expr0_0 = CmpOp::CmpS32Ext16; 7712 return Some(expr0_0); 7713 } 7714 if pattern0_0 == I64 { 7715 // Rule at src/isa/s390x/inst.isle line 3182. 7716 let expr0_0 = CmpOp::CmpS64Ext16; 7717 return Some(expr0_0); 7718 } 7719 return None; 7720 } 7721 7722 // Generated as internal constructor for term cmpop_cmps_sext32. 7723 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7724 let pattern0_0 = arg0; 7725 if pattern0_0 == I64 { 7726 // Rule at src/isa/s390x/inst.isle line 3185. 7727 let expr0_0 = CmpOp::CmpS64Ext32; 7728 return Some(expr0_0); 7729 } 7730 return None; 7731 } 7732 7733 // Generated as internal constructor for term icmps_reg. 7734 pub fn constructor_icmps_reg<C: Context>( 7735 ctx: &mut C, 7736 arg0: Type, 7737 arg1: Reg, 7738 arg2: Reg, 7739 ) -> Option<ProducesFlags> { 7740 let pattern0_0 = arg0; 7741 let pattern1_0 = arg1; 7742 let pattern2_0 = arg2; 7743 // Rule at src/isa/s390x/inst.isle line 3188. 7744 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7745 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7746 return Some(expr1_0); 7747 } 7748 7749 // Generated as internal constructor for term icmps_reg_sext32. 7750 pub fn constructor_icmps_reg_sext32<C: Context>( 7751 ctx: &mut C, 7752 arg0: Type, 7753 arg1: Reg, 7754 arg2: Reg, 7755 ) -> Option<ProducesFlags> { 7756 let pattern0_0 = arg0; 7757 let pattern1_0 = arg1; 7758 let pattern2_0 = arg2; 7759 // Rule at src/isa/s390x/inst.isle line 3191. 7760 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7761 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7762 return Some(expr1_0); 7763 } 7764 7765 // Generated as internal constructor for term icmps_simm16. 7766 pub fn constructor_icmps_simm16<C: Context>( 7767 ctx: &mut C, 7768 arg0: Type, 7769 arg1: Reg, 7770 arg2: i16, 7771 ) -> Option<ProducesFlags> { 7772 let pattern0_0 = arg0; 7773 let pattern1_0 = arg1; 7774 let pattern2_0 = arg2; 7775 // Rule at src/isa/s390x/inst.isle line 3194. 7776 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7777 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7778 return Some(expr1_0); 7779 } 7780 7781 // Generated as internal constructor for term icmps_simm32. 7782 pub fn constructor_icmps_simm32<C: Context>( 7783 ctx: &mut C, 7784 arg0: Type, 7785 arg1: Reg, 7786 arg2: i32, 7787 ) -> Option<ProducesFlags> { 7788 let pattern0_0 = arg0; 7789 let pattern1_0 = arg1; 7790 let pattern2_0 = arg2; 7791 // Rule at src/isa/s390x/inst.isle line 3197. 7792 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7793 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7794 return Some(expr1_0); 7795 } 7796 7797 // Generated as internal constructor for term icmps_mem. 7798 pub fn constructor_icmps_mem<C: Context>( 7799 ctx: &mut C, 7800 arg0: Type, 7801 arg1: Reg, 7802 arg2: &MemArg, 7803 ) -> Option<ProducesFlags> { 7804 let pattern0_0 = arg0; 7805 let pattern1_0 = arg1; 7806 let pattern2_0 = arg2; 7807 // Rule at src/isa/s390x/inst.isle line 3200. 7808 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7809 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7810 return Some(expr1_0); 7811 } 7812 7813 // Generated as internal constructor for term icmps_mem_sext16. 7814 pub fn constructor_icmps_mem_sext16<C: Context>( 7815 ctx: &mut C, 7816 arg0: Type, 7817 arg1: Reg, 7818 arg2: &MemArg, 7819 ) -> Option<ProducesFlags> { 7820 let pattern0_0 = arg0; 7821 let pattern1_0 = arg1; 7822 let pattern2_0 = arg2; 7823 // Rule at src/isa/s390x/inst.isle line 3203. 7824 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7825 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7826 return Some(expr1_0); 7827 } 7828 7829 // Generated as internal constructor for term icmps_mem_sext32. 7830 pub fn constructor_icmps_mem_sext32<C: Context>( 7831 ctx: &mut C, 7832 arg0: Type, 7833 arg1: Reg, 7834 arg2: &MemArg, 7835 ) -> Option<ProducesFlags> { 7836 let pattern0_0 = arg0; 7837 let pattern1_0 = arg1; 7838 let pattern2_0 = arg2; 7839 // Rule at src/isa/s390x/inst.isle line 3206. 7840 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7841 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7842 return Some(expr1_0); 7843 } 7844 7845 // Generated as internal constructor for term cmpop_cmpu. 7846 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7847 let pattern0_0 = arg0; 7848 if pattern0_0 == I32 { 7849 // Rule at src/isa/s390x/inst.isle line 3212. 7850 let expr0_0 = CmpOp::CmpL32; 7851 return Some(expr0_0); 7852 } 7853 if pattern0_0 == I64 { 7854 // Rule at src/isa/s390x/inst.isle line 3213. 7855 let expr0_0 = CmpOp::CmpL64; 7856 return Some(expr0_0); 7857 } 7858 return None; 7859 } 7860 7861 // Generated as internal constructor for term cmpop_cmpu_zext16. 7862 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7863 let pattern0_0 = arg0; 7864 if pattern0_0 == I32 { 7865 // Rule at src/isa/s390x/inst.isle line 3216. 7866 let expr0_0 = CmpOp::CmpL32Ext16; 7867 return Some(expr0_0); 7868 } 7869 if pattern0_0 == I64 { 7870 // Rule at src/isa/s390x/inst.isle line 3217. 7871 let expr0_0 = CmpOp::CmpL64Ext16; 7872 return Some(expr0_0); 7873 } 7874 return None; 7875 } 7876 7877 // Generated as internal constructor for term cmpop_cmpu_zext32. 7878 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7879 let pattern0_0 = arg0; 7880 if pattern0_0 == I64 { 7881 // Rule at src/isa/s390x/inst.isle line 3220. 7882 let expr0_0 = CmpOp::CmpL64Ext32; 7883 return Some(expr0_0); 7884 } 7885 return None; 7886 } 7887 7888 // Generated as internal constructor for term icmpu_reg. 7889 pub fn constructor_icmpu_reg<C: Context>( 7890 ctx: &mut C, 7891 arg0: Type, 7892 arg1: Reg, 7893 arg2: Reg, 7894 ) -> Option<ProducesFlags> { 7895 let pattern0_0 = arg0; 7896 let pattern1_0 = arg1; 7897 let pattern2_0 = arg2; 7898 // Rule at src/isa/s390x/inst.isle line 3223. 7899 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7900 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7901 return Some(expr1_0); 7902 } 7903 7904 // Generated as internal constructor for term icmpu_reg_zext32. 7905 pub fn constructor_icmpu_reg_zext32<C: Context>( 7906 ctx: &mut C, 7907 arg0: Type, 7908 arg1: Reg, 7909 arg2: Reg, 7910 ) -> Option<ProducesFlags> { 7911 let pattern0_0 = arg0; 7912 let pattern1_0 = arg1; 7913 let pattern2_0 = arg2; 7914 // Rule at src/isa/s390x/inst.isle line 3226. 7915 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7916 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7917 return Some(expr1_0); 7918 } 7919 7920 // Generated as internal constructor for term icmpu_uimm32. 7921 pub fn constructor_icmpu_uimm32<C: Context>( 7922 ctx: &mut C, 7923 arg0: Type, 7924 arg1: Reg, 7925 arg2: u32, 7926 ) -> Option<ProducesFlags> { 7927 let pattern0_0 = arg0; 7928 let pattern1_0 = arg1; 7929 let pattern2_0 = arg2; 7930 // Rule at src/isa/s390x/inst.isle line 3229. 7931 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7932 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7933 return Some(expr1_0); 7934 } 7935 7936 // Generated as internal constructor for term icmpu_mem. 7937 pub fn constructor_icmpu_mem<C: Context>( 7938 ctx: &mut C, 7939 arg0: Type, 7940 arg1: Reg, 7941 arg2: &MemArg, 7942 ) -> Option<ProducesFlags> { 7943 let pattern0_0 = arg0; 7944 let pattern1_0 = arg1; 7945 let pattern2_0 = arg2; 7946 // Rule at src/isa/s390x/inst.isle line 3232. 7947 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7948 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7949 return Some(expr1_0); 7950 } 7951 7952 // Generated as internal constructor for term icmpu_mem_zext16. 7953 pub fn constructor_icmpu_mem_zext16<C: Context>( 7954 ctx: &mut C, 7955 arg0: Type, 7956 arg1: Reg, 7957 arg2: &MemArg, 7958 ) -> Option<ProducesFlags> { 7959 let pattern0_0 = arg0; 7960 let pattern1_0 = arg1; 7961 let pattern2_0 = arg2; 7962 // Rule at src/isa/s390x/inst.isle line 3235. 7963 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7964 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7965 return Some(expr1_0); 7966 } 7967 7968 // Generated as internal constructor for term icmpu_mem_zext32. 7969 pub fn constructor_icmpu_mem_zext32<C: Context>( 7970 ctx: &mut C, 7971 arg0: Type, 7972 arg1: Reg, 7973 arg2: &MemArg, 7974 ) -> Option<ProducesFlags> { 7975 let pattern0_0 = arg0; 7976 let pattern1_0 = arg1; 7977 let pattern2_0 = arg2; 7978 // Rule at src/isa/s390x/inst.isle line 3238. 7979 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7980 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7981 return Some(expr1_0); 7982 } 7983 7984 // Generated as internal constructor for term fcmp_reg. 7985 pub fn constructor_fcmp_reg<C: Context>( 7986 ctx: &mut C, 7987 arg0: Type, 7988 arg1: Reg, 7989 arg2: Reg, 7990 ) -> Option<ProducesFlags> { 7991 let pattern0_0 = arg0; 7992 if pattern0_0 == F32 { 7993 let pattern2_0 = arg1; 7994 let pattern3_0 = arg2; 7995 // Rule at src/isa/s390x/inst.isle line 3244. 7996 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7997 return Some(expr0_0); 7998 } 7999 if pattern0_0 == F64 { 8000 let pattern2_0 = arg1; 8001 let pattern3_0 = arg2; 8002 // Rule at src/isa/s390x/inst.isle line 3245. 8003 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 8004 return Some(expr0_0); 8005 } 8006 return None; 8007 } 8008 8009 // Generated as internal constructor for term lower. 8010 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 8011 let pattern0_0 = arg0; 8012 let pattern1_0 = C::inst_data(ctx, pattern0_0); 8013 match &pattern1_0 { 8014 &InstructionData::NullAry { 8015 opcode: ref pattern2_0, 8016 } => { 8017 match pattern2_0 { 8018 &Opcode::Debugtrap => { 8019 // Rule at src/isa/s390x/lower.isle line 2169. 8020 let expr0_0 = constructor_debugtrap_impl(ctx)?; 8021 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8022 return Some(expr1_0); 8023 } 8024 &Opcode::Nop => { 8025 // Rule at src/isa/s390x/lower.isle line 47. 8026 let expr0_0 = C::invalid_reg(ctx); 8027 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8028 return Some(expr1_0); 8029 } 8030 &Opcode::Fence => { 8031 // Rule at src/isa/s390x/lower.isle line 1882. 8032 let expr0_0 = constructor_fence_impl(ctx)?; 8033 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8034 return Some(expr1_0); 8035 } 8036 _ => {} 8037 } 8038 } 8039 &InstructionData::FuncAddr { 8040 opcode: ref pattern2_0, 8041 func_ref: pattern2_1, 8042 } => { 8043 if let &Opcode::FuncAddr = pattern2_0 { 8044 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8045 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8046 // Rule at src/isa/s390x/lower.isle line 1159. 8047 let expr0_0: i32 = 0; 8048 let expr1_0 = C::memflags_trusted(ctx); 8049 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8050 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8051 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8052 return Some(expr4_0); 8053 } 8054 // Rule at src/isa/s390x/lower.isle line 1163. 8055 let expr0_0: i64 = 0; 8056 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8057 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8058 return Some(expr2_0); 8059 } 8060 } 8061 &InstructionData::UnaryGlobalValue { 8062 opcode: ref pattern2_0, 8063 global_value: pattern2_1, 8064 } => { 8065 if let &Opcode::SymbolValue = pattern2_0 { 8066 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8067 C::symbol_value_data(ctx, pattern2_1) 8068 { 8069 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8070 let pattern6_0 = 0; 8071 if let Some(pattern7_0) = 8072 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8073 { 8074 // Rule at src/isa/s390x/lower.isle line 1170. 8075 let expr0_0 = C::memflags_trusted(ctx); 8076 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8077 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8078 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8079 return Some(expr3_0); 8080 } 8081 } 8082 // Rule at src/isa/s390x/lower.isle line 1175. 8083 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8084 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8085 return Some(expr1_0); 8086 } 8087 } 8088 } 8089 &InstructionData::UnaryIeee32 { 8090 opcode: ref pattern2_0, 8091 imm: pattern2_1, 8092 } => { 8093 if let &Opcode::F32const = pattern2_0 { 8094 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8095 // Rule at src/isa/s390x/lower.isle line 29. 8096 let expr0_0: Type = F32; 8097 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8098 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8099 return Some(expr2_0); 8100 } 8101 } 8102 &InstructionData::UnaryIeee64 { 8103 opcode: ref pattern2_0, 8104 imm: pattern2_1, 8105 } => { 8106 if let &Opcode::F64const = pattern2_0 { 8107 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8108 // Rule at src/isa/s390x/lower.isle line 35. 8109 let expr0_0: Type = F64; 8110 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8111 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8112 return Some(expr2_0); 8113 } 8114 } 8115 &InstructionData::Trap { 8116 opcode: ref pattern2_0, 8117 code: ref pattern2_1, 8118 } => { 8119 match pattern2_0 { 8120 &Opcode::Trap => { 8121 // Rule at src/isa/s390x/lower.isle line 2139. 8122 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8123 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8124 return Some(expr1_0); 8125 } 8126 &Opcode::ResumableTrap => { 8127 // Rule at src/isa/s390x/lower.isle line 2145. 8128 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8129 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8130 return Some(expr1_0); 8131 } 8132 _ => {} 8133 } 8134 } 8135 &InstructionData::StoreNoOffset { 8136 opcode: ref pattern2_0, 8137 args: ref pattern2_1, 8138 flags: pattern2_2, 8139 } => { 8140 if let &Opcode::AtomicStore = pattern2_0 { 8141 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8142 let pattern5_0 = C::value_type(ctx, pattern4_0); 8143 if pattern5_0 == I8 { 8144 // Rule at src/isa/s390x/lower.isle line 1863. 8145 let expr0_0 = C::zero_offset(ctx); 8146 let expr1_0 = 8147 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8148 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8149 return Some(expr2_0); 8150 } 8151 if pattern5_0 == I16 { 8152 // Rule at src/isa/s390x/lower.isle line 1867. 8153 let expr0_0 = C::zero_offset(ctx); 8154 let expr1_0 = constructor_istore16_impl( 8155 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8156 )?; 8157 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8158 return Some(expr2_0); 8159 } 8160 if pattern5_0 == I32 { 8161 // Rule at src/isa/s390x/lower.isle line 1871. 8162 let expr0_0 = C::zero_offset(ctx); 8163 let expr1_0 = constructor_istore32_impl( 8164 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8165 )?; 8166 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8167 return Some(expr2_0); 8168 } 8169 if pattern5_0 == I64 { 8170 // Rule at src/isa/s390x/lower.isle line 1875. 8171 let expr0_0 = C::zero_offset(ctx); 8172 let expr1_0 = constructor_istore64_impl( 8173 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8174 )?; 8175 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8176 return Some(expr2_0); 8177 } 8178 } 8179 } 8180 &InstructionData::Store { 8181 opcode: ref pattern2_0, 8182 args: ref pattern2_1, 8183 flags: pattern2_2, 8184 offset: pattern2_3, 8185 } => { 8186 match pattern2_0 { 8187 &Opcode::Store => { 8188 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8189 let pattern5_0 = C::value_type(ctx, pattern4_0); 8190 if pattern5_0 == I8 { 8191 // Rule at src/isa/s390x/lower.isle line 1354. 8192 let expr0_0 = constructor_istore8_impl( 8193 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8194 )?; 8195 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8196 return Some(expr1_0); 8197 } 8198 if pattern5_0 == I16 { 8199 // Rule at src/isa/s390x/lower.isle line 1358. 8200 let expr0_0 = constructor_istore16_impl( 8201 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8202 )?; 8203 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8204 return Some(expr1_0); 8205 } 8206 if pattern5_0 == I32 { 8207 // Rule at src/isa/s390x/lower.isle line 1362. 8208 let expr0_0 = constructor_istore32_impl( 8209 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8210 )?; 8211 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8212 return Some(expr1_0); 8213 } 8214 if pattern5_0 == I64 { 8215 // Rule at src/isa/s390x/lower.isle line 1366. 8216 let expr0_0 = constructor_istore64_impl( 8217 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8218 )?; 8219 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8220 return Some(expr1_0); 8221 } 8222 if pattern5_0 == R64 { 8223 // Rule at src/isa/s390x/lower.isle line 1370. 8224 let expr0_0 = constructor_istore64_impl( 8225 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8226 )?; 8227 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8228 return Some(expr1_0); 8229 } 8230 if pattern5_0 == F32 { 8231 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8232 // Rule at src/isa/s390x/lower.isle line 1374. 8233 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8234 let expr1_0 = 8235 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8236 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8237 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8238 return Some(expr3_0); 8239 } 8240 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8241 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8242 // Rule at src/isa/s390x/lower.isle line 1380. 8243 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8244 let expr1_0 = constructor_lower_address( 8245 ctx, pattern2_2, pattern4_1, pattern2_3, 8246 )?; 8247 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8248 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8249 return Some(expr3_0); 8250 } 8251 } 8252 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8253 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8254 // Rule at src/isa/s390x/lower.isle line 1386. 8255 let expr0_0: Type = I64; 8256 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8257 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8258 let expr3_0: u8 = 32; 8259 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8260 let expr5_0 = constructor_lower_address( 8261 ctx, pattern2_2, pattern4_1, pattern2_3, 8262 )?; 8263 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8264 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8265 return Some(expr7_0); 8266 } 8267 } 8268 } 8269 if pattern5_0 == F64 { 8270 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8271 // Rule at src/isa/s390x/lower.isle line 1392. 8272 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8273 let expr1_0 = 8274 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8275 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8276 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8277 return Some(expr3_0); 8278 } 8279 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8280 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8281 // Rule at src/isa/s390x/lower.isle line 1398. 8282 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8283 let expr1_0 = constructor_lower_address( 8284 ctx, pattern2_2, pattern4_1, pattern2_3, 8285 )?; 8286 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8287 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8288 return Some(expr3_0); 8289 } 8290 } 8291 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8292 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8293 // Rule at src/isa/s390x/lower.isle line 1404. 8294 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8295 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8296 let expr2_0 = constructor_lower_address( 8297 ctx, pattern2_2, pattern4_1, pattern2_3, 8298 )?; 8299 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8300 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8301 return Some(expr4_0); 8302 } 8303 } 8304 } 8305 } 8306 &Opcode::Istore8 => { 8307 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8308 // Rule at src/isa/s390x/lower.isle line 1413. 8309 let expr0_0 = constructor_istore8_impl( 8310 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8311 )?; 8312 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8313 return Some(expr1_0); 8314 } 8315 &Opcode::Istore16 => { 8316 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8317 // Rule at src/isa/s390x/lower.isle line 1431. 8318 let expr0_0 = constructor_istore16_impl( 8319 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8320 )?; 8321 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8322 return Some(expr1_0); 8323 } 8324 &Opcode::Istore32 => { 8325 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8326 // Rule at src/isa/s390x/lower.isle line 1457. 8327 let expr0_0 = constructor_istore32_impl( 8328 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8329 )?; 8330 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8331 return Some(expr1_0); 8332 } 8333 _ => {} 8334 } 8335 } 8336 &InstructionData::Unary { 8337 opcode: ref pattern2_0, 8338 arg: pattern2_1, 8339 } => { 8340 match pattern2_0 { 8341 &Opcode::Copy => { 8342 // Rule at src/isa/s390x/lower.isle line 53. 8343 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8344 return Some(expr0_0); 8345 } 8346 &Opcode::Breduce => { 8347 // Rule at src/isa/s390x/lower.isle line 752. 8348 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8349 return Some(expr0_0); 8350 } 8351 &Opcode::Ireduce => { 8352 // Rule at src/isa/s390x/lower.isle line 596. 8353 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8354 return Some(expr0_0); 8355 } 8356 _ => {} 8357 } 8358 } 8359 &InstructionData::IntCondTrap { 8360 opcode: ref pattern2_0, 8361 arg: pattern2_1, 8362 cond: ref pattern2_2, 8363 code: ref pattern2_3, 8364 } => { 8365 if let &Opcode::Trapif = pattern2_0 { 8366 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8367 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8368 if let &InstructionData::Binary { 8369 opcode: ref pattern6_0, 8370 args: ref pattern6_1, 8371 } = &pattern5_0 8372 { 8373 match pattern6_0 { 8374 &Opcode::Ifcmp => { 8375 let (pattern8_0, pattern8_1) = 8376 C::unpack_value_array_2(ctx, pattern6_1); 8377 // Rule at src/isa/s390x/lower.isle line 2181. 8378 let expr0_0: bool = false; 8379 let expr1_0 = constructor_icmp_val( 8380 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8381 )?; 8382 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8383 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8384 return Some(expr3_0); 8385 } 8386 &Opcode::IaddIfcout => { 8387 let (pattern8_0, pattern8_1) = 8388 C::unpack_value_array_2(ctx, pattern6_1); 8389 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8390 // Rule at src/isa/s390x/lower.isle line 2206. 8391 let expr0_0: u8 = 3; 8392 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8393 let expr2_0 = 8394 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8395 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8396 return Some(expr3_0); 8397 } 8398 } 8399 _ => {} 8400 } 8401 } 8402 } 8403 } 8404 } 8405 &InstructionData::CondTrap { 8406 opcode: ref pattern2_0, 8407 arg: pattern2_1, 8408 code: ref pattern2_2, 8409 } => { 8410 match pattern2_0 { 8411 &Opcode::Trapz => { 8412 // Rule at src/isa/s390x/lower.isle line 2151. 8413 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8414 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8415 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8416 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8417 return Some(expr3_0); 8418 } 8419 &Opcode::Trapnz => { 8420 // Rule at src/isa/s390x/lower.isle line 2157. 8421 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8422 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8423 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8424 return Some(expr2_0); 8425 } 8426 &Opcode::ResumableTrapnz => { 8427 // Rule at src/isa/s390x/lower.isle line 2163. 8428 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8429 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8430 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 8431 return Some(expr2_0); 8432 } 8433 _ => {} 8434 } 8435 } 8436 _ => {} 8437 } 8438 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8439 let pattern2_0 = C::value_type(ctx, pattern1_0); 8440 if pattern2_0 == B1 { 8441 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8442 if let &InstructionData::Unary { 8443 opcode: ref pattern5_0, 8444 arg: pattern5_1, 8445 } = &pattern4_0 8446 { 8447 match pattern5_0 { 8448 &Opcode::IsNull => { 8449 let pattern7_0 = C::value_type(ctx, pattern5_1); 8450 if pattern7_0 == R64 { 8451 // Rule at src/isa/s390x/lower.isle line 2017. 8452 let expr0_0: Type = B1; 8453 let expr1_0: Type = I64; 8454 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8455 let expr3_0: i16 = 0; 8456 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8457 let expr5_0 = IntCC::Equal; 8458 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8459 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8460 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8461 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8462 return Some(expr9_0); 8463 } 8464 } 8465 &Opcode::IsInvalid => { 8466 let pattern7_0 = C::value_type(ctx, pattern5_1); 8467 if pattern7_0 == R64 { 8468 // Rule at src/isa/s390x/lower.isle line 2023. 8469 let expr0_0: Type = B1; 8470 let expr1_0: Type = I64; 8471 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8472 let expr3_0: i16 = -1; 8473 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8474 let expr5_0 = IntCC::Equal; 8475 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8476 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8477 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8478 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8479 return Some(expr9_0); 8480 } 8481 } 8482 _ => {} 8483 } 8484 } 8485 } 8486 if pattern2_0 == I8 { 8487 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8488 match &pattern4_0 { 8489 &InstructionData::Unary { 8490 opcode: ref pattern5_0, 8491 arg: pattern5_1, 8492 } => { 8493 if let &Opcode::Popcnt = pattern5_0 { 8494 // Rule at src/isa/s390x/lower.isle line 884. 8495 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8496 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8497 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8498 return Some(expr2_0); 8499 } 8500 } 8501 &InstructionData::LoadNoOffset { 8502 opcode: ref pattern5_0, 8503 arg: pattern5_1, 8504 flags: pattern5_2, 8505 } => { 8506 if let &Opcode::AtomicLoad = pattern5_0 { 8507 // Rule at src/isa/s390x/lower.isle line 1826. 8508 let expr0_0: Type = I8; 8509 let expr1_0 = C::zero_offset(ctx); 8510 let expr2_0 = 8511 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8512 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8513 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8514 return Some(expr4_0); 8515 } 8516 } 8517 &InstructionData::Load { 8518 opcode: ref pattern5_0, 8519 arg: pattern5_1, 8520 flags: pattern5_2, 8521 offset: pattern5_3, 8522 } => { 8523 if let &Opcode::Load = pattern5_0 { 8524 // Rule at src/isa/s390x/lower.isle line 1182. 8525 let expr0_0: Type = I8; 8526 let expr1_0 = 8527 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8528 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8529 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8530 return Some(expr3_0); 8531 } 8532 } 8533 _ => {} 8534 } 8535 } 8536 if pattern2_0 == I16 { 8537 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8538 match &pattern4_0 { 8539 &InstructionData::LoadNoOffset { 8540 opcode: ref pattern5_0, 8541 arg: pattern5_1, 8542 flags: pattern5_2, 8543 } => { 8544 if let &Opcode::AtomicLoad = pattern5_0 { 8545 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8546 // Rule at src/isa/s390x/lower.isle line 1834. 8547 let expr0_0 = C::zero_offset(ctx); 8548 let expr1_0 = 8549 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8550 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8551 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8552 return Some(expr3_0); 8553 } 8554 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8555 // Rule at src/isa/s390x/lower.isle line 1830. 8556 let expr0_0: Type = I16; 8557 let expr1_0 = C::zero_offset(ctx); 8558 let expr2_0 = 8559 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8560 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8561 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8562 return Some(expr4_0); 8563 } 8564 } 8565 } 8566 &InstructionData::Load { 8567 opcode: ref pattern5_0, 8568 arg: pattern5_1, 8569 flags: pattern5_2, 8570 offset: pattern5_3, 8571 } => { 8572 if let &Opcode::Load = pattern5_0 { 8573 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8574 // Rule at src/isa/s390x/lower.isle line 1190. 8575 let expr0_0 = 8576 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8577 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8578 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8579 return Some(expr2_0); 8580 } 8581 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8582 // Rule at src/isa/s390x/lower.isle line 1186. 8583 let expr0_0: Type = I16; 8584 let expr1_0 = 8585 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8586 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8587 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8588 return Some(expr3_0); 8589 } 8590 } 8591 } 8592 _ => {} 8593 } 8594 } 8595 if pattern2_0 == I32 { 8596 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8597 match &pattern4_0 { 8598 &InstructionData::Binary { 8599 opcode: ref pattern5_0, 8600 args: ref pattern5_1, 8601 } => { 8602 match pattern5_0 { 8603 &Opcode::Umulhi => { 8604 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8605 // Rule at src/isa/s390x/lower.isle line 252. 8606 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8607 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8608 let expr2_0: Type = I64; 8609 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8610 let expr4_0: Type = I64; 8611 let expr5_0: u8 = 32; 8612 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8613 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8614 return Some(expr7_0); 8615 } 8616 &Opcode::Smulhi => { 8617 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8618 // Rule at src/isa/s390x/lower.isle line 274. 8619 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8620 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8621 let expr2_0: Type = I64; 8622 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8623 let expr4_0: Type = I64; 8624 let expr5_0: u8 = 32; 8625 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8626 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8627 return Some(expr7_0); 8628 } 8629 _ => {} 8630 } 8631 } 8632 &InstructionData::Unary { 8633 opcode: ref pattern5_0, 8634 arg: pattern5_1, 8635 } => { 8636 if let &Opcode::Bitcast = pattern5_0 { 8637 let pattern7_0 = C::value_type(ctx, pattern5_1); 8638 if pattern7_0 == F32 { 8639 // Rule at src/isa/s390x/lower.isle line 1145. 8640 let expr0_0: Type = I64; 8641 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8642 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8643 let expr3_0: u8 = 32; 8644 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8645 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8646 return Some(expr5_0); 8647 } 8648 } 8649 } 8650 &InstructionData::LoadNoOffset { 8651 opcode: ref pattern5_0, 8652 arg: pattern5_1, 8653 flags: pattern5_2, 8654 } => { 8655 if let &Opcode::AtomicLoad = pattern5_0 { 8656 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8657 // Rule at src/isa/s390x/lower.isle line 1842. 8658 let expr0_0 = C::zero_offset(ctx); 8659 let expr1_0 = 8660 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8661 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8662 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8663 return Some(expr3_0); 8664 } 8665 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8666 // Rule at src/isa/s390x/lower.isle line 1838. 8667 let expr0_0 = C::zero_offset(ctx); 8668 let expr1_0 = 8669 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8670 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8671 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8672 return Some(expr3_0); 8673 } 8674 } 8675 } 8676 &InstructionData::Load { 8677 opcode: ref pattern5_0, 8678 arg: pattern5_1, 8679 flags: pattern5_2, 8680 offset: pattern5_3, 8681 } => { 8682 if let &Opcode::Load = pattern5_0 { 8683 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8684 // Rule at src/isa/s390x/lower.isle line 1198. 8685 let expr0_0 = 8686 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8687 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8688 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8689 return Some(expr2_0); 8690 } 8691 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8692 // Rule at src/isa/s390x/lower.isle line 1194. 8693 let expr0_0 = 8694 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8695 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8696 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8697 return Some(expr2_0); 8698 } 8699 } 8700 } 8701 _ => {} 8702 } 8703 } 8704 if pattern2_0 == I64 { 8705 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8706 match &pattern4_0 { 8707 &InstructionData::Binary { 8708 opcode: ref pattern5_0, 8709 args: ref pattern5_1, 8710 } => { 8711 match pattern5_0 { 8712 &Opcode::Umulhi => { 8713 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8714 // Rule at src/isa/s390x/lower.isle line 259. 8715 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8716 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8717 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8718 let expr3_0: Type = I64; 8719 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8720 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8721 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8722 return Some(expr6_0); 8723 } 8724 &Opcode::Smulhi => { 8725 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8726 // Rule at src/isa/s390x/lower.isle line 281. 8727 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8728 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8729 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8730 let expr3_0: Type = I64; 8731 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8732 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8733 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8734 return Some(expr6_0); 8735 } 8736 _ => {} 8737 } 8738 } 8739 &InstructionData::Unary { 8740 opcode: ref pattern5_0, 8741 arg: pattern5_1, 8742 } => { 8743 if let &Opcode::Bitcast = pattern5_0 { 8744 let pattern7_0 = C::value_type(ctx, pattern5_1); 8745 if pattern7_0 == F64 { 8746 // Rule at src/isa/s390x/lower.isle line 1135. 8747 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8748 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8749 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8750 return Some(expr2_0); 8751 } 8752 } 8753 } 8754 &InstructionData::LoadNoOffset { 8755 opcode: ref pattern5_0, 8756 arg: pattern5_1, 8757 flags: pattern5_2, 8758 } => { 8759 if let &Opcode::AtomicLoad = pattern5_0 { 8760 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8761 // Rule at src/isa/s390x/lower.isle line 1850. 8762 let expr0_0 = C::zero_offset(ctx); 8763 let expr1_0 = 8764 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8765 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8766 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8767 return Some(expr3_0); 8768 } 8769 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8770 // Rule at src/isa/s390x/lower.isle line 1846. 8771 let expr0_0 = C::zero_offset(ctx); 8772 let expr1_0 = 8773 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8774 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8775 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8776 return Some(expr3_0); 8777 } 8778 } 8779 } 8780 &InstructionData::Load { 8781 opcode: ref pattern5_0, 8782 arg: pattern5_1, 8783 flags: pattern5_2, 8784 offset: pattern5_3, 8785 } => { 8786 if let &Opcode::Load = pattern5_0 { 8787 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8788 // Rule at src/isa/s390x/lower.isle line 1206. 8789 let expr0_0 = 8790 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8791 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8792 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8793 return Some(expr2_0); 8794 } 8795 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8796 // Rule at src/isa/s390x/lower.isle line 1202. 8797 let expr0_0 = 8798 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8799 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8800 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8801 return Some(expr2_0); 8802 } 8803 } 8804 } 8805 _ => {} 8806 } 8807 } 8808 if pattern2_0 == R64 { 8809 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8810 if let &InstructionData::Load { 8811 opcode: ref pattern5_0, 8812 arg: pattern5_1, 8813 flags: pattern5_2, 8814 offset: pattern5_3, 8815 } = &pattern4_0 8816 { 8817 if let &Opcode::Load = pattern5_0 { 8818 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8819 // Rule at src/isa/s390x/lower.isle line 1214. 8820 let expr0_0 = 8821 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8822 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8823 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8824 return Some(expr2_0); 8825 } 8826 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8827 // Rule at src/isa/s390x/lower.isle line 1210. 8828 let expr0_0 = 8829 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8830 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8831 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8832 return Some(expr2_0); 8833 } 8834 } 8835 } 8836 } 8837 if pattern2_0 == F32 { 8838 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8839 match &pattern4_0 { 8840 &InstructionData::Unary { 8841 opcode: ref pattern5_0, 8842 arg: pattern5_1, 8843 } => { 8844 if let &Opcode::Bitcast = pattern5_0 { 8845 let pattern7_0 = C::value_type(ctx, pattern5_1); 8846 if pattern7_0 == I32 { 8847 // Rule at src/isa/s390x/lower.isle line 1140. 8848 let expr0_0: Type = I64; 8849 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8850 let expr2_0: u8 = 32; 8851 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8852 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8853 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8854 return Some(expr5_0); 8855 } 8856 } 8857 } 8858 &InstructionData::Load { 8859 opcode: ref pattern5_0, 8860 arg: pattern5_1, 8861 flags: pattern5_2, 8862 offset: pattern5_3, 8863 } => { 8864 if let &Opcode::Load = pattern5_0 { 8865 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8866 // Rule at src/isa/s390x/lower.isle line 1218. 8867 let expr0_0 = 8868 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8869 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8870 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8871 return Some(expr2_0); 8872 } 8873 } 8874 } 8875 _ => {} 8876 } 8877 } 8878 if pattern2_0 == F64 { 8879 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8880 match &pattern4_0 { 8881 &InstructionData::Unary { 8882 opcode: ref pattern5_0, 8883 arg: pattern5_1, 8884 } => { 8885 if let &Opcode::Bitcast = pattern5_0 { 8886 let pattern7_0 = C::value_type(ctx, pattern5_1); 8887 if pattern7_0 == I64 { 8888 // Rule at src/isa/s390x/lower.isle line 1131. 8889 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8890 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8891 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8892 return Some(expr2_0); 8893 } 8894 } 8895 } 8896 &InstructionData::Load { 8897 opcode: ref pattern5_0, 8898 arg: pattern5_1, 8899 flags: pattern5_2, 8900 offset: pattern5_3, 8901 } => { 8902 if let &Opcode::Load = pattern5_0 { 8903 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8904 // Rule at src/isa/s390x/lower.isle line 1233. 8905 let expr0_0 = 8906 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8907 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8908 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8909 return Some(expr2_0); 8910 } 8911 } 8912 } 8913 _ => {} 8914 } 8915 } 8916 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8917 match &pattern3_0 { 8918 &InstructionData::NullAry { 8919 opcode: ref pattern4_0, 8920 } => { 8921 if let &Opcode::Null = pattern4_0 { 8922 // Rule at src/isa/s390x/lower.isle line 41. 8923 let expr0_0: u64 = 0; 8924 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8925 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8926 return Some(expr2_0); 8927 } 8928 } 8929 &InstructionData::UnaryImm { 8930 opcode: ref pattern4_0, 8931 imm: pattern4_1, 8932 } => { 8933 if let &Opcode::Iconst = pattern4_0 { 8934 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8935 // Rule at src/isa/s390x/lower.isle line 15. 8936 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8937 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8938 return Some(expr1_0); 8939 } 8940 } 8941 &InstructionData::StackLoad { 8942 opcode: ref pattern4_0, 8943 stack_slot: pattern4_1, 8944 offset: pattern4_2, 8945 } => { 8946 if let &Opcode::StackAddr = pattern4_0 { 8947 // Rule at src/isa/s390x/lower.isle line 1152. 8948 let expr0_0 = 8949 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8950 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8951 return Some(expr1_0); 8952 } 8953 } 8954 &InstructionData::UnaryBool { 8955 opcode: ref pattern4_0, 8956 imm: pattern4_1, 8957 } => { 8958 if let &Opcode::Bconst = pattern4_0 { 8959 if pattern4_1 == true { 8960 // Rule at src/isa/s390x/lower.isle line 23. 8961 let expr0_0: u64 = 1; 8962 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8963 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8964 return Some(expr2_0); 8965 } 8966 if pattern4_1 == false { 8967 // Rule at src/isa/s390x/lower.isle line 21. 8968 let expr0_0: u64 = 0; 8969 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8970 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8971 return Some(expr2_0); 8972 } 8973 } 8974 } 8975 &InstructionData::Binary { 8976 opcode: ref pattern4_0, 8977 args: ref pattern4_1, 8978 } => { 8979 match pattern4_0 { 8980 &Opcode::Fadd => { 8981 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8982 // Rule at src/isa/s390x/lower.isle line 920. 8983 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8984 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8985 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8986 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8987 return Some(expr3_0); 8988 } 8989 &Opcode::Fsub => { 8990 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8991 // Rule at src/isa/s390x/lower.isle line 927. 8992 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8993 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8994 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8995 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8996 return Some(expr3_0); 8997 } 8998 &Opcode::Fmul => { 8999 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9000 // Rule at src/isa/s390x/lower.isle line 934. 9001 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9002 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9003 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9004 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9005 return Some(expr3_0); 9006 } 9007 &Opcode::Fdiv => { 9008 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9009 // Rule at src/isa/s390x/lower.isle line 941. 9010 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9011 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9012 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9013 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9014 return Some(expr3_0); 9015 } 9016 &Opcode::Fcopysign => { 9017 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9018 // Rule at src/isa/s390x/lower.isle line 962. 9019 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9020 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9021 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 9022 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9023 return Some(expr3_0); 9024 } 9025 &Opcode::Fmin => { 9026 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9027 // Rule at src/isa/s390x/lower.isle line 948. 9028 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9029 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9030 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9031 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9032 return Some(expr3_0); 9033 } 9034 &Opcode::Fmax => { 9035 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9036 // Rule at src/isa/s390x/lower.isle line 955. 9037 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9038 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9039 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9040 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9041 return Some(expr3_0); 9042 } 9043 _ => {} 9044 } 9045 } 9046 &InstructionData::FloatCompare { 9047 opcode: ref pattern4_0, 9048 args: ref pattern4_1, 9049 cond: ref pattern4_2, 9050 } => { 9051 if let &Opcode::Fcmp = pattern4_0 { 9052 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9053 // Rule at src/isa/s390x/lower.isle line 2004. 9054 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9055 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9056 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9057 return Some(expr2_0); 9058 } 9059 } 9060 &InstructionData::IntCompare { 9061 opcode: ref pattern4_0, 9062 args: ref pattern4_1, 9063 cond: ref pattern4_2, 9064 } => { 9065 if let &Opcode::Icmp = pattern4_0 { 9066 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9067 // Rule at src/isa/s390x/lower.isle line 1915. 9068 let expr0_0: bool = true; 9069 let expr1_0 = 9070 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9071 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9072 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9073 return Some(expr3_0); 9074 } 9075 } 9076 &InstructionData::Ternary { 9077 opcode: ref pattern4_0, 9078 args: ref pattern4_1, 9079 } => { 9080 match pattern4_0 { 9081 &Opcode::Select => { 9082 let (pattern6_0, pattern6_1, pattern6_2) = 9083 C::unpack_value_array_3(ctx, pattern4_1); 9084 // Rule at src/isa/s390x/lower.isle line 2046. 9085 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9086 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9087 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9088 let expr3_0 = constructor_select_bool_reg( 9089 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9090 )?; 9091 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9092 return Some(expr4_0); 9093 } 9094 &Opcode::Fma => { 9095 let (pattern6_0, pattern6_1, pattern6_2) = 9096 C::unpack_value_array_3(ctx, pattern4_1); 9097 // Rule at src/isa/s390x/lower.isle line 969. 9098 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9099 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9100 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9101 let expr3_0 = 9102 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9103 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9104 return Some(expr4_0); 9105 } 9106 _ => {} 9107 } 9108 } 9109 &InstructionData::IntSelect { 9110 opcode: ref pattern4_0, 9111 args: ref pattern4_1, 9112 cond: ref pattern4_2, 9113 } => { 9114 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9115 let (pattern6_0, pattern6_1, pattern6_2) = 9116 C::unpack_value_array_3(ctx, pattern4_1); 9117 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9118 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9119 if let &InstructionData::Binary { 9120 opcode: ref pattern9_0, 9121 args: ref pattern9_1, 9122 } = &pattern8_0 9123 { 9124 if let &Opcode::Ifcmp = pattern9_0 { 9125 let (pattern11_0, pattern11_1) = 9126 C::unpack_value_array_2(ctx, pattern9_1); 9127 // Rule at src/isa/s390x/lower.isle line 2058. 9128 let expr0_0: bool = false; 9129 let expr1_0 = constructor_icmp_val( 9130 ctx, 9131 expr0_0, 9132 pattern4_2, 9133 pattern11_0, 9134 pattern11_1, 9135 )?; 9136 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9137 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9138 let expr4_0 = constructor_select_bool_reg( 9139 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9140 )?; 9141 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9142 return Some(expr5_0); 9143 } 9144 } 9145 } 9146 } 9147 } 9148 &InstructionData::Unary { 9149 opcode: ref pattern4_0, 9150 arg: pattern4_1, 9151 } => { 9152 match pattern4_0 { 9153 &Opcode::Sqrt => { 9154 // Rule at src/isa/s390x/lower.isle line 976. 9155 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9156 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9157 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9158 return Some(expr2_0); 9159 } 9160 &Opcode::Fneg => { 9161 // Rule at src/isa/s390x/lower.isle line 983. 9162 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9163 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9164 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9165 return Some(expr2_0); 9166 } 9167 &Opcode::Fabs => { 9168 // Rule at src/isa/s390x/lower.isle line 990. 9169 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9170 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9171 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9172 return Some(expr2_0); 9173 } 9174 &Opcode::Ceil => { 9175 // Rule at src/isa/s390x/lower.isle line 997. 9176 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9177 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9178 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9179 return Some(expr2_0); 9180 } 9181 &Opcode::Floor => { 9182 // Rule at src/isa/s390x/lower.isle line 1004. 9183 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9184 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9185 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9186 return Some(expr2_0); 9187 } 9188 &Opcode::Trunc => { 9189 // Rule at src/isa/s390x/lower.isle line 1011. 9190 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9191 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9192 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9193 return Some(expr2_0); 9194 } 9195 &Opcode::Nearest => { 9196 // Rule at src/isa/s390x/lower.isle line 1018. 9197 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9198 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9199 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9200 return Some(expr2_0); 9201 } 9202 &Opcode::Bextend => { 9203 // Rule at src/isa/s390x/lower.isle line 760. 9204 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9205 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9206 return Some(expr1_0); 9207 } 9208 &Opcode::Bmask => { 9209 // Rule at src/isa/s390x/lower.isle line 762. 9210 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9211 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9212 return Some(expr1_0); 9213 } 9214 &Opcode::Fpromote => { 9215 let pattern6_0 = C::value_type(ctx, pattern4_1); 9216 // Rule at src/isa/s390x/lower.isle line 1025. 9217 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9218 let expr1_0 = 9219 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9220 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9221 return Some(expr2_0); 9222 } 9223 &Opcode::Fdemote => { 9224 let pattern6_0 = C::value_type(ctx, pattern4_1); 9225 // Rule at src/isa/s390x/lower.isle line 1032. 9226 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9227 let expr1_0 = 9228 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9229 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9230 return Some(expr2_0); 9231 } 9232 &Opcode::FcvtFromUint => { 9233 let pattern6_0 = C::value_type(ctx, pattern4_1); 9234 // Rule at src/isa/s390x/lower.isle line 1039. 9235 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9236 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9237 let expr2_0 = 9238 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9239 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9240 return Some(expr3_0); 9241 } 9242 &Opcode::FcvtFromSint => { 9243 let pattern6_0 = C::value_type(ctx, pattern4_1); 9244 // Rule at src/isa/s390x/lower.isle line 1047. 9245 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9246 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9247 let expr2_0 = 9248 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9249 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9250 return Some(expr3_0); 9251 } 9252 _ => {} 9253 } 9254 } 9255 _ => {} 9256 } 9257 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9258 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9259 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9260 match &pattern5_0 { 9261 &InstructionData::Binary { 9262 opcode: ref pattern6_0, 9263 args: ref pattern6_1, 9264 } => { 9265 match pattern6_0 { 9266 &Opcode::BandNot => { 9267 let (pattern8_0, pattern8_1) = 9268 C::unpack_value_array_2(ctx, pattern6_1); 9269 // Rule at src/isa/s390x/lower.isle line 702. 9270 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9271 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9272 let expr2_0 = 9273 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9274 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9275 return Some(expr3_0); 9276 } 9277 &Opcode::BorNot => { 9278 let (pattern8_0, pattern8_1) = 9279 C::unpack_value_array_2(ctx, pattern6_1); 9280 // Rule at src/isa/s390x/lower.isle line 713. 9281 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9282 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9283 let expr2_0 = 9284 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9285 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9286 return Some(expr3_0); 9287 } 9288 &Opcode::BxorNot => { 9289 let (pattern8_0, pattern8_1) = 9290 C::unpack_value_array_2(ctx, pattern6_1); 9291 // Rule at src/isa/s390x/lower.isle line 724. 9292 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9293 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9294 let expr2_0 = 9295 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9296 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9297 return Some(expr3_0); 9298 } 9299 _ => {} 9300 } 9301 } 9302 &InstructionData::Ternary { 9303 opcode: ref pattern6_0, 9304 args: ref pattern6_1, 9305 } => { 9306 if let &Opcode::Bitselect = pattern6_0 { 9307 let (pattern8_0, pattern8_1, pattern8_2) = 9308 C::unpack_value_array_3(ctx, pattern6_1); 9309 // Rule at src/isa/s390x/lower.isle line 735. 9310 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9311 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9312 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9313 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9314 let expr4_0 = 9315 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9316 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9317 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9318 return Some(expr6_0); 9319 } 9320 } 9321 &InstructionData::Unary { 9322 opcode: ref pattern6_0, 9323 arg: pattern6_1, 9324 } => { 9325 match pattern6_0 { 9326 &Opcode::Bnot => { 9327 // Rule at src/isa/s390x/lower.isle line 625. 9328 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9329 let expr1_0 = 9330 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9331 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9332 return Some(expr2_0); 9333 } 9334 &Opcode::Popcnt => { 9335 // Rule at src/isa/s390x/lower.isle line 889. 9336 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9337 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9338 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9339 return Some(expr2_0); 9340 } 9341 _ => {} 9342 } 9343 } 9344 _ => {} 9345 } 9346 } 9347 } 9348 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9349 if pattern2_0 == I16 { 9350 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9351 if let &InstructionData::Unary { 9352 opcode: ref pattern6_0, 9353 arg: pattern6_1, 9354 } = &pattern5_0 9355 { 9356 if let &Opcode::Popcnt = pattern6_0 { 9357 // Rule at src/isa/s390x/lower.isle line 898. 9358 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9359 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9360 let expr2_0: Type = I32; 9361 let expr3_0: Type = I32; 9362 let expr4_0: u8 = 8; 9363 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9364 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9365 let expr7_0: Type = I32; 9366 let expr8_0: u8 = 8; 9367 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9368 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9369 return Some(expr10_0); 9370 } 9371 } 9372 } 9373 if pattern2_0 == I32 { 9374 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9375 if let &InstructionData::Unary { 9376 opcode: ref pattern6_0, 9377 arg: pattern6_1, 9378 } = &pattern5_0 9379 { 9380 if let &Opcode::Popcnt = pattern6_0 { 9381 // Rule at src/isa/s390x/lower.isle line 903. 9382 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9383 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9384 let expr2_0: Type = I32; 9385 let expr3_0: Type = I32; 9386 let expr4_0: u8 = 16; 9387 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9388 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9389 let expr7_0: Type = I32; 9390 let expr8_0: Type = I32; 9391 let expr9_0: u8 = 8; 9392 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9393 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9394 let expr12_0: Type = I32; 9395 let expr13_0: u8 = 24; 9396 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9397 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9398 return Some(expr15_0); 9399 } 9400 } 9401 } 9402 if pattern2_0 == I64 { 9403 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9404 if let &InstructionData::Unary { 9405 opcode: ref pattern6_0, 9406 arg: pattern6_1, 9407 } = &pattern5_0 9408 { 9409 if let &Opcode::Popcnt = pattern6_0 { 9410 // Rule at src/isa/s390x/lower.isle line 909. 9411 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9412 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9413 let expr2_0: Type = I64; 9414 let expr3_0: Type = I64; 9415 let expr4_0: u8 = 32; 9416 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9417 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9418 let expr7_0: Type = I64; 9419 let expr8_0: Type = I64; 9420 let expr9_0: u8 = 16; 9421 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9422 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9423 let expr12_0: Type = I64; 9424 let expr13_0: Type = I64; 9425 let expr14_0: u8 = 8; 9426 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9427 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9428 let expr17_0: Type = I64; 9429 let expr18_0: u8 = 56; 9430 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9431 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9432 return Some(expr20_0); 9433 } 9434 } 9435 } 9436 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9437 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9438 match &pattern5_0 { 9439 &InstructionData::Binary { 9440 opcode: ref pattern6_0, 9441 args: ref pattern6_1, 9442 } => { 9443 match pattern6_0 { 9444 &Opcode::BandNot => { 9445 let (pattern8_0, pattern8_1) = 9446 C::unpack_value_array_2(ctx, pattern6_1); 9447 // Rule at src/isa/s390x/lower.isle line 706. 9448 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9449 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9450 let expr2_0 = 9451 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9452 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9453 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9454 return Some(expr4_0); 9455 } 9456 &Opcode::BorNot => { 9457 let (pattern8_0, pattern8_1) = 9458 C::unpack_value_array_2(ctx, pattern6_1); 9459 // Rule at src/isa/s390x/lower.isle line 717. 9460 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9461 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9462 let expr2_0 = 9463 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9464 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9465 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9466 return Some(expr4_0); 9467 } 9468 &Opcode::BxorNot => { 9469 let (pattern8_0, pattern8_1) = 9470 C::unpack_value_array_2(ctx, pattern6_1); 9471 // Rule at src/isa/s390x/lower.isle line 728. 9472 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9473 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9474 let expr2_0 = 9475 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9476 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9477 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9478 return Some(expr4_0); 9479 } 9480 _ => {} 9481 } 9482 } 9483 &InstructionData::Ternary { 9484 opcode: ref pattern6_0, 9485 args: ref pattern6_1, 9486 } => { 9487 if let &Opcode::Bitselect = pattern6_0 { 9488 let (pattern8_0, pattern8_1, pattern8_2) = 9489 C::unpack_value_array_3(ctx, pattern6_1); 9490 // Rule at src/isa/s390x/lower.isle line 742. 9491 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9492 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9493 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9494 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9495 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9496 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9497 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9498 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9499 return Some(expr7_0); 9500 } 9501 } 9502 &InstructionData::Unary { 9503 opcode: ref pattern6_0, 9504 arg: pattern6_1, 9505 } => { 9506 if let &Opcode::Bnot = pattern6_0 { 9507 // Rule at src/isa/s390x/lower.isle line 630. 9508 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9509 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9510 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9511 return Some(expr2_0); 9512 } 9513 } 9514 _ => {} 9515 } 9516 } 9517 } 9518 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9519 if pattern2_0 == F32 { 9520 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9521 if let &InstructionData::Load { 9522 opcode: ref pattern6_0, 9523 arg: pattern6_1, 9524 flags: pattern6_2, 9525 offset: pattern6_3, 9526 } = &pattern5_0 9527 { 9528 if let &Opcode::Load = pattern6_0 { 9529 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9530 // Rule at src/isa/s390x/lower.isle line 1222. 9531 let expr0_0 = 9532 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9533 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9534 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9535 return Some(expr2_0); 9536 } 9537 } 9538 } 9539 } 9540 if pattern2_0 == F64 { 9541 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9542 if let &InstructionData::Load { 9543 opcode: ref pattern6_0, 9544 arg: pattern6_1, 9545 flags: pattern6_2, 9546 offset: pattern6_3, 9547 } = &pattern5_0 9548 { 9549 if let &Opcode::Load = pattern6_0 { 9550 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9551 // Rule at src/isa/s390x/lower.isle line 1237. 9552 let expr0_0 = 9553 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9554 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9555 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9556 return Some(expr2_0); 9557 } 9558 } 9559 } 9560 } 9561 } 9562 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9563 if pattern2_0 == F32 { 9564 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9565 if let &InstructionData::Load { 9566 opcode: ref pattern6_0, 9567 arg: pattern6_1, 9568 flags: pattern6_2, 9569 offset: pattern6_3, 9570 } = &pattern5_0 9571 { 9572 if let &Opcode::Load = pattern6_0 { 9573 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9574 // Rule at src/isa/s390x/lower.isle line 1227. 9575 let expr0_0 = 9576 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9577 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9578 let expr2_0: Type = I64; 9579 let expr3_0: u8 = 32; 9580 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9581 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9582 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9583 return Some(expr6_0); 9584 } 9585 } 9586 } 9587 } 9588 if pattern2_0 == F64 { 9589 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9590 if let &InstructionData::Load { 9591 opcode: ref pattern6_0, 9592 arg: pattern6_1, 9593 flags: pattern6_2, 9594 offset: pattern6_3, 9595 } = &pattern5_0 9596 { 9597 if let &Opcode::Load = pattern6_0 { 9598 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9599 // Rule at src/isa/s390x/lower.isle line 1242. 9600 let expr0_0 = 9601 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9602 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9603 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9604 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9605 return Some(expr3_0); 9606 } 9607 } 9608 } 9609 } 9610 } 9611 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9612 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9613 if let &InstructionData::Unary { 9614 opcode: ref pattern5_0, 9615 arg: pattern5_1, 9616 } = &pattern4_0 9617 { 9618 if let &Opcode::Bint = pattern5_0 { 9619 // Rule at src/isa/s390x/lower.isle line 796. 9620 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9621 let expr1_0: u16 = 1; 9622 let expr2_0: u8 = 0; 9623 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9624 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9625 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9626 return Some(expr5_0); 9627 } 9628 } 9629 } 9630 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9631 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9632 if let &InstructionData::Unary { 9633 opcode: ref pattern5_0, 9634 arg: pattern5_1, 9635 } = &pattern4_0 9636 { 9637 if let &Opcode::Bint = pattern5_0 { 9638 // Rule at src/isa/s390x/lower.isle line 800. 9639 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9640 let expr1_0: u32 = 1; 9641 let expr2_0: u8 = 0; 9642 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9643 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9644 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9645 return Some(expr5_0); 9646 } 9647 } 9648 } 9649 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9650 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9651 match &pattern4_0 { 9652 &InstructionData::Binary { 9653 opcode: ref pattern5_0, 9654 args: ref pattern5_1, 9655 } => { 9656 match pattern5_0 { 9657 &Opcode::Iadd => { 9658 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9659 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9660 // Rule at src/isa/s390x/lower.isle line 72. 9661 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9662 let expr1_0 = 9663 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9664 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9665 return Some(expr2_0); 9666 } 9667 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9668 // Rule at src/isa/s390x/lower.isle line 76. 9669 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9670 let expr1_0 = 9671 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9672 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9673 return Some(expr2_0); 9674 } 9675 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9676 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9677 if let &InstructionData::Unary { 9678 opcode: ref pattern10_0, 9679 arg: pattern10_1, 9680 } = &pattern9_0 9681 { 9682 if let &Opcode::Sextend = pattern10_0 { 9683 let pattern12_0 = C::value_type(ctx, pattern10_1); 9684 if pattern12_0 == I32 { 9685 // Rule at src/isa/s390x/lower.isle line 66. 9686 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9687 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9688 let expr2_0 = constructor_add_reg_sext32( 9689 ctx, pattern3_0, expr0_0, expr1_0, 9690 )?; 9691 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9692 return Some(expr3_0); 9693 } 9694 } 9695 } 9696 } 9697 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9698 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9699 if let &InstructionData::Load { 9700 opcode: ref pattern10_0, 9701 arg: pattern10_1, 9702 flags: pattern10_2, 9703 offset: pattern10_3, 9704 } = &pattern9_0 9705 { 9706 match pattern10_0 { 9707 &Opcode::Sload16 => { 9708 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9709 // Rule at src/isa/s390x/lower.isle line 94. 9710 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9711 let expr1_0 = 9712 constructor_sink_sload16(ctx, pattern8_0)?; 9713 let expr2_0 = constructor_add_mem_sext16( 9714 ctx, pattern3_0, expr0_0, &expr1_0, 9715 )?; 9716 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9717 return Some(expr3_0); 9718 } 9719 } 9720 &Opcode::Sload32 => { 9721 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9722 // Rule at src/isa/s390x/lower.isle line 98. 9723 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9724 let expr1_0 = 9725 constructor_sink_sload32(ctx, pattern8_0)?; 9726 let expr2_0 = constructor_add_mem_sext32( 9727 ctx, pattern3_0, expr0_0, &expr1_0, 9728 )?; 9729 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9730 return Some(expr3_0); 9731 } 9732 } 9733 _ => {} 9734 } 9735 } 9736 } 9737 let pattern8_0 = C::value_type(ctx, pattern7_0); 9738 if pattern8_0 == I16 { 9739 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9740 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9741 if let &InstructionData::Load { 9742 opcode: ref pattern12_0, 9743 arg: pattern12_1, 9744 flags: pattern12_2, 9745 offset: pattern12_3, 9746 } = &pattern11_0 9747 { 9748 if let &Opcode::Load = pattern12_0 { 9749 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9750 // Rule at src/isa/s390x/lower.isle line 88. 9751 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9752 let expr1_0 = 9753 constructor_sink_load(ctx, pattern10_0)?; 9754 let expr2_0 = constructor_add_mem_sext16( 9755 ctx, pattern3_0, expr0_0, &expr1_0, 9756 )?; 9757 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9758 return Some(expr3_0); 9759 } 9760 } 9761 } 9762 } 9763 } 9764 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9765 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9766 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9767 if let &InstructionData::Load { 9768 opcode: ref pattern12_0, 9769 arg: pattern12_1, 9770 flags: pattern12_2, 9771 offset: pattern12_3, 9772 } = &pattern11_0 9773 { 9774 if let &Opcode::Load = pattern12_0 { 9775 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9776 // Rule at src/isa/s390x/lower.isle line 82. 9777 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9778 let expr1_0 = 9779 constructor_sink_load(ctx, pattern10_0)?; 9780 let expr2_0 = constructor_add_mem( 9781 ctx, pattern3_0, expr0_0, &expr1_0, 9782 )?; 9783 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9784 return Some(expr3_0); 9785 } 9786 } 9787 } 9788 } 9789 } 9790 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9791 // Rule at src/isa/s390x/lower.isle line 70. 9792 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9793 let expr1_0 = 9794 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9795 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9796 return Some(expr2_0); 9797 } 9798 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9799 // Rule at src/isa/s390x/lower.isle line 74. 9800 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9801 let expr1_0 = 9802 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9803 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9804 return Some(expr2_0); 9805 } 9806 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9807 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9808 if let &InstructionData::Unary { 9809 opcode: ref pattern10_0, 9810 arg: pattern10_1, 9811 } = &pattern9_0 9812 { 9813 if let &Opcode::Sextend = pattern10_0 { 9814 let pattern12_0 = C::value_type(ctx, pattern10_1); 9815 if pattern12_0 == I32 { 9816 // Rule at src/isa/s390x/lower.isle line 64. 9817 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9818 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9819 let expr2_0 = constructor_add_reg_sext32( 9820 ctx, pattern3_0, expr0_0, expr1_0, 9821 )?; 9822 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9823 return Some(expr3_0); 9824 } 9825 } 9826 } 9827 } 9828 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9829 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9830 if let &InstructionData::Load { 9831 opcode: ref pattern10_0, 9832 arg: pattern10_1, 9833 flags: pattern10_2, 9834 offset: pattern10_3, 9835 } = &pattern9_0 9836 { 9837 match pattern10_0 { 9838 &Opcode::Sload16 => { 9839 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9840 // Rule at src/isa/s390x/lower.isle line 92. 9841 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9842 let expr1_0 = 9843 constructor_sink_sload16(ctx, pattern8_0)?; 9844 let expr2_0 = constructor_add_mem_sext16( 9845 ctx, pattern3_0, expr0_0, &expr1_0, 9846 )?; 9847 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9848 return Some(expr3_0); 9849 } 9850 } 9851 &Opcode::Sload32 => { 9852 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9853 // Rule at src/isa/s390x/lower.isle line 96. 9854 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9855 let expr1_0 = 9856 constructor_sink_sload32(ctx, pattern8_0)?; 9857 let expr2_0 = constructor_add_mem_sext32( 9858 ctx, pattern3_0, expr0_0, &expr1_0, 9859 )?; 9860 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9861 return Some(expr3_0); 9862 } 9863 } 9864 _ => {} 9865 } 9866 } 9867 } 9868 let pattern8_0 = C::value_type(ctx, pattern7_1); 9869 if pattern8_0 == I16 { 9870 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9871 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9872 if let &InstructionData::Load { 9873 opcode: ref pattern12_0, 9874 arg: pattern12_1, 9875 flags: pattern12_2, 9876 offset: pattern12_3, 9877 } = &pattern11_0 9878 { 9879 if let &Opcode::Load = pattern12_0 { 9880 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9881 // Rule at src/isa/s390x/lower.isle line 86. 9882 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9883 let expr1_0 = 9884 constructor_sink_load(ctx, pattern10_0)?; 9885 let expr2_0 = constructor_add_mem_sext16( 9886 ctx, pattern3_0, expr0_0, &expr1_0, 9887 )?; 9888 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9889 return Some(expr3_0); 9890 } 9891 } 9892 } 9893 } 9894 } 9895 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9896 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9897 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9898 if let &InstructionData::Load { 9899 opcode: ref pattern12_0, 9900 arg: pattern12_1, 9901 flags: pattern12_2, 9902 offset: pattern12_3, 9903 } = &pattern11_0 9904 { 9905 if let &Opcode::Load = pattern12_0 { 9906 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9907 // Rule at src/isa/s390x/lower.isle line 80. 9908 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9909 let expr1_0 = 9910 constructor_sink_load(ctx, pattern10_0)?; 9911 let expr2_0 = constructor_add_mem( 9912 ctx, pattern3_0, expr0_0, &expr1_0, 9913 )?; 9914 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9915 return Some(expr3_0); 9916 } 9917 } 9918 } 9919 } 9920 } 9921 // Rule at src/isa/s390x/lower.isle line 60. 9922 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9923 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9924 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9925 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9926 return Some(expr3_0); 9927 } 9928 &Opcode::Isub => { 9929 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9930 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9931 // Rule at src/isa/s390x/lower.isle line 113. 9932 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9933 let expr1_0 = 9934 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9935 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9936 return Some(expr2_0); 9937 } 9938 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9939 // Rule at src/isa/s390x/lower.isle line 115. 9940 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9941 let expr1_0 = 9942 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9943 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9944 return Some(expr2_0); 9945 } 9946 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9947 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9948 if let &InstructionData::Unary { 9949 opcode: ref pattern10_0, 9950 arg: pattern10_1, 9951 } = &pattern9_0 9952 { 9953 if let &Opcode::Sextend = pattern10_0 { 9954 let pattern12_0 = C::value_type(ctx, pattern10_1); 9955 if pattern12_0 == I32 { 9956 // Rule at src/isa/s390x/lower.isle line 109. 9957 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9958 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9959 let expr2_0 = constructor_sub_reg_sext32( 9960 ctx, pattern3_0, expr0_0, expr1_0, 9961 )?; 9962 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9963 return Some(expr3_0); 9964 } 9965 } 9966 } 9967 } 9968 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9969 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9970 if let &InstructionData::Load { 9971 opcode: ref pattern10_0, 9972 arg: pattern10_1, 9973 flags: pattern10_2, 9974 offset: pattern10_3, 9975 } = &pattern9_0 9976 { 9977 match pattern10_0 { 9978 &Opcode::Sload16 => { 9979 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9980 // Rule at src/isa/s390x/lower.isle line 127. 9981 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9982 let expr1_0 = 9983 constructor_sink_sload16(ctx, pattern8_0)?; 9984 let expr2_0 = constructor_sub_mem_sext16( 9985 ctx, pattern3_0, expr0_0, &expr1_0, 9986 )?; 9987 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9988 return Some(expr3_0); 9989 } 9990 } 9991 &Opcode::Sload32 => { 9992 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9993 // Rule at src/isa/s390x/lower.isle line 129. 9994 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9995 let expr1_0 = 9996 constructor_sink_sload32(ctx, pattern8_0)?; 9997 let expr2_0 = constructor_sub_mem_sext32( 9998 ctx, pattern3_0, expr0_0, &expr1_0, 9999 )?; 10000 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10001 return Some(expr3_0); 10002 } 10003 } 10004 _ => {} 10005 } 10006 } 10007 } 10008 let pattern8_0 = C::value_type(ctx, pattern7_1); 10009 if pattern8_0 == I16 { 10010 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10011 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10012 if let &InstructionData::Load { 10013 opcode: ref pattern12_0, 10014 arg: pattern12_1, 10015 flags: pattern12_2, 10016 offset: pattern12_3, 10017 } = &pattern11_0 10018 { 10019 if let &Opcode::Load = pattern12_0 { 10020 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10021 // Rule at src/isa/s390x/lower.isle line 123. 10022 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10023 let expr1_0 = 10024 constructor_sink_load(ctx, pattern10_0)?; 10025 let expr2_0 = constructor_sub_mem_sext16( 10026 ctx, pattern3_0, expr0_0, &expr1_0, 10027 )?; 10028 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10029 return Some(expr3_0); 10030 } 10031 } 10032 } 10033 } 10034 } 10035 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10036 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10037 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10038 if let &InstructionData::Load { 10039 opcode: ref pattern12_0, 10040 arg: pattern12_1, 10041 flags: pattern12_2, 10042 offset: pattern12_3, 10043 } = &pattern11_0 10044 { 10045 if let &Opcode::Load = pattern12_0 { 10046 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10047 // Rule at src/isa/s390x/lower.isle line 119. 10048 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10049 let expr1_0 = 10050 constructor_sink_load(ctx, pattern10_0)?; 10051 let expr2_0 = constructor_sub_mem( 10052 ctx, pattern3_0, expr0_0, &expr1_0, 10053 )?; 10054 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10055 return Some(expr3_0); 10056 } 10057 } 10058 } 10059 } 10060 } 10061 // Rule at src/isa/s390x/lower.isle line 105. 10062 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10063 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10064 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10065 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10066 return Some(expr3_0); 10067 } 10068 &Opcode::Imul => { 10069 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10070 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10071 // Rule at src/isa/s390x/lower.isle line 212. 10072 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10073 let expr1_0 = 10074 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10075 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10076 return Some(expr2_0); 10077 } 10078 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10079 // Rule at src/isa/s390x/lower.isle line 216. 10080 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10081 let expr1_0 = 10082 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10083 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10084 return Some(expr2_0); 10085 } 10086 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10087 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10088 if let &InstructionData::Unary { 10089 opcode: ref pattern10_0, 10090 arg: pattern10_1, 10091 } = &pattern9_0 10092 { 10093 if let &Opcode::Sextend = pattern10_0 { 10094 let pattern12_0 = C::value_type(ctx, pattern10_1); 10095 if pattern12_0 == I32 { 10096 // Rule at src/isa/s390x/lower.isle line 206. 10097 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10098 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10099 let expr2_0 = constructor_mul_reg_sext32( 10100 ctx, pattern3_0, expr0_0, expr1_0, 10101 )?; 10102 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10103 return Some(expr3_0); 10104 } 10105 } 10106 } 10107 } 10108 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10109 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10110 if let &InstructionData::Load { 10111 opcode: ref pattern10_0, 10112 arg: pattern10_1, 10113 flags: pattern10_2, 10114 offset: pattern10_3, 10115 } = &pattern9_0 10116 { 10117 match pattern10_0 { 10118 &Opcode::Sload16 => { 10119 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10120 // Rule at src/isa/s390x/lower.isle line 234. 10121 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10122 let expr1_0 = 10123 constructor_sink_sload16(ctx, pattern8_0)?; 10124 let expr2_0 = constructor_mul_mem_sext16( 10125 ctx, pattern3_0, expr0_0, &expr1_0, 10126 )?; 10127 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10128 return Some(expr3_0); 10129 } 10130 } 10131 &Opcode::Sload32 => { 10132 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10133 // Rule at src/isa/s390x/lower.isle line 238. 10134 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10135 let expr1_0 = 10136 constructor_sink_sload32(ctx, pattern8_0)?; 10137 let expr2_0 = constructor_mul_mem_sext32( 10138 ctx, pattern3_0, expr0_0, &expr1_0, 10139 )?; 10140 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10141 return Some(expr3_0); 10142 } 10143 } 10144 _ => {} 10145 } 10146 } 10147 } 10148 let pattern8_0 = C::value_type(ctx, pattern7_0); 10149 if pattern8_0 == I16 { 10150 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10151 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10152 if let &InstructionData::Load { 10153 opcode: ref pattern12_0, 10154 arg: pattern12_1, 10155 flags: pattern12_2, 10156 offset: pattern12_3, 10157 } = &pattern11_0 10158 { 10159 if let &Opcode::Load = pattern12_0 { 10160 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10161 // Rule at src/isa/s390x/lower.isle line 228. 10162 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10163 let expr1_0 = 10164 constructor_sink_load(ctx, pattern10_0)?; 10165 let expr2_0 = constructor_mul_mem_sext16( 10166 ctx, pattern3_0, expr0_0, &expr1_0, 10167 )?; 10168 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10169 return Some(expr3_0); 10170 } 10171 } 10172 } 10173 } 10174 } 10175 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10176 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10177 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10178 if let &InstructionData::Load { 10179 opcode: ref pattern12_0, 10180 arg: pattern12_1, 10181 flags: pattern12_2, 10182 offset: pattern12_3, 10183 } = &pattern11_0 10184 { 10185 if let &Opcode::Load = pattern12_0 { 10186 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10187 // Rule at src/isa/s390x/lower.isle line 222. 10188 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10189 let expr1_0 = 10190 constructor_sink_load(ctx, pattern10_0)?; 10191 let expr2_0 = constructor_mul_mem( 10192 ctx, pattern3_0, expr0_0, &expr1_0, 10193 )?; 10194 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10195 return Some(expr3_0); 10196 } 10197 } 10198 } 10199 } 10200 } 10201 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10202 // Rule at src/isa/s390x/lower.isle line 210. 10203 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10204 let expr1_0 = 10205 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10206 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10207 return Some(expr2_0); 10208 } 10209 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10210 // Rule at src/isa/s390x/lower.isle line 214. 10211 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10212 let expr1_0 = 10213 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10214 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10215 return Some(expr2_0); 10216 } 10217 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10218 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10219 if let &InstructionData::Unary { 10220 opcode: ref pattern10_0, 10221 arg: pattern10_1, 10222 } = &pattern9_0 10223 { 10224 if let &Opcode::Sextend = pattern10_0 { 10225 let pattern12_0 = C::value_type(ctx, pattern10_1); 10226 if pattern12_0 == I32 { 10227 // Rule at src/isa/s390x/lower.isle line 204. 10228 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10229 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10230 let expr2_0 = constructor_mul_reg_sext32( 10231 ctx, pattern3_0, expr0_0, expr1_0, 10232 )?; 10233 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10234 return Some(expr3_0); 10235 } 10236 } 10237 } 10238 } 10239 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10240 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10241 if let &InstructionData::Load { 10242 opcode: ref pattern10_0, 10243 arg: pattern10_1, 10244 flags: pattern10_2, 10245 offset: pattern10_3, 10246 } = &pattern9_0 10247 { 10248 match pattern10_0 { 10249 &Opcode::Sload16 => { 10250 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10251 // Rule at src/isa/s390x/lower.isle line 232. 10252 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10253 let expr1_0 = 10254 constructor_sink_sload16(ctx, pattern8_0)?; 10255 let expr2_0 = constructor_mul_mem_sext16( 10256 ctx, pattern3_0, expr0_0, &expr1_0, 10257 )?; 10258 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10259 return Some(expr3_0); 10260 } 10261 } 10262 &Opcode::Sload32 => { 10263 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10264 // Rule at src/isa/s390x/lower.isle line 236. 10265 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10266 let expr1_0 = 10267 constructor_sink_sload32(ctx, pattern8_0)?; 10268 let expr2_0 = constructor_mul_mem_sext32( 10269 ctx, pattern3_0, expr0_0, &expr1_0, 10270 )?; 10271 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10272 return Some(expr3_0); 10273 } 10274 } 10275 _ => {} 10276 } 10277 } 10278 } 10279 let pattern8_0 = C::value_type(ctx, pattern7_1); 10280 if pattern8_0 == I16 { 10281 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10282 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10283 if let &InstructionData::Load { 10284 opcode: ref pattern12_0, 10285 arg: pattern12_1, 10286 flags: pattern12_2, 10287 offset: pattern12_3, 10288 } = &pattern11_0 10289 { 10290 if let &Opcode::Load = pattern12_0 { 10291 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10292 // Rule at src/isa/s390x/lower.isle line 226. 10293 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10294 let expr1_0 = 10295 constructor_sink_load(ctx, pattern10_0)?; 10296 let expr2_0 = constructor_mul_mem_sext16( 10297 ctx, pattern3_0, expr0_0, &expr1_0, 10298 )?; 10299 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10300 return Some(expr3_0); 10301 } 10302 } 10303 } 10304 } 10305 } 10306 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10307 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10308 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10309 if let &InstructionData::Load { 10310 opcode: ref pattern12_0, 10311 arg: pattern12_1, 10312 flags: pattern12_2, 10313 offset: pattern12_3, 10314 } = &pattern11_0 10315 { 10316 if let &Opcode::Load = pattern12_0 { 10317 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10318 // Rule at src/isa/s390x/lower.isle line 220. 10319 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10320 let expr1_0 = 10321 constructor_sink_load(ctx, pattern10_0)?; 10322 let expr2_0 = constructor_mul_mem( 10323 ctx, pattern3_0, expr0_0, &expr1_0, 10324 )?; 10325 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10326 return Some(expr3_0); 10327 } 10328 } 10329 } 10330 } 10331 } 10332 // Rule at src/isa/s390x/lower.isle line 200. 10333 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10334 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10335 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10336 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10337 return Some(expr3_0); 10338 } 10339 &Opcode::Udiv => { 10340 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10341 // Rule at src/isa/s390x/lower.isle line 303. 10342 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10343 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10344 let expr2_0: u64 = 0; 10345 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10346 let expr4_0 = 10347 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10348 let expr5_0 = 10349 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10350 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10351 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10352 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10353 ctx, expr0_0, expr7_0, expr6_0, 10354 )?; 10355 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10356 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10357 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10358 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10359 return Some(expr12_0); 10360 } 10361 &Opcode::Sdiv => { 10362 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10363 // Rule at src/isa/s390x/lower.isle line 375. 10364 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10365 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10366 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10367 let expr3_0 = 10368 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10369 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10370 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10371 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10372 ctx, expr0_0, expr5_0, expr4_0, 10373 )?; 10374 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10375 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10376 )?; 10377 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10378 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10379 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10380 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10381 return Some(expr11_0); 10382 } 10383 &Opcode::Urem => { 10384 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10385 // Rule at src/isa/s390x/lower.isle line 326. 10386 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10387 let expr1_0: u64 = 0; 10388 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10389 let expr3_0 = 10390 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10391 let expr4_0 = 10392 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10393 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10394 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10395 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10396 ctx, expr0_0, expr6_0, expr5_0, 10397 )?; 10398 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10399 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10400 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10401 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10402 return Some(expr11_0); 10403 } 10404 &Opcode::Srem => { 10405 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10406 // Rule at src/isa/s390x/lower.isle line 398. 10407 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10408 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10409 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10410 let expr3_0 = 10411 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10412 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10413 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10414 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10415 ctx, expr0_0, expr5_0, expr4_0, 10416 )?; 10417 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10418 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10419 )?; 10420 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10421 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10422 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10423 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10424 return Some(expr11_0); 10425 } 10426 &Opcode::IaddIfcout => { 10427 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10428 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10429 // Rule at src/isa/s390x/lower.isle line 170. 10430 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10431 let expr1_0 = constructor_add_logical_zimm32( 10432 ctx, pattern3_0, expr0_0, pattern8_0, 10433 )?; 10434 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10435 return Some(expr2_0); 10436 } 10437 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10438 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10439 if let &InstructionData::Unary { 10440 opcode: ref pattern10_0, 10441 arg: pattern10_1, 10442 } = &pattern9_0 10443 { 10444 if let &Opcode::Uextend = pattern10_0 { 10445 let pattern12_0 = C::value_type(ctx, pattern10_1); 10446 if pattern12_0 == I32 { 10447 // Rule at src/isa/s390x/lower.isle line 164. 10448 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10449 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10450 let expr2_0 = constructor_add_logical_reg_zext32( 10451 ctx, pattern3_0, expr0_0, expr1_0, 10452 )?; 10453 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10454 return Some(expr3_0); 10455 } 10456 } 10457 } 10458 } 10459 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10460 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10461 if let &InstructionData::Load { 10462 opcode: ref pattern10_0, 10463 arg: pattern10_1, 10464 flags: pattern10_2, 10465 offset: pattern10_3, 10466 } = &pattern9_0 10467 { 10468 if let &Opcode::Uload32 = pattern10_0 { 10469 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10470 // Rule at src/isa/s390x/lower.isle line 182. 10471 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10472 let expr1_0 = 10473 constructor_sink_uload32(ctx, pattern8_0)?; 10474 let expr2_0 = constructor_add_logical_mem_zext32( 10475 ctx, pattern3_0, expr0_0, &expr1_0, 10476 )?; 10477 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10478 return Some(expr3_0); 10479 } 10480 } 10481 } 10482 } 10483 let pattern8_0 = C::value_type(ctx, pattern7_0); 10484 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10485 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10486 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10487 if let &InstructionData::Load { 10488 opcode: ref pattern12_0, 10489 arg: pattern12_1, 10490 flags: pattern12_2, 10491 offset: pattern12_3, 10492 } = &pattern11_0 10493 { 10494 if let &Opcode::Load = pattern12_0 { 10495 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10496 // Rule at src/isa/s390x/lower.isle line 176. 10497 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10498 let expr1_0 = 10499 constructor_sink_load(ctx, pattern10_0)?; 10500 let expr2_0 = constructor_add_logical_mem( 10501 ctx, pattern3_0, expr0_0, &expr1_0, 10502 )?; 10503 let expr3_0 = 10504 constructor_output_ifcout(ctx, expr2_0)?; 10505 return Some(expr3_0); 10506 } 10507 } 10508 } 10509 } 10510 } 10511 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10512 // Rule at src/isa/s390x/lower.isle line 168. 10513 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10514 let expr1_0 = constructor_add_logical_zimm32( 10515 ctx, pattern3_0, expr0_0, pattern8_0, 10516 )?; 10517 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10518 return Some(expr2_0); 10519 } 10520 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10521 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10522 if let &InstructionData::Unary { 10523 opcode: ref pattern10_0, 10524 arg: pattern10_1, 10525 } = &pattern9_0 10526 { 10527 if let &Opcode::Uextend = pattern10_0 { 10528 let pattern12_0 = C::value_type(ctx, pattern10_1); 10529 if pattern12_0 == I32 { 10530 // Rule at src/isa/s390x/lower.isle line 162. 10531 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10532 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10533 let expr2_0 = constructor_add_logical_reg_zext32( 10534 ctx, pattern3_0, expr0_0, expr1_0, 10535 )?; 10536 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10537 return Some(expr3_0); 10538 } 10539 } 10540 } 10541 } 10542 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10543 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10544 if let &InstructionData::Load { 10545 opcode: ref pattern10_0, 10546 arg: pattern10_1, 10547 flags: pattern10_2, 10548 offset: pattern10_3, 10549 } = &pattern9_0 10550 { 10551 if let &Opcode::Uload32 = pattern10_0 { 10552 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10553 // Rule at src/isa/s390x/lower.isle line 180. 10554 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10555 let expr1_0 = 10556 constructor_sink_uload32(ctx, pattern8_0)?; 10557 let expr2_0 = constructor_add_logical_mem_zext32( 10558 ctx, pattern3_0, expr0_0, &expr1_0, 10559 )?; 10560 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10561 return Some(expr3_0); 10562 } 10563 } 10564 } 10565 } 10566 let pattern8_0 = C::value_type(ctx, pattern7_1); 10567 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10568 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10569 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10570 if let &InstructionData::Load { 10571 opcode: ref pattern12_0, 10572 arg: pattern12_1, 10573 flags: pattern12_2, 10574 offset: pattern12_3, 10575 } = &pattern11_0 10576 { 10577 if let &Opcode::Load = pattern12_0 { 10578 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10579 // Rule at src/isa/s390x/lower.isle line 174. 10580 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10581 let expr1_0 = 10582 constructor_sink_load(ctx, pattern10_0)?; 10583 let expr2_0 = constructor_add_logical_mem( 10584 ctx, pattern3_0, expr0_0, &expr1_0, 10585 )?; 10586 let expr3_0 = 10587 constructor_output_ifcout(ctx, expr2_0)?; 10588 return Some(expr3_0); 10589 } 10590 } 10591 } 10592 } 10593 } 10594 // Rule at src/isa/s390x/lower.isle line 158. 10595 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10596 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10597 let expr2_0 = 10598 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10599 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10600 return Some(expr3_0); 10601 } 10602 &Opcode::Band => { 10603 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10604 let pattern8_0 = C::value_type(ctx, pattern7_0); 10605 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10606 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10607 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10608 if let &InstructionData::Load { 10609 opcode: ref pattern12_0, 10610 arg: pattern12_1, 10611 flags: pattern12_2, 10612 offset: pattern12_3, 10613 } = &pattern11_0 10614 { 10615 if let &Opcode::Load = pattern12_0 { 10616 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10617 // Rule at src/isa/s390x/lower.isle line 653. 10618 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10619 let expr1_0 = 10620 constructor_sink_load(ctx, pattern10_0)?; 10621 let expr2_0 = constructor_and_mem( 10622 ctx, pattern3_0, expr0_0, &expr1_0, 10623 )?; 10624 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10625 return Some(expr3_0); 10626 } 10627 } 10628 } 10629 } 10630 } 10631 if let Some(pattern8_0) = 10632 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10633 { 10634 // Rule at src/isa/s390x/lower.isle line 647. 10635 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10636 let expr1_0 = constructor_and_uimm32shifted( 10637 ctx, pattern3_0, expr0_0, pattern8_0, 10638 )?; 10639 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10640 return Some(expr2_0); 10641 } 10642 if let Some(pattern8_0) = 10643 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10644 { 10645 // Rule at src/isa/s390x/lower.isle line 643. 10646 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10647 let expr1_0 = constructor_and_uimm16shifted( 10648 ctx, pattern3_0, expr0_0, pattern8_0, 10649 )?; 10650 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10651 return Some(expr2_0); 10652 } 10653 let pattern8_0 = C::value_type(ctx, pattern7_1); 10654 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10655 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10656 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10657 if let &InstructionData::Load { 10658 opcode: ref pattern12_0, 10659 arg: pattern12_1, 10660 flags: pattern12_2, 10661 offset: pattern12_3, 10662 } = &pattern11_0 10663 { 10664 if let &Opcode::Load = pattern12_0 { 10665 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10666 // Rule at src/isa/s390x/lower.isle line 651. 10667 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10668 let expr1_0 = 10669 constructor_sink_load(ctx, pattern10_0)?; 10670 let expr2_0 = constructor_and_mem( 10671 ctx, pattern3_0, expr0_0, &expr1_0, 10672 )?; 10673 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10674 return Some(expr3_0); 10675 } 10676 } 10677 } 10678 } 10679 } 10680 if let Some(pattern8_0) = 10681 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10682 { 10683 // Rule at src/isa/s390x/lower.isle line 645. 10684 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10685 let expr1_0 = constructor_and_uimm32shifted( 10686 ctx, pattern3_0, expr0_0, pattern8_0, 10687 )?; 10688 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10689 return Some(expr2_0); 10690 } 10691 if let Some(pattern8_0) = 10692 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10693 { 10694 // Rule at src/isa/s390x/lower.isle line 641. 10695 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10696 let expr1_0 = constructor_and_uimm16shifted( 10697 ctx, pattern3_0, expr0_0, pattern8_0, 10698 )?; 10699 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10700 return Some(expr2_0); 10701 } 10702 // Rule at src/isa/s390x/lower.isle line 637. 10703 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10704 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10705 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10706 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10707 return Some(expr3_0); 10708 } 10709 &Opcode::Bor => { 10710 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10711 let pattern8_0 = C::value_type(ctx, pattern7_0); 10712 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10713 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10714 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10715 if let &InstructionData::Load { 10716 opcode: ref pattern12_0, 10717 arg: pattern12_1, 10718 flags: pattern12_2, 10719 offset: pattern12_3, 10720 } = &pattern11_0 10721 { 10722 if let &Opcode::Load = pattern12_0 { 10723 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10724 // Rule at src/isa/s390x/lower.isle line 676. 10725 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10726 let expr1_0 = 10727 constructor_sink_load(ctx, pattern10_0)?; 10728 let expr2_0 = constructor_or_mem( 10729 ctx, pattern3_0, expr0_0, &expr1_0, 10730 )?; 10731 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10732 return Some(expr3_0); 10733 } 10734 } 10735 } 10736 } 10737 } 10738 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10739 // Rule at src/isa/s390x/lower.isle line 670. 10740 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10741 let expr1_0 = constructor_or_uimm32shifted( 10742 ctx, pattern3_0, expr0_0, pattern8_0, 10743 )?; 10744 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10745 return Some(expr2_0); 10746 } 10747 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10748 // Rule at src/isa/s390x/lower.isle line 666. 10749 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10750 let expr1_0 = constructor_or_uimm16shifted( 10751 ctx, pattern3_0, expr0_0, pattern8_0, 10752 )?; 10753 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10754 return Some(expr2_0); 10755 } 10756 let pattern8_0 = C::value_type(ctx, pattern7_1); 10757 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10758 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10759 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10760 if let &InstructionData::Load { 10761 opcode: ref pattern12_0, 10762 arg: pattern12_1, 10763 flags: pattern12_2, 10764 offset: pattern12_3, 10765 } = &pattern11_0 10766 { 10767 if let &Opcode::Load = pattern12_0 { 10768 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10769 // Rule at src/isa/s390x/lower.isle line 674. 10770 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10771 let expr1_0 = 10772 constructor_sink_load(ctx, pattern10_0)?; 10773 let expr2_0 = constructor_or_mem( 10774 ctx, pattern3_0, expr0_0, &expr1_0, 10775 )?; 10776 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10777 return Some(expr3_0); 10778 } 10779 } 10780 } 10781 } 10782 } 10783 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10784 // Rule at src/isa/s390x/lower.isle line 668. 10785 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10786 let expr1_0 = constructor_or_uimm32shifted( 10787 ctx, pattern3_0, expr0_0, pattern8_0, 10788 )?; 10789 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10790 return Some(expr2_0); 10791 } 10792 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10793 // Rule at src/isa/s390x/lower.isle line 664. 10794 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10795 let expr1_0 = constructor_or_uimm16shifted( 10796 ctx, pattern3_0, expr0_0, pattern8_0, 10797 )?; 10798 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10799 return Some(expr2_0); 10800 } 10801 // Rule at src/isa/s390x/lower.isle line 660. 10802 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10803 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10804 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10805 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10806 return Some(expr3_0); 10807 } 10808 &Opcode::Bxor => { 10809 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10810 let pattern8_0 = C::value_type(ctx, pattern7_0); 10811 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10812 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10813 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10814 if let &InstructionData::Load { 10815 opcode: ref pattern12_0, 10816 arg: pattern12_1, 10817 flags: pattern12_2, 10818 offset: pattern12_3, 10819 } = &pattern11_0 10820 { 10821 if let &Opcode::Load = pattern12_0 { 10822 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10823 // Rule at src/isa/s390x/lower.isle line 695. 10824 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10825 let expr1_0 = 10826 constructor_sink_load(ctx, pattern10_0)?; 10827 let expr2_0 = constructor_xor_mem( 10828 ctx, pattern3_0, expr0_0, &expr1_0, 10829 )?; 10830 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10831 return Some(expr3_0); 10832 } 10833 } 10834 } 10835 } 10836 } 10837 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10838 // Rule at src/isa/s390x/lower.isle line 689. 10839 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10840 let expr1_0 = constructor_xor_uimm32shifted( 10841 ctx, pattern3_0, expr0_0, pattern8_0, 10842 )?; 10843 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10844 return Some(expr2_0); 10845 } 10846 let pattern8_0 = C::value_type(ctx, pattern7_1); 10847 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10848 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10849 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10850 if let &InstructionData::Load { 10851 opcode: ref pattern12_0, 10852 arg: pattern12_1, 10853 flags: pattern12_2, 10854 offset: pattern12_3, 10855 } = &pattern11_0 10856 { 10857 if let &Opcode::Load = pattern12_0 { 10858 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10859 // Rule at src/isa/s390x/lower.isle line 693. 10860 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10861 let expr1_0 = 10862 constructor_sink_load(ctx, pattern10_0)?; 10863 let expr2_0 = constructor_xor_mem( 10864 ctx, pattern3_0, expr0_0, &expr1_0, 10865 )?; 10866 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10867 return Some(expr3_0); 10868 } 10869 } 10870 } 10871 } 10872 } 10873 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10874 // Rule at src/isa/s390x/lower.isle line 687. 10875 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10876 let expr1_0 = constructor_xor_uimm32shifted( 10877 ctx, pattern3_0, expr0_0, pattern8_0, 10878 )?; 10879 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10880 return Some(expr2_0); 10881 } 10882 // Rule at src/isa/s390x/lower.isle line 683. 10883 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10884 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10885 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10886 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10887 return Some(expr3_0); 10888 } 10889 &Opcode::Ishl => { 10890 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10891 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10892 // Rule at src/isa/s390x/lower.isle line 482. 10893 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10894 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10895 let expr2_0 = 10896 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10897 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10898 return Some(expr3_0); 10899 } 10900 // Rule at src/isa/s390x/lower.isle line 477. 10901 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10902 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10903 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10904 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10905 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10906 return Some(expr4_0); 10907 } 10908 &Opcode::Ushr => { 10909 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10910 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10911 // Rule at src/isa/s390x/lower.isle line 498. 10912 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10913 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10914 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10915 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10916 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10917 return Some(expr4_0); 10918 } 10919 // Rule at src/isa/s390x/lower.isle line 491. 10920 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10921 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10922 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10923 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10924 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10925 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10926 return Some(expr5_0); 10927 } 10928 &Opcode::Sshr => { 10929 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10930 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10931 // Rule at src/isa/s390x/lower.isle line 515. 10932 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10933 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10934 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10935 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10936 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10937 return Some(expr4_0); 10938 } 10939 // Rule at src/isa/s390x/lower.isle line 508. 10940 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10941 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10942 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10943 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10944 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10945 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10946 return Some(expr5_0); 10947 } 10948 _ => {} 10949 } 10950 } 10951 &InstructionData::Unary { 10952 opcode: ref pattern5_0, 10953 arg: pattern5_1, 10954 } => { 10955 match pattern5_0 { 10956 &Opcode::Ineg => { 10957 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10958 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10959 if let &InstructionData::Unary { 10960 opcode: ref pattern9_0, 10961 arg: pattern9_1, 10962 } = &pattern8_0 10963 { 10964 if let &Opcode::Sextend = pattern9_0 { 10965 let pattern11_0 = C::value_type(ctx, pattern9_1); 10966 if pattern11_0 == I32 { 10967 // Rule at src/isa/s390x/lower.isle line 193. 10968 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10969 let expr1_0 = constructor_neg_reg_sext32( 10970 ctx, pattern3_0, expr0_0, 10971 )?; 10972 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10973 return Some(expr2_0); 10974 } 10975 } 10976 } 10977 } 10978 // Rule at src/isa/s390x/lower.isle line 189. 10979 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10980 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10981 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10982 return Some(expr2_0); 10983 } 10984 &Opcode::Iabs => { 10985 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10986 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10987 if let &InstructionData::Unary { 10988 opcode: ref pattern9_0, 10989 arg: pattern9_1, 10990 } = &pattern8_0 10991 { 10992 if let &Opcode::Sextend = pattern9_0 { 10993 let pattern11_0 = C::value_type(ctx, pattern9_1); 10994 if pattern11_0 == I32 { 10995 // Rule at src/isa/s390x/lower.isle line 141. 10996 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10997 let expr1_0 = constructor_abs_reg_sext32( 10998 ctx, pattern3_0, expr0_0, 10999 )?; 11000 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 11001 return Some(expr2_0); 11002 } 11003 } 11004 } 11005 } 11006 // Rule at src/isa/s390x/lower.isle line 137. 11007 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11008 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11009 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 11010 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11011 return Some(expr3_0); 11012 } 11013 &Opcode::Clz => { 11014 // Rule at src/isa/s390x/lower.isle line 821. 11015 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11016 let expr1_0: i16 = 64; 11017 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 11018 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 11019 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 11020 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11021 return Some(expr5_0); 11022 } 11023 &Opcode::Cls => { 11024 // Rule at src/isa/s390x/lower.isle line 836. 11025 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11026 let expr1_0: Type = I64; 11027 let expr2_0: u8 = 63; 11028 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11029 let expr4_0: Type = I64; 11030 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11031 let expr6_0: i16 = 64; 11032 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11033 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11034 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11035 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11036 return Some(expr10_0); 11037 } 11038 &Opcode::Bint => { 11039 // Rule at src/isa/s390x/lower.isle line 804. 11040 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11041 let expr1_0: u64 = 1; 11042 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11043 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11044 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11045 return Some(expr4_0); 11046 } 11047 _ => {} 11048 } 11049 } 11050 _ => {} 11051 } 11052 } 11053 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11054 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11055 match &pattern4_0 { 11056 &InstructionData::Binary { 11057 opcode: ref pattern5_0, 11058 args: ref pattern5_1, 11059 } => { 11060 match pattern5_0 { 11061 &Opcode::Rotl => { 11062 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11063 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11064 // Rule at src/isa/s390x/lower.isle line 528. 11065 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11066 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11067 let expr2_0 = 11068 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11069 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11070 return Some(expr3_0); 11071 } 11072 // Rule at src/isa/s390x/lower.isle line 524. 11073 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11074 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11075 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11076 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11077 return Some(expr3_0); 11078 } 11079 &Opcode::Rotr => { 11080 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11081 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11082 // Rule at src/isa/s390x/lower.isle line 566. 11083 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11084 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11085 let expr2_0 = 11086 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11087 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11088 return Some(expr3_0); 11089 } 11090 // Rule at src/isa/s390x/lower.isle line 560. 11091 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11092 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11093 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11094 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11095 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11096 return Some(expr4_0); 11097 } 11098 _ => {} 11099 } 11100 } 11101 &InstructionData::AtomicRmw { 11102 opcode: ref pattern5_0, 11103 args: ref pattern5_1, 11104 flags: pattern5_2, 11105 op: ref pattern5_3, 11106 } => { 11107 if let &Opcode::AtomicRmw = pattern5_0 { 11108 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11109 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11110 match pattern5_3 { 11111 &AtomicRmwOp::And => { 11112 // Rule at src/isa/s390x/lower.isle line 1505. 11113 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11114 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11115 let expr2_0 = C::zero_offset(ctx); 11116 let expr3_0 = constructor_lower_address( 11117 ctx, pattern5_2, pattern7_0, expr2_0, 11118 )?; 11119 let expr4_0 = constructor_atomic_rmw_and( 11120 ctx, pattern3_0, expr1_0, &expr3_0, 11121 )?; 11122 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11123 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11124 return Some(expr6_0); 11125 } 11126 &AtomicRmwOp::Or => { 11127 // Rule at src/isa/s390x/lower.isle line 1517. 11128 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11129 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11130 let expr2_0 = C::zero_offset(ctx); 11131 let expr3_0 = constructor_lower_address( 11132 ctx, pattern5_2, pattern7_0, expr2_0, 11133 )?; 11134 let expr4_0 = constructor_atomic_rmw_or( 11135 ctx, pattern3_0, expr1_0, &expr3_0, 11136 )?; 11137 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11138 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11139 return Some(expr6_0); 11140 } 11141 &AtomicRmwOp::Xor => { 11142 // Rule at src/isa/s390x/lower.isle line 1529. 11143 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11144 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11145 let expr2_0 = C::zero_offset(ctx); 11146 let expr3_0 = constructor_lower_address( 11147 ctx, pattern5_2, pattern7_0, expr2_0, 11148 )?; 11149 let expr4_0 = constructor_atomic_rmw_xor( 11150 ctx, pattern3_0, expr1_0, &expr3_0, 11151 )?; 11152 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11153 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11154 return Some(expr6_0); 11155 } 11156 _ => {} 11157 } 11158 } 11159 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11160 match pattern5_3 { 11161 &AtomicRmwOp::Add => { 11162 // Rule at src/isa/s390x/lower.isle line 1535. 11163 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11164 let expr1_0 = C::zero_offset(ctx); 11165 let expr2_0 = constructor_lower_address( 11166 ctx, pattern5_2, pattern7_0, expr1_0, 11167 )?; 11168 let expr3_0 = constructor_atomic_rmw_add( 11169 ctx, pattern3_0, expr0_0, &expr2_0, 11170 )?; 11171 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11172 return Some(expr4_0); 11173 } 11174 &AtomicRmwOp::And => { 11175 // Rule at src/isa/s390x/lower.isle line 1499. 11176 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11177 let expr1_0 = C::zero_offset(ctx); 11178 let expr2_0 = constructor_lower_address( 11179 ctx, pattern5_2, pattern7_0, expr1_0, 11180 )?; 11181 let expr3_0 = constructor_atomic_rmw_and( 11182 ctx, pattern3_0, expr0_0, &expr2_0, 11183 )?; 11184 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11185 return Some(expr4_0); 11186 } 11187 &AtomicRmwOp::Or => { 11188 // Rule at src/isa/s390x/lower.isle line 1511. 11189 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11190 let expr1_0 = C::zero_offset(ctx); 11191 let expr2_0 = constructor_lower_address( 11192 ctx, pattern5_2, pattern7_0, expr1_0, 11193 )?; 11194 let expr3_0 = constructor_atomic_rmw_or( 11195 ctx, pattern3_0, expr0_0, &expr2_0, 11196 )?; 11197 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11198 return Some(expr4_0); 11199 } 11200 &AtomicRmwOp::Sub => { 11201 // Rule at src/isa/s390x/lower.isle line 1541. 11202 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11203 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11204 let expr2_0 = C::zero_offset(ctx); 11205 let expr3_0 = constructor_lower_address( 11206 ctx, pattern5_2, pattern7_0, expr2_0, 11207 )?; 11208 let expr4_0 = constructor_atomic_rmw_add( 11209 ctx, pattern3_0, expr1_0, &expr3_0, 11210 )?; 11211 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11212 return Some(expr5_0); 11213 } 11214 &AtomicRmwOp::Xor => { 11215 // Rule at src/isa/s390x/lower.isle line 1523. 11216 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11217 let expr1_0 = C::zero_offset(ctx); 11218 let expr2_0 = constructor_lower_address( 11219 ctx, pattern5_2, pattern7_0, expr1_0, 11220 )?; 11221 let expr3_0 = constructor_atomic_rmw_xor( 11222 ctx, pattern3_0, expr0_0, &expr2_0, 11223 )?; 11224 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11225 return Some(expr4_0); 11226 } 11227 _ => {} 11228 } 11229 } 11230 // Rule at src/isa/s390x/lower.isle line 1550. 11231 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11232 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11233 let expr2_0 = C::inst_builder_new(ctx); 11234 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11235 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11236 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11237 let expr6_0 = constructor_atomic_rmw_body( 11238 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11239 expr0_0, 11240 )?; 11241 let expr7_0 = constructor_casloop( 11242 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11243 )?; 11244 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11245 return Some(expr8_0); 11246 } 11247 } 11248 &InstructionData::AtomicCas { 11249 opcode: ref pattern5_0, 11250 args: ref pattern5_1, 11251 flags: pattern5_2, 11252 } => { 11253 if let &Opcode::AtomicCas = pattern5_0 { 11254 let (pattern7_0, pattern7_1, pattern7_2) = 11255 C::unpack_value_array_3(ctx, pattern5_1); 11256 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11257 // Rule at src/isa/s390x/lower.isle line 1762. 11258 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11259 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11260 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11261 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11262 let expr4_0 = C::zero_offset(ctx); 11263 let expr5_0 = 11264 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11265 let expr6_0 = constructor_atomic_cas_impl( 11266 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11267 )?; 11268 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11269 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11270 return Some(expr8_0); 11271 } 11272 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11273 // Rule at src/isa/s390x/lower.isle line 1755. 11274 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11275 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11276 let expr2_0 = C::zero_offset(ctx); 11277 let expr3_0 = 11278 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11279 let expr4_0 = constructor_atomic_cas_impl( 11280 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11281 )?; 11282 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11283 return Some(expr5_0); 11284 } 11285 } 11286 } 11287 &InstructionData::Unary { 11288 opcode: ref pattern5_0, 11289 arg: pattern5_1, 11290 } => { 11291 match pattern5_0 { 11292 &Opcode::FcvtToUint => { 11293 let pattern7_0 = C::value_type(ctx, pattern5_1); 11294 // Rule at src/isa/s390x/lower.isle line 1057. 11295 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11296 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11297 let expr2_0 = FloatCC::Unordered; 11298 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11299 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11300 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11301 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11302 ctx, pattern3_0, pattern7_0, expr0_0, 11303 )?; 11304 let expr7_0 = FloatCC::Unordered; 11305 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11306 let expr9_0 = C::trap_code_integer_overflow(ctx); 11307 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11308 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11309 return Some(expr11_0); 11310 } 11311 &Opcode::FcvtToUintSat => { 11312 let pattern7_0 = C::value_type(ctx, pattern5_1); 11313 // Rule at src/isa/s390x/lower.isle line 1098. 11314 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11315 let expr1_0 = 11316 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11317 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11318 let expr3_0 = FloatCC::Unordered; 11319 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11320 let expr5_0: i16 = 0; 11321 let expr6_0 = 11322 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11323 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11324 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11325 return Some(expr8_0); 11326 } 11327 &Opcode::FcvtToSint => { 11328 let pattern7_0 = C::value_type(ctx, pattern5_1); 11329 // Rule at src/isa/s390x/lower.isle line 1078. 11330 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11331 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11332 let expr2_0 = FloatCC::Unordered; 11333 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11334 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11335 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11336 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11337 ctx, pattern3_0, pattern7_0, expr0_0, 11338 )?; 11339 let expr7_0 = FloatCC::Unordered; 11340 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11341 let expr9_0 = C::trap_code_integer_overflow(ctx); 11342 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11343 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11344 return Some(expr11_0); 11345 } 11346 &Opcode::FcvtToSintSat => { 11347 let pattern7_0 = C::value_type(ctx, pattern5_1); 11348 // Rule at src/isa/s390x/lower.isle line 1115. 11349 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11350 let expr1_0 = 11351 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11352 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11353 let expr3_0 = FloatCC::Unordered; 11354 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11355 let expr5_0: i16 = 0; 11356 let expr6_0 = 11357 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11358 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11359 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11360 return Some(expr8_0); 11361 } 11362 _ => {} 11363 } 11364 } 11365 _ => {} 11366 } 11367 } 11368 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11369 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11370 match &pattern4_0 { 11371 &InstructionData::Binary { 11372 opcode: ref pattern5_0, 11373 args: ref pattern5_1, 11374 } => { 11375 match pattern5_0 { 11376 &Opcode::Umulhi => { 11377 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11378 // Rule at src/isa/s390x/lower.isle line 245. 11379 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11380 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11381 let expr2_0: Type = I32; 11382 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11383 let expr4_0: Type = I32; 11384 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11385 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11386 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11387 return Some(expr7_0); 11388 } 11389 &Opcode::Smulhi => { 11390 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11391 // Rule at src/isa/s390x/lower.isle line 267. 11392 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11393 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11394 let expr2_0: Type = I32; 11395 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11396 let expr4_0: Type = I32; 11397 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11398 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11399 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11400 return Some(expr7_0); 11401 } 11402 &Opcode::Rotl => { 11403 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11404 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11405 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11406 { 11407 // Rule at src/isa/s390x/lower.isle line 546. 11408 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11409 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11410 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11411 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11412 let expr4_0 = 11413 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11414 let expr5_0 = 11415 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11416 let expr6_0 = 11417 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11418 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11419 return Some(expr7_0); 11420 } 11421 } 11422 // Rule at src/isa/s390x/lower.isle line 534. 11423 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11424 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11425 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11426 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11427 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11428 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11429 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11430 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11431 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11432 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11433 return Some(expr9_0); 11434 } 11435 &Opcode::Rotr => { 11436 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11437 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11438 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11439 { 11440 // Rule at src/isa/s390x/lower.isle line 584. 11441 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11442 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11443 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11444 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11445 let expr4_0 = 11446 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11447 let expr5_0 = 11448 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11449 let expr6_0 = 11450 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11451 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11452 return Some(expr7_0); 11453 } 11454 } 11455 // Rule at src/isa/s390x/lower.isle line 572. 11456 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11457 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11458 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11459 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11460 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11461 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11462 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11463 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11464 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11465 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11466 return Some(expr9_0); 11467 } 11468 _ => {} 11469 } 11470 } 11471 &InstructionData::AtomicRmw { 11472 opcode: ref pattern5_0, 11473 args: ref pattern5_1, 11474 flags: pattern5_2, 11475 op: ref pattern5_3, 11476 } => { 11477 if let &Opcode::AtomicRmw = pattern5_0 { 11478 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11479 // Rule at src/isa/s390x/lower.isle line 1562. 11480 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11481 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11482 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11483 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11484 let expr4_0 = C::inst_builder_new(ctx); 11485 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11486 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11487 let expr7_0 = constructor_casloop_rotate_in( 11488 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11489 )?; 11490 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11491 let expr9_0 = constructor_atomic_rmw_body( 11492 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11493 expr0_0, 11494 )?; 11495 let expr10_0 = constructor_casloop_rotate_out( 11496 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11497 )?; 11498 let expr11_0 = constructor_casloop_subword( 11499 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11500 )?; 11501 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11502 return Some(expr12_0); 11503 } 11504 } 11505 &InstructionData::AtomicCas { 11506 opcode: ref pattern5_0, 11507 args: ref pattern5_1, 11508 flags: pattern5_2, 11509 } => { 11510 if let &Opcode::AtomicCas = pattern5_0 { 11511 let (pattern7_0, pattern7_1, pattern7_2) = 11512 C::unpack_value_array_3(ctx, pattern5_1); 11513 // Rule at src/isa/s390x/lower.isle line 1769. 11514 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11515 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11516 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11517 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11518 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11519 let expr5_0 = C::inst_builder_new(ctx); 11520 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11521 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11522 let expr8_0 = constructor_casloop_rotate_in( 11523 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11524 )?; 11525 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11526 let expr10_0 = constructor_atomic_cas_body( 11527 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11528 expr1_0, 11529 )?; 11530 let expr11_0 = constructor_casloop_rotate_out( 11531 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11532 )?; 11533 let expr12_0 = constructor_casloop_subword( 11534 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11535 )?; 11536 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11537 return Some(expr13_0); 11538 } 11539 } 11540 _ => {} 11541 } 11542 } 11543 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11544 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11545 match &pattern4_0 { 11546 &InstructionData::Unary { 11547 opcode: ref pattern5_0, 11548 arg: pattern5_1, 11549 } => { 11550 match pattern5_0 { 11551 &Opcode::Ctz => { 11552 // Rule at src/isa/s390x/lower.isle line 859. 11553 let expr0_0: Type = I64; 11554 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11555 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11556 let expr3_0 = 11557 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11558 let expr4_0: Type = I64; 11559 let expr5_0: Type = I64; 11560 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11561 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11562 let expr8_0: i16 = 64; 11563 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11564 let expr10_0: u64 = 63; 11565 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11566 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11567 let expr13_0 = 11568 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11569 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11570 return Some(expr14_0); 11571 } 11572 &Opcode::Uextend => { 11573 // Rule at src/isa/s390x/lower.isle line 603. 11574 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11575 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11576 return Some(expr1_0); 11577 } 11578 &Opcode::Sextend => { 11579 // Rule at src/isa/s390x/lower.isle line 614. 11580 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11581 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11582 return Some(expr1_0); 11583 } 11584 _ => {} 11585 } 11586 } 11587 &InstructionData::Load { 11588 opcode: ref pattern5_0, 11589 arg: pattern5_1, 11590 flags: pattern5_2, 11591 offset: pattern5_3, 11592 } => { 11593 match pattern5_0 { 11594 &Opcode::Uload8 => { 11595 // Rule at src/isa/s390x/lower.isle line 1251. 11596 let expr0_0: Type = I8; 11597 let expr1_0 = 11598 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11599 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11600 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11601 return Some(expr3_0); 11602 } 11603 &Opcode::Sload8 => { 11604 // Rule at src/isa/s390x/lower.isle line 1262. 11605 let expr0_0: Type = I8; 11606 let expr1_0 = 11607 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11608 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11609 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11610 return Some(expr3_0); 11611 } 11612 &Opcode::Uload16 => { 11613 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11614 // Rule at src/isa/s390x/lower.isle line 1278. 11615 let expr0_0 = constructor_lower_address( 11616 ctx, pattern5_2, pattern5_1, pattern5_3, 11617 )?; 11618 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11619 let expr2_0: Type = I16; 11620 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11621 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11622 return Some(expr4_0); 11623 } 11624 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11625 // Rule at src/isa/s390x/lower.isle line 1273. 11626 let expr0_0: Type = I16; 11627 let expr1_0 = constructor_lower_address( 11628 ctx, pattern5_2, pattern5_1, pattern5_3, 11629 )?; 11630 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11631 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11632 return Some(expr3_0); 11633 } 11634 } 11635 &Opcode::Sload16 => { 11636 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11637 // Rule at src/isa/s390x/lower.isle line 1303. 11638 let expr0_0 = constructor_lower_address( 11639 ctx, pattern5_2, pattern5_1, pattern5_3, 11640 )?; 11641 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11642 let expr2_0: Type = I16; 11643 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11644 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11645 return Some(expr4_0); 11646 } 11647 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11648 // Rule at src/isa/s390x/lower.isle line 1298. 11649 let expr0_0: Type = I16; 11650 let expr1_0 = constructor_lower_address( 11651 ctx, pattern5_2, pattern5_1, pattern5_3, 11652 )?; 11653 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11654 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11655 return Some(expr3_0); 11656 } 11657 } 11658 _ => {} 11659 } 11660 } 11661 _ => {} 11662 } 11663 } 11664 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11665 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11666 match &pattern4_0 { 11667 &InstructionData::Unary { 11668 opcode: ref pattern5_0, 11669 arg: pattern5_1, 11670 } => { 11671 match pattern5_0 { 11672 &Opcode::Ctz => { 11673 // Rule at src/isa/s390x/lower.isle line 874. 11674 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11675 let expr1_0: Type = I64; 11676 let expr2_0: Type = I64; 11677 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11678 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11679 let expr5_0: i16 = -1; 11680 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11681 let expr7_0: Type = I64; 11682 let expr8_0: Type = I64; 11683 let expr9_0: u64 = 63; 11684 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11685 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11686 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11687 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11688 return Some(expr13_0); 11689 } 11690 &Opcode::Uextend => { 11691 // Rule at src/isa/s390x/lower.isle line 607. 11692 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11693 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11694 return Some(expr1_0); 11695 } 11696 &Opcode::Sextend => { 11697 // Rule at src/isa/s390x/lower.isle line 618. 11698 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11699 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11700 return Some(expr1_0); 11701 } 11702 _ => {} 11703 } 11704 } 11705 &InstructionData::Load { 11706 opcode: ref pattern5_0, 11707 arg: pattern5_1, 11708 flags: pattern5_2, 11709 offset: pattern5_3, 11710 } => { 11711 match pattern5_0 { 11712 &Opcode::Uload8 => { 11713 // Rule at src/isa/s390x/lower.isle line 1255. 11714 let expr0_0: Type = I8; 11715 let expr1_0 = 11716 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11717 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11718 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11719 return Some(expr3_0); 11720 } 11721 &Opcode::Sload8 => { 11722 // Rule at src/isa/s390x/lower.isle line 1266. 11723 let expr0_0: Type = I8; 11724 let expr1_0 = 11725 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11726 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11727 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11728 return Some(expr3_0); 11729 } 11730 &Opcode::Uload16 => { 11731 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11732 // Rule at src/isa/s390x/lower.isle line 1289. 11733 let expr0_0 = constructor_lower_address( 11734 ctx, pattern5_2, pattern5_1, pattern5_3, 11735 )?; 11736 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11737 let expr2_0: Type = I16; 11738 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11739 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11740 return Some(expr4_0); 11741 } 11742 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11743 // Rule at src/isa/s390x/lower.isle line 1284. 11744 let expr0_0: Type = I16; 11745 let expr1_0 = constructor_lower_address( 11746 ctx, pattern5_2, pattern5_1, pattern5_3, 11747 )?; 11748 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11749 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11750 return Some(expr3_0); 11751 } 11752 } 11753 &Opcode::Sload16 => { 11754 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11755 // Rule at src/isa/s390x/lower.isle line 1314. 11756 let expr0_0 = constructor_lower_address( 11757 ctx, pattern5_2, pattern5_1, pattern5_3, 11758 )?; 11759 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11760 let expr2_0: Type = I16; 11761 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11762 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11763 return Some(expr4_0); 11764 } 11765 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11766 // Rule at src/isa/s390x/lower.isle line 1309. 11767 let expr0_0: Type = I16; 11768 let expr1_0 = constructor_lower_address( 11769 ctx, pattern5_2, pattern5_1, pattern5_3, 11770 )?; 11771 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11772 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11773 return Some(expr3_0); 11774 } 11775 } 11776 &Opcode::Uload32 => { 11777 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11778 // Rule at src/isa/s390x/lower.isle line 1328. 11779 let expr0_0 = constructor_lower_address( 11780 ctx, pattern5_2, pattern5_1, pattern5_3, 11781 )?; 11782 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11783 let expr2_0: Type = I32; 11784 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11785 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11786 return Some(expr4_0); 11787 } 11788 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11789 // Rule at src/isa/s390x/lower.isle line 1323. 11790 let expr0_0: Type = I32; 11791 let expr1_0 = constructor_lower_address( 11792 ctx, pattern5_2, pattern5_1, pattern5_3, 11793 )?; 11794 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11795 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11796 return Some(expr3_0); 11797 } 11798 } 11799 &Opcode::Sload32 => { 11800 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11801 // Rule at src/isa/s390x/lower.isle line 1342. 11802 let expr0_0 = constructor_lower_address( 11803 ctx, pattern5_2, pattern5_1, pattern5_3, 11804 )?; 11805 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11806 let expr2_0: Type = I32; 11807 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11808 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11809 return Some(expr4_0); 11810 } 11811 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11812 // Rule at src/isa/s390x/lower.isle line 1337. 11813 let expr0_0: Type = I32; 11814 let expr1_0 = constructor_lower_address( 11815 ctx, pattern5_2, pattern5_1, pattern5_3, 11816 )?; 11817 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11818 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11819 return Some(expr3_0); 11820 } 11821 } 11822 _ => {} 11823 } 11824 } 11825 _ => {} 11826 } 11827 } 11828 } 11829 return None; 11830 } 11831 11832 // Generated as internal constructor for term lower_branch. 11833 pub fn constructor_lower_branch<C: Context>( 11834 ctx: &mut C, 11835 arg0: Inst, 11836 arg1: &VecMachLabel, 11837 ) -> Option<InstOutput> { 11838 let pattern0_0 = arg0; 11839 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11840 match &pattern1_0 { 11841 &InstructionData::BranchTable { 11842 opcode: ref pattern2_0, 11843 arg: pattern2_1, 11844 destination: pattern2_2, 11845 table: pattern2_3, 11846 } => { 11847 if let &Opcode::BrTable = pattern2_0 { 11848 let pattern4_0 = arg1; 11849 // Rule at src/isa/s390x/lower.isle line 2076. 11850 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11851 let expr1_0: Type = I64; 11852 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11853 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11854 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11855 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11856 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11857 let expr7_0: u8 = 0; 11858 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11859 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11860 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11861 let expr11_0: Type = I64; 11862 let expr12_0: u8 = 2; 11863 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11864 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11865 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11866 return Some(expr15_0); 11867 } 11868 } 11869 &InstructionData::Branch { 11870 opcode: ref pattern2_0, 11871 args: pattern2_1, 11872 destination: pattern2_2, 11873 } => { 11874 match pattern2_0 { 11875 &Opcode::Brz => { 11876 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11877 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11878 let pattern6_0 = arg1; 11879 // Rule at src/isa/s390x/lower.isle line 2109. 11880 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11881 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11882 let expr2_0: u8 = 0; 11883 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11884 let expr4_0: u8 = 1; 11885 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11886 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11887 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11888 return Some(expr7_0); 11889 } 11890 } 11891 &Opcode::Brnz => { 11892 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11893 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11894 let pattern6_0 = arg1; 11895 // Rule at src/isa/s390x/lower.isle line 2120. 11896 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11897 let expr1_0: u8 = 0; 11898 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11899 let expr3_0: u8 = 1; 11900 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11901 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11902 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11903 return Some(expr6_0); 11904 } 11905 } 11906 _ => {} 11907 } 11908 } 11909 &InstructionData::Jump { 11910 opcode: ref pattern2_0, 11911 args: pattern2_1, 11912 destination: pattern2_2, 11913 } => { 11914 if let &Opcode::Jump = pattern2_0 { 11915 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11916 let pattern5_0 = arg1; 11917 // Rule at src/isa/s390x/lower.isle line 2068. 11918 let expr0_0: u8 = 0; 11919 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11920 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11921 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11922 return Some(expr3_0); 11923 } 11924 } 11925 &InstructionData::BranchInt { 11926 opcode: ref pattern2_0, 11927 args: pattern2_1, 11928 cond: ref pattern2_2, 11929 destination: pattern2_3, 11930 } => { 11931 if let &Opcode::Brif = pattern2_0 { 11932 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11933 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11934 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11935 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11936 if let &InstructionData::Binary { 11937 opcode: ref pattern8_0, 11938 args: ref pattern8_1, 11939 } = &pattern7_0 11940 { 11941 if let &Opcode::Ifcmp = pattern8_0 { 11942 let (pattern10_0, pattern10_1) = 11943 C::unpack_value_array_2(ctx, pattern8_1); 11944 let pattern11_0 = arg1; 11945 // Rule at src/isa/s390x/lower.isle line 2131. 11946 let expr0_0: bool = false; 11947 let expr1_0 = constructor_icmp_val( 11948 ctx, 11949 expr0_0, 11950 pattern2_2, 11951 pattern10_0, 11952 pattern10_1, 11953 )?; 11954 let expr2_0: u8 = 0; 11955 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11956 let expr4_0: u8 = 1; 11957 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11958 let expr6_0 = 11959 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11960 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11961 return Some(expr7_0); 11962 } 11963 } 11964 } 11965 } 11966 } 11967 } 11968 _ => {} 11969 } 11970 return None; 11971 } 11972 11973 // Generated as internal constructor for term output_ifcout. 11974 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11975 let pattern0_0 = arg0; 11976 // Rule at src/isa/s390x/lower.isle line 154. 11977 let expr0_0 = C::value_reg(ctx, pattern0_0); 11978 let expr1_0 = C::value_regs_invalid(ctx); 11979 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11980 return Some(expr2_0); 11981 } 11982 11983 // Generated as internal constructor for term zero_divisor_check_needed. 11984 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11985 let pattern0_0 = arg0; 11986 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11987 let pattern2_0 = 0; 11988 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11989 // Rule at src/isa/s390x/lower.isle line 344. 11990 let expr0_0: bool = false; 11991 return Some(expr0_0); 11992 } 11993 } 11994 let pattern1_0 = C::value_type(ctx, pattern0_0); 11995 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11996 // Rule at src/isa/s390x/lower.isle line 345. 11997 let expr0_0: bool = false; 11998 return Some(expr0_0); 11999 } 12000 // Rule at src/isa/s390x/lower.isle line 346. 12001 let expr0_0: bool = true; 12002 return Some(expr0_0); 12003 } 12004 12005 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 12006 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 12007 ctx: &mut C, 12008 arg0: bool, 12009 arg1: Type, 12010 arg2: Reg, 12011 ) -> Option<Reg> { 12012 let pattern0_0 = arg0; 12013 if pattern0_0 == true { 12014 let pattern2_0 = arg1; 12015 let pattern3_0 = arg2; 12016 // Rule at src/isa/s390x/lower.isle line 352. 12017 let expr0_0: i16 = 0; 12018 let expr1_0 = IntCC::Equal; 12019 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 12020 let expr3_0 = C::trap_code_division_by_zero(ctx); 12021 let expr4_0 = constructor_icmps_simm16_and_trap( 12022 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 12023 )?; 12024 return Some(expr4_0); 12025 } 12026 if pattern0_0 == false { 12027 let pattern2_0 = arg1; 12028 let pattern3_0 = arg2; 12029 // Rule at src/isa/s390x/lower.isle line 351. 12030 let expr0_0 = C::invalid_reg(ctx); 12031 return Some(expr0_0); 12032 } 12033 return None; 12034 } 12035 12036 // Generated as internal constructor for term div_overflow_check_needed. 12037 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12038 let pattern0_0 = arg0; 12039 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12040 let pattern2_0 = -1; 12041 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12042 // Rule at src/isa/s390x/lower.isle line 425. 12043 let expr0_0: bool = false; 12044 return Some(expr0_0); 12045 } 12046 } 12047 // Rule at src/isa/s390x/lower.isle line 426. 12048 let expr0_0: bool = true; 12049 return Some(expr0_0); 12050 } 12051 12052 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12053 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12054 ctx: &mut C, 12055 arg0: bool, 12056 arg1: Type, 12057 arg2: Type, 12058 arg3: &RegPair, 12059 arg4: Reg, 12060 ) -> Option<Reg> { 12061 let pattern0_0 = arg0; 12062 if pattern0_0 == true { 12063 let pattern2_0 = arg1; 12064 let pattern3_0 = arg2; 12065 let pattern4_0 = arg3; 12066 let pattern5_0 = arg4; 12067 // Rule at src/isa/s390x/lower.isle line 439. 12068 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12069 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12070 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12071 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12072 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12073 let expr5_0: i16 = -1; 12074 let expr6_0 = IntCC::Equal; 12075 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12076 let expr8_0 = C::trap_code_integer_overflow(ctx); 12077 let expr9_0 = constructor_icmps_simm16_and_trap( 12078 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12079 )?; 12080 return Some(expr9_0); 12081 } 12082 if pattern0_0 == false { 12083 let pattern2_0 = arg1; 12084 let pattern3_0 = arg2; 12085 let pattern4_0 = arg3; 12086 let pattern5_0 = arg4; 12087 // Rule at src/isa/s390x/lower.isle line 438. 12088 let expr0_0 = C::invalid_reg(ctx); 12089 return Some(expr0_0); 12090 } 12091 return None; 12092 } 12093 12094 // Generated as internal constructor for term int_max. 12095 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12096 let pattern0_0 = arg0; 12097 if pattern0_0 == I8 { 12098 // Rule at src/isa/s390x/lower.isle line 447. 12099 let expr0_0: u64 = 127; 12100 return Some(expr0_0); 12101 } 12102 if pattern0_0 == I16 { 12103 // Rule at src/isa/s390x/lower.isle line 448. 12104 let expr0_0: u64 = 32767; 12105 return Some(expr0_0); 12106 } 12107 if pattern0_0 == I32 { 12108 // Rule at src/isa/s390x/lower.isle line 449. 12109 let expr0_0: u64 = 2147483647; 12110 return Some(expr0_0); 12111 } 12112 if pattern0_0 == I64 { 12113 // Rule at src/isa/s390x/lower.isle line 450. 12114 let expr0_0: u64 = 9223372036854775807; 12115 return Some(expr0_0); 12116 } 12117 return None; 12118 } 12119 12120 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12121 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12122 ctx: &mut C, 12123 arg0: bool, 12124 arg1: Type, 12125 arg2: &RegPair, 12126 arg3: Reg, 12127 ) -> Option<RegPair> { 12128 let pattern0_0 = arg0; 12129 if pattern0_0 == true { 12130 let pattern2_0 = arg1; 12131 if pattern2_0 == I32 { 12132 let pattern4_0 = arg2; 12133 let pattern5_0 = arg3; 12134 // Rule at src/isa/s390x/lower.isle line 468. 12135 return Some(pattern4_0.clone()); 12136 } 12137 if pattern2_0 == I64 { 12138 let pattern4_0 = arg2; 12139 let pattern5_0 = arg3; 12140 // Rule at src/isa/s390x/lower.isle line 469. 12141 let expr0_0: Type = I64; 12142 let expr1_0: Type = I64; 12143 let expr2_0: i16 = -1; 12144 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12145 let expr4_0 = IntCC::Equal; 12146 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12147 let expr6_0: i16 = 0; 12148 let expr7_0 = constructor_cmov_imm_regpair_lo( 12149 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12150 )?; 12151 return Some(expr7_0); 12152 } 12153 } 12154 if pattern0_0 == false { 12155 let pattern2_0 = arg1; 12156 let pattern3_0 = arg2; 12157 let pattern4_0 = arg3; 12158 // Rule at src/isa/s390x/lower.isle line 467. 12159 return Some(pattern3_0.clone()); 12160 } 12161 return None; 12162 } 12163 12164 // Generated as internal constructor for term cast_bool. 12165 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12166 let pattern0_0 = arg0; 12167 if pattern0_0 == B1 { 12168 let pattern2_0 = arg1; 12169 let pattern3_0 = C::value_type(ctx, pattern2_0); 12170 if pattern3_0 == B1 { 12171 // Rule at src/isa/s390x/lower.isle line 766. 12172 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12173 return Some(expr0_0); 12174 } 12175 if pattern3_0 == B8 { 12176 // Rule at src/isa/s390x/lower.isle line 767. 12177 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12178 return Some(expr0_0); 12179 } 12180 } 12181 if pattern0_0 == B8 { 12182 let pattern2_0 = arg1; 12183 let pattern3_0 = C::value_type(ctx, pattern2_0); 12184 if pattern3_0 == B8 { 12185 // Rule at src/isa/s390x/lower.isle line 768. 12186 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12187 return Some(expr0_0); 12188 } 12189 } 12190 if pattern0_0 == I8 { 12191 let pattern2_0 = arg1; 12192 let pattern3_0 = C::value_type(ctx, pattern2_0); 12193 if pattern3_0 == B8 { 12194 // Rule at src/isa/s390x/lower.isle line 769. 12195 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12196 return Some(expr0_0); 12197 } 12198 } 12199 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12200 let pattern2_0 = arg1; 12201 let pattern3_0 = C::value_type(ctx, pattern2_0); 12202 if pattern3_0 == B16 { 12203 // Rule at src/isa/s390x/lower.isle line 770. 12204 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12205 return Some(expr0_0); 12206 } 12207 } 12208 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12209 let pattern2_0 = arg1; 12210 let pattern3_0 = C::value_type(ctx, pattern2_0); 12211 if pattern3_0 == B32 { 12212 // Rule at src/isa/s390x/lower.isle line 771. 12213 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12214 return Some(expr0_0); 12215 } 12216 } 12217 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12218 let pattern2_0 = arg1; 12219 let pattern3_0 = C::value_type(ctx, pattern2_0); 12220 if pattern3_0 == B64 { 12221 // Rule at src/isa/s390x/lower.isle line 772. 12222 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12223 return Some(expr0_0); 12224 } 12225 } 12226 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12227 let pattern2_0 = arg1; 12228 let pattern3_0 = C::value_type(ctx, pattern2_0); 12229 if pattern3_0 == B1 { 12230 // Rule at src/isa/s390x/lower.isle line 775. 12231 let expr0_0: Type = I32; 12232 let expr1_0: Type = I32; 12233 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12234 let expr3_0: u8 = 31; 12235 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12236 let expr5_0: u8 = 31; 12237 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12238 return Some(expr6_0); 12239 } 12240 if pattern3_0 == B8 { 12241 // Rule at src/isa/s390x/lower.isle line 781. 12242 let expr0_0: Type = I8; 12243 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12244 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12245 return Some(expr2_0); 12246 } 12247 if pattern3_0 == B16 { 12248 // Rule at src/isa/s390x/lower.isle line 783. 12249 let expr0_0: Type = I16; 12250 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12251 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12252 return Some(expr2_0); 12253 } 12254 } 12255 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12256 let pattern2_0 = arg1; 12257 let pattern3_0 = C::value_type(ctx, pattern2_0); 12258 if pattern3_0 == B1 { 12259 // Rule at src/isa/s390x/lower.isle line 777. 12260 let expr0_0: Type = I64; 12261 let expr1_0: Type = I64; 12262 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12263 let expr3_0: u8 = 63; 12264 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12265 let expr5_0: u8 = 63; 12266 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12267 return Some(expr6_0); 12268 } 12269 if pattern3_0 == B8 { 12270 // Rule at src/isa/s390x/lower.isle line 785. 12271 let expr0_0: Type = I8; 12272 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12273 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12274 return Some(expr2_0); 12275 } 12276 if pattern3_0 == B16 { 12277 // Rule at src/isa/s390x/lower.isle line 787. 12278 let expr0_0: Type = I16; 12279 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12280 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12281 return Some(expr2_0); 12282 } 12283 if pattern3_0 == B32 { 12284 // Rule at src/isa/s390x/lower.isle line 789. 12285 let expr0_0: Type = I32; 12286 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12287 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12288 return Some(expr2_0); 12289 } 12290 } 12291 return None; 12292 } 12293 12294 // Generated as internal constructor for term clz_offset. 12295 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12296 let pattern0_0 = arg0; 12297 if pattern0_0 == I8 { 12298 let pattern2_0 = arg1; 12299 // Rule at src/isa/s390x/lower.isle line 814. 12300 let expr0_0: Type = I8; 12301 let expr1_0: i16 = -56; 12302 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12303 return Some(expr2_0); 12304 } 12305 if pattern0_0 == I16 { 12306 let pattern2_0 = arg1; 12307 // Rule at src/isa/s390x/lower.isle line 815. 12308 let expr0_0: Type = I16; 12309 let expr1_0: i16 = -48; 12310 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12311 return Some(expr2_0); 12312 } 12313 if pattern0_0 == I32 { 12314 let pattern2_0 = arg1; 12315 // Rule at src/isa/s390x/lower.isle line 816. 12316 let expr0_0: Type = I32; 12317 let expr1_0: i16 = -32; 12318 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12319 return Some(expr2_0); 12320 } 12321 if pattern0_0 == I64 { 12322 let pattern2_0 = arg1; 12323 // Rule at src/isa/s390x/lower.isle line 817. 12324 let expr0_0: Type = I64; 12325 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12326 return Some(expr1_0); 12327 } 12328 return None; 12329 } 12330 12331 // Generated as internal constructor for term ctz_guardbit. 12332 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12333 let pattern0_0 = arg0; 12334 if pattern0_0 == I8 { 12335 // Rule at src/isa/s390x/lower.isle line 866. 12336 let expr0_0: u16 = 256; 12337 let expr1_0: u8 = 0; 12338 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12339 return Some(expr2_0); 12340 } 12341 if pattern0_0 == I16 { 12342 // Rule at src/isa/s390x/lower.isle line 867. 12343 let expr0_0: u16 = 1; 12344 let expr1_0: u8 = 16; 12345 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12346 return Some(expr2_0); 12347 } 12348 if pattern0_0 == I32 { 12349 // Rule at src/isa/s390x/lower.isle line 868. 12350 let expr0_0: u16 = 1; 12351 let expr1_0: u8 = 32; 12352 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12353 return Some(expr2_0); 12354 } 12355 return None; 12356 } 12357 12358 // Generated as internal constructor for term istore8_impl. 12359 pub fn constructor_istore8_impl<C: Context>( 12360 ctx: &mut C, 12361 arg0: MemFlags, 12362 arg1: Value, 12363 arg2: Value, 12364 arg3: Offset32, 12365 ) -> Option<SideEffectNoResult> { 12366 let pattern0_0 = arg0; 12367 let pattern1_0 = arg1; 12368 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12369 let pattern3_0 = arg2; 12370 let pattern4_0 = arg3; 12371 // Rule at src/isa/s390x/lower.isle line 1424. 12372 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12373 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12374 return Some(expr1_0); 12375 } 12376 let pattern2_0 = arg2; 12377 let pattern3_0 = arg3; 12378 // Rule at src/isa/s390x/lower.isle line 1420. 12379 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12380 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12381 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12382 return Some(expr2_0); 12383 } 12384 12385 // Generated as internal constructor for term istore16_impl. 12386 pub fn constructor_istore16_impl<C: Context>( 12387 ctx: &mut C, 12388 arg0: MemFlags, 12389 arg1: Value, 12390 arg2: Value, 12391 arg3: Offset32, 12392 ) -> Option<SideEffectNoResult> { 12393 let pattern0_0 = arg0; 12394 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12395 let pattern2_0 = arg1; 12396 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12397 let pattern4_0 = arg2; 12398 let pattern5_0 = arg3; 12399 // Rule at src/isa/s390x/lower.isle line 1450. 12400 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12401 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12402 return Some(expr1_0); 12403 } 12404 let pattern3_0 = arg2; 12405 let pattern4_0 = arg3; 12406 // Rule at src/isa/s390x/lower.isle line 1442. 12407 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12408 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12409 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12410 return Some(expr2_0); 12411 } 12412 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12413 let pattern2_0 = arg1; 12414 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12415 let pattern4_0 = arg2; 12416 let pattern5_0 = arg3; 12417 // Rule at src/isa/s390x/lower.isle line 1446. 12418 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12419 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12420 return Some(expr1_0); 12421 } 12422 let pattern3_0 = arg2; 12423 let pattern4_0 = arg3; 12424 // Rule at src/isa/s390x/lower.isle line 1438. 12425 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12426 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12427 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12428 return Some(expr2_0); 12429 } 12430 return None; 12431 } 12432 12433 // Generated as internal constructor for term istore32_impl. 12434 pub fn constructor_istore32_impl<C: Context>( 12435 ctx: &mut C, 12436 arg0: MemFlags, 12437 arg1: Value, 12438 arg2: Value, 12439 arg3: Offset32, 12440 ) -> Option<SideEffectNoResult> { 12441 let pattern0_0 = arg0; 12442 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12443 let pattern2_0 = arg1; 12444 let pattern3_0 = arg2; 12445 let pattern4_0 = arg3; 12446 // Rule at src/isa/s390x/lower.isle line 1472. 12447 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12448 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12449 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12450 return Some(expr2_0); 12451 } 12452 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12453 let pattern2_0 = arg1; 12454 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12455 let pattern4_0 = arg2; 12456 let pattern5_0 = arg3; 12457 // Rule at src/isa/s390x/lower.isle line 1468. 12458 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12459 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12460 return Some(expr1_0); 12461 } 12462 let pattern3_0 = arg2; 12463 let pattern4_0 = arg3; 12464 // Rule at src/isa/s390x/lower.isle line 1464. 12465 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12466 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12467 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12468 return Some(expr2_0); 12469 } 12470 return None; 12471 } 12472 12473 // Generated as internal constructor for term istore64_impl. 12474 pub fn constructor_istore64_impl<C: Context>( 12475 ctx: &mut C, 12476 arg0: MemFlags, 12477 arg1: Value, 12478 arg2: Value, 12479 arg3: Offset32, 12480 ) -> Option<SideEffectNoResult> { 12481 let pattern0_0 = arg0; 12482 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12483 let pattern2_0 = arg1; 12484 let pattern3_0 = arg2; 12485 let pattern4_0 = arg3; 12486 // Rule at src/isa/s390x/lower.isle line 1490. 12487 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12488 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12489 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12490 return Some(expr2_0); 12491 } 12492 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12493 let pattern2_0 = arg1; 12494 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12495 let pattern4_0 = arg2; 12496 let pattern5_0 = arg3; 12497 // Rule at src/isa/s390x/lower.isle line 1486. 12498 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12499 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12500 return Some(expr1_0); 12501 } 12502 let pattern3_0 = arg2; 12503 let pattern4_0 = arg3; 12504 // Rule at src/isa/s390x/lower.isle line 1482. 12505 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12506 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12507 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12508 return Some(expr2_0); 12509 } 12510 return None; 12511 } 12512 12513 // Generated as internal constructor for term atomic_rmw_body. 12514 pub fn constructor_atomic_rmw_body<C: Context>( 12515 ctx: &mut C, 12516 arg0: &VecMInstBuilder, 12517 arg1: Type, 12518 arg2: MemFlags, 12519 arg3: &AtomicRmwOp, 12520 arg4: WritableReg, 12521 arg5: Reg, 12522 arg6: Reg, 12523 ) -> Option<Reg> { 12524 let pattern0_0 = arg0; 12525 let pattern1_0 = arg1; 12526 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12527 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12528 let pattern4_0 = arg2; 12529 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12530 let pattern6_0 = arg3; 12531 if let &AtomicRmwOp::Nand = pattern6_0 { 12532 let pattern8_0 = arg4; 12533 let pattern9_0 = arg5; 12534 let pattern10_0 = arg6; 12535 // Rule at src/isa/s390x/lower.isle line 1598. 12536 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12537 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12538 let expr2_0 = constructor_push_alu_reg( 12539 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12540 )?; 12541 return Some(expr2_0); 12542 } 12543 } 12544 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12545 let pattern6_0 = arg3; 12546 if let &AtomicRmwOp::Nand = pattern6_0 { 12547 let pattern8_0 = arg4; 12548 let pattern9_0 = arg5; 12549 let pattern10_0 = arg6; 12550 // Rule at src/isa/s390x/lower.isle line 1595. 12551 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12552 let expr1_0 = constructor_push_alu_reg( 12553 ctx, 12554 pattern0_0, 12555 &expr0_0, 12556 pattern8_0, 12557 pattern9_0, 12558 pattern10_0, 12559 )?; 12560 return Some(expr1_0); 12561 } 12562 } 12563 } 12564 } 12565 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12566 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12567 let pattern4_0 = arg2; 12568 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12569 let pattern6_0 = arg3; 12570 if let &AtomicRmwOp::Nand = pattern6_0 { 12571 let pattern8_0 = arg4; 12572 let pattern9_0 = arg5; 12573 let pattern10_0 = arg6; 12574 // Rule at src/isa/s390x/lower.isle line 1605. 12575 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12576 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12577 let expr2_0 = constructor_push_alu_reg( 12578 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12579 )?; 12580 let expr3_0 = 12581 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12582 return Some(expr3_0); 12583 } 12584 } 12585 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12586 let pattern6_0 = arg3; 12587 if let &AtomicRmwOp::Nand = pattern6_0 { 12588 let pattern8_0 = arg4; 12589 let pattern9_0 = arg5; 12590 let pattern10_0 = arg6; 12591 // Rule at src/isa/s390x/lower.isle line 1601. 12592 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12593 let expr1_0 = constructor_push_alu_reg( 12594 ctx, 12595 pattern0_0, 12596 &expr0_0, 12597 pattern8_0, 12598 pattern9_0, 12599 pattern10_0, 12600 )?; 12601 let expr2_0 = 12602 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12603 return Some(expr2_0); 12604 } 12605 } 12606 } 12607 } 12608 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12609 let pattern3_0 = arg2; 12610 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12611 let pattern5_0 = arg3; 12612 if let &AtomicRmwOp::Xchg = pattern5_0 { 12613 let pattern7_0 = arg4; 12614 let pattern8_0 = arg5; 12615 let pattern9_0 = arg6; 12616 // Rule at src/isa/s390x/lower.isle line 1587. 12617 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12618 return Some(expr0_0); 12619 } 12620 } 12621 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12622 let pattern5_0 = arg3; 12623 if let &AtomicRmwOp::Xchg = pattern5_0 { 12624 let pattern7_0 = arg4; 12625 let pattern8_0 = arg5; 12626 let pattern9_0 = arg6; 12627 // Rule at src/isa/s390x/lower.isle line 1584. 12628 return Some(pattern9_0); 12629 } 12630 } 12631 } 12632 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12633 let pattern3_0 = arg2; 12634 let pattern4_0 = arg3; 12635 match pattern4_0 { 12636 &AtomicRmwOp::And => { 12637 let pattern6_0 = arg4; 12638 let pattern7_0 = arg5; 12639 let pattern8_0 = arg6; 12640 // Rule at src/isa/s390x/lower.isle line 1615. 12641 let expr0_0 = RxSBGOp::And; 12642 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12643 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12644 pattern8_0, 12645 )?; 12646 return Some(expr1_0); 12647 } 12648 &AtomicRmwOp::Nand => { 12649 let pattern6_0 = arg4; 12650 let pattern7_0 = arg5; 12651 let pattern8_0 = arg6; 12652 // Rule at src/isa/s390x/lower.isle line 1621. 12653 let expr0_0 = RxSBGOp::And; 12654 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12655 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12656 pattern8_0, 12657 )?; 12658 let expr2_0 = constructor_atomic_rmw_body_invert( 12659 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12660 )?; 12661 return Some(expr2_0); 12662 } 12663 &AtomicRmwOp::Or => { 12664 let pattern6_0 = arg4; 12665 let pattern7_0 = arg5; 12666 let pattern8_0 = arg6; 12667 // Rule at src/isa/s390x/lower.isle line 1617. 12668 let expr0_0 = RxSBGOp::Or; 12669 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12670 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12671 pattern8_0, 12672 )?; 12673 return Some(expr1_0); 12674 } 12675 &AtomicRmwOp::Xchg => { 12676 let pattern6_0 = arg4; 12677 let pattern7_0 = arg5; 12678 let pattern8_0 = arg6; 12679 // Rule at src/isa/s390x/lower.isle line 1613. 12680 let expr0_0 = RxSBGOp::Insert; 12681 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12682 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12683 pattern8_0, 12684 )?; 12685 return Some(expr1_0); 12686 } 12687 &AtomicRmwOp::Xor => { 12688 let pattern6_0 = arg4; 12689 let pattern7_0 = arg5; 12690 let pattern8_0 = arg6; 12691 // Rule at src/isa/s390x/lower.isle line 1619. 12692 let expr0_0 = RxSBGOp::Xor; 12693 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12694 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12695 pattern8_0, 12696 )?; 12697 return Some(expr1_0); 12698 } 12699 _ => {} 12700 } 12701 } 12702 let pattern2_0 = arg2; 12703 let pattern3_0 = arg3; 12704 match pattern3_0 { 12705 &AtomicRmwOp::Add => { 12706 let pattern5_0 = arg4; 12707 let pattern6_0 = arg5; 12708 let pattern7_0 = arg6; 12709 // Rule at src/isa/s390x/lower.isle line 1653. 12710 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12711 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12712 let expr2_0 = constructor_atomic_rmw_body_addsub( 12713 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12714 pattern7_0, 12715 )?; 12716 return Some(expr2_0); 12717 } 12718 &AtomicRmwOp::Smax => { 12719 let pattern5_0 = arg4; 12720 let pattern6_0 = arg5; 12721 let pattern7_0 = arg6; 12722 // Rule at src/isa/s390x/lower.isle line 1694. 12723 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12724 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12725 let expr2_0 = IntCC::SignedGreaterThan; 12726 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12727 let expr4_0 = constructor_atomic_rmw_body_minmax( 12728 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12729 pattern6_0, pattern7_0, 12730 )?; 12731 return Some(expr4_0); 12732 } 12733 &AtomicRmwOp::Smin => { 12734 let pattern5_0 = arg4; 12735 let pattern6_0 = arg5; 12736 let pattern7_0 = arg6; 12737 // Rule at src/isa/s390x/lower.isle line 1691. 12738 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12739 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12740 let expr2_0 = IntCC::SignedLessThan; 12741 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12742 let expr4_0 = constructor_atomic_rmw_body_minmax( 12743 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12744 pattern6_0, pattern7_0, 12745 )?; 12746 return Some(expr4_0); 12747 } 12748 &AtomicRmwOp::Sub => { 12749 let pattern5_0 = arg4; 12750 let pattern6_0 = arg5; 12751 let pattern7_0 = arg6; 12752 // Rule at src/isa/s390x/lower.isle line 1655. 12753 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12754 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12755 let expr2_0 = constructor_atomic_rmw_body_addsub( 12756 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12757 pattern7_0, 12758 )?; 12759 return Some(expr2_0); 12760 } 12761 &AtomicRmwOp::Umax => { 12762 let pattern5_0 = arg4; 12763 let pattern6_0 = arg5; 12764 let pattern7_0 = arg6; 12765 // Rule at src/isa/s390x/lower.isle line 1700. 12766 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12767 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12768 let expr2_0 = IntCC::UnsignedGreaterThan; 12769 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12770 let expr4_0 = constructor_atomic_rmw_body_minmax( 12771 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12772 pattern6_0, pattern7_0, 12773 )?; 12774 return Some(expr4_0); 12775 } 12776 &AtomicRmwOp::Umin => { 12777 let pattern5_0 = arg4; 12778 let pattern6_0 = arg5; 12779 let pattern7_0 = arg6; 12780 // Rule at src/isa/s390x/lower.isle line 1697. 12781 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12782 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12783 let expr2_0 = IntCC::UnsignedLessThan; 12784 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12785 let expr4_0 = constructor_atomic_rmw_body_minmax( 12786 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12787 pattern6_0, pattern7_0, 12788 )?; 12789 return Some(expr4_0); 12790 } 12791 _ => {} 12792 } 12793 return None; 12794 } 12795 12796 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12797 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12798 ctx: &mut C, 12799 arg0: &VecMInstBuilder, 12800 arg1: Type, 12801 arg2: MemFlags, 12802 arg3: &RxSBGOp, 12803 arg4: WritableReg, 12804 arg5: Reg, 12805 arg6: Reg, 12806 ) -> Option<Reg> { 12807 let pattern0_0 = arg0; 12808 let pattern1_0 = arg1; 12809 if pattern1_0 == I8 { 12810 let pattern3_0 = arg2; 12811 let pattern4_0 = arg3; 12812 let pattern5_0 = arg4; 12813 let pattern6_0 = arg5; 12814 let pattern7_0 = arg6; 12815 // Rule at src/isa/s390x/lower.isle line 1629. 12816 let expr0_0: u8 = 32; 12817 let expr1_0: u8 = 40; 12818 let expr2_0: i8 = 24; 12819 let expr3_0 = constructor_push_rxsbg( 12820 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12821 expr2_0, 12822 )?; 12823 return Some(expr3_0); 12824 } 12825 if pattern1_0 == I16 { 12826 let pattern3_0 = arg2; 12827 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12828 let pattern5_0 = arg3; 12829 let pattern6_0 = arg4; 12830 let pattern7_0 = arg5; 12831 let pattern8_0 = arg6; 12832 // Rule at src/isa/s390x/lower.isle line 1637. 12833 let expr0_0: Type = I32; 12834 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12835 let expr2_0: u8 = 48; 12836 let expr3_0: u8 = 64; 12837 let expr4_0: i8 = -16; 12838 let expr5_0 = constructor_push_rxsbg( 12839 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12840 expr4_0, 12841 )?; 12842 return Some(expr5_0); 12843 } 12844 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12845 let pattern5_0 = arg3; 12846 let pattern6_0 = arg4; 12847 let pattern7_0 = arg5; 12848 let pattern8_0 = arg6; 12849 // Rule at src/isa/s390x/lower.isle line 1633. 12850 let expr0_0: u8 = 32; 12851 let expr1_0: u8 = 48; 12852 let expr2_0: i8 = 16; 12853 let expr3_0 = constructor_push_rxsbg( 12854 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12855 expr2_0, 12856 )?; 12857 return Some(expr3_0); 12858 } 12859 } 12860 return None; 12861 } 12862 12863 // Generated as internal constructor for term atomic_rmw_body_invert. 12864 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12865 ctx: &mut C, 12866 arg0: &VecMInstBuilder, 12867 arg1: Type, 12868 arg2: MemFlags, 12869 arg3: WritableReg, 12870 arg4: Reg, 12871 ) -> Option<Reg> { 12872 let pattern0_0 = arg0; 12873 let pattern1_0 = arg1; 12874 if pattern1_0 == I8 { 12875 let pattern3_0 = arg2; 12876 let pattern4_0 = arg3; 12877 let pattern5_0 = arg4; 12878 // Rule at src/isa/s390x/lower.isle line 1643. 12879 let expr0_0: Type = I32; 12880 let expr1_0: u32 = 4278190080; 12881 let expr2_0: u8 = 0; 12882 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12883 let expr4_0 = constructor_push_xor_uimm32shifted( 12884 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12885 )?; 12886 return Some(expr4_0); 12887 } 12888 if pattern1_0 == I16 { 12889 let pattern3_0 = arg2; 12890 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12891 let pattern5_0 = arg3; 12892 let pattern6_0 = arg4; 12893 // Rule at src/isa/s390x/lower.isle line 1649. 12894 let expr0_0: Type = I32; 12895 let expr1_0: u32 = 65535; 12896 let expr2_0: u8 = 0; 12897 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12898 let expr4_0 = constructor_push_xor_uimm32shifted( 12899 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12900 )?; 12901 return Some(expr4_0); 12902 } 12903 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12904 let pattern5_0 = arg3; 12905 let pattern6_0 = arg4; 12906 // Rule at src/isa/s390x/lower.isle line 1646. 12907 let expr0_0: Type = I32; 12908 let expr1_0: u32 = 4294901760; 12909 let expr2_0: u8 = 0; 12910 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12911 let expr4_0 = constructor_push_xor_uimm32shifted( 12912 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12913 )?; 12914 return Some(expr4_0); 12915 } 12916 } 12917 return None; 12918 } 12919 12920 // Generated as internal constructor for term atomic_rmw_body_addsub. 12921 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12922 ctx: &mut C, 12923 arg0: &VecMInstBuilder, 12924 arg1: Type, 12925 arg2: MemFlags, 12926 arg3: &ALUOp, 12927 arg4: WritableReg, 12928 arg5: Reg, 12929 arg6: Reg, 12930 ) -> Option<Reg> { 12931 let pattern0_0 = arg0; 12932 let pattern1_0 = arg1; 12933 if pattern1_0 == I8 { 12934 let pattern3_0 = arg2; 12935 let pattern4_0 = arg3; 12936 let pattern5_0 = arg4; 12937 let pattern6_0 = arg5; 12938 let pattern7_0 = arg6; 12939 // Rule at src/isa/s390x/lower.isle line 1672. 12940 let expr0_0: Type = I32; 12941 let expr1_0: u8 = 24; 12942 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12943 let expr3_0 = 12944 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12945 return Some(expr3_0); 12946 } 12947 if pattern1_0 == I16 { 12948 let pattern3_0 = arg2; 12949 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12950 let pattern5_0 = arg3; 12951 let pattern6_0 = arg4; 12952 let pattern7_0 = arg5; 12953 let pattern8_0 = arg6; 12954 // Rule at src/isa/s390x/lower.isle line 1684. 12955 let expr0_0: Type = I32; 12956 let expr1_0: u8 = 16; 12957 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12958 let expr3_0: Type = I32; 12959 let expr4_0 = 12960 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12961 let expr5_0 = constructor_push_alu_reg( 12962 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12963 )?; 12964 let expr6_0: Type = I32; 12965 let expr7_0 = 12966 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12967 return Some(expr7_0); 12968 } 12969 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12970 let pattern5_0 = arg3; 12971 let pattern6_0 = arg4; 12972 let pattern7_0 = arg5; 12973 let pattern8_0 = arg6; 12974 // Rule at src/isa/s390x/lower.isle line 1676. 12975 let expr0_0: Type = I32; 12976 let expr1_0: u8 = 16; 12977 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12978 let expr3_0 = constructor_push_alu_reg( 12979 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12980 )?; 12981 return Some(expr3_0); 12982 } 12983 } 12984 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12985 let pattern3_0 = arg2; 12986 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12987 let pattern5_0 = arg3; 12988 let pattern6_0 = arg4; 12989 let pattern7_0 = arg5; 12990 let pattern8_0 = arg6; 12991 // Rule at src/isa/s390x/lower.isle line 1666. 12992 let expr0_0 = 12993 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12994 let expr1_0 = constructor_push_alu_reg( 12995 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12996 )?; 12997 let expr2_0 = 12998 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12999 return Some(expr2_0); 13000 } 13001 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13002 let pattern5_0 = arg3; 13003 let pattern6_0 = arg4; 13004 let pattern7_0 = arg5; 13005 let pattern8_0 = arg6; 13006 // Rule at src/isa/s390x/lower.isle line 1662. 13007 let expr0_0 = constructor_push_alu_reg( 13008 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 13009 )?; 13010 return Some(expr0_0); 13011 } 13012 } 13013 return None; 13014 } 13015 13016 // Generated as internal constructor for term atomic_rmw_body_minmax. 13017 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 13018 ctx: &mut C, 13019 arg0: &VecMInstBuilder, 13020 arg1: Type, 13021 arg2: MemFlags, 13022 arg3: &CmpOp, 13023 arg4: &Cond, 13024 arg5: WritableReg, 13025 arg6: Reg, 13026 arg7: Reg, 13027 ) -> Option<Reg> { 13028 let pattern0_0 = arg0; 13029 let pattern1_0 = arg1; 13030 if pattern1_0 == I8 { 13031 let pattern3_0 = arg2; 13032 let pattern4_0 = arg3; 13033 let pattern5_0 = arg4; 13034 let pattern6_0 = arg5; 13035 let pattern7_0 = arg6; 13036 let pattern8_0 = arg7; 13037 // Rule at src/isa/s390x/lower.isle line 1729. 13038 let expr0_0: Type = I32; 13039 let expr1_0: u8 = 24; 13040 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13041 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13042 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13043 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13044 let expr6_0 = RxSBGOp::Insert; 13045 let expr7_0: u8 = 32; 13046 let expr8_0: u8 = 40; 13047 let expr9_0: i8 = 0; 13048 let expr10_0 = constructor_push_rxsbg( 13049 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13050 )?; 13051 return Some(expr10_0); 13052 } 13053 if pattern1_0 == I16 { 13054 let pattern3_0 = arg2; 13055 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13056 let pattern5_0 = arg3; 13057 let pattern6_0 = arg4; 13058 let pattern7_0 = arg5; 13059 let pattern8_0 = arg6; 13060 let pattern9_0 = arg7; 13061 // Rule at src/isa/s390x/lower.isle line 1742. 13062 let expr0_0: Type = I32; 13063 let expr1_0: u8 = 16; 13064 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13065 let expr3_0: Type = I32; 13066 let expr4_0 = 13067 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13068 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13069 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13070 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13071 let expr8_0 = RxSBGOp::Insert; 13072 let expr9_0: u8 = 32; 13073 let expr10_0: u8 = 48; 13074 let expr11_0: i8 = 0; 13075 let expr12_0 = constructor_push_rxsbg( 13076 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13077 expr11_0, 13078 )?; 13079 let expr13_0: Type = I32; 13080 let expr14_0 = 13081 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13082 return Some(expr14_0); 13083 } 13084 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13085 let pattern5_0 = arg3; 13086 let pattern6_0 = arg4; 13087 let pattern7_0 = arg5; 13088 let pattern8_0 = arg6; 13089 let pattern9_0 = arg7; 13090 // Rule at src/isa/s390x/lower.isle line 1735. 13091 let expr0_0: Type = I32; 13092 let expr1_0: u8 = 16; 13093 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13094 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13095 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13096 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13097 let expr6_0 = RxSBGOp::Insert; 13098 let expr7_0: u8 = 32; 13099 let expr8_0: u8 = 48; 13100 let expr9_0: i8 = 0; 13101 let expr10_0 = constructor_push_rxsbg( 13102 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13103 expr9_0, 13104 )?; 13105 return Some(expr10_0); 13106 } 13107 } 13108 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13109 let pattern3_0 = arg2; 13110 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13111 let pattern5_0 = arg3; 13112 let pattern6_0 = arg4; 13113 let pattern7_0 = arg5; 13114 let pattern8_0 = arg6; 13115 let pattern9_0 = arg7; 13116 // Rule at src/isa/s390x/lower.isle line 1717. 13117 let expr0_0 = 13118 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13119 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13120 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13121 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13122 let expr4_0 = 13123 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13124 return Some(expr4_0); 13125 } 13126 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13127 let pattern5_0 = arg3; 13128 let pattern6_0 = arg4; 13129 let pattern7_0 = arg5; 13130 let pattern8_0 = arg6; 13131 let pattern9_0 = arg7; 13132 // Rule at src/isa/s390x/lower.isle line 1710. 13133 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13134 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13135 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13136 return Some(pattern9_0); 13137 } 13138 } 13139 return None; 13140 } 13141 13142 // Generated as internal constructor for term atomic_cas_body. 13143 pub fn constructor_atomic_cas_body<C: Context>( 13144 ctx: &mut C, 13145 arg0: &VecMInstBuilder, 13146 arg1: Type, 13147 arg2: MemFlags, 13148 arg3: WritableReg, 13149 arg4: Reg, 13150 arg5: Reg, 13151 arg6: Reg, 13152 ) -> Option<Reg> { 13153 let pattern0_0 = arg0; 13154 let pattern1_0 = arg1; 13155 if pattern1_0 == I8 { 13156 let pattern3_0 = arg2; 13157 let pattern4_0 = arg3; 13158 let pattern5_0 = arg4; 13159 let pattern6_0 = arg5; 13160 let pattern7_0 = arg6; 13161 // Rule at src/isa/s390x/lower.isle line 1794. 13162 let expr0_0 = RxSBGOp::Xor; 13163 let expr1_0: u8 = 32; 13164 let expr2_0: u8 = 40; 13165 let expr3_0: i8 = 24; 13166 let expr4_0 = constructor_rxsbg_test( 13167 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13168 )?; 13169 let expr5_0 = IntCC::NotEqual; 13170 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13171 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13172 let expr8_0 = RxSBGOp::Insert; 13173 let expr9_0: u8 = 32; 13174 let expr10_0: u8 = 40; 13175 let expr11_0: i8 = 24; 13176 let expr12_0 = constructor_push_rxsbg( 13177 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13178 expr11_0, 13179 )?; 13180 return Some(expr12_0); 13181 } 13182 if pattern1_0 == I16 { 13183 let pattern3_0 = arg2; 13184 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13185 let pattern5_0 = arg3; 13186 let pattern6_0 = arg4; 13187 let pattern7_0 = arg5; 13188 let pattern8_0 = arg6; 13189 // Rule at src/isa/s390x/lower.isle line 1812. 13190 let expr0_0: Type = I32; 13191 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13192 let expr2_0: Type = I32; 13193 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13194 let expr4_0 = RxSBGOp::Xor; 13195 let expr5_0: u8 = 48; 13196 let expr6_0: u8 = 64; 13197 let expr7_0: i8 = -16; 13198 let expr8_0 = constructor_rxsbg_test( 13199 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13200 )?; 13201 let expr9_0 = IntCC::NotEqual; 13202 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13203 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13204 let expr12_0 = RxSBGOp::Insert; 13205 let expr13_0: u8 = 48; 13206 let expr14_0: u8 = 64; 13207 let expr15_0: i8 = -16; 13208 let expr16_0 = constructor_push_rxsbg( 13209 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13210 expr15_0, 13211 )?; 13212 return Some(expr16_0); 13213 } 13214 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13215 let pattern5_0 = arg3; 13216 let pattern6_0 = arg4; 13217 let pattern7_0 = arg5; 13218 let pattern8_0 = arg6; 13219 // Rule at src/isa/s390x/lower.isle line 1801. 13220 let expr0_0 = RxSBGOp::Xor; 13221 let expr1_0: u8 = 32; 13222 let expr2_0: u8 = 48; 13223 let expr3_0: i8 = 16; 13224 let expr4_0 = constructor_rxsbg_test( 13225 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13226 )?; 13227 let expr5_0 = IntCC::NotEqual; 13228 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13229 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13230 let expr8_0 = RxSBGOp::Insert; 13231 let expr9_0: u8 = 32; 13232 let expr10_0: u8 = 48; 13233 let expr11_0: i8 = 16; 13234 let expr12_0 = constructor_push_rxsbg( 13235 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13236 expr11_0, 13237 )?; 13238 return Some(expr12_0); 13239 } 13240 } 13241 return None; 13242 } 13243 13244 // Generated as internal constructor for term atomic_store_impl. 13245 pub fn constructor_atomic_store_impl<C: Context>( 13246 ctx: &mut C, 13247 arg0: &SideEffectNoResult, 13248 ) -> Option<InstOutput> { 13249 let pattern0_0 = arg0; 13250 // Rule at src/isa/s390x/lower.isle line 1858. 13251 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13252 let expr1_0 = constructor_fence_impl(ctx)?; 13253 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13254 return Some(expr2_0); 13255 } 13256 13257 // Generated as internal constructor for term icmp_val. 13258 pub fn constructor_icmp_val<C: Context>( 13259 ctx: &mut C, 13260 arg0: bool, 13261 arg1: &IntCC, 13262 arg2: Value, 13263 arg3: Value, 13264 ) -> Option<ProducesBool> { 13265 let pattern0_0 = arg0; 13266 let pattern1_0 = arg1; 13267 if let Some(()) = C::signed(ctx, pattern1_0) { 13268 let pattern3_0 = arg2; 13269 let pattern4_0 = arg3; 13270 // Rule at src/isa/s390x/lower.isle line 1925. 13271 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13272 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13273 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13274 return Some(expr2_0); 13275 } 13276 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13277 let pattern3_0 = arg2; 13278 let pattern4_0 = arg3; 13279 // Rule at src/isa/s390x/lower.isle line 1928. 13280 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13281 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13282 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13283 return Some(expr2_0); 13284 } 13285 return None; 13286 } 13287 13288 // Generated as internal constructor for term icmps_val. 13289 pub fn constructor_icmps_val<C: Context>( 13290 ctx: &mut C, 13291 arg0: bool, 13292 arg1: Value, 13293 arg2: Value, 13294 ) -> Option<ProducesFlags> { 13295 let pattern0_0 = arg0; 13296 if pattern0_0 == true { 13297 let pattern2_0 = arg1; 13298 let pattern3_0 = C::value_type(ctx, pattern2_0); 13299 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13300 let pattern5_0 = arg2; 13301 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13302 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13303 if let &InstructionData::Load { 13304 opcode: ref pattern8_0, 13305 arg: pattern8_1, 13306 flags: pattern8_2, 13307 offset: pattern8_3, 13308 } = &pattern7_0 13309 { 13310 match pattern8_0 { 13311 &Opcode::Sload16 => { 13312 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13313 // Rule at src/isa/s390x/lower.isle line 1958. 13314 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13315 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13316 let expr2_0 = constructor_icmps_mem_sext16( 13317 ctx, pattern4_0, expr0_0, &expr1_0, 13318 )?; 13319 return Some(expr2_0); 13320 } 13321 } 13322 &Opcode::Sload32 => { 13323 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13324 // Rule at src/isa/s390x/lower.isle line 1960. 13325 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13326 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13327 let expr2_0 = constructor_icmps_mem_sext32( 13328 ctx, pattern4_0, expr0_0, &expr1_0, 13329 )?; 13330 return Some(expr2_0); 13331 } 13332 } 13333 _ => {} 13334 } 13335 } 13336 } 13337 let pattern6_0 = C::value_type(ctx, pattern5_0); 13338 if pattern6_0 == I16 { 13339 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13340 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13341 if let &InstructionData::Load { 13342 opcode: ref pattern10_0, 13343 arg: pattern10_1, 13344 flags: pattern10_2, 13345 offset: pattern10_3, 13346 } = &pattern9_0 13347 { 13348 if let &Opcode::Load = pattern10_0 { 13349 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13350 // Rule at src/isa/s390x/lower.isle line 1954. 13351 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13352 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13353 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13354 let expr3_0 = 13355 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13356 return Some(expr3_0); 13357 } 13358 } 13359 } 13360 } 13361 } 13362 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13363 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13364 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13365 if let &InstructionData::Load { 13366 opcode: ref pattern10_0, 13367 arg: pattern10_1, 13368 flags: pattern10_2, 13369 offset: pattern10_3, 13370 } = &pattern9_0 13371 { 13372 if let &Opcode::Load = pattern10_0 { 13373 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13374 // Rule at src/isa/s390x/lower.isle line 1950. 13375 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13376 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13377 let expr2_0 = 13378 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13379 return Some(expr2_0); 13380 } 13381 } 13382 } 13383 } 13384 } 13385 } 13386 } 13387 let pattern1_0 = arg1; 13388 let pattern2_0 = C::value_type(ctx, pattern1_0); 13389 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13390 let pattern4_0 = arg2; 13391 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13392 // Rule at src/isa/s390x/lower.isle line 1944. 13393 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13394 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13395 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13396 return Some(expr2_0); 13397 } 13398 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13399 // Rule at src/isa/s390x/lower.isle line 1946. 13400 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13401 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13402 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13403 return Some(expr2_0); 13404 } 13405 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13406 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13407 if let &InstructionData::Unary { 13408 opcode: ref pattern7_0, 13409 arg: pattern7_1, 13410 } = &pattern6_0 13411 { 13412 if let &Opcode::Sextend = pattern7_0 { 13413 let pattern9_0 = C::value_type(ctx, pattern7_1); 13414 if pattern9_0 == I32 { 13415 // Rule at src/isa/s390x/lower.isle line 1940. 13416 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13417 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13418 let expr2_0 = 13419 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13420 return Some(expr2_0); 13421 } 13422 } 13423 } 13424 } 13425 // Rule at src/isa/s390x/lower.isle line 1936. 13426 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13427 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13428 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13429 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13430 return Some(expr3_0); 13431 } 13432 return None; 13433 } 13434 13435 // Generated as internal constructor for term icmpu_val. 13436 pub fn constructor_icmpu_val<C: Context>( 13437 ctx: &mut C, 13438 arg0: bool, 13439 arg1: Value, 13440 arg2: Value, 13441 ) -> Option<ProducesFlags> { 13442 let pattern0_0 = arg0; 13443 if pattern0_0 == true { 13444 let pattern2_0 = arg1; 13445 let pattern3_0 = C::value_type(ctx, pattern2_0); 13446 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13447 let pattern5_0 = arg2; 13448 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13449 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13450 if let &InstructionData::Load { 13451 opcode: ref pattern8_0, 13452 arg: pattern8_1, 13453 flags: pattern8_2, 13454 offset: pattern8_3, 13455 } = &pattern7_0 13456 { 13457 match pattern8_0 { 13458 &Opcode::Uload16 => { 13459 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13460 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13461 if let &InstructionData::UnaryGlobalValue { 13462 opcode: ref pattern12_0, 13463 global_value: pattern12_1, 13464 } = &pattern11_0 13465 { 13466 if let &Opcode::SymbolValue = pattern12_0 { 13467 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13468 C::symbol_value_data(ctx, pattern12_1) 13469 { 13470 if let Some(()) = 13471 C::reloc_distance_near(ctx, pattern14_1) 13472 { 13473 let pattern16_0 = 13474 C::i64_from_offset(ctx, pattern8_3); 13475 let closure17 = || { 13476 return Some(pattern14_2); 13477 }; 13478 if let Some(pattern17_0) = closure17() { 13479 if let Some(pattern18_0) = 13480 C::memarg_symbol_offset_sum( 13481 ctx, 13482 pattern16_0, 13483 pattern17_0, 13484 ) 13485 { 13486 let pattern19_0 = 13487 C::inst_data(ctx, pattern6_0); 13488 if let &InstructionData::Load { 13489 opcode: ref pattern20_0, 13490 arg: pattern20_1, 13491 flags: pattern20_2, 13492 offset: pattern20_3, 13493 } = &pattern19_0 13494 { 13495 if let &Opcode::Uload16 = pattern20_0 { 13496 if let Some(()) = 13497 C::bigendian(ctx, pattern20_2) 13498 { 13499 // Rule at src/isa/s390x/lower.isle line 1993. 13500 let expr0_0 = C::put_in_reg( 13501 ctx, pattern2_0, 13502 ); 13503 let expr1_0 = 13504 constructor_sink_uload16( 13505 ctx, pattern6_0, 13506 )?; 13507 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13508 return Some(expr2_0); 13509 } 13510 } 13511 } 13512 } 13513 } 13514 } 13515 } 13516 } 13517 } 13518 } 13519 } 13520 &Opcode::Uload32 => { 13521 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13522 // Rule at src/isa/s390x/lower.isle line 1996. 13523 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13524 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13525 let expr2_0 = constructor_icmpu_mem_zext32( 13526 ctx, pattern4_0, expr0_0, &expr1_0, 13527 )?; 13528 return Some(expr2_0); 13529 } 13530 } 13531 _ => {} 13532 } 13533 } 13534 } 13535 let pattern6_0 = C::value_type(ctx, pattern5_0); 13536 if pattern6_0 == I16 { 13537 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13538 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13539 if let &InstructionData::Load { 13540 opcode: ref pattern10_0, 13541 arg: pattern10_1, 13542 flags: pattern10_2, 13543 offset: pattern10_3, 13544 } = &pattern9_0 13545 { 13546 if let &Opcode::Load = pattern10_0 { 13547 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13548 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13549 if let &InstructionData::UnaryGlobalValue { 13550 opcode: ref pattern14_0, 13551 global_value: pattern14_1, 13552 } = &pattern13_0 13553 { 13554 if let &Opcode::SymbolValue = pattern14_0 { 13555 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13556 C::symbol_value_data(ctx, pattern14_1) 13557 { 13558 if let Some(()) = 13559 C::reloc_distance_near(ctx, pattern16_1) 13560 { 13561 let pattern18_0 = 13562 C::i64_from_offset(ctx, pattern10_3); 13563 let closure19 = || { 13564 return Some(pattern16_2); 13565 }; 13566 if let Some(pattern19_0) = closure19() { 13567 if let Some(pattern20_0) = 13568 C::memarg_symbol_offset_sum( 13569 ctx, 13570 pattern18_0, 13571 pattern19_0, 13572 ) 13573 { 13574 let pattern21_0 = 13575 C::inst_data(ctx, pattern8_0); 13576 if let &InstructionData::Load { 13577 opcode: ref pattern22_0, 13578 arg: pattern22_1, 13579 flags: pattern22_2, 13580 offset: pattern22_3, 13581 } = &pattern21_0 13582 { 13583 if let &Opcode::Load = pattern22_0 { 13584 if let Some(()) = 13585 C::bigendian(ctx, pattern22_2) 13586 { 13587 // Rule at src/isa/s390x/lower.isle line 1986. 13588 let expr0_0 = 13589 constructor_ty_ext32( 13590 ctx, pattern4_0, 13591 )?; 13592 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13593 let expr2_0 = 13594 constructor_sink_load( 13595 ctx, pattern8_0, 13596 )?; 13597 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13598 return Some(expr3_0); 13599 } 13600 } 13601 } 13602 } 13603 } 13604 } 13605 } 13606 } 13607 } 13608 } 13609 } 13610 } 13611 } 13612 } 13613 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13614 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13615 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13616 if let &InstructionData::Load { 13617 opcode: ref pattern10_0, 13618 arg: pattern10_1, 13619 flags: pattern10_2, 13620 offset: pattern10_3, 13621 } = &pattern9_0 13622 { 13623 if let &Opcode::Load = pattern10_0 { 13624 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13625 // Rule at src/isa/s390x/lower.isle line 1980. 13626 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13627 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13628 let expr2_0 = 13629 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13630 return Some(expr2_0); 13631 } 13632 } 13633 } 13634 } 13635 } 13636 } 13637 } 13638 let pattern1_0 = arg1; 13639 let pattern2_0 = C::value_type(ctx, pattern1_0); 13640 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13641 let pattern4_0 = arg2; 13642 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13643 // Rule at src/isa/s390x/lower.isle line 1976. 13644 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13645 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13646 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13647 return Some(expr2_0); 13648 } 13649 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13650 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13651 if let &InstructionData::Unary { 13652 opcode: ref pattern7_0, 13653 arg: pattern7_1, 13654 } = &pattern6_0 13655 { 13656 if let &Opcode::Uextend = pattern7_0 { 13657 let pattern9_0 = C::value_type(ctx, pattern7_1); 13658 if pattern9_0 == I32 { 13659 // Rule at src/isa/s390x/lower.isle line 1972. 13660 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13661 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13662 let expr2_0 = 13663 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13664 return Some(expr2_0); 13665 } 13666 } 13667 } 13668 } 13669 // Rule at src/isa/s390x/lower.isle line 1968. 13670 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13671 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13672 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13673 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13674 return Some(expr3_0); 13675 } 13676 return None; 13677 } 13678 13679 // Generated as internal constructor for term fcmp_val. 13680 pub fn constructor_fcmp_val<C: Context>( 13681 ctx: &mut C, 13682 arg0: &FloatCC, 13683 arg1: Value, 13684 arg2: Value, 13685 ) -> Option<ProducesBool> { 13686 let pattern0_0 = arg0; 13687 let pattern1_0 = arg1; 13688 let pattern2_0 = C::value_type(ctx, pattern1_0); 13689 let pattern3_0 = arg2; 13690 // Rule at src/isa/s390x/lower.isle line 2009. 13691 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13692 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13693 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13694 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13695 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13696 return Some(expr4_0); 13697 } 13698 13699 // Generated as internal constructor for term value_nonzero. 13700 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13701 let pattern0_0 = arg0; 13702 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13703 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13704 match &pattern2_0 { 13705 &InstructionData::FloatCompare { 13706 opcode: ref pattern3_0, 13707 args: ref pattern3_1, 13708 cond: ref pattern3_2, 13709 } => { 13710 if let &Opcode::Fcmp = pattern3_0 { 13711 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13712 // Rule at src/isa/s390x/lower.isle line 2037. 13713 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13714 return Some(expr0_0); 13715 } 13716 } 13717 &InstructionData::IntCompare { 13718 opcode: ref pattern3_0, 13719 args: ref pattern3_1, 13720 cond: ref pattern3_2, 13721 } => { 13722 if let &Opcode::Icmp = pattern3_0 { 13723 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13724 // Rule at src/isa/s390x/lower.isle line 2036. 13725 let expr0_0: bool = false; 13726 let expr1_0 = 13727 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13728 return Some(expr1_0); 13729 } 13730 } 13731 &InstructionData::Unary { 13732 opcode: ref pattern3_0, 13733 arg: pattern3_1, 13734 } => { 13735 if let &Opcode::Bint = pattern3_0 { 13736 // Rule at src/isa/s390x/lower.isle line 2035. 13737 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13738 return Some(expr0_0); 13739 } 13740 } 13741 _ => {} 13742 } 13743 } 13744 let pattern1_0 = C::value_type(ctx, pattern0_0); 13745 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13746 // Rule at src/isa/s390x/lower.isle line 2038. 13747 let expr0_0: Type = I32; 13748 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13749 let expr2_0: i16 = 0; 13750 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13751 let expr4_0 = IntCC::NotEqual; 13752 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13753 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13754 return Some(expr6_0); 13755 } 13756 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13757 // Rule at src/isa/s390x/lower.isle line 2041. 13758 let expr0_0: Type = I64; 13759 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13760 let expr2_0: i16 = 0; 13761 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13762 let expr4_0 = IntCC::NotEqual; 13763 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13764 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13765 return Some(expr6_0); 13766 } 13767 return None; 13768 } 13769