1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn i64_as_u64(&mut self, arg0: i64) -> u64; 43 fn u64_add(&mut self, arg0: u64, arg1: u64) -> u64; 44 fn u64_sub(&mut self, arg0: u64, arg1: u64) -> u64; 45 fn u64_and(&mut self, arg0: u64, arg1: u64) -> u64; 46 fn ty_bits(&mut self, arg0: Type) -> u8; 47 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 48 fn ty_bits_u64(&mut self, arg0: Type) -> u64; 49 fn ty_mask(&mut self, arg0: Type) -> u64; 50 fn ty_bytes(&mut self, arg0: Type) -> u16; 51 fn lane_type(&mut self, arg0: Type) -> Type; 52 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 53 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 54 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 55 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 56 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 57 fn ty_int_bool_64(&mut self, arg0: Type) -> Option<Type>; 58 fn ty_int_bool_ref_64(&mut self, arg0: Type) -> Option<Type>; 59 fn ty_int_bool_128(&mut self, arg0: Type) -> Option<Type>; 60 fn ty_scalar_float(&mut self, arg0: Type) -> Option<Type>; 61 fn ty_vec128(&mut self, arg0: Type) -> Option<Type>; 62 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 63 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 64 fn value_slice_empty(&mut self, arg0: ValueSlice) -> Option<()>; 65 fn value_slice_unwrap(&mut self, arg0: ValueSlice) -> Option<(Value, ValueSlice)>; 66 fn value_slice_len(&mut self, arg0: ValueSlice) -> usize; 67 fn value_slice_get(&mut self, arg0: ValueSlice, arg1: usize) -> Value; 68 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 69 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 70 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 71 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 72 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 73 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 74 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 75 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 76 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 77 fn value_type(&mut self, arg0: Value) -> Type; 78 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 79 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 80 fn offset32_to_u32(&mut self, arg0: Offset32) -> u32; 81 fn emit(&mut self, arg0: &MInst) -> Unit; 82 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 83 fn trap_code_division_by_zero(&mut self) -> TrapCode; 84 fn trap_code_integer_overflow(&mut self) -> TrapCode; 85 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 86 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 87 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 88 fn symbol_value_data( 89 &mut self, 90 arg0: GlobalValue, 91 ) -> Option<(ExternalName, RelocDistance, i64)>; 92 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 93 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 94 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 95 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 96 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 97 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 98 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 99 fn zero_reg(&mut self) -> Reg; 100 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 101 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 102 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 103 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 104 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 105 fn u8_as_u16(&mut self, arg0: u8) -> u16; 106 fn u64_as_u32(&mut self, arg0: u64) -> u32; 107 fn u64_as_i16(&mut self, arg0: u64) -> i16; 108 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 109 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 110 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 111 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 112 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 113 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 114 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 115 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 116 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 117 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 118 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 119 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 120 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 121 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 122 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 123 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 124 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 125 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 126 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 127 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 128 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 129 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 130 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 131 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 132 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 133 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 134 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 135 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 136 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 137 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 138 fn zero_offset(&mut self) -> Offset32; 139 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 140 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 141 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 142 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 143 fn memflags_trusted(&mut self) -> MemFlags; 144 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 145 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 146 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 147 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 148 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 149 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 150 fn sink_inst(&mut self, arg0: Inst) -> Unit; 151 fn inst_builder_new(&mut self) -> VecMInstBuilder; 152 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 153 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 154 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 155 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 156 } 157 158 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 405. 159 #[derive(Clone, Debug)] 160 pub enum SideEffectNoResult { 161 Inst { inst: MInst }, 162 } 163 164 /// Internal type ProducesFlags: defined at src/prelude.isle line 427. 165 #[derive(Clone, Debug)] 166 pub enum ProducesFlags { 167 ProducesFlagsSideEffect { inst: MInst }, 168 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 169 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 170 } 171 172 /// Internal type ConsumesFlags: defined at src/prelude.isle line 438. 173 #[derive(Clone, Debug)] 174 pub enum ConsumesFlags { 175 ConsumesFlagsReturnsResultWithProducer { 176 inst: MInst, 177 result: Reg, 178 }, 179 ConsumesFlagsReturnsReg { 180 inst: MInst, 181 result: Reg, 182 }, 183 ConsumesFlagsTwiceReturnsValueRegs { 184 inst1: MInst, 185 inst2: MInst, 186 result: ValueRegs, 187 }, 188 ConsumesFlagsFourTimesReturnsValueRegs { 189 inst1: MInst, 190 inst2: MInst, 191 inst3: MInst, 192 inst4: MInst, 193 result: ValueRegs, 194 }, 195 } 196 197 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 198 #[derive(Clone, Debug)] 199 pub enum MInst { 200 Nop0, 201 Nop2, 202 AluRRR { 203 alu_op: ALUOp, 204 rd: WritableReg, 205 rn: Reg, 206 rm: Reg, 207 }, 208 AluRRSImm16 { 209 alu_op: ALUOp, 210 rd: WritableReg, 211 rn: Reg, 212 imm: i16, 213 }, 214 AluRR { 215 alu_op: ALUOp, 216 rd: WritableReg, 217 rm: Reg, 218 }, 219 AluRX { 220 alu_op: ALUOp, 221 rd: WritableReg, 222 mem: MemArg, 223 }, 224 AluRSImm16 { 225 alu_op: ALUOp, 226 rd: WritableReg, 227 imm: i16, 228 }, 229 AluRSImm32 { 230 alu_op: ALUOp, 231 rd: WritableReg, 232 imm: i32, 233 }, 234 AluRUImm32 { 235 alu_op: ALUOp, 236 rd: WritableReg, 237 imm: u32, 238 }, 239 AluRUImm16Shifted { 240 alu_op: ALUOp, 241 rd: WritableReg, 242 imm: UImm16Shifted, 243 }, 244 AluRUImm32Shifted { 245 alu_op: ALUOp, 246 rd: WritableReg, 247 imm: UImm32Shifted, 248 }, 249 SMulWide { 250 rn: Reg, 251 rm: Reg, 252 }, 253 UMulWide { 254 rn: Reg, 255 }, 256 SDivMod32 { 257 rn: Reg, 258 }, 259 SDivMod64 { 260 rn: Reg, 261 }, 262 UDivMod32 { 263 rn: Reg, 264 }, 265 UDivMod64 { 266 rn: Reg, 267 }, 268 Flogr { 269 rn: Reg, 270 }, 271 ShiftRR { 272 shift_op: ShiftOp, 273 rd: WritableReg, 274 rn: Reg, 275 shift_imm: u8, 276 shift_reg: Reg, 277 }, 278 RxSBG { 279 op: RxSBGOp, 280 rd: WritableReg, 281 rn: Reg, 282 start_bit: u8, 283 end_bit: u8, 284 rotate_amt: i8, 285 }, 286 RxSBGTest { 287 op: RxSBGOp, 288 rd: Reg, 289 rn: Reg, 290 start_bit: u8, 291 end_bit: u8, 292 rotate_amt: i8, 293 }, 294 UnaryRR { 295 op: UnaryOp, 296 rd: WritableReg, 297 rn: Reg, 298 }, 299 CmpRR { 300 op: CmpOp, 301 rn: Reg, 302 rm: Reg, 303 }, 304 CmpRX { 305 op: CmpOp, 306 rn: Reg, 307 mem: MemArg, 308 }, 309 CmpRSImm16 { 310 op: CmpOp, 311 rn: Reg, 312 imm: i16, 313 }, 314 CmpRSImm32 { 315 op: CmpOp, 316 rn: Reg, 317 imm: i32, 318 }, 319 CmpRUImm32 { 320 op: CmpOp, 321 rn: Reg, 322 imm: u32, 323 }, 324 CmpTrapRR { 325 op: CmpOp, 326 rn: Reg, 327 rm: Reg, 328 cond: Cond, 329 trap_code: TrapCode, 330 }, 331 CmpTrapRSImm16 { 332 op: CmpOp, 333 rn: Reg, 334 imm: i16, 335 cond: Cond, 336 trap_code: TrapCode, 337 }, 338 CmpTrapRUImm16 { 339 op: CmpOp, 340 rn: Reg, 341 imm: u16, 342 cond: Cond, 343 trap_code: TrapCode, 344 }, 345 AtomicRmw { 346 alu_op: ALUOp, 347 rd: WritableReg, 348 rn: Reg, 349 mem: MemArg, 350 }, 351 AtomicCas32 { 352 rd: WritableReg, 353 rn: Reg, 354 mem: MemArg, 355 }, 356 AtomicCas64 { 357 rd: WritableReg, 358 rn: Reg, 359 mem: MemArg, 360 }, 361 Fence, 362 Load32 { 363 rd: WritableReg, 364 mem: MemArg, 365 }, 366 Load32ZExt8 { 367 rd: WritableReg, 368 mem: MemArg, 369 }, 370 Load32SExt8 { 371 rd: WritableReg, 372 mem: MemArg, 373 }, 374 Load32ZExt16 { 375 rd: WritableReg, 376 mem: MemArg, 377 }, 378 Load32SExt16 { 379 rd: WritableReg, 380 mem: MemArg, 381 }, 382 Load64 { 383 rd: WritableReg, 384 mem: MemArg, 385 }, 386 Load64ZExt8 { 387 rd: WritableReg, 388 mem: MemArg, 389 }, 390 Load64SExt8 { 391 rd: WritableReg, 392 mem: MemArg, 393 }, 394 Load64ZExt16 { 395 rd: WritableReg, 396 mem: MemArg, 397 }, 398 Load64SExt16 { 399 rd: WritableReg, 400 mem: MemArg, 401 }, 402 Load64ZExt32 { 403 rd: WritableReg, 404 mem: MemArg, 405 }, 406 Load64SExt32 { 407 rd: WritableReg, 408 mem: MemArg, 409 }, 410 LoadRev16 { 411 rd: WritableReg, 412 mem: MemArg, 413 }, 414 LoadRev32 { 415 rd: WritableReg, 416 mem: MemArg, 417 }, 418 LoadRev64 { 419 rd: WritableReg, 420 mem: MemArg, 421 }, 422 Store8 { 423 rd: Reg, 424 mem: MemArg, 425 }, 426 Store16 { 427 rd: Reg, 428 mem: MemArg, 429 }, 430 Store32 { 431 rd: Reg, 432 mem: MemArg, 433 }, 434 Store64 { 435 rd: Reg, 436 mem: MemArg, 437 }, 438 StoreImm8 { 439 imm: u8, 440 mem: MemArg, 441 }, 442 StoreImm16 { 443 imm: i16, 444 mem: MemArg, 445 }, 446 StoreImm32SExt16 { 447 imm: i16, 448 mem: MemArg, 449 }, 450 StoreImm64SExt16 { 451 imm: i16, 452 mem: MemArg, 453 }, 454 StoreRev16 { 455 rd: Reg, 456 mem: MemArg, 457 }, 458 StoreRev32 { 459 rd: Reg, 460 mem: MemArg, 461 }, 462 StoreRev64 { 463 rd: Reg, 464 mem: MemArg, 465 }, 466 LoadMultiple64 { 467 rt: WritableReg, 468 rt2: WritableReg, 469 mem: MemArg, 470 }, 471 StoreMultiple64 { 472 rt: Reg, 473 rt2: Reg, 474 mem: MemArg, 475 }, 476 Mov32 { 477 rd: WritableReg, 478 rm: Reg, 479 }, 480 Mov64 { 481 rd: WritableReg, 482 rm: Reg, 483 }, 484 Mov32Imm { 485 rd: WritableReg, 486 imm: u32, 487 }, 488 Mov32SImm16 { 489 rd: WritableReg, 490 imm: i16, 491 }, 492 Mov64SImm16 { 493 rd: WritableReg, 494 imm: i16, 495 }, 496 Mov64SImm32 { 497 rd: WritableReg, 498 imm: i32, 499 }, 500 Mov64UImm16Shifted { 501 rd: WritableReg, 502 imm: UImm16Shifted, 503 }, 504 Mov64UImm32Shifted { 505 rd: WritableReg, 506 imm: UImm32Shifted, 507 }, 508 Insert64UImm16Shifted { 509 rd: WritableReg, 510 imm: UImm16Shifted, 511 }, 512 Insert64UImm32Shifted { 513 rd: WritableReg, 514 imm: UImm32Shifted, 515 }, 516 Extend { 517 rd: WritableReg, 518 rn: Reg, 519 signed: bool, 520 from_bits: u8, 521 to_bits: u8, 522 }, 523 CMov32 { 524 rd: WritableReg, 525 cond: Cond, 526 rm: Reg, 527 }, 528 CMov64 { 529 rd: WritableReg, 530 cond: Cond, 531 rm: Reg, 532 }, 533 CMov32SImm16 { 534 rd: WritableReg, 535 cond: Cond, 536 imm: i16, 537 }, 538 CMov64SImm16 { 539 rd: WritableReg, 540 cond: Cond, 541 imm: i16, 542 }, 543 FpuMove32 { 544 rd: WritableReg, 545 rn: Reg, 546 }, 547 FpuMove64 { 548 rd: WritableReg, 549 rn: Reg, 550 }, 551 FpuCMov32 { 552 rd: WritableReg, 553 cond: Cond, 554 rm: Reg, 555 }, 556 FpuCMov64 { 557 rd: WritableReg, 558 cond: Cond, 559 rm: Reg, 560 }, 561 MovToFpr { 562 rd: WritableReg, 563 rn: Reg, 564 }, 565 MovFromFpr { 566 rd: WritableReg, 567 rn: Reg, 568 }, 569 FpuRR { 570 fpu_op: FPUOp1, 571 rd: WritableReg, 572 rn: Reg, 573 }, 574 FpuRRR { 575 fpu_op: FPUOp2, 576 rd: WritableReg, 577 rm: Reg, 578 }, 579 FpuRRRR { 580 fpu_op: FPUOp3, 581 rd: WritableReg, 582 rn: Reg, 583 rm: Reg, 584 }, 585 FpuCopysign { 586 rd: WritableReg, 587 rn: Reg, 588 rm: Reg, 589 }, 590 FpuCmp32 { 591 rn: Reg, 592 rm: Reg, 593 }, 594 FpuCmp64 { 595 rn: Reg, 596 rm: Reg, 597 }, 598 FpuLoad32 { 599 rd: WritableReg, 600 mem: MemArg, 601 }, 602 FpuStore32 { 603 rd: Reg, 604 mem: MemArg, 605 }, 606 FpuLoad64 { 607 rd: WritableReg, 608 mem: MemArg, 609 }, 610 FpuStore64 { 611 rd: Reg, 612 mem: MemArg, 613 }, 614 FpuLoadRev32 { 615 rd: WritableReg, 616 mem: MemArg, 617 }, 618 FpuStoreRev32 { 619 rd: Reg, 620 mem: MemArg, 621 }, 622 FpuLoadRev64 { 623 rd: WritableReg, 624 mem: MemArg, 625 }, 626 FpuStoreRev64 { 627 rd: Reg, 628 mem: MemArg, 629 }, 630 LoadFpuConst32 { 631 rd: WritableReg, 632 const_data: u32, 633 }, 634 LoadFpuConst64 { 635 rd: WritableReg, 636 const_data: u64, 637 }, 638 FpuToInt { 639 op: FpuToIntOp, 640 rd: WritableReg, 641 rn: Reg, 642 }, 643 IntToFpu { 644 op: IntToFpuOp, 645 rd: WritableReg, 646 rn: Reg, 647 }, 648 FpuRound { 649 op: FpuRoundMode, 650 rd: WritableReg, 651 rn: Reg, 652 }, 653 FpuVecRRR { 654 fpu_op: FPUOp2, 655 rd: WritableReg, 656 rn: Reg, 657 rm: Reg, 658 }, 659 Call { 660 link: WritableReg, 661 info: BoxCallInfo, 662 }, 663 CallInd { 664 link: WritableReg, 665 info: BoxCallIndInfo, 666 }, 667 Ret { 668 link: Reg, 669 }, 670 EpiloguePlaceholder, 671 Jump { 672 dest: MachLabel, 673 }, 674 CondBr { 675 taken: MachLabel, 676 not_taken: MachLabel, 677 cond: Cond, 678 }, 679 TrapIf { 680 cond: Cond, 681 trap_code: TrapCode, 682 }, 683 OneWayCondBr { 684 target: MachLabel, 685 cond: Cond, 686 }, 687 IndirectBr { 688 rn: Reg, 689 targets: VecMachLabel, 690 }, 691 Debugtrap, 692 Trap { 693 trap_code: TrapCode, 694 }, 695 JTSequence { 696 ridx: Reg, 697 targets: VecMachLabel, 698 }, 699 LoadExtNameFar { 700 rd: WritableReg, 701 name: BoxExternalName, 702 offset: i64, 703 }, 704 LoadAddr { 705 rd: WritableReg, 706 mem: MemArg, 707 }, 708 Loop { 709 body: VecMInst, 710 cond: Cond, 711 }, 712 CondBreak { 713 cond: Cond, 714 }, 715 VirtualSPOffsetAdj { 716 offset: i64, 717 }, 718 ValueLabelMarker { 719 reg: Reg, 720 label: ValueLabel, 721 }, 722 Unwind { 723 inst: UnwindInst, 724 }, 725 } 726 727 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 728 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 729 pub enum ALUOp { 730 Add32, 731 Add32Ext16, 732 Add64, 733 Add64Ext16, 734 Add64Ext32, 735 AddLogical32, 736 AddLogical64, 737 AddLogical64Ext32, 738 Sub32, 739 Sub32Ext16, 740 Sub64, 741 Sub64Ext16, 742 Sub64Ext32, 743 SubLogical32, 744 SubLogical64, 745 SubLogical64Ext32, 746 Mul32, 747 Mul32Ext16, 748 Mul64, 749 Mul64Ext16, 750 Mul64Ext32, 751 And32, 752 And64, 753 Orr32, 754 Orr64, 755 Xor32, 756 Xor64, 757 AndNot32, 758 AndNot64, 759 OrrNot32, 760 OrrNot64, 761 XorNot32, 762 XorNot64, 763 } 764 765 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 766 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 767 pub enum UnaryOp { 768 Abs32, 769 Abs64, 770 Abs64Ext32, 771 Neg32, 772 Neg64, 773 Neg64Ext32, 774 PopcntByte, 775 PopcntReg, 776 BSwap32, 777 BSwap64, 778 } 779 780 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 781 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 782 pub enum ShiftOp { 783 RotL32, 784 RotL64, 785 LShL32, 786 LShL64, 787 LShR32, 788 LShR64, 789 AShR32, 790 AShR64, 791 } 792 793 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 794 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 795 pub enum RxSBGOp { 796 Insert, 797 And, 798 Or, 799 Xor, 800 } 801 802 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 803 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 804 pub enum CmpOp { 805 CmpS32, 806 CmpS32Ext16, 807 CmpS64, 808 CmpS64Ext16, 809 CmpS64Ext32, 810 CmpL32, 811 CmpL32Ext16, 812 CmpL64, 813 CmpL64Ext16, 814 CmpL64Ext32, 815 } 816 817 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 818 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 819 pub enum FPUOp1 { 820 Abs32, 821 Abs64, 822 Neg32, 823 Neg64, 824 NegAbs32, 825 NegAbs64, 826 Sqrt32, 827 Sqrt64, 828 Cvt32To64, 829 Cvt64To32, 830 } 831 832 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 833 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 834 pub enum FPUOp2 { 835 Add32, 836 Add64, 837 Sub32, 838 Sub64, 839 Mul32, 840 Mul64, 841 Div32, 842 Div64, 843 Max32, 844 Max64, 845 Min32, 846 Min64, 847 } 848 849 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 850 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 851 pub enum FPUOp3 { 852 MAdd32, 853 MAdd64, 854 MSub32, 855 MSub64, 856 } 857 858 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 859 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 860 pub enum FpuToIntOp { 861 F32ToU32, 862 F32ToI32, 863 F32ToU64, 864 F32ToI64, 865 F64ToU32, 866 F64ToI32, 867 F64ToU64, 868 F64ToI64, 869 } 870 871 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 872 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 873 pub enum IntToFpuOp { 874 U32ToF32, 875 I32ToF32, 876 U32ToF64, 877 I32ToF64, 878 U64ToF32, 879 I64ToF32, 880 U64ToF64, 881 I64ToF64, 882 } 883 884 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 885 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 886 pub enum FpuRoundMode { 887 Minus32, 888 Minus64, 889 Plus32, 890 Plus64, 891 Zero32, 892 Zero64, 893 Nearest32, 894 Nearest64, 895 } 896 897 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 898 #[derive(Clone, Debug)] 899 pub enum WritableRegPair { 900 WritableRegPair { hi: WritableReg, lo: WritableReg }, 901 } 902 903 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 904 #[derive(Clone, Debug)] 905 pub enum RegPair { 906 RegPair { hi: Reg, lo: Reg }, 907 } 908 909 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 910 #[derive(Clone, Debug)] 911 pub enum ProducesBool { 912 ProducesBool { producer: ProducesFlags, cond: Cond }, 913 } 914 915 // Generated as internal constructor for term output_reg. 916 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 917 let pattern0_0 = arg0; 918 // Rule at src/prelude.isle line 86. 919 let expr0_0 = C::value_reg(ctx, pattern0_0); 920 let expr1_0 = C::output(ctx, expr0_0); 921 return Some(expr1_0); 922 } 923 924 // Generated as internal constructor for term output_value. 925 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 926 let pattern0_0 = arg0; 927 // Rule at src/prelude.isle line 90. 928 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 929 let expr1_0 = C::output(ctx, expr0_0); 930 return Some(expr1_0); 931 } 932 933 // Generated as internal constructor for term temp_reg. 934 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 935 let pattern0_0 = arg0; 936 // Rule at src/prelude.isle line 110. 937 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 938 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 939 return Some(expr1_0); 940 } 941 942 // Generated as internal constructor for term lo_reg. 943 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 944 let pattern0_0 = arg0; 945 // Rule at src/prelude.isle line 145. 946 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 947 let expr1_0: usize = 0; 948 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 949 return Some(expr2_0); 950 } 951 952 // Generated as internal constructor for term side_effect. 953 pub fn constructor_side_effect<C: Context>( 954 ctx: &mut C, 955 arg0: &SideEffectNoResult, 956 ) -> Option<InstOutput> { 957 let pattern0_0 = arg0; 958 if let &SideEffectNoResult::Inst { 959 inst: ref pattern1_0, 960 } = pattern0_0 961 { 962 // Rule at src/prelude.isle line 410. 963 let expr0_0 = C::emit(ctx, pattern1_0); 964 let expr1_0 = C::output_none(ctx); 965 return Some(expr1_0); 966 } 967 return None; 968 } 969 970 // Generated as internal constructor for term safepoint. 971 pub fn constructor_safepoint<C: Context>( 972 ctx: &mut C, 973 arg0: &SideEffectNoResult, 974 ) -> Option<InstOutput> { 975 let pattern0_0 = arg0; 976 if let &SideEffectNoResult::Inst { 977 inst: ref pattern1_0, 978 } = pattern0_0 979 { 980 // Rule at src/prelude.isle line 416. 981 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 982 let expr1_0 = C::output_none(ctx); 983 return Some(expr1_0); 984 } 985 return None; 986 } 987 988 // Generated as internal constructor for term produces_flags_get_reg. 989 pub fn constructor_produces_flags_get_reg<C: Context>( 990 ctx: &mut C, 991 arg0: &ProducesFlags, 992 ) -> Option<Reg> { 993 let pattern0_0 = arg0; 994 if let &ProducesFlags::ProducesFlagsReturnsReg { 995 inst: ref pattern1_0, 996 result: pattern1_1, 997 } = pattern0_0 998 { 999 // Rule at src/prelude.isle line 454. 1000 return Some(pattern1_1); 1001 } 1002 return None; 1003 } 1004 1005 // Generated as internal constructor for term produces_flags_ignore. 1006 pub fn constructor_produces_flags_ignore<C: Context>( 1007 ctx: &mut C, 1008 arg0: &ProducesFlags, 1009 ) -> Option<ProducesFlags> { 1010 let pattern0_0 = arg0; 1011 match pattern0_0 { 1012 &ProducesFlags::ProducesFlagsReturnsReg { 1013 inst: ref pattern1_0, 1014 result: pattern1_1, 1015 } => { 1016 // Rule at src/prelude.isle line 459. 1017 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1018 inst: pattern1_0.clone(), 1019 }; 1020 return Some(expr0_0); 1021 } 1022 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1023 inst: ref pattern1_0, 1024 result: pattern1_1, 1025 } => { 1026 // Rule at src/prelude.isle line 461. 1027 let expr0_0 = ProducesFlags::ProducesFlagsSideEffect { 1028 inst: pattern1_0.clone(), 1029 }; 1030 return Some(expr0_0); 1031 } 1032 _ => {} 1033 } 1034 return None; 1035 } 1036 1037 // Generated as internal constructor for term consumes_flags_concat. 1038 pub fn constructor_consumes_flags_concat<C: Context>( 1039 ctx: &mut C, 1040 arg0: &ConsumesFlags, 1041 arg1: &ConsumesFlags, 1042 ) -> Option<ConsumesFlags> { 1043 let pattern0_0 = arg0; 1044 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1045 inst: ref pattern1_0, 1046 result: pattern1_1, 1047 } = pattern0_0 1048 { 1049 let pattern2_0 = arg1; 1050 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 1051 inst: ref pattern3_0, 1052 result: pattern3_1, 1053 } = pattern2_0 1054 { 1055 // Rule at src/prelude.isle line 468. 1056 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1057 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1058 inst1: pattern1_0.clone(), 1059 inst2: pattern3_0.clone(), 1060 result: expr0_0, 1061 }; 1062 return Some(expr1_0); 1063 } 1064 } 1065 return None; 1066 } 1067 1068 // Generated as internal constructor for term with_flags. 1069 pub fn constructor_with_flags<C: Context>( 1070 ctx: &mut C, 1071 arg0: &ProducesFlags, 1072 arg1: &ConsumesFlags, 1073 ) -> Option<ValueRegs> { 1074 let pattern0_0 = arg0; 1075 match pattern0_0 { 1076 &ProducesFlags::ProducesFlagsSideEffect { 1077 inst: ref pattern1_0, 1078 } => { 1079 let pattern2_0 = arg1; 1080 match pattern2_0 { 1081 &ConsumesFlags::ConsumesFlagsReturnsReg { 1082 inst: ref pattern3_0, 1083 result: pattern3_1, 1084 } => { 1085 // Rule at src/prelude.isle line 493. 1086 let expr0_0 = C::emit(ctx, pattern1_0); 1087 let expr1_0 = C::emit(ctx, pattern3_0); 1088 let expr2_0 = C::value_reg(ctx, pattern3_1); 1089 return Some(expr2_0); 1090 } 1091 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1092 inst1: ref pattern3_0, 1093 inst2: ref pattern3_1, 1094 result: pattern3_2, 1095 } => { 1096 // Rule at src/prelude.isle line 499. 1097 let expr0_0 = C::emit(ctx, pattern1_0); 1098 let expr1_0 = C::emit(ctx, pattern3_0); 1099 let expr2_0 = C::emit(ctx, pattern3_1); 1100 return Some(pattern3_2); 1101 } 1102 &ConsumesFlags::ConsumesFlagsFourTimesReturnsValueRegs { 1103 inst1: ref pattern3_0, 1104 inst2: ref pattern3_1, 1105 inst3: ref pattern3_2, 1106 inst4: ref pattern3_3, 1107 result: pattern3_4, 1108 } => { 1109 // Rule at src/prelude.isle line 511. 1110 let expr0_0 = C::emit(ctx, pattern1_0); 1111 let expr1_0 = C::emit(ctx, pattern3_0); 1112 let expr2_0 = C::emit(ctx, pattern3_1); 1113 let expr3_0 = C::emit(ctx, pattern3_2); 1114 let expr4_0 = C::emit(ctx, pattern3_3); 1115 return Some(pattern3_4); 1116 } 1117 _ => {} 1118 } 1119 } 1120 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1121 inst: ref pattern1_0, 1122 result: pattern1_1, 1123 } => { 1124 let pattern2_0 = arg1; 1125 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1126 inst: ref pattern3_0, 1127 result: pattern3_1, 1128 } = pattern2_0 1129 { 1130 // Rule at src/prelude.isle line 487. 1131 let expr0_0 = C::emit(ctx, pattern1_0); 1132 let expr1_0 = C::emit(ctx, pattern3_0); 1133 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1134 return Some(expr2_0); 1135 } 1136 } 1137 _ => {} 1138 } 1139 return None; 1140 } 1141 1142 // Generated as internal constructor for term with_flags_reg. 1143 pub fn constructor_with_flags_reg<C: Context>( 1144 ctx: &mut C, 1145 arg0: &ProducesFlags, 1146 arg1: &ConsumesFlags, 1147 ) -> Option<Reg> { 1148 let pattern0_0 = arg0; 1149 let pattern1_0 = arg1; 1150 // Rule at src/prelude.isle line 528. 1151 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1152 let expr1_0: usize = 0; 1153 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1154 return Some(expr2_0); 1155 } 1156 1157 // Generated as internal constructor for term mask_amt_reg. 1158 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1159 let pattern0_0 = arg0; 1160 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1161 let pattern2_0 = arg1; 1162 // Rule at src/isa/s390x/inst.isle line 1040. 1163 let expr0_0: i64 = -1; 1164 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1165 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1166 let expr3_0: u8 = 0; 1167 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1168 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1169 return Some(expr5_0); 1170 } 1171 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1172 let pattern2_0 = arg1; 1173 // Rule at src/isa/s390x/inst.isle line 1043. 1174 return Some(pattern2_0); 1175 } 1176 return None; 1177 } 1178 1179 // Generated as internal constructor for term lower_address. 1180 pub fn constructor_lower_address<C: Context>( 1181 ctx: &mut C, 1182 arg0: MemFlags, 1183 arg1: Value, 1184 arg2: Offset32, 1185 ) -> Option<MemArg> { 1186 let pattern0_0 = arg0; 1187 let pattern1_0 = arg1; 1188 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1189 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1190 match &pattern3_0 { 1191 &InstructionData::UnaryGlobalValue { 1192 opcode: ref pattern4_0, 1193 global_value: pattern4_1, 1194 } => { 1195 if let &Opcode::SymbolValue = pattern4_0 { 1196 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1197 C::symbol_value_data(ctx, pattern4_1) 1198 { 1199 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1200 let pattern8_0 = arg2; 1201 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1202 let closure10 = || { 1203 return Some(pattern6_2); 1204 }; 1205 if let Some(pattern10_0) = closure10() { 1206 if let Some(pattern11_0) = 1207 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1208 { 1209 // Rule at src/isa/s390x/inst.isle line 1136. 1210 let expr0_0 = 1211 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1212 return Some(expr0_0); 1213 } 1214 } 1215 } 1216 } 1217 } 1218 } 1219 &InstructionData::Binary { 1220 opcode: ref pattern4_0, 1221 args: ref pattern4_1, 1222 } => { 1223 if let &Opcode::Iadd = pattern4_0 { 1224 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1225 let pattern7_0 = arg2; 1226 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1227 if pattern8_0 == 0 { 1228 // Rule at src/isa/s390x/inst.isle line 1133. 1229 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1230 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1231 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1232 return Some(expr2_0); 1233 } 1234 } 1235 } 1236 _ => {} 1237 } 1238 } 1239 let pattern2_0 = arg2; 1240 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1241 // Rule at src/isa/s390x/inst.isle line 1130. 1242 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1243 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1244 return Some(expr1_0); 1245 } 1246 1247 // Generated as internal constructor for term stack_addr_impl. 1248 pub fn constructor_stack_addr_impl<C: Context>( 1249 ctx: &mut C, 1250 arg0: Type, 1251 arg1: StackSlot, 1252 arg2: Offset32, 1253 ) -> Option<Reg> { 1254 let pattern0_0 = arg0; 1255 let pattern1_0 = arg1; 1256 let pattern2_0 = arg2; 1257 // Rule at src/isa/s390x/inst.isle line 1163. 1258 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1259 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1260 let expr2_0 = C::emit(ctx, &expr1_0); 1261 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1262 return Some(expr3_0); 1263 } 1264 1265 // Generated as internal constructor for term sink_load. 1266 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1267 let pattern0_0 = arg0; 1268 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1269 if let &InstructionData::Load { 1270 opcode: ref pattern2_0, 1271 arg: pattern2_1, 1272 flags: pattern2_2, 1273 offset: pattern2_3, 1274 } = &pattern1_0 1275 { 1276 if let &Opcode::Load = pattern2_0 { 1277 // Rule at src/isa/s390x/inst.isle line 1233. 1278 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1279 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1280 return Some(expr1_0); 1281 } 1282 } 1283 return None; 1284 } 1285 1286 // Generated as internal constructor for term sink_sload16. 1287 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1288 let pattern0_0 = arg0; 1289 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1290 if let &InstructionData::Load { 1291 opcode: ref pattern2_0, 1292 arg: pattern2_1, 1293 flags: pattern2_2, 1294 offset: pattern2_3, 1295 } = &pattern1_0 1296 { 1297 if let &Opcode::Sload16 = pattern2_0 { 1298 // Rule at src/isa/s390x/inst.isle line 1240. 1299 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1300 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1301 return Some(expr1_0); 1302 } 1303 } 1304 return None; 1305 } 1306 1307 // Generated as internal constructor for term sink_sload32. 1308 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1309 let pattern0_0 = arg0; 1310 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1311 if let &InstructionData::Load { 1312 opcode: ref pattern2_0, 1313 arg: pattern2_1, 1314 flags: pattern2_2, 1315 offset: pattern2_3, 1316 } = &pattern1_0 1317 { 1318 if let &Opcode::Sload32 = pattern2_0 { 1319 // Rule at src/isa/s390x/inst.isle line 1247. 1320 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1321 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1322 return Some(expr1_0); 1323 } 1324 } 1325 return None; 1326 } 1327 1328 // Generated as internal constructor for term sink_uload16. 1329 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1330 let pattern0_0 = arg0; 1331 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1332 if let &InstructionData::Load { 1333 opcode: ref pattern2_0, 1334 arg: pattern2_1, 1335 flags: pattern2_2, 1336 offset: pattern2_3, 1337 } = &pattern1_0 1338 { 1339 if let &Opcode::Uload16 = pattern2_0 { 1340 // Rule at src/isa/s390x/inst.isle line 1254. 1341 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1342 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1343 return Some(expr1_0); 1344 } 1345 } 1346 return None; 1347 } 1348 1349 // Generated as internal constructor for term sink_uload32. 1350 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1351 let pattern0_0 = arg0; 1352 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1353 if let &InstructionData::Load { 1354 opcode: ref pattern2_0, 1355 arg: pattern2_1, 1356 flags: pattern2_2, 1357 offset: pattern2_3, 1358 } = &pattern1_0 1359 { 1360 if let &Opcode::Uload32 = pattern2_0 { 1361 // Rule at src/isa/s390x/inst.isle line 1261. 1362 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1363 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1364 return Some(expr1_0); 1365 } 1366 } 1367 return None; 1368 } 1369 1370 // Generated as internal constructor for term temp_writable_regpair. 1371 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1372 // Rule at src/isa/s390x/inst.isle line 1274. 1373 let expr0_0: u8 = 0; 1374 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1375 let expr2_0: u8 = 1; 1376 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1377 let expr4_0 = WritableRegPair::WritableRegPair { 1378 hi: expr1_0, 1379 lo: expr3_0, 1380 }; 1381 return Some(expr4_0); 1382 } 1383 1384 // Generated as internal constructor for term copy_writable_regpair. 1385 pub fn constructor_copy_writable_regpair<C: Context>( 1386 ctx: &mut C, 1387 arg0: &RegPair, 1388 ) -> Option<WritableRegPair> { 1389 let pattern0_0 = arg0; 1390 // Rule at src/isa/s390x/inst.isle line 1280. 1391 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1392 return Some(expr0_0); 1393 } 1394 1395 // Generated as internal constructor for term writable_regpair_hi. 1396 pub fn constructor_writable_regpair_hi<C: Context>( 1397 ctx: &mut C, 1398 arg0: &WritableRegPair, 1399 ) -> Option<WritableReg> { 1400 let pattern0_0 = arg0; 1401 if let &WritableRegPair::WritableRegPair { 1402 hi: pattern1_0, 1403 lo: pattern1_1, 1404 } = pattern0_0 1405 { 1406 // Rule at src/isa/s390x/inst.isle line 1284. 1407 return Some(pattern1_0); 1408 } 1409 return None; 1410 } 1411 1412 // Generated as internal constructor for term writable_regpair_lo. 1413 pub fn constructor_writable_regpair_lo<C: Context>( 1414 ctx: &mut C, 1415 arg0: &WritableRegPair, 1416 ) -> Option<WritableReg> { 1417 let pattern0_0 = arg0; 1418 if let &WritableRegPair::WritableRegPair { 1419 hi: pattern1_0, 1420 lo: pattern1_1, 1421 } = pattern0_0 1422 { 1423 // Rule at src/isa/s390x/inst.isle line 1288. 1424 return Some(pattern1_1); 1425 } 1426 return None; 1427 } 1428 1429 // Generated as internal constructor for term writable_regpair_to_regpair. 1430 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1431 ctx: &mut C, 1432 arg0: &WritableRegPair, 1433 ) -> Option<RegPair> { 1434 let pattern0_0 = arg0; 1435 if let &WritableRegPair::WritableRegPair { 1436 hi: pattern1_0, 1437 lo: pattern1_1, 1438 } = pattern0_0 1439 { 1440 // Rule at src/isa/s390x/inst.isle line 1295. 1441 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1442 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1443 let expr2_0 = RegPair::RegPair { 1444 hi: expr0_0, 1445 lo: expr1_0, 1446 }; 1447 return Some(expr2_0); 1448 } 1449 return None; 1450 } 1451 1452 // Generated as internal constructor for term uninitialized_regpair. 1453 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1454 // Rule at src/isa/s390x/inst.isle line 1300. 1455 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1456 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1457 return Some(expr1_0); 1458 } 1459 1460 // Generated as internal constructor for term regpair_hi. 1461 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1462 let pattern0_0 = arg0; 1463 if let &RegPair::RegPair { 1464 hi: pattern1_0, 1465 lo: pattern1_1, 1466 } = pattern0_0 1467 { 1468 // Rule at src/isa/s390x/inst.isle line 1305. 1469 return Some(pattern1_0); 1470 } 1471 return None; 1472 } 1473 1474 // Generated as internal constructor for term regpair_lo. 1475 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1476 let pattern0_0 = arg0; 1477 if let &RegPair::RegPair { 1478 hi: pattern1_0, 1479 lo: pattern1_1, 1480 } = pattern0_0 1481 { 1482 // Rule at src/isa/s390x/inst.isle line 1309. 1483 return Some(pattern1_1); 1484 } 1485 return None; 1486 } 1487 1488 // Generated as internal constructor for term alu_rrr. 1489 pub fn constructor_alu_rrr<C: Context>( 1490 ctx: &mut C, 1491 arg0: Type, 1492 arg1: &ALUOp, 1493 arg2: Reg, 1494 arg3: Reg, 1495 ) -> Option<Reg> { 1496 let pattern0_0 = arg0; 1497 let pattern1_0 = arg1; 1498 let pattern2_0 = arg2; 1499 let pattern3_0 = arg3; 1500 // Rule at src/isa/s390x/inst.isle line 1316. 1501 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1502 let expr1_0 = MInst::AluRRR { 1503 alu_op: pattern1_0.clone(), 1504 rd: expr0_0, 1505 rn: pattern2_0, 1506 rm: pattern3_0, 1507 }; 1508 let expr2_0 = C::emit(ctx, &expr1_0); 1509 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1510 return Some(expr3_0); 1511 } 1512 1513 // Generated as internal constructor for term alu_rrsimm16. 1514 pub fn constructor_alu_rrsimm16<C: Context>( 1515 ctx: &mut C, 1516 arg0: Type, 1517 arg1: &ALUOp, 1518 arg2: Reg, 1519 arg3: i16, 1520 ) -> Option<Reg> { 1521 let pattern0_0 = arg0; 1522 let pattern1_0 = arg1; 1523 let pattern2_0 = arg2; 1524 let pattern3_0 = arg3; 1525 // Rule at src/isa/s390x/inst.isle line 1323. 1526 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1527 let expr1_0 = MInst::AluRRSImm16 { 1528 alu_op: pattern1_0.clone(), 1529 rd: expr0_0, 1530 rn: pattern2_0, 1531 imm: pattern3_0, 1532 }; 1533 let expr2_0 = C::emit(ctx, &expr1_0); 1534 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1535 return Some(expr3_0); 1536 } 1537 1538 // Generated as internal constructor for term alu_rr. 1539 pub fn constructor_alu_rr<C: Context>( 1540 ctx: &mut C, 1541 arg0: Type, 1542 arg1: &ALUOp, 1543 arg2: Reg, 1544 arg3: Reg, 1545 ) -> Option<Reg> { 1546 let pattern0_0 = arg0; 1547 let pattern1_0 = arg1; 1548 let pattern2_0 = arg2; 1549 let pattern3_0 = arg3; 1550 // Rule at src/isa/s390x/inst.isle line 1330. 1551 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1552 let expr1_0 = MInst::AluRR { 1553 alu_op: pattern1_0.clone(), 1554 rd: expr0_0, 1555 rm: pattern3_0, 1556 }; 1557 let expr2_0 = C::emit(ctx, &expr1_0); 1558 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1559 return Some(expr3_0); 1560 } 1561 1562 // Generated as internal constructor for term alu_rx. 1563 pub fn constructor_alu_rx<C: Context>( 1564 ctx: &mut C, 1565 arg0: Type, 1566 arg1: &ALUOp, 1567 arg2: Reg, 1568 arg3: &MemArg, 1569 ) -> Option<Reg> { 1570 let pattern0_0 = arg0; 1571 let pattern1_0 = arg1; 1572 let pattern2_0 = arg2; 1573 let pattern3_0 = arg3; 1574 // Rule at src/isa/s390x/inst.isle line 1337. 1575 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1576 let expr1_0 = MInst::AluRX { 1577 alu_op: pattern1_0.clone(), 1578 rd: expr0_0, 1579 mem: pattern3_0.clone(), 1580 }; 1581 let expr2_0 = C::emit(ctx, &expr1_0); 1582 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1583 return Some(expr3_0); 1584 } 1585 1586 // Generated as internal constructor for term alu_rsimm16. 1587 pub fn constructor_alu_rsimm16<C: Context>( 1588 ctx: &mut C, 1589 arg0: Type, 1590 arg1: &ALUOp, 1591 arg2: Reg, 1592 arg3: i16, 1593 ) -> Option<Reg> { 1594 let pattern0_0 = arg0; 1595 let pattern1_0 = arg1; 1596 let pattern2_0 = arg2; 1597 let pattern3_0 = arg3; 1598 // Rule at src/isa/s390x/inst.isle line 1344. 1599 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1600 let expr1_0 = MInst::AluRSImm16 { 1601 alu_op: pattern1_0.clone(), 1602 rd: expr0_0, 1603 imm: pattern3_0, 1604 }; 1605 let expr2_0 = C::emit(ctx, &expr1_0); 1606 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1607 return Some(expr3_0); 1608 } 1609 1610 // Generated as internal constructor for term alu_rsimm32. 1611 pub fn constructor_alu_rsimm32<C: Context>( 1612 ctx: &mut C, 1613 arg0: Type, 1614 arg1: &ALUOp, 1615 arg2: Reg, 1616 arg3: i32, 1617 ) -> Option<Reg> { 1618 let pattern0_0 = arg0; 1619 let pattern1_0 = arg1; 1620 let pattern2_0 = arg2; 1621 let pattern3_0 = arg3; 1622 // Rule at src/isa/s390x/inst.isle line 1351. 1623 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1624 let expr1_0 = MInst::AluRSImm32 { 1625 alu_op: pattern1_0.clone(), 1626 rd: expr0_0, 1627 imm: pattern3_0, 1628 }; 1629 let expr2_0 = C::emit(ctx, &expr1_0); 1630 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1631 return Some(expr3_0); 1632 } 1633 1634 // Generated as internal constructor for term alu_ruimm32. 1635 pub fn constructor_alu_ruimm32<C: Context>( 1636 ctx: &mut C, 1637 arg0: Type, 1638 arg1: &ALUOp, 1639 arg2: Reg, 1640 arg3: u32, 1641 ) -> Option<Reg> { 1642 let pattern0_0 = arg0; 1643 let pattern1_0 = arg1; 1644 let pattern2_0 = arg2; 1645 let pattern3_0 = arg3; 1646 // Rule at src/isa/s390x/inst.isle line 1358. 1647 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1648 let expr1_0 = MInst::AluRUImm32 { 1649 alu_op: pattern1_0.clone(), 1650 rd: expr0_0, 1651 imm: pattern3_0, 1652 }; 1653 let expr2_0 = C::emit(ctx, &expr1_0); 1654 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1655 return Some(expr3_0); 1656 } 1657 1658 // Generated as internal constructor for term alu_ruimm16shifted. 1659 pub fn constructor_alu_ruimm16shifted<C: Context>( 1660 ctx: &mut C, 1661 arg0: Type, 1662 arg1: &ALUOp, 1663 arg2: Reg, 1664 arg3: UImm16Shifted, 1665 ) -> Option<Reg> { 1666 let pattern0_0 = arg0; 1667 let pattern1_0 = arg1; 1668 let pattern2_0 = arg2; 1669 let pattern3_0 = arg3; 1670 // Rule at src/isa/s390x/inst.isle line 1365. 1671 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1672 let expr1_0 = MInst::AluRUImm16Shifted { 1673 alu_op: pattern1_0.clone(), 1674 rd: expr0_0, 1675 imm: pattern3_0, 1676 }; 1677 let expr2_0 = C::emit(ctx, &expr1_0); 1678 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1679 return Some(expr3_0); 1680 } 1681 1682 // Generated as internal constructor for term alu_ruimm32shifted. 1683 pub fn constructor_alu_ruimm32shifted<C: Context>( 1684 ctx: &mut C, 1685 arg0: Type, 1686 arg1: &ALUOp, 1687 arg2: Reg, 1688 arg3: UImm32Shifted, 1689 ) -> Option<Reg> { 1690 let pattern0_0 = arg0; 1691 let pattern1_0 = arg1; 1692 let pattern2_0 = arg2; 1693 let pattern3_0 = arg3; 1694 // Rule at src/isa/s390x/inst.isle line 1372. 1695 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1696 let expr1_0 = MInst::AluRUImm32Shifted { 1697 alu_op: pattern1_0.clone(), 1698 rd: expr0_0, 1699 imm: pattern3_0, 1700 }; 1701 let expr2_0 = C::emit(ctx, &expr1_0); 1702 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1703 return Some(expr3_0); 1704 } 1705 1706 // Generated as internal constructor for term smul_wide. 1707 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1708 let pattern0_0 = arg0; 1709 let pattern1_0 = arg1; 1710 // Rule at src/isa/s390x/inst.isle line 1379. 1711 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1712 let expr1_0 = MInst::SMulWide { 1713 rn: pattern0_0, 1714 rm: pattern1_0, 1715 }; 1716 let expr2_0 = C::emit(ctx, &expr1_0); 1717 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1718 return Some(expr3_0); 1719 } 1720 1721 // Generated as internal constructor for term umul_wide. 1722 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1723 let pattern0_0 = arg0; 1724 let pattern1_0 = arg1; 1725 // Rule at src/isa/s390x/inst.isle line 1386. 1726 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1727 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1728 let expr2_0 = MInst::Mov64 { 1729 rd: expr1_0, 1730 rm: pattern1_0, 1731 }; 1732 let expr3_0 = C::emit(ctx, &expr2_0); 1733 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1734 let expr5_0 = C::emit(ctx, &expr4_0); 1735 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1736 return Some(expr6_0); 1737 } 1738 1739 // Generated as internal constructor for term sdivmod32. 1740 pub fn constructor_sdivmod32<C: Context>( 1741 ctx: &mut C, 1742 arg0: &RegPair, 1743 arg1: Reg, 1744 ) -> Option<RegPair> { 1745 let pattern0_0 = arg0; 1746 let pattern1_0 = arg1; 1747 // Rule at src/isa/s390x/inst.isle line 1394. 1748 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1749 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1750 let expr2_0 = C::emit(ctx, &expr1_0); 1751 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1752 return Some(expr3_0); 1753 } 1754 1755 // Generated as internal constructor for term sdivmod64. 1756 pub fn constructor_sdivmod64<C: Context>( 1757 ctx: &mut C, 1758 arg0: &RegPair, 1759 arg1: Reg, 1760 ) -> Option<RegPair> { 1761 let pattern0_0 = arg0; 1762 let pattern1_0 = arg1; 1763 // Rule at src/isa/s390x/inst.isle line 1401. 1764 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1765 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1766 let expr2_0 = C::emit(ctx, &expr1_0); 1767 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1768 return Some(expr3_0); 1769 } 1770 1771 // Generated as internal constructor for term udivmod32. 1772 pub fn constructor_udivmod32<C: Context>( 1773 ctx: &mut C, 1774 arg0: &RegPair, 1775 arg1: Reg, 1776 ) -> Option<RegPair> { 1777 let pattern0_0 = arg0; 1778 let pattern1_0 = arg1; 1779 // Rule at src/isa/s390x/inst.isle line 1408. 1780 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1781 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1782 let expr2_0 = C::emit(ctx, &expr1_0); 1783 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1784 return Some(expr3_0); 1785 } 1786 1787 // Generated as internal constructor for term udivmod64. 1788 pub fn constructor_udivmod64<C: Context>( 1789 ctx: &mut C, 1790 arg0: &RegPair, 1791 arg1: Reg, 1792 ) -> Option<RegPair> { 1793 let pattern0_0 = arg0; 1794 let pattern1_0 = arg1; 1795 // Rule at src/isa/s390x/inst.isle line 1415. 1796 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1797 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1798 let expr2_0 = C::emit(ctx, &expr1_0); 1799 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1800 return Some(expr3_0); 1801 } 1802 1803 // Generated as internal constructor for term shift_rr. 1804 pub fn constructor_shift_rr<C: Context>( 1805 ctx: &mut C, 1806 arg0: Type, 1807 arg1: &ShiftOp, 1808 arg2: Reg, 1809 arg3: u8, 1810 arg4: Reg, 1811 ) -> Option<Reg> { 1812 let pattern0_0 = arg0; 1813 let pattern1_0 = arg1; 1814 let pattern2_0 = arg2; 1815 let pattern3_0 = arg3; 1816 let pattern4_0 = arg4; 1817 // Rule at src/isa/s390x/inst.isle line 1422. 1818 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1819 let expr1_0 = MInst::ShiftRR { 1820 shift_op: pattern1_0.clone(), 1821 rd: expr0_0, 1822 rn: pattern2_0, 1823 shift_imm: pattern3_0, 1824 shift_reg: pattern4_0, 1825 }; 1826 let expr2_0 = C::emit(ctx, &expr1_0); 1827 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1828 return Some(expr3_0); 1829 } 1830 1831 // Generated as internal constructor for term rxsbg_test. 1832 pub fn constructor_rxsbg_test<C: Context>( 1833 ctx: &mut C, 1834 arg0: &RxSBGOp, 1835 arg1: Reg, 1836 arg2: Reg, 1837 arg3: u8, 1838 arg4: u8, 1839 arg5: i8, 1840 ) -> Option<ProducesFlags> { 1841 let pattern0_0 = arg0; 1842 let pattern1_0 = arg1; 1843 let pattern2_0 = arg2; 1844 let pattern3_0 = arg3; 1845 let pattern4_0 = arg4; 1846 let pattern5_0 = arg5; 1847 // Rule at src/isa/s390x/inst.isle line 1429. 1848 let expr0_0 = MInst::RxSBGTest { 1849 op: pattern0_0.clone(), 1850 rd: pattern1_0, 1851 rn: pattern2_0, 1852 start_bit: pattern3_0, 1853 end_bit: pattern4_0, 1854 rotate_amt: pattern5_0, 1855 }; 1856 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1857 return Some(expr1_0); 1858 } 1859 1860 // Generated as internal constructor for term unary_rr. 1861 pub fn constructor_unary_rr<C: Context>( 1862 ctx: &mut C, 1863 arg0: Type, 1864 arg1: &UnaryOp, 1865 arg2: Reg, 1866 ) -> Option<Reg> { 1867 let pattern0_0 = arg0; 1868 let pattern1_0 = arg1; 1869 let pattern2_0 = arg2; 1870 // Rule at src/isa/s390x/inst.isle line 1435. 1871 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1872 let expr1_0 = MInst::UnaryRR { 1873 op: pattern1_0.clone(), 1874 rd: expr0_0, 1875 rn: pattern2_0, 1876 }; 1877 let expr2_0 = C::emit(ctx, &expr1_0); 1878 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1879 return Some(expr3_0); 1880 } 1881 1882 // Generated as internal constructor for term cmp_rr. 1883 pub fn constructor_cmp_rr<C: Context>( 1884 ctx: &mut C, 1885 arg0: &CmpOp, 1886 arg1: Reg, 1887 arg2: Reg, 1888 ) -> Option<ProducesFlags> { 1889 let pattern0_0 = arg0; 1890 let pattern1_0 = arg1; 1891 let pattern2_0 = arg2; 1892 // Rule at src/isa/s390x/inst.isle line 1442. 1893 let expr0_0 = MInst::CmpRR { 1894 op: pattern0_0.clone(), 1895 rn: pattern1_0, 1896 rm: pattern2_0, 1897 }; 1898 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1899 return Some(expr1_0); 1900 } 1901 1902 // Generated as internal constructor for term cmp_rx. 1903 pub fn constructor_cmp_rx<C: Context>( 1904 ctx: &mut C, 1905 arg0: &CmpOp, 1906 arg1: Reg, 1907 arg2: &MemArg, 1908 ) -> Option<ProducesFlags> { 1909 let pattern0_0 = arg0; 1910 let pattern1_0 = arg1; 1911 let pattern2_0 = arg2; 1912 // Rule at src/isa/s390x/inst.isle line 1447. 1913 let expr0_0 = MInst::CmpRX { 1914 op: pattern0_0.clone(), 1915 rn: pattern1_0, 1916 mem: pattern2_0.clone(), 1917 }; 1918 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1919 return Some(expr1_0); 1920 } 1921 1922 // Generated as internal constructor for term cmp_rsimm16. 1923 pub fn constructor_cmp_rsimm16<C: Context>( 1924 ctx: &mut C, 1925 arg0: &CmpOp, 1926 arg1: Reg, 1927 arg2: i16, 1928 ) -> Option<ProducesFlags> { 1929 let pattern0_0 = arg0; 1930 let pattern1_0 = arg1; 1931 let pattern2_0 = arg2; 1932 // Rule at src/isa/s390x/inst.isle line 1452. 1933 let expr0_0 = MInst::CmpRSImm16 { 1934 op: pattern0_0.clone(), 1935 rn: pattern1_0, 1936 imm: pattern2_0, 1937 }; 1938 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1939 return Some(expr1_0); 1940 } 1941 1942 // Generated as internal constructor for term cmp_rsimm32. 1943 pub fn constructor_cmp_rsimm32<C: Context>( 1944 ctx: &mut C, 1945 arg0: &CmpOp, 1946 arg1: Reg, 1947 arg2: i32, 1948 ) -> Option<ProducesFlags> { 1949 let pattern0_0 = arg0; 1950 let pattern1_0 = arg1; 1951 let pattern2_0 = arg2; 1952 // Rule at src/isa/s390x/inst.isle line 1457. 1953 let expr0_0 = MInst::CmpRSImm32 { 1954 op: pattern0_0.clone(), 1955 rn: pattern1_0, 1956 imm: pattern2_0, 1957 }; 1958 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1959 return Some(expr1_0); 1960 } 1961 1962 // Generated as internal constructor for term cmp_ruimm32. 1963 pub fn constructor_cmp_ruimm32<C: Context>( 1964 ctx: &mut C, 1965 arg0: &CmpOp, 1966 arg1: Reg, 1967 arg2: u32, 1968 ) -> Option<ProducesFlags> { 1969 let pattern0_0 = arg0; 1970 let pattern1_0 = arg1; 1971 let pattern2_0 = arg2; 1972 // Rule at src/isa/s390x/inst.isle line 1462. 1973 let expr0_0 = MInst::CmpRUImm32 { 1974 op: pattern0_0.clone(), 1975 rn: pattern1_0, 1976 imm: pattern2_0, 1977 }; 1978 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1979 return Some(expr1_0); 1980 } 1981 1982 // Generated as internal constructor for term atomic_rmw_impl. 1983 pub fn constructor_atomic_rmw_impl<C: Context>( 1984 ctx: &mut C, 1985 arg0: Type, 1986 arg1: &ALUOp, 1987 arg2: Reg, 1988 arg3: &MemArg, 1989 ) -> Option<Reg> { 1990 let pattern0_0 = arg0; 1991 let pattern1_0 = arg1; 1992 let pattern2_0 = arg2; 1993 let pattern3_0 = arg3; 1994 // Rule at src/isa/s390x/inst.isle line 1467. 1995 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1996 let expr1_0 = MInst::AtomicRmw { 1997 alu_op: pattern1_0.clone(), 1998 rd: expr0_0, 1999 rn: pattern2_0, 2000 mem: pattern3_0.clone(), 2001 }; 2002 let expr2_0 = C::emit(ctx, &expr1_0); 2003 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2004 return Some(expr3_0); 2005 } 2006 2007 // Generated as internal constructor for term atomic_cas32. 2008 pub fn constructor_atomic_cas32<C: Context>( 2009 ctx: &mut C, 2010 arg0: Reg, 2011 arg1: Reg, 2012 arg2: &MemArg, 2013 ) -> Option<Reg> { 2014 let pattern0_0 = arg0; 2015 let pattern1_0 = arg1; 2016 let pattern2_0 = arg2; 2017 // Rule at src/isa/s390x/inst.isle line 1474. 2018 let expr0_0: Type = I32; 2019 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2020 let expr2_0 = MInst::AtomicCas32 { 2021 rd: expr1_0, 2022 rn: pattern1_0, 2023 mem: pattern2_0.clone(), 2024 }; 2025 let expr3_0 = C::emit(ctx, &expr2_0); 2026 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2027 return Some(expr4_0); 2028 } 2029 2030 // Generated as internal constructor for term atomic_cas64. 2031 pub fn constructor_atomic_cas64<C: Context>( 2032 ctx: &mut C, 2033 arg0: Reg, 2034 arg1: Reg, 2035 arg2: &MemArg, 2036 ) -> Option<Reg> { 2037 let pattern0_0 = arg0; 2038 let pattern1_0 = arg1; 2039 let pattern2_0 = arg2; 2040 // Rule at src/isa/s390x/inst.isle line 1481. 2041 let expr0_0: Type = I64; 2042 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 2043 let expr2_0 = MInst::AtomicCas64 { 2044 rd: expr1_0, 2045 rn: pattern1_0, 2046 mem: pattern2_0.clone(), 2047 }; 2048 let expr3_0 = C::emit(ctx, &expr2_0); 2049 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2050 return Some(expr4_0); 2051 } 2052 2053 // Generated as internal constructor for term fence_impl. 2054 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 2055 // Rule at src/isa/s390x/inst.isle line 1488. 2056 let expr0_0 = MInst::Fence; 2057 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2058 return Some(expr1_0); 2059 } 2060 2061 // Generated as internal constructor for term load32. 2062 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2063 let pattern0_0 = arg0; 2064 // Rule at src/isa/s390x/inst.isle line 1493. 2065 let expr0_0: Type = I32; 2066 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2067 let expr2_0 = MInst::Load32 { 2068 rd: expr1_0, 2069 mem: pattern0_0.clone(), 2070 }; 2071 let expr3_0 = C::emit(ctx, &expr2_0); 2072 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2073 return Some(expr4_0); 2074 } 2075 2076 // Generated as internal constructor for term load64. 2077 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2078 let pattern0_0 = arg0; 2079 // Rule at src/isa/s390x/inst.isle line 1500. 2080 let expr0_0: Type = I64; 2081 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2082 let expr2_0 = MInst::Load64 { 2083 rd: expr1_0, 2084 mem: pattern0_0.clone(), 2085 }; 2086 let expr3_0 = C::emit(ctx, &expr2_0); 2087 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2088 return Some(expr4_0); 2089 } 2090 2091 // Generated as internal constructor for term loadrev16. 2092 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2093 let pattern0_0 = arg0; 2094 // Rule at src/isa/s390x/inst.isle line 1507. 2095 let expr0_0: Type = I32; 2096 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2097 let expr2_0 = MInst::LoadRev16 { 2098 rd: expr1_0, 2099 mem: pattern0_0.clone(), 2100 }; 2101 let expr3_0 = C::emit(ctx, &expr2_0); 2102 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2103 return Some(expr4_0); 2104 } 2105 2106 // Generated as internal constructor for term loadrev32. 2107 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2108 let pattern0_0 = arg0; 2109 // Rule at src/isa/s390x/inst.isle line 1514. 2110 let expr0_0: Type = I32; 2111 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2112 let expr2_0 = MInst::LoadRev32 { 2113 rd: expr1_0, 2114 mem: pattern0_0.clone(), 2115 }; 2116 let expr3_0 = C::emit(ctx, &expr2_0); 2117 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2118 return Some(expr4_0); 2119 } 2120 2121 // Generated as internal constructor for term loadrev64. 2122 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2123 let pattern0_0 = arg0; 2124 // Rule at src/isa/s390x/inst.isle line 1521. 2125 let expr0_0: Type = I64; 2126 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2127 let expr2_0 = MInst::LoadRev64 { 2128 rd: expr1_0, 2129 mem: pattern0_0.clone(), 2130 }; 2131 let expr3_0 = C::emit(ctx, &expr2_0); 2132 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2133 return Some(expr4_0); 2134 } 2135 2136 // Generated as internal constructor for term store8. 2137 pub fn constructor_store8<C: Context>( 2138 ctx: &mut C, 2139 arg0: Reg, 2140 arg1: &MemArg, 2141 ) -> Option<SideEffectNoResult> { 2142 let pattern0_0 = arg0; 2143 let pattern1_0 = arg1; 2144 // Rule at src/isa/s390x/inst.isle line 1528. 2145 let expr0_0 = MInst::Store8 { 2146 rd: pattern0_0, 2147 mem: pattern1_0.clone(), 2148 }; 2149 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2150 return Some(expr1_0); 2151 } 2152 2153 // Generated as internal constructor for term store16. 2154 pub fn constructor_store16<C: Context>( 2155 ctx: &mut C, 2156 arg0: Reg, 2157 arg1: &MemArg, 2158 ) -> Option<SideEffectNoResult> { 2159 let pattern0_0 = arg0; 2160 let pattern1_0 = arg1; 2161 // Rule at src/isa/s390x/inst.isle line 1533. 2162 let expr0_0 = MInst::Store16 { 2163 rd: pattern0_0, 2164 mem: pattern1_0.clone(), 2165 }; 2166 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2167 return Some(expr1_0); 2168 } 2169 2170 // Generated as internal constructor for term store32. 2171 pub fn constructor_store32<C: Context>( 2172 ctx: &mut C, 2173 arg0: Reg, 2174 arg1: &MemArg, 2175 ) -> Option<SideEffectNoResult> { 2176 let pattern0_0 = arg0; 2177 let pattern1_0 = arg1; 2178 // Rule at src/isa/s390x/inst.isle line 1538. 2179 let expr0_0 = MInst::Store32 { 2180 rd: pattern0_0, 2181 mem: pattern1_0.clone(), 2182 }; 2183 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2184 return Some(expr1_0); 2185 } 2186 2187 // Generated as internal constructor for term store64. 2188 pub fn constructor_store64<C: Context>( 2189 ctx: &mut C, 2190 arg0: Reg, 2191 arg1: &MemArg, 2192 ) -> Option<SideEffectNoResult> { 2193 let pattern0_0 = arg0; 2194 let pattern1_0 = arg1; 2195 // Rule at src/isa/s390x/inst.isle line 1543. 2196 let expr0_0 = MInst::Store64 { 2197 rd: pattern0_0, 2198 mem: pattern1_0.clone(), 2199 }; 2200 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2201 return Some(expr1_0); 2202 } 2203 2204 // Generated as internal constructor for term store8_imm. 2205 pub fn constructor_store8_imm<C: Context>( 2206 ctx: &mut C, 2207 arg0: u8, 2208 arg1: &MemArg, 2209 ) -> Option<SideEffectNoResult> { 2210 let pattern0_0 = arg0; 2211 let pattern1_0 = arg1; 2212 // Rule at src/isa/s390x/inst.isle line 1548. 2213 let expr0_0 = MInst::StoreImm8 { 2214 imm: pattern0_0, 2215 mem: pattern1_0.clone(), 2216 }; 2217 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2218 return Some(expr1_0); 2219 } 2220 2221 // Generated as internal constructor for term store16_imm. 2222 pub fn constructor_store16_imm<C: Context>( 2223 ctx: &mut C, 2224 arg0: i16, 2225 arg1: &MemArg, 2226 ) -> Option<SideEffectNoResult> { 2227 let pattern0_0 = arg0; 2228 let pattern1_0 = arg1; 2229 // Rule at src/isa/s390x/inst.isle line 1553. 2230 let expr0_0 = MInst::StoreImm16 { 2231 imm: pattern0_0, 2232 mem: pattern1_0.clone(), 2233 }; 2234 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2235 return Some(expr1_0); 2236 } 2237 2238 // Generated as internal constructor for term store32_simm16. 2239 pub fn constructor_store32_simm16<C: Context>( 2240 ctx: &mut C, 2241 arg0: i16, 2242 arg1: &MemArg, 2243 ) -> Option<SideEffectNoResult> { 2244 let pattern0_0 = arg0; 2245 let pattern1_0 = arg1; 2246 // Rule at src/isa/s390x/inst.isle line 1558. 2247 let expr0_0 = MInst::StoreImm32SExt16 { 2248 imm: pattern0_0, 2249 mem: pattern1_0.clone(), 2250 }; 2251 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2252 return Some(expr1_0); 2253 } 2254 2255 // Generated as internal constructor for term store64_simm16. 2256 pub fn constructor_store64_simm16<C: Context>( 2257 ctx: &mut C, 2258 arg0: i16, 2259 arg1: &MemArg, 2260 ) -> Option<SideEffectNoResult> { 2261 let pattern0_0 = arg0; 2262 let pattern1_0 = arg1; 2263 // Rule at src/isa/s390x/inst.isle line 1563. 2264 let expr0_0 = MInst::StoreImm64SExt16 { 2265 imm: pattern0_0, 2266 mem: pattern1_0.clone(), 2267 }; 2268 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2269 return Some(expr1_0); 2270 } 2271 2272 // Generated as internal constructor for term storerev16. 2273 pub fn constructor_storerev16<C: Context>( 2274 ctx: &mut C, 2275 arg0: Reg, 2276 arg1: &MemArg, 2277 ) -> Option<SideEffectNoResult> { 2278 let pattern0_0 = arg0; 2279 let pattern1_0 = arg1; 2280 // Rule at src/isa/s390x/inst.isle line 1568. 2281 let expr0_0 = MInst::StoreRev16 { 2282 rd: pattern0_0, 2283 mem: pattern1_0.clone(), 2284 }; 2285 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2286 return Some(expr1_0); 2287 } 2288 2289 // Generated as internal constructor for term storerev32. 2290 pub fn constructor_storerev32<C: Context>( 2291 ctx: &mut C, 2292 arg0: Reg, 2293 arg1: &MemArg, 2294 ) -> Option<SideEffectNoResult> { 2295 let pattern0_0 = arg0; 2296 let pattern1_0 = arg1; 2297 // Rule at src/isa/s390x/inst.isle line 1573. 2298 let expr0_0 = MInst::StoreRev32 { 2299 rd: pattern0_0, 2300 mem: pattern1_0.clone(), 2301 }; 2302 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2303 return Some(expr1_0); 2304 } 2305 2306 // Generated as internal constructor for term storerev64. 2307 pub fn constructor_storerev64<C: Context>( 2308 ctx: &mut C, 2309 arg0: Reg, 2310 arg1: &MemArg, 2311 ) -> Option<SideEffectNoResult> { 2312 let pattern0_0 = arg0; 2313 let pattern1_0 = arg1; 2314 // Rule at src/isa/s390x/inst.isle line 1578. 2315 let expr0_0 = MInst::StoreRev64 { 2316 rd: pattern0_0, 2317 mem: pattern1_0.clone(), 2318 }; 2319 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2320 return Some(expr1_0); 2321 } 2322 2323 // Generated as internal constructor for term fpu_rr. 2324 pub fn constructor_fpu_rr<C: Context>( 2325 ctx: &mut C, 2326 arg0: Type, 2327 arg1: &FPUOp1, 2328 arg2: Reg, 2329 ) -> Option<Reg> { 2330 let pattern0_0 = arg0; 2331 let pattern1_0 = arg1; 2332 let pattern2_0 = arg2; 2333 // Rule at src/isa/s390x/inst.isle line 1583. 2334 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2335 let expr1_0 = MInst::FpuRR { 2336 fpu_op: pattern1_0.clone(), 2337 rd: expr0_0, 2338 rn: pattern2_0, 2339 }; 2340 let expr2_0 = C::emit(ctx, &expr1_0); 2341 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2342 return Some(expr3_0); 2343 } 2344 2345 // Generated as internal constructor for term fpu_rrr. 2346 pub fn constructor_fpu_rrr<C: Context>( 2347 ctx: &mut C, 2348 arg0: Type, 2349 arg1: &FPUOp2, 2350 arg2: Reg, 2351 arg3: Reg, 2352 ) -> Option<Reg> { 2353 let pattern0_0 = arg0; 2354 let pattern1_0 = arg1; 2355 let pattern2_0 = arg2; 2356 let pattern3_0 = arg3; 2357 // Rule at src/isa/s390x/inst.isle line 1590. 2358 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2359 let expr1_0 = MInst::FpuRRR { 2360 fpu_op: pattern1_0.clone(), 2361 rd: expr0_0, 2362 rm: pattern3_0, 2363 }; 2364 let expr2_0 = C::emit(ctx, &expr1_0); 2365 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2366 return Some(expr3_0); 2367 } 2368 2369 // Generated as internal constructor for term fpu_rrrr. 2370 pub fn constructor_fpu_rrrr<C: Context>( 2371 ctx: &mut C, 2372 arg0: Type, 2373 arg1: &FPUOp3, 2374 arg2: Reg, 2375 arg3: Reg, 2376 arg4: Reg, 2377 ) -> Option<Reg> { 2378 let pattern0_0 = arg0; 2379 let pattern1_0 = arg1; 2380 let pattern2_0 = arg2; 2381 let pattern3_0 = arg3; 2382 let pattern4_0 = arg4; 2383 // Rule at src/isa/s390x/inst.isle line 1597. 2384 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2385 let expr1_0 = MInst::FpuRRRR { 2386 fpu_op: pattern1_0.clone(), 2387 rd: expr0_0, 2388 rn: pattern3_0, 2389 rm: pattern4_0, 2390 }; 2391 let expr2_0 = C::emit(ctx, &expr1_0); 2392 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2393 return Some(expr3_0); 2394 } 2395 2396 // Generated as internal constructor for term fpu_copysign. 2397 pub fn constructor_fpu_copysign<C: Context>( 2398 ctx: &mut C, 2399 arg0: Type, 2400 arg1: Reg, 2401 arg2: Reg, 2402 ) -> Option<Reg> { 2403 let pattern0_0 = arg0; 2404 let pattern1_0 = arg1; 2405 let pattern2_0 = arg2; 2406 // Rule at src/isa/s390x/inst.isle line 1604. 2407 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2408 let expr1_0 = MInst::FpuCopysign { 2409 rd: expr0_0, 2410 rn: pattern1_0, 2411 rm: pattern2_0, 2412 }; 2413 let expr2_0 = C::emit(ctx, &expr1_0); 2414 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2415 return Some(expr3_0); 2416 } 2417 2418 // Generated as internal constructor for term fpu_cmp32. 2419 pub fn constructor_fpu_cmp32<C: Context>( 2420 ctx: &mut C, 2421 arg0: Reg, 2422 arg1: Reg, 2423 ) -> Option<ProducesFlags> { 2424 let pattern0_0 = arg0; 2425 let pattern1_0 = arg1; 2426 // Rule at src/isa/s390x/inst.isle line 1611. 2427 let expr0_0 = MInst::FpuCmp32 { 2428 rn: pattern0_0, 2429 rm: pattern1_0, 2430 }; 2431 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2432 return Some(expr1_0); 2433 } 2434 2435 // Generated as internal constructor for term fpu_cmp64. 2436 pub fn constructor_fpu_cmp64<C: Context>( 2437 ctx: &mut C, 2438 arg0: Reg, 2439 arg1: Reg, 2440 ) -> Option<ProducesFlags> { 2441 let pattern0_0 = arg0; 2442 let pattern1_0 = arg1; 2443 // Rule at src/isa/s390x/inst.isle line 1616. 2444 let expr0_0 = MInst::FpuCmp64 { 2445 rn: pattern0_0, 2446 rm: pattern1_0, 2447 }; 2448 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2449 return Some(expr1_0); 2450 } 2451 2452 // Generated as internal constructor for term fpu_to_int. 2453 pub fn constructor_fpu_to_int<C: Context>( 2454 ctx: &mut C, 2455 arg0: Type, 2456 arg1: &FpuToIntOp, 2457 arg2: Reg, 2458 ) -> Option<ProducesFlags> { 2459 let pattern0_0 = arg0; 2460 let pattern1_0 = arg1; 2461 let pattern2_0 = arg2; 2462 // Rule at src/isa/s390x/inst.isle line 1621. 2463 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2464 let expr1_0 = MInst::FpuToInt { 2465 op: pattern1_0.clone(), 2466 rd: expr0_0, 2467 rn: pattern2_0, 2468 }; 2469 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2470 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2471 inst: expr1_0, 2472 result: expr2_0, 2473 }; 2474 return Some(expr3_0); 2475 } 2476 2477 // Generated as internal constructor for term int_to_fpu. 2478 pub fn constructor_int_to_fpu<C: Context>( 2479 ctx: &mut C, 2480 arg0: Type, 2481 arg1: &IntToFpuOp, 2482 arg2: Reg, 2483 ) -> Option<Reg> { 2484 let pattern0_0 = arg0; 2485 let pattern1_0 = arg1; 2486 let pattern2_0 = arg2; 2487 // Rule at src/isa/s390x/inst.isle line 1628. 2488 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2489 let expr1_0 = MInst::IntToFpu { 2490 op: pattern1_0.clone(), 2491 rd: expr0_0, 2492 rn: pattern2_0, 2493 }; 2494 let expr2_0 = C::emit(ctx, &expr1_0); 2495 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2496 return Some(expr3_0); 2497 } 2498 2499 // Generated as internal constructor for term fpu_round. 2500 pub fn constructor_fpu_round<C: Context>( 2501 ctx: &mut C, 2502 arg0: Type, 2503 arg1: &FpuRoundMode, 2504 arg2: Reg, 2505 ) -> Option<Reg> { 2506 let pattern0_0 = arg0; 2507 let pattern1_0 = arg1; 2508 let pattern2_0 = arg2; 2509 // Rule at src/isa/s390x/inst.isle line 1635. 2510 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2511 let expr1_0 = MInst::FpuRound { 2512 op: pattern1_0.clone(), 2513 rd: expr0_0, 2514 rn: pattern2_0, 2515 }; 2516 let expr2_0 = C::emit(ctx, &expr1_0); 2517 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2518 return Some(expr3_0); 2519 } 2520 2521 // Generated as internal constructor for term fpuvec_rrr. 2522 pub fn constructor_fpuvec_rrr<C: Context>( 2523 ctx: &mut C, 2524 arg0: Type, 2525 arg1: &FPUOp2, 2526 arg2: Reg, 2527 arg3: Reg, 2528 ) -> Option<Reg> { 2529 let pattern0_0 = arg0; 2530 let pattern1_0 = arg1; 2531 let pattern2_0 = arg2; 2532 let pattern3_0 = arg3; 2533 // Rule at src/isa/s390x/inst.isle line 1642. 2534 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2535 let expr1_0 = MInst::FpuVecRRR { 2536 fpu_op: pattern1_0.clone(), 2537 rd: expr0_0, 2538 rn: pattern2_0, 2539 rm: pattern3_0, 2540 }; 2541 let expr2_0 = C::emit(ctx, &expr1_0); 2542 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2543 return Some(expr3_0); 2544 } 2545 2546 // Generated as internal constructor for term mov_to_fpr. 2547 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2548 let pattern0_0 = arg0; 2549 // Rule at src/isa/s390x/inst.isle line 1649. 2550 let expr0_0: Type = F64; 2551 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2552 let expr2_0 = MInst::MovToFpr { 2553 rd: expr1_0, 2554 rn: pattern0_0, 2555 }; 2556 let expr3_0 = C::emit(ctx, &expr2_0); 2557 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2558 return Some(expr4_0); 2559 } 2560 2561 // Generated as internal constructor for term mov_from_fpr. 2562 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2563 let pattern0_0 = arg0; 2564 // Rule at src/isa/s390x/inst.isle line 1656. 2565 let expr0_0: Type = I64; 2566 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2567 let expr2_0 = MInst::MovFromFpr { 2568 rd: expr1_0, 2569 rn: pattern0_0, 2570 }; 2571 let expr3_0 = C::emit(ctx, &expr2_0); 2572 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2573 return Some(expr4_0); 2574 } 2575 2576 // Generated as internal constructor for term fpu_load32. 2577 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2578 let pattern0_0 = arg0; 2579 // Rule at src/isa/s390x/inst.isle line 1663. 2580 let expr0_0: Type = F32; 2581 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2582 let expr2_0 = MInst::FpuLoad32 { 2583 rd: expr1_0, 2584 mem: pattern0_0.clone(), 2585 }; 2586 let expr3_0 = C::emit(ctx, &expr2_0); 2587 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2588 return Some(expr4_0); 2589 } 2590 2591 // Generated as internal constructor for term fpu_load64. 2592 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2593 let pattern0_0 = arg0; 2594 // Rule at src/isa/s390x/inst.isle line 1670. 2595 let expr0_0: Type = F64; 2596 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2597 let expr2_0 = MInst::FpuLoad64 { 2598 rd: expr1_0, 2599 mem: pattern0_0.clone(), 2600 }; 2601 let expr3_0 = C::emit(ctx, &expr2_0); 2602 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2603 return Some(expr4_0); 2604 } 2605 2606 // Generated as internal constructor for term fpu_loadrev32. 2607 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2608 let pattern0_0 = arg0; 2609 // Rule at src/isa/s390x/inst.isle line 1677. 2610 let expr0_0: Type = F32; 2611 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2612 let expr2_0 = MInst::FpuLoadRev32 { 2613 rd: expr1_0, 2614 mem: pattern0_0.clone(), 2615 }; 2616 let expr3_0 = C::emit(ctx, &expr2_0); 2617 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2618 return Some(expr4_0); 2619 } 2620 2621 // Generated as internal constructor for term fpu_loadrev64. 2622 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2623 let pattern0_0 = arg0; 2624 // Rule at src/isa/s390x/inst.isle line 1684. 2625 let expr0_0: Type = F64; 2626 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2627 let expr2_0 = MInst::FpuLoadRev64 { 2628 rd: expr1_0, 2629 mem: pattern0_0.clone(), 2630 }; 2631 let expr3_0 = C::emit(ctx, &expr2_0); 2632 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2633 return Some(expr4_0); 2634 } 2635 2636 // Generated as internal constructor for term fpu_store32. 2637 pub fn constructor_fpu_store32<C: Context>( 2638 ctx: &mut C, 2639 arg0: Reg, 2640 arg1: &MemArg, 2641 ) -> Option<SideEffectNoResult> { 2642 let pattern0_0 = arg0; 2643 let pattern1_0 = arg1; 2644 // Rule at src/isa/s390x/inst.isle line 1691. 2645 let expr0_0 = MInst::FpuStore32 { 2646 rd: pattern0_0, 2647 mem: pattern1_0.clone(), 2648 }; 2649 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2650 return Some(expr1_0); 2651 } 2652 2653 // Generated as internal constructor for term fpu_store64. 2654 pub fn constructor_fpu_store64<C: Context>( 2655 ctx: &mut C, 2656 arg0: Reg, 2657 arg1: &MemArg, 2658 ) -> Option<SideEffectNoResult> { 2659 let pattern0_0 = arg0; 2660 let pattern1_0 = arg1; 2661 // Rule at src/isa/s390x/inst.isle line 1696. 2662 let expr0_0 = MInst::FpuStore64 { 2663 rd: pattern0_0, 2664 mem: pattern1_0.clone(), 2665 }; 2666 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2667 return Some(expr1_0); 2668 } 2669 2670 // Generated as internal constructor for term fpu_storerev32. 2671 pub fn constructor_fpu_storerev32<C: Context>( 2672 ctx: &mut C, 2673 arg0: Reg, 2674 arg1: &MemArg, 2675 ) -> Option<SideEffectNoResult> { 2676 let pattern0_0 = arg0; 2677 let pattern1_0 = arg1; 2678 // Rule at src/isa/s390x/inst.isle line 1701. 2679 let expr0_0 = MInst::FpuStoreRev32 { 2680 rd: pattern0_0, 2681 mem: pattern1_0.clone(), 2682 }; 2683 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2684 return Some(expr1_0); 2685 } 2686 2687 // Generated as internal constructor for term fpu_storerev64. 2688 pub fn constructor_fpu_storerev64<C: Context>( 2689 ctx: &mut C, 2690 arg0: Reg, 2691 arg1: &MemArg, 2692 ) -> Option<SideEffectNoResult> { 2693 let pattern0_0 = arg0; 2694 let pattern1_0 = arg1; 2695 // Rule at src/isa/s390x/inst.isle line 1706. 2696 let expr0_0 = MInst::FpuStoreRev64 { 2697 rd: pattern0_0, 2698 mem: pattern1_0.clone(), 2699 }; 2700 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2701 return Some(expr1_0); 2702 } 2703 2704 // Generated as internal constructor for term load_ext_name_far. 2705 pub fn constructor_load_ext_name_far<C: Context>( 2706 ctx: &mut C, 2707 arg0: ExternalName, 2708 arg1: i64, 2709 ) -> Option<Reg> { 2710 let pattern0_0 = arg0; 2711 let pattern1_0 = arg1; 2712 // Rule at src/isa/s390x/inst.isle line 1711. 2713 let expr0_0: Type = I64; 2714 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2715 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2716 let expr3_0 = MInst::LoadExtNameFar { 2717 rd: expr1_0, 2718 name: expr2_0, 2719 offset: pattern1_0, 2720 }; 2721 let expr4_0 = C::emit(ctx, &expr3_0); 2722 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2723 return Some(expr5_0); 2724 } 2725 2726 // Generated as internal constructor for term load_addr. 2727 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2728 let pattern0_0 = arg0; 2729 // Rule at src/isa/s390x/inst.isle line 1719. 2730 let expr0_0: Type = I64; 2731 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2732 let expr2_0 = MInst::LoadAddr { 2733 rd: expr1_0, 2734 mem: pattern0_0.clone(), 2735 }; 2736 let expr3_0 = C::emit(ctx, &expr2_0); 2737 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2738 return Some(expr4_0); 2739 } 2740 2741 // Generated as internal constructor for term jump_impl. 2742 pub fn constructor_jump_impl<C: Context>( 2743 ctx: &mut C, 2744 arg0: MachLabel, 2745 ) -> Option<SideEffectNoResult> { 2746 let pattern0_0 = arg0; 2747 // Rule at src/isa/s390x/inst.isle line 1726. 2748 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2749 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2750 return Some(expr1_0); 2751 } 2752 2753 // Generated as internal constructor for term cond_br. 2754 pub fn constructor_cond_br<C: Context>( 2755 ctx: &mut C, 2756 arg0: MachLabel, 2757 arg1: MachLabel, 2758 arg2: &Cond, 2759 ) -> Option<SideEffectNoResult> { 2760 let pattern0_0 = arg0; 2761 let pattern1_0 = arg1; 2762 let pattern2_0 = arg2; 2763 // Rule at src/isa/s390x/inst.isle line 1731. 2764 let expr0_0 = MInst::CondBr { 2765 taken: pattern0_0, 2766 not_taken: pattern1_0, 2767 cond: pattern2_0.clone(), 2768 }; 2769 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2770 return Some(expr1_0); 2771 } 2772 2773 // Generated as internal constructor for term oneway_cond_br. 2774 pub fn constructor_oneway_cond_br<C: Context>( 2775 ctx: &mut C, 2776 arg0: MachLabel, 2777 arg1: &Cond, 2778 ) -> Option<SideEffectNoResult> { 2779 let pattern0_0 = arg0; 2780 let pattern1_0 = arg1; 2781 // Rule at src/isa/s390x/inst.isle line 1736. 2782 let expr0_0 = MInst::OneWayCondBr { 2783 target: pattern0_0, 2784 cond: pattern1_0.clone(), 2785 }; 2786 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2787 return Some(expr1_0); 2788 } 2789 2790 // Generated as internal constructor for term jt_sequence. 2791 pub fn constructor_jt_sequence<C: Context>( 2792 ctx: &mut C, 2793 arg0: Reg, 2794 arg1: &VecMachLabel, 2795 ) -> Option<SideEffectNoResult> { 2796 let pattern0_0 = arg0; 2797 let pattern1_0 = arg1; 2798 // Rule at src/isa/s390x/inst.isle line 1741. 2799 let expr0_0 = MInst::JTSequence { 2800 ridx: pattern0_0, 2801 targets: pattern1_0.clone(), 2802 }; 2803 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2804 return Some(expr1_0); 2805 } 2806 2807 // Generated as internal constructor for term drop_flags. 2808 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2809 let pattern0_0 = arg0; 2810 if let &ProducesFlags::ProducesFlagsReturnsReg { 2811 inst: ref pattern1_0, 2812 result: pattern1_1, 2813 } = pattern0_0 2814 { 2815 // Rule at src/isa/s390x/inst.isle line 1746. 2816 let expr0_0 = C::emit(ctx, pattern1_0); 2817 return Some(pattern1_1); 2818 } 2819 return None; 2820 } 2821 2822 // Generated as internal constructor for term push_alu_reg. 2823 pub fn constructor_push_alu_reg<C: Context>( 2824 ctx: &mut C, 2825 arg0: &VecMInstBuilder, 2826 arg1: &ALUOp, 2827 arg2: WritableReg, 2828 arg3: Reg, 2829 arg4: Reg, 2830 ) -> Option<Reg> { 2831 let pattern0_0 = arg0; 2832 let pattern1_0 = arg1; 2833 let pattern2_0 = arg2; 2834 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2835 let pattern4_0 = arg3; 2836 let pattern5_0 = arg4; 2837 // Rule at src/isa/s390x/inst.isle line 1785. 2838 let expr0_0 = MInst::AluRRR { 2839 alu_op: pattern1_0.clone(), 2840 rd: pattern3_0, 2841 rn: pattern4_0, 2842 rm: pattern5_0, 2843 }; 2844 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2845 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2846 return Some(expr2_0); 2847 } 2848 return None; 2849 } 2850 2851 // Generated as internal constructor for term push_alu_uimm32shifted. 2852 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2853 ctx: &mut C, 2854 arg0: &VecMInstBuilder, 2855 arg1: &ALUOp, 2856 arg2: WritableReg, 2857 arg3: Reg, 2858 arg4: UImm32Shifted, 2859 ) -> Option<Reg> { 2860 let pattern0_0 = arg0; 2861 let pattern1_0 = arg1; 2862 let pattern2_0 = arg2; 2863 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2864 let pattern4_0 = arg3; 2865 let closure5 = || { 2866 return Some(pattern3_0); 2867 }; 2868 if let Some(pattern5_0) = closure5() { 2869 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2870 let pattern7_0 = arg4; 2871 // Rule at src/isa/s390x/inst.isle line 1791. 2872 let expr0_0 = MInst::AluRUImm32Shifted { 2873 alu_op: pattern1_0.clone(), 2874 rd: pattern3_0, 2875 imm: pattern7_0, 2876 }; 2877 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2878 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2879 return Some(expr2_0); 2880 } 2881 } 2882 } 2883 return None; 2884 } 2885 2886 // Generated as internal constructor for term push_shift. 2887 pub fn constructor_push_shift<C: Context>( 2888 ctx: &mut C, 2889 arg0: &VecMInstBuilder, 2890 arg1: &ShiftOp, 2891 arg2: WritableReg, 2892 arg3: Reg, 2893 arg4: u8, 2894 arg5: Reg, 2895 ) -> Option<Reg> { 2896 let pattern0_0 = arg0; 2897 let pattern1_0 = arg1; 2898 let pattern2_0 = arg2; 2899 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2900 let pattern4_0 = arg3; 2901 let pattern5_0 = arg4; 2902 let pattern6_0 = arg5; 2903 // Rule at src/isa/s390x/inst.isle line 1797. 2904 let expr0_0 = MInst::ShiftRR { 2905 shift_op: pattern1_0.clone(), 2906 rd: pattern3_0, 2907 rn: pattern4_0, 2908 shift_imm: pattern5_0, 2909 shift_reg: pattern6_0, 2910 }; 2911 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2912 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2913 return Some(expr2_0); 2914 } 2915 return None; 2916 } 2917 2918 // Generated as internal constructor for term push_rxsbg. 2919 pub fn constructor_push_rxsbg<C: Context>( 2920 ctx: &mut C, 2921 arg0: &VecMInstBuilder, 2922 arg1: &RxSBGOp, 2923 arg2: WritableReg, 2924 arg3: Reg, 2925 arg4: Reg, 2926 arg5: u8, 2927 arg6: u8, 2928 arg7: i8, 2929 ) -> Option<Reg> { 2930 let pattern0_0 = arg0; 2931 let pattern1_0 = arg1; 2932 let pattern2_0 = arg2; 2933 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2934 let pattern4_0 = arg3; 2935 let closure5 = || { 2936 return Some(pattern3_0); 2937 }; 2938 if let Some(pattern5_0) = closure5() { 2939 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2940 let pattern7_0 = arg4; 2941 let pattern8_0 = arg5; 2942 let pattern9_0 = arg6; 2943 let pattern10_0 = arg7; 2944 // Rule at src/isa/s390x/inst.isle line 1804. 2945 let expr0_0 = MInst::RxSBG { 2946 op: pattern1_0.clone(), 2947 rd: pattern3_0, 2948 rn: pattern7_0, 2949 start_bit: pattern8_0, 2950 end_bit: pattern9_0, 2951 rotate_amt: pattern10_0, 2952 }; 2953 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2954 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2955 return Some(expr2_0); 2956 } 2957 } 2958 } 2959 return None; 2960 } 2961 2962 // Generated as internal constructor for term push_unary. 2963 pub fn constructor_push_unary<C: Context>( 2964 ctx: &mut C, 2965 arg0: &VecMInstBuilder, 2966 arg1: &UnaryOp, 2967 arg2: WritableReg, 2968 arg3: Reg, 2969 ) -> Option<Reg> { 2970 let pattern0_0 = arg0; 2971 let pattern1_0 = arg1; 2972 let pattern2_0 = arg2; 2973 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2974 let pattern4_0 = arg3; 2975 // Rule at src/isa/s390x/inst.isle line 1811. 2976 let expr0_0 = MInst::UnaryRR { 2977 op: pattern1_0.clone(), 2978 rd: pattern3_0, 2979 rn: pattern4_0, 2980 }; 2981 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2982 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2983 return Some(expr2_0); 2984 } 2985 return None; 2986 } 2987 2988 // Generated as internal constructor for term push_atomic_cas32. 2989 pub fn constructor_push_atomic_cas32<C: Context>( 2990 ctx: &mut C, 2991 arg0: &VecMInstBuilder, 2992 arg1: WritableReg, 2993 arg2: Reg, 2994 arg3: &MemArg, 2995 ) -> Option<Reg> { 2996 let pattern0_0 = arg0; 2997 let pattern1_0 = arg1; 2998 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2999 let pattern3_0 = arg2; 3000 let pattern4_0 = arg3; 3001 // Rule at src/isa/s390x/inst.isle line 1817. 3002 let expr0_0 = MInst::AtomicCas32 { 3003 rd: pattern2_0, 3004 rn: pattern3_0, 3005 mem: pattern4_0.clone(), 3006 }; 3007 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3008 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3009 return Some(expr2_0); 3010 } 3011 return None; 3012 } 3013 3014 // Generated as internal constructor for term push_atomic_cas64. 3015 pub fn constructor_push_atomic_cas64<C: Context>( 3016 ctx: &mut C, 3017 arg0: &VecMInstBuilder, 3018 arg1: WritableReg, 3019 arg2: Reg, 3020 arg3: &MemArg, 3021 ) -> Option<Reg> { 3022 let pattern0_0 = arg0; 3023 let pattern1_0 = arg1; 3024 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 3025 let pattern3_0 = arg2; 3026 let pattern4_0 = arg3; 3027 // Rule at src/isa/s390x/inst.isle line 1823. 3028 let expr0_0 = MInst::AtomicCas64 { 3029 rd: pattern2_0, 3030 rn: pattern3_0, 3031 mem: pattern4_0.clone(), 3032 }; 3033 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 3034 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 3035 return Some(expr2_0); 3036 } 3037 return None; 3038 } 3039 3040 // Generated as internal constructor for term push_break_if. 3041 pub fn constructor_push_break_if<C: Context>( 3042 ctx: &mut C, 3043 arg0: &VecMInstBuilder, 3044 arg1: &ProducesFlags, 3045 arg2: &Cond, 3046 ) -> Option<Reg> { 3047 let pattern0_0 = arg0; 3048 let pattern1_0 = arg1; 3049 if let &ProducesFlags::ProducesFlagsSideEffect { 3050 inst: ref pattern2_0, 3051 } = pattern1_0 3052 { 3053 let pattern3_0 = arg2; 3054 // Rule at src/isa/s390x/inst.isle line 1829. 3055 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 3056 let expr1_0 = MInst::CondBreak { 3057 cond: pattern3_0.clone(), 3058 }; 3059 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 3060 let expr3_0 = C::invalid_reg(ctx); 3061 return Some(expr3_0); 3062 } 3063 return None; 3064 } 3065 3066 // Generated as internal constructor for term emit_loop. 3067 pub fn constructor_emit_loop<C: Context>( 3068 ctx: &mut C, 3069 arg0: &VecMInstBuilder, 3070 arg1: &Cond, 3071 ) -> Option<Unit> { 3072 let pattern0_0 = arg0; 3073 let pattern1_0 = arg1; 3074 // Rule at src/isa/s390x/inst.isle line 1836. 3075 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 3076 let expr1_0 = MInst::Loop { 3077 body: expr0_0, 3078 cond: pattern1_0.clone(), 3079 }; 3080 let expr2_0 = C::emit(ctx, &expr1_0); 3081 return Some(expr2_0); 3082 } 3083 3084 // Generated as internal constructor for term emit_mov. 3085 pub fn constructor_emit_mov<C: Context>( 3086 ctx: &mut C, 3087 arg0: Type, 3088 arg1: WritableReg, 3089 arg2: Reg, 3090 ) -> Option<Unit> { 3091 let pattern0_0 = arg0; 3092 if pattern0_0 == F32 { 3093 let pattern2_0 = arg1; 3094 let pattern3_0 = arg2; 3095 // Rule at src/isa/s390x/inst.isle line 1851. 3096 let expr0_0 = MInst::FpuMove32 { 3097 rd: pattern2_0, 3098 rn: pattern3_0, 3099 }; 3100 let expr1_0 = C::emit(ctx, &expr0_0); 3101 return Some(expr1_0); 3102 } 3103 if pattern0_0 == F64 { 3104 let pattern2_0 = arg1; 3105 let pattern3_0 = arg2; 3106 // Rule at src/isa/s390x/inst.isle line 1854. 3107 let expr0_0 = MInst::FpuMove64 { 3108 rd: pattern2_0, 3109 rn: pattern3_0, 3110 }; 3111 let expr1_0 = C::emit(ctx, &expr0_0); 3112 return Some(expr1_0); 3113 } 3114 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3115 let pattern2_0 = arg1; 3116 let pattern3_0 = arg2; 3117 // Rule at src/isa/s390x/inst.isle line 1845. 3118 let expr0_0 = MInst::Mov32 { 3119 rd: pattern2_0, 3120 rm: pattern3_0, 3121 }; 3122 let expr1_0 = C::emit(ctx, &expr0_0); 3123 return Some(expr1_0); 3124 } 3125 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3126 let pattern2_0 = arg1; 3127 let pattern3_0 = arg2; 3128 // Rule at src/isa/s390x/inst.isle line 1848. 3129 let expr0_0 = MInst::Mov64 { 3130 rd: pattern2_0, 3131 rm: pattern3_0, 3132 }; 3133 let expr1_0 = C::emit(ctx, &expr0_0); 3134 return Some(expr1_0); 3135 } 3136 return None; 3137 } 3138 3139 // Generated as internal constructor for term copy_writable_reg. 3140 pub fn constructor_copy_writable_reg<C: Context>( 3141 ctx: &mut C, 3142 arg0: Type, 3143 arg1: Reg, 3144 ) -> Option<WritableReg> { 3145 let pattern0_0 = arg0; 3146 let pattern1_0 = arg1; 3147 // Rule at src/isa/s390x/inst.isle line 1859. 3148 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3149 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3150 return Some(expr0_0); 3151 } 3152 3153 // Generated as internal constructor for term copy_reg. 3154 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3155 let pattern0_0 = arg0; 3156 let pattern1_0 = arg1; 3157 // Rule at src/isa/s390x/inst.isle line 1866. 3158 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3159 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3160 return Some(expr1_0); 3161 } 3162 3163 // Generated as internal constructor for term emit_load. 3164 pub fn constructor_emit_load<C: Context>( 3165 ctx: &mut C, 3166 arg0: Type, 3167 arg1: WritableReg, 3168 arg2: &MemArg, 3169 ) -> Option<Unit> { 3170 let pattern0_0 = arg0; 3171 if pattern0_0 == I32 { 3172 let pattern2_0 = arg1; 3173 let pattern3_0 = arg2; 3174 // Rule at src/isa/s390x/inst.isle line 1870. 3175 let expr0_0 = MInst::Load32 { 3176 rd: pattern2_0, 3177 mem: pattern3_0.clone(), 3178 }; 3179 let expr1_0 = C::emit(ctx, &expr0_0); 3180 return Some(expr1_0); 3181 } 3182 if pattern0_0 == I64 { 3183 let pattern2_0 = arg1; 3184 let pattern3_0 = arg2; 3185 // Rule at src/isa/s390x/inst.isle line 1872. 3186 let expr0_0 = MInst::Load64 { 3187 rd: pattern2_0, 3188 mem: pattern3_0.clone(), 3189 }; 3190 let expr1_0 = C::emit(ctx, &expr0_0); 3191 return Some(expr1_0); 3192 } 3193 return None; 3194 } 3195 3196 // Generated as internal constructor for term emit_imm. 3197 pub fn constructor_emit_imm<C: Context>( 3198 ctx: &mut C, 3199 arg0: Type, 3200 arg1: WritableReg, 3201 arg2: u64, 3202 ) -> Option<Unit> { 3203 let pattern0_0 = arg0; 3204 if pattern0_0 == F32 { 3205 let pattern2_0 = arg1; 3206 let pattern3_0 = arg2; 3207 // Rule at src/isa/s390x/inst.isle line 1928. 3208 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3209 let expr1_0 = MInst::LoadFpuConst32 { 3210 rd: pattern2_0, 3211 const_data: expr0_0, 3212 }; 3213 let expr2_0 = C::emit(ctx, &expr1_0); 3214 return Some(expr2_0); 3215 } 3216 if pattern0_0 == F64 { 3217 let pattern2_0 = arg1; 3218 let pattern3_0 = arg2; 3219 // Rule at src/isa/s390x/inst.isle line 1933. 3220 let expr0_0 = MInst::LoadFpuConst64 { 3221 rd: pattern2_0, 3222 const_data: pattern3_0, 3223 }; 3224 let expr1_0 = C::emit(ctx, &expr0_0); 3225 return Some(expr1_0); 3226 } 3227 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3228 let pattern2_0 = arg1; 3229 let pattern3_0 = arg2; 3230 // Rule at src/isa/s390x/inst.isle line 1882. 3231 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3232 let expr1_0 = MInst::Mov32SImm16 { 3233 rd: pattern2_0, 3234 imm: expr0_0, 3235 }; 3236 let expr2_0 = C::emit(ctx, &expr1_0); 3237 return Some(expr2_0); 3238 } 3239 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3240 let pattern2_0 = arg1; 3241 let pattern3_0 = arg2; 3242 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3243 // Rule at src/isa/s390x/inst.isle line 1886. 3244 let expr0_0 = MInst::Mov32SImm16 { 3245 rd: pattern2_0, 3246 imm: pattern4_0, 3247 }; 3248 let expr1_0 = C::emit(ctx, &expr0_0); 3249 return Some(expr1_0); 3250 } 3251 // Rule at src/isa/s390x/inst.isle line 1890. 3252 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3253 let expr1_0 = MInst::Mov32Imm { 3254 rd: pattern2_0, 3255 imm: expr0_0, 3256 }; 3257 let expr2_0 = C::emit(ctx, &expr1_0); 3258 return Some(expr2_0); 3259 } 3260 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3261 let pattern2_0 = arg1; 3262 let pattern3_0 = arg2; 3263 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3264 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3265 // Rule at src/isa/s390x/inst.isle line 1910. 3266 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3267 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3268 return Some(expr1_0); 3269 } 3270 } 3271 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3272 // Rule at src/isa/s390x/inst.isle line 1894. 3273 let expr0_0 = MInst::Mov64SImm16 { 3274 rd: pattern2_0, 3275 imm: pattern4_0, 3276 }; 3277 let expr1_0 = C::emit(ctx, &expr0_0); 3278 return Some(expr1_0); 3279 } 3280 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3281 // Rule at src/isa/s390x/inst.isle line 1898. 3282 let expr0_0 = MInst::Mov64SImm32 { 3283 rd: pattern2_0, 3284 imm: pattern4_0, 3285 }; 3286 let expr1_0 = C::emit(ctx, &expr0_0); 3287 return Some(expr1_0); 3288 } 3289 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3290 // Rule at src/isa/s390x/inst.isle line 1906. 3291 let expr0_0 = MInst::Mov64UImm32Shifted { 3292 rd: pattern2_0, 3293 imm: pattern4_0, 3294 }; 3295 let expr1_0 = C::emit(ctx, &expr0_0); 3296 return Some(expr1_0); 3297 } 3298 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3299 // Rule at src/isa/s390x/inst.isle line 1902. 3300 let expr0_0 = MInst::Mov64UImm16Shifted { 3301 rd: pattern2_0, 3302 imm: pattern4_0, 3303 }; 3304 let expr1_0 = C::emit(ctx, &expr0_0); 3305 return Some(expr1_0); 3306 } 3307 } 3308 return None; 3309 } 3310 3311 // Generated as internal constructor for term emit_insert_imm. 3312 pub fn constructor_emit_insert_imm<C: Context>( 3313 ctx: &mut C, 3314 arg0: WritableReg, 3315 arg1: u64, 3316 ) -> Option<Unit> { 3317 let pattern0_0 = arg0; 3318 let pattern1_0 = arg1; 3319 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3320 // Rule at src/isa/s390x/inst.isle line 1923. 3321 let expr0_0 = MInst::Insert64UImm32Shifted { 3322 rd: pattern0_0, 3323 imm: pattern2_0, 3324 }; 3325 let expr1_0 = C::emit(ctx, &expr0_0); 3326 return Some(expr1_0); 3327 } 3328 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3329 // Rule at src/isa/s390x/inst.isle line 1919. 3330 let expr0_0 = MInst::Insert64UImm16Shifted { 3331 rd: pattern0_0, 3332 imm: pattern2_0, 3333 }; 3334 let expr1_0 = C::emit(ctx, &expr0_0); 3335 return Some(expr1_0); 3336 } 3337 return None; 3338 } 3339 3340 // Generated as internal constructor for term imm. 3341 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3342 let pattern0_0 = arg0; 3343 let pattern1_0 = arg1; 3344 // Rule at src/isa/s390x/inst.isle line 1938. 3345 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3346 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3347 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3348 return Some(expr2_0); 3349 } 3350 3351 // Generated as internal constructor for term imm_regpair_lo. 3352 pub fn constructor_imm_regpair_lo<C: Context>( 3353 ctx: &mut C, 3354 arg0: Type, 3355 arg1: u64, 3356 arg2: &RegPair, 3357 ) -> Option<RegPair> { 3358 let pattern0_0 = arg0; 3359 let pattern1_0 = arg1; 3360 let pattern2_0 = arg2; 3361 // Rule at src/isa/s390x/inst.isle line 1946. 3362 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3363 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3364 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3365 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3366 return Some(expr3_0); 3367 } 3368 3369 // Generated as internal constructor for term imm_regpair_hi. 3370 pub fn constructor_imm_regpair_hi<C: Context>( 3371 ctx: &mut C, 3372 arg0: Type, 3373 arg1: u64, 3374 arg2: &RegPair, 3375 ) -> Option<RegPair> { 3376 let pattern0_0 = arg0; 3377 let pattern1_0 = arg1; 3378 let pattern2_0 = arg2; 3379 // Rule at src/isa/s390x/inst.isle line 1954. 3380 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3381 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3382 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3383 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3384 return Some(expr3_0); 3385 } 3386 3387 // Generated as internal constructor for term ty_ext32. 3388 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3389 let pattern0_0 = arg0; 3390 if pattern0_0 == I8 { 3391 // Rule at src/isa/s390x/inst.isle line 1964. 3392 let expr0_0: Type = I32; 3393 return Some(expr0_0); 3394 } 3395 if pattern0_0 == I16 { 3396 // Rule at src/isa/s390x/inst.isle line 1965. 3397 let expr0_0: Type = I32; 3398 return Some(expr0_0); 3399 } 3400 if pattern0_0 == I32 { 3401 // Rule at src/isa/s390x/inst.isle line 1966. 3402 let expr0_0: Type = I32; 3403 return Some(expr0_0); 3404 } 3405 if pattern0_0 == I64 { 3406 // Rule at src/isa/s390x/inst.isle line 1967. 3407 let expr0_0: Type = I64; 3408 return Some(expr0_0); 3409 } 3410 return None; 3411 } 3412 3413 // Generated as internal constructor for term ty_ext64. 3414 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3415 let pattern0_0 = arg0; 3416 if pattern0_0 == I8 { 3417 // Rule at src/isa/s390x/inst.isle line 1971. 3418 let expr0_0: Type = I64; 3419 return Some(expr0_0); 3420 } 3421 if pattern0_0 == I16 { 3422 // Rule at src/isa/s390x/inst.isle line 1972. 3423 let expr0_0: Type = I64; 3424 return Some(expr0_0); 3425 } 3426 if pattern0_0 == I32 { 3427 // Rule at src/isa/s390x/inst.isle line 1973. 3428 let expr0_0: Type = I64; 3429 return Some(expr0_0); 3430 } 3431 if pattern0_0 == I64 { 3432 // Rule at src/isa/s390x/inst.isle line 1974. 3433 let expr0_0: Type = I64; 3434 return Some(expr0_0); 3435 } 3436 return None; 3437 } 3438 3439 // Generated as internal constructor for term emit_zext32_reg. 3440 pub fn constructor_emit_zext32_reg<C: Context>( 3441 ctx: &mut C, 3442 arg0: WritableReg, 3443 arg1: Type, 3444 arg2: Reg, 3445 ) -> Option<Unit> { 3446 let pattern0_0 = arg0; 3447 let pattern1_0 = arg1; 3448 let pattern2_0 = arg2; 3449 // Rule at src/isa/s390x/inst.isle line 1979. 3450 let expr0_0: bool = false; 3451 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3452 let expr2_0: u8 = 32; 3453 let expr3_0 = MInst::Extend { 3454 rd: pattern0_0, 3455 rn: pattern2_0, 3456 signed: expr0_0, 3457 from_bits: expr1_0, 3458 to_bits: expr2_0, 3459 }; 3460 let expr4_0 = C::emit(ctx, &expr3_0); 3461 return Some(expr4_0); 3462 } 3463 3464 // Generated as internal constructor for term emit_sext32_reg. 3465 pub fn constructor_emit_sext32_reg<C: Context>( 3466 ctx: &mut C, 3467 arg0: WritableReg, 3468 arg1: Type, 3469 arg2: Reg, 3470 ) -> Option<Unit> { 3471 let pattern0_0 = arg0; 3472 let pattern1_0 = arg1; 3473 let pattern2_0 = arg2; 3474 // Rule at src/isa/s390x/inst.isle line 1985. 3475 let expr0_0: bool = true; 3476 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3477 let expr2_0: u8 = 32; 3478 let expr3_0 = MInst::Extend { 3479 rd: pattern0_0, 3480 rn: pattern2_0, 3481 signed: expr0_0, 3482 from_bits: expr1_0, 3483 to_bits: expr2_0, 3484 }; 3485 let expr4_0 = C::emit(ctx, &expr3_0); 3486 return Some(expr4_0); 3487 } 3488 3489 // Generated as internal constructor for term emit_zext64_reg. 3490 pub fn constructor_emit_zext64_reg<C: Context>( 3491 ctx: &mut C, 3492 arg0: WritableReg, 3493 arg1: Type, 3494 arg2: Reg, 3495 ) -> Option<Unit> { 3496 let pattern0_0 = arg0; 3497 let pattern1_0 = arg1; 3498 let pattern2_0 = arg2; 3499 // Rule at src/isa/s390x/inst.isle line 1991. 3500 let expr0_0: bool = false; 3501 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3502 let expr2_0: u8 = 64; 3503 let expr3_0 = MInst::Extend { 3504 rd: pattern0_0, 3505 rn: pattern2_0, 3506 signed: expr0_0, 3507 from_bits: expr1_0, 3508 to_bits: expr2_0, 3509 }; 3510 let expr4_0 = C::emit(ctx, &expr3_0); 3511 return Some(expr4_0); 3512 } 3513 3514 // Generated as internal constructor for term emit_sext64_reg. 3515 pub fn constructor_emit_sext64_reg<C: Context>( 3516 ctx: &mut C, 3517 arg0: WritableReg, 3518 arg1: Type, 3519 arg2: Reg, 3520 ) -> Option<Unit> { 3521 let pattern0_0 = arg0; 3522 let pattern1_0 = arg1; 3523 let pattern2_0 = arg2; 3524 // Rule at src/isa/s390x/inst.isle line 1997. 3525 let expr0_0: bool = true; 3526 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3527 let expr2_0: u8 = 64; 3528 let expr3_0 = MInst::Extend { 3529 rd: pattern0_0, 3530 rn: pattern2_0, 3531 signed: expr0_0, 3532 from_bits: expr1_0, 3533 to_bits: expr2_0, 3534 }; 3535 let expr4_0 = C::emit(ctx, &expr3_0); 3536 return Some(expr4_0); 3537 } 3538 3539 // Generated as internal constructor for term zext32_reg. 3540 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3541 let pattern0_0 = arg0; 3542 let pattern1_0 = arg1; 3543 // Rule at src/isa/s390x/inst.isle line 2003. 3544 let expr0_0: Type = I32; 3545 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3546 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3547 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3548 return Some(expr3_0); 3549 } 3550 3551 // Generated as internal constructor for term sext32_reg. 3552 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3553 let pattern0_0 = arg0; 3554 let pattern1_0 = arg1; 3555 // Rule at src/isa/s390x/inst.isle line 2011. 3556 let expr0_0: Type = I32; 3557 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3558 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3559 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3560 return Some(expr3_0); 3561 } 3562 3563 // Generated as internal constructor for term zext64_reg. 3564 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3565 let pattern0_0 = arg0; 3566 let pattern1_0 = arg1; 3567 // Rule at src/isa/s390x/inst.isle line 2019. 3568 let expr0_0: Type = I64; 3569 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3570 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3571 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3572 return Some(expr3_0); 3573 } 3574 3575 // Generated as internal constructor for term sext64_reg. 3576 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3577 let pattern0_0 = arg0; 3578 let pattern1_0 = arg1; 3579 // Rule at src/isa/s390x/inst.isle line 2027. 3580 let expr0_0: Type = I64; 3581 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3582 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3583 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3584 return Some(expr3_0); 3585 } 3586 3587 // Generated as internal constructor for term emit_zext32_mem. 3588 pub fn constructor_emit_zext32_mem<C: Context>( 3589 ctx: &mut C, 3590 arg0: WritableReg, 3591 arg1: Type, 3592 arg2: &MemArg, 3593 ) -> Option<Unit> { 3594 let pattern0_0 = arg0; 3595 let pattern1_0 = arg1; 3596 if pattern1_0 == I8 { 3597 let pattern3_0 = arg2; 3598 // Rule at src/isa/s390x/inst.isle line 2035. 3599 let expr0_0 = MInst::Load32ZExt8 { 3600 rd: pattern0_0, 3601 mem: pattern3_0.clone(), 3602 }; 3603 let expr1_0 = C::emit(ctx, &expr0_0); 3604 return Some(expr1_0); 3605 } 3606 if pattern1_0 == I16 { 3607 let pattern3_0 = arg2; 3608 // Rule at src/isa/s390x/inst.isle line 2036. 3609 let expr0_0 = MInst::Load32ZExt16 { 3610 rd: pattern0_0, 3611 mem: pattern3_0.clone(), 3612 }; 3613 let expr1_0 = C::emit(ctx, &expr0_0); 3614 return Some(expr1_0); 3615 } 3616 return None; 3617 } 3618 3619 // Generated as internal constructor for term emit_sext32_mem. 3620 pub fn constructor_emit_sext32_mem<C: Context>( 3621 ctx: &mut C, 3622 arg0: WritableReg, 3623 arg1: Type, 3624 arg2: &MemArg, 3625 ) -> Option<Unit> { 3626 let pattern0_0 = arg0; 3627 let pattern1_0 = arg1; 3628 if pattern1_0 == I8 { 3629 let pattern3_0 = arg2; 3630 // Rule at src/isa/s390x/inst.isle line 2040. 3631 let expr0_0 = MInst::Load32SExt8 { 3632 rd: pattern0_0, 3633 mem: pattern3_0.clone(), 3634 }; 3635 let expr1_0 = C::emit(ctx, &expr0_0); 3636 return Some(expr1_0); 3637 } 3638 if pattern1_0 == I16 { 3639 let pattern3_0 = arg2; 3640 // Rule at src/isa/s390x/inst.isle line 2041. 3641 let expr0_0 = MInst::Load32SExt16 { 3642 rd: pattern0_0, 3643 mem: pattern3_0.clone(), 3644 }; 3645 let expr1_0 = C::emit(ctx, &expr0_0); 3646 return Some(expr1_0); 3647 } 3648 return None; 3649 } 3650 3651 // Generated as internal constructor for term emit_zext64_mem. 3652 pub fn constructor_emit_zext64_mem<C: Context>( 3653 ctx: &mut C, 3654 arg0: WritableReg, 3655 arg1: Type, 3656 arg2: &MemArg, 3657 ) -> Option<Unit> { 3658 let pattern0_0 = arg0; 3659 let pattern1_0 = arg1; 3660 if pattern1_0 == I8 { 3661 let pattern3_0 = arg2; 3662 // Rule at src/isa/s390x/inst.isle line 2045. 3663 let expr0_0 = MInst::Load64ZExt8 { 3664 rd: pattern0_0, 3665 mem: pattern3_0.clone(), 3666 }; 3667 let expr1_0 = C::emit(ctx, &expr0_0); 3668 return Some(expr1_0); 3669 } 3670 if pattern1_0 == I16 { 3671 let pattern3_0 = arg2; 3672 // Rule at src/isa/s390x/inst.isle line 2046. 3673 let expr0_0 = MInst::Load64ZExt16 { 3674 rd: pattern0_0, 3675 mem: pattern3_0.clone(), 3676 }; 3677 let expr1_0 = C::emit(ctx, &expr0_0); 3678 return Some(expr1_0); 3679 } 3680 if pattern1_0 == I32 { 3681 let pattern3_0 = arg2; 3682 // Rule at src/isa/s390x/inst.isle line 2047. 3683 let expr0_0 = MInst::Load64ZExt32 { 3684 rd: pattern0_0, 3685 mem: pattern3_0.clone(), 3686 }; 3687 let expr1_0 = C::emit(ctx, &expr0_0); 3688 return Some(expr1_0); 3689 } 3690 return None; 3691 } 3692 3693 // Generated as internal constructor for term emit_sext64_mem. 3694 pub fn constructor_emit_sext64_mem<C: Context>( 3695 ctx: &mut C, 3696 arg0: WritableReg, 3697 arg1: Type, 3698 arg2: &MemArg, 3699 ) -> Option<Unit> { 3700 let pattern0_0 = arg0; 3701 let pattern1_0 = arg1; 3702 if pattern1_0 == I8 { 3703 let pattern3_0 = arg2; 3704 // Rule at src/isa/s390x/inst.isle line 2051. 3705 let expr0_0 = MInst::Load64SExt8 { 3706 rd: pattern0_0, 3707 mem: pattern3_0.clone(), 3708 }; 3709 let expr1_0 = C::emit(ctx, &expr0_0); 3710 return Some(expr1_0); 3711 } 3712 if pattern1_0 == I16 { 3713 let pattern3_0 = arg2; 3714 // Rule at src/isa/s390x/inst.isle line 2052. 3715 let expr0_0 = MInst::Load64SExt16 { 3716 rd: pattern0_0, 3717 mem: pattern3_0.clone(), 3718 }; 3719 let expr1_0 = C::emit(ctx, &expr0_0); 3720 return Some(expr1_0); 3721 } 3722 if pattern1_0 == I32 { 3723 let pattern3_0 = arg2; 3724 // Rule at src/isa/s390x/inst.isle line 2053. 3725 let expr0_0 = MInst::Load64SExt32 { 3726 rd: pattern0_0, 3727 mem: pattern3_0.clone(), 3728 }; 3729 let expr1_0 = C::emit(ctx, &expr0_0); 3730 return Some(expr1_0); 3731 } 3732 return None; 3733 } 3734 3735 // Generated as internal constructor for term zext32_mem. 3736 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3737 let pattern0_0 = arg0; 3738 let pattern1_0 = arg1; 3739 // Rule at src/isa/s390x/inst.isle line 2057. 3740 let expr0_0: Type = I32; 3741 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3742 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3743 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3744 return Some(expr3_0); 3745 } 3746 3747 // Generated as internal constructor for term sext32_mem. 3748 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3749 let pattern0_0 = arg0; 3750 let pattern1_0 = arg1; 3751 // Rule at src/isa/s390x/inst.isle line 2064. 3752 let expr0_0: Type = I32; 3753 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3754 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3755 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3756 return Some(expr3_0); 3757 } 3758 3759 // Generated as internal constructor for term zext64_mem. 3760 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3761 let pattern0_0 = arg0; 3762 let pattern1_0 = arg1; 3763 // Rule at src/isa/s390x/inst.isle line 2071. 3764 let expr0_0: Type = I64; 3765 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3766 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3767 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3768 return Some(expr3_0); 3769 } 3770 3771 // Generated as internal constructor for term sext64_mem. 3772 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3773 let pattern0_0 = arg0; 3774 let pattern1_0 = arg1; 3775 // Rule at src/isa/s390x/inst.isle line 2078. 3776 let expr0_0: Type = I64; 3777 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3778 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3779 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3780 return Some(expr3_0); 3781 } 3782 3783 // Generated as internal constructor for term emit_put_in_reg_zext32. 3784 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3785 ctx: &mut C, 3786 arg0: WritableReg, 3787 arg1: Value, 3788 ) -> Option<Unit> { 3789 let pattern0_0 = arg0; 3790 let pattern1_0 = arg1; 3791 let pattern2_0 = C::value_type(ctx, pattern1_0); 3792 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3793 // Rule at src/isa/s390x/inst.isle line 2086. 3794 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3795 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3796 return Some(expr1_0); 3797 } 3798 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3799 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3800 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3801 if let &InstructionData::Load { 3802 opcode: ref pattern6_0, 3803 arg: pattern6_1, 3804 flags: pattern6_2, 3805 offset: pattern6_3, 3806 } = &pattern5_0 3807 { 3808 if let &Opcode::Load = pattern6_0 { 3809 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3810 // Rule at src/isa/s390x/inst.isle line 2088. 3811 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3812 let expr1_0 = 3813 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3814 return Some(expr1_0); 3815 } 3816 } 3817 } 3818 } 3819 // Rule at src/isa/s390x/inst.isle line 2090. 3820 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3821 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3822 return Some(expr1_0); 3823 } 3824 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3825 // Rule at src/isa/s390x/inst.isle line 2092. 3826 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3827 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3828 return Some(expr1_0); 3829 } 3830 return None; 3831 } 3832 3833 // Generated as internal constructor for term emit_put_in_reg_sext32. 3834 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3835 ctx: &mut C, 3836 arg0: WritableReg, 3837 arg1: Value, 3838 ) -> Option<Unit> { 3839 let pattern0_0 = arg0; 3840 let pattern1_0 = arg1; 3841 let pattern2_0 = C::value_type(ctx, pattern1_0); 3842 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3843 // Rule at src/isa/s390x/inst.isle line 2097. 3844 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3845 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3846 return Some(expr1_0); 3847 } 3848 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3849 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3850 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3851 if let &InstructionData::Load { 3852 opcode: ref pattern6_0, 3853 arg: pattern6_1, 3854 flags: pattern6_2, 3855 offset: pattern6_3, 3856 } = &pattern5_0 3857 { 3858 if let &Opcode::Load = pattern6_0 { 3859 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3860 // Rule at src/isa/s390x/inst.isle line 2099. 3861 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3862 let expr1_0 = 3863 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3864 return Some(expr1_0); 3865 } 3866 } 3867 } 3868 } 3869 // Rule at src/isa/s390x/inst.isle line 2101. 3870 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3871 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3872 return Some(expr1_0); 3873 } 3874 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3875 // Rule at src/isa/s390x/inst.isle line 2103. 3876 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3877 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3878 return Some(expr1_0); 3879 } 3880 return None; 3881 } 3882 3883 // Generated as internal constructor for term emit_put_in_reg_zext64. 3884 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3885 ctx: &mut C, 3886 arg0: WritableReg, 3887 arg1: Value, 3888 ) -> Option<Unit> { 3889 let pattern0_0 = arg0; 3890 let pattern1_0 = arg1; 3891 let pattern2_0 = C::value_type(ctx, pattern1_0); 3892 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3893 // Rule at src/isa/s390x/inst.isle line 2108. 3894 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3895 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3896 return Some(expr1_0); 3897 } 3898 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3899 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3900 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3901 if let &InstructionData::Load { 3902 opcode: ref pattern6_0, 3903 arg: pattern6_1, 3904 flags: pattern6_2, 3905 offset: pattern6_3, 3906 } = &pattern5_0 3907 { 3908 if let &Opcode::Load = pattern6_0 { 3909 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3910 // Rule at src/isa/s390x/inst.isle line 2110. 3911 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3912 let expr1_0 = 3913 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3914 return Some(expr1_0); 3915 } 3916 } 3917 } 3918 } 3919 // Rule at src/isa/s390x/inst.isle line 2112. 3920 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3921 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3922 return Some(expr1_0); 3923 } 3924 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3925 // Rule at src/isa/s390x/inst.isle line 2114. 3926 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3927 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3928 return Some(expr1_0); 3929 } 3930 return None; 3931 } 3932 3933 // Generated as internal constructor for term emit_put_in_reg_sext64. 3934 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3935 ctx: &mut C, 3936 arg0: WritableReg, 3937 arg1: Value, 3938 ) -> Option<Unit> { 3939 let pattern0_0 = arg0; 3940 let pattern1_0 = arg1; 3941 let pattern2_0 = C::value_type(ctx, pattern1_0); 3942 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3943 // Rule at src/isa/s390x/inst.isle line 2119. 3944 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3945 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3946 return Some(expr1_0); 3947 } 3948 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3949 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3950 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3951 if let &InstructionData::Load { 3952 opcode: ref pattern6_0, 3953 arg: pattern6_1, 3954 flags: pattern6_2, 3955 offset: pattern6_3, 3956 } = &pattern5_0 3957 { 3958 if let &Opcode::Load = pattern6_0 { 3959 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3960 // Rule at src/isa/s390x/inst.isle line 2121. 3961 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3962 let expr1_0 = 3963 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3964 return Some(expr1_0); 3965 } 3966 } 3967 } 3968 } 3969 // Rule at src/isa/s390x/inst.isle line 2123. 3970 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3971 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3972 return Some(expr1_0); 3973 } 3974 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3975 // Rule at src/isa/s390x/inst.isle line 2125. 3976 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3977 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3978 return Some(expr1_0); 3979 } 3980 return None; 3981 } 3982 3983 // Generated as internal constructor for term put_in_reg_zext32. 3984 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3985 let pattern0_0 = arg0; 3986 let pattern1_0 = C::value_type(ctx, pattern0_0); 3987 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3988 // Rule at src/isa/s390x/inst.isle line 2130. 3989 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3990 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3991 return Some(expr1_0); 3992 } 3993 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3994 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3995 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3996 if let &InstructionData::Load { 3997 opcode: ref pattern5_0, 3998 arg: pattern5_1, 3999 flags: pattern5_2, 4000 offset: pattern5_3, 4001 } = &pattern4_0 4002 { 4003 if let &Opcode::Load = pattern5_0 { 4004 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4005 // Rule at src/isa/s390x/inst.isle line 2132. 4006 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4007 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 4008 return Some(expr1_0); 4009 } 4010 } 4011 } 4012 } 4013 // Rule at src/isa/s390x/inst.isle line 2134. 4014 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4015 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 4016 return Some(expr1_0); 4017 } 4018 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4019 // Rule at src/isa/s390x/inst.isle line 2136. 4020 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4021 return Some(expr0_0); 4022 } 4023 return None; 4024 } 4025 4026 // Generated as internal constructor for term put_in_reg_sext32. 4027 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4028 let pattern0_0 = arg0; 4029 let pattern1_0 = C::value_type(ctx, pattern0_0); 4030 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4031 // Rule at src/isa/s390x/inst.isle line 2141. 4032 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4033 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4034 return Some(expr1_0); 4035 } 4036 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 4037 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4038 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4039 if let &InstructionData::Load { 4040 opcode: ref pattern5_0, 4041 arg: pattern5_1, 4042 flags: pattern5_2, 4043 offset: pattern5_3, 4044 } = &pattern4_0 4045 { 4046 if let &Opcode::Load = pattern5_0 { 4047 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4048 // Rule at src/isa/s390x/inst.isle line 2143. 4049 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4050 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 4051 return Some(expr1_0); 4052 } 4053 } 4054 } 4055 } 4056 // Rule at src/isa/s390x/inst.isle line 2145. 4057 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4058 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 4059 return Some(expr1_0); 4060 } 4061 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 4062 // Rule at src/isa/s390x/inst.isle line 2147. 4063 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4064 return Some(expr0_0); 4065 } 4066 return None; 4067 } 4068 4069 // Generated as internal constructor for term put_in_reg_zext64. 4070 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4071 let pattern0_0 = arg0; 4072 let pattern1_0 = C::value_type(ctx, pattern0_0); 4073 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 4074 // Rule at src/isa/s390x/inst.isle line 2152. 4075 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4076 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4077 return Some(expr1_0); 4078 } 4079 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4080 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4081 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4082 if let &InstructionData::Load { 4083 opcode: ref pattern5_0, 4084 arg: pattern5_1, 4085 flags: pattern5_2, 4086 offset: pattern5_3, 4087 } = &pattern4_0 4088 { 4089 if let &Opcode::Load = pattern5_0 { 4090 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4091 // Rule at src/isa/s390x/inst.isle line 2154. 4092 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4093 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4094 return Some(expr1_0); 4095 } 4096 } 4097 } 4098 } 4099 // Rule at src/isa/s390x/inst.isle line 2156. 4100 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4101 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4102 return Some(expr1_0); 4103 } 4104 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4105 // Rule at src/isa/s390x/inst.isle line 2158. 4106 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4107 return Some(expr0_0); 4108 } 4109 return None; 4110 } 4111 4112 // Generated as internal constructor for term put_in_reg_sext64. 4113 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4114 let pattern0_0 = arg0; 4115 let pattern1_0 = C::value_type(ctx, pattern0_0); 4116 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4117 // Rule at src/isa/s390x/inst.isle line 2163. 4118 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4119 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4120 return Some(expr1_0); 4121 } 4122 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4123 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4124 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4125 if let &InstructionData::Load { 4126 opcode: ref pattern5_0, 4127 arg: pattern5_1, 4128 flags: pattern5_2, 4129 offset: pattern5_3, 4130 } = &pattern4_0 4131 { 4132 if let &Opcode::Load = pattern5_0 { 4133 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4134 // Rule at src/isa/s390x/inst.isle line 2165. 4135 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4136 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4137 return Some(expr1_0); 4138 } 4139 } 4140 } 4141 } 4142 // Rule at src/isa/s390x/inst.isle line 2167. 4143 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4144 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4145 return Some(expr1_0); 4146 } 4147 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4148 // Rule at src/isa/s390x/inst.isle line 2169. 4149 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4150 return Some(expr0_0); 4151 } 4152 return None; 4153 } 4154 4155 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4156 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4157 ctx: &mut C, 4158 arg0: Value, 4159 arg1: &RegPair, 4160 ) -> Option<RegPair> { 4161 let pattern0_0 = arg0; 4162 let pattern1_0 = arg1; 4163 // Rule at src/isa/s390x/inst.isle line 2175. 4164 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4165 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4166 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4167 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4168 return Some(expr3_0); 4169 } 4170 4171 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4172 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4173 ctx: &mut C, 4174 arg0: Value, 4175 arg1: &RegPair, 4176 ) -> Option<RegPair> { 4177 let pattern0_0 = arg0; 4178 let pattern1_0 = arg1; 4179 // Rule at src/isa/s390x/inst.isle line 2183. 4180 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4181 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4182 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4183 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4184 return Some(expr3_0); 4185 } 4186 4187 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4188 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4189 ctx: &mut C, 4190 arg0: Value, 4191 arg1: &RegPair, 4192 ) -> Option<RegPair> { 4193 let pattern0_0 = arg0; 4194 let pattern1_0 = arg1; 4195 // Rule at src/isa/s390x/inst.isle line 2191. 4196 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4197 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4198 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4199 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4200 return Some(expr3_0); 4201 } 4202 4203 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4204 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4205 ctx: &mut C, 4206 arg0: Value, 4207 arg1: &RegPair, 4208 ) -> Option<RegPair> { 4209 let pattern0_0 = arg0; 4210 let pattern1_0 = arg1; 4211 // Rule at src/isa/s390x/inst.isle line 2199. 4212 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4213 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4214 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4215 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4216 return Some(expr3_0); 4217 } 4218 4219 // Generated as internal constructor for term emit_cmov_imm. 4220 pub fn constructor_emit_cmov_imm<C: Context>( 4221 ctx: &mut C, 4222 arg0: Type, 4223 arg1: WritableReg, 4224 arg2: &Cond, 4225 arg3: i16, 4226 ) -> Option<ConsumesFlags> { 4227 let pattern0_0 = arg0; 4228 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4229 let pattern2_0 = arg1; 4230 let pattern3_0 = arg2; 4231 let pattern4_0 = arg3; 4232 // Rule at src/isa/s390x/inst.isle line 2209. 4233 let expr0_0 = MInst::CMov32SImm16 { 4234 rd: pattern2_0, 4235 cond: pattern3_0.clone(), 4236 imm: pattern4_0, 4237 }; 4238 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4239 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4240 inst: expr0_0, 4241 result: expr1_0, 4242 }; 4243 return Some(expr2_0); 4244 } 4245 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4246 let pattern2_0 = arg1; 4247 let pattern3_0 = arg2; 4248 let pattern4_0 = arg3; 4249 // Rule at src/isa/s390x/inst.isle line 2212. 4250 let expr0_0 = MInst::CMov64SImm16 { 4251 rd: pattern2_0, 4252 cond: pattern3_0.clone(), 4253 imm: pattern4_0, 4254 }; 4255 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4256 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4257 inst: expr0_0, 4258 result: expr1_0, 4259 }; 4260 return Some(expr2_0); 4261 } 4262 return None; 4263 } 4264 4265 // Generated as internal constructor for term cmov_imm. 4266 pub fn constructor_cmov_imm<C: Context>( 4267 ctx: &mut C, 4268 arg0: Type, 4269 arg1: &Cond, 4270 arg2: i16, 4271 arg3: Reg, 4272 ) -> Option<ConsumesFlags> { 4273 let pattern0_0 = arg0; 4274 let pattern1_0 = arg1; 4275 let pattern2_0 = arg2; 4276 let pattern3_0 = arg3; 4277 // Rule at src/isa/s390x/inst.isle line 2218. 4278 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4279 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4280 return Some(expr1_0); 4281 } 4282 4283 // Generated as internal constructor for term cmov_imm_regpair_lo. 4284 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4285 ctx: &mut C, 4286 arg0: Type, 4287 arg1: &ProducesFlags, 4288 arg2: &Cond, 4289 arg3: i16, 4290 arg4: &RegPair, 4291 ) -> Option<RegPair> { 4292 let pattern0_0 = arg0; 4293 let pattern1_0 = arg1; 4294 let pattern2_0 = arg2; 4295 let pattern3_0 = arg3; 4296 let pattern4_0 = arg4; 4297 // Rule at src/isa/s390x/inst.isle line 2225. 4298 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4299 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4300 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4301 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4302 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4303 return Some(expr4_0); 4304 } 4305 4306 // Generated as internal constructor for term cmov_imm_regpair_hi. 4307 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4308 ctx: &mut C, 4309 arg0: Type, 4310 arg1: &ProducesFlags, 4311 arg2: &Cond, 4312 arg3: i16, 4313 arg4: &RegPair, 4314 ) -> Option<RegPair> { 4315 let pattern0_0 = arg0; 4316 let pattern1_0 = arg1; 4317 let pattern2_0 = arg2; 4318 let pattern3_0 = arg3; 4319 let pattern4_0 = arg4; 4320 // Rule at src/isa/s390x/inst.isle line 2234. 4321 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4322 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4323 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4324 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4325 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4326 return Some(expr4_0); 4327 } 4328 4329 // Generated as internal constructor for term emit_cmov_reg. 4330 pub fn constructor_emit_cmov_reg<C: Context>( 4331 ctx: &mut C, 4332 arg0: Type, 4333 arg1: WritableReg, 4334 arg2: &Cond, 4335 arg3: Reg, 4336 ) -> Option<ConsumesFlags> { 4337 let pattern0_0 = arg0; 4338 if pattern0_0 == F32 { 4339 let pattern2_0 = arg1; 4340 let pattern3_0 = arg2; 4341 let pattern4_0 = arg3; 4342 // Rule at src/isa/s390x/inst.isle line 2248. 4343 let expr0_0 = MInst::FpuCMov32 { 4344 rd: pattern2_0, 4345 cond: pattern3_0.clone(), 4346 rm: pattern4_0, 4347 }; 4348 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4349 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4350 inst: expr0_0, 4351 result: expr1_0, 4352 }; 4353 return Some(expr2_0); 4354 } 4355 if pattern0_0 == F64 { 4356 let pattern2_0 = arg1; 4357 let pattern3_0 = arg2; 4358 let pattern4_0 = arg3; 4359 // Rule at src/isa/s390x/inst.isle line 2251. 4360 let expr0_0 = MInst::FpuCMov64 { 4361 rd: pattern2_0, 4362 cond: pattern3_0.clone(), 4363 rm: pattern4_0, 4364 }; 4365 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4366 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4367 inst: expr0_0, 4368 result: expr1_0, 4369 }; 4370 return Some(expr2_0); 4371 } 4372 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4373 let pattern2_0 = arg1; 4374 let pattern3_0 = arg2; 4375 let pattern4_0 = arg3; 4376 // Rule at src/isa/s390x/inst.isle line 2242. 4377 let expr0_0 = MInst::CMov32 { 4378 rd: pattern2_0, 4379 cond: pattern3_0.clone(), 4380 rm: pattern4_0, 4381 }; 4382 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4383 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4384 inst: expr0_0, 4385 result: expr1_0, 4386 }; 4387 return Some(expr2_0); 4388 } 4389 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4390 let pattern2_0 = arg1; 4391 let pattern3_0 = arg2; 4392 let pattern4_0 = arg3; 4393 // Rule at src/isa/s390x/inst.isle line 2245. 4394 let expr0_0 = MInst::CMov64 { 4395 rd: pattern2_0, 4396 cond: pattern3_0.clone(), 4397 rm: pattern4_0, 4398 }; 4399 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4400 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4401 inst: expr0_0, 4402 result: expr1_0, 4403 }; 4404 return Some(expr2_0); 4405 } 4406 return None; 4407 } 4408 4409 // Generated as internal constructor for term cmov_reg. 4410 pub fn constructor_cmov_reg<C: Context>( 4411 ctx: &mut C, 4412 arg0: Type, 4413 arg1: &Cond, 4414 arg2: Reg, 4415 arg3: Reg, 4416 ) -> Option<ConsumesFlags> { 4417 let pattern0_0 = arg0; 4418 let pattern1_0 = arg1; 4419 let pattern2_0 = arg2; 4420 let pattern3_0 = arg3; 4421 // Rule at src/isa/s390x/inst.isle line 2257. 4422 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4423 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4424 return Some(expr1_0); 4425 } 4426 4427 // Generated as internal constructor for term trap_if. 4428 pub fn constructor_trap_if<C: Context>( 4429 ctx: &mut C, 4430 arg0: &ProducesFlags, 4431 arg1: &Cond, 4432 arg2: &TrapCode, 4433 ) -> Option<Reg> { 4434 let pattern0_0 = arg0; 4435 match pattern0_0 { 4436 &ProducesFlags::ProducesFlagsSideEffect { 4437 inst: ref pattern1_0, 4438 } => { 4439 let pattern2_0 = arg1; 4440 let pattern3_0 = arg2; 4441 // Rule at src/isa/s390x/inst.isle line 2269. 4442 let expr0_0 = C::emit(ctx, pattern1_0); 4443 let expr1_0 = MInst::TrapIf { 4444 cond: pattern2_0.clone(), 4445 trap_code: pattern3_0.clone(), 4446 }; 4447 let expr2_0 = C::emit(ctx, &expr1_0); 4448 let expr3_0 = C::invalid_reg(ctx); 4449 return Some(expr3_0); 4450 } 4451 &ProducesFlags::ProducesFlagsReturnsReg { 4452 inst: ref pattern1_0, 4453 result: pattern1_1, 4454 } => { 4455 let pattern2_0 = arg1; 4456 let pattern3_0 = arg2; 4457 // Rule at src/isa/s390x/inst.isle line 2265. 4458 let expr0_0 = C::emit(ctx, pattern1_0); 4459 let expr1_0 = MInst::TrapIf { 4460 cond: pattern2_0.clone(), 4461 trap_code: pattern3_0.clone(), 4462 }; 4463 let expr2_0 = C::emit(ctx, &expr1_0); 4464 return Some(pattern1_1); 4465 } 4466 _ => {} 4467 } 4468 return None; 4469 } 4470 4471 // Generated as internal constructor for term icmps_reg_and_trap. 4472 pub fn constructor_icmps_reg_and_trap<C: Context>( 4473 ctx: &mut C, 4474 arg0: Type, 4475 arg1: Reg, 4476 arg2: Reg, 4477 arg3: &Cond, 4478 arg4: &TrapCode, 4479 ) -> Option<Reg> { 4480 let pattern0_0 = arg0; 4481 let pattern1_0 = arg1; 4482 let pattern2_0 = arg2; 4483 let pattern3_0 = arg3; 4484 let pattern4_0 = arg4; 4485 // Rule at src/isa/s390x/inst.isle line 2275. 4486 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4487 let expr1_0 = MInst::CmpTrapRR { 4488 op: expr0_0, 4489 rn: pattern1_0, 4490 rm: pattern2_0, 4491 cond: pattern3_0.clone(), 4492 trap_code: pattern4_0.clone(), 4493 }; 4494 let expr2_0 = C::emit(ctx, &expr1_0); 4495 let expr3_0 = C::invalid_reg(ctx); 4496 return Some(expr3_0); 4497 } 4498 4499 // Generated as internal constructor for term icmps_simm16_and_trap. 4500 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4501 ctx: &mut C, 4502 arg0: Type, 4503 arg1: Reg, 4504 arg2: i16, 4505 arg3: &Cond, 4506 arg4: &TrapCode, 4507 ) -> Option<Reg> { 4508 let pattern0_0 = arg0; 4509 let pattern1_0 = arg1; 4510 let pattern2_0 = arg2; 4511 let pattern3_0 = arg3; 4512 let pattern4_0 = arg4; 4513 // Rule at src/isa/s390x/inst.isle line 2281. 4514 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4515 let expr1_0 = MInst::CmpTrapRSImm16 { 4516 op: expr0_0, 4517 rn: pattern1_0, 4518 imm: pattern2_0, 4519 cond: pattern3_0.clone(), 4520 trap_code: pattern4_0.clone(), 4521 }; 4522 let expr2_0 = C::emit(ctx, &expr1_0); 4523 let expr3_0 = C::invalid_reg(ctx); 4524 return Some(expr3_0); 4525 } 4526 4527 // Generated as internal constructor for term icmpu_reg_and_trap. 4528 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4529 ctx: &mut C, 4530 arg0: Type, 4531 arg1: Reg, 4532 arg2: Reg, 4533 arg3: &Cond, 4534 arg4: &TrapCode, 4535 ) -> Option<Reg> { 4536 let pattern0_0 = arg0; 4537 let pattern1_0 = arg1; 4538 let pattern2_0 = arg2; 4539 let pattern3_0 = arg3; 4540 let pattern4_0 = arg4; 4541 // Rule at src/isa/s390x/inst.isle line 2287. 4542 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4543 let expr1_0 = MInst::CmpTrapRR { 4544 op: expr0_0, 4545 rn: pattern1_0, 4546 rm: pattern2_0, 4547 cond: pattern3_0.clone(), 4548 trap_code: pattern4_0.clone(), 4549 }; 4550 let expr2_0 = C::emit(ctx, &expr1_0); 4551 let expr3_0 = C::invalid_reg(ctx); 4552 return Some(expr3_0); 4553 } 4554 4555 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4556 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4557 ctx: &mut C, 4558 arg0: Type, 4559 arg1: Reg, 4560 arg2: u16, 4561 arg3: &Cond, 4562 arg4: &TrapCode, 4563 ) -> Option<Reg> { 4564 let pattern0_0 = arg0; 4565 let pattern1_0 = arg1; 4566 let pattern2_0 = arg2; 4567 let pattern3_0 = arg3; 4568 let pattern4_0 = arg4; 4569 // Rule at src/isa/s390x/inst.isle line 2293. 4570 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4571 let expr1_0 = MInst::CmpTrapRUImm16 { 4572 op: expr0_0, 4573 rn: pattern1_0, 4574 imm: pattern2_0, 4575 cond: pattern3_0.clone(), 4576 trap_code: pattern4_0.clone(), 4577 }; 4578 let expr2_0 = C::emit(ctx, &expr1_0); 4579 let expr3_0 = C::invalid_reg(ctx); 4580 return Some(expr3_0); 4581 } 4582 4583 // Generated as internal constructor for term trap_impl. 4584 pub fn constructor_trap_impl<C: Context>( 4585 ctx: &mut C, 4586 arg0: &TrapCode, 4587 ) -> Option<SideEffectNoResult> { 4588 let pattern0_0 = arg0; 4589 // Rule at src/isa/s390x/inst.isle line 2299. 4590 let expr0_0 = MInst::Trap { 4591 trap_code: pattern0_0.clone(), 4592 }; 4593 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4594 return Some(expr1_0); 4595 } 4596 4597 // Generated as internal constructor for term trap_if_impl. 4598 pub fn constructor_trap_if_impl<C: Context>( 4599 ctx: &mut C, 4600 arg0: &Cond, 4601 arg1: &TrapCode, 4602 ) -> Option<SideEffectNoResult> { 4603 let pattern0_0 = arg0; 4604 let pattern1_0 = arg1; 4605 // Rule at src/isa/s390x/inst.isle line 2303. 4606 let expr0_0 = MInst::TrapIf { 4607 cond: pattern0_0.clone(), 4608 trap_code: pattern1_0.clone(), 4609 }; 4610 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4611 return Some(expr1_0); 4612 } 4613 4614 // Generated as internal constructor for term debugtrap_impl. 4615 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4616 // Rule at src/isa/s390x/inst.isle line 2307. 4617 let expr0_0 = MInst::Debugtrap; 4618 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4619 return Some(expr1_0); 4620 } 4621 4622 // Generated as internal constructor for term bool. 4623 pub fn constructor_bool<C: Context>( 4624 ctx: &mut C, 4625 arg0: &ProducesFlags, 4626 arg1: &Cond, 4627 ) -> Option<ProducesBool> { 4628 let pattern0_0 = arg0; 4629 let pattern1_0 = arg1; 4630 // Rule at src/isa/s390x/inst.isle line 2318. 4631 let expr0_0 = ProducesBool::ProducesBool { 4632 producer: pattern0_0.clone(), 4633 cond: pattern1_0.clone(), 4634 }; 4635 return Some(expr0_0); 4636 } 4637 4638 // Generated as internal constructor for term invert_bool. 4639 pub fn constructor_invert_bool<C: Context>( 4640 ctx: &mut C, 4641 arg0: &ProducesBool, 4642 ) -> Option<ProducesBool> { 4643 let pattern0_0 = arg0; 4644 if let &ProducesBool::ProducesBool { 4645 producer: ref pattern1_0, 4646 cond: ref pattern1_1, 4647 } = pattern0_0 4648 { 4649 // Rule at src/isa/s390x/inst.isle line 2322. 4650 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4651 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4652 return Some(expr1_0); 4653 } 4654 return None; 4655 } 4656 4657 // Generated as internal constructor for term emit_producer. 4658 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4659 let pattern0_0 = arg0; 4660 if let &ProducesFlags::ProducesFlagsSideEffect { 4661 inst: ref pattern1_0, 4662 } = pattern0_0 4663 { 4664 // Rule at src/isa/s390x/inst.isle line 2331. 4665 let expr0_0 = C::emit(ctx, pattern1_0); 4666 return Some(expr0_0); 4667 } 4668 return None; 4669 } 4670 4671 // Generated as internal constructor for term emit_consumer. 4672 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4673 let pattern0_0 = arg0; 4674 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4675 inst: ref pattern1_0, 4676 result: pattern1_1, 4677 } = pattern0_0 4678 { 4679 // Rule at src/isa/s390x/inst.isle line 2333. 4680 let expr0_0 = C::emit(ctx, pattern1_0); 4681 return Some(expr0_0); 4682 } 4683 return None; 4684 } 4685 4686 // Generated as internal constructor for term select_bool_reg. 4687 pub fn constructor_select_bool_reg<C: Context>( 4688 ctx: &mut C, 4689 arg0: Type, 4690 arg1: &ProducesBool, 4691 arg2: Reg, 4692 arg3: Reg, 4693 ) -> Option<Reg> { 4694 let pattern0_0 = arg0; 4695 let pattern1_0 = arg1; 4696 if let &ProducesBool::ProducesBool { 4697 producer: ref pattern2_0, 4698 cond: ref pattern2_1, 4699 } = pattern1_0 4700 { 4701 let pattern3_0 = arg2; 4702 let pattern4_0 = arg3; 4703 // Rule at src/isa/s390x/inst.isle line 2337. 4704 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4705 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4706 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4707 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4708 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4709 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4710 return Some(expr5_0); 4711 } 4712 return None; 4713 } 4714 4715 // Generated as internal constructor for term select_bool_imm. 4716 pub fn constructor_select_bool_imm<C: Context>( 4717 ctx: &mut C, 4718 arg0: Type, 4719 arg1: &ProducesBool, 4720 arg2: i16, 4721 arg3: u64, 4722 ) -> Option<Reg> { 4723 let pattern0_0 = arg0; 4724 let pattern1_0 = arg1; 4725 if let &ProducesBool::ProducesBool { 4726 producer: ref pattern2_0, 4727 cond: ref pattern2_1, 4728 } = pattern1_0 4729 { 4730 let pattern3_0 = arg2; 4731 let pattern4_0 = arg3; 4732 // Rule at src/isa/s390x/inst.isle line 2346. 4733 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4734 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4735 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4736 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4737 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4738 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4739 return Some(expr5_0); 4740 } 4741 return None; 4742 } 4743 4744 // Generated as internal constructor for term lower_bool. 4745 pub fn constructor_lower_bool<C: Context>( 4746 ctx: &mut C, 4747 arg0: Type, 4748 arg1: &ProducesBool, 4749 ) -> Option<Reg> { 4750 let pattern0_0 = arg0; 4751 if pattern0_0 == B1 { 4752 let pattern2_0 = arg1; 4753 // Rule at src/isa/s390x/inst.isle line 2356. 4754 let expr0_0: Type = B1; 4755 let expr1_0: i16 = 1; 4756 let expr2_0: u64 = 0; 4757 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4758 return Some(expr3_0); 4759 } 4760 if pattern0_0 == B8 { 4761 let pattern2_0 = arg1; 4762 // Rule at src/isa/s390x/inst.isle line 2357. 4763 let expr0_0: Type = B8; 4764 let expr1_0: i16 = -1; 4765 let expr2_0: u64 = 0; 4766 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4767 return Some(expr3_0); 4768 } 4769 if pattern0_0 == B16 { 4770 let pattern2_0 = arg1; 4771 // Rule at src/isa/s390x/inst.isle line 2358. 4772 let expr0_0: Type = B16; 4773 let expr1_0: i16 = -1; 4774 let expr2_0: u64 = 0; 4775 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4776 return Some(expr3_0); 4777 } 4778 if pattern0_0 == B32 { 4779 let pattern2_0 = arg1; 4780 // Rule at src/isa/s390x/inst.isle line 2359. 4781 let expr0_0: Type = B32; 4782 let expr1_0: i16 = -1; 4783 let expr2_0: u64 = 0; 4784 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4785 return Some(expr3_0); 4786 } 4787 if pattern0_0 == B64 { 4788 let pattern2_0 = arg1; 4789 // Rule at src/isa/s390x/inst.isle line 2360. 4790 let expr0_0: Type = B64; 4791 let expr1_0: i16 = -1; 4792 let expr2_0: u64 = 0; 4793 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4794 return Some(expr3_0); 4795 } 4796 return None; 4797 } 4798 4799 // Generated as internal constructor for term cond_br_bool. 4800 pub fn constructor_cond_br_bool<C: Context>( 4801 ctx: &mut C, 4802 arg0: &ProducesBool, 4803 arg1: MachLabel, 4804 arg2: MachLabel, 4805 ) -> Option<SideEffectNoResult> { 4806 let pattern0_0 = arg0; 4807 if let &ProducesBool::ProducesBool { 4808 producer: ref pattern1_0, 4809 cond: ref pattern1_1, 4810 } = pattern0_0 4811 { 4812 let pattern2_0 = arg1; 4813 let pattern3_0 = arg2; 4814 // Rule at src/isa/s390x/inst.isle line 2364. 4815 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4816 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4817 return Some(expr1_0); 4818 } 4819 return None; 4820 } 4821 4822 // Generated as internal constructor for term oneway_cond_br_bool. 4823 pub fn constructor_oneway_cond_br_bool<C: Context>( 4824 ctx: &mut C, 4825 arg0: &ProducesBool, 4826 arg1: MachLabel, 4827 ) -> Option<SideEffectNoResult> { 4828 let pattern0_0 = arg0; 4829 if let &ProducesBool::ProducesBool { 4830 producer: ref pattern1_0, 4831 cond: ref pattern1_1, 4832 } = pattern0_0 4833 { 4834 let pattern2_0 = arg1; 4835 // Rule at src/isa/s390x/inst.isle line 2370. 4836 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4837 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4838 return Some(expr1_0); 4839 } 4840 return None; 4841 } 4842 4843 // Generated as internal constructor for term trap_if_bool. 4844 pub fn constructor_trap_if_bool<C: Context>( 4845 ctx: &mut C, 4846 arg0: &ProducesBool, 4847 arg1: &TrapCode, 4848 ) -> Option<SideEffectNoResult> { 4849 let pattern0_0 = arg0; 4850 if let &ProducesBool::ProducesBool { 4851 producer: ref pattern1_0, 4852 cond: ref pattern1_1, 4853 } = pattern0_0 4854 { 4855 let pattern2_0 = arg1; 4856 // Rule at src/isa/s390x/inst.isle line 2376. 4857 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4858 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4859 return Some(expr1_0); 4860 } 4861 return None; 4862 } 4863 4864 // Generated as internal constructor for term casloop_val_reg. 4865 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4866 // Rule at src/isa/s390x/inst.isle line 2390. 4867 let expr0_0: u8 = 0; 4868 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4869 return Some(expr1_0); 4870 } 4871 4872 // Generated as internal constructor for term casloop_tmp_reg. 4873 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4874 // Rule at src/isa/s390x/inst.isle line 2394. 4875 let expr0_0: u8 = 1; 4876 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4877 return Some(expr1_0); 4878 } 4879 4880 // Generated as internal constructor for term casloop_emit. 4881 pub fn constructor_casloop_emit<C: Context>( 4882 ctx: &mut C, 4883 arg0: &VecMInstBuilder, 4884 arg1: Type, 4885 arg2: MemFlags, 4886 arg3: Reg, 4887 arg4: Reg, 4888 ) -> Option<Reg> { 4889 let pattern0_0 = arg0; 4890 let pattern1_0 = arg1; 4891 let pattern2_0 = arg2; 4892 let pattern3_0 = arg3; 4893 let pattern4_0 = arg4; 4894 // Rule at src/isa/s390x/inst.isle line 2403. 4895 let expr0_0: i64 = 0; 4896 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4897 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4898 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4899 let expr4_0 = 4900 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4901 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4902 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4903 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4904 let expr8_0 = IntCC::NotEqual; 4905 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4906 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4907 return Some(expr4_0); 4908 } 4909 4910 // Generated as internal constructor for term casloop_result. 4911 pub fn constructor_casloop_result<C: Context>( 4912 ctx: &mut C, 4913 arg0: Type, 4914 arg1: MemFlags, 4915 arg2: Reg, 4916 ) -> Option<Reg> { 4917 let pattern0_0 = arg0; 4918 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4919 let pattern2_0 = arg1; 4920 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4921 let pattern4_0 = arg2; 4922 // Rule at src/isa/s390x/inst.isle line 2421. 4923 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4924 return Some(expr0_0); 4925 } 4926 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4927 let pattern4_0 = arg2; 4928 // Rule at src/isa/s390x/inst.isle line 2419. 4929 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4930 return Some(expr0_0); 4931 } 4932 } 4933 return None; 4934 } 4935 4936 // Generated as internal constructor for term casloop. 4937 pub fn constructor_casloop<C: Context>( 4938 ctx: &mut C, 4939 arg0: &VecMInstBuilder, 4940 arg1: Type, 4941 arg2: MemFlags, 4942 arg3: Reg, 4943 arg4: Reg, 4944 ) -> Option<Reg> { 4945 let pattern0_0 = arg0; 4946 let pattern1_0 = arg1; 4947 let pattern2_0 = arg2; 4948 let pattern3_0 = arg3; 4949 let pattern4_0 = arg4; 4950 // Rule at src/isa/s390x/inst.isle line 2426. 4951 let expr0_0 = constructor_casloop_emit( 4952 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4953 )?; 4954 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4955 return Some(expr1_0); 4956 } 4957 4958 // Generated as internal constructor for term casloop_bitshift. 4959 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4960 let pattern0_0 = arg0; 4961 // Rule at src/isa/s390x/inst.isle line 2441. 4962 let expr0_0: Type = I32; 4963 let expr1_0: u8 = 3; 4964 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4965 return Some(expr2_0); 4966 } 4967 4968 // Generated as internal constructor for term casloop_aligned_addr. 4969 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4970 let pattern0_0 = arg0; 4971 // Rule at src/isa/s390x/inst.isle line 2446. 4972 let expr0_0: Type = I64; 4973 let expr1_0: u16 = 65532; 4974 let expr2_0: u8 = 0; 4975 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4976 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4977 return Some(expr4_0); 4978 } 4979 4980 // Generated as internal constructor for term casloop_rotate_in. 4981 pub fn constructor_casloop_rotate_in<C: Context>( 4982 ctx: &mut C, 4983 arg0: &VecMInstBuilder, 4984 arg1: Type, 4985 arg2: MemFlags, 4986 arg3: Reg, 4987 arg4: Reg, 4988 ) -> Option<Reg> { 4989 let pattern0_0 = arg0; 4990 let pattern1_0 = arg1; 4991 if pattern1_0 == I8 { 4992 let pattern3_0 = arg2; 4993 let pattern4_0 = arg3; 4994 let pattern5_0 = arg4; 4995 // Rule at src/isa/s390x/inst.isle line 2456. 4996 let expr0_0: Type = I32; 4997 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4998 let expr2_0: u8 = 0; 4999 let expr3_0 = constructor_push_rot_imm_reg( 5000 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 5001 )?; 5002 return Some(expr3_0); 5003 } 5004 if pattern1_0 == I16 { 5005 let pattern3_0 = arg2; 5006 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5007 let pattern5_0 = arg3; 5008 let pattern6_0 = arg4; 5009 // Rule at src/isa/s390x/inst.isle line 2460. 5010 let expr0_0: Type = I32; 5011 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5012 let expr2_0: u8 = 16; 5013 let expr3_0 = constructor_push_rot_imm_reg( 5014 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5015 )?; 5016 return Some(expr3_0); 5017 } 5018 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5019 let pattern5_0 = arg3; 5020 let pattern6_0 = arg4; 5021 // Rule at src/isa/s390x/inst.isle line 2458. 5022 let expr0_0: Type = I32; 5023 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5024 let expr2_0: u8 = 0; 5025 let expr3_0 = constructor_push_rot_imm_reg( 5026 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5027 )?; 5028 return Some(expr3_0); 5029 } 5030 } 5031 return None; 5032 } 5033 5034 // Generated as internal constructor for term casloop_rotate_out. 5035 pub fn constructor_casloop_rotate_out<C: Context>( 5036 ctx: &mut C, 5037 arg0: &VecMInstBuilder, 5038 arg1: Type, 5039 arg2: MemFlags, 5040 arg3: Reg, 5041 arg4: Reg, 5042 ) -> Option<Reg> { 5043 let pattern0_0 = arg0; 5044 let pattern1_0 = arg1; 5045 if pattern1_0 == I8 { 5046 let pattern3_0 = arg2; 5047 let pattern4_0 = arg3; 5048 let pattern5_0 = arg4; 5049 // Rule at src/isa/s390x/inst.isle line 2469. 5050 let expr0_0: Type = I32; 5051 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5052 let expr2_0: u8 = 0; 5053 let expr3_0: Type = I32; 5054 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 5055 let expr5_0 = constructor_push_rot_imm_reg( 5056 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 5057 )?; 5058 return Some(expr5_0); 5059 } 5060 if pattern1_0 == I16 { 5061 let pattern3_0 = arg2; 5062 if let Some(()) = C::littleendian(ctx, pattern3_0) { 5063 let pattern5_0 = arg3; 5064 let pattern6_0 = arg4; 5065 // Rule at src/isa/s390x/inst.isle line 2473. 5066 let expr0_0: Type = I32; 5067 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5068 let expr2_0: u8 = 16; 5069 let expr3_0 = constructor_push_rot_imm_reg( 5070 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5071 )?; 5072 return Some(expr3_0); 5073 } 5074 if let Some(()) = C::bigendian(ctx, pattern3_0) { 5075 let pattern5_0 = arg3; 5076 let pattern6_0 = arg4; 5077 // Rule at src/isa/s390x/inst.isle line 2471. 5078 let expr0_0: Type = I32; 5079 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 5080 let expr2_0: u8 = 0; 5081 let expr3_0 = constructor_push_rot_imm_reg( 5082 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 5083 )?; 5084 return Some(expr3_0); 5085 } 5086 } 5087 return None; 5088 } 5089 5090 // Generated as internal constructor for term casloop_rotate_result. 5091 pub fn constructor_casloop_rotate_result<C: Context>( 5092 ctx: &mut C, 5093 arg0: Type, 5094 arg1: MemFlags, 5095 arg2: Reg, 5096 arg3: Reg, 5097 ) -> Option<Reg> { 5098 let pattern0_0 = arg0; 5099 if pattern0_0 == I8 { 5100 let pattern2_0 = arg1; 5101 let pattern3_0 = arg2; 5102 let pattern4_0 = arg3; 5103 // Rule at src/isa/s390x/inst.isle line 2484. 5104 let expr0_0: Type = I32; 5105 let expr1_0: u8 = 8; 5106 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5107 return Some(expr2_0); 5108 } 5109 if pattern0_0 == I16 { 5110 let pattern2_0 = arg1; 5111 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5112 let pattern4_0 = arg2; 5113 let pattern5_0 = arg3; 5114 // Rule at src/isa/s390x/inst.isle line 2488. 5115 let expr0_0: Type = I32; 5116 let expr1_0: Type = I32; 5117 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5118 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5119 return Some(expr3_0); 5120 } 5121 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5122 let pattern4_0 = arg2; 5123 let pattern5_0 = arg3; 5124 // Rule at src/isa/s390x/inst.isle line 2486. 5125 let expr0_0: Type = I32; 5126 let expr1_0: u8 = 16; 5127 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5128 return Some(expr2_0); 5129 } 5130 } 5131 return None; 5132 } 5133 5134 // Generated as internal constructor for term casloop_subword. 5135 pub fn constructor_casloop_subword<C: Context>( 5136 ctx: &mut C, 5137 arg0: &VecMInstBuilder, 5138 arg1: Type, 5139 arg2: MemFlags, 5140 arg3: Reg, 5141 arg4: Reg, 5142 arg5: Reg, 5143 ) -> Option<Reg> { 5144 let pattern0_0 = arg0; 5145 let pattern1_0 = arg1; 5146 let pattern2_0 = arg2; 5147 let pattern3_0 = arg3; 5148 let pattern4_0 = arg4; 5149 let pattern5_0 = arg5; 5150 // Rule at src/isa/s390x/inst.isle line 2493. 5151 let expr0_0 = constructor_casloop_emit( 5152 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5153 )?; 5154 let expr1_0 = 5155 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5156 return Some(expr1_0); 5157 } 5158 5159 // Generated as internal constructor for term clz_reg. 5160 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5161 let pattern0_0 = arg0; 5162 if pattern0_0 == 64 { 5163 let pattern2_0 = arg1; 5164 // Rule at src/isa/s390x/inst.isle line 2504. 5165 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5166 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5167 let expr2_0 = C::emit(ctx, &expr1_0); 5168 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5169 return Some(expr3_0); 5170 } 5171 let pattern1_0 = arg1; 5172 // Rule at src/isa/s390x/inst.isle line 2513. 5173 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5174 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5175 let expr2_0 = C::emit(ctx, &expr1_0); 5176 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5177 let expr4_0 = IntCC::Equal; 5178 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5179 let expr6_0 = MInst::CMov64SImm16 { 5180 rd: expr3_0, 5181 cond: expr5_0, 5182 imm: pattern0_0, 5183 }; 5184 let expr7_0 = C::emit(ctx, &expr6_0); 5185 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5186 return Some(expr8_0); 5187 } 5188 5189 // Generated as internal constructor for term aluop_add. 5190 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5191 let pattern0_0 = arg0; 5192 if pattern0_0 == I8 { 5193 // Rule at src/isa/s390x/inst.isle line 2524. 5194 let expr0_0 = ALUOp::Add32; 5195 return Some(expr0_0); 5196 } 5197 if pattern0_0 == I16 { 5198 // Rule at src/isa/s390x/inst.isle line 2525. 5199 let expr0_0 = ALUOp::Add32; 5200 return Some(expr0_0); 5201 } 5202 if pattern0_0 == I32 { 5203 // Rule at src/isa/s390x/inst.isle line 2526. 5204 let expr0_0 = ALUOp::Add32; 5205 return Some(expr0_0); 5206 } 5207 if pattern0_0 == I64 { 5208 // Rule at src/isa/s390x/inst.isle line 2527. 5209 let expr0_0 = ALUOp::Add64; 5210 return Some(expr0_0); 5211 } 5212 return None; 5213 } 5214 5215 // Generated as internal constructor for term aluop_add_sext16. 5216 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5217 let pattern0_0 = arg0; 5218 if pattern0_0 == I16 { 5219 // Rule at src/isa/s390x/inst.isle line 2530. 5220 let expr0_0 = ALUOp::Add32Ext16; 5221 return Some(expr0_0); 5222 } 5223 if pattern0_0 == I32 { 5224 // Rule at src/isa/s390x/inst.isle line 2531. 5225 let expr0_0 = ALUOp::Add32Ext16; 5226 return Some(expr0_0); 5227 } 5228 if pattern0_0 == I64 { 5229 // Rule at src/isa/s390x/inst.isle line 2532. 5230 let expr0_0 = ALUOp::Add64Ext16; 5231 return Some(expr0_0); 5232 } 5233 return None; 5234 } 5235 5236 // Generated as internal constructor for term aluop_add_sext32. 5237 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5238 let pattern0_0 = arg0; 5239 if pattern0_0 == I64 { 5240 // Rule at src/isa/s390x/inst.isle line 2535. 5241 let expr0_0 = ALUOp::Add64Ext32; 5242 return Some(expr0_0); 5243 } 5244 return None; 5245 } 5246 5247 // Generated as internal constructor for term add_reg. 5248 pub fn constructor_add_reg<C: Context>( 5249 ctx: &mut C, 5250 arg0: Type, 5251 arg1: Reg, 5252 arg2: Reg, 5253 ) -> Option<Reg> { 5254 let pattern0_0 = arg0; 5255 let pattern1_0 = arg1; 5256 let pattern2_0 = arg2; 5257 // Rule at src/isa/s390x/inst.isle line 2538. 5258 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5259 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5260 return Some(expr1_0); 5261 } 5262 5263 // Generated as internal constructor for term add_reg_sext32. 5264 pub fn constructor_add_reg_sext32<C: Context>( 5265 ctx: &mut C, 5266 arg0: Type, 5267 arg1: Reg, 5268 arg2: Reg, 5269 ) -> Option<Reg> { 5270 let pattern0_0 = arg0; 5271 let pattern1_0 = arg1; 5272 let pattern2_0 = arg2; 5273 // Rule at src/isa/s390x/inst.isle line 2541. 5274 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5275 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5276 return Some(expr1_0); 5277 } 5278 5279 // Generated as internal constructor for term add_simm16. 5280 pub fn constructor_add_simm16<C: Context>( 5281 ctx: &mut C, 5282 arg0: Type, 5283 arg1: Reg, 5284 arg2: i16, 5285 ) -> Option<Reg> { 5286 let pattern0_0 = arg0; 5287 let pattern1_0 = arg1; 5288 let pattern2_0 = arg2; 5289 // Rule at src/isa/s390x/inst.isle line 2544. 5290 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5291 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5292 return Some(expr1_0); 5293 } 5294 5295 // Generated as internal constructor for term add_simm32. 5296 pub fn constructor_add_simm32<C: Context>( 5297 ctx: &mut C, 5298 arg0: Type, 5299 arg1: Reg, 5300 arg2: i32, 5301 ) -> Option<Reg> { 5302 let pattern0_0 = arg0; 5303 let pattern1_0 = arg1; 5304 let pattern2_0 = arg2; 5305 // Rule at src/isa/s390x/inst.isle line 2547. 5306 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5307 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5308 return Some(expr1_0); 5309 } 5310 5311 // Generated as internal constructor for term add_mem. 5312 pub fn constructor_add_mem<C: Context>( 5313 ctx: &mut C, 5314 arg0: Type, 5315 arg1: Reg, 5316 arg2: &MemArg, 5317 ) -> Option<Reg> { 5318 let pattern0_0 = arg0; 5319 let pattern1_0 = arg1; 5320 let pattern2_0 = arg2; 5321 // Rule at src/isa/s390x/inst.isle line 2550. 5322 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5323 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5324 return Some(expr1_0); 5325 } 5326 5327 // Generated as internal constructor for term add_mem_sext16. 5328 pub fn constructor_add_mem_sext16<C: Context>( 5329 ctx: &mut C, 5330 arg0: Type, 5331 arg1: Reg, 5332 arg2: &MemArg, 5333 ) -> Option<Reg> { 5334 let pattern0_0 = arg0; 5335 let pattern1_0 = arg1; 5336 let pattern2_0 = arg2; 5337 // Rule at src/isa/s390x/inst.isle line 2553. 5338 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5339 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5340 return Some(expr1_0); 5341 } 5342 5343 // Generated as internal constructor for term add_mem_sext32. 5344 pub fn constructor_add_mem_sext32<C: Context>( 5345 ctx: &mut C, 5346 arg0: Type, 5347 arg1: Reg, 5348 arg2: &MemArg, 5349 ) -> Option<Reg> { 5350 let pattern0_0 = arg0; 5351 let pattern1_0 = arg1; 5352 let pattern2_0 = arg2; 5353 // Rule at src/isa/s390x/inst.isle line 2556. 5354 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5355 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5356 return Some(expr1_0); 5357 } 5358 5359 // Generated as internal constructor for term aluop_add_logical. 5360 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5361 let pattern0_0 = arg0; 5362 if pattern0_0 == I32 { 5363 // Rule at src/isa/s390x/inst.isle line 2562. 5364 let expr0_0 = ALUOp::AddLogical32; 5365 return Some(expr0_0); 5366 } 5367 if pattern0_0 == I64 { 5368 // Rule at src/isa/s390x/inst.isle line 2563. 5369 let expr0_0 = ALUOp::AddLogical64; 5370 return Some(expr0_0); 5371 } 5372 return None; 5373 } 5374 5375 // Generated as internal constructor for term aluop_add_logical_zext32. 5376 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5377 let pattern0_0 = arg0; 5378 if pattern0_0 == I64 { 5379 // Rule at src/isa/s390x/inst.isle line 2566. 5380 let expr0_0 = ALUOp::AddLogical64Ext32; 5381 return Some(expr0_0); 5382 } 5383 return None; 5384 } 5385 5386 // Generated as internal constructor for term add_logical_reg. 5387 pub fn constructor_add_logical_reg<C: Context>( 5388 ctx: &mut C, 5389 arg0: Type, 5390 arg1: Reg, 5391 arg2: Reg, 5392 ) -> Option<Reg> { 5393 let pattern0_0 = arg0; 5394 let pattern1_0 = arg1; 5395 let pattern2_0 = arg2; 5396 // Rule at src/isa/s390x/inst.isle line 2569. 5397 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5398 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5399 return Some(expr1_0); 5400 } 5401 5402 // Generated as internal constructor for term add_logical_reg_zext32. 5403 pub fn constructor_add_logical_reg_zext32<C: Context>( 5404 ctx: &mut C, 5405 arg0: Type, 5406 arg1: Reg, 5407 arg2: Reg, 5408 ) -> Option<Reg> { 5409 let pattern0_0 = arg0; 5410 let pattern1_0 = arg1; 5411 let pattern2_0 = arg2; 5412 // Rule at src/isa/s390x/inst.isle line 2572. 5413 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5414 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5415 return Some(expr1_0); 5416 } 5417 5418 // Generated as internal constructor for term add_logical_zimm32. 5419 pub fn constructor_add_logical_zimm32<C: Context>( 5420 ctx: &mut C, 5421 arg0: Type, 5422 arg1: Reg, 5423 arg2: u32, 5424 ) -> Option<Reg> { 5425 let pattern0_0 = arg0; 5426 let pattern1_0 = arg1; 5427 let pattern2_0 = arg2; 5428 // Rule at src/isa/s390x/inst.isle line 2575. 5429 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5430 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5431 return Some(expr1_0); 5432 } 5433 5434 // Generated as internal constructor for term add_logical_mem. 5435 pub fn constructor_add_logical_mem<C: Context>( 5436 ctx: &mut C, 5437 arg0: Type, 5438 arg1: Reg, 5439 arg2: &MemArg, 5440 ) -> Option<Reg> { 5441 let pattern0_0 = arg0; 5442 let pattern1_0 = arg1; 5443 let pattern2_0 = arg2; 5444 // Rule at src/isa/s390x/inst.isle line 2578. 5445 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5446 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5447 return Some(expr1_0); 5448 } 5449 5450 // Generated as internal constructor for term add_logical_mem_zext32. 5451 pub fn constructor_add_logical_mem_zext32<C: Context>( 5452 ctx: &mut C, 5453 arg0: Type, 5454 arg1: Reg, 5455 arg2: &MemArg, 5456 ) -> Option<Reg> { 5457 let pattern0_0 = arg0; 5458 let pattern1_0 = arg1; 5459 let pattern2_0 = arg2; 5460 // Rule at src/isa/s390x/inst.isle line 2581. 5461 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5462 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5463 return Some(expr1_0); 5464 } 5465 5466 // Generated as internal constructor for term aluop_sub. 5467 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5468 let pattern0_0 = arg0; 5469 if pattern0_0 == I8 { 5470 // Rule at src/isa/s390x/inst.isle line 2587. 5471 let expr0_0 = ALUOp::Sub32; 5472 return Some(expr0_0); 5473 } 5474 if pattern0_0 == I16 { 5475 // Rule at src/isa/s390x/inst.isle line 2588. 5476 let expr0_0 = ALUOp::Sub32; 5477 return Some(expr0_0); 5478 } 5479 if pattern0_0 == I32 { 5480 // Rule at src/isa/s390x/inst.isle line 2589. 5481 let expr0_0 = ALUOp::Sub32; 5482 return Some(expr0_0); 5483 } 5484 if pattern0_0 == I64 { 5485 // Rule at src/isa/s390x/inst.isle line 2590. 5486 let expr0_0 = ALUOp::Sub64; 5487 return Some(expr0_0); 5488 } 5489 return None; 5490 } 5491 5492 // Generated as internal constructor for term aluop_sub_sext16. 5493 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5494 let pattern0_0 = arg0; 5495 if pattern0_0 == I16 { 5496 // Rule at src/isa/s390x/inst.isle line 2593. 5497 let expr0_0 = ALUOp::Sub32Ext16; 5498 return Some(expr0_0); 5499 } 5500 if pattern0_0 == I32 { 5501 // Rule at src/isa/s390x/inst.isle line 2594. 5502 let expr0_0 = ALUOp::Sub32Ext16; 5503 return Some(expr0_0); 5504 } 5505 if pattern0_0 == I64 { 5506 // Rule at src/isa/s390x/inst.isle line 2595. 5507 let expr0_0 = ALUOp::Sub64Ext16; 5508 return Some(expr0_0); 5509 } 5510 return None; 5511 } 5512 5513 // Generated as internal constructor for term aluop_sub_sext32. 5514 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5515 let pattern0_0 = arg0; 5516 if pattern0_0 == I64 { 5517 // Rule at src/isa/s390x/inst.isle line 2598. 5518 let expr0_0 = ALUOp::Sub64Ext32; 5519 return Some(expr0_0); 5520 } 5521 return None; 5522 } 5523 5524 // Generated as internal constructor for term sub_reg. 5525 pub fn constructor_sub_reg<C: Context>( 5526 ctx: &mut C, 5527 arg0: Type, 5528 arg1: Reg, 5529 arg2: Reg, 5530 ) -> Option<Reg> { 5531 let pattern0_0 = arg0; 5532 let pattern1_0 = arg1; 5533 let pattern2_0 = arg2; 5534 // Rule at src/isa/s390x/inst.isle line 2601. 5535 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5536 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5537 return Some(expr1_0); 5538 } 5539 5540 // Generated as internal constructor for term sub_reg_sext32. 5541 pub fn constructor_sub_reg_sext32<C: Context>( 5542 ctx: &mut C, 5543 arg0: Type, 5544 arg1: Reg, 5545 arg2: Reg, 5546 ) -> Option<Reg> { 5547 let pattern0_0 = arg0; 5548 let pattern1_0 = arg1; 5549 let pattern2_0 = arg2; 5550 // Rule at src/isa/s390x/inst.isle line 2604. 5551 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5552 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5553 return Some(expr1_0); 5554 } 5555 5556 // Generated as internal constructor for term sub_mem. 5557 pub fn constructor_sub_mem<C: Context>( 5558 ctx: &mut C, 5559 arg0: Type, 5560 arg1: Reg, 5561 arg2: &MemArg, 5562 ) -> Option<Reg> { 5563 let pattern0_0 = arg0; 5564 let pattern1_0 = arg1; 5565 let pattern2_0 = arg2; 5566 // Rule at src/isa/s390x/inst.isle line 2607. 5567 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5568 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5569 return Some(expr1_0); 5570 } 5571 5572 // Generated as internal constructor for term sub_mem_sext16. 5573 pub fn constructor_sub_mem_sext16<C: Context>( 5574 ctx: &mut C, 5575 arg0: Type, 5576 arg1: Reg, 5577 arg2: &MemArg, 5578 ) -> Option<Reg> { 5579 let pattern0_0 = arg0; 5580 let pattern1_0 = arg1; 5581 let pattern2_0 = arg2; 5582 // Rule at src/isa/s390x/inst.isle line 2610. 5583 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5584 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5585 return Some(expr1_0); 5586 } 5587 5588 // Generated as internal constructor for term sub_mem_sext32. 5589 pub fn constructor_sub_mem_sext32<C: Context>( 5590 ctx: &mut C, 5591 arg0: Type, 5592 arg1: Reg, 5593 arg2: &MemArg, 5594 ) -> Option<Reg> { 5595 let pattern0_0 = arg0; 5596 let pattern1_0 = arg1; 5597 let pattern2_0 = arg2; 5598 // Rule at src/isa/s390x/inst.isle line 2613. 5599 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5600 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5601 return Some(expr1_0); 5602 } 5603 5604 // Generated as internal constructor for term aluop_sub_logical. 5605 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5606 let pattern0_0 = arg0; 5607 if pattern0_0 == I32 { 5608 // Rule at src/isa/s390x/inst.isle line 2619. 5609 let expr0_0 = ALUOp::SubLogical32; 5610 return Some(expr0_0); 5611 } 5612 if pattern0_0 == I64 { 5613 // Rule at src/isa/s390x/inst.isle line 2620. 5614 let expr0_0 = ALUOp::SubLogical64; 5615 return Some(expr0_0); 5616 } 5617 return None; 5618 } 5619 5620 // Generated as internal constructor for term aluop_sub_logical_zext32. 5621 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5622 let pattern0_0 = arg0; 5623 if pattern0_0 == I64 { 5624 // Rule at src/isa/s390x/inst.isle line 2623. 5625 let expr0_0 = ALUOp::SubLogical64Ext32; 5626 return Some(expr0_0); 5627 } 5628 return None; 5629 } 5630 5631 // Generated as internal constructor for term sub_logical_reg. 5632 pub fn constructor_sub_logical_reg<C: Context>( 5633 ctx: &mut C, 5634 arg0: Type, 5635 arg1: Reg, 5636 arg2: Reg, 5637 ) -> Option<Reg> { 5638 let pattern0_0 = arg0; 5639 let pattern1_0 = arg1; 5640 let pattern2_0 = arg2; 5641 // Rule at src/isa/s390x/inst.isle line 2626. 5642 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5643 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5644 return Some(expr1_0); 5645 } 5646 5647 // Generated as internal constructor for term sub_logical_reg_zext32. 5648 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5649 ctx: &mut C, 5650 arg0: Type, 5651 arg1: Reg, 5652 arg2: Reg, 5653 ) -> Option<Reg> { 5654 let pattern0_0 = arg0; 5655 let pattern1_0 = arg1; 5656 let pattern2_0 = arg2; 5657 // Rule at src/isa/s390x/inst.isle line 2629. 5658 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5659 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5660 return Some(expr1_0); 5661 } 5662 5663 // Generated as internal constructor for term sub_logical_zimm32. 5664 pub fn constructor_sub_logical_zimm32<C: Context>( 5665 ctx: &mut C, 5666 arg0: Type, 5667 arg1: Reg, 5668 arg2: u32, 5669 ) -> Option<Reg> { 5670 let pattern0_0 = arg0; 5671 let pattern1_0 = arg1; 5672 let pattern2_0 = arg2; 5673 // Rule at src/isa/s390x/inst.isle line 2632. 5674 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5675 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5676 return Some(expr1_0); 5677 } 5678 5679 // Generated as internal constructor for term sub_logical_mem. 5680 pub fn constructor_sub_logical_mem<C: Context>( 5681 ctx: &mut C, 5682 arg0: Type, 5683 arg1: Reg, 5684 arg2: &MemArg, 5685 ) -> Option<Reg> { 5686 let pattern0_0 = arg0; 5687 let pattern1_0 = arg1; 5688 let pattern2_0 = arg2; 5689 // Rule at src/isa/s390x/inst.isle line 2635. 5690 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5691 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5692 return Some(expr1_0); 5693 } 5694 5695 // Generated as internal constructor for term sub_logical_mem_zext32. 5696 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5697 ctx: &mut C, 5698 arg0: Type, 5699 arg1: Reg, 5700 arg2: &MemArg, 5701 ) -> Option<Reg> { 5702 let pattern0_0 = arg0; 5703 let pattern1_0 = arg1; 5704 let pattern2_0 = arg2; 5705 // Rule at src/isa/s390x/inst.isle line 2638. 5706 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5707 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5708 return Some(expr1_0); 5709 } 5710 5711 // Generated as internal constructor for term aluop_mul. 5712 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5713 let pattern0_0 = arg0; 5714 if pattern0_0 == I8 { 5715 // Rule at src/isa/s390x/inst.isle line 2644. 5716 let expr0_0 = ALUOp::Mul32; 5717 return Some(expr0_0); 5718 } 5719 if pattern0_0 == I16 { 5720 // Rule at src/isa/s390x/inst.isle line 2645. 5721 let expr0_0 = ALUOp::Mul32; 5722 return Some(expr0_0); 5723 } 5724 if pattern0_0 == I32 { 5725 // Rule at src/isa/s390x/inst.isle line 2646. 5726 let expr0_0 = ALUOp::Mul32; 5727 return Some(expr0_0); 5728 } 5729 if pattern0_0 == I64 { 5730 // Rule at src/isa/s390x/inst.isle line 2647. 5731 let expr0_0 = ALUOp::Mul64; 5732 return Some(expr0_0); 5733 } 5734 return None; 5735 } 5736 5737 // Generated as internal constructor for term aluop_mul_sext16. 5738 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5739 let pattern0_0 = arg0; 5740 if pattern0_0 == I16 { 5741 // Rule at src/isa/s390x/inst.isle line 2650. 5742 let expr0_0 = ALUOp::Mul32Ext16; 5743 return Some(expr0_0); 5744 } 5745 if pattern0_0 == I32 { 5746 // Rule at src/isa/s390x/inst.isle line 2651. 5747 let expr0_0 = ALUOp::Mul32Ext16; 5748 return Some(expr0_0); 5749 } 5750 if pattern0_0 == I64 { 5751 // Rule at src/isa/s390x/inst.isle line 2652. 5752 let expr0_0 = ALUOp::Mul64Ext16; 5753 return Some(expr0_0); 5754 } 5755 return None; 5756 } 5757 5758 // Generated as internal constructor for term aluop_mul_sext32. 5759 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5760 let pattern0_0 = arg0; 5761 if pattern0_0 == I64 { 5762 // Rule at src/isa/s390x/inst.isle line 2655. 5763 let expr0_0 = ALUOp::Mul64Ext32; 5764 return Some(expr0_0); 5765 } 5766 return None; 5767 } 5768 5769 // Generated as internal constructor for term mul_reg. 5770 pub fn constructor_mul_reg<C: Context>( 5771 ctx: &mut C, 5772 arg0: Type, 5773 arg1: Reg, 5774 arg2: Reg, 5775 ) -> Option<Reg> { 5776 let pattern0_0 = arg0; 5777 let pattern1_0 = arg1; 5778 let pattern2_0 = arg2; 5779 // Rule at src/isa/s390x/inst.isle line 2658. 5780 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5781 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5782 return Some(expr1_0); 5783 } 5784 5785 // Generated as internal constructor for term mul_reg_sext32. 5786 pub fn constructor_mul_reg_sext32<C: Context>( 5787 ctx: &mut C, 5788 arg0: Type, 5789 arg1: Reg, 5790 arg2: Reg, 5791 ) -> Option<Reg> { 5792 let pattern0_0 = arg0; 5793 let pattern1_0 = arg1; 5794 let pattern2_0 = arg2; 5795 // Rule at src/isa/s390x/inst.isle line 2661. 5796 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5797 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5798 return Some(expr1_0); 5799 } 5800 5801 // Generated as internal constructor for term mul_simm16. 5802 pub fn constructor_mul_simm16<C: Context>( 5803 ctx: &mut C, 5804 arg0: Type, 5805 arg1: Reg, 5806 arg2: i16, 5807 ) -> Option<Reg> { 5808 let pattern0_0 = arg0; 5809 let pattern1_0 = arg1; 5810 let pattern2_0 = arg2; 5811 // Rule at src/isa/s390x/inst.isle line 2664. 5812 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5813 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5814 return Some(expr1_0); 5815 } 5816 5817 // Generated as internal constructor for term mul_simm32. 5818 pub fn constructor_mul_simm32<C: Context>( 5819 ctx: &mut C, 5820 arg0: Type, 5821 arg1: Reg, 5822 arg2: i32, 5823 ) -> Option<Reg> { 5824 let pattern0_0 = arg0; 5825 let pattern1_0 = arg1; 5826 let pattern2_0 = arg2; 5827 // Rule at src/isa/s390x/inst.isle line 2667. 5828 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5829 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5830 return Some(expr1_0); 5831 } 5832 5833 // Generated as internal constructor for term mul_mem. 5834 pub fn constructor_mul_mem<C: Context>( 5835 ctx: &mut C, 5836 arg0: Type, 5837 arg1: Reg, 5838 arg2: &MemArg, 5839 ) -> Option<Reg> { 5840 let pattern0_0 = arg0; 5841 let pattern1_0 = arg1; 5842 let pattern2_0 = arg2; 5843 // Rule at src/isa/s390x/inst.isle line 2670. 5844 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5845 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5846 return Some(expr1_0); 5847 } 5848 5849 // Generated as internal constructor for term mul_mem_sext16. 5850 pub fn constructor_mul_mem_sext16<C: Context>( 5851 ctx: &mut C, 5852 arg0: Type, 5853 arg1: Reg, 5854 arg2: &MemArg, 5855 ) -> Option<Reg> { 5856 let pattern0_0 = arg0; 5857 let pattern1_0 = arg1; 5858 let pattern2_0 = arg2; 5859 // Rule at src/isa/s390x/inst.isle line 2673. 5860 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5861 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5862 return Some(expr1_0); 5863 } 5864 5865 // Generated as internal constructor for term mul_mem_sext32. 5866 pub fn constructor_mul_mem_sext32<C: Context>( 5867 ctx: &mut C, 5868 arg0: Type, 5869 arg1: Reg, 5870 arg2: &MemArg, 5871 ) -> Option<Reg> { 5872 let pattern0_0 = arg0; 5873 let pattern1_0 = arg1; 5874 let pattern2_0 = arg2; 5875 // Rule at src/isa/s390x/inst.isle line 2676. 5876 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5877 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5878 return Some(expr1_0); 5879 } 5880 5881 // Generated as internal constructor for term udivmod. 5882 pub fn constructor_udivmod<C: Context>( 5883 ctx: &mut C, 5884 arg0: Type, 5885 arg1: &RegPair, 5886 arg2: Reg, 5887 ) -> Option<RegPair> { 5888 let pattern0_0 = arg0; 5889 if pattern0_0 == I32 { 5890 let pattern2_0 = arg1; 5891 let pattern3_0 = arg2; 5892 // Rule at src/isa/s390x/inst.isle line 2682. 5893 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5894 return Some(expr0_0); 5895 } 5896 if pattern0_0 == I64 { 5897 let pattern2_0 = arg1; 5898 let pattern3_0 = arg2; 5899 // Rule at src/isa/s390x/inst.isle line 2683. 5900 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5901 return Some(expr0_0); 5902 } 5903 return None; 5904 } 5905 5906 // Generated as internal constructor for term sdivmod. 5907 pub fn constructor_sdivmod<C: Context>( 5908 ctx: &mut C, 5909 arg0: Type, 5910 arg1: &RegPair, 5911 arg2: Reg, 5912 ) -> Option<RegPair> { 5913 let pattern0_0 = arg0; 5914 if pattern0_0 == I32 { 5915 let pattern2_0 = arg1; 5916 let pattern3_0 = arg2; 5917 // Rule at src/isa/s390x/inst.isle line 2689. 5918 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5919 return Some(expr0_0); 5920 } 5921 if pattern0_0 == I64 { 5922 let pattern2_0 = arg1; 5923 let pattern3_0 = arg2; 5924 // Rule at src/isa/s390x/inst.isle line 2690. 5925 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5926 return Some(expr0_0); 5927 } 5928 return None; 5929 } 5930 5931 // Generated as internal constructor for term aluop_and. 5932 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5933 let pattern0_0 = arg0; 5934 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5935 // Rule at src/isa/s390x/inst.isle line 2696. 5936 let expr0_0 = ALUOp::And32; 5937 return Some(expr0_0); 5938 } 5939 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5940 // Rule at src/isa/s390x/inst.isle line 2697. 5941 let expr0_0 = ALUOp::And64; 5942 return Some(expr0_0); 5943 } 5944 return None; 5945 } 5946 5947 // Generated as internal constructor for term and_reg. 5948 pub fn constructor_and_reg<C: Context>( 5949 ctx: &mut C, 5950 arg0: Type, 5951 arg1: Reg, 5952 arg2: Reg, 5953 ) -> Option<Reg> { 5954 let pattern0_0 = arg0; 5955 let pattern1_0 = arg1; 5956 let pattern2_0 = arg2; 5957 // Rule at src/isa/s390x/inst.isle line 2700. 5958 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5959 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5960 return Some(expr1_0); 5961 } 5962 5963 // Generated as internal constructor for term and_uimm16shifted. 5964 pub fn constructor_and_uimm16shifted<C: Context>( 5965 ctx: &mut C, 5966 arg0: Type, 5967 arg1: Reg, 5968 arg2: UImm16Shifted, 5969 ) -> Option<Reg> { 5970 let pattern0_0 = arg0; 5971 let pattern1_0 = arg1; 5972 let pattern2_0 = arg2; 5973 // Rule at src/isa/s390x/inst.isle line 2703. 5974 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5975 let expr1_0 = 5976 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5977 return Some(expr1_0); 5978 } 5979 5980 // Generated as internal constructor for term and_uimm32shifted. 5981 pub fn constructor_and_uimm32shifted<C: Context>( 5982 ctx: &mut C, 5983 arg0: Type, 5984 arg1: Reg, 5985 arg2: UImm32Shifted, 5986 ) -> Option<Reg> { 5987 let pattern0_0 = arg0; 5988 let pattern1_0 = arg1; 5989 let pattern2_0 = arg2; 5990 // Rule at src/isa/s390x/inst.isle line 2706. 5991 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5992 let expr1_0 = 5993 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5994 return Some(expr1_0); 5995 } 5996 5997 // Generated as internal constructor for term and_mem. 5998 pub fn constructor_and_mem<C: Context>( 5999 ctx: &mut C, 6000 arg0: Type, 6001 arg1: Reg, 6002 arg2: &MemArg, 6003 ) -> Option<Reg> { 6004 let pattern0_0 = arg0; 6005 let pattern1_0 = arg1; 6006 let pattern2_0 = arg2; 6007 // Rule at src/isa/s390x/inst.isle line 2709. 6008 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 6009 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6010 return Some(expr1_0); 6011 } 6012 6013 // Generated as internal constructor for term aluop_or. 6014 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6015 let pattern0_0 = arg0; 6016 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6017 // Rule at src/isa/s390x/inst.isle line 2715. 6018 let expr0_0 = ALUOp::Orr32; 6019 return Some(expr0_0); 6020 } 6021 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6022 // Rule at src/isa/s390x/inst.isle line 2716. 6023 let expr0_0 = ALUOp::Orr64; 6024 return Some(expr0_0); 6025 } 6026 return None; 6027 } 6028 6029 // Generated as internal constructor for term or_reg. 6030 pub fn constructor_or_reg<C: Context>( 6031 ctx: &mut C, 6032 arg0: Type, 6033 arg1: Reg, 6034 arg2: Reg, 6035 ) -> Option<Reg> { 6036 let pattern0_0 = arg0; 6037 let pattern1_0 = arg1; 6038 let pattern2_0 = arg2; 6039 // Rule at src/isa/s390x/inst.isle line 2719. 6040 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6041 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6042 return Some(expr1_0); 6043 } 6044 6045 // Generated as internal constructor for term or_uimm16shifted. 6046 pub fn constructor_or_uimm16shifted<C: Context>( 6047 ctx: &mut C, 6048 arg0: Type, 6049 arg1: Reg, 6050 arg2: UImm16Shifted, 6051 ) -> Option<Reg> { 6052 let pattern0_0 = arg0; 6053 let pattern1_0 = arg1; 6054 let pattern2_0 = arg2; 6055 // Rule at src/isa/s390x/inst.isle line 2722. 6056 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6057 let expr1_0 = 6058 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6059 return Some(expr1_0); 6060 } 6061 6062 // Generated as internal constructor for term or_uimm32shifted. 6063 pub fn constructor_or_uimm32shifted<C: Context>( 6064 ctx: &mut C, 6065 arg0: Type, 6066 arg1: Reg, 6067 arg2: UImm32Shifted, 6068 ) -> Option<Reg> { 6069 let pattern0_0 = arg0; 6070 let pattern1_0 = arg1; 6071 let pattern2_0 = arg2; 6072 // Rule at src/isa/s390x/inst.isle line 2725. 6073 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6074 let expr1_0 = 6075 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6076 return Some(expr1_0); 6077 } 6078 6079 // Generated as internal constructor for term or_mem. 6080 pub fn constructor_or_mem<C: Context>( 6081 ctx: &mut C, 6082 arg0: Type, 6083 arg1: Reg, 6084 arg2: &MemArg, 6085 ) -> Option<Reg> { 6086 let pattern0_0 = arg0; 6087 let pattern1_0 = arg1; 6088 let pattern2_0 = arg2; 6089 // Rule at src/isa/s390x/inst.isle line 2728. 6090 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6091 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6092 return Some(expr1_0); 6093 } 6094 6095 // Generated as internal constructor for term aluop_xor. 6096 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6097 let pattern0_0 = arg0; 6098 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6099 // Rule at src/isa/s390x/inst.isle line 2734. 6100 let expr0_0 = ALUOp::Xor32; 6101 return Some(expr0_0); 6102 } 6103 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6104 // Rule at src/isa/s390x/inst.isle line 2735. 6105 let expr0_0 = ALUOp::Xor64; 6106 return Some(expr0_0); 6107 } 6108 return None; 6109 } 6110 6111 // Generated as internal constructor for term xor_reg. 6112 pub fn constructor_xor_reg<C: Context>( 6113 ctx: &mut C, 6114 arg0: Type, 6115 arg1: Reg, 6116 arg2: Reg, 6117 ) -> Option<Reg> { 6118 let pattern0_0 = arg0; 6119 let pattern1_0 = arg1; 6120 let pattern2_0 = arg2; 6121 // Rule at src/isa/s390x/inst.isle line 2738. 6122 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6123 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6124 return Some(expr1_0); 6125 } 6126 6127 // Generated as internal constructor for term xor_uimm32shifted. 6128 pub fn constructor_xor_uimm32shifted<C: Context>( 6129 ctx: &mut C, 6130 arg0: Type, 6131 arg1: Reg, 6132 arg2: UImm32Shifted, 6133 ) -> Option<Reg> { 6134 let pattern0_0 = arg0; 6135 let pattern1_0 = arg1; 6136 let pattern2_0 = arg2; 6137 // Rule at src/isa/s390x/inst.isle line 2741. 6138 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6139 let expr1_0 = 6140 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6141 return Some(expr1_0); 6142 } 6143 6144 // Generated as internal constructor for term xor_mem. 6145 pub fn constructor_xor_mem<C: Context>( 6146 ctx: &mut C, 6147 arg0: Type, 6148 arg1: Reg, 6149 arg2: &MemArg, 6150 ) -> Option<Reg> { 6151 let pattern0_0 = arg0; 6152 let pattern1_0 = arg1; 6153 let pattern2_0 = arg2; 6154 // Rule at src/isa/s390x/inst.isle line 2744. 6155 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6156 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6157 return Some(expr1_0); 6158 } 6159 6160 // Generated as internal constructor for term push_xor_uimm32shifted. 6161 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6162 ctx: &mut C, 6163 arg0: &VecMInstBuilder, 6164 arg1: Type, 6165 arg2: WritableReg, 6166 arg3: Reg, 6167 arg4: UImm32Shifted, 6168 ) -> Option<Reg> { 6169 let pattern0_0 = arg0; 6170 let pattern1_0 = arg1; 6171 let pattern2_0 = arg2; 6172 let pattern3_0 = arg3; 6173 let pattern4_0 = arg4; 6174 // Rule at src/isa/s390x/inst.isle line 2747. 6175 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6176 let expr1_0 = constructor_push_alu_uimm32shifted( 6177 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6178 )?; 6179 return Some(expr1_0); 6180 } 6181 6182 // Generated as internal constructor for term not_reg. 6183 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6184 let pattern0_0 = arg0; 6185 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6186 let pattern2_0 = arg1; 6187 // Rule at src/isa/s390x/inst.isle line 2753. 6188 let expr0_0: u32 = 4294967295; 6189 let expr1_0: u8 = 0; 6190 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6191 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6192 return Some(expr3_0); 6193 } 6194 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6195 let pattern2_0 = arg1; 6196 // Rule at src/isa/s390x/inst.isle line 2755. 6197 let expr0_0: u32 = 4294967295; 6198 let expr1_0: u8 = 0; 6199 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6200 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6201 let expr4_0: u32 = 4294967295; 6202 let expr5_0: u8 = 32; 6203 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6204 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6205 return Some(expr7_0); 6206 } 6207 return None; 6208 } 6209 6210 // Generated as internal constructor for term push_not_reg. 6211 pub fn constructor_push_not_reg<C: Context>( 6212 ctx: &mut C, 6213 arg0: &VecMInstBuilder, 6214 arg1: Type, 6215 arg2: WritableReg, 6216 arg3: Reg, 6217 ) -> Option<Reg> { 6218 let pattern0_0 = arg0; 6219 let pattern1_0 = arg1; 6220 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6221 let pattern3_0 = arg2; 6222 let pattern4_0 = arg3; 6223 // Rule at src/isa/s390x/inst.isle line 2761. 6224 let expr0_0: u32 = 4294967295; 6225 let expr1_0: u8 = 0; 6226 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6227 let expr3_0 = constructor_push_xor_uimm32shifted( 6228 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6229 )?; 6230 return Some(expr3_0); 6231 } 6232 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6233 let pattern3_0 = arg2; 6234 let pattern4_0 = arg3; 6235 // Rule at src/isa/s390x/inst.isle line 2763. 6236 let expr0_0: u32 = 4294967295; 6237 let expr1_0: u8 = 0; 6238 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6239 let expr3_0 = constructor_push_xor_uimm32shifted( 6240 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6241 )?; 6242 let expr4_0: u32 = 4294967295; 6243 let expr5_0: u8 = 32; 6244 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6245 let expr7_0 = constructor_push_xor_uimm32shifted( 6246 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6247 )?; 6248 return Some(expr7_0); 6249 } 6250 return None; 6251 } 6252 6253 // Generated as internal constructor for term aluop_and_not. 6254 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6255 let pattern0_0 = arg0; 6256 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6257 // Rule at src/isa/s390x/inst.isle line 2771. 6258 let expr0_0 = ALUOp::AndNot32; 6259 return Some(expr0_0); 6260 } 6261 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6262 // Rule at src/isa/s390x/inst.isle line 2772. 6263 let expr0_0 = ALUOp::AndNot64; 6264 return Some(expr0_0); 6265 } 6266 return None; 6267 } 6268 6269 // Generated as internal constructor for term and_not_reg. 6270 pub fn constructor_and_not_reg<C: Context>( 6271 ctx: &mut C, 6272 arg0: Type, 6273 arg1: Reg, 6274 arg2: Reg, 6275 ) -> Option<Reg> { 6276 let pattern0_0 = arg0; 6277 let pattern1_0 = arg1; 6278 let pattern2_0 = arg2; 6279 // Rule at src/isa/s390x/inst.isle line 2775. 6280 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6281 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6282 return Some(expr1_0); 6283 } 6284 6285 // Generated as internal constructor for term aluop_or_not. 6286 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6287 let pattern0_0 = arg0; 6288 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6289 // Rule at src/isa/s390x/inst.isle line 2781. 6290 let expr0_0 = ALUOp::OrrNot32; 6291 return Some(expr0_0); 6292 } 6293 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6294 // Rule at src/isa/s390x/inst.isle line 2782. 6295 let expr0_0 = ALUOp::OrrNot64; 6296 return Some(expr0_0); 6297 } 6298 return None; 6299 } 6300 6301 // Generated as internal constructor for term or_not_reg. 6302 pub fn constructor_or_not_reg<C: Context>( 6303 ctx: &mut C, 6304 arg0: Type, 6305 arg1: Reg, 6306 arg2: Reg, 6307 ) -> Option<Reg> { 6308 let pattern0_0 = arg0; 6309 let pattern1_0 = arg1; 6310 let pattern2_0 = arg2; 6311 // Rule at src/isa/s390x/inst.isle line 2785. 6312 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6313 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6314 return Some(expr1_0); 6315 } 6316 6317 // Generated as internal constructor for term aluop_xor_not. 6318 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6319 let pattern0_0 = arg0; 6320 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6321 // Rule at src/isa/s390x/inst.isle line 2791. 6322 let expr0_0 = ALUOp::XorNot32; 6323 return Some(expr0_0); 6324 } 6325 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6326 // Rule at src/isa/s390x/inst.isle line 2792. 6327 let expr0_0 = ALUOp::XorNot64; 6328 return Some(expr0_0); 6329 } 6330 return None; 6331 } 6332 6333 // Generated as internal constructor for term xor_not_reg. 6334 pub fn constructor_xor_not_reg<C: Context>( 6335 ctx: &mut C, 6336 arg0: Type, 6337 arg1: Reg, 6338 arg2: Reg, 6339 ) -> Option<Reg> { 6340 let pattern0_0 = arg0; 6341 let pattern1_0 = arg1; 6342 let pattern2_0 = arg2; 6343 // Rule at src/isa/s390x/inst.isle line 2795. 6344 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6345 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6346 return Some(expr1_0); 6347 } 6348 6349 // Generated as internal constructor for term unaryop_abs. 6350 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6351 let pattern0_0 = arg0; 6352 if pattern0_0 == I32 { 6353 // Rule at src/isa/s390x/inst.isle line 2801. 6354 let expr0_0 = UnaryOp::Abs32; 6355 return Some(expr0_0); 6356 } 6357 if pattern0_0 == I64 { 6358 // Rule at src/isa/s390x/inst.isle line 2802. 6359 let expr0_0 = UnaryOp::Abs64; 6360 return Some(expr0_0); 6361 } 6362 return None; 6363 } 6364 6365 // Generated as internal constructor for term unaryop_abs_sext32. 6366 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6367 let pattern0_0 = arg0; 6368 if pattern0_0 == I64 { 6369 // Rule at src/isa/s390x/inst.isle line 2805. 6370 let expr0_0 = UnaryOp::Abs64Ext32; 6371 return Some(expr0_0); 6372 } 6373 return None; 6374 } 6375 6376 // Generated as internal constructor for term abs_reg. 6377 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6378 let pattern0_0 = arg0; 6379 let pattern1_0 = arg1; 6380 // Rule at src/isa/s390x/inst.isle line 2808. 6381 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6382 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6383 return Some(expr1_0); 6384 } 6385 6386 // Generated as internal constructor for term abs_reg_sext32. 6387 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6388 let pattern0_0 = arg0; 6389 let pattern1_0 = arg1; 6390 // Rule at src/isa/s390x/inst.isle line 2811. 6391 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6392 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6393 return Some(expr1_0); 6394 } 6395 6396 // Generated as internal constructor for term unaryop_neg. 6397 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6398 let pattern0_0 = arg0; 6399 if pattern0_0 == I8 { 6400 // Rule at src/isa/s390x/inst.isle line 2817. 6401 let expr0_0 = UnaryOp::Neg32; 6402 return Some(expr0_0); 6403 } 6404 if pattern0_0 == I16 { 6405 // Rule at src/isa/s390x/inst.isle line 2818. 6406 let expr0_0 = UnaryOp::Neg32; 6407 return Some(expr0_0); 6408 } 6409 if pattern0_0 == I32 { 6410 // Rule at src/isa/s390x/inst.isle line 2819. 6411 let expr0_0 = UnaryOp::Neg32; 6412 return Some(expr0_0); 6413 } 6414 if pattern0_0 == I64 { 6415 // Rule at src/isa/s390x/inst.isle line 2820. 6416 let expr0_0 = UnaryOp::Neg64; 6417 return Some(expr0_0); 6418 } 6419 return None; 6420 } 6421 6422 // Generated as internal constructor for term unaryop_neg_sext32. 6423 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6424 let pattern0_0 = arg0; 6425 if pattern0_0 == I64 { 6426 // Rule at src/isa/s390x/inst.isle line 2823. 6427 let expr0_0 = UnaryOp::Neg64Ext32; 6428 return Some(expr0_0); 6429 } 6430 return None; 6431 } 6432 6433 // Generated as internal constructor for term neg_reg. 6434 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6435 let pattern0_0 = arg0; 6436 let pattern1_0 = arg1; 6437 // Rule at src/isa/s390x/inst.isle line 2826. 6438 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6439 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6440 return Some(expr1_0); 6441 } 6442 6443 // Generated as internal constructor for term neg_reg_sext32. 6444 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6445 let pattern0_0 = arg0; 6446 let pattern1_0 = arg1; 6447 // Rule at src/isa/s390x/inst.isle line 2829. 6448 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6449 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6450 return Some(expr1_0); 6451 } 6452 6453 // Generated as internal constructor for term unaryop_bswap. 6454 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6455 let pattern0_0 = arg0; 6456 if pattern0_0 == I32 { 6457 // Rule at src/isa/s390x/inst.isle line 2835. 6458 let expr0_0 = UnaryOp::BSwap32; 6459 return Some(expr0_0); 6460 } 6461 if pattern0_0 == I64 { 6462 // Rule at src/isa/s390x/inst.isle line 2836. 6463 let expr0_0 = UnaryOp::BSwap64; 6464 return Some(expr0_0); 6465 } 6466 return None; 6467 } 6468 6469 // Generated as internal constructor for term bswap_reg. 6470 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6471 let pattern0_0 = arg0; 6472 let pattern1_0 = arg1; 6473 // Rule at src/isa/s390x/inst.isle line 2839. 6474 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6475 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6476 return Some(expr1_0); 6477 } 6478 6479 // Generated as internal constructor for term push_bswap_reg. 6480 pub fn constructor_push_bswap_reg<C: Context>( 6481 ctx: &mut C, 6482 arg0: &VecMInstBuilder, 6483 arg1: Type, 6484 arg2: WritableReg, 6485 arg3: Reg, 6486 ) -> Option<Reg> { 6487 let pattern0_0 = arg0; 6488 let pattern1_0 = arg1; 6489 let pattern2_0 = arg2; 6490 let pattern3_0 = arg3; 6491 // Rule at src/isa/s390x/inst.isle line 2842. 6492 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6493 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6494 return Some(expr1_0); 6495 } 6496 6497 // Generated as internal constructor for term shiftop_rot. 6498 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6499 let pattern0_0 = arg0; 6500 if pattern0_0 == I32 { 6501 // Rule at src/isa/s390x/inst.isle line 2848. 6502 let expr0_0 = ShiftOp::RotL32; 6503 return Some(expr0_0); 6504 } 6505 if pattern0_0 == I64 { 6506 // Rule at src/isa/s390x/inst.isle line 2849. 6507 let expr0_0 = ShiftOp::RotL64; 6508 return Some(expr0_0); 6509 } 6510 return None; 6511 } 6512 6513 // Generated as internal constructor for term rot_reg. 6514 pub fn constructor_rot_reg<C: Context>( 6515 ctx: &mut C, 6516 arg0: Type, 6517 arg1: Reg, 6518 arg2: Reg, 6519 ) -> Option<Reg> { 6520 let pattern0_0 = arg0; 6521 let pattern1_0 = arg1; 6522 let pattern2_0 = arg2; 6523 // Rule at src/isa/s390x/inst.isle line 2852. 6524 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6525 let expr1_0: u8 = 0; 6526 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6527 return Some(expr2_0); 6528 } 6529 6530 // Generated as internal constructor for term rot_imm. 6531 pub fn constructor_rot_imm<C: Context>( 6532 ctx: &mut C, 6533 arg0: Type, 6534 arg1: Reg, 6535 arg2: u8, 6536 ) -> Option<Reg> { 6537 let pattern0_0 = arg0; 6538 let pattern1_0 = arg1; 6539 let pattern2_0 = arg2; 6540 // Rule at src/isa/s390x/inst.isle line 2856. 6541 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6542 let expr1_0 = C::zero_reg(ctx); 6543 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6544 return Some(expr2_0); 6545 } 6546 6547 // Generated as internal constructor for term rot_imm_reg. 6548 pub fn constructor_rot_imm_reg<C: Context>( 6549 ctx: &mut C, 6550 arg0: Type, 6551 arg1: Reg, 6552 arg2: u8, 6553 arg3: Reg, 6554 ) -> Option<Reg> { 6555 let pattern0_0 = arg0; 6556 let pattern1_0 = arg1; 6557 let pattern2_0 = arg2; 6558 let pattern3_0 = arg3; 6559 // Rule at src/isa/s390x/inst.isle line 2860. 6560 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6561 let expr1_0 = constructor_shift_rr( 6562 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6563 )?; 6564 return Some(expr1_0); 6565 } 6566 6567 // Generated as internal constructor for term push_rot_imm_reg. 6568 pub fn constructor_push_rot_imm_reg<C: Context>( 6569 ctx: &mut C, 6570 arg0: &VecMInstBuilder, 6571 arg1: Type, 6572 arg2: WritableReg, 6573 arg3: Reg, 6574 arg4: u8, 6575 arg5: Reg, 6576 ) -> Option<Reg> { 6577 let pattern0_0 = arg0; 6578 let pattern1_0 = arg1; 6579 let pattern2_0 = arg2; 6580 let pattern3_0 = arg3; 6581 let pattern4_0 = arg4; 6582 let pattern5_0 = arg5; 6583 // Rule at src/isa/s390x/inst.isle line 2864. 6584 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6585 let expr1_0 = constructor_push_shift( 6586 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6587 )?; 6588 return Some(expr1_0); 6589 } 6590 6591 // Generated as internal constructor for term shiftop_lshl. 6592 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6593 let pattern0_0 = arg0; 6594 if pattern0_0 == I8 { 6595 // Rule at src/isa/s390x/inst.isle line 2871. 6596 let expr0_0 = ShiftOp::LShL32; 6597 return Some(expr0_0); 6598 } 6599 if pattern0_0 == I16 { 6600 // Rule at src/isa/s390x/inst.isle line 2872. 6601 let expr0_0 = ShiftOp::LShL32; 6602 return Some(expr0_0); 6603 } 6604 if pattern0_0 == I32 { 6605 // Rule at src/isa/s390x/inst.isle line 2873. 6606 let expr0_0 = ShiftOp::LShL32; 6607 return Some(expr0_0); 6608 } 6609 if pattern0_0 == I64 { 6610 // Rule at src/isa/s390x/inst.isle line 2874. 6611 let expr0_0 = ShiftOp::LShL64; 6612 return Some(expr0_0); 6613 } 6614 return None; 6615 } 6616 6617 // Generated as internal constructor for term lshl_reg. 6618 pub fn constructor_lshl_reg<C: Context>( 6619 ctx: &mut C, 6620 arg0: Type, 6621 arg1: Reg, 6622 arg2: Reg, 6623 ) -> Option<Reg> { 6624 let pattern0_0 = arg0; 6625 let pattern1_0 = arg1; 6626 let pattern2_0 = arg2; 6627 // Rule at src/isa/s390x/inst.isle line 2877. 6628 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6629 let expr1_0: u8 = 0; 6630 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6631 return Some(expr2_0); 6632 } 6633 6634 // Generated as internal constructor for term lshl_imm. 6635 pub fn constructor_lshl_imm<C: Context>( 6636 ctx: &mut C, 6637 arg0: Type, 6638 arg1: Reg, 6639 arg2: u8, 6640 ) -> Option<Reg> { 6641 let pattern0_0 = arg0; 6642 let pattern1_0 = arg1; 6643 let pattern2_0 = arg2; 6644 // Rule at src/isa/s390x/inst.isle line 2881. 6645 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6646 let expr1_0 = C::zero_reg(ctx); 6647 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6648 return Some(expr2_0); 6649 } 6650 6651 // Generated as internal constructor for term shiftop_lshr. 6652 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6653 let pattern0_0 = arg0; 6654 if pattern0_0 == I32 { 6655 // Rule at src/isa/s390x/inst.isle line 2888. 6656 let expr0_0 = ShiftOp::LShR32; 6657 return Some(expr0_0); 6658 } 6659 if pattern0_0 == I64 { 6660 // Rule at src/isa/s390x/inst.isle line 2889. 6661 let expr0_0 = ShiftOp::LShR64; 6662 return Some(expr0_0); 6663 } 6664 return None; 6665 } 6666 6667 // Generated as internal constructor for term lshr_reg. 6668 pub fn constructor_lshr_reg<C: Context>( 6669 ctx: &mut C, 6670 arg0: Type, 6671 arg1: Reg, 6672 arg2: Reg, 6673 ) -> Option<Reg> { 6674 let pattern0_0 = arg0; 6675 let pattern1_0 = arg1; 6676 let pattern2_0 = arg2; 6677 // Rule at src/isa/s390x/inst.isle line 2892. 6678 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6679 let expr1_0: u8 = 0; 6680 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6681 return Some(expr2_0); 6682 } 6683 6684 // Generated as internal constructor for term lshr_imm. 6685 pub fn constructor_lshr_imm<C: Context>( 6686 ctx: &mut C, 6687 arg0: Type, 6688 arg1: Reg, 6689 arg2: u8, 6690 ) -> Option<Reg> { 6691 let pattern0_0 = arg0; 6692 let pattern1_0 = arg1; 6693 let pattern2_0 = arg2; 6694 // Rule at src/isa/s390x/inst.isle line 2896. 6695 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6696 let expr1_0 = C::zero_reg(ctx); 6697 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6698 return Some(expr2_0); 6699 } 6700 6701 // Generated as internal constructor for term shiftop_ashr. 6702 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6703 let pattern0_0 = arg0; 6704 if pattern0_0 == I32 { 6705 // Rule at src/isa/s390x/inst.isle line 2903. 6706 let expr0_0 = ShiftOp::AShR32; 6707 return Some(expr0_0); 6708 } 6709 if pattern0_0 == I64 { 6710 // Rule at src/isa/s390x/inst.isle line 2904. 6711 let expr0_0 = ShiftOp::AShR64; 6712 return Some(expr0_0); 6713 } 6714 return None; 6715 } 6716 6717 // Generated as internal constructor for term ashr_reg. 6718 pub fn constructor_ashr_reg<C: Context>( 6719 ctx: &mut C, 6720 arg0: Type, 6721 arg1: Reg, 6722 arg2: Reg, 6723 ) -> Option<Reg> { 6724 let pattern0_0 = arg0; 6725 let pattern1_0 = arg1; 6726 let pattern2_0 = arg2; 6727 // Rule at src/isa/s390x/inst.isle line 2907. 6728 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6729 let expr1_0: u8 = 0; 6730 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6731 return Some(expr2_0); 6732 } 6733 6734 // Generated as internal constructor for term ashr_imm. 6735 pub fn constructor_ashr_imm<C: Context>( 6736 ctx: &mut C, 6737 arg0: Type, 6738 arg1: Reg, 6739 arg2: u8, 6740 ) -> Option<Reg> { 6741 let pattern0_0 = arg0; 6742 let pattern1_0 = arg1; 6743 let pattern2_0 = arg2; 6744 // Rule at src/isa/s390x/inst.isle line 2911. 6745 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6746 let expr1_0 = C::zero_reg(ctx); 6747 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6748 return Some(expr2_0); 6749 } 6750 6751 // Generated as internal constructor for term popcnt_byte. 6752 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6753 let pattern0_0 = arg0; 6754 // Rule at src/isa/s390x/inst.isle line 2918. 6755 let expr0_0: Type = I64; 6756 let expr1_0 = UnaryOp::PopcntByte; 6757 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6758 return Some(expr2_0); 6759 } 6760 6761 // Generated as internal constructor for term popcnt_reg. 6762 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6763 let pattern0_0 = arg0; 6764 // Rule at src/isa/s390x/inst.isle line 2921. 6765 let expr0_0: Type = I64; 6766 let expr1_0 = UnaryOp::PopcntReg; 6767 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6768 return Some(expr2_0); 6769 } 6770 6771 // Generated as internal constructor for term atomic_rmw_and. 6772 pub fn constructor_atomic_rmw_and<C: Context>( 6773 ctx: &mut C, 6774 arg0: Type, 6775 arg1: Reg, 6776 arg2: &MemArg, 6777 ) -> Option<Reg> { 6778 let pattern0_0 = arg0; 6779 if pattern0_0 == I32 { 6780 let pattern2_0 = arg1; 6781 let pattern3_0 = arg2; 6782 // Rule at src/isa/s390x/inst.isle line 2927. 6783 let expr0_0: Type = I32; 6784 let expr1_0 = ALUOp::And32; 6785 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6786 return Some(expr2_0); 6787 } 6788 if pattern0_0 == I64 { 6789 let pattern2_0 = arg1; 6790 let pattern3_0 = arg2; 6791 // Rule at src/isa/s390x/inst.isle line 2928. 6792 let expr0_0: Type = I64; 6793 let expr1_0 = ALUOp::And64; 6794 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6795 return Some(expr2_0); 6796 } 6797 return None; 6798 } 6799 6800 // Generated as internal constructor for term atomic_rmw_or. 6801 pub fn constructor_atomic_rmw_or<C: Context>( 6802 ctx: &mut C, 6803 arg0: Type, 6804 arg1: Reg, 6805 arg2: &MemArg, 6806 ) -> Option<Reg> { 6807 let pattern0_0 = arg0; 6808 if pattern0_0 == I32 { 6809 let pattern2_0 = arg1; 6810 let pattern3_0 = arg2; 6811 // Rule at src/isa/s390x/inst.isle line 2931. 6812 let expr0_0: Type = I32; 6813 let expr1_0 = ALUOp::Orr32; 6814 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6815 return Some(expr2_0); 6816 } 6817 if pattern0_0 == I64 { 6818 let pattern2_0 = arg1; 6819 let pattern3_0 = arg2; 6820 // Rule at src/isa/s390x/inst.isle line 2932. 6821 let expr0_0: Type = I64; 6822 let expr1_0 = ALUOp::Orr64; 6823 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6824 return Some(expr2_0); 6825 } 6826 return None; 6827 } 6828 6829 // Generated as internal constructor for term atomic_rmw_xor. 6830 pub fn constructor_atomic_rmw_xor<C: Context>( 6831 ctx: &mut C, 6832 arg0: Type, 6833 arg1: Reg, 6834 arg2: &MemArg, 6835 ) -> Option<Reg> { 6836 let pattern0_0 = arg0; 6837 if pattern0_0 == I32 { 6838 let pattern2_0 = arg1; 6839 let pattern3_0 = arg2; 6840 // Rule at src/isa/s390x/inst.isle line 2935. 6841 let expr0_0: Type = I32; 6842 let expr1_0 = ALUOp::Xor32; 6843 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6844 return Some(expr2_0); 6845 } 6846 if pattern0_0 == I64 { 6847 let pattern2_0 = arg1; 6848 let pattern3_0 = arg2; 6849 // Rule at src/isa/s390x/inst.isle line 2936. 6850 let expr0_0: Type = I64; 6851 let expr1_0 = ALUOp::Xor64; 6852 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6853 return Some(expr2_0); 6854 } 6855 return None; 6856 } 6857 6858 // Generated as internal constructor for term atomic_rmw_add. 6859 pub fn constructor_atomic_rmw_add<C: Context>( 6860 ctx: &mut C, 6861 arg0: Type, 6862 arg1: Reg, 6863 arg2: &MemArg, 6864 ) -> Option<Reg> { 6865 let pattern0_0 = arg0; 6866 if pattern0_0 == I32 { 6867 let pattern2_0 = arg1; 6868 let pattern3_0 = arg2; 6869 // Rule at src/isa/s390x/inst.isle line 2939. 6870 let expr0_0: Type = I32; 6871 let expr1_0 = ALUOp::Add32; 6872 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6873 return Some(expr2_0); 6874 } 6875 if pattern0_0 == I64 { 6876 let pattern2_0 = arg1; 6877 let pattern3_0 = arg2; 6878 // Rule at src/isa/s390x/inst.isle line 2940. 6879 let expr0_0: Type = I64; 6880 let expr1_0 = ALUOp::Add64; 6881 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6882 return Some(expr2_0); 6883 } 6884 return None; 6885 } 6886 6887 // Generated as internal constructor for term atomic_cas_impl. 6888 pub fn constructor_atomic_cas_impl<C: Context>( 6889 ctx: &mut C, 6890 arg0: Type, 6891 arg1: Reg, 6892 arg2: Reg, 6893 arg3: &MemArg, 6894 ) -> Option<Reg> { 6895 let pattern0_0 = arg0; 6896 if pattern0_0 == I32 { 6897 let pattern2_0 = arg1; 6898 let pattern3_0 = arg2; 6899 let pattern4_0 = arg3; 6900 // Rule at src/isa/s390x/inst.isle line 2946. 6901 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6902 return Some(expr0_0); 6903 } 6904 if pattern0_0 == I64 { 6905 let pattern2_0 = arg1; 6906 let pattern3_0 = arg2; 6907 let pattern4_0 = arg3; 6908 // Rule at src/isa/s390x/inst.isle line 2947. 6909 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6910 return Some(expr0_0); 6911 } 6912 return None; 6913 } 6914 6915 // Generated as internal constructor for term push_atomic_cas. 6916 pub fn constructor_push_atomic_cas<C: Context>( 6917 ctx: &mut C, 6918 arg0: &VecMInstBuilder, 6919 arg1: Type, 6920 arg2: WritableReg, 6921 arg3: Reg, 6922 arg4: &MemArg, 6923 ) -> Option<Reg> { 6924 let pattern0_0 = arg0; 6925 let pattern1_0 = arg1; 6926 if pattern1_0 == I32 { 6927 let pattern3_0 = arg2; 6928 let pattern4_0 = arg3; 6929 let pattern5_0 = arg4; 6930 // Rule at src/isa/s390x/inst.isle line 2950. 6931 let expr0_0 = 6932 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6933 return Some(expr0_0); 6934 } 6935 if pattern1_0 == I64 { 6936 let pattern3_0 = arg2; 6937 let pattern4_0 = arg3; 6938 let pattern5_0 = arg4; 6939 // Rule at src/isa/s390x/inst.isle line 2951. 6940 let expr0_0 = 6941 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6942 return Some(expr0_0); 6943 } 6944 return None; 6945 } 6946 6947 // Generated as internal constructor for term fpuop2_add. 6948 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6949 let pattern0_0 = arg0; 6950 if pattern0_0 == F32 { 6951 // Rule at src/isa/s390x/inst.isle line 2957. 6952 let expr0_0 = FPUOp2::Add32; 6953 return Some(expr0_0); 6954 } 6955 if pattern0_0 == F64 { 6956 // Rule at src/isa/s390x/inst.isle line 2958. 6957 let expr0_0 = FPUOp2::Add64; 6958 return Some(expr0_0); 6959 } 6960 return None; 6961 } 6962 6963 // Generated as internal constructor for term fadd_reg. 6964 pub fn constructor_fadd_reg<C: Context>( 6965 ctx: &mut C, 6966 arg0: Type, 6967 arg1: Reg, 6968 arg2: Reg, 6969 ) -> Option<Reg> { 6970 let pattern0_0 = arg0; 6971 let pattern1_0 = arg1; 6972 let pattern2_0 = arg2; 6973 // Rule at src/isa/s390x/inst.isle line 2961. 6974 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6975 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6976 return Some(expr1_0); 6977 } 6978 6979 // Generated as internal constructor for term fpuop2_sub. 6980 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6981 let pattern0_0 = arg0; 6982 if pattern0_0 == F32 { 6983 // Rule at src/isa/s390x/inst.isle line 2967. 6984 let expr0_0 = FPUOp2::Sub32; 6985 return Some(expr0_0); 6986 } 6987 if pattern0_0 == F64 { 6988 // Rule at src/isa/s390x/inst.isle line 2968. 6989 let expr0_0 = FPUOp2::Sub64; 6990 return Some(expr0_0); 6991 } 6992 return None; 6993 } 6994 6995 // Generated as internal constructor for term fsub_reg. 6996 pub fn constructor_fsub_reg<C: Context>( 6997 ctx: &mut C, 6998 arg0: Type, 6999 arg1: Reg, 7000 arg2: Reg, 7001 ) -> Option<Reg> { 7002 let pattern0_0 = arg0; 7003 let pattern1_0 = arg1; 7004 let pattern2_0 = arg2; 7005 // Rule at src/isa/s390x/inst.isle line 2971. 7006 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 7007 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7008 return Some(expr1_0); 7009 } 7010 7011 // Generated as internal constructor for term fpuop2_mul. 7012 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7013 let pattern0_0 = arg0; 7014 if pattern0_0 == F32 { 7015 // Rule at src/isa/s390x/inst.isle line 2977. 7016 let expr0_0 = FPUOp2::Mul32; 7017 return Some(expr0_0); 7018 } 7019 if pattern0_0 == F64 { 7020 // Rule at src/isa/s390x/inst.isle line 2978. 7021 let expr0_0 = FPUOp2::Mul64; 7022 return Some(expr0_0); 7023 } 7024 return None; 7025 } 7026 7027 // Generated as internal constructor for term fmul_reg. 7028 pub fn constructor_fmul_reg<C: Context>( 7029 ctx: &mut C, 7030 arg0: Type, 7031 arg1: Reg, 7032 arg2: Reg, 7033 ) -> Option<Reg> { 7034 let pattern0_0 = arg0; 7035 let pattern1_0 = arg1; 7036 let pattern2_0 = arg2; 7037 // Rule at src/isa/s390x/inst.isle line 2981. 7038 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 7039 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7040 return Some(expr1_0); 7041 } 7042 7043 // Generated as internal constructor for term fpuop2_div. 7044 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7045 let pattern0_0 = arg0; 7046 if pattern0_0 == F32 { 7047 // Rule at src/isa/s390x/inst.isle line 2987. 7048 let expr0_0 = FPUOp2::Div32; 7049 return Some(expr0_0); 7050 } 7051 if pattern0_0 == F64 { 7052 // Rule at src/isa/s390x/inst.isle line 2988. 7053 let expr0_0 = FPUOp2::Div64; 7054 return Some(expr0_0); 7055 } 7056 return None; 7057 } 7058 7059 // Generated as internal constructor for term fdiv_reg. 7060 pub fn constructor_fdiv_reg<C: Context>( 7061 ctx: &mut C, 7062 arg0: Type, 7063 arg1: Reg, 7064 arg2: Reg, 7065 ) -> Option<Reg> { 7066 let pattern0_0 = arg0; 7067 let pattern1_0 = arg1; 7068 let pattern2_0 = arg2; 7069 // Rule at src/isa/s390x/inst.isle line 2991. 7070 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 7071 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7072 return Some(expr1_0); 7073 } 7074 7075 // Generated as internal constructor for term fpuop2_min. 7076 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7077 let pattern0_0 = arg0; 7078 if pattern0_0 == F32 { 7079 // Rule at src/isa/s390x/inst.isle line 2997. 7080 let expr0_0 = FPUOp2::Min32; 7081 return Some(expr0_0); 7082 } 7083 if pattern0_0 == F64 { 7084 // Rule at src/isa/s390x/inst.isle line 2998. 7085 let expr0_0 = FPUOp2::Min64; 7086 return Some(expr0_0); 7087 } 7088 return None; 7089 } 7090 7091 // Generated as internal constructor for term fmin_reg. 7092 pub fn constructor_fmin_reg<C: Context>( 7093 ctx: &mut C, 7094 arg0: Type, 7095 arg1: Reg, 7096 arg2: Reg, 7097 ) -> Option<Reg> { 7098 let pattern0_0 = arg0; 7099 let pattern1_0 = arg1; 7100 let pattern2_0 = arg2; 7101 // Rule at src/isa/s390x/inst.isle line 3001. 7102 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7103 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7104 return Some(expr1_0); 7105 } 7106 7107 // Generated as internal constructor for term fpuop2_max. 7108 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7109 let pattern0_0 = arg0; 7110 if pattern0_0 == F32 { 7111 // Rule at src/isa/s390x/inst.isle line 3007. 7112 let expr0_0 = FPUOp2::Max32; 7113 return Some(expr0_0); 7114 } 7115 if pattern0_0 == F64 { 7116 // Rule at src/isa/s390x/inst.isle line 3008. 7117 let expr0_0 = FPUOp2::Max64; 7118 return Some(expr0_0); 7119 } 7120 return None; 7121 } 7122 7123 // Generated as internal constructor for term fmax_reg. 7124 pub fn constructor_fmax_reg<C: Context>( 7125 ctx: &mut C, 7126 arg0: Type, 7127 arg1: Reg, 7128 arg2: Reg, 7129 ) -> Option<Reg> { 7130 let pattern0_0 = arg0; 7131 let pattern1_0 = arg1; 7132 let pattern2_0 = arg2; 7133 // Rule at src/isa/s390x/inst.isle line 3011. 7134 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7135 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7136 return Some(expr1_0); 7137 } 7138 7139 // Generated as internal constructor for term fpuop3_fma. 7140 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7141 let pattern0_0 = arg0; 7142 if pattern0_0 == F32 { 7143 // Rule at src/isa/s390x/inst.isle line 3017. 7144 let expr0_0 = FPUOp3::MAdd32; 7145 return Some(expr0_0); 7146 } 7147 if pattern0_0 == F64 { 7148 // Rule at src/isa/s390x/inst.isle line 3018. 7149 let expr0_0 = FPUOp3::MAdd64; 7150 return Some(expr0_0); 7151 } 7152 return None; 7153 } 7154 7155 // Generated as internal constructor for term fma_reg. 7156 pub fn constructor_fma_reg<C: Context>( 7157 ctx: &mut C, 7158 arg0: Type, 7159 arg1: Reg, 7160 arg2: Reg, 7161 arg3: Reg, 7162 ) -> Option<Reg> { 7163 let pattern0_0 = arg0; 7164 let pattern1_0 = arg1; 7165 let pattern2_0 = arg2; 7166 let pattern3_0 = arg3; 7167 // Rule at src/isa/s390x/inst.isle line 3021. 7168 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7169 let expr1_0 = constructor_fpu_rrrr( 7170 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7171 )?; 7172 return Some(expr1_0); 7173 } 7174 7175 // Generated as internal constructor for term fpuop1_sqrt. 7176 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7177 let pattern0_0 = arg0; 7178 if pattern0_0 == F32 { 7179 // Rule at src/isa/s390x/inst.isle line 3027. 7180 let expr0_0 = FPUOp1::Sqrt32; 7181 return Some(expr0_0); 7182 } 7183 if pattern0_0 == F64 { 7184 // Rule at src/isa/s390x/inst.isle line 3028. 7185 let expr0_0 = FPUOp1::Sqrt64; 7186 return Some(expr0_0); 7187 } 7188 return None; 7189 } 7190 7191 // Generated as internal constructor for term sqrt_reg. 7192 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7193 let pattern0_0 = arg0; 7194 let pattern1_0 = arg1; 7195 // Rule at src/isa/s390x/inst.isle line 3031. 7196 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7197 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7198 return Some(expr1_0); 7199 } 7200 7201 // Generated as internal constructor for term fpuop1_neg. 7202 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7203 let pattern0_0 = arg0; 7204 if pattern0_0 == F32 { 7205 // Rule at src/isa/s390x/inst.isle line 3037. 7206 let expr0_0 = FPUOp1::Neg32; 7207 return Some(expr0_0); 7208 } 7209 if pattern0_0 == F64 { 7210 // Rule at src/isa/s390x/inst.isle line 3038. 7211 let expr0_0 = FPUOp1::Neg64; 7212 return Some(expr0_0); 7213 } 7214 return None; 7215 } 7216 7217 // Generated as internal constructor for term fneg_reg. 7218 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7219 let pattern0_0 = arg0; 7220 let pattern1_0 = arg1; 7221 // Rule at src/isa/s390x/inst.isle line 3041. 7222 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7223 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7224 return Some(expr1_0); 7225 } 7226 7227 // Generated as internal constructor for term fpuop1_abs. 7228 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7229 let pattern0_0 = arg0; 7230 if pattern0_0 == F32 { 7231 // Rule at src/isa/s390x/inst.isle line 3047. 7232 let expr0_0 = FPUOp1::Abs32; 7233 return Some(expr0_0); 7234 } 7235 if pattern0_0 == F64 { 7236 // Rule at src/isa/s390x/inst.isle line 3048. 7237 let expr0_0 = FPUOp1::Abs64; 7238 return Some(expr0_0); 7239 } 7240 return None; 7241 } 7242 7243 // Generated as internal constructor for term fabs_reg. 7244 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7245 let pattern0_0 = arg0; 7246 let pattern1_0 = arg1; 7247 // Rule at src/isa/s390x/inst.isle line 3051. 7248 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7249 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7250 return Some(expr1_0); 7251 } 7252 7253 // Generated as internal constructor for term fpuroundmode_ceil. 7254 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7255 let pattern0_0 = arg0; 7256 if pattern0_0 == F32 { 7257 // Rule at src/isa/s390x/inst.isle line 3057. 7258 let expr0_0 = FpuRoundMode::Plus32; 7259 return Some(expr0_0); 7260 } 7261 if pattern0_0 == F64 { 7262 // Rule at src/isa/s390x/inst.isle line 3058. 7263 let expr0_0 = FpuRoundMode::Plus64; 7264 return Some(expr0_0); 7265 } 7266 return None; 7267 } 7268 7269 // Generated as internal constructor for term ceil_reg. 7270 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7271 let pattern0_0 = arg0; 7272 let pattern1_0 = arg1; 7273 // Rule at src/isa/s390x/inst.isle line 3061. 7274 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7275 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7276 return Some(expr1_0); 7277 } 7278 7279 // Generated as internal constructor for term fpuroundmode_floor. 7280 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7281 let pattern0_0 = arg0; 7282 if pattern0_0 == F32 { 7283 // Rule at src/isa/s390x/inst.isle line 3067. 7284 let expr0_0 = FpuRoundMode::Minus32; 7285 return Some(expr0_0); 7286 } 7287 if pattern0_0 == F64 { 7288 // Rule at src/isa/s390x/inst.isle line 3068. 7289 let expr0_0 = FpuRoundMode::Minus64; 7290 return Some(expr0_0); 7291 } 7292 return None; 7293 } 7294 7295 // Generated as internal constructor for term floor_reg. 7296 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7297 let pattern0_0 = arg0; 7298 let pattern1_0 = arg1; 7299 // Rule at src/isa/s390x/inst.isle line 3071. 7300 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7301 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7302 return Some(expr1_0); 7303 } 7304 7305 // Generated as internal constructor for term fpuroundmode_trunc. 7306 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7307 let pattern0_0 = arg0; 7308 if pattern0_0 == F32 { 7309 // Rule at src/isa/s390x/inst.isle line 3077. 7310 let expr0_0 = FpuRoundMode::Zero32; 7311 return Some(expr0_0); 7312 } 7313 if pattern0_0 == F64 { 7314 // Rule at src/isa/s390x/inst.isle line 3078. 7315 let expr0_0 = FpuRoundMode::Zero64; 7316 return Some(expr0_0); 7317 } 7318 return None; 7319 } 7320 7321 // Generated as internal constructor for term trunc_reg. 7322 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7323 let pattern0_0 = arg0; 7324 let pattern1_0 = arg1; 7325 // Rule at src/isa/s390x/inst.isle line 3081. 7326 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7327 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7328 return Some(expr1_0); 7329 } 7330 7331 // Generated as internal constructor for term fpuroundmode_nearest. 7332 pub fn constructor_fpuroundmode_nearest<C: Context>( 7333 ctx: &mut C, 7334 arg0: Type, 7335 ) -> Option<FpuRoundMode> { 7336 let pattern0_0 = arg0; 7337 if pattern0_0 == F32 { 7338 // Rule at src/isa/s390x/inst.isle line 3087. 7339 let expr0_0 = FpuRoundMode::Nearest32; 7340 return Some(expr0_0); 7341 } 7342 if pattern0_0 == F64 { 7343 // Rule at src/isa/s390x/inst.isle line 3088. 7344 let expr0_0 = FpuRoundMode::Nearest64; 7345 return Some(expr0_0); 7346 } 7347 return None; 7348 } 7349 7350 // Generated as internal constructor for term nearest_reg. 7351 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7352 let pattern0_0 = arg0; 7353 let pattern1_0 = arg1; 7354 // Rule at src/isa/s390x/inst.isle line 3091. 7355 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7356 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7357 return Some(expr1_0); 7358 } 7359 7360 // Generated as internal constructor for term fpuop1_promote. 7361 pub fn constructor_fpuop1_promote<C: Context>( 7362 ctx: &mut C, 7363 arg0: Type, 7364 arg1: Type, 7365 ) -> Option<FPUOp1> { 7366 let pattern0_0 = arg0; 7367 if pattern0_0 == F64 { 7368 let pattern2_0 = arg1; 7369 if pattern2_0 == F32 { 7370 // Rule at src/isa/s390x/inst.isle line 3097. 7371 let expr0_0 = FPUOp1::Cvt32To64; 7372 return Some(expr0_0); 7373 } 7374 } 7375 return None; 7376 } 7377 7378 // Generated as internal constructor for term fpromote_reg. 7379 pub fn constructor_fpromote_reg<C: Context>( 7380 ctx: &mut C, 7381 arg0: Type, 7382 arg1: Type, 7383 arg2: Reg, 7384 ) -> Option<Reg> { 7385 let pattern0_0 = arg0; 7386 let pattern1_0 = arg1; 7387 let pattern2_0 = arg2; 7388 // Rule at src/isa/s390x/inst.isle line 3100. 7389 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7390 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7391 return Some(expr1_0); 7392 } 7393 7394 // Generated as internal constructor for term fpuop1_demote. 7395 pub fn constructor_fpuop1_demote<C: Context>( 7396 ctx: &mut C, 7397 arg0: Type, 7398 arg1: Type, 7399 ) -> Option<FPUOp1> { 7400 let pattern0_0 = arg0; 7401 if pattern0_0 == F32 { 7402 let pattern2_0 = arg1; 7403 if pattern2_0 == F64 { 7404 // Rule at src/isa/s390x/inst.isle line 3107. 7405 let expr0_0 = FPUOp1::Cvt64To32; 7406 return Some(expr0_0); 7407 } 7408 } 7409 return None; 7410 } 7411 7412 // Generated as internal constructor for term fdemote_reg. 7413 pub fn constructor_fdemote_reg<C: Context>( 7414 ctx: &mut C, 7415 arg0: Type, 7416 arg1: Type, 7417 arg2: Reg, 7418 ) -> Option<Reg> { 7419 let pattern0_0 = arg0; 7420 let pattern1_0 = arg1; 7421 let pattern2_0 = arg2; 7422 // Rule at src/isa/s390x/inst.isle line 3110. 7423 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7424 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7425 return Some(expr1_0); 7426 } 7427 7428 // Generated as internal constructor for term uint_to_fpu_op. 7429 pub fn constructor_uint_to_fpu_op<C: Context>( 7430 ctx: &mut C, 7431 arg0: Type, 7432 arg1: Type, 7433 ) -> Option<IntToFpuOp> { 7434 let pattern0_0 = arg0; 7435 if pattern0_0 == F32 { 7436 let pattern2_0 = arg1; 7437 if pattern2_0 == I32 { 7438 // Rule at src/isa/s390x/inst.isle line 3117. 7439 let expr0_0 = IntToFpuOp::U32ToF32; 7440 return Some(expr0_0); 7441 } 7442 if pattern2_0 == I64 { 7443 // Rule at src/isa/s390x/inst.isle line 3119. 7444 let expr0_0 = IntToFpuOp::U64ToF32; 7445 return Some(expr0_0); 7446 } 7447 } 7448 if pattern0_0 == F64 { 7449 let pattern2_0 = arg1; 7450 if pattern2_0 == I32 { 7451 // Rule at src/isa/s390x/inst.isle line 3118. 7452 let expr0_0 = IntToFpuOp::U32ToF64; 7453 return Some(expr0_0); 7454 } 7455 if pattern2_0 == I64 { 7456 // Rule at src/isa/s390x/inst.isle line 3120. 7457 let expr0_0 = IntToFpuOp::U64ToF64; 7458 return Some(expr0_0); 7459 } 7460 } 7461 return None; 7462 } 7463 7464 // Generated as internal constructor for term fcvt_from_uint_reg. 7465 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7466 ctx: &mut C, 7467 arg0: Type, 7468 arg1: Type, 7469 arg2: Reg, 7470 ) -> Option<Reg> { 7471 let pattern0_0 = arg0; 7472 let pattern1_0 = arg1; 7473 let pattern2_0 = arg2; 7474 // Rule at src/isa/s390x/inst.isle line 3123. 7475 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7476 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7477 return Some(expr1_0); 7478 } 7479 7480 // Generated as internal constructor for term sint_to_fpu_op. 7481 pub fn constructor_sint_to_fpu_op<C: Context>( 7482 ctx: &mut C, 7483 arg0: Type, 7484 arg1: Type, 7485 ) -> Option<IntToFpuOp> { 7486 let pattern0_0 = arg0; 7487 if pattern0_0 == F32 { 7488 let pattern2_0 = arg1; 7489 if pattern2_0 == I32 { 7490 // Rule at src/isa/s390x/inst.isle line 3130. 7491 let expr0_0 = IntToFpuOp::I32ToF32; 7492 return Some(expr0_0); 7493 } 7494 if pattern2_0 == I64 { 7495 // Rule at src/isa/s390x/inst.isle line 3132. 7496 let expr0_0 = IntToFpuOp::I64ToF32; 7497 return Some(expr0_0); 7498 } 7499 } 7500 if pattern0_0 == F64 { 7501 let pattern2_0 = arg1; 7502 if pattern2_0 == I32 { 7503 // Rule at src/isa/s390x/inst.isle line 3131. 7504 let expr0_0 = IntToFpuOp::I32ToF64; 7505 return Some(expr0_0); 7506 } 7507 if pattern2_0 == I64 { 7508 // Rule at src/isa/s390x/inst.isle line 3133. 7509 let expr0_0 = IntToFpuOp::I64ToF64; 7510 return Some(expr0_0); 7511 } 7512 } 7513 return None; 7514 } 7515 7516 // Generated as internal constructor for term fcvt_from_sint_reg. 7517 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7518 ctx: &mut C, 7519 arg0: Type, 7520 arg1: Type, 7521 arg2: Reg, 7522 ) -> Option<Reg> { 7523 let pattern0_0 = arg0; 7524 let pattern1_0 = arg1; 7525 let pattern2_0 = arg2; 7526 // Rule at src/isa/s390x/inst.isle line 3136. 7527 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7528 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7529 return Some(expr1_0); 7530 } 7531 7532 // Generated as internal constructor for term fpu_to_uint_op. 7533 pub fn constructor_fpu_to_uint_op<C: Context>( 7534 ctx: &mut C, 7535 arg0: Type, 7536 arg1: Type, 7537 ) -> Option<FpuToIntOp> { 7538 let pattern0_0 = arg0; 7539 if pattern0_0 == I32 { 7540 let pattern2_0 = arg1; 7541 if pattern2_0 == F32 { 7542 // Rule at src/isa/s390x/inst.isle line 3143. 7543 let expr0_0 = FpuToIntOp::F32ToU32; 7544 return Some(expr0_0); 7545 } 7546 if pattern2_0 == F64 { 7547 // Rule at src/isa/s390x/inst.isle line 3144. 7548 let expr0_0 = FpuToIntOp::F64ToU32; 7549 return Some(expr0_0); 7550 } 7551 } 7552 if pattern0_0 == I64 { 7553 let pattern2_0 = arg1; 7554 if pattern2_0 == F32 { 7555 // Rule at src/isa/s390x/inst.isle line 3145. 7556 let expr0_0 = FpuToIntOp::F32ToU64; 7557 return Some(expr0_0); 7558 } 7559 if pattern2_0 == F64 { 7560 // Rule at src/isa/s390x/inst.isle line 3146. 7561 let expr0_0 = FpuToIntOp::F64ToU64; 7562 return Some(expr0_0); 7563 } 7564 } 7565 return None; 7566 } 7567 7568 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7569 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7570 ctx: &mut C, 7571 arg0: Type, 7572 arg1: Type, 7573 arg2: Reg, 7574 ) -> Option<ProducesFlags> { 7575 let pattern0_0 = arg0; 7576 let pattern1_0 = arg1; 7577 let pattern2_0 = arg2; 7578 // Rule at src/isa/s390x/inst.isle line 3149. 7579 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7580 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7581 return Some(expr1_0); 7582 } 7583 7584 // Generated as internal constructor for term fcvt_to_uint_reg. 7585 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7586 ctx: &mut C, 7587 arg0: Type, 7588 arg1: Type, 7589 arg2: Reg, 7590 ) -> Option<Reg> { 7591 let pattern0_0 = arg0; 7592 let pattern1_0 = arg1; 7593 let pattern2_0 = arg2; 7594 // Rule at src/isa/s390x/inst.isle line 3153. 7595 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7596 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7597 return Some(expr1_0); 7598 } 7599 7600 // Generated as internal constructor for term fpu_to_sint_op. 7601 pub fn constructor_fpu_to_sint_op<C: Context>( 7602 ctx: &mut C, 7603 arg0: Type, 7604 arg1: Type, 7605 ) -> Option<FpuToIntOp> { 7606 let pattern0_0 = arg0; 7607 if pattern0_0 == I32 { 7608 let pattern2_0 = arg1; 7609 if pattern2_0 == F32 { 7610 // Rule at src/isa/s390x/inst.isle line 3160. 7611 let expr0_0 = FpuToIntOp::F32ToI32; 7612 return Some(expr0_0); 7613 } 7614 if pattern2_0 == F64 { 7615 // Rule at src/isa/s390x/inst.isle line 3161. 7616 let expr0_0 = FpuToIntOp::F64ToI32; 7617 return Some(expr0_0); 7618 } 7619 } 7620 if pattern0_0 == I64 { 7621 let pattern2_0 = arg1; 7622 if pattern2_0 == F32 { 7623 // Rule at src/isa/s390x/inst.isle line 3162. 7624 let expr0_0 = FpuToIntOp::F32ToI64; 7625 return Some(expr0_0); 7626 } 7627 if pattern2_0 == F64 { 7628 // Rule at src/isa/s390x/inst.isle line 3163. 7629 let expr0_0 = FpuToIntOp::F64ToI64; 7630 return Some(expr0_0); 7631 } 7632 } 7633 return None; 7634 } 7635 7636 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7637 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7638 ctx: &mut C, 7639 arg0: Type, 7640 arg1: Type, 7641 arg2: Reg, 7642 ) -> Option<ProducesFlags> { 7643 let pattern0_0 = arg0; 7644 let pattern1_0 = arg1; 7645 let pattern2_0 = arg2; 7646 // Rule at src/isa/s390x/inst.isle line 3166. 7647 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7648 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7649 return Some(expr1_0); 7650 } 7651 7652 // Generated as internal constructor for term fcvt_to_sint_reg. 7653 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7654 ctx: &mut C, 7655 arg0: Type, 7656 arg1: Type, 7657 arg2: Reg, 7658 ) -> Option<Reg> { 7659 let pattern0_0 = arg0; 7660 let pattern1_0 = arg1; 7661 let pattern2_0 = arg2; 7662 // Rule at src/isa/s390x/inst.isle line 3170. 7663 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7664 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7665 return Some(expr1_0); 7666 } 7667 7668 // Generated as internal constructor for term cmpop_cmps. 7669 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7670 let pattern0_0 = arg0; 7671 if pattern0_0 == I32 { 7672 // Rule at src/isa/s390x/inst.isle line 3177. 7673 let expr0_0 = CmpOp::CmpS32; 7674 return Some(expr0_0); 7675 } 7676 if pattern0_0 == I64 { 7677 // Rule at src/isa/s390x/inst.isle line 3178. 7678 let expr0_0 = CmpOp::CmpS64; 7679 return Some(expr0_0); 7680 } 7681 return None; 7682 } 7683 7684 // Generated as internal constructor for term cmpop_cmps_sext16. 7685 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7686 let pattern0_0 = arg0; 7687 if pattern0_0 == I32 { 7688 // Rule at src/isa/s390x/inst.isle line 3181. 7689 let expr0_0 = CmpOp::CmpS32Ext16; 7690 return Some(expr0_0); 7691 } 7692 if pattern0_0 == I64 { 7693 // Rule at src/isa/s390x/inst.isle line 3182. 7694 let expr0_0 = CmpOp::CmpS64Ext16; 7695 return Some(expr0_0); 7696 } 7697 return None; 7698 } 7699 7700 // Generated as internal constructor for term cmpop_cmps_sext32. 7701 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7702 let pattern0_0 = arg0; 7703 if pattern0_0 == I64 { 7704 // Rule at src/isa/s390x/inst.isle line 3185. 7705 let expr0_0 = CmpOp::CmpS64Ext32; 7706 return Some(expr0_0); 7707 } 7708 return None; 7709 } 7710 7711 // Generated as internal constructor for term icmps_reg. 7712 pub fn constructor_icmps_reg<C: Context>( 7713 ctx: &mut C, 7714 arg0: Type, 7715 arg1: Reg, 7716 arg2: Reg, 7717 ) -> Option<ProducesFlags> { 7718 let pattern0_0 = arg0; 7719 let pattern1_0 = arg1; 7720 let pattern2_0 = arg2; 7721 // Rule at src/isa/s390x/inst.isle line 3188. 7722 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7723 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7724 return Some(expr1_0); 7725 } 7726 7727 // Generated as internal constructor for term icmps_reg_sext32. 7728 pub fn constructor_icmps_reg_sext32<C: Context>( 7729 ctx: &mut C, 7730 arg0: Type, 7731 arg1: Reg, 7732 arg2: Reg, 7733 ) -> Option<ProducesFlags> { 7734 let pattern0_0 = arg0; 7735 let pattern1_0 = arg1; 7736 let pattern2_0 = arg2; 7737 // Rule at src/isa/s390x/inst.isle line 3191. 7738 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7739 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7740 return Some(expr1_0); 7741 } 7742 7743 // Generated as internal constructor for term icmps_simm16. 7744 pub fn constructor_icmps_simm16<C: Context>( 7745 ctx: &mut C, 7746 arg0: Type, 7747 arg1: Reg, 7748 arg2: i16, 7749 ) -> Option<ProducesFlags> { 7750 let pattern0_0 = arg0; 7751 let pattern1_0 = arg1; 7752 let pattern2_0 = arg2; 7753 // Rule at src/isa/s390x/inst.isle line 3194. 7754 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7755 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7756 return Some(expr1_0); 7757 } 7758 7759 // Generated as internal constructor for term icmps_simm32. 7760 pub fn constructor_icmps_simm32<C: Context>( 7761 ctx: &mut C, 7762 arg0: Type, 7763 arg1: Reg, 7764 arg2: i32, 7765 ) -> Option<ProducesFlags> { 7766 let pattern0_0 = arg0; 7767 let pattern1_0 = arg1; 7768 let pattern2_0 = arg2; 7769 // Rule at src/isa/s390x/inst.isle line 3197. 7770 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7771 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7772 return Some(expr1_0); 7773 } 7774 7775 // Generated as internal constructor for term icmps_mem. 7776 pub fn constructor_icmps_mem<C: Context>( 7777 ctx: &mut C, 7778 arg0: Type, 7779 arg1: Reg, 7780 arg2: &MemArg, 7781 ) -> Option<ProducesFlags> { 7782 let pattern0_0 = arg0; 7783 let pattern1_0 = arg1; 7784 let pattern2_0 = arg2; 7785 // Rule at src/isa/s390x/inst.isle line 3200. 7786 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7787 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7788 return Some(expr1_0); 7789 } 7790 7791 // Generated as internal constructor for term icmps_mem_sext16. 7792 pub fn constructor_icmps_mem_sext16<C: Context>( 7793 ctx: &mut C, 7794 arg0: Type, 7795 arg1: Reg, 7796 arg2: &MemArg, 7797 ) -> Option<ProducesFlags> { 7798 let pattern0_0 = arg0; 7799 let pattern1_0 = arg1; 7800 let pattern2_0 = arg2; 7801 // Rule at src/isa/s390x/inst.isle line 3203. 7802 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7803 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7804 return Some(expr1_0); 7805 } 7806 7807 // Generated as internal constructor for term icmps_mem_sext32. 7808 pub fn constructor_icmps_mem_sext32<C: Context>( 7809 ctx: &mut C, 7810 arg0: Type, 7811 arg1: Reg, 7812 arg2: &MemArg, 7813 ) -> Option<ProducesFlags> { 7814 let pattern0_0 = arg0; 7815 let pattern1_0 = arg1; 7816 let pattern2_0 = arg2; 7817 // Rule at src/isa/s390x/inst.isle line 3206. 7818 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7819 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7820 return Some(expr1_0); 7821 } 7822 7823 // Generated as internal constructor for term cmpop_cmpu. 7824 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7825 let pattern0_0 = arg0; 7826 if pattern0_0 == I32 { 7827 // Rule at src/isa/s390x/inst.isle line 3212. 7828 let expr0_0 = CmpOp::CmpL32; 7829 return Some(expr0_0); 7830 } 7831 if pattern0_0 == I64 { 7832 // Rule at src/isa/s390x/inst.isle line 3213. 7833 let expr0_0 = CmpOp::CmpL64; 7834 return Some(expr0_0); 7835 } 7836 return None; 7837 } 7838 7839 // Generated as internal constructor for term cmpop_cmpu_zext16. 7840 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7841 let pattern0_0 = arg0; 7842 if pattern0_0 == I32 { 7843 // Rule at src/isa/s390x/inst.isle line 3216. 7844 let expr0_0 = CmpOp::CmpL32Ext16; 7845 return Some(expr0_0); 7846 } 7847 if pattern0_0 == I64 { 7848 // Rule at src/isa/s390x/inst.isle line 3217. 7849 let expr0_0 = CmpOp::CmpL64Ext16; 7850 return Some(expr0_0); 7851 } 7852 return None; 7853 } 7854 7855 // Generated as internal constructor for term cmpop_cmpu_zext32. 7856 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7857 let pattern0_0 = arg0; 7858 if pattern0_0 == I64 { 7859 // Rule at src/isa/s390x/inst.isle line 3220. 7860 let expr0_0 = CmpOp::CmpL64Ext32; 7861 return Some(expr0_0); 7862 } 7863 return None; 7864 } 7865 7866 // Generated as internal constructor for term icmpu_reg. 7867 pub fn constructor_icmpu_reg<C: Context>( 7868 ctx: &mut C, 7869 arg0: Type, 7870 arg1: Reg, 7871 arg2: Reg, 7872 ) -> Option<ProducesFlags> { 7873 let pattern0_0 = arg0; 7874 let pattern1_0 = arg1; 7875 let pattern2_0 = arg2; 7876 // Rule at src/isa/s390x/inst.isle line 3223. 7877 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7878 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7879 return Some(expr1_0); 7880 } 7881 7882 // Generated as internal constructor for term icmpu_reg_zext32. 7883 pub fn constructor_icmpu_reg_zext32<C: Context>( 7884 ctx: &mut C, 7885 arg0: Type, 7886 arg1: Reg, 7887 arg2: Reg, 7888 ) -> Option<ProducesFlags> { 7889 let pattern0_0 = arg0; 7890 let pattern1_0 = arg1; 7891 let pattern2_0 = arg2; 7892 // Rule at src/isa/s390x/inst.isle line 3226. 7893 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7894 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7895 return Some(expr1_0); 7896 } 7897 7898 // Generated as internal constructor for term icmpu_uimm32. 7899 pub fn constructor_icmpu_uimm32<C: Context>( 7900 ctx: &mut C, 7901 arg0: Type, 7902 arg1: Reg, 7903 arg2: u32, 7904 ) -> Option<ProducesFlags> { 7905 let pattern0_0 = arg0; 7906 let pattern1_0 = arg1; 7907 let pattern2_0 = arg2; 7908 // Rule at src/isa/s390x/inst.isle line 3229. 7909 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7910 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7911 return Some(expr1_0); 7912 } 7913 7914 // Generated as internal constructor for term icmpu_mem. 7915 pub fn constructor_icmpu_mem<C: Context>( 7916 ctx: &mut C, 7917 arg0: Type, 7918 arg1: Reg, 7919 arg2: &MemArg, 7920 ) -> Option<ProducesFlags> { 7921 let pattern0_0 = arg0; 7922 let pattern1_0 = arg1; 7923 let pattern2_0 = arg2; 7924 // Rule at src/isa/s390x/inst.isle line 3232. 7925 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7926 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7927 return Some(expr1_0); 7928 } 7929 7930 // Generated as internal constructor for term icmpu_mem_zext16. 7931 pub fn constructor_icmpu_mem_zext16<C: Context>( 7932 ctx: &mut C, 7933 arg0: Type, 7934 arg1: Reg, 7935 arg2: &MemArg, 7936 ) -> Option<ProducesFlags> { 7937 let pattern0_0 = arg0; 7938 let pattern1_0 = arg1; 7939 let pattern2_0 = arg2; 7940 // Rule at src/isa/s390x/inst.isle line 3235. 7941 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7942 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7943 return Some(expr1_0); 7944 } 7945 7946 // Generated as internal constructor for term icmpu_mem_zext32. 7947 pub fn constructor_icmpu_mem_zext32<C: Context>( 7948 ctx: &mut C, 7949 arg0: Type, 7950 arg1: Reg, 7951 arg2: &MemArg, 7952 ) -> Option<ProducesFlags> { 7953 let pattern0_0 = arg0; 7954 let pattern1_0 = arg1; 7955 let pattern2_0 = arg2; 7956 // Rule at src/isa/s390x/inst.isle line 3238. 7957 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7958 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7959 return Some(expr1_0); 7960 } 7961 7962 // Generated as internal constructor for term fcmp_reg. 7963 pub fn constructor_fcmp_reg<C: Context>( 7964 ctx: &mut C, 7965 arg0: Type, 7966 arg1: Reg, 7967 arg2: Reg, 7968 ) -> Option<ProducesFlags> { 7969 let pattern0_0 = arg0; 7970 if pattern0_0 == F32 { 7971 let pattern2_0 = arg1; 7972 let pattern3_0 = arg2; 7973 // Rule at src/isa/s390x/inst.isle line 3244. 7974 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7975 return Some(expr0_0); 7976 } 7977 if pattern0_0 == F64 { 7978 let pattern2_0 = arg1; 7979 let pattern3_0 = arg2; 7980 // Rule at src/isa/s390x/inst.isle line 3245. 7981 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7982 return Some(expr0_0); 7983 } 7984 return None; 7985 } 7986 7987 // Generated as internal constructor for term lower. 7988 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7989 let pattern0_0 = arg0; 7990 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7991 match &pattern1_0 { 7992 &InstructionData::NullAry { 7993 opcode: ref pattern2_0, 7994 } => { 7995 match pattern2_0 { 7996 &Opcode::Debugtrap => { 7997 // Rule at src/isa/s390x/lower.isle line 2169. 7998 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7999 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8000 return Some(expr1_0); 8001 } 8002 &Opcode::Nop => { 8003 // Rule at src/isa/s390x/lower.isle line 47. 8004 let expr0_0 = C::invalid_reg(ctx); 8005 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8006 return Some(expr1_0); 8007 } 8008 &Opcode::Fence => { 8009 // Rule at src/isa/s390x/lower.isle line 1882. 8010 let expr0_0 = constructor_fence_impl(ctx)?; 8011 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8012 return Some(expr1_0); 8013 } 8014 _ => {} 8015 } 8016 } 8017 &InstructionData::FuncAddr { 8018 opcode: ref pattern2_0, 8019 func_ref: pattern2_1, 8020 } => { 8021 if let &Opcode::FuncAddr = pattern2_0 { 8022 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 8023 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 8024 // Rule at src/isa/s390x/lower.isle line 1159. 8025 let expr0_0: i32 = 0; 8026 let expr1_0 = C::memflags_trusted(ctx); 8027 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 8028 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 8029 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8030 return Some(expr4_0); 8031 } 8032 // Rule at src/isa/s390x/lower.isle line 1163. 8033 let expr0_0: i64 = 0; 8034 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 8035 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8036 return Some(expr2_0); 8037 } 8038 } 8039 &InstructionData::UnaryGlobalValue { 8040 opcode: ref pattern2_0, 8041 global_value: pattern2_1, 8042 } => { 8043 if let &Opcode::SymbolValue = pattern2_0 { 8044 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 8045 C::symbol_value_data(ctx, pattern2_1) 8046 { 8047 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 8048 let pattern6_0 = 0; 8049 if let Some(pattern7_0) = 8050 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 8051 { 8052 // Rule at src/isa/s390x/lower.isle line 1170. 8053 let expr0_0 = C::memflags_trusted(ctx); 8054 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 8055 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 8056 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8057 return Some(expr3_0); 8058 } 8059 } 8060 // Rule at src/isa/s390x/lower.isle line 1175. 8061 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 8062 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8063 return Some(expr1_0); 8064 } 8065 } 8066 } 8067 &InstructionData::UnaryIeee32 { 8068 opcode: ref pattern2_0, 8069 imm: pattern2_1, 8070 } => { 8071 if let &Opcode::F32const = pattern2_0 { 8072 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 8073 // Rule at src/isa/s390x/lower.isle line 29. 8074 let expr0_0: Type = F32; 8075 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8076 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8077 return Some(expr2_0); 8078 } 8079 } 8080 &InstructionData::UnaryIeee64 { 8081 opcode: ref pattern2_0, 8082 imm: pattern2_1, 8083 } => { 8084 if let &Opcode::F64const = pattern2_0 { 8085 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8086 // Rule at src/isa/s390x/lower.isle line 35. 8087 let expr0_0: Type = F64; 8088 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8089 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8090 return Some(expr2_0); 8091 } 8092 } 8093 &InstructionData::Trap { 8094 opcode: ref pattern2_0, 8095 code: ref pattern2_1, 8096 } => { 8097 match pattern2_0 { 8098 &Opcode::Trap => { 8099 // Rule at src/isa/s390x/lower.isle line 2139. 8100 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8101 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8102 return Some(expr1_0); 8103 } 8104 &Opcode::ResumableTrap => { 8105 // Rule at src/isa/s390x/lower.isle line 2145. 8106 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8107 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8108 return Some(expr1_0); 8109 } 8110 _ => {} 8111 } 8112 } 8113 &InstructionData::StoreNoOffset { 8114 opcode: ref pattern2_0, 8115 args: ref pattern2_1, 8116 flags: pattern2_2, 8117 } => { 8118 if let &Opcode::AtomicStore = pattern2_0 { 8119 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8120 let pattern5_0 = C::value_type(ctx, pattern4_0); 8121 if pattern5_0 == I8 { 8122 // Rule at src/isa/s390x/lower.isle line 1863. 8123 let expr0_0 = C::zero_offset(ctx); 8124 let expr1_0 = 8125 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8126 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8127 return Some(expr2_0); 8128 } 8129 if pattern5_0 == I16 { 8130 // Rule at src/isa/s390x/lower.isle line 1867. 8131 let expr0_0 = C::zero_offset(ctx); 8132 let expr1_0 = constructor_istore16_impl( 8133 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8134 )?; 8135 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8136 return Some(expr2_0); 8137 } 8138 if pattern5_0 == I32 { 8139 // Rule at src/isa/s390x/lower.isle line 1871. 8140 let expr0_0 = C::zero_offset(ctx); 8141 let expr1_0 = constructor_istore32_impl( 8142 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8143 )?; 8144 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8145 return Some(expr2_0); 8146 } 8147 if pattern5_0 == I64 { 8148 // Rule at src/isa/s390x/lower.isle line 1875. 8149 let expr0_0 = C::zero_offset(ctx); 8150 let expr1_0 = constructor_istore64_impl( 8151 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8152 )?; 8153 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8154 return Some(expr2_0); 8155 } 8156 } 8157 } 8158 &InstructionData::Store { 8159 opcode: ref pattern2_0, 8160 args: ref pattern2_1, 8161 flags: pattern2_2, 8162 offset: pattern2_3, 8163 } => { 8164 match pattern2_0 { 8165 &Opcode::Store => { 8166 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8167 let pattern5_0 = C::value_type(ctx, pattern4_0); 8168 if pattern5_0 == I8 { 8169 // Rule at src/isa/s390x/lower.isle line 1354. 8170 let expr0_0 = constructor_istore8_impl( 8171 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8172 )?; 8173 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8174 return Some(expr1_0); 8175 } 8176 if pattern5_0 == I16 { 8177 // Rule at src/isa/s390x/lower.isle line 1358. 8178 let expr0_0 = constructor_istore16_impl( 8179 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8180 )?; 8181 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8182 return Some(expr1_0); 8183 } 8184 if pattern5_0 == I32 { 8185 // Rule at src/isa/s390x/lower.isle line 1362. 8186 let expr0_0 = constructor_istore32_impl( 8187 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8188 )?; 8189 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8190 return Some(expr1_0); 8191 } 8192 if pattern5_0 == I64 { 8193 // Rule at src/isa/s390x/lower.isle line 1366. 8194 let expr0_0 = constructor_istore64_impl( 8195 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8196 )?; 8197 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8198 return Some(expr1_0); 8199 } 8200 if pattern5_0 == R64 { 8201 // Rule at src/isa/s390x/lower.isle line 1370. 8202 let expr0_0 = constructor_istore64_impl( 8203 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8204 )?; 8205 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8206 return Some(expr1_0); 8207 } 8208 if pattern5_0 == F32 { 8209 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8210 // Rule at src/isa/s390x/lower.isle line 1374. 8211 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8212 let expr1_0 = 8213 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8214 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8215 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8216 return Some(expr3_0); 8217 } 8218 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8219 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8220 // Rule at src/isa/s390x/lower.isle line 1380. 8221 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8222 let expr1_0 = constructor_lower_address( 8223 ctx, pattern2_2, pattern4_1, pattern2_3, 8224 )?; 8225 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8226 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8227 return Some(expr3_0); 8228 } 8229 } 8230 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8231 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8232 // Rule at src/isa/s390x/lower.isle line 1386. 8233 let expr0_0: Type = I64; 8234 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8235 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8236 let expr3_0: u8 = 32; 8237 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8238 let expr5_0 = constructor_lower_address( 8239 ctx, pattern2_2, pattern4_1, pattern2_3, 8240 )?; 8241 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8242 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8243 return Some(expr7_0); 8244 } 8245 } 8246 } 8247 if pattern5_0 == F64 { 8248 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8249 // Rule at src/isa/s390x/lower.isle line 1392. 8250 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8251 let expr1_0 = 8252 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8253 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8254 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8255 return Some(expr3_0); 8256 } 8257 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8258 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8259 // Rule at src/isa/s390x/lower.isle line 1398. 8260 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8261 let expr1_0 = constructor_lower_address( 8262 ctx, pattern2_2, pattern4_1, pattern2_3, 8263 )?; 8264 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8265 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8266 return Some(expr3_0); 8267 } 8268 } 8269 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8270 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8271 // Rule at src/isa/s390x/lower.isle line 1404. 8272 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8273 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8274 let expr2_0 = constructor_lower_address( 8275 ctx, pattern2_2, pattern4_1, pattern2_3, 8276 )?; 8277 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8278 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8279 return Some(expr4_0); 8280 } 8281 } 8282 } 8283 } 8284 &Opcode::Istore8 => { 8285 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8286 // Rule at src/isa/s390x/lower.isle line 1413. 8287 let expr0_0 = constructor_istore8_impl( 8288 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8289 )?; 8290 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8291 return Some(expr1_0); 8292 } 8293 &Opcode::Istore16 => { 8294 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8295 // Rule at src/isa/s390x/lower.isle line 1431. 8296 let expr0_0 = constructor_istore16_impl( 8297 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8298 )?; 8299 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8300 return Some(expr1_0); 8301 } 8302 &Opcode::Istore32 => { 8303 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8304 // Rule at src/isa/s390x/lower.isle line 1457. 8305 let expr0_0 = constructor_istore32_impl( 8306 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8307 )?; 8308 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8309 return Some(expr1_0); 8310 } 8311 _ => {} 8312 } 8313 } 8314 &InstructionData::Unary { 8315 opcode: ref pattern2_0, 8316 arg: pattern2_1, 8317 } => { 8318 match pattern2_0 { 8319 &Opcode::Copy => { 8320 // Rule at src/isa/s390x/lower.isle line 53. 8321 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8322 return Some(expr0_0); 8323 } 8324 &Opcode::Breduce => { 8325 // Rule at src/isa/s390x/lower.isle line 752. 8326 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8327 return Some(expr0_0); 8328 } 8329 &Opcode::Ireduce => { 8330 // Rule at src/isa/s390x/lower.isle line 596. 8331 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8332 return Some(expr0_0); 8333 } 8334 _ => {} 8335 } 8336 } 8337 &InstructionData::IntCondTrap { 8338 opcode: ref pattern2_0, 8339 arg: pattern2_1, 8340 cond: ref pattern2_2, 8341 code: ref pattern2_3, 8342 } => { 8343 if let &Opcode::Trapif = pattern2_0 { 8344 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8345 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8346 if let &InstructionData::Binary { 8347 opcode: ref pattern6_0, 8348 args: ref pattern6_1, 8349 } = &pattern5_0 8350 { 8351 match pattern6_0 { 8352 &Opcode::Ifcmp => { 8353 let (pattern8_0, pattern8_1) = 8354 C::unpack_value_array_2(ctx, pattern6_1); 8355 // Rule at src/isa/s390x/lower.isle line 2181. 8356 let expr0_0: bool = false; 8357 let expr1_0 = constructor_icmp_val( 8358 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8359 )?; 8360 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8361 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8362 return Some(expr3_0); 8363 } 8364 &Opcode::IaddIfcout => { 8365 let (pattern8_0, pattern8_1) = 8366 C::unpack_value_array_2(ctx, pattern6_1); 8367 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8368 // Rule at src/isa/s390x/lower.isle line 2206. 8369 let expr0_0: u8 = 3; 8370 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8371 let expr2_0 = 8372 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8373 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8374 return Some(expr3_0); 8375 } 8376 } 8377 _ => {} 8378 } 8379 } 8380 } 8381 } 8382 } 8383 &InstructionData::CondTrap { 8384 opcode: ref pattern2_0, 8385 arg: pattern2_1, 8386 code: ref pattern2_2, 8387 } => { 8388 match pattern2_0 { 8389 &Opcode::Trapz => { 8390 // Rule at src/isa/s390x/lower.isle line 2151. 8391 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8392 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8393 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8394 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8395 return Some(expr3_0); 8396 } 8397 &Opcode::Trapnz => { 8398 // Rule at src/isa/s390x/lower.isle line 2157. 8399 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8400 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8401 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8402 return Some(expr2_0); 8403 } 8404 &Opcode::ResumableTrapnz => { 8405 // Rule at src/isa/s390x/lower.isle line 2163. 8406 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8407 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8408 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8409 return Some(expr2_0); 8410 } 8411 _ => {} 8412 } 8413 } 8414 _ => {} 8415 } 8416 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8417 let pattern2_0 = C::value_type(ctx, pattern1_0); 8418 if pattern2_0 == B1 { 8419 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8420 if let &InstructionData::Unary { 8421 opcode: ref pattern5_0, 8422 arg: pattern5_1, 8423 } = &pattern4_0 8424 { 8425 match pattern5_0 { 8426 &Opcode::IsNull => { 8427 let pattern7_0 = C::value_type(ctx, pattern5_1); 8428 if pattern7_0 == R64 { 8429 // Rule at src/isa/s390x/lower.isle line 2017. 8430 let expr0_0: Type = B1; 8431 let expr1_0: Type = I64; 8432 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8433 let expr3_0: i16 = 0; 8434 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8435 let expr5_0 = IntCC::Equal; 8436 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8437 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8438 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8439 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8440 return Some(expr9_0); 8441 } 8442 } 8443 &Opcode::IsInvalid => { 8444 let pattern7_0 = C::value_type(ctx, pattern5_1); 8445 if pattern7_0 == R64 { 8446 // Rule at src/isa/s390x/lower.isle line 2023. 8447 let expr0_0: Type = B1; 8448 let expr1_0: Type = I64; 8449 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8450 let expr3_0: i16 = -1; 8451 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8452 let expr5_0 = IntCC::Equal; 8453 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8454 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8455 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8456 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8457 return Some(expr9_0); 8458 } 8459 } 8460 _ => {} 8461 } 8462 } 8463 } 8464 if pattern2_0 == I8 { 8465 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8466 match &pattern4_0 { 8467 &InstructionData::Unary { 8468 opcode: ref pattern5_0, 8469 arg: pattern5_1, 8470 } => { 8471 if let &Opcode::Popcnt = pattern5_0 { 8472 // Rule at src/isa/s390x/lower.isle line 884. 8473 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8474 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8475 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8476 return Some(expr2_0); 8477 } 8478 } 8479 &InstructionData::LoadNoOffset { 8480 opcode: ref pattern5_0, 8481 arg: pattern5_1, 8482 flags: pattern5_2, 8483 } => { 8484 if let &Opcode::AtomicLoad = pattern5_0 { 8485 // Rule at src/isa/s390x/lower.isle line 1826. 8486 let expr0_0: Type = I8; 8487 let expr1_0 = C::zero_offset(ctx); 8488 let expr2_0 = 8489 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8490 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8491 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8492 return Some(expr4_0); 8493 } 8494 } 8495 &InstructionData::Load { 8496 opcode: ref pattern5_0, 8497 arg: pattern5_1, 8498 flags: pattern5_2, 8499 offset: pattern5_3, 8500 } => { 8501 if let &Opcode::Load = pattern5_0 { 8502 // Rule at src/isa/s390x/lower.isle line 1182. 8503 let expr0_0: Type = I8; 8504 let expr1_0 = 8505 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8506 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8507 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8508 return Some(expr3_0); 8509 } 8510 } 8511 _ => {} 8512 } 8513 } 8514 if pattern2_0 == I16 { 8515 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8516 match &pattern4_0 { 8517 &InstructionData::LoadNoOffset { 8518 opcode: ref pattern5_0, 8519 arg: pattern5_1, 8520 flags: pattern5_2, 8521 } => { 8522 if let &Opcode::AtomicLoad = pattern5_0 { 8523 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8524 // Rule at src/isa/s390x/lower.isle line 1834. 8525 let expr0_0 = C::zero_offset(ctx); 8526 let expr1_0 = 8527 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8528 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8529 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8530 return Some(expr3_0); 8531 } 8532 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8533 // Rule at src/isa/s390x/lower.isle line 1830. 8534 let expr0_0: Type = I16; 8535 let expr1_0 = C::zero_offset(ctx); 8536 let expr2_0 = 8537 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8538 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8539 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8540 return Some(expr4_0); 8541 } 8542 } 8543 } 8544 &InstructionData::Load { 8545 opcode: ref pattern5_0, 8546 arg: pattern5_1, 8547 flags: pattern5_2, 8548 offset: pattern5_3, 8549 } => { 8550 if let &Opcode::Load = pattern5_0 { 8551 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8552 // Rule at src/isa/s390x/lower.isle line 1190. 8553 let expr0_0 = 8554 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8555 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8556 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8557 return Some(expr2_0); 8558 } 8559 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8560 // Rule at src/isa/s390x/lower.isle line 1186. 8561 let expr0_0: Type = I16; 8562 let expr1_0 = 8563 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8564 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8565 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8566 return Some(expr3_0); 8567 } 8568 } 8569 } 8570 _ => {} 8571 } 8572 } 8573 if pattern2_0 == I32 { 8574 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8575 match &pattern4_0 { 8576 &InstructionData::Binary { 8577 opcode: ref pattern5_0, 8578 args: ref pattern5_1, 8579 } => { 8580 match pattern5_0 { 8581 &Opcode::Umulhi => { 8582 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8583 // Rule at src/isa/s390x/lower.isle line 252. 8584 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8585 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8586 let expr2_0: Type = I64; 8587 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8588 let expr4_0: Type = I64; 8589 let expr5_0: u8 = 32; 8590 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8591 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8592 return Some(expr7_0); 8593 } 8594 &Opcode::Smulhi => { 8595 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8596 // Rule at src/isa/s390x/lower.isle line 274. 8597 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8598 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8599 let expr2_0: Type = I64; 8600 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8601 let expr4_0: Type = I64; 8602 let expr5_0: u8 = 32; 8603 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8604 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8605 return Some(expr7_0); 8606 } 8607 _ => {} 8608 } 8609 } 8610 &InstructionData::Unary { 8611 opcode: ref pattern5_0, 8612 arg: pattern5_1, 8613 } => { 8614 if let &Opcode::Bitcast = pattern5_0 { 8615 let pattern7_0 = C::value_type(ctx, pattern5_1); 8616 if pattern7_0 == F32 { 8617 // Rule at src/isa/s390x/lower.isle line 1145. 8618 let expr0_0: Type = I64; 8619 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8620 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8621 let expr3_0: u8 = 32; 8622 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8623 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8624 return Some(expr5_0); 8625 } 8626 } 8627 } 8628 &InstructionData::LoadNoOffset { 8629 opcode: ref pattern5_0, 8630 arg: pattern5_1, 8631 flags: pattern5_2, 8632 } => { 8633 if let &Opcode::AtomicLoad = pattern5_0 { 8634 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8635 // Rule at src/isa/s390x/lower.isle line 1842. 8636 let expr0_0 = C::zero_offset(ctx); 8637 let expr1_0 = 8638 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8639 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8640 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8641 return Some(expr3_0); 8642 } 8643 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8644 // Rule at src/isa/s390x/lower.isle line 1838. 8645 let expr0_0 = C::zero_offset(ctx); 8646 let expr1_0 = 8647 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8648 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8649 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8650 return Some(expr3_0); 8651 } 8652 } 8653 } 8654 &InstructionData::Load { 8655 opcode: ref pattern5_0, 8656 arg: pattern5_1, 8657 flags: pattern5_2, 8658 offset: pattern5_3, 8659 } => { 8660 if let &Opcode::Load = pattern5_0 { 8661 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8662 // Rule at src/isa/s390x/lower.isle line 1198. 8663 let expr0_0 = 8664 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8665 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8666 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8667 return Some(expr2_0); 8668 } 8669 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8670 // Rule at src/isa/s390x/lower.isle line 1194. 8671 let expr0_0 = 8672 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8673 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8674 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8675 return Some(expr2_0); 8676 } 8677 } 8678 } 8679 _ => {} 8680 } 8681 } 8682 if pattern2_0 == I64 { 8683 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8684 match &pattern4_0 { 8685 &InstructionData::Binary { 8686 opcode: ref pattern5_0, 8687 args: ref pattern5_1, 8688 } => { 8689 match pattern5_0 { 8690 &Opcode::Umulhi => { 8691 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8692 // Rule at src/isa/s390x/lower.isle line 259. 8693 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8694 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8695 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8696 let expr3_0: Type = I64; 8697 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8698 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8699 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8700 return Some(expr6_0); 8701 } 8702 &Opcode::Smulhi => { 8703 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8704 // Rule at src/isa/s390x/lower.isle line 281. 8705 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8706 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8707 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8708 let expr3_0: Type = I64; 8709 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8710 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8711 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8712 return Some(expr6_0); 8713 } 8714 _ => {} 8715 } 8716 } 8717 &InstructionData::Unary { 8718 opcode: ref pattern5_0, 8719 arg: pattern5_1, 8720 } => { 8721 if let &Opcode::Bitcast = pattern5_0 { 8722 let pattern7_0 = C::value_type(ctx, pattern5_1); 8723 if pattern7_0 == F64 { 8724 // Rule at src/isa/s390x/lower.isle line 1135. 8725 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8726 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8727 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8728 return Some(expr2_0); 8729 } 8730 } 8731 } 8732 &InstructionData::LoadNoOffset { 8733 opcode: ref pattern5_0, 8734 arg: pattern5_1, 8735 flags: pattern5_2, 8736 } => { 8737 if let &Opcode::AtomicLoad = pattern5_0 { 8738 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8739 // Rule at src/isa/s390x/lower.isle line 1850. 8740 let expr0_0 = C::zero_offset(ctx); 8741 let expr1_0 = 8742 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8743 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8744 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8745 return Some(expr3_0); 8746 } 8747 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8748 // Rule at src/isa/s390x/lower.isle line 1846. 8749 let expr0_0 = C::zero_offset(ctx); 8750 let expr1_0 = 8751 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8752 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8753 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8754 return Some(expr3_0); 8755 } 8756 } 8757 } 8758 &InstructionData::Load { 8759 opcode: ref pattern5_0, 8760 arg: pattern5_1, 8761 flags: pattern5_2, 8762 offset: pattern5_3, 8763 } => { 8764 if let &Opcode::Load = pattern5_0 { 8765 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8766 // Rule at src/isa/s390x/lower.isle line 1206. 8767 let expr0_0 = 8768 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8769 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8770 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8771 return Some(expr2_0); 8772 } 8773 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8774 // Rule at src/isa/s390x/lower.isle line 1202. 8775 let expr0_0 = 8776 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8777 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8778 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8779 return Some(expr2_0); 8780 } 8781 } 8782 } 8783 _ => {} 8784 } 8785 } 8786 if pattern2_0 == R64 { 8787 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8788 if let &InstructionData::Load { 8789 opcode: ref pattern5_0, 8790 arg: pattern5_1, 8791 flags: pattern5_2, 8792 offset: pattern5_3, 8793 } = &pattern4_0 8794 { 8795 if let &Opcode::Load = pattern5_0 { 8796 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8797 // Rule at src/isa/s390x/lower.isle line 1214. 8798 let expr0_0 = 8799 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8800 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8801 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8802 return Some(expr2_0); 8803 } 8804 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8805 // Rule at src/isa/s390x/lower.isle line 1210. 8806 let expr0_0 = 8807 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8808 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8809 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8810 return Some(expr2_0); 8811 } 8812 } 8813 } 8814 } 8815 if pattern2_0 == F32 { 8816 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8817 match &pattern4_0 { 8818 &InstructionData::Unary { 8819 opcode: ref pattern5_0, 8820 arg: pattern5_1, 8821 } => { 8822 if let &Opcode::Bitcast = pattern5_0 { 8823 let pattern7_0 = C::value_type(ctx, pattern5_1); 8824 if pattern7_0 == I32 { 8825 // Rule at src/isa/s390x/lower.isle line 1140. 8826 let expr0_0: Type = I64; 8827 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8828 let expr2_0: u8 = 32; 8829 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8830 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8831 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8832 return Some(expr5_0); 8833 } 8834 } 8835 } 8836 &InstructionData::Load { 8837 opcode: ref pattern5_0, 8838 arg: pattern5_1, 8839 flags: pattern5_2, 8840 offset: pattern5_3, 8841 } => { 8842 if let &Opcode::Load = pattern5_0 { 8843 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8844 // Rule at src/isa/s390x/lower.isle line 1218. 8845 let expr0_0 = 8846 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8847 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8848 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8849 return Some(expr2_0); 8850 } 8851 } 8852 } 8853 _ => {} 8854 } 8855 } 8856 if pattern2_0 == F64 { 8857 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8858 match &pattern4_0 { 8859 &InstructionData::Unary { 8860 opcode: ref pattern5_0, 8861 arg: pattern5_1, 8862 } => { 8863 if let &Opcode::Bitcast = pattern5_0 { 8864 let pattern7_0 = C::value_type(ctx, pattern5_1); 8865 if pattern7_0 == I64 { 8866 // Rule at src/isa/s390x/lower.isle line 1131. 8867 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8868 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8869 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8870 return Some(expr2_0); 8871 } 8872 } 8873 } 8874 &InstructionData::Load { 8875 opcode: ref pattern5_0, 8876 arg: pattern5_1, 8877 flags: pattern5_2, 8878 offset: pattern5_3, 8879 } => { 8880 if let &Opcode::Load = pattern5_0 { 8881 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8882 // Rule at src/isa/s390x/lower.isle line 1233. 8883 let expr0_0 = 8884 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8885 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8886 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8887 return Some(expr2_0); 8888 } 8889 } 8890 } 8891 _ => {} 8892 } 8893 } 8894 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8895 match &pattern3_0 { 8896 &InstructionData::NullAry { 8897 opcode: ref pattern4_0, 8898 } => { 8899 if let &Opcode::Null = pattern4_0 { 8900 // Rule at src/isa/s390x/lower.isle line 41. 8901 let expr0_0: u64 = 0; 8902 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8903 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8904 return Some(expr2_0); 8905 } 8906 } 8907 &InstructionData::UnaryImm { 8908 opcode: ref pattern4_0, 8909 imm: pattern4_1, 8910 } => { 8911 if let &Opcode::Iconst = pattern4_0 { 8912 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8913 // Rule at src/isa/s390x/lower.isle line 15. 8914 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8915 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8916 return Some(expr1_0); 8917 } 8918 } 8919 &InstructionData::StackLoad { 8920 opcode: ref pattern4_0, 8921 stack_slot: pattern4_1, 8922 offset: pattern4_2, 8923 } => { 8924 if let &Opcode::StackAddr = pattern4_0 { 8925 // Rule at src/isa/s390x/lower.isle line 1152. 8926 let expr0_0 = 8927 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8928 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8929 return Some(expr1_0); 8930 } 8931 } 8932 &InstructionData::UnaryBool { 8933 opcode: ref pattern4_0, 8934 imm: pattern4_1, 8935 } => { 8936 if let &Opcode::Bconst = pattern4_0 { 8937 if pattern4_1 == true { 8938 // Rule at src/isa/s390x/lower.isle line 23. 8939 let expr0_0: u64 = 1; 8940 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8941 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8942 return Some(expr2_0); 8943 } 8944 if pattern4_1 == false { 8945 // Rule at src/isa/s390x/lower.isle line 21. 8946 let expr0_0: u64 = 0; 8947 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8948 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8949 return Some(expr2_0); 8950 } 8951 } 8952 } 8953 &InstructionData::Binary { 8954 opcode: ref pattern4_0, 8955 args: ref pattern4_1, 8956 } => { 8957 match pattern4_0 { 8958 &Opcode::Fadd => { 8959 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8960 // Rule at src/isa/s390x/lower.isle line 920. 8961 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8962 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8963 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8964 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8965 return Some(expr3_0); 8966 } 8967 &Opcode::Fsub => { 8968 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8969 // Rule at src/isa/s390x/lower.isle line 927. 8970 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8971 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8972 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8973 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8974 return Some(expr3_0); 8975 } 8976 &Opcode::Fmul => { 8977 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8978 // Rule at src/isa/s390x/lower.isle line 934. 8979 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8980 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8981 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8982 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8983 return Some(expr3_0); 8984 } 8985 &Opcode::Fdiv => { 8986 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8987 // Rule at src/isa/s390x/lower.isle line 941. 8988 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8989 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8990 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8991 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8992 return Some(expr3_0); 8993 } 8994 &Opcode::Fcopysign => { 8995 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8996 // Rule at src/isa/s390x/lower.isle line 962. 8997 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8998 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8999 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 9000 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9001 return Some(expr3_0); 9002 } 9003 &Opcode::Fmin => { 9004 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9005 // Rule at src/isa/s390x/lower.isle line 948. 9006 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9007 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9008 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9009 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9010 return Some(expr3_0); 9011 } 9012 &Opcode::Fmax => { 9013 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9014 // Rule at src/isa/s390x/lower.isle line 955. 9015 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9016 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9017 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9018 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9019 return Some(expr3_0); 9020 } 9021 _ => {} 9022 } 9023 } 9024 &InstructionData::FloatCompare { 9025 opcode: ref pattern4_0, 9026 args: ref pattern4_1, 9027 cond: ref pattern4_2, 9028 } => { 9029 if let &Opcode::Fcmp = pattern4_0 { 9030 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9031 // Rule at src/isa/s390x/lower.isle line 2004. 9032 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 9033 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 9034 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9035 return Some(expr2_0); 9036 } 9037 } 9038 &InstructionData::IntCompare { 9039 opcode: ref pattern4_0, 9040 args: ref pattern4_1, 9041 cond: ref pattern4_2, 9042 } => { 9043 if let &Opcode::Icmp = pattern4_0 { 9044 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 9045 // Rule at src/isa/s390x/lower.isle line 1915. 9046 let expr0_0: bool = true; 9047 let expr1_0 = 9048 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 9049 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 9050 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9051 return Some(expr3_0); 9052 } 9053 } 9054 &InstructionData::Ternary { 9055 opcode: ref pattern4_0, 9056 args: ref pattern4_1, 9057 } => { 9058 match pattern4_0 { 9059 &Opcode::Select => { 9060 let (pattern6_0, pattern6_1, pattern6_2) = 9061 C::unpack_value_array_3(ctx, pattern4_1); 9062 // Rule at src/isa/s390x/lower.isle line 2046. 9063 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 9064 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9065 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9066 let expr3_0 = constructor_select_bool_reg( 9067 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 9068 )?; 9069 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9070 return Some(expr4_0); 9071 } 9072 &Opcode::Fma => { 9073 let (pattern6_0, pattern6_1, pattern6_2) = 9074 C::unpack_value_array_3(ctx, pattern4_1); 9075 // Rule at src/isa/s390x/lower.isle line 969. 9076 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 9077 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 9078 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 9079 let expr3_0 = 9080 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 9081 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9082 return Some(expr4_0); 9083 } 9084 _ => {} 9085 } 9086 } 9087 &InstructionData::IntSelect { 9088 opcode: ref pattern4_0, 9089 args: ref pattern4_1, 9090 cond: ref pattern4_2, 9091 } => { 9092 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9093 let (pattern6_0, pattern6_1, pattern6_2) = 9094 C::unpack_value_array_3(ctx, pattern4_1); 9095 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9096 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9097 if let &InstructionData::Binary { 9098 opcode: ref pattern9_0, 9099 args: ref pattern9_1, 9100 } = &pattern8_0 9101 { 9102 if let &Opcode::Ifcmp = pattern9_0 { 9103 let (pattern11_0, pattern11_1) = 9104 C::unpack_value_array_2(ctx, pattern9_1); 9105 // Rule at src/isa/s390x/lower.isle line 2058. 9106 let expr0_0: bool = false; 9107 let expr1_0 = constructor_icmp_val( 9108 ctx, 9109 expr0_0, 9110 pattern4_2, 9111 pattern11_0, 9112 pattern11_1, 9113 )?; 9114 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9115 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9116 let expr4_0 = constructor_select_bool_reg( 9117 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9118 )?; 9119 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9120 return Some(expr5_0); 9121 } 9122 } 9123 } 9124 } 9125 } 9126 &InstructionData::Unary { 9127 opcode: ref pattern4_0, 9128 arg: pattern4_1, 9129 } => { 9130 match pattern4_0 { 9131 &Opcode::Sqrt => { 9132 // Rule at src/isa/s390x/lower.isle line 976. 9133 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9134 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9135 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9136 return Some(expr2_0); 9137 } 9138 &Opcode::Fneg => { 9139 // Rule at src/isa/s390x/lower.isle line 983. 9140 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9141 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9142 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9143 return Some(expr2_0); 9144 } 9145 &Opcode::Fabs => { 9146 // Rule at src/isa/s390x/lower.isle line 990. 9147 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9148 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9149 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9150 return Some(expr2_0); 9151 } 9152 &Opcode::Ceil => { 9153 // Rule at src/isa/s390x/lower.isle line 997. 9154 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9155 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9156 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9157 return Some(expr2_0); 9158 } 9159 &Opcode::Floor => { 9160 // Rule at src/isa/s390x/lower.isle line 1004. 9161 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9162 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9163 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9164 return Some(expr2_0); 9165 } 9166 &Opcode::Trunc => { 9167 // Rule at src/isa/s390x/lower.isle line 1011. 9168 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9169 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9170 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9171 return Some(expr2_0); 9172 } 9173 &Opcode::Nearest => { 9174 // Rule at src/isa/s390x/lower.isle line 1018. 9175 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9176 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9177 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9178 return Some(expr2_0); 9179 } 9180 &Opcode::Bextend => { 9181 // Rule at src/isa/s390x/lower.isle line 760. 9182 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9183 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9184 return Some(expr1_0); 9185 } 9186 &Opcode::Bmask => { 9187 // Rule at src/isa/s390x/lower.isle line 762. 9188 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9189 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9190 return Some(expr1_0); 9191 } 9192 &Opcode::Fpromote => { 9193 let pattern6_0 = C::value_type(ctx, pattern4_1); 9194 // Rule at src/isa/s390x/lower.isle line 1025. 9195 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9196 let expr1_0 = 9197 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9198 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9199 return Some(expr2_0); 9200 } 9201 &Opcode::Fdemote => { 9202 let pattern6_0 = C::value_type(ctx, pattern4_1); 9203 // Rule at src/isa/s390x/lower.isle line 1032. 9204 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9205 let expr1_0 = 9206 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9207 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9208 return Some(expr2_0); 9209 } 9210 &Opcode::FcvtFromUint => { 9211 let pattern6_0 = C::value_type(ctx, pattern4_1); 9212 // Rule at src/isa/s390x/lower.isle line 1039. 9213 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9214 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9215 let expr2_0 = 9216 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9217 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9218 return Some(expr3_0); 9219 } 9220 &Opcode::FcvtFromSint => { 9221 let pattern6_0 = C::value_type(ctx, pattern4_1); 9222 // Rule at src/isa/s390x/lower.isle line 1047. 9223 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9224 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9225 let expr2_0 = 9226 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9227 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9228 return Some(expr3_0); 9229 } 9230 _ => {} 9231 } 9232 } 9233 _ => {} 9234 } 9235 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9236 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9237 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9238 match &pattern5_0 { 9239 &InstructionData::Binary { 9240 opcode: ref pattern6_0, 9241 args: ref pattern6_1, 9242 } => { 9243 match pattern6_0 { 9244 &Opcode::BandNot => { 9245 let (pattern8_0, pattern8_1) = 9246 C::unpack_value_array_2(ctx, pattern6_1); 9247 // Rule at src/isa/s390x/lower.isle line 702. 9248 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9249 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9250 let expr2_0 = 9251 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9252 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9253 return Some(expr3_0); 9254 } 9255 &Opcode::BorNot => { 9256 let (pattern8_0, pattern8_1) = 9257 C::unpack_value_array_2(ctx, pattern6_1); 9258 // Rule at src/isa/s390x/lower.isle line 713. 9259 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9260 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9261 let expr2_0 = 9262 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9263 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9264 return Some(expr3_0); 9265 } 9266 &Opcode::BxorNot => { 9267 let (pattern8_0, pattern8_1) = 9268 C::unpack_value_array_2(ctx, pattern6_1); 9269 // Rule at src/isa/s390x/lower.isle line 724. 9270 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9271 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9272 let expr2_0 = 9273 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9274 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9275 return Some(expr3_0); 9276 } 9277 _ => {} 9278 } 9279 } 9280 &InstructionData::Ternary { 9281 opcode: ref pattern6_0, 9282 args: ref pattern6_1, 9283 } => { 9284 if let &Opcode::Bitselect = pattern6_0 { 9285 let (pattern8_0, pattern8_1, pattern8_2) = 9286 C::unpack_value_array_3(ctx, pattern6_1); 9287 // Rule at src/isa/s390x/lower.isle line 735. 9288 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9289 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9290 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9291 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9292 let expr4_0 = 9293 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9294 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9295 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9296 return Some(expr6_0); 9297 } 9298 } 9299 &InstructionData::Unary { 9300 opcode: ref pattern6_0, 9301 arg: pattern6_1, 9302 } => { 9303 match pattern6_0 { 9304 &Opcode::Bnot => { 9305 // Rule at src/isa/s390x/lower.isle line 625. 9306 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9307 let expr1_0 = 9308 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9309 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9310 return Some(expr2_0); 9311 } 9312 &Opcode::Popcnt => { 9313 // Rule at src/isa/s390x/lower.isle line 889. 9314 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9315 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9316 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9317 return Some(expr2_0); 9318 } 9319 _ => {} 9320 } 9321 } 9322 _ => {} 9323 } 9324 } 9325 } 9326 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9327 if pattern2_0 == I16 { 9328 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9329 if let &InstructionData::Unary { 9330 opcode: ref pattern6_0, 9331 arg: pattern6_1, 9332 } = &pattern5_0 9333 { 9334 if let &Opcode::Popcnt = pattern6_0 { 9335 // Rule at src/isa/s390x/lower.isle line 898. 9336 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9337 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9338 let expr2_0: Type = I32; 9339 let expr3_0: Type = I32; 9340 let expr4_0: u8 = 8; 9341 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9342 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9343 let expr7_0: Type = I32; 9344 let expr8_0: u8 = 8; 9345 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9346 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9347 return Some(expr10_0); 9348 } 9349 } 9350 } 9351 if pattern2_0 == I32 { 9352 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9353 if let &InstructionData::Unary { 9354 opcode: ref pattern6_0, 9355 arg: pattern6_1, 9356 } = &pattern5_0 9357 { 9358 if let &Opcode::Popcnt = pattern6_0 { 9359 // Rule at src/isa/s390x/lower.isle line 903. 9360 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9361 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9362 let expr2_0: Type = I32; 9363 let expr3_0: Type = I32; 9364 let expr4_0: u8 = 16; 9365 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9366 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9367 let expr7_0: Type = I32; 9368 let expr8_0: Type = I32; 9369 let expr9_0: u8 = 8; 9370 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9371 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9372 let expr12_0: Type = I32; 9373 let expr13_0: u8 = 24; 9374 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9375 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9376 return Some(expr15_0); 9377 } 9378 } 9379 } 9380 if pattern2_0 == I64 { 9381 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9382 if let &InstructionData::Unary { 9383 opcode: ref pattern6_0, 9384 arg: pattern6_1, 9385 } = &pattern5_0 9386 { 9387 if let &Opcode::Popcnt = pattern6_0 { 9388 // Rule at src/isa/s390x/lower.isle line 909. 9389 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9390 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9391 let expr2_0: Type = I64; 9392 let expr3_0: Type = I64; 9393 let expr4_0: u8 = 32; 9394 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9395 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9396 let expr7_0: Type = I64; 9397 let expr8_0: Type = I64; 9398 let expr9_0: u8 = 16; 9399 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9400 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9401 let expr12_0: Type = I64; 9402 let expr13_0: Type = I64; 9403 let expr14_0: u8 = 8; 9404 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9405 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9406 let expr17_0: Type = I64; 9407 let expr18_0: u8 = 56; 9408 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9409 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9410 return Some(expr20_0); 9411 } 9412 } 9413 } 9414 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9415 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9416 match &pattern5_0 { 9417 &InstructionData::Binary { 9418 opcode: ref pattern6_0, 9419 args: ref pattern6_1, 9420 } => { 9421 match pattern6_0 { 9422 &Opcode::BandNot => { 9423 let (pattern8_0, pattern8_1) = 9424 C::unpack_value_array_2(ctx, pattern6_1); 9425 // Rule at src/isa/s390x/lower.isle line 706. 9426 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9427 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9428 let expr2_0 = 9429 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9430 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9431 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9432 return Some(expr4_0); 9433 } 9434 &Opcode::BorNot => { 9435 let (pattern8_0, pattern8_1) = 9436 C::unpack_value_array_2(ctx, pattern6_1); 9437 // Rule at src/isa/s390x/lower.isle line 717. 9438 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9439 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9440 let expr2_0 = 9441 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9442 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9443 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9444 return Some(expr4_0); 9445 } 9446 &Opcode::BxorNot => { 9447 let (pattern8_0, pattern8_1) = 9448 C::unpack_value_array_2(ctx, pattern6_1); 9449 // Rule at src/isa/s390x/lower.isle line 728. 9450 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9451 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9452 let expr2_0 = 9453 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9454 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9455 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9456 return Some(expr4_0); 9457 } 9458 _ => {} 9459 } 9460 } 9461 &InstructionData::Ternary { 9462 opcode: ref pattern6_0, 9463 args: ref pattern6_1, 9464 } => { 9465 if let &Opcode::Bitselect = pattern6_0 { 9466 let (pattern8_0, pattern8_1, pattern8_2) = 9467 C::unpack_value_array_3(ctx, pattern6_1); 9468 // Rule at src/isa/s390x/lower.isle line 742. 9469 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9470 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9471 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9472 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9473 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9474 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9475 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9476 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9477 return Some(expr7_0); 9478 } 9479 } 9480 &InstructionData::Unary { 9481 opcode: ref pattern6_0, 9482 arg: pattern6_1, 9483 } => { 9484 if let &Opcode::Bnot = pattern6_0 { 9485 // Rule at src/isa/s390x/lower.isle line 630. 9486 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9487 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9488 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9489 return Some(expr2_0); 9490 } 9491 } 9492 _ => {} 9493 } 9494 } 9495 } 9496 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9497 if pattern2_0 == F32 { 9498 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9499 if let &InstructionData::Load { 9500 opcode: ref pattern6_0, 9501 arg: pattern6_1, 9502 flags: pattern6_2, 9503 offset: pattern6_3, 9504 } = &pattern5_0 9505 { 9506 if let &Opcode::Load = pattern6_0 { 9507 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9508 // Rule at src/isa/s390x/lower.isle line 1222. 9509 let expr0_0 = 9510 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9511 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9512 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9513 return Some(expr2_0); 9514 } 9515 } 9516 } 9517 } 9518 if pattern2_0 == F64 { 9519 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9520 if let &InstructionData::Load { 9521 opcode: ref pattern6_0, 9522 arg: pattern6_1, 9523 flags: pattern6_2, 9524 offset: pattern6_3, 9525 } = &pattern5_0 9526 { 9527 if let &Opcode::Load = pattern6_0 { 9528 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9529 // Rule at src/isa/s390x/lower.isle line 1237. 9530 let expr0_0 = 9531 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9532 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9533 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9534 return Some(expr2_0); 9535 } 9536 } 9537 } 9538 } 9539 } 9540 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9541 if pattern2_0 == F32 { 9542 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9543 if let &InstructionData::Load { 9544 opcode: ref pattern6_0, 9545 arg: pattern6_1, 9546 flags: pattern6_2, 9547 offset: pattern6_3, 9548 } = &pattern5_0 9549 { 9550 if let &Opcode::Load = pattern6_0 { 9551 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9552 // Rule at src/isa/s390x/lower.isle line 1227. 9553 let expr0_0 = 9554 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9555 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9556 let expr2_0: Type = I64; 9557 let expr3_0: u8 = 32; 9558 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9559 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9560 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9561 return Some(expr6_0); 9562 } 9563 } 9564 } 9565 } 9566 if pattern2_0 == F64 { 9567 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9568 if let &InstructionData::Load { 9569 opcode: ref pattern6_0, 9570 arg: pattern6_1, 9571 flags: pattern6_2, 9572 offset: pattern6_3, 9573 } = &pattern5_0 9574 { 9575 if let &Opcode::Load = pattern6_0 { 9576 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9577 // Rule at src/isa/s390x/lower.isle line 1242. 9578 let expr0_0 = 9579 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9580 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9581 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9582 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9583 return Some(expr3_0); 9584 } 9585 } 9586 } 9587 } 9588 } 9589 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9590 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9591 if let &InstructionData::Unary { 9592 opcode: ref pattern5_0, 9593 arg: pattern5_1, 9594 } = &pattern4_0 9595 { 9596 if let &Opcode::Bint = pattern5_0 { 9597 // Rule at src/isa/s390x/lower.isle line 796. 9598 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9599 let expr1_0: u16 = 1; 9600 let expr2_0: u8 = 0; 9601 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9602 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9603 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9604 return Some(expr5_0); 9605 } 9606 } 9607 } 9608 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9609 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9610 if let &InstructionData::Unary { 9611 opcode: ref pattern5_0, 9612 arg: pattern5_1, 9613 } = &pattern4_0 9614 { 9615 if let &Opcode::Bint = pattern5_0 { 9616 // Rule at src/isa/s390x/lower.isle line 800. 9617 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9618 let expr1_0: u32 = 1; 9619 let expr2_0: u8 = 0; 9620 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9621 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9622 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9623 return Some(expr5_0); 9624 } 9625 } 9626 } 9627 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9628 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9629 match &pattern4_0 { 9630 &InstructionData::Binary { 9631 opcode: ref pattern5_0, 9632 args: ref pattern5_1, 9633 } => { 9634 match pattern5_0 { 9635 &Opcode::Iadd => { 9636 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9637 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9638 // Rule at src/isa/s390x/lower.isle line 72. 9639 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9640 let expr1_0 = 9641 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9642 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9643 return Some(expr2_0); 9644 } 9645 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9646 // Rule at src/isa/s390x/lower.isle line 76. 9647 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9648 let expr1_0 = 9649 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9650 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9651 return Some(expr2_0); 9652 } 9653 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9654 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9655 if let &InstructionData::Unary { 9656 opcode: ref pattern10_0, 9657 arg: pattern10_1, 9658 } = &pattern9_0 9659 { 9660 if let &Opcode::Sextend = pattern10_0 { 9661 let pattern12_0 = C::value_type(ctx, pattern10_1); 9662 if pattern12_0 == I32 { 9663 // Rule at src/isa/s390x/lower.isle line 66. 9664 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9665 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9666 let expr2_0 = constructor_add_reg_sext32( 9667 ctx, pattern3_0, expr0_0, expr1_0, 9668 )?; 9669 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9670 return Some(expr3_0); 9671 } 9672 } 9673 } 9674 } 9675 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9676 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9677 if let &InstructionData::Load { 9678 opcode: ref pattern10_0, 9679 arg: pattern10_1, 9680 flags: pattern10_2, 9681 offset: pattern10_3, 9682 } = &pattern9_0 9683 { 9684 match pattern10_0 { 9685 &Opcode::Sload16 => { 9686 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9687 // Rule at src/isa/s390x/lower.isle line 94. 9688 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9689 let expr1_0 = 9690 constructor_sink_sload16(ctx, pattern8_0)?; 9691 let expr2_0 = constructor_add_mem_sext16( 9692 ctx, pattern3_0, expr0_0, &expr1_0, 9693 )?; 9694 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9695 return Some(expr3_0); 9696 } 9697 } 9698 &Opcode::Sload32 => { 9699 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9700 // Rule at src/isa/s390x/lower.isle line 98. 9701 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9702 let expr1_0 = 9703 constructor_sink_sload32(ctx, pattern8_0)?; 9704 let expr2_0 = constructor_add_mem_sext32( 9705 ctx, pattern3_0, expr0_0, &expr1_0, 9706 )?; 9707 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9708 return Some(expr3_0); 9709 } 9710 } 9711 _ => {} 9712 } 9713 } 9714 } 9715 let pattern8_0 = C::value_type(ctx, pattern7_0); 9716 if pattern8_0 == I16 { 9717 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9718 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9719 if let &InstructionData::Load { 9720 opcode: ref pattern12_0, 9721 arg: pattern12_1, 9722 flags: pattern12_2, 9723 offset: pattern12_3, 9724 } = &pattern11_0 9725 { 9726 if let &Opcode::Load = pattern12_0 { 9727 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9728 // Rule at src/isa/s390x/lower.isle line 88. 9729 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9730 let expr1_0 = 9731 constructor_sink_load(ctx, pattern10_0)?; 9732 let expr2_0 = constructor_add_mem_sext16( 9733 ctx, pattern3_0, expr0_0, &expr1_0, 9734 )?; 9735 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9736 return Some(expr3_0); 9737 } 9738 } 9739 } 9740 } 9741 } 9742 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9743 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9744 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9745 if let &InstructionData::Load { 9746 opcode: ref pattern12_0, 9747 arg: pattern12_1, 9748 flags: pattern12_2, 9749 offset: pattern12_3, 9750 } = &pattern11_0 9751 { 9752 if let &Opcode::Load = pattern12_0 { 9753 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9754 // Rule at src/isa/s390x/lower.isle line 82. 9755 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9756 let expr1_0 = 9757 constructor_sink_load(ctx, pattern10_0)?; 9758 let expr2_0 = constructor_add_mem( 9759 ctx, pattern3_0, expr0_0, &expr1_0, 9760 )?; 9761 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9762 return Some(expr3_0); 9763 } 9764 } 9765 } 9766 } 9767 } 9768 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9769 // Rule at src/isa/s390x/lower.isle line 70. 9770 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9771 let expr1_0 = 9772 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9773 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9774 return Some(expr2_0); 9775 } 9776 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9777 // Rule at src/isa/s390x/lower.isle line 74. 9778 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9779 let expr1_0 = 9780 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9781 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9782 return Some(expr2_0); 9783 } 9784 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9785 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9786 if let &InstructionData::Unary { 9787 opcode: ref pattern10_0, 9788 arg: pattern10_1, 9789 } = &pattern9_0 9790 { 9791 if let &Opcode::Sextend = pattern10_0 { 9792 let pattern12_0 = C::value_type(ctx, pattern10_1); 9793 if pattern12_0 == I32 { 9794 // Rule at src/isa/s390x/lower.isle line 64. 9795 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9796 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9797 let expr2_0 = constructor_add_reg_sext32( 9798 ctx, pattern3_0, expr0_0, expr1_0, 9799 )?; 9800 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9801 return Some(expr3_0); 9802 } 9803 } 9804 } 9805 } 9806 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9807 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9808 if let &InstructionData::Load { 9809 opcode: ref pattern10_0, 9810 arg: pattern10_1, 9811 flags: pattern10_2, 9812 offset: pattern10_3, 9813 } = &pattern9_0 9814 { 9815 match pattern10_0 { 9816 &Opcode::Sload16 => { 9817 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9818 // Rule at src/isa/s390x/lower.isle line 92. 9819 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9820 let expr1_0 = 9821 constructor_sink_sload16(ctx, pattern8_0)?; 9822 let expr2_0 = constructor_add_mem_sext16( 9823 ctx, pattern3_0, expr0_0, &expr1_0, 9824 )?; 9825 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9826 return Some(expr3_0); 9827 } 9828 } 9829 &Opcode::Sload32 => { 9830 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9831 // Rule at src/isa/s390x/lower.isle line 96. 9832 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9833 let expr1_0 = 9834 constructor_sink_sload32(ctx, pattern8_0)?; 9835 let expr2_0 = constructor_add_mem_sext32( 9836 ctx, pattern3_0, expr0_0, &expr1_0, 9837 )?; 9838 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9839 return Some(expr3_0); 9840 } 9841 } 9842 _ => {} 9843 } 9844 } 9845 } 9846 let pattern8_0 = C::value_type(ctx, pattern7_1); 9847 if pattern8_0 == I16 { 9848 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9849 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9850 if let &InstructionData::Load { 9851 opcode: ref pattern12_0, 9852 arg: pattern12_1, 9853 flags: pattern12_2, 9854 offset: pattern12_3, 9855 } = &pattern11_0 9856 { 9857 if let &Opcode::Load = pattern12_0 { 9858 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9859 // Rule at src/isa/s390x/lower.isle line 86. 9860 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9861 let expr1_0 = 9862 constructor_sink_load(ctx, pattern10_0)?; 9863 let expr2_0 = constructor_add_mem_sext16( 9864 ctx, pattern3_0, expr0_0, &expr1_0, 9865 )?; 9866 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9867 return Some(expr3_0); 9868 } 9869 } 9870 } 9871 } 9872 } 9873 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9874 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9875 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9876 if let &InstructionData::Load { 9877 opcode: ref pattern12_0, 9878 arg: pattern12_1, 9879 flags: pattern12_2, 9880 offset: pattern12_3, 9881 } = &pattern11_0 9882 { 9883 if let &Opcode::Load = pattern12_0 { 9884 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9885 // Rule at src/isa/s390x/lower.isle line 80. 9886 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9887 let expr1_0 = 9888 constructor_sink_load(ctx, pattern10_0)?; 9889 let expr2_0 = constructor_add_mem( 9890 ctx, pattern3_0, expr0_0, &expr1_0, 9891 )?; 9892 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9893 return Some(expr3_0); 9894 } 9895 } 9896 } 9897 } 9898 } 9899 // Rule at src/isa/s390x/lower.isle line 60. 9900 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9901 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9902 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9903 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9904 return Some(expr3_0); 9905 } 9906 &Opcode::Isub => { 9907 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9908 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9909 // Rule at src/isa/s390x/lower.isle line 113. 9910 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9911 let expr1_0 = 9912 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9913 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9914 return Some(expr2_0); 9915 } 9916 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9917 // Rule at src/isa/s390x/lower.isle line 115. 9918 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9919 let expr1_0 = 9920 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9921 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9922 return Some(expr2_0); 9923 } 9924 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9925 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9926 if let &InstructionData::Unary { 9927 opcode: ref pattern10_0, 9928 arg: pattern10_1, 9929 } = &pattern9_0 9930 { 9931 if let &Opcode::Sextend = pattern10_0 { 9932 let pattern12_0 = C::value_type(ctx, pattern10_1); 9933 if pattern12_0 == I32 { 9934 // Rule at src/isa/s390x/lower.isle line 109. 9935 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9936 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9937 let expr2_0 = constructor_sub_reg_sext32( 9938 ctx, pattern3_0, expr0_0, expr1_0, 9939 )?; 9940 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9941 return Some(expr3_0); 9942 } 9943 } 9944 } 9945 } 9946 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9947 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9948 if let &InstructionData::Load { 9949 opcode: ref pattern10_0, 9950 arg: pattern10_1, 9951 flags: pattern10_2, 9952 offset: pattern10_3, 9953 } = &pattern9_0 9954 { 9955 match pattern10_0 { 9956 &Opcode::Sload16 => { 9957 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9958 // Rule at src/isa/s390x/lower.isle line 127. 9959 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9960 let expr1_0 = 9961 constructor_sink_sload16(ctx, pattern8_0)?; 9962 let expr2_0 = constructor_sub_mem_sext16( 9963 ctx, pattern3_0, expr0_0, &expr1_0, 9964 )?; 9965 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9966 return Some(expr3_0); 9967 } 9968 } 9969 &Opcode::Sload32 => { 9970 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9971 // Rule at src/isa/s390x/lower.isle line 129. 9972 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9973 let expr1_0 = 9974 constructor_sink_sload32(ctx, pattern8_0)?; 9975 let expr2_0 = constructor_sub_mem_sext32( 9976 ctx, pattern3_0, expr0_0, &expr1_0, 9977 )?; 9978 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9979 return Some(expr3_0); 9980 } 9981 } 9982 _ => {} 9983 } 9984 } 9985 } 9986 let pattern8_0 = C::value_type(ctx, pattern7_1); 9987 if pattern8_0 == I16 { 9988 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9989 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9990 if let &InstructionData::Load { 9991 opcode: ref pattern12_0, 9992 arg: pattern12_1, 9993 flags: pattern12_2, 9994 offset: pattern12_3, 9995 } = &pattern11_0 9996 { 9997 if let &Opcode::Load = pattern12_0 { 9998 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9999 // Rule at src/isa/s390x/lower.isle line 123. 10000 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10001 let expr1_0 = 10002 constructor_sink_load(ctx, pattern10_0)?; 10003 let expr2_0 = constructor_sub_mem_sext16( 10004 ctx, pattern3_0, expr0_0, &expr1_0, 10005 )?; 10006 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10007 return Some(expr3_0); 10008 } 10009 } 10010 } 10011 } 10012 } 10013 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10014 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10015 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10016 if let &InstructionData::Load { 10017 opcode: ref pattern12_0, 10018 arg: pattern12_1, 10019 flags: pattern12_2, 10020 offset: pattern12_3, 10021 } = &pattern11_0 10022 { 10023 if let &Opcode::Load = pattern12_0 { 10024 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10025 // Rule at src/isa/s390x/lower.isle line 119. 10026 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10027 let expr1_0 = 10028 constructor_sink_load(ctx, pattern10_0)?; 10029 let expr2_0 = constructor_sub_mem( 10030 ctx, pattern3_0, expr0_0, &expr1_0, 10031 )?; 10032 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10033 return Some(expr3_0); 10034 } 10035 } 10036 } 10037 } 10038 } 10039 // Rule at src/isa/s390x/lower.isle line 105. 10040 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10041 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10042 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10043 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10044 return Some(expr3_0); 10045 } 10046 &Opcode::Imul => { 10047 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10048 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 10049 // Rule at src/isa/s390x/lower.isle line 212. 10050 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10051 let expr1_0 = 10052 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10053 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10054 return Some(expr2_0); 10055 } 10056 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 10057 // Rule at src/isa/s390x/lower.isle line 216. 10058 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10059 let expr1_0 = 10060 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10061 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10062 return Some(expr2_0); 10063 } 10064 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10065 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10066 if let &InstructionData::Unary { 10067 opcode: ref pattern10_0, 10068 arg: pattern10_1, 10069 } = &pattern9_0 10070 { 10071 if let &Opcode::Sextend = pattern10_0 { 10072 let pattern12_0 = C::value_type(ctx, pattern10_1); 10073 if pattern12_0 == I32 { 10074 // Rule at src/isa/s390x/lower.isle line 206. 10075 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10076 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10077 let expr2_0 = constructor_mul_reg_sext32( 10078 ctx, pattern3_0, expr0_0, expr1_0, 10079 )?; 10080 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10081 return Some(expr3_0); 10082 } 10083 } 10084 } 10085 } 10086 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10087 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10088 if let &InstructionData::Load { 10089 opcode: ref pattern10_0, 10090 arg: pattern10_1, 10091 flags: pattern10_2, 10092 offset: pattern10_3, 10093 } = &pattern9_0 10094 { 10095 match pattern10_0 { 10096 &Opcode::Sload16 => { 10097 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10098 // Rule at src/isa/s390x/lower.isle line 234. 10099 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10100 let expr1_0 = 10101 constructor_sink_sload16(ctx, pattern8_0)?; 10102 let expr2_0 = constructor_mul_mem_sext16( 10103 ctx, pattern3_0, expr0_0, &expr1_0, 10104 )?; 10105 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10106 return Some(expr3_0); 10107 } 10108 } 10109 &Opcode::Sload32 => { 10110 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10111 // Rule at src/isa/s390x/lower.isle line 238. 10112 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10113 let expr1_0 = 10114 constructor_sink_sload32(ctx, pattern8_0)?; 10115 let expr2_0 = constructor_mul_mem_sext32( 10116 ctx, pattern3_0, expr0_0, &expr1_0, 10117 )?; 10118 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10119 return Some(expr3_0); 10120 } 10121 } 10122 _ => {} 10123 } 10124 } 10125 } 10126 let pattern8_0 = C::value_type(ctx, pattern7_0); 10127 if pattern8_0 == I16 { 10128 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10129 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10130 if let &InstructionData::Load { 10131 opcode: ref pattern12_0, 10132 arg: pattern12_1, 10133 flags: pattern12_2, 10134 offset: pattern12_3, 10135 } = &pattern11_0 10136 { 10137 if let &Opcode::Load = pattern12_0 { 10138 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10139 // Rule at src/isa/s390x/lower.isle line 228. 10140 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10141 let expr1_0 = 10142 constructor_sink_load(ctx, pattern10_0)?; 10143 let expr2_0 = constructor_mul_mem_sext16( 10144 ctx, pattern3_0, expr0_0, &expr1_0, 10145 )?; 10146 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10147 return Some(expr3_0); 10148 } 10149 } 10150 } 10151 } 10152 } 10153 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10154 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10155 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10156 if let &InstructionData::Load { 10157 opcode: ref pattern12_0, 10158 arg: pattern12_1, 10159 flags: pattern12_2, 10160 offset: pattern12_3, 10161 } = &pattern11_0 10162 { 10163 if let &Opcode::Load = pattern12_0 { 10164 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10165 // Rule at src/isa/s390x/lower.isle line 222. 10166 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10167 let expr1_0 = 10168 constructor_sink_load(ctx, pattern10_0)?; 10169 let expr2_0 = constructor_mul_mem( 10170 ctx, pattern3_0, expr0_0, &expr1_0, 10171 )?; 10172 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10173 return Some(expr3_0); 10174 } 10175 } 10176 } 10177 } 10178 } 10179 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10180 // Rule at src/isa/s390x/lower.isle line 210. 10181 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10182 let expr1_0 = 10183 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10184 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10185 return Some(expr2_0); 10186 } 10187 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10188 // Rule at src/isa/s390x/lower.isle line 214. 10189 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10190 let expr1_0 = 10191 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10192 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10193 return Some(expr2_0); 10194 } 10195 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10196 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10197 if let &InstructionData::Unary { 10198 opcode: ref pattern10_0, 10199 arg: pattern10_1, 10200 } = &pattern9_0 10201 { 10202 if let &Opcode::Sextend = pattern10_0 { 10203 let pattern12_0 = C::value_type(ctx, pattern10_1); 10204 if pattern12_0 == I32 { 10205 // Rule at src/isa/s390x/lower.isle line 204. 10206 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10207 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10208 let expr2_0 = constructor_mul_reg_sext32( 10209 ctx, pattern3_0, expr0_0, expr1_0, 10210 )?; 10211 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10212 return Some(expr3_0); 10213 } 10214 } 10215 } 10216 } 10217 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10218 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10219 if let &InstructionData::Load { 10220 opcode: ref pattern10_0, 10221 arg: pattern10_1, 10222 flags: pattern10_2, 10223 offset: pattern10_3, 10224 } = &pattern9_0 10225 { 10226 match pattern10_0 { 10227 &Opcode::Sload16 => { 10228 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10229 // Rule at src/isa/s390x/lower.isle line 232. 10230 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10231 let expr1_0 = 10232 constructor_sink_sload16(ctx, pattern8_0)?; 10233 let expr2_0 = constructor_mul_mem_sext16( 10234 ctx, pattern3_0, expr0_0, &expr1_0, 10235 )?; 10236 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10237 return Some(expr3_0); 10238 } 10239 } 10240 &Opcode::Sload32 => { 10241 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10242 // Rule at src/isa/s390x/lower.isle line 236. 10243 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10244 let expr1_0 = 10245 constructor_sink_sload32(ctx, pattern8_0)?; 10246 let expr2_0 = constructor_mul_mem_sext32( 10247 ctx, pattern3_0, expr0_0, &expr1_0, 10248 )?; 10249 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10250 return Some(expr3_0); 10251 } 10252 } 10253 _ => {} 10254 } 10255 } 10256 } 10257 let pattern8_0 = C::value_type(ctx, pattern7_1); 10258 if pattern8_0 == I16 { 10259 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10260 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10261 if let &InstructionData::Load { 10262 opcode: ref pattern12_0, 10263 arg: pattern12_1, 10264 flags: pattern12_2, 10265 offset: pattern12_3, 10266 } = &pattern11_0 10267 { 10268 if let &Opcode::Load = pattern12_0 { 10269 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10270 // Rule at src/isa/s390x/lower.isle line 226. 10271 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10272 let expr1_0 = 10273 constructor_sink_load(ctx, pattern10_0)?; 10274 let expr2_0 = constructor_mul_mem_sext16( 10275 ctx, pattern3_0, expr0_0, &expr1_0, 10276 )?; 10277 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10278 return Some(expr3_0); 10279 } 10280 } 10281 } 10282 } 10283 } 10284 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10285 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10286 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10287 if let &InstructionData::Load { 10288 opcode: ref pattern12_0, 10289 arg: pattern12_1, 10290 flags: pattern12_2, 10291 offset: pattern12_3, 10292 } = &pattern11_0 10293 { 10294 if let &Opcode::Load = pattern12_0 { 10295 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10296 // Rule at src/isa/s390x/lower.isle line 220. 10297 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10298 let expr1_0 = 10299 constructor_sink_load(ctx, pattern10_0)?; 10300 let expr2_0 = constructor_mul_mem( 10301 ctx, pattern3_0, expr0_0, &expr1_0, 10302 )?; 10303 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10304 return Some(expr3_0); 10305 } 10306 } 10307 } 10308 } 10309 } 10310 // Rule at src/isa/s390x/lower.isle line 200. 10311 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10312 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10313 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10314 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10315 return Some(expr3_0); 10316 } 10317 &Opcode::Udiv => { 10318 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10319 // Rule at src/isa/s390x/lower.isle line 303. 10320 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10321 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10322 let expr2_0: u64 = 0; 10323 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10324 let expr4_0 = 10325 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10326 let expr5_0 = 10327 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10328 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10329 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10330 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10331 ctx, expr0_0, expr7_0, expr6_0, 10332 )?; 10333 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10334 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10335 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10336 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10337 return Some(expr12_0); 10338 } 10339 &Opcode::Sdiv => { 10340 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10341 // Rule at src/isa/s390x/lower.isle line 375. 10342 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10343 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10344 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10345 let expr3_0 = 10346 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10347 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10348 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10349 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10350 ctx, expr0_0, expr5_0, expr4_0, 10351 )?; 10352 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10353 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10354 )?; 10355 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10356 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10357 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10358 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10359 return Some(expr11_0); 10360 } 10361 &Opcode::Urem => { 10362 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10363 // Rule at src/isa/s390x/lower.isle line 326. 10364 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10365 let expr1_0: u64 = 0; 10366 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10367 let expr3_0 = 10368 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10369 let expr4_0 = 10370 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10371 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10372 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10373 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10374 ctx, expr0_0, expr6_0, expr5_0, 10375 )?; 10376 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10377 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10378 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10379 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10380 return Some(expr11_0); 10381 } 10382 &Opcode::Srem => { 10383 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10384 // Rule at src/isa/s390x/lower.isle line 398. 10385 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10386 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10387 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10388 let expr3_0 = 10389 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10390 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10391 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10392 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10393 ctx, expr0_0, expr5_0, expr4_0, 10394 )?; 10395 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10396 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10397 )?; 10398 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10399 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10400 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10401 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10402 return Some(expr11_0); 10403 } 10404 &Opcode::IaddIfcout => { 10405 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10406 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10407 // Rule at src/isa/s390x/lower.isle line 170. 10408 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10409 let expr1_0 = constructor_add_logical_zimm32( 10410 ctx, pattern3_0, expr0_0, pattern8_0, 10411 )?; 10412 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10413 return Some(expr2_0); 10414 } 10415 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10416 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10417 if let &InstructionData::Unary { 10418 opcode: ref pattern10_0, 10419 arg: pattern10_1, 10420 } = &pattern9_0 10421 { 10422 if let &Opcode::Uextend = pattern10_0 { 10423 let pattern12_0 = C::value_type(ctx, pattern10_1); 10424 if pattern12_0 == I32 { 10425 // Rule at src/isa/s390x/lower.isle line 164. 10426 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10427 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10428 let expr2_0 = constructor_add_logical_reg_zext32( 10429 ctx, pattern3_0, expr0_0, expr1_0, 10430 )?; 10431 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10432 return Some(expr3_0); 10433 } 10434 } 10435 } 10436 } 10437 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10438 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10439 if let &InstructionData::Load { 10440 opcode: ref pattern10_0, 10441 arg: pattern10_1, 10442 flags: pattern10_2, 10443 offset: pattern10_3, 10444 } = &pattern9_0 10445 { 10446 if let &Opcode::Uload32 = pattern10_0 { 10447 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10448 // Rule at src/isa/s390x/lower.isle line 182. 10449 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10450 let expr1_0 = 10451 constructor_sink_uload32(ctx, pattern8_0)?; 10452 let expr2_0 = constructor_add_logical_mem_zext32( 10453 ctx, pattern3_0, expr0_0, &expr1_0, 10454 )?; 10455 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10456 return Some(expr3_0); 10457 } 10458 } 10459 } 10460 } 10461 let pattern8_0 = C::value_type(ctx, pattern7_0); 10462 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10463 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10464 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10465 if let &InstructionData::Load { 10466 opcode: ref pattern12_0, 10467 arg: pattern12_1, 10468 flags: pattern12_2, 10469 offset: pattern12_3, 10470 } = &pattern11_0 10471 { 10472 if let &Opcode::Load = pattern12_0 { 10473 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10474 // Rule at src/isa/s390x/lower.isle line 176. 10475 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10476 let expr1_0 = 10477 constructor_sink_load(ctx, pattern10_0)?; 10478 let expr2_0 = constructor_add_logical_mem( 10479 ctx, pattern3_0, expr0_0, &expr1_0, 10480 )?; 10481 let expr3_0 = 10482 constructor_output_ifcout(ctx, expr2_0)?; 10483 return Some(expr3_0); 10484 } 10485 } 10486 } 10487 } 10488 } 10489 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10490 // Rule at src/isa/s390x/lower.isle line 168. 10491 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10492 let expr1_0 = constructor_add_logical_zimm32( 10493 ctx, pattern3_0, expr0_0, pattern8_0, 10494 )?; 10495 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10496 return Some(expr2_0); 10497 } 10498 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10499 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10500 if let &InstructionData::Unary { 10501 opcode: ref pattern10_0, 10502 arg: pattern10_1, 10503 } = &pattern9_0 10504 { 10505 if let &Opcode::Uextend = pattern10_0 { 10506 let pattern12_0 = C::value_type(ctx, pattern10_1); 10507 if pattern12_0 == I32 { 10508 // Rule at src/isa/s390x/lower.isle line 162. 10509 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10510 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10511 let expr2_0 = constructor_add_logical_reg_zext32( 10512 ctx, pattern3_0, expr0_0, expr1_0, 10513 )?; 10514 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10515 return Some(expr3_0); 10516 } 10517 } 10518 } 10519 } 10520 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10521 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10522 if let &InstructionData::Load { 10523 opcode: ref pattern10_0, 10524 arg: pattern10_1, 10525 flags: pattern10_2, 10526 offset: pattern10_3, 10527 } = &pattern9_0 10528 { 10529 if let &Opcode::Uload32 = pattern10_0 { 10530 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10531 // Rule at src/isa/s390x/lower.isle line 180. 10532 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10533 let expr1_0 = 10534 constructor_sink_uload32(ctx, pattern8_0)?; 10535 let expr2_0 = constructor_add_logical_mem_zext32( 10536 ctx, pattern3_0, expr0_0, &expr1_0, 10537 )?; 10538 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10539 return Some(expr3_0); 10540 } 10541 } 10542 } 10543 } 10544 let pattern8_0 = C::value_type(ctx, pattern7_1); 10545 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10546 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10547 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10548 if let &InstructionData::Load { 10549 opcode: ref pattern12_0, 10550 arg: pattern12_1, 10551 flags: pattern12_2, 10552 offset: pattern12_3, 10553 } = &pattern11_0 10554 { 10555 if let &Opcode::Load = pattern12_0 { 10556 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10557 // Rule at src/isa/s390x/lower.isle line 174. 10558 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10559 let expr1_0 = 10560 constructor_sink_load(ctx, pattern10_0)?; 10561 let expr2_0 = constructor_add_logical_mem( 10562 ctx, pattern3_0, expr0_0, &expr1_0, 10563 )?; 10564 let expr3_0 = 10565 constructor_output_ifcout(ctx, expr2_0)?; 10566 return Some(expr3_0); 10567 } 10568 } 10569 } 10570 } 10571 } 10572 // Rule at src/isa/s390x/lower.isle line 158. 10573 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10574 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10575 let expr2_0 = 10576 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10577 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10578 return Some(expr3_0); 10579 } 10580 &Opcode::Band => { 10581 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10582 let pattern8_0 = C::value_type(ctx, pattern7_0); 10583 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10584 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10585 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10586 if let &InstructionData::Load { 10587 opcode: ref pattern12_0, 10588 arg: pattern12_1, 10589 flags: pattern12_2, 10590 offset: pattern12_3, 10591 } = &pattern11_0 10592 { 10593 if let &Opcode::Load = pattern12_0 { 10594 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10595 // Rule at src/isa/s390x/lower.isle line 653. 10596 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10597 let expr1_0 = 10598 constructor_sink_load(ctx, pattern10_0)?; 10599 let expr2_0 = constructor_and_mem( 10600 ctx, pattern3_0, expr0_0, &expr1_0, 10601 )?; 10602 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10603 return Some(expr3_0); 10604 } 10605 } 10606 } 10607 } 10608 } 10609 if let Some(pattern8_0) = 10610 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10611 { 10612 // Rule at src/isa/s390x/lower.isle line 647. 10613 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10614 let expr1_0 = constructor_and_uimm32shifted( 10615 ctx, pattern3_0, expr0_0, pattern8_0, 10616 )?; 10617 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10618 return Some(expr2_0); 10619 } 10620 if let Some(pattern8_0) = 10621 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10622 { 10623 // Rule at src/isa/s390x/lower.isle line 643. 10624 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10625 let expr1_0 = constructor_and_uimm16shifted( 10626 ctx, pattern3_0, expr0_0, pattern8_0, 10627 )?; 10628 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10629 return Some(expr2_0); 10630 } 10631 let pattern8_0 = C::value_type(ctx, pattern7_1); 10632 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10633 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10634 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10635 if let &InstructionData::Load { 10636 opcode: ref pattern12_0, 10637 arg: pattern12_1, 10638 flags: pattern12_2, 10639 offset: pattern12_3, 10640 } = &pattern11_0 10641 { 10642 if let &Opcode::Load = pattern12_0 { 10643 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10644 // Rule at src/isa/s390x/lower.isle line 651. 10645 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10646 let expr1_0 = 10647 constructor_sink_load(ctx, pattern10_0)?; 10648 let expr2_0 = constructor_and_mem( 10649 ctx, pattern3_0, expr0_0, &expr1_0, 10650 )?; 10651 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10652 return Some(expr3_0); 10653 } 10654 } 10655 } 10656 } 10657 } 10658 if let Some(pattern8_0) = 10659 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10660 { 10661 // Rule at src/isa/s390x/lower.isle line 645. 10662 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10663 let expr1_0 = constructor_and_uimm32shifted( 10664 ctx, pattern3_0, expr0_0, pattern8_0, 10665 )?; 10666 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10667 return Some(expr2_0); 10668 } 10669 if let Some(pattern8_0) = 10670 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10671 { 10672 // Rule at src/isa/s390x/lower.isle line 641. 10673 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10674 let expr1_0 = constructor_and_uimm16shifted( 10675 ctx, pattern3_0, expr0_0, pattern8_0, 10676 )?; 10677 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10678 return Some(expr2_0); 10679 } 10680 // Rule at src/isa/s390x/lower.isle line 637. 10681 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10682 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10683 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10684 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10685 return Some(expr3_0); 10686 } 10687 &Opcode::Bor => { 10688 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10689 let pattern8_0 = C::value_type(ctx, pattern7_0); 10690 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10691 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10692 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10693 if let &InstructionData::Load { 10694 opcode: ref pattern12_0, 10695 arg: pattern12_1, 10696 flags: pattern12_2, 10697 offset: pattern12_3, 10698 } = &pattern11_0 10699 { 10700 if let &Opcode::Load = pattern12_0 { 10701 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10702 // Rule at src/isa/s390x/lower.isle line 676. 10703 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10704 let expr1_0 = 10705 constructor_sink_load(ctx, pattern10_0)?; 10706 let expr2_0 = constructor_or_mem( 10707 ctx, pattern3_0, expr0_0, &expr1_0, 10708 )?; 10709 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10710 return Some(expr3_0); 10711 } 10712 } 10713 } 10714 } 10715 } 10716 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10717 // Rule at src/isa/s390x/lower.isle line 670. 10718 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10719 let expr1_0 = constructor_or_uimm32shifted( 10720 ctx, pattern3_0, expr0_0, pattern8_0, 10721 )?; 10722 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10723 return Some(expr2_0); 10724 } 10725 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10726 // Rule at src/isa/s390x/lower.isle line 666. 10727 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10728 let expr1_0 = constructor_or_uimm16shifted( 10729 ctx, pattern3_0, expr0_0, pattern8_0, 10730 )?; 10731 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10732 return Some(expr2_0); 10733 } 10734 let pattern8_0 = C::value_type(ctx, pattern7_1); 10735 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10736 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10737 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10738 if let &InstructionData::Load { 10739 opcode: ref pattern12_0, 10740 arg: pattern12_1, 10741 flags: pattern12_2, 10742 offset: pattern12_3, 10743 } = &pattern11_0 10744 { 10745 if let &Opcode::Load = pattern12_0 { 10746 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10747 // Rule at src/isa/s390x/lower.isle line 674. 10748 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10749 let expr1_0 = 10750 constructor_sink_load(ctx, pattern10_0)?; 10751 let expr2_0 = constructor_or_mem( 10752 ctx, pattern3_0, expr0_0, &expr1_0, 10753 )?; 10754 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10755 return Some(expr3_0); 10756 } 10757 } 10758 } 10759 } 10760 } 10761 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10762 // Rule at src/isa/s390x/lower.isle line 668. 10763 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10764 let expr1_0 = constructor_or_uimm32shifted( 10765 ctx, pattern3_0, expr0_0, pattern8_0, 10766 )?; 10767 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10768 return Some(expr2_0); 10769 } 10770 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10771 // Rule at src/isa/s390x/lower.isle line 664. 10772 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10773 let expr1_0 = constructor_or_uimm16shifted( 10774 ctx, pattern3_0, expr0_0, pattern8_0, 10775 )?; 10776 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10777 return Some(expr2_0); 10778 } 10779 // Rule at src/isa/s390x/lower.isle line 660. 10780 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10781 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10782 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10783 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10784 return Some(expr3_0); 10785 } 10786 &Opcode::Bxor => { 10787 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10788 let pattern8_0 = C::value_type(ctx, pattern7_0); 10789 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10790 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10791 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10792 if let &InstructionData::Load { 10793 opcode: ref pattern12_0, 10794 arg: pattern12_1, 10795 flags: pattern12_2, 10796 offset: pattern12_3, 10797 } = &pattern11_0 10798 { 10799 if let &Opcode::Load = pattern12_0 { 10800 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10801 // Rule at src/isa/s390x/lower.isle line 695. 10802 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10803 let expr1_0 = 10804 constructor_sink_load(ctx, pattern10_0)?; 10805 let expr2_0 = constructor_xor_mem( 10806 ctx, pattern3_0, expr0_0, &expr1_0, 10807 )?; 10808 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10809 return Some(expr3_0); 10810 } 10811 } 10812 } 10813 } 10814 } 10815 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10816 // Rule at src/isa/s390x/lower.isle line 689. 10817 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10818 let expr1_0 = constructor_xor_uimm32shifted( 10819 ctx, pattern3_0, expr0_0, pattern8_0, 10820 )?; 10821 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10822 return Some(expr2_0); 10823 } 10824 let pattern8_0 = C::value_type(ctx, pattern7_1); 10825 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10826 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10827 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10828 if let &InstructionData::Load { 10829 opcode: ref pattern12_0, 10830 arg: pattern12_1, 10831 flags: pattern12_2, 10832 offset: pattern12_3, 10833 } = &pattern11_0 10834 { 10835 if let &Opcode::Load = pattern12_0 { 10836 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10837 // Rule at src/isa/s390x/lower.isle line 693. 10838 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10839 let expr1_0 = 10840 constructor_sink_load(ctx, pattern10_0)?; 10841 let expr2_0 = constructor_xor_mem( 10842 ctx, pattern3_0, expr0_0, &expr1_0, 10843 )?; 10844 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10845 return Some(expr3_0); 10846 } 10847 } 10848 } 10849 } 10850 } 10851 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10852 // Rule at src/isa/s390x/lower.isle line 687. 10853 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10854 let expr1_0 = constructor_xor_uimm32shifted( 10855 ctx, pattern3_0, expr0_0, pattern8_0, 10856 )?; 10857 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10858 return Some(expr2_0); 10859 } 10860 // Rule at src/isa/s390x/lower.isle line 683. 10861 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10862 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10863 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10864 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10865 return Some(expr3_0); 10866 } 10867 &Opcode::Ishl => { 10868 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10869 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10870 // Rule at src/isa/s390x/lower.isle line 482. 10871 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10872 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10873 let expr2_0 = 10874 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10875 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10876 return Some(expr3_0); 10877 } 10878 // Rule at src/isa/s390x/lower.isle line 477. 10879 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10880 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10881 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10882 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10883 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10884 return Some(expr4_0); 10885 } 10886 &Opcode::Ushr => { 10887 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10888 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10889 // Rule at src/isa/s390x/lower.isle line 498. 10890 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10891 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10892 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10893 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10894 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10895 return Some(expr4_0); 10896 } 10897 // Rule at src/isa/s390x/lower.isle line 491. 10898 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10899 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10900 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10901 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10902 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10903 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10904 return Some(expr5_0); 10905 } 10906 &Opcode::Sshr => { 10907 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10908 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10909 // Rule at src/isa/s390x/lower.isle line 515. 10910 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10911 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10912 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10913 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10914 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10915 return Some(expr4_0); 10916 } 10917 // Rule at src/isa/s390x/lower.isle line 508. 10918 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10919 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10920 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10921 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10922 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10923 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10924 return Some(expr5_0); 10925 } 10926 _ => {} 10927 } 10928 } 10929 &InstructionData::Unary { 10930 opcode: ref pattern5_0, 10931 arg: pattern5_1, 10932 } => { 10933 match pattern5_0 { 10934 &Opcode::Ineg => { 10935 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10936 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10937 if let &InstructionData::Unary { 10938 opcode: ref pattern9_0, 10939 arg: pattern9_1, 10940 } = &pattern8_0 10941 { 10942 if let &Opcode::Sextend = pattern9_0 { 10943 let pattern11_0 = C::value_type(ctx, pattern9_1); 10944 if pattern11_0 == I32 { 10945 // Rule at src/isa/s390x/lower.isle line 193. 10946 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10947 let expr1_0 = constructor_neg_reg_sext32( 10948 ctx, pattern3_0, expr0_0, 10949 )?; 10950 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10951 return Some(expr2_0); 10952 } 10953 } 10954 } 10955 } 10956 // Rule at src/isa/s390x/lower.isle line 189. 10957 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10958 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10959 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10960 return Some(expr2_0); 10961 } 10962 &Opcode::Iabs => { 10963 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10964 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10965 if let &InstructionData::Unary { 10966 opcode: ref pattern9_0, 10967 arg: pattern9_1, 10968 } = &pattern8_0 10969 { 10970 if let &Opcode::Sextend = pattern9_0 { 10971 let pattern11_0 = C::value_type(ctx, pattern9_1); 10972 if pattern11_0 == I32 { 10973 // Rule at src/isa/s390x/lower.isle line 141. 10974 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10975 let expr1_0 = constructor_abs_reg_sext32( 10976 ctx, pattern3_0, expr0_0, 10977 )?; 10978 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10979 return Some(expr2_0); 10980 } 10981 } 10982 } 10983 } 10984 // Rule at src/isa/s390x/lower.isle line 137. 10985 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10986 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10987 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10988 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10989 return Some(expr3_0); 10990 } 10991 &Opcode::Clz => { 10992 // Rule at src/isa/s390x/lower.isle line 821. 10993 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10994 let expr1_0: i16 = 64; 10995 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10996 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10997 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10998 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10999 return Some(expr5_0); 11000 } 11001 &Opcode::Cls => { 11002 // Rule at src/isa/s390x/lower.isle line 836. 11003 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11004 let expr1_0: Type = I64; 11005 let expr2_0: u8 = 63; 11006 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11007 let expr4_0: Type = I64; 11008 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 11009 let expr6_0: i16 = 64; 11010 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 11011 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 11012 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 11013 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 11014 return Some(expr10_0); 11015 } 11016 &Opcode::Bint => { 11017 // Rule at src/isa/s390x/lower.isle line 804. 11018 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11019 let expr1_0: u64 = 1; 11020 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 11021 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 11022 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11023 return Some(expr4_0); 11024 } 11025 _ => {} 11026 } 11027 } 11028 _ => {} 11029 } 11030 } 11031 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 11032 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11033 match &pattern4_0 { 11034 &InstructionData::Binary { 11035 opcode: ref pattern5_0, 11036 args: ref pattern5_1, 11037 } => { 11038 match pattern5_0 { 11039 &Opcode::Rotl => { 11040 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11041 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11042 // Rule at src/isa/s390x/lower.isle line 528. 11043 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11044 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11045 let expr2_0 = 11046 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11047 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11048 return Some(expr3_0); 11049 } 11050 // Rule at src/isa/s390x/lower.isle line 524. 11051 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 11052 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 11053 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 11054 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11055 return Some(expr3_0); 11056 } 11057 &Opcode::Rotr => { 11058 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11059 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 11060 // Rule at src/isa/s390x/lower.isle line 566. 11061 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11062 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11063 let expr2_0 = 11064 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 11065 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11066 return Some(expr3_0); 11067 } 11068 // Rule at src/isa/s390x/lower.isle line 560. 11069 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11070 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11071 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11072 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 11073 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11074 return Some(expr4_0); 11075 } 11076 _ => {} 11077 } 11078 } 11079 &InstructionData::AtomicRmw { 11080 opcode: ref pattern5_0, 11081 args: ref pattern5_1, 11082 flags: pattern5_2, 11083 op: ref pattern5_3, 11084 } => { 11085 if let &Opcode::AtomicRmw = pattern5_0 { 11086 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11087 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11088 match pattern5_3 { 11089 &AtomicRmwOp::And => { 11090 // Rule at src/isa/s390x/lower.isle line 1505. 11091 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11092 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11093 let expr2_0 = C::zero_offset(ctx); 11094 let expr3_0 = constructor_lower_address( 11095 ctx, pattern5_2, pattern7_0, expr2_0, 11096 )?; 11097 let expr4_0 = constructor_atomic_rmw_and( 11098 ctx, pattern3_0, expr1_0, &expr3_0, 11099 )?; 11100 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11101 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11102 return Some(expr6_0); 11103 } 11104 &AtomicRmwOp::Or => { 11105 // Rule at src/isa/s390x/lower.isle line 1517. 11106 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11107 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11108 let expr2_0 = C::zero_offset(ctx); 11109 let expr3_0 = constructor_lower_address( 11110 ctx, pattern5_2, pattern7_0, expr2_0, 11111 )?; 11112 let expr4_0 = constructor_atomic_rmw_or( 11113 ctx, pattern3_0, expr1_0, &expr3_0, 11114 )?; 11115 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11116 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11117 return Some(expr6_0); 11118 } 11119 &AtomicRmwOp::Xor => { 11120 // Rule at src/isa/s390x/lower.isle line 1529. 11121 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11122 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11123 let expr2_0 = C::zero_offset(ctx); 11124 let expr3_0 = constructor_lower_address( 11125 ctx, pattern5_2, pattern7_0, expr2_0, 11126 )?; 11127 let expr4_0 = constructor_atomic_rmw_xor( 11128 ctx, pattern3_0, expr1_0, &expr3_0, 11129 )?; 11130 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11131 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11132 return Some(expr6_0); 11133 } 11134 _ => {} 11135 } 11136 } 11137 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11138 match pattern5_3 { 11139 &AtomicRmwOp::Add => { 11140 // Rule at src/isa/s390x/lower.isle line 1535. 11141 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11142 let expr1_0 = C::zero_offset(ctx); 11143 let expr2_0 = constructor_lower_address( 11144 ctx, pattern5_2, pattern7_0, expr1_0, 11145 )?; 11146 let expr3_0 = constructor_atomic_rmw_add( 11147 ctx, pattern3_0, expr0_0, &expr2_0, 11148 )?; 11149 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11150 return Some(expr4_0); 11151 } 11152 &AtomicRmwOp::And => { 11153 // Rule at src/isa/s390x/lower.isle line 1499. 11154 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11155 let expr1_0 = C::zero_offset(ctx); 11156 let expr2_0 = constructor_lower_address( 11157 ctx, pattern5_2, pattern7_0, expr1_0, 11158 )?; 11159 let expr3_0 = constructor_atomic_rmw_and( 11160 ctx, pattern3_0, expr0_0, &expr2_0, 11161 )?; 11162 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11163 return Some(expr4_0); 11164 } 11165 &AtomicRmwOp::Or => { 11166 // Rule at src/isa/s390x/lower.isle line 1511. 11167 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11168 let expr1_0 = C::zero_offset(ctx); 11169 let expr2_0 = constructor_lower_address( 11170 ctx, pattern5_2, pattern7_0, expr1_0, 11171 )?; 11172 let expr3_0 = constructor_atomic_rmw_or( 11173 ctx, pattern3_0, expr0_0, &expr2_0, 11174 )?; 11175 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11176 return Some(expr4_0); 11177 } 11178 &AtomicRmwOp::Sub => { 11179 // Rule at src/isa/s390x/lower.isle line 1541. 11180 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11181 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11182 let expr2_0 = C::zero_offset(ctx); 11183 let expr3_0 = constructor_lower_address( 11184 ctx, pattern5_2, pattern7_0, expr2_0, 11185 )?; 11186 let expr4_0 = constructor_atomic_rmw_add( 11187 ctx, pattern3_0, expr1_0, &expr3_0, 11188 )?; 11189 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11190 return Some(expr5_0); 11191 } 11192 &AtomicRmwOp::Xor => { 11193 // Rule at src/isa/s390x/lower.isle line 1523. 11194 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11195 let expr1_0 = C::zero_offset(ctx); 11196 let expr2_0 = constructor_lower_address( 11197 ctx, pattern5_2, pattern7_0, expr1_0, 11198 )?; 11199 let expr3_0 = constructor_atomic_rmw_xor( 11200 ctx, pattern3_0, expr0_0, &expr2_0, 11201 )?; 11202 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11203 return Some(expr4_0); 11204 } 11205 _ => {} 11206 } 11207 } 11208 // Rule at src/isa/s390x/lower.isle line 1550. 11209 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11210 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11211 let expr2_0 = C::inst_builder_new(ctx); 11212 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11213 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11214 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11215 let expr6_0 = constructor_atomic_rmw_body( 11216 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11217 expr0_0, 11218 )?; 11219 let expr7_0 = constructor_casloop( 11220 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11221 )?; 11222 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11223 return Some(expr8_0); 11224 } 11225 } 11226 &InstructionData::AtomicCas { 11227 opcode: ref pattern5_0, 11228 args: ref pattern5_1, 11229 flags: pattern5_2, 11230 } => { 11231 if let &Opcode::AtomicCas = pattern5_0 { 11232 let (pattern7_0, pattern7_1, pattern7_2) = 11233 C::unpack_value_array_3(ctx, pattern5_1); 11234 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11235 // Rule at src/isa/s390x/lower.isle line 1762. 11236 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11237 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11238 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11239 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11240 let expr4_0 = C::zero_offset(ctx); 11241 let expr5_0 = 11242 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11243 let expr6_0 = constructor_atomic_cas_impl( 11244 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11245 )?; 11246 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11247 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11248 return Some(expr8_0); 11249 } 11250 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11251 // Rule at src/isa/s390x/lower.isle line 1755. 11252 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11253 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11254 let expr2_0 = C::zero_offset(ctx); 11255 let expr3_0 = 11256 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11257 let expr4_0 = constructor_atomic_cas_impl( 11258 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11259 )?; 11260 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11261 return Some(expr5_0); 11262 } 11263 } 11264 } 11265 &InstructionData::Unary { 11266 opcode: ref pattern5_0, 11267 arg: pattern5_1, 11268 } => { 11269 match pattern5_0 { 11270 &Opcode::FcvtToUint => { 11271 let pattern7_0 = C::value_type(ctx, pattern5_1); 11272 // Rule at src/isa/s390x/lower.isle line 1057. 11273 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11274 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11275 let expr2_0 = FloatCC::Unordered; 11276 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11277 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11278 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11279 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11280 ctx, pattern3_0, pattern7_0, expr0_0, 11281 )?; 11282 let expr7_0 = FloatCC::Unordered; 11283 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11284 let expr9_0 = C::trap_code_integer_overflow(ctx); 11285 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11286 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11287 return Some(expr11_0); 11288 } 11289 &Opcode::FcvtToUintSat => { 11290 let pattern7_0 = C::value_type(ctx, pattern5_1); 11291 // Rule at src/isa/s390x/lower.isle line 1098. 11292 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11293 let expr1_0 = 11294 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11295 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11296 let expr3_0 = FloatCC::Unordered; 11297 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11298 let expr5_0: i16 = 0; 11299 let expr6_0 = 11300 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11301 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11302 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11303 return Some(expr8_0); 11304 } 11305 &Opcode::FcvtToSint => { 11306 let pattern7_0 = C::value_type(ctx, pattern5_1); 11307 // Rule at src/isa/s390x/lower.isle line 1078. 11308 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11309 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11310 let expr2_0 = FloatCC::Unordered; 11311 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11312 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11313 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11314 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11315 ctx, pattern3_0, pattern7_0, expr0_0, 11316 )?; 11317 let expr7_0 = FloatCC::Unordered; 11318 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11319 let expr9_0 = C::trap_code_integer_overflow(ctx); 11320 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11321 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11322 return Some(expr11_0); 11323 } 11324 &Opcode::FcvtToSintSat => { 11325 let pattern7_0 = C::value_type(ctx, pattern5_1); 11326 // Rule at src/isa/s390x/lower.isle line 1115. 11327 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11328 let expr1_0 = 11329 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11330 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11331 let expr3_0 = FloatCC::Unordered; 11332 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11333 let expr5_0: i16 = 0; 11334 let expr6_0 = 11335 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11336 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11337 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11338 return Some(expr8_0); 11339 } 11340 _ => {} 11341 } 11342 } 11343 _ => {} 11344 } 11345 } 11346 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11347 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11348 match &pattern4_0 { 11349 &InstructionData::Binary { 11350 opcode: ref pattern5_0, 11351 args: ref pattern5_1, 11352 } => { 11353 match pattern5_0 { 11354 &Opcode::Umulhi => { 11355 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11356 // Rule at src/isa/s390x/lower.isle line 245. 11357 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11358 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11359 let expr2_0: Type = I32; 11360 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11361 let expr4_0: Type = I32; 11362 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11363 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11364 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11365 return Some(expr7_0); 11366 } 11367 &Opcode::Smulhi => { 11368 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11369 // Rule at src/isa/s390x/lower.isle line 267. 11370 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11371 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11372 let expr2_0: Type = I32; 11373 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11374 let expr4_0: Type = I32; 11375 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11376 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11377 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11378 return Some(expr7_0); 11379 } 11380 &Opcode::Rotl => { 11381 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11382 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11383 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11384 { 11385 // Rule at src/isa/s390x/lower.isle line 546. 11386 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11387 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11388 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11389 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11390 let expr4_0 = 11391 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11392 let expr5_0 = 11393 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11394 let expr6_0 = 11395 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11396 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11397 return Some(expr7_0); 11398 } 11399 } 11400 // Rule at src/isa/s390x/lower.isle line 534. 11401 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11402 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11403 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11404 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11405 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11406 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11407 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11408 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11409 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11410 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11411 return Some(expr9_0); 11412 } 11413 &Opcode::Rotr => { 11414 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11415 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11416 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11417 { 11418 // Rule at src/isa/s390x/lower.isle line 584. 11419 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11420 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11421 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11422 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11423 let expr4_0 = 11424 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11425 let expr5_0 = 11426 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11427 let expr6_0 = 11428 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11429 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11430 return Some(expr7_0); 11431 } 11432 } 11433 // Rule at src/isa/s390x/lower.isle line 572. 11434 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11435 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11436 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11437 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11438 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11439 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11440 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11441 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11442 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11443 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11444 return Some(expr9_0); 11445 } 11446 _ => {} 11447 } 11448 } 11449 &InstructionData::AtomicRmw { 11450 opcode: ref pattern5_0, 11451 args: ref pattern5_1, 11452 flags: pattern5_2, 11453 op: ref pattern5_3, 11454 } => { 11455 if let &Opcode::AtomicRmw = pattern5_0 { 11456 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11457 // Rule at src/isa/s390x/lower.isle line 1562. 11458 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11459 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11460 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11461 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11462 let expr4_0 = C::inst_builder_new(ctx); 11463 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11464 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11465 let expr7_0 = constructor_casloop_rotate_in( 11466 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11467 )?; 11468 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11469 let expr9_0 = constructor_atomic_rmw_body( 11470 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11471 expr0_0, 11472 )?; 11473 let expr10_0 = constructor_casloop_rotate_out( 11474 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11475 )?; 11476 let expr11_0 = constructor_casloop_subword( 11477 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11478 )?; 11479 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11480 return Some(expr12_0); 11481 } 11482 } 11483 &InstructionData::AtomicCas { 11484 opcode: ref pattern5_0, 11485 args: ref pattern5_1, 11486 flags: pattern5_2, 11487 } => { 11488 if let &Opcode::AtomicCas = pattern5_0 { 11489 let (pattern7_0, pattern7_1, pattern7_2) = 11490 C::unpack_value_array_3(ctx, pattern5_1); 11491 // Rule at src/isa/s390x/lower.isle line 1769. 11492 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11493 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11494 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11495 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11496 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11497 let expr5_0 = C::inst_builder_new(ctx); 11498 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11499 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11500 let expr8_0 = constructor_casloop_rotate_in( 11501 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11502 )?; 11503 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11504 let expr10_0 = constructor_atomic_cas_body( 11505 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11506 expr1_0, 11507 )?; 11508 let expr11_0 = constructor_casloop_rotate_out( 11509 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11510 )?; 11511 let expr12_0 = constructor_casloop_subword( 11512 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11513 )?; 11514 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11515 return Some(expr13_0); 11516 } 11517 } 11518 _ => {} 11519 } 11520 } 11521 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11522 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11523 match &pattern4_0 { 11524 &InstructionData::Unary { 11525 opcode: ref pattern5_0, 11526 arg: pattern5_1, 11527 } => { 11528 match pattern5_0 { 11529 &Opcode::Ctz => { 11530 // Rule at src/isa/s390x/lower.isle line 859. 11531 let expr0_0: Type = I64; 11532 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11533 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11534 let expr3_0 = 11535 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11536 let expr4_0: Type = I64; 11537 let expr5_0: Type = I64; 11538 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11539 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11540 let expr8_0: i16 = 64; 11541 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11542 let expr10_0: u64 = 63; 11543 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11544 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11545 let expr13_0 = 11546 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11547 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11548 return Some(expr14_0); 11549 } 11550 &Opcode::Uextend => { 11551 // Rule at src/isa/s390x/lower.isle line 603. 11552 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11553 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11554 return Some(expr1_0); 11555 } 11556 &Opcode::Sextend => { 11557 // Rule at src/isa/s390x/lower.isle line 614. 11558 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11559 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11560 return Some(expr1_0); 11561 } 11562 _ => {} 11563 } 11564 } 11565 &InstructionData::Load { 11566 opcode: ref pattern5_0, 11567 arg: pattern5_1, 11568 flags: pattern5_2, 11569 offset: pattern5_3, 11570 } => { 11571 match pattern5_0 { 11572 &Opcode::Uload8 => { 11573 // Rule at src/isa/s390x/lower.isle line 1251. 11574 let expr0_0: Type = I8; 11575 let expr1_0 = 11576 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11577 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11578 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11579 return Some(expr3_0); 11580 } 11581 &Opcode::Sload8 => { 11582 // Rule at src/isa/s390x/lower.isle line 1262. 11583 let expr0_0: Type = I8; 11584 let expr1_0 = 11585 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11586 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11587 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11588 return Some(expr3_0); 11589 } 11590 &Opcode::Uload16 => { 11591 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11592 // Rule at src/isa/s390x/lower.isle line 1278. 11593 let expr0_0 = constructor_lower_address( 11594 ctx, pattern5_2, pattern5_1, pattern5_3, 11595 )?; 11596 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11597 let expr2_0: Type = I16; 11598 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11599 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11600 return Some(expr4_0); 11601 } 11602 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11603 // Rule at src/isa/s390x/lower.isle line 1273. 11604 let expr0_0: Type = I16; 11605 let expr1_0 = constructor_lower_address( 11606 ctx, pattern5_2, pattern5_1, pattern5_3, 11607 )?; 11608 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11609 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11610 return Some(expr3_0); 11611 } 11612 } 11613 &Opcode::Sload16 => { 11614 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11615 // Rule at src/isa/s390x/lower.isle line 1303. 11616 let expr0_0 = constructor_lower_address( 11617 ctx, pattern5_2, pattern5_1, pattern5_3, 11618 )?; 11619 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11620 let expr2_0: Type = I16; 11621 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11622 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11623 return Some(expr4_0); 11624 } 11625 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11626 // Rule at src/isa/s390x/lower.isle line 1298. 11627 let expr0_0: Type = I16; 11628 let expr1_0 = constructor_lower_address( 11629 ctx, pattern5_2, pattern5_1, pattern5_3, 11630 )?; 11631 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11632 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11633 return Some(expr3_0); 11634 } 11635 } 11636 _ => {} 11637 } 11638 } 11639 _ => {} 11640 } 11641 } 11642 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11643 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11644 match &pattern4_0 { 11645 &InstructionData::Unary { 11646 opcode: ref pattern5_0, 11647 arg: pattern5_1, 11648 } => { 11649 match pattern5_0 { 11650 &Opcode::Ctz => { 11651 // Rule at src/isa/s390x/lower.isle line 874. 11652 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11653 let expr1_0: Type = I64; 11654 let expr2_0: Type = I64; 11655 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11656 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11657 let expr5_0: i16 = -1; 11658 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11659 let expr7_0: Type = I64; 11660 let expr8_0: Type = I64; 11661 let expr9_0: u64 = 63; 11662 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11663 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11664 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11665 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11666 return Some(expr13_0); 11667 } 11668 &Opcode::Uextend => { 11669 // Rule at src/isa/s390x/lower.isle line 607. 11670 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11671 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11672 return Some(expr1_0); 11673 } 11674 &Opcode::Sextend => { 11675 // Rule at src/isa/s390x/lower.isle line 618. 11676 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11677 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11678 return Some(expr1_0); 11679 } 11680 _ => {} 11681 } 11682 } 11683 &InstructionData::Load { 11684 opcode: ref pattern5_0, 11685 arg: pattern5_1, 11686 flags: pattern5_2, 11687 offset: pattern5_3, 11688 } => { 11689 match pattern5_0 { 11690 &Opcode::Uload8 => { 11691 // Rule at src/isa/s390x/lower.isle line 1255. 11692 let expr0_0: Type = I8; 11693 let expr1_0 = 11694 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11695 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11696 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11697 return Some(expr3_0); 11698 } 11699 &Opcode::Sload8 => { 11700 // Rule at src/isa/s390x/lower.isle line 1266. 11701 let expr0_0: Type = I8; 11702 let expr1_0 = 11703 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11704 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11705 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11706 return Some(expr3_0); 11707 } 11708 &Opcode::Uload16 => { 11709 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11710 // Rule at src/isa/s390x/lower.isle line 1289. 11711 let expr0_0 = constructor_lower_address( 11712 ctx, pattern5_2, pattern5_1, pattern5_3, 11713 )?; 11714 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11715 let expr2_0: Type = I16; 11716 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11717 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11718 return Some(expr4_0); 11719 } 11720 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11721 // Rule at src/isa/s390x/lower.isle line 1284. 11722 let expr0_0: Type = I16; 11723 let expr1_0 = constructor_lower_address( 11724 ctx, pattern5_2, pattern5_1, pattern5_3, 11725 )?; 11726 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11727 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11728 return Some(expr3_0); 11729 } 11730 } 11731 &Opcode::Sload16 => { 11732 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11733 // Rule at src/isa/s390x/lower.isle line 1314. 11734 let expr0_0 = constructor_lower_address( 11735 ctx, pattern5_2, pattern5_1, pattern5_3, 11736 )?; 11737 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11738 let expr2_0: Type = I16; 11739 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11740 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11741 return Some(expr4_0); 11742 } 11743 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11744 // Rule at src/isa/s390x/lower.isle line 1309. 11745 let expr0_0: Type = I16; 11746 let expr1_0 = constructor_lower_address( 11747 ctx, pattern5_2, pattern5_1, pattern5_3, 11748 )?; 11749 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11750 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11751 return Some(expr3_0); 11752 } 11753 } 11754 &Opcode::Uload32 => { 11755 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11756 // Rule at src/isa/s390x/lower.isle line 1328. 11757 let expr0_0 = constructor_lower_address( 11758 ctx, pattern5_2, pattern5_1, pattern5_3, 11759 )?; 11760 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11761 let expr2_0: Type = I32; 11762 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11763 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11764 return Some(expr4_0); 11765 } 11766 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11767 // Rule at src/isa/s390x/lower.isle line 1323. 11768 let expr0_0: Type = I32; 11769 let expr1_0 = constructor_lower_address( 11770 ctx, pattern5_2, pattern5_1, pattern5_3, 11771 )?; 11772 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11773 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11774 return Some(expr3_0); 11775 } 11776 } 11777 &Opcode::Sload32 => { 11778 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11779 // Rule at src/isa/s390x/lower.isle line 1342. 11780 let expr0_0 = constructor_lower_address( 11781 ctx, pattern5_2, pattern5_1, pattern5_3, 11782 )?; 11783 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11784 let expr2_0: Type = I32; 11785 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11786 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11787 return Some(expr4_0); 11788 } 11789 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11790 // Rule at src/isa/s390x/lower.isle line 1337. 11791 let expr0_0: Type = I32; 11792 let expr1_0 = constructor_lower_address( 11793 ctx, pattern5_2, pattern5_1, pattern5_3, 11794 )?; 11795 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11796 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11797 return Some(expr3_0); 11798 } 11799 } 11800 _ => {} 11801 } 11802 } 11803 _ => {} 11804 } 11805 } 11806 } 11807 return None; 11808 } 11809 11810 // Generated as internal constructor for term lower_branch. 11811 pub fn constructor_lower_branch<C: Context>( 11812 ctx: &mut C, 11813 arg0: Inst, 11814 arg1: &VecMachLabel, 11815 ) -> Option<InstOutput> { 11816 let pattern0_0 = arg0; 11817 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11818 match &pattern1_0 { 11819 &InstructionData::BranchTable { 11820 opcode: ref pattern2_0, 11821 arg: pattern2_1, 11822 destination: pattern2_2, 11823 table: pattern2_3, 11824 } => { 11825 if let &Opcode::BrTable = pattern2_0 { 11826 let pattern4_0 = arg1; 11827 // Rule at src/isa/s390x/lower.isle line 2076. 11828 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11829 let expr1_0: Type = I64; 11830 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11831 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11832 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11833 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11834 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11835 let expr7_0: u8 = 0; 11836 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11837 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11838 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11839 let expr11_0: Type = I64; 11840 let expr12_0: u8 = 2; 11841 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11842 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11843 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11844 return Some(expr15_0); 11845 } 11846 } 11847 &InstructionData::Branch { 11848 opcode: ref pattern2_0, 11849 args: pattern2_1, 11850 destination: pattern2_2, 11851 } => { 11852 match pattern2_0 { 11853 &Opcode::Brz => { 11854 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11855 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11856 let pattern6_0 = arg1; 11857 // Rule at src/isa/s390x/lower.isle line 2109. 11858 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11859 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11860 let expr2_0: u8 = 0; 11861 let expr3_0 = C::vec_element(ctx, pattern6_0, expr2_0); 11862 let expr4_0: u8 = 1; 11863 let expr5_0 = C::vec_element(ctx, pattern6_0, expr4_0); 11864 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11865 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11866 return Some(expr7_0); 11867 } 11868 } 11869 &Opcode::Brnz => { 11870 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11871 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11872 let pattern6_0 = arg1; 11873 // Rule at src/isa/s390x/lower.isle line 2120. 11874 let expr0_0 = constructor_value_nonzero(ctx, pattern5_0)?; 11875 let expr1_0: u8 = 0; 11876 let expr2_0 = C::vec_element(ctx, pattern6_0, expr1_0); 11877 let expr3_0: u8 = 1; 11878 let expr4_0 = C::vec_element(ctx, pattern6_0, expr3_0); 11879 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11880 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11881 return Some(expr6_0); 11882 } 11883 } 11884 _ => {} 11885 } 11886 } 11887 &InstructionData::Jump { 11888 opcode: ref pattern2_0, 11889 args: pattern2_1, 11890 destination: pattern2_2, 11891 } => { 11892 if let &Opcode::Jump = pattern2_0 { 11893 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11894 let pattern5_0 = arg1; 11895 // Rule at src/isa/s390x/lower.isle line 2068. 11896 let expr0_0: u8 = 0; 11897 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11898 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11899 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11900 return Some(expr3_0); 11901 } 11902 } 11903 &InstructionData::BranchInt { 11904 opcode: ref pattern2_0, 11905 args: pattern2_1, 11906 cond: ref pattern2_2, 11907 destination: pattern2_3, 11908 } => { 11909 if let &Opcode::Brif = pattern2_0 { 11910 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11911 if let Some((pattern5_0, pattern5_1)) = C::value_slice_unwrap(ctx, pattern4_0) { 11912 if let Some(pattern6_0) = C::def_inst(ctx, pattern5_0) { 11913 let pattern7_0 = C::inst_data(ctx, pattern6_0); 11914 if let &InstructionData::Binary { 11915 opcode: ref pattern8_0, 11916 args: ref pattern8_1, 11917 } = &pattern7_0 11918 { 11919 if let &Opcode::Ifcmp = pattern8_0 { 11920 let (pattern10_0, pattern10_1) = 11921 C::unpack_value_array_2(ctx, pattern8_1); 11922 let pattern11_0 = arg1; 11923 // Rule at src/isa/s390x/lower.isle line 2131. 11924 let expr0_0: bool = false; 11925 let expr1_0 = constructor_icmp_val( 11926 ctx, 11927 expr0_0, 11928 pattern2_2, 11929 pattern10_0, 11930 pattern10_1, 11931 )?; 11932 let expr2_0: u8 = 0; 11933 let expr3_0 = C::vec_element(ctx, pattern11_0, expr2_0); 11934 let expr4_0: u8 = 1; 11935 let expr5_0 = C::vec_element(ctx, pattern11_0, expr4_0); 11936 let expr6_0 = 11937 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11938 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11939 return Some(expr7_0); 11940 } 11941 } 11942 } 11943 } 11944 } 11945 } 11946 _ => {} 11947 } 11948 return None; 11949 } 11950 11951 // Generated as internal constructor for term output_ifcout. 11952 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11953 let pattern0_0 = arg0; 11954 // Rule at src/isa/s390x/lower.isle line 154. 11955 let expr0_0 = C::value_reg(ctx, pattern0_0); 11956 let expr1_0 = C::value_regs_invalid(ctx); 11957 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11958 return Some(expr2_0); 11959 } 11960 11961 // Generated as internal constructor for term zero_divisor_check_needed. 11962 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11963 let pattern0_0 = arg0; 11964 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11965 let pattern2_0 = 0; 11966 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11967 // Rule at src/isa/s390x/lower.isle line 344. 11968 let expr0_0: bool = false; 11969 return Some(expr0_0); 11970 } 11971 } 11972 let pattern1_0 = C::value_type(ctx, pattern0_0); 11973 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11974 // Rule at src/isa/s390x/lower.isle line 345. 11975 let expr0_0: bool = false; 11976 return Some(expr0_0); 11977 } 11978 // Rule at src/isa/s390x/lower.isle line 346. 11979 let expr0_0: bool = true; 11980 return Some(expr0_0); 11981 } 11982 11983 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11984 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11985 ctx: &mut C, 11986 arg0: bool, 11987 arg1: Type, 11988 arg2: Reg, 11989 ) -> Option<Reg> { 11990 let pattern0_0 = arg0; 11991 if pattern0_0 == true { 11992 let pattern2_0 = arg1; 11993 let pattern3_0 = arg2; 11994 // Rule at src/isa/s390x/lower.isle line 352. 11995 let expr0_0: i16 = 0; 11996 let expr1_0 = IntCC::Equal; 11997 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11998 let expr3_0 = C::trap_code_division_by_zero(ctx); 11999 let expr4_0 = constructor_icmps_simm16_and_trap( 12000 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 12001 )?; 12002 return Some(expr4_0); 12003 } 12004 if pattern0_0 == false { 12005 let pattern2_0 = arg1; 12006 let pattern3_0 = arg2; 12007 // Rule at src/isa/s390x/lower.isle line 351. 12008 let expr0_0 = C::invalid_reg(ctx); 12009 return Some(expr0_0); 12010 } 12011 return None; 12012 } 12013 12014 // Generated as internal constructor for term div_overflow_check_needed. 12015 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 12016 let pattern0_0 = arg0; 12017 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 12018 let pattern2_0 = -1; 12019 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 12020 // Rule at src/isa/s390x/lower.isle line 425. 12021 let expr0_0: bool = false; 12022 return Some(expr0_0); 12023 } 12024 } 12025 // Rule at src/isa/s390x/lower.isle line 426. 12026 let expr0_0: bool = true; 12027 return Some(expr0_0); 12028 } 12029 12030 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 12031 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 12032 ctx: &mut C, 12033 arg0: bool, 12034 arg1: Type, 12035 arg2: Type, 12036 arg3: &RegPair, 12037 arg4: Reg, 12038 ) -> Option<Reg> { 12039 let pattern0_0 = arg0; 12040 if pattern0_0 == true { 12041 let pattern2_0 = arg1; 12042 let pattern3_0 = arg2; 12043 let pattern4_0 = arg3; 12044 let pattern5_0 = arg4; 12045 // Rule at src/isa/s390x/lower.isle line 439. 12046 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 12047 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 12048 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 12049 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 12050 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 12051 let expr5_0: i16 = -1; 12052 let expr6_0 = IntCC::Equal; 12053 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 12054 let expr8_0 = C::trap_code_integer_overflow(ctx); 12055 let expr9_0 = constructor_icmps_simm16_and_trap( 12056 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 12057 )?; 12058 return Some(expr9_0); 12059 } 12060 if pattern0_0 == false { 12061 let pattern2_0 = arg1; 12062 let pattern3_0 = arg2; 12063 let pattern4_0 = arg3; 12064 let pattern5_0 = arg4; 12065 // Rule at src/isa/s390x/lower.isle line 438. 12066 let expr0_0 = C::invalid_reg(ctx); 12067 return Some(expr0_0); 12068 } 12069 return None; 12070 } 12071 12072 // Generated as internal constructor for term int_max. 12073 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 12074 let pattern0_0 = arg0; 12075 if pattern0_0 == I8 { 12076 // Rule at src/isa/s390x/lower.isle line 447. 12077 let expr0_0: u64 = 127; 12078 return Some(expr0_0); 12079 } 12080 if pattern0_0 == I16 { 12081 // Rule at src/isa/s390x/lower.isle line 448. 12082 let expr0_0: u64 = 32767; 12083 return Some(expr0_0); 12084 } 12085 if pattern0_0 == I32 { 12086 // Rule at src/isa/s390x/lower.isle line 449. 12087 let expr0_0: u64 = 2147483647; 12088 return Some(expr0_0); 12089 } 12090 if pattern0_0 == I64 { 12091 // Rule at src/isa/s390x/lower.isle line 450. 12092 let expr0_0: u64 = 9223372036854775807; 12093 return Some(expr0_0); 12094 } 12095 return None; 12096 } 12097 12098 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12099 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12100 ctx: &mut C, 12101 arg0: bool, 12102 arg1: Type, 12103 arg2: &RegPair, 12104 arg3: Reg, 12105 ) -> Option<RegPair> { 12106 let pattern0_0 = arg0; 12107 if pattern0_0 == true { 12108 let pattern2_0 = arg1; 12109 if pattern2_0 == I32 { 12110 let pattern4_0 = arg2; 12111 let pattern5_0 = arg3; 12112 // Rule at src/isa/s390x/lower.isle line 468. 12113 return Some(pattern4_0.clone()); 12114 } 12115 if pattern2_0 == I64 { 12116 let pattern4_0 = arg2; 12117 let pattern5_0 = arg3; 12118 // Rule at src/isa/s390x/lower.isle line 469. 12119 let expr0_0: Type = I64; 12120 let expr1_0: Type = I64; 12121 let expr2_0: i16 = -1; 12122 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12123 let expr4_0 = IntCC::Equal; 12124 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12125 let expr6_0: i16 = 0; 12126 let expr7_0 = constructor_cmov_imm_regpair_lo( 12127 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12128 )?; 12129 return Some(expr7_0); 12130 } 12131 } 12132 if pattern0_0 == false { 12133 let pattern2_0 = arg1; 12134 let pattern3_0 = arg2; 12135 let pattern4_0 = arg3; 12136 // Rule at src/isa/s390x/lower.isle line 467. 12137 return Some(pattern3_0.clone()); 12138 } 12139 return None; 12140 } 12141 12142 // Generated as internal constructor for term cast_bool. 12143 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12144 let pattern0_0 = arg0; 12145 if pattern0_0 == B1 { 12146 let pattern2_0 = arg1; 12147 let pattern3_0 = C::value_type(ctx, pattern2_0); 12148 if pattern3_0 == B1 { 12149 // Rule at src/isa/s390x/lower.isle line 766. 12150 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12151 return Some(expr0_0); 12152 } 12153 if pattern3_0 == B8 { 12154 // Rule at src/isa/s390x/lower.isle line 767. 12155 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12156 return Some(expr0_0); 12157 } 12158 } 12159 if pattern0_0 == B8 { 12160 let pattern2_0 = arg1; 12161 let pattern3_0 = C::value_type(ctx, pattern2_0); 12162 if pattern3_0 == B8 { 12163 // Rule at src/isa/s390x/lower.isle line 768. 12164 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12165 return Some(expr0_0); 12166 } 12167 } 12168 if pattern0_0 == I8 { 12169 let pattern2_0 = arg1; 12170 let pattern3_0 = C::value_type(ctx, pattern2_0); 12171 if pattern3_0 == B8 { 12172 // Rule at src/isa/s390x/lower.isle line 769. 12173 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12174 return Some(expr0_0); 12175 } 12176 } 12177 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12178 let pattern2_0 = arg1; 12179 let pattern3_0 = C::value_type(ctx, pattern2_0); 12180 if pattern3_0 == B16 { 12181 // Rule at src/isa/s390x/lower.isle line 770. 12182 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12183 return Some(expr0_0); 12184 } 12185 } 12186 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12187 let pattern2_0 = arg1; 12188 let pattern3_0 = C::value_type(ctx, pattern2_0); 12189 if pattern3_0 == B32 { 12190 // Rule at src/isa/s390x/lower.isle line 771. 12191 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12192 return Some(expr0_0); 12193 } 12194 } 12195 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12196 let pattern2_0 = arg1; 12197 let pattern3_0 = C::value_type(ctx, pattern2_0); 12198 if pattern3_0 == B64 { 12199 // Rule at src/isa/s390x/lower.isle line 772. 12200 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12201 return Some(expr0_0); 12202 } 12203 } 12204 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12205 let pattern2_0 = arg1; 12206 let pattern3_0 = C::value_type(ctx, pattern2_0); 12207 if pattern3_0 == B1 { 12208 // Rule at src/isa/s390x/lower.isle line 775. 12209 let expr0_0: Type = I32; 12210 let expr1_0: Type = I32; 12211 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12212 let expr3_0: u8 = 31; 12213 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12214 let expr5_0: u8 = 31; 12215 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12216 return Some(expr6_0); 12217 } 12218 if pattern3_0 == B8 { 12219 // Rule at src/isa/s390x/lower.isle line 781. 12220 let expr0_0: Type = I8; 12221 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12222 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12223 return Some(expr2_0); 12224 } 12225 if pattern3_0 == B16 { 12226 // Rule at src/isa/s390x/lower.isle line 783. 12227 let expr0_0: Type = I16; 12228 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12229 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12230 return Some(expr2_0); 12231 } 12232 } 12233 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12234 let pattern2_0 = arg1; 12235 let pattern3_0 = C::value_type(ctx, pattern2_0); 12236 if pattern3_0 == B1 { 12237 // Rule at src/isa/s390x/lower.isle line 777. 12238 let expr0_0: Type = I64; 12239 let expr1_0: Type = I64; 12240 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12241 let expr3_0: u8 = 63; 12242 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12243 let expr5_0: u8 = 63; 12244 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12245 return Some(expr6_0); 12246 } 12247 if pattern3_0 == B8 { 12248 // Rule at src/isa/s390x/lower.isle line 785. 12249 let expr0_0: Type = I8; 12250 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12251 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12252 return Some(expr2_0); 12253 } 12254 if pattern3_0 == B16 { 12255 // Rule at src/isa/s390x/lower.isle line 787. 12256 let expr0_0: Type = I16; 12257 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12258 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12259 return Some(expr2_0); 12260 } 12261 if pattern3_0 == B32 { 12262 // Rule at src/isa/s390x/lower.isle line 789. 12263 let expr0_0: Type = I32; 12264 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12265 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12266 return Some(expr2_0); 12267 } 12268 } 12269 return None; 12270 } 12271 12272 // Generated as internal constructor for term clz_offset. 12273 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12274 let pattern0_0 = arg0; 12275 if pattern0_0 == I8 { 12276 let pattern2_0 = arg1; 12277 // Rule at src/isa/s390x/lower.isle line 814. 12278 let expr0_0: Type = I8; 12279 let expr1_0: i16 = -56; 12280 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12281 return Some(expr2_0); 12282 } 12283 if pattern0_0 == I16 { 12284 let pattern2_0 = arg1; 12285 // Rule at src/isa/s390x/lower.isle line 815. 12286 let expr0_0: Type = I16; 12287 let expr1_0: i16 = -48; 12288 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12289 return Some(expr2_0); 12290 } 12291 if pattern0_0 == I32 { 12292 let pattern2_0 = arg1; 12293 // Rule at src/isa/s390x/lower.isle line 816. 12294 let expr0_0: Type = I32; 12295 let expr1_0: i16 = -32; 12296 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12297 return Some(expr2_0); 12298 } 12299 if pattern0_0 == I64 { 12300 let pattern2_0 = arg1; 12301 // Rule at src/isa/s390x/lower.isle line 817. 12302 let expr0_0: Type = I64; 12303 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12304 return Some(expr1_0); 12305 } 12306 return None; 12307 } 12308 12309 // Generated as internal constructor for term ctz_guardbit. 12310 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12311 let pattern0_0 = arg0; 12312 if pattern0_0 == I8 { 12313 // Rule at src/isa/s390x/lower.isle line 866. 12314 let expr0_0: u16 = 256; 12315 let expr1_0: u8 = 0; 12316 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12317 return Some(expr2_0); 12318 } 12319 if pattern0_0 == I16 { 12320 // Rule at src/isa/s390x/lower.isle line 867. 12321 let expr0_0: u16 = 1; 12322 let expr1_0: u8 = 16; 12323 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12324 return Some(expr2_0); 12325 } 12326 if pattern0_0 == I32 { 12327 // Rule at src/isa/s390x/lower.isle line 868. 12328 let expr0_0: u16 = 1; 12329 let expr1_0: u8 = 32; 12330 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12331 return Some(expr2_0); 12332 } 12333 return None; 12334 } 12335 12336 // Generated as internal constructor for term istore8_impl. 12337 pub fn constructor_istore8_impl<C: Context>( 12338 ctx: &mut C, 12339 arg0: MemFlags, 12340 arg1: Value, 12341 arg2: Value, 12342 arg3: Offset32, 12343 ) -> Option<SideEffectNoResult> { 12344 let pattern0_0 = arg0; 12345 let pattern1_0 = arg1; 12346 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12347 let pattern3_0 = arg2; 12348 let pattern4_0 = arg3; 12349 // Rule at src/isa/s390x/lower.isle line 1424. 12350 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12351 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12352 return Some(expr1_0); 12353 } 12354 let pattern2_0 = arg2; 12355 let pattern3_0 = arg3; 12356 // Rule at src/isa/s390x/lower.isle line 1420. 12357 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12358 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12359 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12360 return Some(expr2_0); 12361 } 12362 12363 // Generated as internal constructor for term istore16_impl. 12364 pub fn constructor_istore16_impl<C: Context>( 12365 ctx: &mut C, 12366 arg0: MemFlags, 12367 arg1: Value, 12368 arg2: Value, 12369 arg3: Offset32, 12370 ) -> Option<SideEffectNoResult> { 12371 let pattern0_0 = arg0; 12372 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12373 let pattern2_0 = arg1; 12374 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12375 let pattern4_0 = arg2; 12376 let pattern5_0 = arg3; 12377 // Rule at src/isa/s390x/lower.isle line 1450. 12378 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12379 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12380 return Some(expr1_0); 12381 } 12382 let pattern3_0 = arg2; 12383 let pattern4_0 = arg3; 12384 // Rule at src/isa/s390x/lower.isle line 1442. 12385 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12386 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12387 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12388 return Some(expr2_0); 12389 } 12390 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12391 let pattern2_0 = arg1; 12392 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12393 let pattern4_0 = arg2; 12394 let pattern5_0 = arg3; 12395 // Rule at src/isa/s390x/lower.isle line 1446. 12396 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12397 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12398 return Some(expr1_0); 12399 } 12400 let pattern3_0 = arg2; 12401 let pattern4_0 = arg3; 12402 // Rule at src/isa/s390x/lower.isle line 1438. 12403 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12404 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12405 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12406 return Some(expr2_0); 12407 } 12408 return None; 12409 } 12410 12411 // Generated as internal constructor for term istore32_impl. 12412 pub fn constructor_istore32_impl<C: Context>( 12413 ctx: &mut C, 12414 arg0: MemFlags, 12415 arg1: Value, 12416 arg2: Value, 12417 arg3: Offset32, 12418 ) -> Option<SideEffectNoResult> { 12419 let pattern0_0 = arg0; 12420 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12421 let pattern2_0 = arg1; 12422 let pattern3_0 = arg2; 12423 let pattern4_0 = arg3; 12424 // Rule at src/isa/s390x/lower.isle line 1472. 12425 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12426 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12427 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12428 return Some(expr2_0); 12429 } 12430 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12431 let pattern2_0 = arg1; 12432 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12433 let pattern4_0 = arg2; 12434 let pattern5_0 = arg3; 12435 // Rule at src/isa/s390x/lower.isle line 1468. 12436 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12437 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12438 return Some(expr1_0); 12439 } 12440 let pattern3_0 = arg2; 12441 let pattern4_0 = arg3; 12442 // Rule at src/isa/s390x/lower.isle line 1464. 12443 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12444 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12445 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12446 return Some(expr2_0); 12447 } 12448 return None; 12449 } 12450 12451 // Generated as internal constructor for term istore64_impl. 12452 pub fn constructor_istore64_impl<C: Context>( 12453 ctx: &mut C, 12454 arg0: MemFlags, 12455 arg1: Value, 12456 arg2: Value, 12457 arg3: Offset32, 12458 ) -> Option<SideEffectNoResult> { 12459 let pattern0_0 = arg0; 12460 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12461 let pattern2_0 = arg1; 12462 let pattern3_0 = arg2; 12463 let pattern4_0 = arg3; 12464 // Rule at src/isa/s390x/lower.isle line 1490. 12465 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12466 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12467 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12468 return Some(expr2_0); 12469 } 12470 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12471 let pattern2_0 = arg1; 12472 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12473 let pattern4_0 = arg2; 12474 let pattern5_0 = arg3; 12475 // Rule at src/isa/s390x/lower.isle line 1486. 12476 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12477 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12478 return Some(expr1_0); 12479 } 12480 let pattern3_0 = arg2; 12481 let pattern4_0 = arg3; 12482 // Rule at src/isa/s390x/lower.isle line 1482. 12483 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12484 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12485 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12486 return Some(expr2_0); 12487 } 12488 return None; 12489 } 12490 12491 // Generated as internal constructor for term atomic_rmw_body. 12492 pub fn constructor_atomic_rmw_body<C: Context>( 12493 ctx: &mut C, 12494 arg0: &VecMInstBuilder, 12495 arg1: Type, 12496 arg2: MemFlags, 12497 arg3: &AtomicRmwOp, 12498 arg4: WritableReg, 12499 arg5: Reg, 12500 arg6: Reg, 12501 ) -> Option<Reg> { 12502 let pattern0_0 = arg0; 12503 let pattern1_0 = arg1; 12504 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12505 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12506 let pattern4_0 = arg2; 12507 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12508 let pattern6_0 = arg3; 12509 if let &AtomicRmwOp::Nand = pattern6_0 { 12510 let pattern8_0 = arg4; 12511 let pattern9_0 = arg5; 12512 let pattern10_0 = arg6; 12513 // Rule at src/isa/s390x/lower.isle line 1598. 12514 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12515 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12516 let expr2_0 = constructor_push_alu_reg( 12517 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12518 )?; 12519 return Some(expr2_0); 12520 } 12521 } 12522 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12523 let pattern6_0 = arg3; 12524 if let &AtomicRmwOp::Nand = pattern6_0 { 12525 let pattern8_0 = arg4; 12526 let pattern9_0 = arg5; 12527 let pattern10_0 = arg6; 12528 // Rule at src/isa/s390x/lower.isle line 1595. 12529 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12530 let expr1_0 = constructor_push_alu_reg( 12531 ctx, 12532 pattern0_0, 12533 &expr0_0, 12534 pattern8_0, 12535 pattern9_0, 12536 pattern10_0, 12537 )?; 12538 return Some(expr1_0); 12539 } 12540 } 12541 } 12542 } 12543 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12544 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12545 let pattern4_0 = arg2; 12546 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12547 let pattern6_0 = arg3; 12548 if let &AtomicRmwOp::Nand = pattern6_0 { 12549 let pattern8_0 = arg4; 12550 let pattern9_0 = arg5; 12551 let pattern10_0 = arg6; 12552 // Rule at src/isa/s390x/lower.isle line 1605. 12553 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12554 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12555 let expr2_0 = constructor_push_alu_reg( 12556 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12557 )?; 12558 let expr3_0 = 12559 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12560 return Some(expr3_0); 12561 } 12562 } 12563 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12564 let pattern6_0 = arg3; 12565 if let &AtomicRmwOp::Nand = pattern6_0 { 12566 let pattern8_0 = arg4; 12567 let pattern9_0 = arg5; 12568 let pattern10_0 = arg6; 12569 // Rule at src/isa/s390x/lower.isle line 1601. 12570 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12571 let expr1_0 = constructor_push_alu_reg( 12572 ctx, 12573 pattern0_0, 12574 &expr0_0, 12575 pattern8_0, 12576 pattern9_0, 12577 pattern10_0, 12578 )?; 12579 let expr2_0 = 12580 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12581 return Some(expr2_0); 12582 } 12583 } 12584 } 12585 } 12586 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12587 let pattern3_0 = arg2; 12588 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12589 let pattern5_0 = arg3; 12590 if let &AtomicRmwOp::Xchg = pattern5_0 { 12591 let pattern7_0 = arg4; 12592 let pattern8_0 = arg5; 12593 let pattern9_0 = arg6; 12594 // Rule at src/isa/s390x/lower.isle line 1587. 12595 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12596 return Some(expr0_0); 12597 } 12598 } 12599 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12600 let pattern5_0 = arg3; 12601 if let &AtomicRmwOp::Xchg = pattern5_0 { 12602 let pattern7_0 = arg4; 12603 let pattern8_0 = arg5; 12604 let pattern9_0 = arg6; 12605 // Rule at src/isa/s390x/lower.isle line 1584. 12606 return Some(pattern9_0); 12607 } 12608 } 12609 } 12610 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12611 let pattern3_0 = arg2; 12612 let pattern4_0 = arg3; 12613 match pattern4_0 { 12614 &AtomicRmwOp::And => { 12615 let pattern6_0 = arg4; 12616 let pattern7_0 = arg5; 12617 let pattern8_0 = arg6; 12618 // Rule at src/isa/s390x/lower.isle line 1615. 12619 let expr0_0 = RxSBGOp::And; 12620 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12621 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12622 pattern8_0, 12623 )?; 12624 return Some(expr1_0); 12625 } 12626 &AtomicRmwOp::Nand => { 12627 let pattern6_0 = arg4; 12628 let pattern7_0 = arg5; 12629 let pattern8_0 = arg6; 12630 // Rule at src/isa/s390x/lower.isle line 1621. 12631 let expr0_0 = RxSBGOp::And; 12632 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12633 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12634 pattern8_0, 12635 )?; 12636 let expr2_0 = constructor_atomic_rmw_body_invert( 12637 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12638 )?; 12639 return Some(expr2_0); 12640 } 12641 &AtomicRmwOp::Or => { 12642 let pattern6_0 = arg4; 12643 let pattern7_0 = arg5; 12644 let pattern8_0 = arg6; 12645 // Rule at src/isa/s390x/lower.isle line 1617. 12646 let expr0_0 = RxSBGOp::Or; 12647 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12648 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12649 pattern8_0, 12650 )?; 12651 return Some(expr1_0); 12652 } 12653 &AtomicRmwOp::Xchg => { 12654 let pattern6_0 = arg4; 12655 let pattern7_0 = arg5; 12656 let pattern8_0 = arg6; 12657 // Rule at src/isa/s390x/lower.isle line 1613. 12658 let expr0_0 = RxSBGOp::Insert; 12659 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12660 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12661 pattern8_0, 12662 )?; 12663 return Some(expr1_0); 12664 } 12665 &AtomicRmwOp::Xor => { 12666 let pattern6_0 = arg4; 12667 let pattern7_0 = arg5; 12668 let pattern8_0 = arg6; 12669 // Rule at src/isa/s390x/lower.isle line 1619. 12670 let expr0_0 = RxSBGOp::Xor; 12671 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12672 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12673 pattern8_0, 12674 )?; 12675 return Some(expr1_0); 12676 } 12677 _ => {} 12678 } 12679 } 12680 let pattern2_0 = arg2; 12681 let pattern3_0 = arg3; 12682 match pattern3_0 { 12683 &AtomicRmwOp::Add => { 12684 let pattern5_0 = arg4; 12685 let pattern6_0 = arg5; 12686 let pattern7_0 = arg6; 12687 // Rule at src/isa/s390x/lower.isle line 1653. 12688 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12689 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12690 let expr2_0 = constructor_atomic_rmw_body_addsub( 12691 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12692 pattern7_0, 12693 )?; 12694 return Some(expr2_0); 12695 } 12696 &AtomicRmwOp::Smax => { 12697 let pattern5_0 = arg4; 12698 let pattern6_0 = arg5; 12699 let pattern7_0 = arg6; 12700 // Rule at src/isa/s390x/lower.isle line 1694. 12701 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12702 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12703 let expr2_0 = IntCC::SignedGreaterThan; 12704 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12705 let expr4_0 = constructor_atomic_rmw_body_minmax( 12706 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12707 pattern6_0, pattern7_0, 12708 )?; 12709 return Some(expr4_0); 12710 } 12711 &AtomicRmwOp::Smin => { 12712 let pattern5_0 = arg4; 12713 let pattern6_0 = arg5; 12714 let pattern7_0 = arg6; 12715 // Rule at src/isa/s390x/lower.isle line 1691. 12716 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12717 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12718 let expr2_0 = IntCC::SignedLessThan; 12719 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12720 let expr4_0 = constructor_atomic_rmw_body_minmax( 12721 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12722 pattern6_0, pattern7_0, 12723 )?; 12724 return Some(expr4_0); 12725 } 12726 &AtomicRmwOp::Sub => { 12727 let pattern5_0 = arg4; 12728 let pattern6_0 = arg5; 12729 let pattern7_0 = arg6; 12730 // Rule at src/isa/s390x/lower.isle line 1655. 12731 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12732 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12733 let expr2_0 = constructor_atomic_rmw_body_addsub( 12734 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12735 pattern7_0, 12736 )?; 12737 return Some(expr2_0); 12738 } 12739 &AtomicRmwOp::Umax => { 12740 let pattern5_0 = arg4; 12741 let pattern6_0 = arg5; 12742 let pattern7_0 = arg6; 12743 // Rule at src/isa/s390x/lower.isle line 1700. 12744 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12745 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12746 let expr2_0 = IntCC::UnsignedGreaterThan; 12747 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12748 let expr4_0 = constructor_atomic_rmw_body_minmax( 12749 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12750 pattern6_0, pattern7_0, 12751 )?; 12752 return Some(expr4_0); 12753 } 12754 &AtomicRmwOp::Umin => { 12755 let pattern5_0 = arg4; 12756 let pattern6_0 = arg5; 12757 let pattern7_0 = arg6; 12758 // Rule at src/isa/s390x/lower.isle line 1697. 12759 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12760 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12761 let expr2_0 = IntCC::UnsignedLessThan; 12762 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12763 let expr4_0 = constructor_atomic_rmw_body_minmax( 12764 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12765 pattern6_0, pattern7_0, 12766 )?; 12767 return Some(expr4_0); 12768 } 12769 _ => {} 12770 } 12771 return None; 12772 } 12773 12774 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12775 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12776 ctx: &mut C, 12777 arg0: &VecMInstBuilder, 12778 arg1: Type, 12779 arg2: MemFlags, 12780 arg3: &RxSBGOp, 12781 arg4: WritableReg, 12782 arg5: Reg, 12783 arg6: Reg, 12784 ) -> Option<Reg> { 12785 let pattern0_0 = arg0; 12786 let pattern1_0 = arg1; 12787 if pattern1_0 == I8 { 12788 let pattern3_0 = arg2; 12789 let pattern4_0 = arg3; 12790 let pattern5_0 = arg4; 12791 let pattern6_0 = arg5; 12792 let pattern7_0 = arg6; 12793 // Rule at src/isa/s390x/lower.isle line 1629. 12794 let expr0_0: u8 = 32; 12795 let expr1_0: u8 = 40; 12796 let expr2_0: i8 = 24; 12797 let expr3_0 = constructor_push_rxsbg( 12798 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12799 expr2_0, 12800 )?; 12801 return Some(expr3_0); 12802 } 12803 if pattern1_0 == I16 { 12804 let pattern3_0 = arg2; 12805 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12806 let pattern5_0 = arg3; 12807 let pattern6_0 = arg4; 12808 let pattern7_0 = arg5; 12809 let pattern8_0 = arg6; 12810 // Rule at src/isa/s390x/lower.isle line 1637. 12811 let expr0_0: Type = I32; 12812 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12813 let expr2_0: u8 = 48; 12814 let expr3_0: u8 = 64; 12815 let expr4_0: i8 = -16; 12816 let expr5_0 = constructor_push_rxsbg( 12817 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12818 expr4_0, 12819 )?; 12820 return Some(expr5_0); 12821 } 12822 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12823 let pattern5_0 = arg3; 12824 let pattern6_0 = arg4; 12825 let pattern7_0 = arg5; 12826 let pattern8_0 = arg6; 12827 // Rule at src/isa/s390x/lower.isle line 1633. 12828 let expr0_0: u8 = 32; 12829 let expr1_0: u8 = 48; 12830 let expr2_0: i8 = 16; 12831 let expr3_0 = constructor_push_rxsbg( 12832 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12833 expr2_0, 12834 )?; 12835 return Some(expr3_0); 12836 } 12837 } 12838 return None; 12839 } 12840 12841 // Generated as internal constructor for term atomic_rmw_body_invert. 12842 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12843 ctx: &mut C, 12844 arg0: &VecMInstBuilder, 12845 arg1: Type, 12846 arg2: MemFlags, 12847 arg3: WritableReg, 12848 arg4: Reg, 12849 ) -> Option<Reg> { 12850 let pattern0_0 = arg0; 12851 let pattern1_0 = arg1; 12852 if pattern1_0 == I8 { 12853 let pattern3_0 = arg2; 12854 let pattern4_0 = arg3; 12855 let pattern5_0 = arg4; 12856 // Rule at src/isa/s390x/lower.isle line 1643. 12857 let expr0_0: Type = I32; 12858 let expr1_0: u32 = 4278190080; 12859 let expr2_0: u8 = 0; 12860 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12861 let expr4_0 = constructor_push_xor_uimm32shifted( 12862 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12863 )?; 12864 return Some(expr4_0); 12865 } 12866 if pattern1_0 == I16 { 12867 let pattern3_0 = arg2; 12868 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12869 let pattern5_0 = arg3; 12870 let pattern6_0 = arg4; 12871 // Rule at src/isa/s390x/lower.isle line 1649. 12872 let expr0_0: Type = I32; 12873 let expr1_0: u32 = 65535; 12874 let expr2_0: u8 = 0; 12875 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12876 let expr4_0 = constructor_push_xor_uimm32shifted( 12877 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12878 )?; 12879 return Some(expr4_0); 12880 } 12881 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12882 let pattern5_0 = arg3; 12883 let pattern6_0 = arg4; 12884 // Rule at src/isa/s390x/lower.isle line 1646. 12885 let expr0_0: Type = I32; 12886 let expr1_0: u32 = 4294901760; 12887 let expr2_0: u8 = 0; 12888 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12889 let expr4_0 = constructor_push_xor_uimm32shifted( 12890 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12891 )?; 12892 return Some(expr4_0); 12893 } 12894 } 12895 return None; 12896 } 12897 12898 // Generated as internal constructor for term atomic_rmw_body_addsub. 12899 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12900 ctx: &mut C, 12901 arg0: &VecMInstBuilder, 12902 arg1: Type, 12903 arg2: MemFlags, 12904 arg3: &ALUOp, 12905 arg4: WritableReg, 12906 arg5: Reg, 12907 arg6: Reg, 12908 ) -> Option<Reg> { 12909 let pattern0_0 = arg0; 12910 let pattern1_0 = arg1; 12911 if pattern1_0 == I8 { 12912 let pattern3_0 = arg2; 12913 let pattern4_0 = arg3; 12914 let pattern5_0 = arg4; 12915 let pattern6_0 = arg5; 12916 let pattern7_0 = arg6; 12917 // Rule at src/isa/s390x/lower.isle line 1672. 12918 let expr0_0: Type = I32; 12919 let expr1_0: u8 = 24; 12920 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12921 let expr3_0 = 12922 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12923 return Some(expr3_0); 12924 } 12925 if pattern1_0 == I16 { 12926 let pattern3_0 = arg2; 12927 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12928 let pattern5_0 = arg3; 12929 let pattern6_0 = arg4; 12930 let pattern7_0 = arg5; 12931 let pattern8_0 = arg6; 12932 // Rule at src/isa/s390x/lower.isle line 1684. 12933 let expr0_0: Type = I32; 12934 let expr1_0: u8 = 16; 12935 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12936 let expr3_0: Type = I32; 12937 let expr4_0 = 12938 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12939 let expr5_0 = constructor_push_alu_reg( 12940 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12941 )?; 12942 let expr6_0: Type = I32; 12943 let expr7_0 = 12944 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12945 return Some(expr7_0); 12946 } 12947 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12948 let pattern5_0 = arg3; 12949 let pattern6_0 = arg4; 12950 let pattern7_0 = arg5; 12951 let pattern8_0 = arg6; 12952 // Rule at src/isa/s390x/lower.isle line 1676. 12953 let expr0_0: Type = I32; 12954 let expr1_0: u8 = 16; 12955 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12956 let expr3_0 = constructor_push_alu_reg( 12957 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12958 )?; 12959 return Some(expr3_0); 12960 } 12961 } 12962 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12963 let pattern3_0 = arg2; 12964 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12965 let pattern5_0 = arg3; 12966 let pattern6_0 = arg4; 12967 let pattern7_0 = arg5; 12968 let pattern8_0 = arg6; 12969 // Rule at src/isa/s390x/lower.isle line 1666. 12970 let expr0_0 = 12971 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12972 let expr1_0 = constructor_push_alu_reg( 12973 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12974 )?; 12975 let expr2_0 = 12976 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12977 return Some(expr2_0); 12978 } 12979 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12980 let pattern5_0 = arg3; 12981 let pattern6_0 = arg4; 12982 let pattern7_0 = arg5; 12983 let pattern8_0 = arg6; 12984 // Rule at src/isa/s390x/lower.isle line 1662. 12985 let expr0_0 = constructor_push_alu_reg( 12986 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12987 )?; 12988 return Some(expr0_0); 12989 } 12990 } 12991 return None; 12992 } 12993 12994 // Generated as internal constructor for term atomic_rmw_body_minmax. 12995 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12996 ctx: &mut C, 12997 arg0: &VecMInstBuilder, 12998 arg1: Type, 12999 arg2: MemFlags, 13000 arg3: &CmpOp, 13001 arg4: &Cond, 13002 arg5: WritableReg, 13003 arg6: Reg, 13004 arg7: Reg, 13005 ) -> Option<Reg> { 13006 let pattern0_0 = arg0; 13007 let pattern1_0 = arg1; 13008 if pattern1_0 == I8 { 13009 let pattern3_0 = arg2; 13010 let pattern4_0 = arg3; 13011 let pattern5_0 = arg4; 13012 let pattern6_0 = arg5; 13013 let pattern7_0 = arg6; 13014 let pattern8_0 = arg7; 13015 // Rule at src/isa/s390x/lower.isle line 1729. 13016 let expr0_0: Type = I32; 13017 let expr1_0: u8 = 24; 13018 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 13019 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 13020 let expr4_0 = C::invert_cond(ctx, pattern5_0); 13021 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13022 let expr6_0 = RxSBGOp::Insert; 13023 let expr7_0: u8 = 32; 13024 let expr8_0: u8 = 40; 13025 let expr9_0: i8 = 0; 13026 let expr10_0 = constructor_push_rxsbg( 13027 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 13028 )?; 13029 return Some(expr10_0); 13030 } 13031 if pattern1_0 == I16 { 13032 let pattern3_0 = arg2; 13033 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13034 let pattern5_0 = arg3; 13035 let pattern6_0 = arg4; 13036 let pattern7_0 = arg5; 13037 let pattern8_0 = arg6; 13038 let pattern9_0 = arg7; 13039 // Rule at src/isa/s390x/lower.isle line 1742. 13040 let expr0_0: Type = I32; 13041 let expr1_0: u8 = 16; 13042 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13043 let expr3_0: Type = I32; 13044 let expr4_0 = 13045 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 13046 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 13047 let expr6_0 = C::invert_cond(ctx, pattern6_0); 13048 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 13049 let expr8_0 = RxSBGOp::Insert; 13050 let expr9_0: u8 = 32; 13051 let expr10_0: u8 = 48; 13052 let expr11_0: i8 = 0; 13053 let expr12_0 = constructor_push_rxsbg( 13054 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 13055 expr11_0, 13056 )?; 13057 let expr13_0: Type = I32; 13058 let expr14_0 = 13059 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 13060 return Some(expr14_0); 13061 } 13062 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13063 let pattern5_0 = arg3; 13064 let pattern6_0 = arg4; 13065 let pattern7_0 = arg5; 13066 let pattern8_0 = arg6; 13067 let pattern9_0 = arg7; 13068 // Rule at src/isa/s390x/lower.isle line 1735. 13069 let expr0_0: Type = I32; 13070 let expr1_0: u8 = 16; 13071 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 13072 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 13073 let expr4_0 = C::invert_cond(ctx, pattern6_0); 13074 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 13075 let expr6_0 = RxSBGOp::Insert; 13076 let expr7_0: u8 = 32; 13077 let expr8_0: u8 = 48; 13078 let expr9_0: i8 = 0; 13079 let expr10_0 = constructor_push_rxsbg( 13080 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 13081 expr9_0, 13082 )?; 13083 return Some(expr10_0); 13084 } 13085 } 13086 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 13087 let pattern3_0 = arg2; 13088 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13089 let pattern5_0 = arg3; 13090 let pattern6_0 = arg4; 13091 let pattern7_0 = arg5; 13092 let pattern8_0 = arg6; 13093 let pattern9_0 = arg7; 13094 // Rule at src/isa/s390x/lower.isle line 1717. 13095 let expr0_0 = 13096 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13097 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13098 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13099 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13100 let expr4_0 = 13101 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13102 return Some(expr4_0); 13103 } 13104 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13105 let pattern5_0 = arg3; 13106 let pattern6_0 = arg4; 13107 let pattern7_0 = arg5; 13108 let pattern8_0 = arg6; 13109 let pattern9_0 = arg7; 13110 // Rule at src/isa/s390x/lower.isle line 1710. 13111 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13112 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13113 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13114 return Some(pattern9_0); 13115 } 13116 } 13117 return None; 13118 } 13119 13120 // Generated as internal constructor for term atomic_cas_body. 13121 pub fn constructor_atomic_cas_body<C: Context>( 13122 ctx: &mut C, 13123 arg0: &VecMInstBuilder, 13124 arg1: Type, 13125 arg2: MemFlags, 13126 arg3: WritableReg, 13127 arg4: Reg, 13128 arg5: Reg, 13129 arg6: Reg, 13130 ) -> Option<Reg> { 13131 let pattern0_0 = arg0; 13132 let pattern1_0 = arg1; 13133 if pattern1_0 == I8 { 13134 let pattern3_0 = arg2; 13135 let pattern4_0 = arg3; 13136 let pattern5_0 = arg4; 13137 let pattern6_0 = arg5; 13138 let pattern7_0 = arg6; 13139 // Rule at src/isa/s390x/lower.isle line 1794. 13140 let expr0_0 = RxSBGOp::Xor; 13141 let expr1_0: u8 = 32; 13142 let expr2_0: u8 = 40; 13143 let expr3_0: i8 = 24; 13144 let expr4_0 = constructor_rxsbg_test( 13145 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13146 )?; 13147 let expr5_0 = IntCC::NotEqual; 13148 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13149 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13150 let expr8_0 = RxSBGOp::Insert; 13151 let expr9_0: u8 = 32; 13152 let expr10_0: u8 = 40; 13153 let expr11_0: i8 = 24; 13154 let expr12_0 = constructor_push_rxsbg( 13155 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13156 expr11_0, 13157 )?; 13158 return Some(expr12_0); 13159 } 13160 if pattern1_0 == I16 { 13161 let pattern3_0 = arg2; 13162 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13163 let pattern5_0 = arg3; 13164 let pattern6_0 = arg4; 13165 let pattern7_0 = arg5; 13166 let pattern8_0 = arg6; 13167 // Rule at src/isa/s390x/lower.isle line 1812. 13168 let expr0_0: Type = I32; 13169 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13170 let expr2_0: Type = I32; 13171 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13172 let expr4_0 = RxSBGOp::Xor; 13173 let expr5_0: u8 = 48; 13174 let expr6_0: u8 = 64; 13175 let expr7_0: i8 = -16; 13176 let expr8_0 = constructor_rxsbg_test( 13177 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13178 )?; 13179 let expr9_0 = IntCC::NotEqual; 13180 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13181 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13182 let expr12_0 = RxSBGOp::Insert; 13183 let expr13_0: u8 = 48; 13184 let expr14_0: u8 = 64; 13185 let expr15_0: i8 = -16; 13186 let expr16_0 = constructor_push_rxsbg( 13187 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13188 expr15_0, 13189 )?; 13190 return Some(expr16_0); 13191 } 13192 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13193 let pattern5_0 = arg3; 13194 let pattern6_0 = arg4; 13195 let pattern7_0 = arg5; 13196 let pattern8_0 = arg6; 13197 // Rule at src/isa/s390x/lower.isle line 1801. 13198 let expr0_0 = RxSBGOp::Xor; 13199 let expr1_0: u8 = 32; 13200 let expr2_0: u8 = 48; 13201 let expr3_0: i8 = 16; 13202 let expr4_0 = constructor_rxsbg_test( 13203 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13204 )?; 13205 let expr5_0 = IntCC::NotEqual; 13206 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13207 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13208 let expr8_0 = RxSBGOp::Insert; 13209 let expr9_0: u8 = 32; 13210 let expr10_0: u8 = 48; 13211 let expr11_0: i8 = 16; 13212 let expr12_0 = constructor_push_rxsbg( 13213 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13214 expr11_0, 13215 )?; 13216 return Some(expr12_0); 13217 } 13218 } 13219 return None; 13220 } 13221 13222 // Generated as internal constructor for term atomic_store_impl. 13223 pub fn constructor_atomic_store_impl<C: Context>( 13224 ctx: &mut C, 13225 arg0: &SideEffectNoResult, 13226 ) -> Option<InstOutput> { 13227 let pattern0_0 = arg0; 13228 // Rule at src/isa/s390x/lower.isle line 1858. 13229 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13230 let expr1_0 = constructor_fence_impl(ctx)?; 13231 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13232 return Some(expr2_0); 13233 } 13234 13235 // Generated as internal constructor for term icmp_val. 13236 pub fn constructor_icmp_val<C: Context>( 13237 ctx: &mut C, 13238 arg0: bool, 13239 arg1: &IntCC, 13240 arg2: Value, 13241 arg3: Value, 13242 ) -> Option<ProducesBool> { 13243 let pattern0_0 = arg0; 13244 let pattern1_0 = arg1; 13245 if let Some(()) = C::signed(ctx, pattern1_0) { 13246 let pattern3_0 = arg2; 13247 let pattern4_0 = arg3; 13248 // Rule at src/isa/s390x/lower.isle line 1925. 13249 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13250 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13251 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13252 return Some(expr2_0); 13253 } 13254 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13255 let pattern3_0 = arg2; 13256 let pattern4_0 = arg3; 13257 // Rule at src/isa/s390x/lower.isle line 1928. 13258 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13259 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13260 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13261 return Some(expr2_0); 13262 } 13263 return None; 13264 } 13265 13266 // Generated as internal constructor for term icmps_val. 13267 pub fn constructor_icmps_val<C: Context>( 13268 ctx: &mut C, 13269 arg0: bool, 13270 arg1: Value, 13271 arg2: Value, 13272 ) -> Option<ProducesFlags> { 13273 let pattern0_0 = arg0; 13274 if pattern0_0 == true { 13275 let pattern2_0 = arg1; 13276 let pattern3_0 = C::value_type(ctx, pattern2_0); 13277 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13278 let pattern5_0 = arg2; 13279 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13280 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13281 if let &InstructionData::Load { 13282 opcode: ref pattern8_0, 13283 arg: pattern8_1, 13284 flags: pattern8_2, 13285 offset: pattern8_3, 13286 } = &pattern7_0 13287 { 13288 match pattern8_0 { 13289 &Opcode::Sload16 => { 13290 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13291 // Rule at src/isa/s390x/lower.isle line 1958. 13292 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13293 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13294 let expr2_0 = constructor_icmps_mem_sext16( 13295 ctx, pattern4_0, expr0_0, &expr1_0, 13296 )?; 13297 return Some(expr2_0); 13298 } 13299 } 13300 &Opcode::Sload32 => { 13301 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13302 // Rule at src/isa/s390x/lower.isle line 1960. 13303 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13304 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13305 let expr2_0 = constructor_icmps_mem_sext32( 13306 ctx, pattern4_0, expr0_0, &expr1_0, 13307 )?; 13308 return Some(expr2_0); 13309 } 13310 } 13311 _ => {} 13312 } 13313 } 13314 } 13315 let pattern6_0 = C::value_type(ctx, pattern5_0); 13316 if pattern6_0 == I16 { 13317 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13318 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13319 if let &InstructionData::Load { 13320 opcode: ref pattern10_0, 13321 arg: pattern10_1, 13322 flags: pattern10_2, 13323 offset: pattern10_3, 13324 } = &pattern9_0 13325 { 13326 if let &Opcode::Load = pattern10_0 { 13327 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13328 // Rule at src/isa/s390x/lower.isle line 1954. 13329 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13330 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13331 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13332 let expr3_0 = 13333 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13334 return Some(expr3_0); 13335 } 13336 } 13337 } 13338 } 13339 } 13340 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13341 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13342 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13343 if let &InstructionData::Load { 13344 opcode: ref pattern10_0, 13345 arg: pattern10_1, 13346 flags: pattern10_2, 13347 offset: pattern10_3, 13348 } = &pattern9_0 13349 { 13350 if let &Opcode::Load = pattern10_0 { 13351 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13352 // Rule at src/isa/s390x/lower.isle line 1950. 13353 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13354 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13355 let expr2_0 = 13356 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13357 return Some(expr2_0); 13358 } 13359 } 13360 } 13361 } 13362 } 13363 } 13364 } 13365 let pattern1_0 = arg1; 13366 let pattern2_0 = C::value_type(ctx, pattern1_0); 13367 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13368 let pattern4_0 = arg2; 13369 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13370 // Rule at src/isa/s390x/lower.isle line 1944. 13371 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13372 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13373 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13374 return Some(expr2_0); 13375 } 13376 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13377 // Rule at src/isa/s390x/lower.isle line 1946. 13378 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13379 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13380 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13381 return Some(expr2_0); 13382 } 13383 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13384 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13385 if let &InstructionData::Unary { 13386 opcode: ref pattern7_0, 13387 arg: pattern7_1, 13388 } = &pattern6_0 13389 { 13390 if let &Opcode::Sextend = pattern7_0 { 13391 let pattern9_0 = C::value_type(ctx, pattern7_1); 13392 if pattern9_0 == I32 { 13393 // Rule at src/isa/s390x/lower.isle line 1940. 13394 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13395 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13396 let expr2_0 = 13397 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13398 return Some(expr2_0); 13399 } 13400 } 13401 } 13402 } 13403 // Rule at src/isa/s390x/lower.isle line 1936. 13404 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13405 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13406 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13407 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13408 return Some(expr3_0); 13409 } 13410 return None; 13411 } 13412 13413 // Generated as internal constructor for term icmpu_val. 13414 pub fn constructor_icmpu_val<C: Context>( 13415 ctx: &mut C, 13416 arg0: bool, 13417 arg1: Value, 13418 arg2: Value, 13419 ) -> Option<ProducesFlags> { 13420 let pattern0_0 = arg0; 13421 if pattern0_0 == true { 13422 let pattern2_0 = arg1; 13423 let pattern3_0 = C::value_type(ctx, pattern2_0); 13424 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13425 let pattern5_0 = arg2; 13426 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13427 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13428 if let &InstructionData::Load { 13429 opcode: ref pattern8_0, 13430 arg: pattern8_1, 13431 flags: pattern8_2, 13432 offset: pattern8_3, 13433 } = &pattern7_0 13434 { 13435 match pattern8_0 { 13436 &Opcode::Uload16 => { 13437 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13438 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13439 if let &InstructionData::UnaryGlobalValue { 13440 opcode: ref pattern12_0, 13441 global_value: pattern12_1, 13442 } = &pattern11_0 13443 { 13444 if let &Opcode::SymbolValue = pattern12_0 { 13445 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13446 C::symbol_value_data(ctx, pattern12_1) 13447 { 13448 if let Some(()) = 13449 C::reloc_distance_near(ctx, pattern14_1) 13450 { 13451 let pattern16_0 = 13452 C::i64_from_offset(ctx, pattern8_3); 13453 let closure17 = || { 13454 return Some(pattern14_2); 13455 }; 13456 if let Some(pattern17_0) = closure17() { 13457 if let Some(pattern18_0) = 13458 C::memarg_symbol_offset_sum( 13459 ctx, 13460 pattern16_0, 13461 pattern17_0, 13462 ) 13463 { 13464 let pattern19_0 = 13465 C::inst_data(ctx, pattern6_0); 13466 if let &InstructionData::Load { 13467 opcode: ref pattern20_0, 13468 arg: pattern20_1, 13469 flags: pattern20_2, 13470 offset: pattern20_3, 13471 } = &pattern19_0 13472 { 13473 if let &Opcode::Uload16 = pattern20_0 { 13474 if let Some(()) = 13475 C::bigendian(ctx, pattern20_2) 13476 { 13477 // Rule at src/isa/s390x/lower.isle line 1993. 13478 let expr0_0 = C::put_in_reg( 13479 ctx, pattern2_0, 13480 ); 13481 let expr1_0 = 13482 constructor_sink_uload16( 13483 ctx, pattern6_0, 13484 )?; 13485 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13486 return Some(expr2_0); 13487 } 13488 } 13489 } 13490 } 13491 } 13492 } 13493 } 13494 } 13495 } 13496 } 13497 } 13498 &Opcode::Uload32 => { 13499 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13500 // Rule at src/isa/s390x/lower.isle line 1996. 13501 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13502 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13503 let expr2_0 = constructor_icmpu_mem_zext32( 13504 ctx, pattern4_0, expr0_0, &expr1_0, 13505 )?; 13506 return Some(expr2_0); 13507 } 13508 } 13509 _ => {} 13510 } 13511 } 13512 } 13513 let pattern6_0 = C::value_type(ctx, pattern5_0); 13514 if pattern6_0 == I16 { 13515 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13516 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13517 if let &InstructionData::Load { 13518 opcode: ref pattern10_0, 13519 arg: pattern10_1, 13520 flags: pattern10_2, 13521 offset: pattern10_3, 13522 } = &pattern9_0 13523 { 13524 if let &Opcode::Load = pattern10_0 { 13525 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13526 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13527 if let &InstructionData::UnaryGlobalValue { 13528 opcode: ref pattern14_0, 13529 global_value: pattern14_1, 13530 } = &pattern13_0 13531 { 13532 if let &Opcode::SymbolValue = pattern14_0 { 13533 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13534 C::symbol_value_data(ctx, pattern14_1) 13535 { 13536 if let Some(()) = 13537 C::reloc_distance_near(ctx, pattern16_1) 13538 { 13539 let pattern18_0 = 13540 C::i64_from_offset(ctx, pattern10_3); 13541 let closure19 = || { 13542 return Some(pattern16_2); 13543 }; 13544 if let Some(pattern19_0) = closure19() { 13545 if let Some(pattern20_0) = 13546 C::memarg_symbol_offset_sum( 13547 ctx, 13548 pattern18_0, 13549 pattern19_0, 13550 ) 13551 { 13552 let pattern21_0 = 13553 C::inst_data(ctx, pattern8_0); 13554 if let &InstructionData::Load { 13555 opcode: ref pattern22_0, 13556 arg: pattern22_1, 13557 flags: pattern22_2, 13558 offset: pattern22_3, 13559 } = &pattern21_0 13560 { 13561 if let &Opcode::Load = pattern22_0 { 13562 if let Some(()) = 13563 C::bigendian(ctx, pattern22_2) 13564 { 13565 // Rule at src/isa/s390x/lower.isle line 1986. 13566 let expr0_0 = 13567 constructor_ty_ext32( 13568 ctx, pattern4_0, 13569 )?; 13570 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13571 let expr2_0 = 13572 constructor_sink_load( 13573 ctx, pattern8_0, 13574 )?; 13575 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13576 return Some(expr3_0); 13577 } 13578 } 13579 } 13580 } 13581 } 13582 } 13583 } 13584 } 13585 } 13586 } 13587 } 13588 } 13589 } 13590 } 13591 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13592 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13593 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13594 if let &InstructionData::Load { 13595 opcode: ref pattern10_0, 13596 arg: pattern10_1, 13597 flags: pattern10_2, 13598 offset: pattern10_3, 13599 } = &pattern9_0 13600 { 13601 if let &Opcode::Load = pattern10_0 { 13602 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13603 // Rule at src/isa/s390x/lower.isle line 1980. 13604 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13605 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13606 let expr2_0 = 13607 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13608 return Some(expr2_0); 13609 } 13610 } 13611 } 13612 } 13613 } 13614 } 13615 } 13616 let pattern1_0 = arg1; 13617 let pattern2_0 = C::value_type(ctx, pattern1_0); 13618 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13619 let pattern4_0 = arg2; 13620 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13621 // Rule at src/isa/s390x/lower.isle line 1976. 13622 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13623 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13624 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13625 return Some(expr2_0); 13626 } 13627 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13628 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13629 if let &InstructionData::Unary { 13630 opcode: ref pattern7_0, 13631 arg: pattern7_1, 13632 } = &pattern6_0 13633 { 13634 if let &Opcode::Uextend = pattern7_0 { 13635 let pattern9_0 = C::value_type(ctx, pattern7_1); 13636 if pattern9_0 == I32 { 13637 // Rule at src/isa/s390x/lower.isle line 1972. 13638 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13639 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13640 let expr2_0 = 13641 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13642 return Some(expr2_0); 13643 } 13644 } 13645 } 13646 } 13647 // Rule at src/isa/s390x/lower.isle line 1968. 13648 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13649 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13650 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13651 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13652 return Some(expr3_0); 13653 } 13654 return None; 13655 } 13656 13657 // Generated as internal constructor for term fcmp_val. 13658 pub fn constructor_fcmp_val<C: Context>( 13659 ctx: &mut C, 13660 arg0: &FloatCC, 13661 arg1: Value, 13662 arg2: Value, 13663 ) -> Option<ProducesBool> { 13664 let pattern0_0 = arg0; 13665 let pattern1_0 = arg1; 13666 let pattern2_0 = C::value_type(ctx, pattern1_0); 13667 let pattern3_0 = arg2; 13668 // Rule at src/isa/s390x/lower.isle line 2009. 13669 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13670 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13671 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13672 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13673 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13674 return Some(expr4_0); 13675 } 13676 13677 // Generated as internal constructor for term value_nonzero. 13678 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13679 let pattern0_0 = arg0; 13680 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13681 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13682 match &pattern2_0 { 13683 &InstructionData::FloatCompare { 13684 opcode: ref pattern3_0, 13685 args: ref pattern3_1, 13686 cond: ref pattern3_2, 13687 } => { 13688 if let &Opcode::Fcmp = pattern3_0 { 13689 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13690 // Rule at src/isa/s390x/lower.isle line 2037. 13691 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13692 return Some(expr0_0); 13693 } 13694 } 13695 &InstructionData::IntCompare { 13696 opcode: ref pattern3_0, 13697 args: ref pattern3_1, 13698 cond: ref pattern3_2, 13699 } => { 13700 if let &Opcode::Icmp = pattern3_0 { 13701 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13702 // Rule at src/isa/s390x/lower.isle line 2036. 13703 let expr0_0: bool = false; 13704 let expr1_0 = 13705 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13706 return Some(expr1_0); 13707 } 13708 } 13709 &InstructionData::Unary { 13710 opcode: ref pattern3_0, 13711 arg: pattern3_1, 13712 } => { 13713 if let &Opcode::Bint = pattern3_0 { 13714 // Rule at src/isa/s390x/lower.isle line 2035. 13715 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13716 return Some(expr0_0); 13717 } 13718 } 13719 _ => {} 13720 } 13721 } 13722 let pattern1_0 = C::value_type(ctx, pattern0_0); 13723 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13724 // Rule at src/isa/s390x/lower.isle line 2038. 13725 let expr0_0: Type = I32; 13726 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13727 let expr2_0: i16 = 0; 13728 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13729 let expr4_0 = IntCC::NotEqual; 13730 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13731 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13732 return Some(expr6_0); 13733 } 13734 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13735 // Rule at src/isa/s390x/lower.isle line 2041. 13736 let expr0_0: Type = I64; 13737 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13738 let expr2_0: i16 = 0; 13739 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13740 let expr4_0 = IntCC::NotEqual; 13741 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13742 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13743 return Some(expr6_0); 13744 } 13745 return None; 13746 } 13747