1 // GENERATED BY ISLE. DO NOT EDIT! 2 // 3 // Generated automatically from the instruction-selection DSL code in: 4 // - src/clif.isle 5 // - src/prelude.isle 6 // - src/isa/s390x/inst.isle 7 // - src/isa/s390x/lower.isle 8 9 #![allow(dead_code, unreachable_code, unreachable_patterns)] 10 #![allow(unused_imports, unused_variables, non_snake_case)] 11 #![allow(irrefutable_let_patterns)] 12 13 use super::*; // Pulls in all external types. 14 15 /// Context during lowering: an implementation of this trait 16 /// must be provided with all external constructors and extractors. 17 /// A mutable borrow is passed along through all lowering logic. 18 pub trait Context { 19 fn unpack_value_array_2(&mut self, arg0: &ValueArray2) -> (Value, Value); 20 fn pack_value_array_2(&mut self, arg0: Value, arg1: Value) -> ValueArray2; 21 fn unpack_value_array_3(&mut self, arg0: &ValueArray3) -> (Value, Value, Value); 22 fn pack_value_array_3(&mut self, arg0: Value, arg1: Value, arg2: Value) -> ValueArray3; 23 fn u32_add(&mut self, arg0: u32, arg1: u32) -> u32; 24 fn u8_and(&mut self, arg0: u8, arg1: u8) -> u8; 25 fn value_reg(&mut self, arg0: Reg) -> ValueRegs; 26 fn value_regs(&mut self, arg0: Reg, arg1: Reg) -> ValueRegs; 27 fn value_regs_invalid(&mut self) -> ValueRegs; 28 fn output_none(&mut self) -> InstOutput; 29 fn output(&mut self, arg0: ValueRegs) -> InstOutput; 30 fn output_pair(&mut self, arg0: ValueRegs, arg1: ValueRegs) -> InstOutput; 31 fn output_builder_new(&mut self) -> InstOutputBuilder; 32 fn output_builder_push(&mut self, arg0: &InstOutputBuilder, arg1: ValueRegs) -> Unit; 33 fn output_builder_finish(&mut self, arg0: &InstOutputBuilder) -> InstOutput; 34 fn temp_writable_reg(&mut self, arg0: Type) -> WritableReg; 35 fn invalid_reg(&mut self) -> Reg; 36 fn put_in_reg(&mut self, arg0: Value) -> Reg; 37 fn put_in_regs(&mut self, arg0: Value) -> ValueRegs; 38 fn value_regs_get(&mut self, arg0: ValueRegs, arg1: usize) -> Reg; 39 fn u8_as_u64(&mut self, arg0: u8) -> u64; 40 fn u16_as_u64(&mut self, arg0: u16) -> u64; 41 fn u32_as_u64(&mut self, arg0: u32) -> u64; 42 fn ty_bits(&mut self, arg0: Type) -> u8; 43 fn ty_bits_u16(&mut self, arg0: Type) -> u16; 44 fn ty_bytes(&mut self, arg0: Type) -> u16; 45 fn lane_type(&mut self, arg0: Type) -> Type; 46 fn fits_in_16(&mut self, arg0: Type) -> Option<Type>; 47 fn fits_in_32(&mut self, arg0: Type) -> Option<Type>; 48 fn fits_in_64(&mut self, arg0: Type) -> Option<Type>; 49 fn ty_32_or_64(&mut self, arg0: Type) -> Option<Type>; 50 fn ty_8_or_16(&mut self, arg0: Type) -> Option<Type>; 51 fn vec128(&mut self, arg0: Type) -> Option<Type>; 52 fn not_i64x2(&mut self, arg0: Type) -> Option<()>; 53 fn value_list_slice(&mut self, arg0: ValueList) -> ValueSlice; 54 fn unwrap_head_value_list_1(&mut self, arg0: ValueList) -> (Value, ValueSlice); 55 fn unwrap_head_value_list_2(&mut self, arg0: ValueList) -> (Value, Value, ValueSlice); 56 fn writable_reg_to_reg(&mut self, arg0: WritableReg) -> Reg; 57 fn u8_from_uimm8(&mut self, arg0: Uimm8) -> u8; 58 fn u64_from_imm64(&mut self, arg0: Imm64) -> u64; 59 fn nonzero_u64_from_imm64(&mut self, arg0: Imm64) -> Option<u64>; 60 fn u64_from_ieee32(&mut self, arg0: Ieee32) -> u64; 61 fn u64_from_ieee64(&mut self, arg0: Ieee64) -> u64; 62 fn inst_results(&mut self, arg0: Inst) -> ValueSlice; 63 fn first_result(&mut self, arg0: Inst) -> Option<Value>; 64 fn inst_data(&mut self, arg0: Inst) -> InstructionData; 65 fn value_type(&mut self, arg0: Value) -> Type; 66 fn multi_lane(&mut self, arg0: Type) -> Option<(u8, u16)>; 67 fn def_inst(&mut self, arg0: Value) -> Option<Inst>; 68 fn emit(&mut self, arg0: &MInst) -> Unit; 69 fn emit_safepoint(&mut self, arg0: &MInst) -> Unit; 70 fn trap_code_division_by_zero(&mut self) -> TrapCode; 71 fn trap_code_integer_overflow(&mut self) -> TrapCode; 72 fn trap_code_bad_conversion_to_integer(&mut self) -> TrapCode; 73 fn avoid_div_traps(&mut self, arg0: Type) -> Option<()>; 74 fn func_ref_data(&mut self, arg0: FuncRef) -> (SigRef, ExternalName, RelocDistance); 75 fn symbol_value_data( 76 &mut self, 77 arg0: GlobalValue, 78 ) -> Option<(ExternalName, RelocDistance, i64)>; 79 fn reloc_distance_near(&mut self, arg0: RelocDistance) -> Option<()>; 80 fn mie2_enabled(&mut self, arg0: Type) -> Option<()>; 81 fn mie2_disabled(&mut self, arg0: Type) -> Option<()>; 82 fn vxrs_ext2_enabled(&mut self, arg0: Type) -> Option<()>; 83 fn vxrs_ext2_disabled(&mut self, arg0: Type) -> Option<()>; 84 fn allow_div_traps(&mut self, arg0: Type) -> Option<()>; 85 fn writable_gpr(&mut self, arg0: u8) -> WritableReg; 86 fn zero_reg(&mut self) -> Reg; 87 fn gpr32_ty(&mut self, arg0: Type) -> Option<Type>; 88 fn gpr64_ty(&mut self, arg0: Type) -> Option<Type>; 89 fn uimm32shifted(&mut self, arg0: u32, arg1: u8) -> UImm32Shifted; 90 fn uimm16shifted(&mut self, arg0: u16, arg1: u8) -> UImm16Shifted; 91 fn i64_nonequal(&mut self, arg0: i64, arg1: i64) -> Option<i64>; 92 fn u8_as_u16(&mut self, arg0: u8) -> u16; 93 fn u64_as_u32(&mut self, arg0: u64) -> u32; 94 fn u64_as_i16(&mut self, arg0: u64) -> i16; 95 fn u64_nonzero_hipart(&mut self, arg0: u64) -> Option<u64>; 96 fn u64_nonzero_lopart(&mut self, arg0: u64) -> Option<u64>; 97 fn i32_from_u64(&mut self, arg0: u64) -> Option<i32>; 98 fn i16_from_u64(&mut self, arg0: u64) -> Option<i16>; 99 fn uimm32shifted_from_u64(&mut self, arg0: u64) -> Option<UImm32Shifted>; 100 fn uimm16shifted_from_u64(&mut self, arg0: u64) -> Option<UImm16Shifted>; 101 fn u64_from_value(&mut self, arg0: Value) -> Option<u64>; 102 fn u32_from_value(&mut self, arg0: Value) -> Option<u32>; 103 fn u8_from_value(&mut self, arg0: Value) -> Option<u8>; 104 fn u64_from_signed_value(&mut self, arg0: Value) -> Option<u64>; 105 fn i64_from_value(&mut self, arg0: Value) -> Option<i64>; 106 fn i32_from_value(&mut self, arg0: Value) -> Option<i32>; 107 fn i16_from_value(&mut self, arg0: Value) -> Option<i16>; 108 fn i16_from_swapped_value(&mut self, arg0: Value) -> Option<i16>; 109 fn i64_from_negated_value(&mut self, arg0: Value) -> Option<i64>; 110 fn i32_from_negated_value(&mut self, arg0: Value) -> Option<i32>; 111 fn i16_from_negated_value(&mut self, arg0: Value) -> Option<i16>; 112 fn uimm16shifted_from_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 113 fn uimm32shifted_from_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 114 fn uimm16shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm16Shifted>; 115 fn uimm32shifted_from_inverted_value(&mut self, arg0: Value) -> Option<UImm32Shifted>; 116 fn mask_amt_imm(&mut self, arg0: Type, arg1: i64) -> u8; 117 fn mask_as_cond(&mut self, arg0: u8) -> Cond; 118 fn intcc_as_cond(&mut self, arg0: &IntCC) -> Cond; 119 fn floatcc_as_cond(&mut self, arg0: &FloatCC) -> Cond; 120 fn invert_cond(&mut self, arg0: &Cond) -> Cond; 121 fn signed(&mut self, arg0: &IntCC) -> Option<()>; 122 fn unsigned(&mut self, arg0: &IntCC) -> Option<()>; 123 fn vec_length_minus1(&mut self, arg0: &VecMachLabel) -> u32; 124 fn vec_element(&mut self, arg0: &VecMachLabel, arg1: u8) -> MachLabel; 125 fn zero_offset(&mut self) -> Offset32; 126 fn i64_from_offset(&mut self, arg0: Offset32) -> i64; 127 fn box_external_name(&mut self, arg0: ExternalName) -> BoxExternalName; 128 fn littleendian(&mut self, arg0: MemFlags) -> Option<()>; 129 fn bigendian(&mut self, arg0: MemFlags) -> Option<()>; 130 fn memflags_trusted(&mut self) -> MemFlags; 131 fn memarg_reg_plus_reg(&mut self, arg0: Reg, arg1: Reg, arg2: MemFlags) -> MemArg; 132 fn memarg_reg_plus_off(&mut self, arg0: Reg, arg1: i64, arg2: MemFlags) -> MemArg; 133 fn memarg_symbol(&mut self, arg0: ExternalName, arg1: i32, arg2: MemFlags) -> MemArg; 134 fn memarg_symbol_offset_sum(&mut self, arg0: i64, arg1: i64) -> Option<i32>; 135 fn abi_stackslot_addr(&mut self, arg0: WritableReg, arg1: StackSlot, arg2: Offset32) -> MInst; 136 fn sinkable_inst(&mut self, arg0: Value) -> Option<Inst>; 137 fn sink_inst(&mut self, arg0: Inst) -> Unit; 138 fn inst_builder_new(&mut self) -> VecMInstBuilder; 139 fn inst_builder_push(&mut self, arg0: &VecMInstBuilder, arg1: &MInst) -> Unit; 140 fn inst_builder_finish(&mut self, arg0: &VecMInstBuilder) -> VecMInst; 141 fn real_reg(&mut self, arg0: WritableReg) -> Option<WritableReg>; 142 fn same_reg(&mut self, arg0: Reg, arg1: WritableReg) -> Option<()>; 143 } 144 145 /// Internal type SideEffectNoResult: defined at src/prelude.isle line 345. 146 #[derive(Clone, Debug)] 147 pub enum SideEffectNoResult { 148 Inst { inst: MInst }, 149 } 150 151 /// Internal type ProducesFlags: defined at src/prelude.isle line 367. 152 #[derive(Clone, Debug)] 153 pub enum ProducesFlags { 154 ProducesFlagsSideEffect { inst: MInst }, 155 ProducesFlagsReturnsReg { inst: MInst, result: Reg }, 156 ProducesFlagsReturnsResultWithConsumer { inst: MInst, result: Reg }, 157 } 158 159 /// Internal type ConsumesFlags: defined at src/prelude.isle line 378. 160 #[derive(Clone, Debug)] 161 pub enum ConsumesFlags { 162 ConsumesFlagsReturnsResultWithProducer { 163 inst: MInst, 164 result: Reg, 165 }, 166 ConsumesFlagsReturnsReg { 167 inst: MInst, 168 result: Reg, 169 }, 170 ConsumesFlagsTwiceReturnsValueRegs { 171 inst1: MInst, 172 inst2: MInst, 173 result: ValueRegs, 174 }, 175 } 176 177 /// Internal type MInst: defined at src/isa/s390x/inst.isle line 2. 178 #[derive(Clone, Debug)] 179 pub enum MInst { 180 Nop0, 181 Nop2, 182 AluRRR { 183 alu_op: ALUOp, 184 rd: WritableReg, 185 rn: Reg, 186 rm: Reg, 187 }, 188 AluRRSImm16 { 189 alu_op: ALUOp, 190 rd: WritableReg, 191 rn: Reg, 192 imm: i16, 193 }, 194 AluRR { 195 alu_op: ALUOp, 196 rd: WritableReg, 197 rm: Reg, 198 }, 199 AluRX { 200 alu_op: ALUOp, 201 rd: WritableReg, 202 mem: MemArg, 203 }, 204 AluRSImm16 { 205 alu_op: ALUOp, 206 rd: WritableReg, 207 imm: i16, 208 }, 209 AluRSImm32 { 210 alu_op: ALUOp, 211 rd: WritableReg, 212 imm: i32, 213 }, 214 AluRUImm32 { 215 alu_op: ALUOp, 216 rd: WritableReg, 217 imm: u32, 218 }, 219 AluRUImm16Shifted { 220 alu_op: ALUOp, 221 rd: WritableReg, 222 imm: UImm16Shifted, 223 }, 224 AluRUImm32Shifted { 225 alu_op: ALUOp, 226 rd: WritableReg, 227 imm: UImm32Shifted, 228 }, 229 SMulWide { 230 rn: Reg, 231 rm: Reg, 232 }, 233 UMulWide { 234 rn: Reg, 235 }, 236 SDivMod32 { 237 rn: Reg, 238 }, 239 SDivMod64 { 240 rn: Reg, 241 }, 242 UDivMod32 { 243 rn: Reg, 244 }, 245 UDivMod64 { 246 rn: Reg, 247 }, 248 Flogr { 249 rn: Reg, 250 }, 251 ShiftRR { 252 shift_op: ShiftOp, 253 rd: WritableReg, 254 rn: Reg, 255 shift_imm: u8, 256 shift_reg: Reg, 257 }, 258 RxSBG { 259 op: RxSBGOp, 260 rd: WritableReg, 261 rn: Reg, 262 start_bit: u8, 263 end_bit: u8, 264 rotate_amt: i8, 265 }, 266 RxSBGTest { 267 op: RxSBGOp, 268 rd: Reg, 269 rn: Reg, 270 start_bit: u8, 271 end_bit: u8, 272 rotate_amt: i8, 273 }, 274 UnaryRR { 275 op: UnaryOp, 276 rd: WritableReg, 277 rn: Reg, 278 }, 279 CmpRR { 280 op: CmpOp, 281 rn: Reg, 282 rm: Reg, 283 }, 284 CmpRX { 285 op: CmpOp, 286 rn: Reg, 287 mem: MemArg, 288 }, 289 CmpRSImm16 { 290 op: CmpOp, 291 rn: Reg, 292 imm: i16, 293 }, 294 CmpRSImm32 { 295 op: CmpOp, 296 rn: Reg, 297 imm: i32, 298 }, 299 CmpRUImm32 { 300 op: CmpOp, 301 rn: Reg, 302 imm: u32, 303 }, 304 CmpTrapRR { 305 op: CmpOp, 306 rn: Reg, 307 rm: Reg, 308 cond: Cond, 309 trap_code: TrapCode, 310 }, 311 CmpTrapRSImm16 { 312 op: CmpOp, 313 rn: Reg, 314 imm: i16, 315 cond: Cond, 316 trap_code: TrapCode, 317 }, 318 CmpTrapRUImm16 { 319 op: CmpOp, 320 rn: Reg, 321 imm: u16, 322 cond: Cond, 323 trap_code: TrapCode, 324 }, 325 AtomicRmw { 326 alu_op: ALUOp, 327 rd: WritableReg, 328 rn: Reg, 329 mem: MemArg, 330 }, 331 AtomicCas32 { 332 rd: WritableReg, 333 rn: Reg, 334 mem: MemArg, 335 }, 336 AtomicCas64 { 337 rd: WritableReg, 338 rn: Reg, 339 mem: MemArg, 340 }, 341 Fence, 342 Load32 { 343 rd: WritableReg, 344 mem: MemArg, 345 }, 346 Load32ZExt8 { 347 rd: WritableReg, 348 mem: MemArg, 349 }, 350 Load32SExt8 { 351 rd: WritableReg, 352 mem: MemArg, 353 }, 354 Load32ZExt16 { 355 rd: WritableReg, 356 mem: MemArg, 357 }, 358 Load32SExt16 { 359 rd: WritableReg, 360 mem: MemArg, 361 }, 362 Load64 { 363 rd: WritableReg, 364 mem: MemArg, 365 }, 366 Load64ZExt8 { 367 rd: WritableReg, 368 mem: MemArg, 369 }, 370 Load64SExt8 { 371 rd: WritableReg, 372 mem: MemArg, 373 }, 374 Load64ZExt16 { 375 rd: WritableReg, 376 mem: MemArg, 377 }, 378 Load64SExt16 { 379 rd: WritableReg, 380 mem: MemArg, 381 }, 382 Load64ZExt32 { 383 rd: WritableReg, 384 mem: MemArg, 385 }, 386 Load64SExt32 { 387 rd: WritableReg, 388 mem: MemArg, 389 }, 390 LoadRev16 { 391 rd: WritableReg, 392 mem: MemArg, 393 }, 394 LoadRev32 { 395 rd: WritableReg, 396 mem: MemArg, 397 }, 398 LoadRev64 { 399 rd: WritableReg, 400 mem: MemArg, 401 }, 402 Store8 { 403 rd: Reg, 404 mem: MemArg, 405 }, 406 Store16 { 407 rd: Reg, 408 mem: MemArg, 409 }, 410 Store32 { 411 rd: Reg, 412 mem: MemArg, 413 }, 414 Store64 { 415 rd: Reg, 416 mem: MemArg, 417 }, 418 StoreImm8 { 419 imm: u8, 420 mem: MemArg, 421 }, 422 StoreImm16 { 423 imm: i16, 424 mem: MemArg, 425 }, 426 StoreImm32SExt16 { 427 imm: i16, 428 mem: MemArg, 429 }, 430 StoreImm64SExt16 { 431 imm: i16, 432 mem: MemArg, 433 }, 434 StoreRev16 { 435 rd: Reg, 436 mem: MemArg, 437 }, 438 StoreRev32 { 439 rd: Reg, 440 mem: MemArg, 441 }, 442 StoreRev64 { 443 rd: Reg, 444 mem: MemArg, 445 }, 446 LoadMultiple64 { 447 rt: WritableReg, 448 rt2: WritableReg, 449 mem: MemArg, 450 }, 451 StoreMultiple64 { 452 rt: Reg, 453 rt2: Reg, 454 mem: MemArg, 455 }, 456 Mov32 { 457 rd: WritableReg, 458 rm: Reg, 459 }, 460 Mov64 { 461 rd: WritableReg, 462 rm: Reg, 463 }, 464 Mov32Imm { 465 rd: WritableReg, 466 imm: u32, 467 }, 468 Mov32SImm16 { 469 rd: WritableReg, 470 imm: i16, 471 }, 472 Mov64SImm16 { 473 rd: WritableReg, 474 imm: i16, 475 }, 476 Mov64SImm32 { 477 rd: WritableReg, 478 imm: i32, 479 }, 480 Mov64UImm16Shifted { 481 rd: WritableReg, 482 imm: UImm16Shifted, 483 }, 484 Mov64UImm32Shifted { 485 rd: WritableReg, 486 imm: UImm32Shifted, 487 }, 488 Insert64UImm16Shifted { 489 rd: WritableReg, 490 imm: UImm16Shifted, 491 }, 492 Insert64UImm32Shifted { 493 rd: WritableReg, 494 imm: UImm32Shifted, 495 }, 496 Extend { 497 rd: WritableReg, 498 rn: Reg, 499 signed: bool, 500 from_bits: u8, 501 to_bits: u8, 502 }, 503 CMov32 { 504 rd: WritableReg, 505 cond: Cond, 506 rm: Reg, 507 }, 508 CMov64 { 509 rd: WritableReg, 510 cond: Cond, 511 rm: Reg, 512 }, 513 CMov32SImm16 { 514 rd: WritableReg, 515 cond: Cond, 516 imm: i16, 517 }, 518 CMov64SImm16 { 519 rd: WritableReg, 520 cond: Cond, 521 imm: i16, 522 }, 523 FpuMove32 { 524 rd: WritableReg, 525 rn: Reg, 526 }, 527 FpuMove64 { 528 rd: WritableReg, 529 rn: Reg, 530 }, 531 FpuCMov32 { 532 rd: WritableReg, 533 cond: Cond, 534 rm: Reg, 535 }, 536 FpuCMov64 { 537 rd: WritableReg, 538 cond: Cond, 539 rm: Reg, 540 }, 541 MovToFpr { 542 rd: WritableReg, 543 rn: Reg, 544 }, 545 MovFromFpr { 546 rd: WritableReg, 547 rn: Reg, 548 }, 549 FpuRR { 550 fpu_op: FPUOp1, 551 rd: WritableReg, 552 rn: Reg, 553 }, 554 FpuRRR { 555 fpu_op: FPUOp2, 556 rd: WritableReg, 557 rm: Reg, 558 }, 559 FpuRRRR { 560 fpu_op: FPUOp3, 561 rd: WritableReg, 562 rn: Reg, 563 rm: Reg, 564 }, 565 FpuCopysign { 566 rd: WritableReg, 567 rn: Reg, 568 rm: Reg, 569 }, 570 FpuCmp32 { 571 rn: Reg, 572 rm: Reg, 573 }, 574 FpuCmp64 { 575 rn: Reg, 576 rm: Reg, 577 }, 578 FpuLoad32 { 579 rd: WritableReg, 580 mem: MemArg, 581 }, 582 FpuStore32 { 583 rd: Reg, 584 mem: MemArg, 585 }, 586 FpuLoad64 { 587 rd: WritableReg, 588 mem: MemArg, 589 }, 590 FpuStore64 { 591 rd: Reg, 592 mem: MemArg, 593 }, 594 FpuLoadRev32 { 595 rd: WritableReg, 596 mem: MemArg, 597 }, 598 FpuStoreRev32 { 599 rd: Reg, 600 mem: MemArg, 601 }, 602 FpuLoadRev64 { 603 rd: WritableReg, 604 mem: MemArg, 605 }, 606 FpuStoreRev64 { 607 rd: Reg, 608 mem: MemArg, 609 }, 610 LoadFpuConst32 { 611 rd: WritableReg, 612 const_data: u32, 613 }, 614 LoadFpuConst64 { 615 rd: WritableReg, 616 const_data: u64, 617 }, 618 FpuToInt { 619 op: FpuToIntOp, 620 rd: WritableReg, 621 rn: Reg, 622 }, 623 IntToFpu { 624 op: IntToFpuOp, 625 rd: WritableReg, 626 rn: Reg, 627 }, 628 FpuRound { 629 op: FpuRoundMode, 630 rd: WritableReg, 631 rn: Reg, 632 }, 633 FpuVecRRR { 634 fpu_op: FPUOp2, 635 rd: WritableReg, 636 rn: Reg, 637 rm: Reg, 638 }, 639 Call { 640 link: WritableReg, 641 info: BoxCallInfo, 642 }, 643 CallInd { 644 link: WritableReg, 645 info: BoxCallIndInfo, 646 }, 647 Ret { 648 link: Reg, 649 }, 650 EpiloguePlaceholder, 651 Jump { 652 dest: MachLabel, 653 }, 654 CondBr { 655 taken: MachLabel, 656 not_taken: MachLabel, 657 cond: Cond, 658 }, 659 TrapIf { 660 cond: Cond, 661 trap_code: TrapCode, 662 }, 663 OneWayCondBr { 664 target: MachLabel, 665 cond: Cond, 666 }, 667 IndirectBr { 668 rn: Reg, 669 targets: VecMachLabel, 670 }, 671 Debugtrap, 672 Trap { 673 trap_code: TrapCode, 674 }, 675 JTSequence { 676 ridx: Reg, 677 targets: VecMachLabel, 678 }, 679 LoadExtNameFar { 680 rd: WritableReg, 681 name: BoxExternalName, 682 offset: i64, 683 }, 684 LoadAddr { 685 rd: WritableReg, 686 mem: MemArg, 687 }, 688 Loop { 689 body: VecMInst, 690 cond: Cond, 691 }, 692 CondBreak { 693 cond: Cond, 694 }, 695 VirtualSPOffsetAdj { 696 offset: i64, 697 }, 698 ValueLabelMarker { 699 reg: Reg, 700 label: ValueLabel, 701 }, 702 Unwind { 703 inst: UnwindInst, 704 }, 705 } 706 707 /// Internal type ALUOp: defined at src/isa/s390x/inst.isle line 717. 708 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 709 pub enum ALUOp { 710 Add32, 711 Add32Ext16, 712 Add64, 713 Add64Ext16, 714 Add64Ext32, 715 AddLogical32, 716 AddLogical64, 717 AddLogical64Ext32, 718 Sub32, 719 Sub32Ext16, 720 Sub64, 721 Sub64Ext16, 722 Sub64Ext32, 723 SubLogical32, 724 SubLogical64, 725 SubLogical64Ext32, 726 Mul32, 727 Mul32Ext16, 728 Mul64, 729 Mul64Ext16, 730 Mul64Ext32, 731 And32, 732 And64, 733 Orr32, 734 Orr64, 735 Xor32, 736 Xor64, 737 AndNot32, 738 AndNot64, 739 OrrNot32, 740 OrrNot64, 741 XorNot32, 742 XorNot64, 743 } 744 745 /// Internal type UnaryOp: defined at src/isa/s390x/inst.isle line 758. 746 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 747 pub enum UnaryOp { 748 Abs32, 749 Abs64, 750 Abs64Ext32, 751 Neg32, 752 Neg64, 753 Neg64Ext32, 754 PopcntByte, 755 PopcntReg, 756 BSwap32, 757 BSwap64, 758 } 759 760 /// Internal type ShiftOp: defined at src/isa/s390x/inst.isle line 773. 761 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 762 pub enum ShiftOp { 763 RotL32, 764 RotL64, 765 LShL32, 766 LShL64, 767 LShR32, 768 LShR64, 769 AShR32, 770 AShR64, 771 } 772 773 /// Internal type RxSBGOp: defined at src/isa/s390x/inst.isle line 786. 774 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 775 pub enum RxSBGOp { 776 Insert, 777 And, 778 Or, 779 Xor, 780 } 781 782 /// Internal type CmpOp: defined at src/isa/s390x/inst.isle line 795. 783 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 784 pub enum CmpOp { 785 CmpS32, 786 CmpS32Ext16, 787 CmpS64, 788 CmpS64Ext16, 789 CmpS64Ext32, 790 CmpL32, 791 CmpL32Ext16, 792 CmpL64, 793 CmpL64Ext16, 794 CmpL64Ext32, 795 } 796 797 /// Internal type FPUOp1: defined at src/isa/s390x/inst.isle line 810. 798 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 799 pub enum FPUOp1 { 800 Abs32, 801 Abs64, 802 Neg32, 803 Neg64, 804 NegAbs32, 805 NegAbs64, 806 Sqrt32, 807 Sqrt64, 808 Cvt32To64, 809 Cvt64To32, 810 } 811 812 /// Internal type FPUOp2: defined at src/isa/s390x/inst.isle line 825. 813 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 814 pub enum FPUOp2 { 815 Add32, 816 Add64, 817 Sub32, 818 Sub64, 819 Mul32, 820 Mul64, 821 Div32, 822 Div64, 823 Max32, 824 Max64, 825 Min32, 826 Min64, 827 } 828 829 /// Internal type FPUOp3: defined at src/isa/s390x/inst.isle line 842. 830 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 831 pub enum FPUOp3 { 832 MAdd32, 833 MAdd64, 834 MSub32, 835 MSub64, 836 } 837 838 /// Internal type FpuToIntOp: defined at src/isa/s390x/inst.isle line 851. 839 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 840 pub enum FpuToIntOp { 841 F32ToU32, 842 F32ToI32, 843 F32ToU64, 844 F32ToI64, 845 F64ToU32, 846 F64ToI32, 847 F64ToU64, 848 F64ToI64, 849 } 850 851 /// Internal type IntToFpuOp: defined at src/isa/s390x/inst.isle line 864. 852 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 853 pub enum IntToFpuOp { 854 U32ToF32, 855 I32ToF32, 856 U32ToF64, 857 I32ToF64, 858 U64ToF32, 859 I64ToF32, 860 U64ToF64, 861 I64ToF64, 862 } 863 864 /// Internal type FpuRoundMode: defined at src/isa/s390x/inst.isle line 878. 865 #[derive(Copy, Clone, PartialEq, Eq, Debug)] 866 pub enum FpuRoundMode { 867 Minus32, 868 Minus64, 869 Plus32, 870 Plus64, 871 Zero32, 872 Zero64, 873 Nearest32, 874 Nearest64, 875 } 876 877 /// Internal type WritableRegPair: defined at src/isa/s390x/inst.isle line 1269. 878 #[derive(Clone, Debug)] 879 pub enum WritableRegPair { 880 WritableRegPair { hi: WritableReg, lo: WritableReg }, 881 } 882 883 /// Internal type RegPair: defined at src/isa/s390x/inst.isle line 1291. 884 #[derive(Clone, Debug)] 885 pub enum RegPair { 886 RegPair { hi: Reg, lo: Reg }, 887 } 888 889 /// Internal type ProducesBool: defined at src/isa/s390x/inst.isle line 2316. 890 #[derive(Clone, Debug)] 891 pub enum ProducesBool { 892 ProducesBool { producer: ProducesFlags, cond: Cond }, 893 } 894 895 // Generated as internal constructor for term output_reg. 896 pub fn constructor_output_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 897 let pattern0_0 = arg0; 898 // Rule at src/prelude.isle line 86. 899 let expr0_0 = C::value_reg(ctx, pattern0_0); 900 let expr1_0 = C::output(ctx, expr0_0); 901 return Some(expr1_0); 902 } 903 904 // Generated as internal constructor for term output_value. 905 pub fn constructor_output_value<C: Context>(ctx: &mut C, arg0: Value) -> Option<InstOutput> { 906 let pattern0_0 = arg0; 907 // Rule at src/prelude.isle line 90. 908 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 909 let expr1_0 = C::output(ctx, expr0_0); 910 return Some(expr1_0); 911 } 912 913 // Generated as internal constructor for term temp_reg. 914 pub fn constructor_temp_reg<C: Context>(ctx: &mut C, arg0: Type) -> Option<Reg> { 915 let pattern0_0 = arg0; 916 // Rule at src/prelude.isle line 110. 917 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 918 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 919 return Some(expr1_0); 920 } 921 922 // Generated as internal constructor for term lo_reg. 923 pub fn constructor_lo_reg<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 924 let pattern0_0 = arg0; 925 // Rule at src/prelude.isle line 145. 926 let expr0_0 = C::put_in_regs(ctx, pattern0_0); 927 let expr1_0: usize = 0; 928 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 929 return Some(expr2_0); 930 } 931 932 // Generated as internal constructor for term side_effect. 933 pub fn constructor_side_effect<C: Context>( 934 ctx: &mut C, 935 arg0: &SideEffectNoResult, 936 ) -> Option<InstOutput> { 937 let pattern0_0 = arg0; 938 if let &SideEffectNoResult::Inst { 939 inst: ref pattern1_0, 940 } = pattern0_0 941 { 942 // Rule at src/prelude.isle line 350. 943 let expr0_0 = C::emit(ctx, pattern1_0); 944 let expr1_0 = C::output_none(ctx); 945 return Some(expr1_0); 946 } 947 return None; 948 } 949 950 // Generated as internal constructor for term safepoint. 951 pub fn constructor_safepoint<C: Context>( 952 ctx: &mut C, 953 arg0: &SideEffectNoResult, 954 ) -> Option<InstOutput> { 955 let pattern0_0 = arg0; 956 if let &SideEffectNoResult::Inst { 957 inst: ref pattern1_0, 958 } = pattern0_0 959 { 960 // Rule at src/prelude.isle line 356. 961 let expr0_0 = C::emit_safepoint(ctx, pattern1_0); 962 let expr1_0 = C::output_none(ctx); 963 return Some(expr1_0); 964 } 965 return None; 966 } 967 968 // Generated as internal constructor for term consumes_flags_concat. 969 pub fn constructor_consumes_flags_concat<C: Context>( 970 ctx: &mut C, 971 arg0: &ConsumesFlags, 972 arg1: &ConsumesFlags, 973 ) -> Option<ConsumesFlags> { 974 let pattern0_0 = arg0; 975 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 976 inst: ref pattern1_0, 977 result: pattern1_1, 978 } = pattern0_0 979 { 980 let pattern2_0 = arg1; 981 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 982 inst: ref pattern3_0, 983 result: pattern3_1, 984 } = pattern2_0 985 { 986 // Rule at src/prelude.isle line 390. 987 let expr0_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 988 let expr1_0 = ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 989 inst1: pattern1_0.clone(), 990 inst2: pattern3_0.clone(), 991 result: expr0_0, 992 }; 993 return Some(expr1_0); 994 } 995 } 996 return None; 997 } 998 999 // Generated as internal constructor for term with_flags. 1000 pub fn constructor_with_flags<C: Context>( 1001 ctx: &mut C, 1002 arg0: &ProducesFlags, 1003 arg1: &ConsumesFlags, 1004 ) -> Option<ValueRegs> { 1005 let pattern0_0 = arg0; 1006 match pattern0_0 { 1007 &ProducesFlags::ProducesFlagsSideEffect { 1008 inst: ref pattern1_0, 1009 } => { 1010 let pattern2_0 = arg1; 1011 match pattern2_0 { 1012 &ConsumesFlags::ConsumesFlagsReturnsReg { 1013 inst: ref pattern3_0, 1014 result: pattern3_1, 1015 } => { 1016 // Rule at src/prelude.isle line 415. 1017 let expr0_0 = C::emit(ctx, pattern1_0); 1018 let expr1_0 = C::emit(ctx, pattern3_0); 1019 let expr2_0 = C::value_reg(ctx, pattern3_1); 1020 return Some(expr2_0); 1021 } 1022 &ConsumesFlags::ConsumesFlagsTwiceReturnsValueRegs { 1023 inst1: ref pattern3_0, 1024 inst2: ref pattern3_1, 1025 result: pattern3_2, 1026 } => { 1027 // Rule at src/prelude.isle line 421. 1028 let expr0_0 = C::emit(ctx, pattern1_0); 1029 let expr1_0 = C::emit(ctx, pattern3_1); 1030 let expr2_0 = C::emit(ctx, pattern3_0); 1031 return Some(pattern3_2); 1032 } 1033 _ => {} 1034 } 1035 } 1036 &ProducesFlags::ProducesFlagsReturnsResultWithConsumer { 1037 inst: ref pattern1_0, 1038 result: pattern1_1, 1039 } => { 1040 let pattern2_0 = arg1; 1041 if let &ConsumesFlags::ConsumesFlagsReturnsResultWithProducer { 1042 inst: ref pattern3_0, 1043 result: pattern3_1, 1044 } = pattern2_0 1045 { 1046 // Rule at src/prelude.isle line 409. 1047 let expr0_0 = C::emit(ctx, pattern1_0); 1048 let expr1_0 = C::emit(ctx, pattern3_0); 1049 let expr2_0 = C::value_regs(ctx, pattern1_1, pattern3_1); 1050 return Some(expr2_0); 1051 } 1052 } 1053 _ => {} 1054 } 1055 return None; 1056 } 1057 1058 // Generated as internal constructor for term with_flags_reg. 1059 pub fn constructor_with_flags_reg<C: Context>( 1060 ctx: &mut C, 1061 arg0: &ProducesFlags, 1062 arg1: &ConsumesFlags, 1063 ) -> Option<Reg> { 1064 let pattern0_0 = arg0; 1065 let pattern1_0 = arg1; 1066 // Rule at src/prelude.isle line 434. 1067 let expr0_0 = constructor_with_flags(ctx, pattern0_0, pattern1_0)?; 1068 let expr1_0: usize = 0; 1069 let expr2_0 = C::value_regs_get(ctx, expr0_0, expr1_0); 1070 return Some(expr2_0); 1071 } 1072 1073 // Generated as internal constructor for term mask_amt_reg. 1074 pub fn constructor_mask_amt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 1075 let pattern0_0 = arg0; 1076 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 1077 let pattern2_0 = arg1; 1078 // Rule at src/isa/s390x/inst.isle line 1040. 1079 let expr0_0: i64 = -1; 1080 let expr1_0 = C::mask_amt_imm(ctx, pattern1_0, expr0_0); 1081 let expr2_0 = C::u8_as_u16(ctx, expr1_0); 1082 let expr3_0: u8 = 0; 1083 let expr4_0 = C::uimm16shifted(ctx, expr2_0, expr3_0); 1084 let expr5_0 = constructor_and_uimm16shifted(ctx, pattern1_0, pattern2_0, expr4_0)?; 1085 return Some(expr5_0); 1086 } 1087 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 1088 let pattern2_0 = arg1; 1089 // Rule at src/isa/s390x/inst.isle line 1043. 1090 return Some(pattern2_0); 1091 } 1092 return None; 1093 } 1094 1095 // Generated as internal constructor for term lower_address. 1096 pub fn constructor_lower_address<C: Context>( 1097 ctx: &mut C, 1098 arg0: MemFlags, 1099 arg1: Value, 1100 arg2: Offset32, 1101 ) -> Option<MemArg> { 1102 let pattern0_0 = arg0; 1103 let pattern1_0 = arg1; 1104 if let Some(pattern2_0) = C::def_inst(ctx, pattern1_0) { 1105 let pattern3_0 = C::inst_data(ctx, pattern2_0); 1106 match &pattern3_0 { 1107 &InstructionData::UnaryGlobalValue { 1108 opcode: ref pattern4_0, 1109 global_value: pattern4_1, 1110 } => { 1111 if let &Opcode::SymbolValue = pattern4_0 { 1112 if let Some((pattern6_0, pattern6_1, pattern6_2)) = 1113 C::symbol_value_data(ctx, pattern4_1) 1114 { 1115 if let Some(()) = C::reloc_distance_near(ctx, pattern6_1) { 1116 let pattern8_0 = arg2; 1117 let pattern9_0 = C::i64_from_offset(ctx, pattern8_0); 1118 let closure10 = || { 1119 return Some(pattern6_2); 1120 }; 1121 if let Some(pattern10_0) = closure10() { 1122 if let Some(pattern11_0) = 1123 C::memarg_symbol_offset_sum(ctx, pattern9_0, pattern10_0) 1124 { 1125 // Rule at src/isa/s390x/inst.isle line 1136. 1126 let expr0_0 = 1127 C::memarg_symbol(ctx, pattern6_0, pattern11_0, pattern0_0); 1128 return Some(expr0_0); 1129 } 1130 } 1131 } 1132 } 1133 } 1134 } 1135 &InstructionData::Binary { 1136 opcode: ref pattern4_0, 1137 args: ref pattern4_1, 1138 } => { 1139 if let &Opcode::Iadd = pattern4_0 { 1140 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 1141 let pattern7_0 = arg2; 1142 let pattern8_0 = C::i64_from_offset(ctx, pattern7_0); 1143 if pattern8_0 == 0 { 1144 // Rule at src/isa/s390x/inst.isle line 1133. 1145 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 1146 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 1147 let expr2_0 = C::memarg_reg_plus_reg(ctx, expr0_0, expr1_0, pattern0_0); 1148 return Some(expr2_0); 1149 } 1150 } 1151 } 1152 _ => {} 1153 } 1154 } 1155 let pattern2_0 = arg2; 1156 let pattern3_0 = C::i64_from_offset(ctx, pattern2_0); 1157 // Rule at src/isa/s390x/inst.isle line 1130. 1158 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 1159 let expr1_0 = C::memarg_reg_plus_off(ctx, expr0_0, pattern3_0, pattern0_0); 1160 return Some(expr1_0); 1161 } 1162 1163 // Generated as internal constructor for term stack_addr_impl. 1164 pub fn constructor_stack_addr_impl<C: Context>( 1165 ctx: &mut C, 1166 arg0: Type, 1167 arg1: StackSlot, 1168 arg2: Offset32, 1169 ) -> Option<Reg> { 1170 let pattern0_0 = arg0; 1171 let pattern1_0 = arg1; 1172 let pattern2_0 = arg2; 1173 // Rule at src/isa/s390x/inst.isle line 1163. 1174 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1175 let expr1_0 = C::abi_stackslot_addr(ctx, expr0_0, pattern1_0, pattern2_0); 1176 let expr2_0 = C::emit(ctx, &expr1_0); 1177 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1178 return Some(expr3_0); 1179 } 1180 1181 // Generated as internal constructor for term sink_load. 1182 pub fn constructor_sink_load<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1183 let pattern0_0 = arg0; 1184 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1185 if let &InstructionData::Load { 1186 opcode: ref pattern2_0, 1187 arg: pattern2_1, 1188 flags: pattern2_2, 1189 offset: pattern2_3, 1190 } = &pattern1_0 1191 { 1192 if let &Opcode::Load = pattern2_0 { 1193 // Rule at src/isa/s390x/inst.isle line 1233. 1194 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1195 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1196 return Some(expr1_0); 1197 } 1198 } 1199 return None; 1200 } 1201 1202 // Generated as internal constructor for term sink_sload16. 1203 pub fn constructor_sink_sload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1204 let pattern0_0 = arg0; 1205 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1206 if let &InstructionData::Load { 1207 opcode: ref pattern2_0, 1208 arg: pattern2_1, 1209 flags: pattern2_2, 1210 offset: pattern2_3, 1211 } = &pattern1_0 1212 { 1213 if let &Opcode::Sload16 = pattern2_0 { 1214 // Rule at src/isa/s390x/inst.isle line 1240. 1215 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1216 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1217 return Some(expr1_0); 1218 } 1219 } 1220 return None; 1221 } 1222 1223 // Generated as internal constructor for term sink_sload32. 1224 pub fn constructor_sink_sload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1225 let pattern0_0 = arg0; 1226 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1227 if let &InstructionData::Load { 1228 opcode: ref pattern2_0, 1229 arg: pattern2_1, 1230 flags: pattern2_2, 1231 offset: pattern2_3, 1232 } = &pattern1_0 1233 { 1234 if let &Opcode::Sload32 = pattern2_0 { 1235 // Rule at src/isa/s390x/inst.isle line 1247. 1236 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1237 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1238 return Some(expr1_0); 1239 } 1240 } 1241 return None; 1242 } 1243 1244 // Generated as internal constructor for term sink_uload16. 1245 pub fn constructor_sink_uload16<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1246 let pattern0_0 = arg0; 1247 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1248 if let &InstructionData::Load { 1249 opcode: ref pattern2_0, 1250 arg: pattern2_1, 1251 flags: pattern2_2, 1252 offset: pattern2_3, 1253 } = &pattern1_0 1254 { 1255 if let &Opcode::Uload16 = pattern2_0 { 1256 // Rule at src/isa/s390x/inst.isle line 1254. 1257 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1258 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1259 return Some(expr1_0); 1260 } 1261 } 1262 return None; 1263 } 1264 1265 // Generated as internal constructor for term sink_uload32. 1266 pub fn constructor_sink_uload32<C: Context>(ctx: &mut C, arg0: Inst) -> Option<MemArg> { 1267 let pattern0_0 = arg0; 1268 let pattern1_0 = C::inst_data(ctx, pattern0_0); 1269 if let &InstructionData::Load { 1270 opcode: ref pattern2_0, 1271 arg: pattern2_1, 1272 flags: pattern2_2, 1273 offset: pattern2_3, 1274 } = &pattern1_0 1275 { 1276 if let &Opcode::Uload32 = pattern2_0 { 1277 // Rule at src/isa/s390x/inst.isle line 1261. 1278 let expr0_0 = C::sink_inst(ctx, pattern0_0); 1279 let expr1_0 = constructor_lower_address(ctx, pattern2_2, pattern2_1, pattern2_3)?; 1280 return Some(expr1_0); 1281 } 1282 } 1283 return None; 1284 } 1285 1286 // Generated as internal constructor for term temp_writable_regpair. 1287 pub fn constructor_temp_writable_regpair<C: Context>(ctx: &mut C) -> Option<WritableRegPair> { 1288 // Rule at src/isa/s390x/inst.isle line 1274. 1289 let expr0_0: u8 = 0; 1290 let expr1_0 = C::writable_gpr(ctx, expr0_0); 1291 let expr2_0: u8 = 1; 1292 let expr3_0 = C::writable_gpr(ctx, expr2_0); 1293 let expr4_0 = WritableRegPair::WritableRegPair { 1294 hi: expr1_0, 1295 lo: expr3_0, 1296 }; 1297 return Some(expr4_0); 1298 } 1299 1300 // Generated as internal constructor for term copy_writable_regpair. 1301 pub fn constructor_copy_writable_regpair<C: Context>( 1302 ctx: &mut C, 1303 arg0: &RegPair, 1304 ) -> Option<WritableRegPair> { 1305 let pattern0_0 = arg0; 1306 // Rule at src/isa/s390x/inst.isle line 1280. 1307 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1308 return Some(expr0_0); 1309 } 1310 1311 // Generated as internal constructor for term writable_regpair_hi. 1312 pub fn constructor_writable_regpair_hi<C: Context>( 1313 ctx: &mut C, 1314 arg0: &WritableRegPair, 1315 ) -> Option<WritableReg> { 1316 let pattern0_0 = arg0; 1317 if let &WritableRegPair::WritableRegPair { 1318 hi: pattern1_0, 1319 lo: pattern1_1, 1320 } = pattern0_0 1321 { 1322 // Rule at src/isa/s390x/inst.isle line 1284. 1323 return Some(pattern1_0); 1324 } 1325 return None; 1326 } 1327 1328 // Generated as internal constructor for term writable_regpair_lo. 1329 pub fn constructor_writable_regpair_lo<C: Context>( 1330 ctx: &mut C, 1331 arg0: &WritableRegPair, 1332 ) -> Option<WritableReg> { 1333 let pattern0_0 = arg0; 1334 if let &WritableRegPair::WritableRegPair { 1335 hi: pattern1_0, 1336 lo: pattern1_1, 1337 } = pattern0_0 1338 { 1339 // Rule at src/isa/s390x/inst.isle line 1288. 1340 return Some(pattern1_1); 1341 } 1342 return None; 1343 } 1344 1345 // Generated as internal constructor for term writable_regpair_to_regpair. 1346 pub fn constructor_writable_regpair_to_regpair<C: Context>( 1347 ctx: &mut C, 1348 arg0: &WritableRegPair, 1349 ) -> Option<RegPair> { 1350 let pattern0_0 = arg0; 1351 if let &WritableRegPair::WritableRegPair { 1352 hi: pattern1_0, 1353 lo: pattern1_1, 1354 } = pattern0_0 1355 { 1356 // Rule at src/isa/s390x/inst.isle line 1295. 1357 let expr0_0 = C::writable_reg_to_reg(ctx, pattern1_0); 1358 let expr1_0 = C::writable_reg_to_reg(ctx, pattern1_1); 1359 let expr2_0 = RegPair::RegPair { 1360 hi: expr0_0, 1361 lo: expr1_0, 1362 }; 1363 return Some(expr2_0); 1364 } 1365 return None; 1366 } 1367 1368 // Generated as internal constructor for term uninitialized_regpair. 1369 pub fn constructor_uninitialized_regpair<C: Context>(ctx: &mut C) -> Option<RegPair> { 1370 // Rule at src/isa/s390x/inst.isle line 1300. 1371 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1372 let expr1_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1373 return Some(expr1_0); 1374 } 1375 1376 // Generated as internal constructor for term regpair_hi. 1377 pub fn constructor_regpair_hi<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1378 let pattern0_0 = arg0; 1379 if let &RegPair::RegPair { 1380 hi: pattern1_0, 1381 lo: pattern1_1, 1382 } = pattern0_0 1383 { 1384 // Rule at src/isa/s390x/inst.isle line 1305. 1385 return Some(pattern1_0); 1386 } 1387 return None; 1388 } 1389 1390 // Generated as internal constructor for term regpair_lo. 1391 pub fn constructor_regpair_lo<C: Context>(ctx: &mut C, arg0: &RegPair) -> Option<Reg> { 1392 let pattern0_0 = arg0; 1393 if let &RegPair::RegPair { 1394 hi: pattern1_0, 1395 lo: pattern1_1, 1396 } = pattern0_0 1397 { 1398 // Rule at src/isa/s390x/inst.isle line 1309. 1399 return Some(pattern1_1); 1400 } 1401 return None; 1402 } 1403 1404 // Generated as internal constructor for term alu_rrr. 1405 pub fn constructor_alu_rrr<C: Context>( 1406 ctx: &mut C, 1407 arg0: Type, 1408 arg1: &ALUOp, 1409 arg2: Reg, 1410 arg3: Reg, 1411 ) -> Option<Reg> { 1412 let pattern0_0 = arg0; 1413 let pattern1_0 = arg1; 1414 let pattern2_0 = arg2; 1415 let pattern3_0 = arg3; 1416 // Rule at src/isa/s390x/inst.isle line 1316. 1417 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1418 let expr1_0 = MInst::AluRRR { 1419 alu_op: pattern1_0.clone(), 1420 rd: expr0_0, 1421 rn: pattern2_0, 1422 rm: pattern3_0, 1423 }; 1424 let expr2_0 = C::emit(ctx, &expr1_0); 1425 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1426 return Some(expr3_0); 1427 } 1428 1429 // Generated as internal constructor for term alu_rrsimm16. 1430 pub fn constructor_alu_rrsimm16<C: Context>( 1431 ctx: &mut C, 1432 arg0: Type, 1433 arg1: &ALUOp, 1434 arg2: Reg, 1435 arg3: i16, 1436 ) -> Option<Reg> { 1437 let pattern0_0 = arg0; 1438 let pattern1_0 = arg1; 1439 let pattern2_0 = arg2; 1440 let pattern3_0 = arg3; 1441 // Rule at src/isa/s390x/inst.isle line 1323. 1442 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1443 let expr1_0 = MInst::AluRRSImm16 { 1444 alu_op: pattern1_0.clone(), 1445 rd: expr0_0, 1446 rn: pattern2_0, 1447 imm: pattern3_0, 1448 }; 1449 let expr2_0 = C::emit(ctx, &expr1_0); 1450 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1451 return Some(expr3_0); 1452 } 1453 1454 // Generated as internal constructor for term alu_rr. 1455 pub fn constructor_alu_rr<C: Context>( 1456 ctx: &mut C, 1457 arg0: Type, 1458 arg1: &ALUOp, 1459 arg2: Reg, 1460 arg3: Reg, 1461 ) -> Option<Reg> { 1462 let pattern0_0 = arg0; 1463 let pattern1_0 = arg1; 1464 let pattern2_0 = arg2; 1465 let pattern3_0 = arg3; 1466 // Rule at src/isa/s390x/inst.isle line 1330. 1467 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1468 let expr1_0 = MInst::AluRR { 1469 alu_op: pattern1_0.clone(), 1470 rd: expr0_0, 1471 rm: pattern3_0, 1472 }; 1473 let expr2_0 = C::emit(ctx, &expr1_0); 1474 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1475 return Some(expr3_0); 1476 } 1477 1478 // Generated as internal constructor for term alu_rx. 1479 pub fn constructor_alu_rx<C: Context>( 1480 ctx: &mut C, 1481 arg0: Type, 1482 arg1: &ALUOp, 1483 arg2: Reg, 1484 arg3: &MemArg, 1485 ) -> Option<Reg> { 1486 let pattern0_0 = arg0; 1487 let pattern1_0 = arg1; 1488 let pattern2_0 = arg2; 1489 let pattern3_0 = arg3; 1490 // Rule at src/isa/s390x/inst.isle line 1337. 1491 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1492 let expr1_0 = MInst::AluRX { 1493 alu_op: pattern1_0.clone(), 1494 rd: expr0_0, 1495 mem: pattern3_0.clone(), 1496 }; 1497 let expr2_0 = C::emit(ctx, &expr1_0); 1498 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1499 return Some(expr3_0); 1500 } 1501 1502 // Generated as internal constructor for term alu_rsimm16. 1503 pub fn constructor_alu_rsimm16<C: Context>( 1504 ctx: &mut C, 1505 arg0: Type, 1506 arg1: &ALUOp, 1507 arg2: Reg, 1508 arg3: i16, 1509 ) -> Option<Reg> { 1510 let pattern0_0 = arg0; 1511 let pattern1_0 = arg1; 1512 let pattern2_0 = arg2; 1513 let pattern3_0 = arg3; 1514 // Rule at src/isa/s390x/inst.isle line 1344. 1515 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1516 let expr1_0 = MInst::AluRSImm16 { 1517 alu_op: pattern1_0.clone(), 1518 rd: expr0_0, 1519 imm: pattern3_0, 1520 }; 1521 let expr2_0 = C::emit(ctx, &expr1_0); 1522 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1523 return Some(expr3_0); 1524 } 1525 1526 // Generated as internal constructor for term alu_rsimm32. 1527 pub fn constructor_alu_rsimm32<C: Context>( 1528 ctx: &mut C, 1529 arg0: Type, 1530 arg1: &ALUOp, 1531 arg2: Reg, 1532 arg3: i32, 1533 ) -> Option<Reg> { 1534 let pattern0_0 = arg0; 1535 let pattern1_0 = arg1; 1536 let pattern2_0 = arg2; 1537 let pattern3_0 = arg3; 1538 // Rule at src/isa/s390x/inst.isle line 1351. 1539 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1540 let expr1_0 = MInst::AluRSImm32 { 1541 alu_op: pattern1_0.clone(), 1542 rd: expr0_0, 1543 imm: pattern3_0, 1544 }; 1545 let expr2_0 = C::emit(ctx, &expr1_0); 1546 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1547 return Some(expr3_0); 1548 } 1549 1550 // Generated as internal constructor for term alu_ruimm32. 1551 pub fn constructor_alu_ruimm32<C: Context>( 1552 ctx: &mut C, 1553 arg0: Type, 1554 arg1: &ALUOp, 1555 arg2: Reg, 1556 arg3: u32, 1557 ) -> Option<Reg> { 1558 let pattern0_0 = arg0; 1559 let pattern1_0 = arg1; 1560 let pattern2_0 = arg2; 1561 let pattern3_0 = arg3; 1562 // Rule at src/isa/s390x/inst.isle line 1358. 1563 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1564 let expr1_0 = MInst::AluRUImm32 { 1565 alu_op: pattern1_0.clone(), 1566 rd: expr0_0, 1567 imm: pattern3_0, 1568 }; 1569 let expr2_0 = C::emit(ctx, &expr1_0); 1570 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1571 return Some(expr3_0); 1572 } 1573 1574 // Generated as internal constructor for term alu_ruimm16shifted. 1575 pub fn constructor_alu_ruimm16shifted<C: Context>( 1576 ctx: &mut C, 1577 arg0: Type, 1578 arg1: &ALUOp, 1579 arg2: Reg, 1580 arg3: UImm16Shifted, 1581 ) -> Option<Reg> { 1582 let pattern0_0 = arg0; 1583 let pattern1_0 = arg1; 1584 let pattern2_0 = arg2; 1585 let pattern3_0 = arg3; 1586 // Rule at src/isa/s390x/inst.isle line 1365. 1587 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1588 let expr1_0 = MInst::AluRUImm16Shifted { 1589 alu_op: pattern1_0.clone(), 1590 rd: expr0_0, 1591 imm: pattern3_0, 1592 }; 1593 let expr2_0 = C::emit(ctx, &expr1_0); 1594 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1595 return Some(expr3_0); 1596 } 1597 1598 // Generated as internal constructor for term alu_ruimm32shifted. 1599 pub fn constructor_alu_ruimm32shifted<C: Context>( 1600 ctx: &mut C, 1601 arg0: Type, 1602 arg1: &ALUOp, 1603 arg2: Reg, 1604 arg3: UImm32Shifted, 1605 ) -> Option<Reg> { 1606 let pattern0_0 = arg0; 1607 let pattern1_0 = arg1; 1608 let pattern2_0 = arg2; 1609 let pattern3_0 = arg3; 1610 // Rule at src/isa/s390x/inst.isle line 1372. 1611 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 1612 let expr1_0 = MInst::AluRUImm32Shifted { 1613 alu_op: pattern1_0.clone(), 1614 rd: expr0_0, 1615 imm: pattern3_0, 1616 }; 1617 let expr2_0 = C::emit(ctx, &expr1_0); 1618 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1619 return Some(expr3_0); 1620 } 1621 1622 // Generated as internal constructor for term smul_wide. 1623 pub fn constructor_smul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1624 let pattern0_0 = arg0; 1625 let pattern1_0 = arg1; 1626 // Rule at src/isa/s390x/inst.isle line 1379. 1627 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1628 let expr1_0 = MInst::SMulWide { 1629 rn: pattern0_0, 1630 rm: pattern1_0, 1631 }; 1632 let expr2_0 = C::emit(ctx, &expr1_0); 1633 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1634 return Some(expr3_0); 1635 } 1636 1637 // Generated as internal constructor for term umul_wide. 1638 pub fn constructor_umul_wide<C: Context>(ctx: &mut C, arg0: Reg, arg1: Reg) -> Option<RegPair> { 1639 let pattern0_0 = arg0; 1640 let pattern1_0 = arg1; 1641 // Rule at src/isa/s390x/inst.isle line 1386. 1642 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 1643 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 1644 let expr2_0 = MInst::Mov64 { 1645 rd: expr1_0, 1646 rm: pattern1_0, 1647 }; 1648 let expr3_0 = C::emit(ctx, &expr2_0); 1649 let expr4_0 = MInst::UMulWide { rn: pattern0_0 }; 1650 let expr5_0 = C::emit(ctx, &expr4_0); 1651 let expr6_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1652 return Some(expr6_0); 1653 } 1654 1655 // Generated as internal constructor for term sdivmod32. 1656 pub fn constructor_sdivmod32<C: Context>( 1657 ctx: &mut C, 1658 arg0: &RegPair, 1659 arg1: Reg, 1660 ) -> Option<RegPair> { 1661 let pattern0_0 = arg0; 1662 let pattern1_0 = arg1; 1663 // Rule at src/isa/s390x/inst.isle line 1394. 1664 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1665 let expr1_0 = MInst::SDivMod32 { rn: pattern1_0 }; 1666 let expr2_0 = C::emit(ctx, &expr1_0); 1667 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1668 return Some(expr3_0); 1669 } 1670 1671 // Generated as internal constructor for term sdivmod64. 1672 pub fn constructor_sdivmod64<C: Context>( 1673 ctx: &mut C, 1674 arg0: &RegPair, 1675 arg1: Reg, 1676 ) -> Option<RegPair> { 1677 let pattern0_0 = arg0; 1678 let pattern1_0 = arg1; 1679 // Rule at src/isa/s390x/inst.isle line 1401. 1680 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1681 let expr1_0 = MInst::SDivMod64 { rn: pattern1_0 }; 1682 let expr2_0 = C::emit(ctx, &expr1_0); 1683 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1684 return Some(expr3_0); 1685 } 1686 1687 // Generated as internal constructor for term udivmod32. 1688 pub fn constructor_udivmod32<C: Context>( 1689 ctx: &mut C, 1690 arg0: &RegPair, 1691 arg1: Reg, 1692 ) -> Option<RegPair> { 1693 let pattern0_0 = arg0; 1694 let pattern1_0 = arg1; 1695 // Rule at src/isa/s390x/inst.isle line 1408. 1696 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1697 let expr1_0 = MInst::UDivMod32 { rn: pattern1_0 }; 1698 let expr2_0 = C::emit(ctx, &expr1_0); 1699 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1700 return Some(expr3_0); 1701 } 1702 1703 // Generated as internal constructor for term udivmod64. 1704 pub fn constructor_udivmod64<C: Context>( 1705 ctx: &mut C, 1706 arg0: &RegPair, 1707 arg1: Reg, 1708 ) -> Option<RegPair> { 1709 let pattern0_0 = arg0; 1710 let pattern1_0 = arg1; 1711 // Rule at src/isa/s390x/inst.isle line 1415. 1712 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern0_0)?; 1713 let expr1_0 = MInst::UDivMod64 { rn: pattern1_0 }; 1714 let expr2_0 = C::emit(ctx, &expr1_0); 1715 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 1716 return Some(expr3_0); 1717 } 1718 1719 // Generated as internal constructor for term shift_rr. 1720 pub fn constructor_shift_rr<C: Context>( 1721 ctx: &mut C, 1722 arg0: Type, 1723 arg1: &ShiftOp, 1724 arg2: Reg, 1725 arg3: u8, 1726 arg4: Reg, 1727 ) -> Option<Reg> { 1728 let pattern0_0 = arg0; 1729 let pattern1_0 = arg1; 1730 let pattern2_0 = arg2; 1731 let pattern3_0 = arg3; 1732 let pattern4_0 = arg4; 1733 // Rule at src/isa/s390x/inst.isle line 1422. 1734 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1735 let expr1_0 = MInst::ShiftRR { 1736 shift_op: pattern1_0.clone(), 1737 rd: expr0_0, 1738 rn: pattern2_0, 1739 shift_imm: pattern3_0, 1740 shift_reg: pattern4_0, 1741 }; 1742 let expr2_0 = C::emit(ctx, &expr1_0); 1743 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1744 return Some(expr3_0); 1745 } 1746 1747 // Generated as internal constructor for term rxsbg_test. 1748 pub fn constructor_rxsbg_test<C: Context>( 1749 ctx: &mut C, 1750 arg0: &RxSBGOp, 1751 arg1: Reg, 1752 arg2: Reg, 1753 arg3: u8, 1754 arg4: u8, 1755 arg5: i8, 1756 ) -> Option<ProducesFlags> { 1757 let pattern0_0 = arg0; 1758 let pattern1_0 = arg1; 1759 let pattern2_0 = arg2; 1760 let pattern3_0 = arg3; 1761 let pattern4_0 = arg4; 1762 let pattern5_0 = arg5; 1763 // Rule at src/isa/s390x/inst.isle line 1429. 1764 let expr0_0 = MInst::RxSBGTest { 1765 op: pattern0_0.clone(), 1766 rd: pattern1_0, 1767 rn: pattern2_0, 1768 start_bit: pattern3_0, 1769 end_bit: pattern4_0, 1770 rotate_amt: pattern5_0, 1771 }; 1772 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1773 return Some(expr1_0); 1774 } 1775 1776 // Generated as internal constructor for term unary_rr. 1777 pub fn constructor_unary_rr<C: Context>( 1778 ctx: &mut C, 1779 arg0: Type, 1780 arg1: &UnaryOp, 1781 arg2: Reg, 1782 ) -> Option<Reg> { 1783 let pattern0_0 = arg0; 1784 let pattern1_0 = arg1; 1785 let pattern2_0 = arg2; 1786 // Rule at src/isa/s390x/inst.isle line 1435. 1787 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1788 let expr1_0 = MInst::UnaryRR { 1789 op: pattern1_0.clone(), 1790 rd: expr0_0, 1791 rn: pattern2_0, 1792 }; 1793 let expr2_0 = C::emit(ctx, &expr1_0); 1794 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1795 return Some(expr3_0); 1796 } 1797 1798 // Generated as internal constructor for term cmp_rr. 1799 pub fn constructor_cmp_rr<C: Context>( 1800 ctx: &mut C, 1801 arg0: &CmpOp, 1802 arg1: Reg, 1803 arg2: Reg, 1804 ) -> Option<ProducesFlags> { 1805 let pattern0_0 = arg0; 1806 let pattern1_0 = arg1; 1807 let pattern2_0 = arg2; 1808 // Rule at src/isa/s390x/inst.isle line 1442. 1809 let expr0_0 = MInst::CmpRR { 1810 op: pattern0_0.clone(), 1811 rn: pattern1_0, 1812 rm: pattern2_0, 1813 }; 1814 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1815 return Some(expr1_0); 1816 } 1817 1818 // Generated as internal constructor for term cmp_rx. 1819 pub fn constructor_cmp_rx<C: Context>( 1820 ctx: &mut C, 1821 arg0: &CmpOp, 1822 arg1: Reg, 1823 arg2: &MemArg, 1824 ) -> Option<ProducesFlags> { 1825 let pattern0_0 = arg0; 1826 let pattern1_0 = arg1; 1827 let pattern2_0 = arg2; 1828 // Rule at src/isa/s390x/inst.isle line 1447. 1829 let expr0_0 = MInst::CmpRX { 1830 op: pattern0_0.clone(), 1831 rn: pattern1_0, 1832 mem: pattern2_0.clone(), 1833 }; 1834 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1835 return Some(expr1_0); 1836 } 1837 1838 // Generated as internal constructor for term cmp_rsimm16. 1839 pub fn constructor_cmp_rsimm16<C: Context>( 1840 ctx: &mut C, 1841 arg0: &CmpOp, 1842 arg1: Reg, 1843 arg2: i16, 1844 ) -> Option<ProducesFlags> { 1845 let pattern0_0 = arg0; 1846 let pattern1_0 = arg1; 1847 let pattern2_0 = arg2; 1848 // Rule at src/isa/s390x/inst.isle line 1452. 1849 let expr0_0 = MInst::CmpRSImm16 { 1850 op: pattern0_0.clone(), 1851 rn: pattern1_0, 1852 imm: pattern2_0, 1853 }; 1854 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1855 return Some(expr1_0); 1856 } 1857 1858 // Generated as internal constructor for term cmp_rsimm32. 1859 pub fn constructor_cmp_rsimm32<C: Context>( 1860 ctx: &mut C, 1861 arg0: &CmpOp, 1862 arg1: Reg, 1863 arg2: i32, 1864 ) -> Option<ProducesFlags> { 1865 let pattern0_0 = arg0; 1866 let pattern1_0 = arg1; 1867 let pattern2_0 = arg2; 1868 // Rule at src/isa/s390x/inst.isle line 1457. 1869 let expr0_0 = MInst::CmpRSImm32 { 1870 op: pattern0_0.clone(), 1871 rn: pattern1_0, 1872 imm: pattern2_0, 1873 }; 1874 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1875 return Some(expr1_0); 1876 } 1877 1878 // Generated as internal constructor for term cmp_ruimm32. 1879 pub fn constructor_cmp_ruimm32<C: Context>( 1880 ctx: &mut C, 1881 arg0: &CmpOp, 1882 arg1: Reg, 1883 arg2: u32, 1884 ) -> Option<ProducesFlags> { 1885 let pattern0_0 = arg0; 1886 let pattern1_0 = arg1; 1887 let pattern2_0 = arg2; 1888 // Rule at src/isa/s390x/inst.isle line 1462. 1889 let expr0_0 = MInst::CmpRUImm32 { 1890 op: pattern0_0.clone(), 1891 rn: pattern1_0, 1892 imm: pattern2_0, 1893 }; 1894 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 1895 return Some(expr1_0); 1896 } 1897 1898 // Generated as internal constructor for term atomic_rmw_impl. 1899 pub fn constructor_atomic_rmw_impl<C: Context>( 1900 ctx: &mut C, 1901 arg0: Type, 1902 arg1: &ALUOp, 1903 arg2: Reg, 1904 arg3: &MemArg, 1905 ) -> Option<Reg> { 1906 let pattern0_0 = arg0; 1907 let pattern1_0 = arg1; 1908 let pattern2_0 = arg2; 1909 let pattern3_0 = arg3; 1910 // Rule at src/isa/s390x/inst.isle line 1467. 1911 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 1912 let expr1_0 = MInst::AtomicRmw { 1913 alu_op: pattern1_0.clone(), 1914 rd: expr0_0, 1915 rn: pattern2_0, 1916 mem: pattern3_0.clone(), 1917 }; 1918 let expr2_0 = C::emit(ctx, &expr1_0); 1919 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 1920 return Some(expr3_0); 1921 } 1922 1923 // Generated as internal constructor for term atomic_cas32. 1924 pub fn constructor_atomic_cas32<C: Context>( 1925 ctx: &mut C, 1926 arg0: Reg, 1927 arg1: Reg, 1928 arg2: &MemArg, 1929 ) -> Option<Reg> { 1930 let pattern0_0 = arg0; 1931 let pattern1_0 = arg1; 1932 let pattern2_0 = arg2; 1933 // Rule at src/isa/s390x/inst.isle line 1474. 1934 let expr0_0: Type = I32; 1935 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1936 let expr2_0 = MInst::AtomicCas32 { 1937 rd: expr1_0, 1938 rn: pattern1_0, 1939 mem: pattern2_0.clone(), 1940 }; 1941 let expr3_0 = C::emit(ctx, &expr2_0); 1942 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1943 return Some(expr4_0); 1944 } 1945 1946 // Generated as internal constructor for term atomic_cas64. 1947 pub fn constructor_atomic_cas64<C: Context>( 1948 ctx: &mut C, 1949 arg0: Reg, 1950 arg1: Reg, 1951 arg2: &MemArg, 1952 ) -> Option<Reg> { 1953 let pattern0_0 = arg0; 1954 let pattern1_0 = arg1; 1955 let pattern2_0 = arg2; 1956 // Rule at src/isa/s390x/inst.isle line 1481. 1957 let expr0_0: Type = I64; 1958 let expr1_0 = constructor_copy_writable_reg(ctx, expr0_0, pattern0_0)?; 1959 let expr2_0 = MInst::AtomicCas64 { 1960 rd: expr1_0, 1961 rn: pattern1_0, 1962 mem: pattern2_0.clone(), 1963 }; 1964 let expr3_0 = C::emit(ctx, &expr2_0); 1965 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1966 return Some(expr4_0); 1967 } 1968 1969 // Generated as internal constructor for term fence_impl. 1970 pub fn constructor_fence_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 1971 // Rule at src/isa/s390x/inst.isle line 1488. 1972 let expr0_0 = MInst::Fence; 1973 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 1974 return Some(expr1_0); 1975 } 1976 1977 // Generated as internal constructor for term load32. 1978 pub fn constructor_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1979 let pattern0_0 = arg0; 1980 // Rule at src/isa/s390x/inst.isle line 1493. 1981 let expr0_0: Type = I32; 1982 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1983 let expr2_0 = MInst::Load32 { 1984 rd: expr1_0, 1985 mem: pattern0_0.clone(), 1986 }; 1987 let expr3_0 = C::emit(ctx, &expr2_0); 1988 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 1989 return Some(expr4_0); 1990 } 1991 1992 // Generated as internal constructor for term load64. 1993 pub fn constructor_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 1994 let pattern0_0 = arg0; 1995 // Rule at src/isa/s390x/inst.isle line 1500. 1996 let expr0_0: Type = I64; 1997 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 1998 let expr2_0 = MInst::Load64 { 1999 rd: expr1_0, 2000 mem: pattern0_0.clone(), 2001 }; 2002 let expr3_0 = C::emit(ctx, &expr2_0); 2003 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2004 return Some(expr4_0); 2005 } 2006 2007 // Generated as internal constructor for term loadrev16. 2008 pub fn constructor_loadrev16<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2009 let pattern0_0 = arg0; 2010 // Rule at src/isa/s390x/inst.isle line 1507. 2011 let expr0_0: Type = I32; 2012 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2013 let expr2_0 = MInst::LoadRev16 { 2014 rd: expr1_0, 2015 mem: pattern0_0.clone(), 2016 }; 2017 let expr3_0 = C::emit(ctx, &expr2_0); 2018 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2019 return Some(expr4_0); 2020 } 2021 2022 // Generated as internal constructor for term loadrev32. 2023 pub fn constructor_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2024 let pattern0_0 = arg0; 2025 // Rule at src/isa/s390x/inst.isle line 1514. 2026 let expr0_0: Type = I32; 2027 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2028 let expr2_0 = MInst::LoadRev32 { 2029 rd: expr1_0, 2030 mem: pattern0_0.clone(), 2031 }; 2032 let expr3_0 = C::emit(ctx, &expr2_0); 2033 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2034 return Some(expr4_0); 2035 } 2036 2037 // Generated as internal constructor for term loadrev64. 2038 pub fn constructor_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2039 let pattern0_0 = arg0; 2040 // Rule at src/isa/s390x/inst.isle line 1521. 2041 let expr0_0: Type = I64; 2042 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2043 let expr2_0 = MInst::LoadRev64 { 2044 rd: expr1_0, 2045 mem: pattern0_0.clone(), 2046 }; 2047 let expr3_0 = C::emit(ctx, &expr2_0); 2048 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2049 return Some(expr4_0); 2050 } 2051 2052 // Generated as internal constructor for term store8. 2053 pub fn constructor_store8<C: Context>( 2054 ctx: &mut C, 2055 arg0: Reg, 2056 arg1: &MemArg, 2057 ) -> Option<SideEffectNoResult> { 2058 let pattern0_0 = arg0; 2059 let pattern1_0 = arg1; 2060 // Rule at src/isa/s390x/inst.isle line 1528. 2061 let expr0_0 = MInst::Store8 { 2062 rd: pattern0_0, 2063 mem: pattern1_0.clone(), 2064 }; 2065 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2066 return Some(expr1_0); 2067 } 2068 2069 // Generated as internal constructor for term store16. 2070 pub fn constructor_store16<C: Context>( 2071 ctx: &mut C, 2072 arg0: Reg, 2073 arg1: &MemArg, 2074 ) -> Option<SideEffectNoResult> { 2075 let pattern0_0 = arg0; 2076 let pattern1_0 = arg1; 2077 // Rule at src/isa/s390x/inst.isle line 1533. 2078 let expr0_0 = MInst::Store16 { 2079 rd: pattern0_0, 2080 mem: pattern1_0.clone(), 2081 }; 2082 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2083 return Some(expr1_0); 2084 } 2085 2086 // Generated as internal constructor for term store32. 2087 pub fn constructor_store32<C: Context>( 2088 ctx: &mut C, 2089 arg0: Reg, 2090 arg1: &MemArg, 2091 ) -> Option<SideEffectNoResult> { 2092 let pattern0_0 = arg0; 2093 let pattern1_0 = arg1; 2094 // Rule at src/isa/s390x/inst.isle line 1538. 2095 let expr0_0 = MInst::Store32 { 2096 rd: pattern0_0, 2097 mem: pattern1_0.clone(), 2098 }; 2099 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2100 return Some(expr1_0); 2101 } 2102 2103 // Generated as internal constructor for term store64. 2104 pub fn constructor_store64<C: Context>( 2105 ctx: &mut C, 2106 arg0: Reg, 2107 arg1: &MemArg, 2108 ) -> Option<SideEffectNoResult> { 2109 let pattern0_0 = arg0; 2110 let pattern1_0 = arg1; 2111 // Rule at src/isa/s390x/inst.isle line 1543. 2112 let expr0_0 = MInst::Store64 { 2113 rd: pattern0_0, 2114 mem: pattern1_0.clone(), 2115 }; 2116 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2117 return Some(expr1_0); 2118 } 2119 2120 // Generated as internal constructor for term store8_imm. 2121 pub fn constructor_store8_imm<C: Context>( 2122 ctx: &mut C, 2123 arg0: u8, 2124 arg1: &MemArg, 2125 ) -> Option<SideEffectNoResult> { 2126 let pattern0_0 = arg0; 2127 let pattern1_0 = arg1; 2128 // Rule at src/isa/s390x/inst.isle line 1548. 2129 let expr0_0 = MInst::StoreImm8 { 2130 imm: pattern0_0, 2131 mem: pattern1_0.clone(), 2132 }; 2133 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2134 return Some(expr1_0); 2135 } 2136 2137 // Generated as internal constructor for term store16_imm. 2138 pub fn constructor_store16_imm<C: Context>( 2139 ctx: &mut C, 2140 arg0: i16, 2141 arg1: &MemArg, 2142 ) -> Option<SideEffectNoResult> { 2143 let pattern0_0 = arg0; 2144 let pattern1_0 = arg1; 2145 // Rule at src/isa/s390x/inst.isle line 1553. 2146 let expr0_0 = MInst::StoreImm16 { 2147 imm: pattern0_0, 2148 mem: pattern1_0.clone(), 2149 }; 2150 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2151 return Some(expr1_0); 2152 } 2153 2154 // Generated as internal constructor for term store32_simm16. 2155 pub fn constructor_store32_simm16<C: Context>( 2156 ctx: &mut C, 2157 arg0: i16, 2158 arg1: &MemArg, 2159 ) -> Option<SideEffectNoResult> { 2160 let pattern0_0 = arg0; 2161 let pattern1_0 = arg1; 2162 // Rule at src/isa/s390x/inst.isle line 1558. 2163 let expr0_0 = MInst::StoreImm32SExt16 { 2164 imm: pattern0_0, 2165 mem: pattern1_0.clone(), 2166 }; 2167 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2168 return Some(expr1_0); 2169 } 2170 2171 // Generated as internal constructor for term store64_simm16. 2172 pub fn constructor_store64_simm16<C: Context>( 2173 ctx: &mut C, 2174 arg0: i16, 2175 arg1: &MemArg, 2176 ) -> Option<SideEffectNoResult> { 2177 let pattern0_0 = arg0; 2178 let pattern1_0 = arg1; 2179 // Rule at src/isa/s390x/inst.isle line 1563. 2180 let expr0_0 = MInst::StoreImm64SExt16 { 2181 imm: pattern0_0, 2182 mem: pattern1_0.clone(), 2183 }; 2184 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2185 return Some(expr1_0); 2186 } 2187 2188 // Generated as internal constructor for term storerev16. 2189 pub fn constructor_storerev16<C: Context>( 2190 ctx: &mut C, 2191 arg0: Reg, 2192 arg1: &MemArg, 2193 ) -> Option<SideEffectNoResult> { 2194 let pattern0_0 = arg0; 2195 let pattern1_0 = arg1; 2196 // Rule at src/isa/s390x/inst.isle line 1568. 2197 let expr0_0 = MInst::StoreRev16 { 2198 rd: pattern0_0, 2199 mem: pattern1_0.clone(), 2200 }; 2201 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2202 return Some(expr1_0); 2203 } 2204 2205 // Generated as internal constructor for term storerev32. 2206 pub fn constructor_storerev32<C: Context>( 2207 ctx: &mut C, 2208 arg0: Reg, 2209 arg1: &MemArg, 2210 ) -> Option<SideEffectNoResult> { 2211 let pattern0_0 = arg0; 2212 let pattern1_0 = arg1; 2213 // Rule at src/isa/s390x/inst.isle line 1573. 2214 let expr0_0 = MInst::StoreRev32 { 2215 rd: pattern0_0, 2216 mem: pattern1_0.clone(), 2217 }; 2218 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2219 return Some(expr1_0); 2220 } 2221 2222 // Generated as internal constructor for term storerev64. 2223 pub fn constructor_storerev64<C: Context>( 2224 ctx: &mut C, 2225 arg0: Reg, 2226 arg1: &MemArg, 2227 ) -> Option<SideEffectNoResult> { 2228 let pattern0_0 = arg0; 2229 let pattern1_0 = arg1; 2230 // Rule at src/isa/s390x/inst.isle line 1578. 2231 let expr0_0 = MInst::StoreRev64 { 2232 rd: pattern0_0, 2233 mem: pattern1_0.clone(), 2234 }; 2235 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2236 return Some(expr1_0); 2237 } 2238 2239 // Generated as internal constructor for term fpu_rr. 2240 pub fn constructor_fpu_rr<C: Context>( 2241 ctx: &mut C, 2242 arg0: Type, 2243 arg1: &FPUOp1, 2244 arg2: Reg, 2245 ) -> Option<Reg> { 2246 let pattern0_0 = arg0; 2247 let pattern1_0 = arg1; 2248 let pattern2_0 = arg2; 2249 // Rule at src/isa/s390x/inst.isle line 1583. 2250 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2251 let expr1_0 = MInst::FpuRR { 2252 fpu_op: pattern1_0.clone(), 2253 rd: expr0_0, 2254 rn: pattern2_0, 2255 }; 2256 let expr2_0 = C::emit(ctx, &expr1_0); 2257 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2258 return Some(expr3_0); 2259 } 2260 2261 // Generated as internal constructor for term fpu_rrr. 2262 pub fn constructor_fpu_rrr<C: Context>( 2263 ctx: &mut C, 2264 arg0: Type, 2265 arg1: &FPUOp2, 2266 arg2: Reg, 2267 arg3: Reg, 2268 ) -> Option<Reg> { 2269 let pattern0_0 = arg0; 2270 let pattern1_0 = arg1; 2271 let pattern2_0 = arg2; 2272 let pattern3_0 = arg3; 2273 // Rule at src/isa/s390x/inst.isle line 1590. 2274 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2275 let expr1_0 = MInst::FpuRRR { 2276 fpu_op: pattern1_0.clone(), 2277 rd: expr0_0, 2278 rm: pattern3_0, 2279 }; 2280 let expr2_0 = C::emit(ctx, &expr1_0); 2281 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2282 return Some(expr3_0); 2283 } 2284 2285 // Generated as internal constructor for term fpu_rrrr. 2286 pub fn constructor_fpu_rrrr<C: Context>( 2287 ctx: &mut C, 2288 arg0: Type, 2289 arg1: &FPUOp3, 2290 arg2: Reg, 2291 arg3: Reg, 2292 arg4: Reg, 2293 ) -> Option<Reg> { 2294 let pattern0_0 = arg0; 2295 let pattern1_0 = arg1; 2296 let pattern2_0 = arg2; 2297 let pattern3_0 = arg3; 2298 let pattern4_0 = arg4; 2299 // Rule at src/isa/s390x/inst.isle line 1597. 2300 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern2_0)?; 2301 let expr1_0 = MInst::FpuRRRR { 2302 fpu_op: pattern1_0.clone(), 2303 rd: expr0_0, 2304 rn: pattern3_0, 2305 rm: pattern4_0, 2306 }; 2307 let expr2_0 = C::emit(ctx, &expr1_0); 2308 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2309 return Some(expr3_0); 2310 } 2311 2312 // Generated as internal constructor for term fpu_copysign. 2313 pub fn constructor_fpu_copysign<C: Context>( 2314 ctx: &mut C, 2315 arg0: Type, 2316 arg1: Reg, 2317 arg2: Reg, 2318 ) -> Option<Reg> { 2319 let pattern0_0 = arg0; 2320 let pattern1_0 = arg1; 2321 let pattern2_0 = arg2; 2322 // Rule at src/isa/s390x/inst.isle line 1604. 2323 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2324 let expr1_0 = MInst::FpuCopysign { 2325 rd: expr0_0, 2326 rn: pattern1_0, 2327 rm: pattern2_0, 2328 }; 2329 let expr2_0 = C::emit(ctx, &expr1_0); 2330 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2331 return Some(expr3_0); 2332 } 2333 2334 // Generated as internal constructor for term fpu_cmp32. 2335 pub fn constructor_fpu_cmp32<C: Context>( 2336 ctx: &mut C, 2337 arg0: Reg, 2338 arg1: Reg, 2339 ) -> Option<ProducesFlags> { 2340 let pattern0_0 = arg0; 2341 let pattern1_0 = arg1; 2342 // Rule at src/isa/s390x/inst.isle line 1611. 2343 let expr0_0 = MInst::FpuCmp32 { 2344 rn: pattern0_0, 2345 rm: pattern1_0, 2346 }; 2347 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2348 return Some(expr1_0); 2349 } 2350 2351 // Generated as internal constructor for term fpu_cmp64. 2352 pub fn constructor_fpu_cmp64<C: Context>( 2353 ctx: &mut C, 2354 arg0: Reg, 2355 arg1: Reg, 2356 ) -> Option<ProducesFlags> { 2357 let pattern0_0 = arg0; 2358 let pattern1_0 = arg1; 2359 // Rule at src/isa/s390x/inst.isle line 1616. 2360 let expr0_0 = MInst::FpuCmp64 { 2361 rn: pattern0_0, 2362 rm: pattern1_0, 2363 }; 2364 let expr1_0 = ProducesFlags::ProducesFlagsSideEffect { inst: expr0_0 }; 2365 return Some(expr1_0); 2366 } 2367 2368 // Generated as internal constructor for term fpu_to_int. 2369 pub fn constructor_fpu_to_int<C: Context>( 2370 ctx: &mut C, 2371 arg0: Type, 2372 arg1: &FpuToIntOp, 2373 arg2: Reg, 2374 ) -> Option<ProducesFlags> { 2375 let pattern0_0 = arg0; 2376 let pattern1_0 = arg1; 2377 let pattern2_0 = arg2; 2378 // Rule at src/isa/s390x/inst.isle line 1621. 2379 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2380 let expr1_0 = MInst::FpuToInt { 2381 op: pattern1_0.clone(), 2382 rd: expr0_0, 2383 rn: pattern2_0, 2384 }; 2385 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 2386 let expr3_0 = ProducesFlags::ProducesFlagsReturnsReg { 2387 inst: expr1_0, 2388 result: expr2_0, 2389 }; 2390 return Some(expr3_0); 2391 } 2392 2393 // Generated as internal constructor for term int_to_fpu. 2394 pub fn constructor_int_to_fpu<C: Context>( 2395 ctx: &mut C, 2396 arg0: Type, 2397 arg1: &IntToFpuOp, 2398 arg2: Reg, 2399 ) -> Option<Reg> { 2400 let pattern0_0 = arg0; 2401 let pattern1_0 = arg1; 2402 let pattern2_0 = arg2; 2403 // Rule at src/isa/s390x/inst.isle line 1628. 2404 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2405 let expr1_0 = MInst::IntToFpu { 2406 op: pattern1_0.clone(), 2407 rd: expr0_0, 2408 rn: pattern2_0, 2409 }; 2410 let expr2_0 = C::emit(ctx, &expr1_0); 2411 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2412 return Some(expr3_0); 2413 } 2414 2415 // Generated as internal constructor for term fpu_round. 2416 pub fn constructor_fpu_round<C: Context>( 2417 ctx: &mut C, 2418 arg0: Type, 2419 arg1: &FpuRoundMode, 2420 arg2: Reg, 2421 ) -> Option<Reg> { 2422 let pattern0_0 = arg0; 2423 let pattern1_0 = arg1; 2424 let pattern2_0 = arg2; 2425 // Rule at src/isa/s390x/inst.isle line 1635. 2426 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2427 let expr1_0 = MInst::FpuRound { 2428 op: pattern1_0.clone(), 2429 rd: expr0_0, 2430 rn: pattern2_0, 2431 }; 2432 let expr2_0 = C::emit(ctx, &expr1_0); 2433 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2434 return Some(expr3_0); 2435 } 2436 2437 // Generated as internal constructor for term fpuvec_rrr. 2438 pub fn constructor_fpuvec_rrr<C: Context>( 2439 ctx: &mut C, 2440 arg0: Type, 2441 arg1: &FPUOp2, 2442 arg2: Reg, 2443 arg3: Reg, 2444 ) -> Option<Reg> { 2445 let pattern0_0 = arg0; 2446 let pattern1_0 = arg1; 2447 let pattern2_0 = arg2; 2448 let pattern3_0 = arg3; 2449 // Rule at src/isa/s390x/inst.isle line 1642. 2450 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 2451 let expr1_0 = MInst::FpuVecRRR { 2452 fpu_op: pattern1_0.clone(), 2453 rd: expr0_0, 2454 rn: pattern2_0, 2455 rm: pattern3_0, 2456 }; 2457 let expr2_0 = C::emit(ctx, &expr1_0); 2458 let expr3_0 = C::writable_reg_to_reg(ctx, expr0_0); 2459 return Some(expr3_0); 2460 } 2461 2462 // Generated as internal constructor for term mov_to_fpr. 2463 pub fn constructor_mov_to_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2464 let pattern0_0 = arg0; 2465 // Rule at src/isa/s390x/inst.isle line 1649. 2466 let expr0_0: Type = F64; 2467 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2468 let expr2_0 = MInst::MovToFpr { 2469 rd: expr1_0, 2470 rn: pattern0_0, 2471 }; 2472 let expr3_0 = C::emit(ctx, &expr2_0); 2473 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2474 return Some(expr4_0); 2475 } 2476 2477 // Generated as internal constructor for term mov_from_fpr. 2478 pub fn constructor_mov_from_fpr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 2479 let pattern0_0 = arg0; 2480 // Rule at src/isa/s390x/inst.isle line 1656. 2481 let expr0_0: Type = I64; 2482 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2483 let expr2_0 = MInst::MovFromFpr { 2484 rd: expr1_0, 2485 rn: pattern0_0, 2486 }; 2487 let expr3_0 = C::emit(ctx, &expr2_0); 2488 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2489 return Some(expr4_0); 2490 } 2491 2492 // Generated as internal constructor for term fpu_load32. 2493 pub fn constructor_fpu_load32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2494 let pattern0_0 = arg0; 2495 // Rule at src/isa/s390x/inst.isle line 1663. 2496 let expr0_0: Type = F32; 2497 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2498 let expr2_0 = MInst::FpuLoad32 { 2499 rd: expr1_0, 2500 mem: pattern0_0.clone(), 2501 }; 2502 let expr3_0 = C::emit(ctx, &expr2_0); 2503 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2504 return Some(expr4_0); 2505 } 2506 2507 // Generated as internal constructor for term fpu_load64. 2508 pub fn constructor_fpu_load64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2509 let pattern0_0 = arg0; 2510 // Rule at src/isa/s390x/inst.isle line 1670. 2511 let expr0_0: Type = F64; 2512 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2513 let expr2_0 = MInst::FpuLoad64 { 2514 rd: expr1_0, 2515 mem: pattern0_0.clone(), 2516 }; 2517 let expr3_0 = C::emit(ctx, &expr2_0); 2518 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2519 return Some(expr4_0); 2520 } 2521 2522 // Generated as internal constructor for term fpu_loadrev32. 2523 pub fn constructor_fpu_loadrev32<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2524 let pattern0_0 = arg0; 2525 // Rule at src/isa/s390x/inst.isle line 1677. 2526 let expr0_0: Type = F32; 2527 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2528 let expr2_0 = MInst::FpuLoadRev32 { 2529 rd: expr1_0, 2530 mem: pattern0_0.clone(), 2531 }; 2532 let expr3_0 = C::emit(ctx, &expr2_0); 2533 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2534 return Some(expr4_0); 2535 } 2536 2537 // Generated as internal constructor for term fpu_loadrev64. 2538 pub fn constructor_fpu_loadrev64<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2539 let pattern0_0 = arg0; 2540 // Rule at src/isa/s390x/inst.isle line 1684. 2541 let expr0_0: Type = F64; 2542 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2543 let expr2_0 = MInst::FpuLoadRev64 { 2544 rd: expr1_0, 2545 mem: pattern0_0.clone(), 2546 }; 2547 let expr3_0 = C::emit(ctx, &expr2_0); 2548 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2549 return Some(expr4_0); 2550 } 2551 2552 // Generated as internal constructor for term fpu_store32. 2553 pub fn constructor_fpu_store32<C: Context>( 2554 ctx: &mut C, 2555 arg0: Reg, 2556 arg1: &MemArg, 2557 ) -> Option<SideEffectNoResult> { 2558 let pattern0_0 = arg0; 2559 let pattern1_0 = arg1; 2560 // Rule at src/isa/s390x/inst.isle line 1691. 2561 let expr0_0 = MInst::FpuStore32 { 2562 rd: pattern0_0, 2563 mem: pattern1_0.clone(), 2564 }; 2565 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2566 return Some(expr1_0); 2567 } 2568 2569 // Generated as internal constructor for term fpu_store64. 2570 pub fn constructor_fpu_store64<C: Context>( 2571 ctx: &mut C, 2572 arg0: Reg, 2573 arg1: &MemArg, 2574 ) -> Option<SideEffectNoResult> { 2575 let pattern0_0 = arg0; 2576 let pattern1_0 = arg1; 2577 // Rule at src/isa/s390x/inst.isle line 1696. 2578 let expr0_0 = MInst::FpuStore64 { 2579 rd: pattern0_0, 2580 mem: pattern1_0.clone(), 2581 }; 2582 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2583 return Some(expr1_0); 2584 } 2585 2586 // Generated as internal constructor for term fpu_storerev32. 2587 pub fn constructor_fpu_storerev32<C: Context>( 2588 ctx: &mut C, 2589 arg0: Reg, 2590 arg1: &MemArg, 2591 ) -> Option<SideEffectNoResult> { 2592 let pattern0_0 = arg0; 2593 let pattern1_0 = arg1; 2594 // Rule at src/isa/s390x/inst.isle line 1701. 2595 let expr0_0 = MInst::FpuStoreRev32 { 2596 rd: pattern0_0, 2597 mem: pattern1_0.clone(), 2598 }; 2599 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2600 return Some(expr1_0); 2601 } 2602 2603 // Generated as internal constructor for term fpu_storerev64. 2604 pub fn constructor_fpu_storerev64<C: Context>( 2605 ctx: &mut C, 2606 arg0: Reg, 2607 arg1: &MemArg, 2608 ) -> Option<SideEffectNoResult> { 2609 let pattern0_0 = arg0; 2610 let pattern1_0 = arg1; 2611 // Rule at src/isa/s390x/inst.isle line 1706. 2612 let expr0_0 = MInst::FpuStoreRev64 { 2613 rd: pattern0_0, 2614 mem: pattern1_0.clone(), 2615 }; 2616 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2617 return Some(expr1_0); 2618 } 2619 2620 // Generated as internal constructor for term load_ext_name_far. 2621 pub fn constructor_load_ext_name_far<C: Context>( 2622 ctx: &mut C, 2623 arg0: ExternalName, 2624 arg1: i64, 2625 ) -> Option<Reg> { 2626 let pattern0_0 = arg0; 2627 let pattern1_0 = arg1; 2628 // Rule at src/isa/s390x/inst.isle line 1711. 2629 let expr0_0: Type = I64; 2630 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2631 let expr2_0 = C::box_external_name(ctx, pattern0_0); 2632 let expr3_0 = MInst::LoadExtNameFar { 2633 rd: expr1_0, 2634 name: expr2_0, 2635 offset: pattern1_0, 2636 }; 2637 let expr4_0 = C::emit(ctx, &expr3_0); 2638 let expr5_0 = C::writable_reg_to_reg(ctx, expr1_0); 2639 return Some(expr5_0); 2640 } 2641 2642 // Generated as internal constructor for term load_addr. 2643 pub fn constructor_load_addr<C: Context>(ctx: &mut C, arg0: &MemArg) -> Option<Reg> { 2644 let pattern0_0 = arg0; 2645 // Rule at src/isa/s390x/inst.isle line 1719. 2646 let expr0_0: Type = I64; 2647 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 2648 let expr2_0 = MInst::LoadAddr { 2649 rd: expr1_0, 2650 mem: pattern0_0.clone(), 2651 }; 2652 let expr3_0 = C::emit(ctx, &expr2_0); 2653 let expr4_0 = C::writable_reg_to_reg(ctx, expr1_0); 2654 return Some(expr4_0); 2655 } 2656 2657 // Generated as internal constructor for term jump_impl. 2658 pub fn constructor_jump_impl<C: Context>( 2659 ctx: &mut C, 2660 arg0: MachLabel, 2661 ) -> Option<SideEffectNoResult> { 2662 let pattern0_0 = arg0; 2663 // Rule at src/isa/s390x/inst.isle line 1726. 2664 let expr0_0 = MInst::Jump { dest: pattern0_0 }; 2665 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2666 return Some(expr1_0); 2667 } 2668 2669 // Generated as internal constructor for term cond_br. 2670 pub fn constructor_cond_br<C: Context>( 2671 ctx: &mut C, 2672 arg0: MachLabel, 2673 arg1: MachLabel, 2674 arg2: &Cond, 2675 ) -> Option<SideEffectNoResult> { 2676 let pattern0_0 = arg0; 2677 let pattern1_0 = arg1; 2678 let pattern2_0 = arg2; 2679 // Rule at src/isa/s390x/inst.isle line 1731. 2680 let expr0_0 = MInst::CondBr { 2681 taken: pattern0_0, 2682 not_taken: pattern1_0, 2683 cond: pattern2_0.clone(), 2684 }; 2685 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2686 return Some(expr1_0); 2687 } 2688 2689 // Generated as internal constructor for term oneway_cond_br. 2690 pub fn constructor_oneway_cond_br<C: Context>( 2691 ctx: &mut C, 2692 arg0: MachLabel, 2693 arg1: &Cond, 2694 ) -> Option<SideEffectNoResult> { 2695 let pattern0_0 = arg0; 2696 let pattern1_0 = arg1; 2697 // Rule at src/isa/s390x/inst.isle line 1736. 2698 let expr0_0 = MInst::OneWayCondBr { 2699 target: pattern0_0, 2700 cond: pattern1_0.clone(), 2701 }; 2702 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2703 return Some(expr1_0); 2704 } 2705 2706 // Generated as internal constructor for term jt_sequence. 2707 pub fn constructor_jt_sequence<C: Context>( 2708 ctx: &mut C, 2709 arg0: Reg, 2710 arg1: &VecMachLabel, 2711 ) -> Option<SideEffectNoResult> { 2712 let pattern0_0 = arg0; 2713 let pattern1_0 = arg1; 2714 // Rule at src/isa/s390x/inst.isle line 1741. 2715 let expr0_0 = MInst::JTSequence { 2716 ridx: pattern0_0, 2717 targets: pattern1_0.clone(), 2718 }; 2719 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 2720 return Some(expr1_0); 2721 } 2722 2723 // Generated as internal constructor for term drop_flags. 2724 pub fn constructor_drop_flags<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Reg> { 2725 let pattern0_0 = arg0; 2726 if let &ProducesFlags::ProducesFlagsReturnsReg { 2727 inst: ref pattern1_0, 2728 result: pattern1_1, 2729 } = pattern0_0 2730 { 2731 // Rule at src/isa/s390x/inst.isle line 1746. 2732 let expr0_0 = C::emit(ctx, pattern1_0); 2733 return Some(pattern1_1); 2734 } 2735 return None; 2736 } 2737 2738 // Generated as internal constructor for term push_alu_reg. 2739 pub fn constructor_push_alu_reg<C: Context>( 2740 ctx: &mut C, 2741 arg0: &VecMInstBuilder, 2742 arg1: &ALUOp, 2743 arg2: WritableReg, 2744 arg3: Reg, 2745 arg4: Reg, 2746 ) -> Option<Reg> { 2747 let pattern0_0 = arg0; 2748 let pattern1_0 = arg1; 2749 let pattern2_0 = arg2; 2750 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2751 let pattern4_0 = arg3; 2752 let pattern5_0 = arg4; 2753 // Rule at src/isa/s390x/inst.isle line 1785. 2754 let expr0_0 = MInst::AluRRR { 2755 alu_op: pattern1_0.clone(), 2756 rd: pattern3_0, 2757 rn: pattern4_0, 2758 rm: pattern5_0, 2759 }; 2760 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2761 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2762 return Some(expr2_0); 2763 } 2764 return None; 2765 } 2766 2767 // Generated as internal constructor for term push_alu_uimm32shifted. 2768 pub fn constructor_push_alu_uimm32shifted<C: Context>( 2769 ctx: &mut C, 2770 arg0: &VecMInstBuilder, 2771 arg1: &ALUOp, 2772 arg2: WritableReg, 2773 arg3: Reg, 2774 arg4: UImm32Shifted, 2775 ) -> Option<Reg> { 2776 let pattern0_0 = arg0; 2777 let pattern1_0 = arg1; 2778 let pattern2_0 = arg2; 2779 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2780 let pattern4_0 = arg3; 2781 let closure5 = || { 2782 return Some(pattern3_0); 2783 }; 2784 if let Some(pattern5_0) = closure5() { 2785 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2786 let pattern7_0 = arg4; 2787 // Rule at src/isa/s390x/inst.isle line 1791. 2788 let expr0_0 = MInst::AluRUImm32Shifted { 2789 alu_op: pattern1_0.clone(), 2790 rd: pattern3_0, 2791 imm: pattern7_0, 2792 }; 2793 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2794 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2795 return Some(expr2_0); 2796 } 2797 } 2798 } 2799 return None; 2800 } 2801 2802 // Generated as internal constructor for term push_shift. 2803 pub fn constructor_push_shift<C: Context>( 2804 ctx: &mut C, 2805 arg0: &VecMInstBuilder, 2806 arg1: &ShiftOp, 2807 arg2: WritableReg, 2808 arg3: Reg, 2809 arg4: u8, 2810 arg5: Reg, 2811 ) -> Option<Reg> { 2812 let pattern0_0 = arg0; 2813 let pattern1_0 = arg1; 2814 let pattern2_0 = arg2; 2815 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2816 let pattern4_0 = arg3; 2817 let pattern5_0 = arg4; 2818 let pattern6_0 = arg5; 2819 // Rule at src/isa/s390x/inst.isle line 1797. 2820 let expr0_0 = MInst::ShiftRR { 2821 shift_op: pattern1_0.clone(), 2822 rd: pattern3_0, 2823 rn: pattern4_0, 2824 shift_imm: pattern5_0, 2825 shift_reg: pattern6_0, 2826 }; 2827 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2828 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2829 return Some(expr2_0); 2830 } 2831 return None; 2832 } 2833 2834 // Generated as internal constructor for term push_rxsbg. 2835 pub fn constructor_push_rxsbg<C: Context>( 2836 ctx: &mut C, 2837 arg0: &VecMInstBuilder, 2838 arg1: &RxSBGOp, 2839 arg2: WritableReg, 2840 arg3: Reg, 2841 arg4: Reg, 2842 arg5: u8, 2843 arg6: u8, 2844 arg7: i8, 2845 ) -> Option<Reg> { 2846 let pattern0_0 = arg0; 2847 let pattern1_0 = arg1; 2848 let pattern2_0 = arg2; 2849 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2850 let pattern4_0 = arg3; 2851 let closure5 = || { 2852 return Some(pattern3_0); 2853 }; 2854 if let Some(pattern5_0) = closure5() { 2855 if let Some(()) = C::same_reg(ctx, pattern4_0, pattern5_0) { 2856 let pattern7_0 = arg4; 2857 let pattern8_0 = arg5; 2858 let pattern9_0 = arg6; 2859 let pattern10_0 = arg7; 2860 // Rule at src/isa/s390x/inst.isle line 1804. 2861 let expr0_0 = MInst::RxSBG { 2862 op: pattern1_0.clone(), 2863 rd: pattern3_0, 2864 rn: pattern7_0, 2865 start_bit: pattern8_0, 2866 end_bit: pattern9_0, 2867 rotate_amt: pattern10_0, 2868 }; 2869 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2870 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2871 return Some(expr2_0); 2872 } 2873 } 2874 } 2875 return None; 2876 } 2877 2878 // Generated as internal constructor for term push_unary. 2879 pub fn constructor_push_unary<C: Context>( 2880 ctx: &mut C, 2881 arg0: &VecMInstBuilder, 2882 arg1: &UnaryOp, 2883 arg2: WritableReg, 2884 arg3: Reg, 2885 ) -> Option<Reg> { 2886 let pattern0_0 = arg0; 2887 let pattern1_0 = arg1; 2888 let pattern2_0 = arg2; 2889 if let Some(pattern3_0) = C::real_reg(ctx, pattern2_0) { 2890 let pattern4_0 = arg3; 2891 // Rule at src/isa/s390x/inst.isle line 1811. 2892 let expr0_0 = MInst::UnaryRR { 2893 op: pattern1_0.clone(), 2894 rd: pattern3_0, 2895 rn: pattern4_0, 2896 }; 2897 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2898 let expr2_0 = C::writable_reg_to_reg(ctx, pattern3_0); 2899 return Some(expr2_0); 2900 } 2901 return None; 2902 } 2903 2904 // Generated as internal constructor for term push_atomic_cas32. 2905 pub fn constructor_push_atomic_cas32<C: Context>( 2906 ctx: &mut C, 2907 arg0: &VecMInstBuilder, 2908 arg1: WritableReg, 2909 arg2: Reg, 2910 arg3: &MemArg, 2911 ) -> Option<Reg> { 2912 let pattern0_0 = arg0; 2913 let pattern1_0 = arg1; 2914 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2915 let pattern3_0 = arg2; 2916 let pattern4_0 = arg3; 2917 // Rule at src/isa/s390x/inst.isle line 1817. 2918 let expr0_0 = MInst::AtomicCas32 { 2919 rd: pattern2_0, 2920 rn: pattern3_0, 2921 mem: pattern4_0.clone(), 2922 }; 2923 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2924 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 2925 return Some(expr2_0); 2926 } 2927 return None; 2928 } 2929 2930 // Generated as internal constructor for term push_atomic_cas64. 2931 pub fn constructor_push_atomic_cas64<C: Context>( 2932 ctx: &mut C, 2933 arg0: &VecMInstBuilder, 2934 arg1: WritableReg, 2935 arg2: Reg, 2936 arg3: &MemArg, 2937 ) -> Option<Reg> { 2938 let pattern0_0 = arg0; 2939 let pattern1_0 = arg1; 2940 if let Some(pattern2_0) = C::real_reg(ctx, pattern1_0) { 2941 let pattern3_0 = arg2; 2942 let pattern4_0 = arg3; 2943 // Rule at src/isa/s390x/inst.isle line 1823. 2944 let expr0_0 = MInst::AtomicCas64 { 2945 rd: pattern2_0, 2946 rn: pattern3_0, 2947 mem: pattern4_0.clone(), 2948 }; 2949 let expr1_0 = C::inst_builder_push(ctx, pattern0_0, &expr0_0); 2950 let expr2_0 = C::writable_reg_to_reg(ctx, pattern2_0); 2951 return Some(expr2_0); 2952 } 2953 return None; 2954 } 2955 2956 // Generated as internal constructor for term push_break_if. 2957 pub fn constructor_push_break_if<C: Context>( 2958 ctx: &mut C, 2959 arg0: &VecMInstBuilder, 2960 arg1: &ProducesFlags, 2961 arg2: &Cond, 2962 ) -> Option<Reg> { 2963 let pattern0_0 = arg0; 2964 let pattern1_0 = arg1; 2965 if let &ProducesFlags::ProducesFlagsSideEffect { 2966 inst: ref pattern2_0, 2967 } = pattern1_0 2968 { 2969 let pattern3_0 = arg2; 2970 // Rule at src/isa/s390x/inst.isle line 1829. 2971 let expr0_0 = C::inst_builder_push(ctx, pattern0_0, pattern2_0); 2972 let expr1_0 = MInst::CondBreak { 2973 cond: pattern3_0.clone(), 2974 }; 2975 let expr2_0 = C::inst_builder_push(ctx, pattern0_0, &expr1_0); 2976 let expr3_0 = C::invalid_reg(ctx); 2977 return Some(expr3_0); 2978 } 2979 return None; 2980 } 2981 2982 // Generated as internal constructor for term emit_loop. 2983 pub fn constructor_emit_loop<C: Context>( 2984 ctx: &mut C, 2985 arg0: &VecMInstBuilder, 2986 arg1: &Cond, 2987 ) -> Option<Unit> { 2988 let pattern0_0 = arg0; 2989 let pattern1_0 = arg1; 2990 // Rule at src/isa/s390x/inst.isle line 1836. 2991 let expr0_0 = C::inst_builder_finish(ctx, pattern0_0); 2992 let expr1_0 = MInst::Loop { 2993 body: expr0_0, 2994 cond: pattern1_0.clone(), 2995 }; 2996 let expr2_0 = C::emit(ctx, &expr1_0); 2997 return Some(expr2_0); 2998 } 2999 3000 // Generated as internal constructor for term emit_mov. 3001 pub fn constructor_emit_mov<C: Context>( 3002 ctx: &mut C, 3003 arg0: Type, 3004 arg1: WritableReg, 3005 arg2: Reg, 3006 ) -> Option<Unit> { 3007 let pattern0_0 = arg0; 3008 if pattern0_0 == F32 { 3009 let pattern2_0 = arg1; 3010 let pattern3_0 = arg2; 3011 // Rule at src/isa/s390x/inst.isle line 1851. 3012 let expr0_0 = MInst::FpuMove32 { 3013 rd: pattern2_0, 3014 rn: pattern3_0, 3015 }; 3016 let expr1_0 = C::emit(ctx, &expr0_0); 3017 return Some(expr1_0); 3018 } 3019 if pattern0_0 == F64 { 3020 let pattern2_0 = arg1; 3021 let pattern3_0 = arg2; 3022 // Rule at src/isa/s390x/inst.isle line 1854. 3023 let expr0_0 = MInst::FpuMove64 { 3024 rd: pattern2_0, 3025 rn: pattern3_0, 3026 }; 3027 let expr1_0 = C::emit(ctx, &expr0_0); 3028 return Some(expr1_0); 3029 } 3030 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3031 let pattern2_0 = arg1; 3032 let pattern3_0 = arg2; 3033 // Rule at src/isa/s390x/inst.isle line 1845. 3034 let expr0_0 = MInst::Mov32 { 3035 rd: pattern2_0, 3036 rm: pattern3_0, 3037 }; 3038 let expr1_0 = C::emit(ctx, &expr0_0); 3039 return Some(expr1_0); 3040 } 3041 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3042 let pattern2_0 = arg1; 3043 let pattern3_0 = arg2; 3044 // Rule at src/isa/s390x/inst.isle line 1848. 3045 let expr0_0 = MInst::Mov64 { 3046 rd: pattern2_0, 3047 rm: pattern3_0, 3048 }; 3049 let expr1_0 = C::emit(ctx, &expr0_0); 3050 return Some(expr1_0); 3051 } 3052 return None; 3053 } 3054 3055 // Generated as internal constructor for term copy_writable_reg. 3056 pub fn constructor_copy_writable_reg<C: Context>( 3057 ctx: &mut C, 3058 arg0: Type, 3059 arg1: Reg, 3060 ) -> Option<WritableReg> { 3061 let pattern0_0 = arg0; 3062 let pattern1_0 = arg1; 3063 // Rule at src/isa/s390x/inst.isle line 1859. 3064 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3065 let expr1_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern1_0)?; 3066 return Some(expr0_0); 3067 } 3068 3069 // Generated as internal constructor for term copy_reg. 3070 pub fn constructor_copy_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3071 let pattern0_0 = arg0; 3072 let pattern1_0 = arg1; 3073 // Rule at src/isa/s390x/inst.isle line 1866. 3074 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern1_0)?; 3075 let expr1_0 = C::writable_reg_to_reg(ctx, expr0_0); 3076 return Some(expr1_0); 3077 } 3078 3079 // Generated as internal constructor for term emit_load. 3080 pub fn constructor_emit_load<C: Context>( 3081 ctx: &mut C, 3082 arg0: Type, 3083 arg1: WritableReg, 3084 arg2: &MemArg, 3085 ) -> Option<Unit> { 3086 let pattern0_0 = arg0; 3087 if pattern0_0 == I32 { 3088 let pattern2_0 = arg1; 3089 let pattern3_0 = arg2; 3090 // Rule at src/isa/s390x/inst.isle line 1870. 3091 let expr0_0 = MInst::Load32 { 3092 rd: pattern2_0, 3093 mem: pattern3_0.clone(), 3094 }; 3095 let expr1_0 = C::emit(ctx, &expr0_0); 3096 return Some(expr1_0); 3097 } 3098 if pattern0_0 == I64 { 3099 let pattern2_0 = arg1; 3100 let pattern3_0 = arg2; 3101 // Rule at src/isa/s390x/inst.isle line 1872. 3102 let expr0_0 = MInst::Load64 { 3103 rd: pattern2_0, 3104 mem: pattern3_0.clone(), 3105 }; 3106 let expr1_0 = C::emit(ctx, &expr0_0); 3107 return Some(expr1_0); 3108 } 3109 return None; 3110 } 3111 3112 // Generated as internal constructor for term emit_imm. 3113 pub fn constructor_emit_imm<C: Context>( 3114 ctx: &mut C, 3115 arg0: Type, 3116 arg1: WritableReg, 3117 arg2: u64, 3118 ) -> Option<Unit> { 3119 let pattern0_0 = arg0; 3120 if pattern0_0 == F32 { 3121 let pattern2_0 = arg1; 3122 let pattern3_0 = arg2; 3123 // Rule at src/isa/s390x/inst.isle line 1928. 3124 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3125 let expr1_0 = MInst::LoadFpuConst32 { 3126 rd: pattern2_0, 3127 const_data: expr0_0, 3128 }; 3129 let expr2_0 = C::emit(ctx, &expr1_0); 3130 return Some(expr2_0); 3131 } 3132 if pattern0_0 == F64 { 3133 let pattern2_0 = arg1; 3134 let pattern3_0 = arg2; 3135 // Rule at src/isa/s390x/inst.isle line 1933. 3136 let expr0_0 = MInst::LoadFpuConst64 { 3137 rd: pattern2_0, 3138 const_data: pattern3_0, 3139 }; 3140 let expr1_0 = C::emit(ctx, &expr0_0); 3141 return Some(expr1_0); 3142 } 3143 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 3144 let pattern2_0 = arg1; 3145 let pattern3_0 = arg2; 3146 // Rule at src/isa/s390x/inst.isle line 1882. 3147 let expr0_0 = C::u64_as_i16(ctx, pattern3_0); 3148 let expr1_0 = MInst::Mov32SImm16 { 3149 rd: pattern2_0, 3150 imm: expr0_0, 3151 }; 3152 let expr2_0 = C::emit(ctx, &expr1_0); 3153 return Some(expr2_0); 3154 } 3155 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 3156 let pattern2_0 = arg1; 3157 let pattern3_0 = arg2; 3158 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3159 // Rule at src/isa/s390x/inst.isle line 1886. 3160 let expr0_0 = MInst::Mov32SImm16 { 3161 rd: pattern2_0, 3162 imm: pattern4_0, 3163 }; 3164 let expr1_0 = C::emit(ctx, &expr0_0); 3165 return Some(expr1_0); 3166 } 3167 // Rule at src/isa/s390x/inst.isle line 1890. 3168 let expr0_0 = C::u64_as_u32(ctx, pattern3_0); 3169 let expr1_0 = MInst::Mov32Imm { 3170 rd: pattern2_0, 3171 imm: expr0_0, 3172 }; 3173 let expr2_0 = C::emit(ctx, &expr1_0); 3174 return Some(expr2_0); 3175 } 3176 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 3177 let pattern2_0 = arg1; 3178 let pattern3_0 = arg2; 3179 if let Some(pattern4_0) = C::u64_nonzero_hipart(ctx, pattern3_0) { 3180 if let Some(pattern5_0) = C::u64_nonzero_lopart(ctx, pattern3_0) { 3181 // Rule at src/isa/s390x/inst.isle line 1910. 3182 let expr0_0 = constructor_emit_imm(ctx, pattern1_0, pattern2_0, pattern4_0)?; 3183 let expr1_0 = constructor_emit_insert_imm(ctx, pattern2_0, pattern5_0)?; 3184 return Some(expr1_0); 3185 } 3186 } 3187 if let Some(pattern4_0) = C::i16_from_u64(ctx, pattern3_0) { 3188 // Rule at src/isa/s390x/inst.isle line 1894. 3189 let expr0_0 = MInst::Mov64SImm16 { 3190 rd: pattern2_0, 3191 imm: pattern4_0, 3192 }; 3193 let expr1_0 = C::emit(ctx, &expr0_0); 3194 return Some(expr1_0); 3195 } 3196 if let Some(pattern4_0) = C::i32_from_u64(ctx, pattern3_0) { 3197 // Rule at src/isa/s390x/inst.isle line 1898. 3198 let expr0_0 = MInst::Mov64SImm32 { 3199 rd: pattern2_0, 3200 imm: pattern4_0, 3201 }; 3202 let expr1_0 = C::emit(ctx, &expr0_0); 3203 return Some(expr1_0); 3204 } 3205 if let Some(pattern4_0) = C::uimm32shifted_from_u64(ctx, pattern3_0) { 3206 // Rule at src/isa/s390x/inst.isle line 1906. 3207 let expr0_0 = MInst::Mov64UImm32Shifted { 3208 rd: pattern2_0, 3209 imm: pattern4_0, 3210 }; 3211 let expr1_0 = C::emit(ctx, &expr0_0); 3212 return Some(expr1_0); 3213 } 3214 if let Some(pattern4_0) = C::uimm16shifted_from_u64(ctx, pattern3_0) { 3215 // Rule at src/isa/s390x/inst.isle line 1902. 3216 let expr0_0 = MInst::Mov64UImm16Shifted { 3217 rd: pattern2_0, 3218 imm: pattern4_0, 3219 }; 3220 let expr1_0 = C::emit(ctx, &expr0_0); 3221 return Some(expr1_0); 3222 } 3223 } 3224 return None; 3225 } 3226 3227 // Generated as internal constructor for term emit_insert_imm. 3228 pub fn constructor_emit_insert_imm<C: Context>( 3229 ctx: &mut C, 3230 arg0: WritableReg, 3231 arg1: u64, 3232 ) -> Option<Unit> { 3233 let pattern0_0 = arg0; 3234 let pattern1_0 = arg1; 3235 if let Some(pattern2_0) = C::uimm32shifted_from_u64(ctx, pattern1_0) { 3236 // Rule at src/isa/s390x/inst.isle line 1923. 3237 let expr0_0 = MInst::Insert64UImm32Shifted { 3238 rd: pattern0_0, 3239 imm: pattern2_0, 3240 }; 3241 let expr1_0 = C::emit(ctx, &expr0_0); 3242 return Some(expr1_0); 3243 } 3244 if let Some(pattern2_0) = C::uimm16shifted_from_u64(ctx, pattern1_0) { 3245 // Rule at src/isa/s390x/inst.isle line 1919. 3246 let expr0_0 = MInst::Insert64UImm16Shifted { 3247 rd: pattern0_0, 3248 imm: pattern2_0, 3249 }; 3250 let expr1_0 = C::emit(ctx, &expr0_0); 3251 return Some(expr1_0); 3252 } 3253 return None; 3254 } 3255 3256 // Generated as internal constructor for term imm. 3257 pub fn constructor_imm<C: Context>(ctx: &mut C, arg0: Type, arg1: u64) -> Option<Reg> { 3258 let pattern0_0 = arg0; 3259 let pattern1_0 = arg1; 3260 // Rule at src/isa/s390x/inst.isle line 1938. 3261 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 3262 let expr1_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern1_0)?; 3263 let expr2_0 = C::writable_reg_to_reg(ctx, expr0_0); 3264 return Some(expr2_0); 3265 } 3266 3267 // Generated as internal constructor for term imm_regpair_lo. 3268 pub fn constructor_imm_regpair_lo<C: Context>( 3269 ctx: &mut C, 3270 arg0: Type, 3271 arg1: u64, 3272 arg2: &RegPair, 3273 ) -> Option<RegPair> { 3274 let pattern0_0 = arg0; 3275 let pattern1_0 = arg1; 3276 let pattern2_0 = arg2; 3277 // Rule at src/isa/s390x/inst.isle line 1946. 3278 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3279 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 3280 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3281 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3282 return Some(expr3_0); 3283 } 3284 3285 // Generated as internal constructor for term imm_regpair_hi. 3286 pub fn constructor_imm_regpair_hi<C: Context>( 3287 ctx: &mut C, 3288 arg0: Type, 3289 arg1: u64, 3290 arg2: &RegPair, 3291 ) -> Option<RegPair> { 3292 let pattern0_0 = arg0; 3293 let pattern1_0 = arg1; 3294 let pattern2_0 = arg2; 3295 // Rule at src/isa/s390x/inst.isle line 1954. 3296 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern2_0)?; 3297 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 3298 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr1_0, pattern1_0)?; 3299 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 3300 return Some(expr3_0); 3301 } 3302 3303 // Generated as internal constructor for term ty_ext32. 3304 pub fn constructor_ty_ext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3305 let pattern0_0 = arg0; 3306 if pattern0_0 == I8 { 3307 // Rule at src/isa/s390x/inst.isle line 1964. 3308 let expr0_0: Type = I32; 3309 return Some(expr0_0); 3310 } 3311 if pattern0_0 == I16 { 3312 // Rule at src/isa/s390x/inst.isle line 1965. 3313 let expr0_0: Type = I32; 3314 return Some(expr0_0); 3315 } 3316 if pattern0_0 == I32 { 3317 // Rule at src/isa/s390x/inst.isle line 1966. 3318 let expr0_0: Type = I32; 3319 return Some(expr0_0); 3320 } 3321 if pattern0_0 == I64 { 3322 // Rule at src/isa/s390x/inst.isle line 1967. 3323 let expr0_0: Type = I64; 3324 return Some(expr0_0); 3325 } 3326 return None; 3327 } 3328 3329 // Generated as internal constructor for term ty_ext64. 3330 pub fn constructor_ty_ext64<C: Context>(ctx: &mut C, arg0: Type) -> Option<Type> { 3331 let pattern0_0 = arg0; 3332 if pattern0_0 == I8 { 3333 // Rule at src/isa/s390x/inst.isle line 1971. 3334 let expr0_0: Type = I64; 3335 return Some(expr0_0); 3336 } 3337 if pattern0_0 == I16 { 3338 // Rule at src/isa/s390x/inst.isle line 1972. 3339 let expr0_0: Type = I64; 3340 return Some(expr0_0); 3341 } 3342 if pattern0_0 == I32 { 3343 // Rule at src/isa/s390x/inst.isle line 1973. 3344 let expr0_0: Type = I64; 3345 return Some(expr0_0); 3346 } 3347 if pattern0_0 == I64 { 3348 // Rule at src/isa/s390x/inst.isle line 1974. 3349 let expr0_0: Type = I64; 3350 return Some(expr0_0); 3351 } 3352 return None; 3353 } 3354 3355 // Generated as internal constructor for term emit_zext32_reg. 3356 pub fn constructor_emit_zext32_reg<C: Context>( 3357 ctx: &mut C, 3358 arg0: WritableReg, 3359 arg1: Type, 3360 arg2: Reg, 3361 ) -> Option<Unit> { 3362 let pattern0_0 = arg0; 3363 let pattern1_0 = arg1; 3364 let pattern2_0 = arg2; 3365 // Rule at src/isa/s390x/inst.isle line 1979. 3366 let expr0_0: bool = false; 3367 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3368 let expr2_0: u8 = 32; 3369 let expr3_0 = MInst::Extend { 3370 rd: pattern0_0, 3371 rn: pattern2_0, 3372 signed: expr0_0, 3373 from_bits: expr1_0, 3374 to_bits: expr2_0, 3375 }; 3376 let expr4_0 = C::emit(ctx, &expr3_0); 3377 return Some(expr4_0); 3378 } 3379 3380 // Generated as internal constructor for term emit_sext32_reg. 3381 pub fn constructor_emit_sext32_reg<C: Context>( 3382 ctx: &mut C, 3383 arg0: WritableReg, 3384 arg1: Type, 3385 arg2: Reg, 3386 ) -> Option<Unit> { 3387 let pattern0_0 = arg0; 3388 let pattern1_0 = arg1; 3389 let pattern2_0 = arg2; 3390 // Rule at src/isa/s390x/inst.isle line 1985. 3391 let expr0_0: bool = true; 3392 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3393 let expr2_0: u8 = 32; 3394 let expr3_0 = MInst::Extend { 3395 rd: pattern0_0, 3396 rn: pattern2_0, 3397 signed: expr0_0, 3398 from_bits: expr1_0, 3399 to_bits: expr2_0, 3400 }; 3401 let expr4_0 = C::emit(ctx, &expr3_0); 3402 return Some(expr4_0); 3403 } 3404 3405 // Generated as internal constructor for term emit_zext64_reg. 3406 pub fn constructor_emit_zext64_reg<C: Context>( 3407 ctx: &mut C, 3408 arg0: WritableReg, 3409 arg1: Type, 3410 arg2: Reg, 3411 ) -> Option<Unit> { 3412 let pattern0_0 = arg0; 3413 let pattern1_0 = arg1; 3414 let pattern2_0 = arg2; 3415 // Rule at src/isa/s390x/inst.isle line 1991. 3416 let expr0_0: bool = false; 3417 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3418 let expr2_0: u8 = 64; 3419 let expr3_0 = MInst::Extend { 3420 rd: pattern0_0, 3421 rn: pattern2_0, 3422 signed: expr0_0, 3423 from_bits: expr1_0, 3424 to_bits: expr2_0, 3425 }; 3426 let expr4_0 = C::emit(ctx, &expr3_0); 3427 return Some(expr4_0); 3428 } 3429 3430 // Generated as internal constructor for term emit_sext64_reg. 3431 pub fn constructor_emit_sext64_reg<C: Context>( 3432 ctx: &mut C, 3433 arg0: WritableReg, 3434 arg1: Type, 3435 arg2: Reg, 3436 ) -> Option<Unit> { 3437 let pattern0_0 = arg0; 3438 let pattern1_0 = arg1; 3439 let pattern2_0 = arg2; 3440 // Rule at src/isa/s390x/inst.isle line 1997. 3441 let expr0_0: bool = true; 3442 let expr1_0 = C::ty_bits(ctx, pattern1_0); 3443 let expr2_0: u8 = 64; 3444 let expr3_0 = MInst::Extend { 3445 rd: pattern0_0, 3446 rn: pattern2_0, 3447 signed: expr0_0, 3448 from_bits: expr1_0, 3449 to_bits: expr2_0, 3450 }; 3451 let expr4_0 = C::emit(ctx, &expr3_0); 3452 return Some(expr4_0); 3453 } 3454 3455 // Generated as internal constructor for term zext32_reg. 3456 pub fn constructor_zext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3457 let pattern0_0 = arg0; 3458 let pattern1_0 = arg1; 3459 // Rule at src/isa/s390x/inst.isle line 2003. 3460 let expr0_0: Type = I32; 3461 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3462 let expr2_0 = constructor_emit_zext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3463 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3464 return Some(expr3_0); 3465 } 3466 3467 // Generated as internal constructor for term sext32_reg. 3468 pub fn constructor_sext32_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3469 let pattern0_0 = arg0; 3470 let pattern1_0 = arg1; 3471 // Rule at src/isa/s390x/inst.isle line 2011. 3472 let expr0_0: Type = I32; 3473 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3474 let expr2_0 = constructor_emit_sext32_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3475 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3476 return Some(expr3_0); 3477 } 3478 3479 // Generated as internal constructor for term zext64_reg. 3480 pub fn constructor_zext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3481 let pattern0_0 = arg0; 3482 let pattern1_0 = arg1; 3483 // Rule at src/isa/s390x/inst.isle line 2019. 3484 let expr0_0: Type = I64; 3485 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3486 let expr2_0 = constructor_emit_zext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3487 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3488 return Some(expr3_0); 3489 } 3490 3491 // Generated as internal constructor for term sext64_reg. 3492 pub fn constructor_sext64_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 3493 let pattern0_0 = arg0; 3494 let pattern1_0 = arg1; 3495 // Rule at src/isa/s390x/inst.isle line 2027. 3496 let expr0_0: Type = I64; 3497 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3498 let expr2_0 = constructor_emit_sext64_reg(ctx, expr1_0, pattern0_0, pattern1_0)?; 3499 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3500 return Some(expr3_0); 3501 } 3502 3503 // Generated as internal constructor for term emit_zext32_mem. 3504 pub fn constructor_emit_zext32_mem<C: Context>( 3505 ctx: &mut C, 3506 arg0: WritableReg, 3507 arg1: Type, 3508 arg2: &MemArg, 3509 ) -> Option<Unit> { 3510 let pattern0_0 = arg0; 3511 let pattern1_0 = arg1; 3512 if pattern1_0 == I8 { 3513 let pattern3_0 = arg2; 3514 // Rule at src/isa/s390x/inst.isle line 2035. 3515 let expr0_0 = MInst::Load32ZExt8 { 3516 rd: pattern0_0, 3517 mem: pattern3_0.clone(), 3518 }; 3519 let expr1_0 = C::emit(ctx, &expr0_0); 3520 return Some(expr1_0); 3521 } 3522 if pattern1_0 == I16 { 3523 let pattern3_0 = arg2; 3524 // Rule at src/isa/s390x/inst.isle line 2036. 3525 let expr0_0 = MInst::Load32ZExt16 { 3526 rd: pattern0_0, 3527 mem: pattern3_0.clone(), 3528 }; 3529 let expr1_0 = C::emit(ctx, &expr0_0); 3530 return Some(expr1_0); 3531 } 3532 return None; 3533 } 3534 3535 // Generated as internal constructor for term emit_sext32_mem. 3536 pub fn constructor_emit_sext32_mem<C: Context>( 3537 ctx: &mut C, 3538 arg0: WritableReg, 3539 arg1: Type, 3540 arg2: &MemArg, 3541 ) -> Option<Unit> { 3542 let pattern0_0 = arg0; 3543 let pattern1_0 = arg1; 3544 if pattern1_0 == I8 { 3545 let pattern3_0 = arg2; 3546 // Rule at src/isa/s390x/inst.isle line 2040. 3547 let expr0_0 = MInst::Load32SExt8 { 3548 rd: pattern0_0, 3549 mem: pattern3_0.clone(), 3550 }; 3551 let expr1_0 = C::emit(ctx, &expr0_0); 3552 return Some(expr1_0); 3553 } 3554 if pattern1_0 == I16 { 3555 let pattern3_0 = arg2; 3556 // Rule at src/isa/s390x/inst.isle line 2041. 3557 let expr0_0 = MInst::Load32SExt16 { 3558 rd: pattern0_0, 3559 mem: pattern3_0.clone(), 3560 }; 3561 let expr1_0 = C::emit(ctx, &expr0_0); 3562 return Some(expr1_0); 3563 } 3564 return None; 3565 } 3566 3567 // Generated as internal constructor for term emit_zext64_mem. 3568 pub fn constructor_emit_zext64_mem<C: Context>( 3569 ctx: &mut C, 3570 arg0: WritableReg, 3571 arg1: Type, 3572 arg2: &MemArg, 3573 ) -> Option<Unit> { 3574 let pattern0_0 = arg0; 3575 let pattern1_0 = arg1; 3576 if pattern1_0 == I8 { 3577 let pattern3_0 = arg2; 3578 // Rule at src/isa/s390x/inst.isle line 2045. 3579 let expr0_0 = MInst::Load64ZExt8 { 3580 rd: pattern0_0, 3581 mem: pattern3_0.clone(), 3582 }; 3583 let expr1_0 = C::emit(ctx, &expr0_0); 3584 return Some(expr1_0); 3585 } 3586 if pattern1_0 == I16 { 3587 let pattern3_0 = arg2; 3588 // Rule at src/isa/s390x/inst.isle line 2046. 3589 let expr0_0 = MInst::Load64ZExt16 { 3590 rd: pattern0_0, 3591 mem: pattern3_0.clone(), 3592 }; 3593 let expr1_0 = C::emit(ctx, &expr0_0); 3594 return Some(expr1_0); 3595 } 3596 if pattern1_0 == I32 { 3597 let pattern3_0 = arg2; 3598 // Rule at src/isa/s390x/inst.isle line 2047. 3599 let expr0_0 = MInst::Load64ZExt32 { 3600 rd: pattern0_0, 3601 mem: pattern3_0.clone(), 3602 }; 3603 let expr1_0 = C::emit(ctx, &expr0_0); 3604 return Some(expr1_0); 3605 } 3606 return None; 3607 } 3608 3609 // Generated as internal constructor for term emit_sext64_mem. 3610 pub fn constructor_emit_sext64_mem<C: Context>( 3611 ctx: &mut C, 3612 arg0: WritableReg, 3613 arg1: Type, 3614 arg2: &MemArg, 3615 ) -> Option<Unit> { 3616 let pattern0_0 = arg0; 3617 let pattern1_0 = arg1; 3618 if pattern1_0 == I8 { 3619 let pattern3_0 = arg2; 3620 // Rule at src/isa/s390x/inst.isle line 2051. 3621 let expr0_0 = MInst::Load64SExt8 { 3622 rd: pattern0_0, 3623 mem: pattern3_0.clone(), 3624 }; 3625 let expr1_0 = C::emit(ctx, &expr0_0); 3626 return Some(expr1_0); 3627 } 3628 if pattern1_0 == I16 { 3629 let pattern3_0 = arg2; 3630 // Rule at src/isa/s390x/inst.isle line 2052. 3631 let expr0_0 = MInst::Load64SExt16 { 3632 rd: pattern0_0, 3633 mem: pattern3_0.clone(), 3634 }; 3635 let expr1_0 = C::emit(ctx, &expr0_0); 3636 return Some(expr1_0); 3637 } 3638 if pattern1_0 == I32 { 3639 let pattern3_0 = arg2; 3640 // Rule at src/isa/s390x/inst.isle line 2053. 3641 let expr0_0 = MInst::Load64SExt32 { 3642 rd: pattern0_0, 3643 mem: pattern3_0.clone(), 3644 }; 3645 let expr1_0 = C::emit(ctx, &expr0_0); 3646 return Some(expr1_0); 3647 } 3648 return None; 3649 } 3650 3651 // Generated as internal constructor for term zext32_mem. 3652 pub fn constructor_zext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3653 let pattern0_0 = arg0; 3654 let pattern1_0 = arg1; 3655 // Rule at src/isa/s390x/inst.isle line 2057. 3656 let expr0_0: Type = I32; 3657 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3658 let expr2_0 = constructor_emit_zext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3659 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3660 return Some(expr3_0); 3661 } 3662 3663 // Generated as internal constructor for term sext32_mem. 3664 pub fn constructor_sext32_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3665 let pattern0_0 = arg0; 3666 let pattern1_0 = arg1; 3667 // Rule at src/isa/s390x/inst.isle line 2064. 3668 let expr0_0: Type = I32; 3669 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3670 let expr2_0 = constructor_emit_sext32_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3671 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3672 return Some(expr3_0); 3673 } 3674 3675 // Generated as internal constructor for term zext64_mem. 3676 pub fn constructor_zext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3677 let pattern0_0 = arg0; 3678 let pattern1_0 = arg1; 3679 // Rule at src/isa/s390x/inst.isle line 2071. 3680 let expr0_0: Type = I64; 3681 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3682 let expr2_0 = constructor_emit_zext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3683 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3684 return Some(expr3_0); 3685 } 3686 3687 // Generated as internal constructor for term sext64_mem. 3688 pub fn constructor_sext64_mem<C: Context>(ctx: &mut C, arg0: Type, arg1: &MemArg) -> Option<Reg> { 3689 let pattern0_0 = arg0; 3690 let pattern1_0 = arg1; 3691 // Rule at src/isa/s390x/inst.isle line 2078. 3692 let expr0_0: Type = I64; 3693 let expr1_0 = C::temp_writable_reg(ctx, expr0_0); 3694 let expr2_0 = constructor_emit_sext64_mem(ctx, expr1_0, pattern0_0, pattern1_0)?; 3695 let expr3_0 = C::writable_reg_to_reg(ctx, expr1_0); 3696 return Some(expr3_0); 3697 } 3698 3699 // Generated as internal constructor for term emit_put_in_reg_zext32. 3700 pub fn constructor_emit_put_in_reg_zext32<C: Context>( 3701 ctx: &mut C, 3702 arg0: WritableReg, 3703 arg1: Value, 3704 ) -> Option<Unit> { 3705 let pattern0_0 = arg0; 3706 let pattern1_0 = arg1; 3707 let pattern2_0 = C::value_type(ctx, pattern1_0); 3708 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3709 // Rule at src/isa/s390x/inst.isle line 2086. 3710 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3711 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3712 return Some(expr1_0); 3713 } 3714 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3715 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3716 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3717 if let &InstructionData::Load { 3718 opcode: ref pattern6_0, 3719 arg: pattern6_1, 3720 flags: pattern6_2, 3721 offset: pattern6_3, 3722 } = &pattern5_0 3723 { 3724 if let &Opcode::Load = pattern6_0 { 3725 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3726 // Rule at src/isa/s390x/inst.isle line 2088. 3727 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3728 let expr1_0 = 3729 constructor_emit_zext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3730 return Some(expr1_0); 3731 } 3732 } 3733 } 3734 } 3735 // Rule at src/isa/s390x/inst.isle line 2090. 3736 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3737 let expr1_0 = constructor_emit_zext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3738 return Some(expr1_0); 3739 } 3740 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3741 // Rule at src/isa/s390x/inst.isle line 2092. 3742 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3743 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3744 return Some(expr1_0); 3745 } 3746 return None; 3747 } 3748 3749 // Generated as internal constructor for term emit_put_in_reg_sext32. 3750 pub fn constructor_emit_put_in_reg_sext32<C: Context>( 3751 ctx: &mut C, 3752 arg0: WritableReg, 3753 arg1: Value, 3754 ) -> Option<Unit> { 3755 let pattern0_0 = arg0; 3756 let pattern1_0 = arg1; 3757 let pattern2_0 = C::value_type(ctx, pattern1_0); 3758 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3759 // Rule at src/isa/s390x/inst.isle line 2097. 3760 let expr0_0 = constructor_ty_ext32(ctx, pattern2_0)?; 3761 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3762 return Some(expr1_0); 3763 } 3764 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 3765 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3766 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3767 if let &InstructionData::Load { 3768 opcode: ref pattern6_0, 3769 arg: pattern6_1, 3770 flags: pattern6_2, 3771 offset: pattern6_3, 3772 } = &pattern5_0 3773 { 3774 if let &Opcode::Load = pattern6_0 { 3775 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3776 // Rule at src/isa/s390x/inst.isle line 2099. 3777 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3778 let expr1_0 = 3779 constructor_emit_sext32_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3780 return Some(expr1_0); 3781 } 3782 } 3783 } 3784 } 3785 // Rule at src/isa/s390x/inst.isle line 2101. 3786 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3787 let expr1_0 = constructor_emit_sext32_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3788 return Some(expr1_0); 3789 } 3790 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 3791 // Rule at src/isa/s390x/inst.isle line 2103. 3792 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3793 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3794 return Some(expr1_0); 3795 } 3796 return None; 3797 } 3798 3799 // Generated as internal constructor for term emit_put_in_reg_zext64. 3800 pub fn constructor_emit_put_in_reg_zext64<C: Context>( 3801 ctx: &mut C, 3802 arg0: WritableReg, 3803 arg1: Value, 3804 ) -> Option<Unit> { 3805 let pattern0_0 = arg0; 3806 let pattern1_0 = arg1; 3807 let pattern2_0 = C::value_type(ctx, pattern1_0); 3808 if let Some(pattern3_0) = C::u64_from_value(ctx, pattern1_0) { 3809 // Rule at src/isa/s390x/inst.isle line 2108. 3810 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3811 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3812 return Some(expr1_0); 3813 } 3814 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3815 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3816 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3817 if let &InstructionData::Load { 3818 opcode: ref pattern6_0, 3819 arg: pattern6_1, 3820 flags: pattern6_2, 3821 offset: pattern6_3, 3822 } = &pattern5_0 3823 { 3824 if let &Opcode::Load = pattern6_0 { 3825 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3826 // Rule at src/isa/s390x/inst.isle line 2110. 3827 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3828 let expr1_0 = 3829 constructor_emit_zext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3830 return Some(expr1_0); 3831 } 3832 } 3833 } 3834 } 3835 // Rule at src/isa/s390x/inst.isle line 2112. 3836 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3837 let expr1_0 = constructor_emit_zext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3838 return Some(expr1_0); 3839 } 3840 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3841 // Rule at src/isa/s390x/inst.isle line 2114. 3842 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3843 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3844 return Some(expr1_0); 3845 } 3846 return None; 3847 } 3848 3849 // Generated as internal constructor for term emit_put_in_reg_sext64. 3850 pub fn constructor_emit_put_in_reg_sext64<C: Context>( 3851 ctx: &mut C, 3852 arg0: WritableReg, 3853 arg1: Value, 3854 ) -> Option<Unit> { 3855 let pattern0_0 = arg0; 3856 let pattern1_0 = arg1; 3857 let pattern2_0 = C::value_type(ctx, pattern1_0); 3858 if let Some(pattern3_0) = C::u64_from_signed_value(ctx, pattern1_0) { 3859 // Rule at src/isa/s390x/inst.isle line 2119. 3860 let expr0_0 = constructor_ty_ext64(ctx, pattern2_0)?; 3861 let expr1_0 = constructor_emit_imm(ctx, expr0_0, pattern0_0, pattern3_0)?; 3862 return Some(expr1_0); 3863 } 3864 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 3865 if let Some(pattern4_0) = C::sinkable_inst(ctx, pattern1_0) { 3866 let pattern5_0 = C::inst_data(ctx, pattern4_0); 3867 if let &InstructionData::Load { 3868 opcode: ref pattern6_0, 3869 arg: pattern6_1, 3870 flags: pattern6_2, 3871 offset: pattern6_3, 3872 } = &pattern5_0 3873 { 3874 if let &Opcode::Load = pattern6_0 { 3875 if let Some(()) = C::bigendian(ctx, pattern6_2) { 3876 // Rule at src/isa/s390x/inst.isle line 2121. 3877 let expr0_0 = constructor_sink_load(ctx, pattern4_0)?; 3878 let expr1_0 = 3879 constructor_emit_sext64_mem(ctx, pattern0_0, pattern3_0, &expr0_0)?; 3880 return Some(expr1_0); 3881 } 3882 } 3883 } 3884 } 3885 // Rule at src/isa/s390x/inst.isle line 2123. 3886 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3887 let expr1_0 = constructor_emit_sext64_reg(ctx, pattern0_0, pattern3_0, expr0_0)?; 3888 return Some(expr1_0); 3889 } 3890 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 3891 // Rule at src/isa/s390x/inst.isle line 2125. 3892 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 3893 let expr1_0 = constructor_emit_mov(ctx, pattern3_0, pattern0_0, expr0_0)?; 3894 return Some(expr1_0); 3895 } 3896 return None; 3897 } 3898 3899 // Generated as internal constructor for term put_in_reg_zext32. 3900 pub fn constructor_put_in_reg_zext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3901 let pattern0_0 = arg0; 3902 let pattern1_0 = C::value_type(ctx, pattern0_0); 3903 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3904 // Rule at src/isa/s390x/inst.isle line 2130. 3905 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3906 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3907 return Some(expr1_0); 3908 } 3909 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3910 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3911 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3912 if let &InstructionData::Load { 3913 opcode: ref pattern5_0, 3914 arg: pattern5_1, 3915 flags: pattern5_2, 3916 offset: pattern5_3, 3917 } = &pattern4_0 3918 { 3919 if let &Opcode::Load = pattern5_0 { 3920 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3921 // Rule at src/isa/s390x/inst.isle line 2132. 3922 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3923 let expr1_0 = constructor_zext32_mem(ctx, pattern2_0, &expr0_0)?; 3924 return Some(expr1_0); 3925 } 3926 } 3927 } 3928 } 3929 // Rule at src/isa/s390x/inst.isle line 2134. 3930 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3931 let expr1_0 = constructor_zext32_reg(ctx, pattern2_0, expr0_0)?; 3932 return Some(expr1_0); 3933 } 3934 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3935 // Rule at src/isa/s390x/inst.isle line 2136. 3936 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3937 return Some(expr0_0); 3938 } 3939 return None; 3940 } 3941 3942 // Generated as internal constructor for term put_in_reg_sext32. 3943 pub fn constructor_put_in_reg_sext32<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3944 let pattern0_0 = arg0; 3945 let pattern1_0 = C::value_type(ctx, pattern0_0); 3946 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 3947 // Rule at src/isa/s390x/inst.isle line 2141. 3948 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 3949 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3950 return Some(expr1_0); 3951 } 3952 if let Some(pattern2_0) = C::fits_in_16(ctx, pattern1_0) { 3953 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3954 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3955 if let &InstructionData::Load { 3956 opcode: ref pattern5_0, 3957 arg: pattern5_1, 3958 flags: pattern5_2, 3959 offset: pattern5_3, 3960 } = &pattern4_0 3961 { 3962 if let &Opcode::Load = pattern5_0 { 3963 if let Some(()) = C::bigendian(ctx, pattern5_2) { 3964 // Rule at src/isa/s390x/inst.isle line 2143. 3965 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 3966 let expr1_0 = constructor_sext32_mem(ctx, pattern2_0, &expr0_0)?; 3967 return Some(expr1_0); 3968 } 3969 } 3970 } 3971 } 3972 // Rule at src/isa/s390x/inst.isle line 2145. 3973 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3974 let expr1_0 = constructor_sext32_reg(ctx, pattern2_0, expr0_0)?; 3975 return Some(expr1_0); 3976 } 3977 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 3978 // Rule at src/isa/s390x/inst.isle line 2147. 3979 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 3980 return Some(expr0_0); 3981 } 3982 return None; 3983 } 3984 3985 // Generated as internal constructor for term put_in_reg_zext64. 3986 pub fn constructor_put_in_reg_zext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 3987 let pattern0_0 = arg0; 3988 let pattern1_0 = C::value_type(ctx, pattern0_0); 3989 if let Some(pattern2_0) = C::u64_from_value(ctx, pattern0_0) { 3990 // Rule at src/isa/s390x/inst.isle line 2152. 3991 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 3992 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 3993 return Some(expr1_0); 3994 } 3995 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 3996 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 3997 let pattern4_0 = C::inst_data(ctx, pattern3_0); 3998 if let &InstructionData::Load { 3999 opcode: ref pattern5_0, 4000 arg: pattern5_1, 4001 flags: pattern5_2, 4002 offset: pattern5_3, 4003 } = &pattern4_0 4004 { 4005 if let &Opcode::Load = pattern5_0 { 4006 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4007 // Rule at src/isa/s390x/inst.isle line 2154. 4008 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4009 let expr1_0 = constructor_zext64_mem(ctx, pattern2_0, &expr0_0)?; 4010 return Some(expr1_0); 4011 } 4012 } 4013 } 4014 } 4015 // Rule at src/isa/s390x/inst.isle line 2156. 4016 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4017 let expr1_0 = constructor_zext64_reg(ctx, pattern2_0, expr0_0)?; 4018 return Some(expr1_0); 4019 } 4020 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4021 // Rule at src/isa/s390x/inst.isle line 2158. 4022 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4023 return Some(expr0_0); 4024 } 4025 return None; 4026 } 4027 4028 // Generated as internal constructor for term put_in_reg_sext64. 4029 pub fn constructor_put_in_reg_sext64<C: Context>(ctx: &mut C, arg0: Value) -> Option<Reg> { 4030 let pattern0_0 = arg0; 4031 let pattern1_0 = C::value_type(ctx, pattern0_0); 4032 if let Some(pattern2_0) = C::u64_from_signed_value(ctx, pattern0_0) { 4033 // Rule at src/isa/s390x/inst.isle line 2163. 4034 let expr0_0 = constructor_ty_ext64(ctx, pattern1_0)?; 4035 let expr1_0 = constructor_imm(ctx, expr0_0, pattern2_0)?; 4036 return Some(expr1_0); 4037 } 4038 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 4039 if let Some(pattern3_0) = C::sinkable_inst(ctx, pattern0_0) { 4040 let pattern4_0 = C::inst_data(ctx, pattern3_0); 4041 if let &InstructionData::Load { 4042 opcode: ref pattern5_0, 4043 arg: pattern5_1, 4044 flags: pattern5_2, 4045 offset: pattern5_3, 4046 } = &pattern4_0 4047 { 4048 if let &Opcode::Load = pattern5_0 { 4049 if let Some(()) = C::bigendian(ctx, pattern5_2) { 4050 // Rule at src/isa/s390x/inst.isle line 2165. 4051 let expr0_0 = constructor_sink_load(ctx, pattern3_0)?; 4052 let expr1_0 = constructor_sext64_mem(ctx, pattern2_0, &expr0_0)?; 4053 return Some(expr1_0); 4054 } 4055 } 4056 } 4057 } 4058 // Rule at src/isa/s390x/inst.isle line 2167. 4059 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4060 let expr1_0 = constructor_sext64_reg(ctx, pattern2_0, expr0_0)?; 4061 return Some(expr1_0); 4062 } 4063 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 4064 // Rule at src/isa/s390x/inst.isle line 2169. 4065 let expr0_0 = C::put_in_reg(ctx, pattern0_0); 4066 return Some(expr0_0); 4067 } 4068 return None; 4069 } 4070 4071 // Generated as internal constructor for term put_in_regpair_lo_zext32. 4072 pub fn constructor_put_in_regpair_lo_zext32<C: Context>( 4073 ctx: &mut C, 4074 arg0: Value, 4075 arg1: &RegPair, 4076 ) -> Option<RegPair> { 4077 let pattern0_0 = arg0; 4078 let pattern1_0 = arg1; 4079 // Rule at src/isa/s390x/inst.isle line 2175. 4080 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4081 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4082 let expr2_0 = constructor_emit_put_in_reg_zext32(ctx, expr1_0, pattern0_0)?; 4083 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4084 return Some(expr3_0); 4085 } 4086 4087 // Generated as internal constructor for term put_in_regpair_lo_sext32. 4088 pub fn constructor_put_in_regpair_lo_sext32<C: Context>( 4089 ctx: &mut C, 4090 arg0: Value, 4091 arg1: &RegPair, 4092 ) -> Option<RegPair> { 4093 let pattern0_0 = arg0; 4094 let pattern1_0 = arg1; 4095 // Rule at src/isa/s390x/inst.isle line 2183. 4096 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4097 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4098 let expr2_0 = constructor_emit_put_in_reg_sext32(ctx, expr1_0, pattern0_0)?; 4099 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4100 return Some(expr3_0); 4101 } 4102 4103 // Generated as internal constructor for term put_in_regpair_lo_zext64. 4104 pub fn constructor_put_in_regpair_lo_zext64<C: Context>( 4105 ctx: &mut C, 4106 arg0: Value, 4107 arg1: &RegPair, 4108 ) -> Option<RegPair> { 4109 let pattern0_0 = arg0; 4110 let pattern1_0 = arg1; 4111 // Rule at src/isa/s390x/inst.isle line 2191. 4112 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4113 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4114 let expr2_0 = constructor_emit_put_in_reg_zext64(ctx, expr1_0, pattern0_0)?; 4115 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4116 return Some(expr3_0); 4117 } 4118 4119 // Generated as internal constructor for term put_in_regpair_lo_sext64. 4120 pub fn constructor_put_in_regpair_lo_sext64<C: Context>( 4121 ctx: &mut C, 4122 arg0: Value, 4123 arg1: &RegPair, 4124 ) -> Option<RegPair> { 4125 let pattern0_0 = arg0; 4126 let pattern1_0 = arg1; 4127 // Rule at src/isa/s390x/inst.isle line 2199. 4128 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern1_0)?; 4129 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4130 let expr2_0 = constructor_emit_put_in_reg_sext64(ctx, expr1_0, pattern0_0)?; 4131 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4132 return Some(expr3_0); 4133 } 4134 4135 // Generated as internal constructor for term emit_cmov_imm. 4136 pub fn constructor_emit_cmov_imm<C: Context>( 4137 ctx: &mut C, 4138 arg0: Type, 4139 arg1: WritableReg, 4140 arg2: &Cond, 4141 arg3: i16, 4142 ) -> Option<ConsumesFlags> { 4143 let pattern0_0 = arg0; 4144 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4145 let pattern2_0 = arg1; 4146 let pattern3_0 = arg2; 4147 let pattern4_0 = arg3; 4148 // Rule at src/isa/s390x/inst.isle line 2209. 4149 let expr0_0 = MInst::CMov32SImm16 { 4150 rd: pattern2_0, 4151 cond: pattern3_0.clone(), 4152 imm: pattern4_0, 4153 }; 4154 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4155 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4156 inst: expr0_0, 4157 result: expr1_0, 4158 }; 4159 return Some(expr2_0); 4160 } 4161 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4162 let pattern2_0 = arg1; 4163 let pattern3_0 = arg2; 4164 let pattern4_0 = arg3; 4165 // Rule at src/isa/s390x/inst.isle line 2212. 4166 let expr0_0 = MInst::CMov64SImm16 { 4167 rd: pattern2_0, 4168 cond: pattern3_0.clone(), 4169 imm: pattern4_0, 4170 }; 4171 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4172 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4173 inst: expr0_0, 4174 result: expr1_0, 4175 }; 4176 return Some(expr2_0); 4177 } 4178 return None; 4179 } 4180 4181 // Generated as internal constructor for term cmov_imm. 4182 pub fn constructor_cmov_imm<C: Context>( 4183 ctx: &mut C, 4184 arg0: Type, 4185 arg1: &Cond, 4186 arg2: i16, 4187 arg3: Reg, 4188 ) -> Option<ConsumesFlags> { 4189 let pattern0_0 = arg0; 4190 let pattern1_0 = arg1; 4191 let pattern2_0 = arg2; 4192 let pattern3_0 = arg3; 4193 // Rule at src/isa/s390x/inst.isle line 2218. 4194 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4195 let expr1_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4196 return Some(expr1_0); 4197 } 4198 4199 // Generated as internal constructor for term cmov_imm_regpair_lo. 4200 pub fn constructor_cmov_imm_regpair_lo<C: Context>( 4201 ctx: &mut C, 4202 arg0: Type, 4203 arg1: &ProducesFlags, 4204 arg2: &Cond, 4205 arg3: i16, 4206 arg4: &RegPair, 4207 ) -> Option<RegPair> { 4208 let pattern0_0 = arg0; 4209 let pattern1_0 = arg1; 4210 let pattern2_0 = arg2; 4211 let pattern3_0 = arg3; 4212 let pattern4_0 = arg4; 4213 // Rule at src/isa/s390x/inst.isle line 2225. 4214 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4215 let expr1_0 = constructor_writable_regpair_lo(ctx, &expr0_0)?; 4216 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4217 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4218 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4219 return Some(expr4_0); 4220 } 4221 4222 // Generated as internal constructor for term cmov_imm_regpair_hi. 4223 pub fn constructor_cmov_imm_regpair_hi<C: Context>( 4224 ctx: &mut C, 4225 arg0: Type, 4226 arg1: &ProducesFlags, 4227 arg2: &Cond, 4228 arg3: i16, 4229 arg4: &RegPair, 4230 ) -> Option<RegPair> { 4231 let pattern0_0 = arg0; 4232 let pattern1_0 = arg1; 4233 let pattern2_0 = arg2; 4234 let pattern3_0 = arg3; 4235 let pattern4_0 = arg4; 4236 // Rule at src/isa/s390x/inst.isle line 2234. 4237 let expr0_0 = constructor_copy_writable_regpair(ctx, pattern4_0)?; 4238 let expr1_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 4239 let expr2_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr1_0, pattern2_0, pattern3_0)?; 4240 let expr3_0 = constructor_with_flags_reg(ctx, pattern1_0, &expr2_0)?; 4241 let expr4_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 4242 return Some(expr4_0); 4243 } 4244 4245 // Generated as internal constructor for term emit_cmov_reg. 4246 pub fn constructor_emit_cmov_reg<C: Context>( 4247 ctx: &mut C, 4248 arg0: Type, 4249 arg1: WritableReg, 4250 arg2: &Cond, 4251 arg3: Reg, 4252 ) -> Option<ConsumesFlags> { 4253 let pattern0_0 = arg0; 4254 if pattern0_0 == F32 { 4255 let pattern2_0 = arg1; 4256 let pattern3_0 = arg2; 4257 let pattern4_0 = arg3; 4258 // Rule at src/isa/s390x/inst.isle line 2248. 4259 let expr0_0 = MInst::FpuCMov32 { 4260 rd: pattern2_0, 4261 cond: pattern3_0.clone(), 4262 rm: pattern4_0, 4263 }; 4264 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4265 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4266 inst: expr0_0, 4267 result: expr1_0, 4268 }; 4269 return Some(expr2_0); 4270 } 4271 if pattern0_0 == F64 { 4272 let pattern2_0 = arg1; 4273 let pattern3_0 = arg2; 4274 let pattern4_0 = arg3; 4275 // Rule at src/isa/s390x/inst.isle line 2251. 4276 let expr0_0 = MInst::FpuCMov64 { 4277 rd: pattern2_0, 4278 cond: pattern3_0.clone(), 4279 rm: pattern4_0, 4280 }; 4281 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4282 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4283 inst: expr0_0, 4284 result: expr1_0, 4285 }; 4286 return Some(expr2_0); 4287 } 4288 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 4289 let pattern2_0 = arg1; 4290 let pattern3_0 = arg2; 4291 let pattern4_0 = arg3; 4292 // Rule at src/isa/s390x/inst.isle line 2242. 4293 let expr0_0 = MInst::CMov32 { 4294 rd: pattern2_0, 4295 cond: pattern3_0.clone(), 4296 rm: pattern4_0, 4297 }; 4298 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4299 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4300 inst: expr0_0, 4301 result: expr1_0, 4302 }; 4303 return Some(expr2_0); 4304 } 4305 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 4306 let pattern2_0 = arg1; 4307 let pattern3_0 = arg2; 4308 let pattern4_0 = arg3; 4309 // Rule at src/isa/s390x/inst.isle line 2245. 4310 let expr0_0 = MInst::CMov64 { 4311 rd: pattern2_0, 4312 cond: pattern3_0.clone(), 4313 rm: pattern4_0, 4314 }; 4315 let expr1_0 = C::writable_reg_to_reg(ctx, pattern2_0); 4316 let expr2_0 = ConsumesFlags::ConsumesFlagsReturnsReg { 4317 inst: expr0_0, 4318 result: expr1_0, 4319 }; 4320 return Some(expr2_0); 4321 } 4322 return None; 4323 } 4324 4325 // Generated as internal constructor for term cmov_reg. 4326 pub fn constructor_cmov_reg<C: Context>( 4327 ctx: &mut C, 4328 arg0: Type, 4329 arg1: &Cond, 4330 arg2: Reg, 4331 arg3: Reg, 4332 ) -> Option<ConsumesFlags> { 4333 let pattern0_0 = arg0; 4334 let pattern1_0 = arg1; 4335 let pattern2_0 = arg2; 4336 let pattern3_0 = arg3; 4337 // Rule at src/isa/s390x/inst.isle line 2257. 4338 let expr0_0 = constructor_copy_writable_reg(ctx, pattern0_0, pattern3_0)?; 4339 let expr1_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern1_0, pattern2_0)?; 4340 return Some(expr1_0); 4341 } 4342 4343 // Generated as internal constructor for term trap_if. 4344 pub fn constructor_trap_if<C: Context>( 4345 ctx: &mut C, 4346 arg0: &ProducesFlags, 4347 arg1: &Cond, 4348 arg2: &TrapCode, 4349 ) -> Option<Reg> { 4350 let pattern0_0 = arg0; 4351 match pattern0_0 { 4352 &ProducesFlags::ProducesFlagsSideEffect { 4353 inst: ref pattern1_0, 4354 } => { 4355 let pattern2_0 = arg1; 4356 let pattern3_0 = arg2; 4357 // Rule at src/isa/s390x/inst.isle line 2269. 4358 let expr0_0 = C::emit(ctx, pattern1_0); 4359 let expr1_0 = MInst::TrapIf { 4360 cond: pattern2_0.clone(), 4361 trap_code: pattern3_0.clone(), 4362 }; 4363 let expr2_0 = C::emit(ctx, &expr1_0); 4364 let expr3_0 = C::invalid_reg(ctx); 4365 return Some(expr3_0); 4366 } 4367 &ProducesFlags::ProducesFlagsReturnsReg { 4368 inst: ref pattern1_0, 4369 result: pattern1_1, 4370 } => { 4371 let pattern2_0 = arg1; 4372 let pattern3_0 = arg2; 4373 // Rule at src/isa/s390x/inst.isle line 2265. 4374 let expr0_0 = C::emit(ctx, pattern1_0); 4375 let expr1_0 = MInst::TrapIf { 4376 cond: pattern2_0.clone(), 4377 trap_code: pattern3_0.clone(), 4378 }; 4379 let expr2_0 = C::emit(ctx, &expr1_0); 4380 return Some(pattern1_1); 4381 } 4382 _ => {} 4383 } 4384 return None; 4385 } 4386 4387 // Generated as internal constructor for term icmps_reg_and_trap. 4388 pub fn constructor_icmps_reg_and_trap<C: Context>( 4389 ctx: &mut C, 4390 arg0: Type, 4391 arg1: Reg, 4392 arg2: Reg, 4393 arg3: &Cond, 4394 arg4: &TrapCode, 4395 ) -> Option<Reg> { 4396 let pattern0_0 = arg0; 4397 let pattern1_0 = arg1; 4398 let pattern2_0 = arg2; 4399 let pattern3_0 = arg3; 4400 let pattern4_0 = arg4; 4401 // Rule at src/isa/s390x/inst.isle line 2275. 4402 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4403 let expr1_0 = MInst::CmpTrapRR { 4404 op: expr0_0, 4405 rn: pattern1_0, 4406 rm: pattern2_0, 4407 cond: pattern3_0.clone(), 4408 trap_code: pattern4_0.clone(), 4409 }; 4410 let expr2_0 = C::emit(ctx, &expr1_0); 4411 let expr3_0 = C::invalid_reg(ctx); 4412 return Some(expr3_0); 4413 } 4414 4415 // Generated as internal constructor for term icmps_simm16_and_trap. 4416 pub fn constructor_icmps_simm16_and_trap<C: Context>( 4417 ctx: &mut C, 4418 arg0: Type, 4419 arg1: Reg, 4420 arg2: i16, 4421 arg3: &Cond, 4422 arg4: &TrapCode, 4423 ) -> Option<Reg> { 4424 let pattern0_0 = arg0; 4425 let pattern1_0 = arg1; 4426 let pattern2_0 = arg2; 4427 let pattern3_0 = arg3; 4428 let pattern4_0 = arg4; 4429 // Rule at src/isa/s390x/inst.isle line 2281. 4430 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 4431 let expr1_0 = MInst::CmpTrapRSImm16 { 4432 op: expr0_0, 4433 rn: pattern1_0, 4434 imm: pattern2_0, 4435 cond: pattern3_0.clone(), 4436 trap_code: pattern4_0.clone(), 4437 }; 4438 let expr2_0 = C::emit(ctx, &expr1_0); 4439 let expr3_0 = C::invalid_reg(ctx); 4440 return Some(expr3_0); 4441 } 4442 4443 // Generated as internal constructor for term icmpu_reg_and_trap. 4444 pub fn constructor_icmpu_reg_and_trap<C: Context>( 4445 ctx: &mut C, 4446 arg0: Type, 4447 arg1: Reg, 4448 arg2: Reg, 4449 arg3: &Cond, 4450 arg4: &TrapCode, 4451 ) -> Option<Reg> { 4452 let pattern0_0 = arg0; 4453 let pattern1_0 = arg1; 4454 let pattern2_0 = arg2; 4455 let pattern3_0 = arg3; 4456 let pattern4_0 = arg4; 4457 // Rule at src/isa/s390x/inst.isle line 2287. 4458 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4459 let expr1_0 = MInst::CmpTrapRR { 4460 op: expr0_0, 4461 rn: pattern1_0, 4462 rm: pattern2_0, 4463 cond: pattern3_0.clone(), 4464 trap_code: pattern4_0.clone(), 4465 }; 4466 let expr2_0 = C::emit(ctx, &expr1_0); 4467 let expr3_0 = C::invalid_reg(ctx); 4468 return Some(expr3_0); 4469 } 4470 4471 // Generated as internal constructor for term icmpu_uimm16_and_trap. 4472 pub fn constructor_icmpu_uimm16_and_trap<C: Context>( 4473 ctx: &mut C, 4474 arg0: Type, 4475 arg1: Reg, 4476 arg2: u16, 4477 arg3: &Cond, 4478 arg4: &TrapCode, 4479 ) -> Option<Reg> { 4480 let pattern0_0 = arg0; 4481 let pattern1_0 = arg1; 4482 let pattern2_0 = arg2; 4483 let pattern3_0 = arg3; 4484 let pattern4_0 = arg4; 4485 // Rule at src/isa/s390x/inst.isle line 2293. 4486 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 4487 let expr1_0 = MInst::CmpTrapRUImm16 { 4488 op: expr0_0, 4489 rn: pattern1_0, 4490 imm: pattern2_0, 4491 cond: pattern3_0.clone(), 4492 trap_code: pattern4_0.clone(), 4493 }; 4494 let expr2_0 = C::emit(ctx, &expr1_0); 4495 let expr3_0 = C::invalid_reg(ctx); 4496 return Some(expr3_0); 4497 } 4498 4499 // Generated as internal constructor for term trap_impl. 4500 pub fn constructor_trap_impl<C: Context>( 4501 ctx: &mut C, 4502 arg0: &TrapCode, 4503 ) -> Option<SideEffectNoResult> { 4504 let pattern0_0 = arg0; 4505 // Rule at src/isa/s390x/inst.isle line 2299. 4506 let expr0_0 = MInst::Trap { 4507 trap_code: pattern0_0.clone(), 4508 }; 4509 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4510 return Some(expr1_0); 4511 } 4512 4513 // Generated as internal constructor for term trap_if_impl. 4514 pub fn constructor_trap_if_impl<C: Context>( 4515 ctx: &mut C, 4516 arg0: &Cond, 4517 arg1: &TrapCode, 4518 ) -> Option<SideEffectNoResult> { 4519 let pattern0_0 = arg0; 4520 let pattern1_0 = arg1; 4521 // Rule at src/isa/s390x/inst.isle line 2303. 4522 let expr0_0 = MInst::TrapIf { 4523 cond: pattern0_0.clone(), 4524 trap_code: pattern1_0.clone(), 4525 }; 4526 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4527 return Some(expr1_0); 4528 } 4529 4530 // Generated as internal constructor for term debugtrap_impl. 4531 pub fn constructor_debugtrap_impl<C: Context>(ctx: &mut C) -> Option<SideEffectNoResult> { 4532 // Rule at src/isa/s390x/inst.isle line 2307. 4533 let expr0_0 = MInst::Debugtrap; 4534 let expr1_0 = SideEffectNoResult::Inst { inst: expr0_0 }; 4535 return Some(expr1_0); 4536 } 4537 4538 // Generated as internal constructor for term bool. 4539 pub fn constructor_bool<C: Context>( 4540 ctx: &mut C, 4541 arg0: &ProducesFlags, 4542 arg1: &Cond, 4543 ) -> Option<ProducesBool> { 4544 let pattern0_0 = arg0; 4545 let pattern1_0 = arg1; 4546 // Rule at src/isa/s390x/inst.isle line 2318. 4547 let expr0_0 = ProducesBool::ProducesBool { 4548 producer: pattern0_0.clone(), 4549 cond: pattern1_0.clone(), 4550 }; 4551 return Some(expr0_0); 4552 } 4553 4554 // Generated as internal constructor for term invert_bool. 4555 pub fn constructor_invert_bool<C: Context>( 4556 ctx: &mut C, 4557 arg0: &ProducesBool, 4558 ) -> Option<ProducesBool> { 4559 let pattern0_0 = arg0; 4560 if let &ProducesBool::ProducesBool { 4561 producer: ref pattern1_0, 4562 cond: ref pattern1_1, 4563 } = pattern0_0 4564 { 4565 // Rule at src/isa/s390x/inst.isle line 2322. 4566 let expr0_0 = C::invert_cond(ctx, pattern1_1); 4567 let expr1_0 = constructor_bool(ctx, pattern1_0, &expr0_0)?; 4568 return Some(expr1_0); 4569 } 4570 return None; 4571 } 4572 4573 // Generated as internal constructor for term emit_producer. 4574 pub fn constructor_emit_producer<C: Context>(ctx: &mut C, arg0: &ProducesFlags) -> Option<Unit> { 4575 let pattern0_0 = arg0; 4576 if let &ProducesFlags::ProducesFlagsSideEffect { 4577 inst: ref pattern1_0, 4578 } = pattern0_0 4579 { 4580 // Rule at src/isa/s390x/inst.isle line 2331. 4581 let expr0_0 = C::emit(ctx, pattern1_0); 4582 return Some(expr0_0); 4583 } 4584 return None; 4585 } 4586 4587 // Generated as internal constructor for term emit_consumer. 4588 pub fn constructor_emit_consumer<C: Context>(ctx: &mut C, arg0: &ConsumesFlags) -> Option<Unit> { 4589 let pattern0_0 = arg0; 4590 if let &ConsumesFlags::ConsumesFlagsReturnsReg { 4591 inst: ref pattern1_0, 4592 result: pattern1_1, 4593 } = pattern0_0 4594 { 4595 // Rule at src/isa/s390x/inst.isle line 2333. 4596 let expr0_0 = C::emit(ctx, pattern1_0); 4597 return Some(expr0_0); 4598 } 4599 return None; 4600 } 4601 4602 // Generated as internal constructor for term select_bool_reg. 4603 pub fn constructor_select_bool_reg<C: Context>( 4604 ctx: &mut C, 4605 arg0: Type, 4606 arg1: &ProducesBool, 4607 arg2: Reg, 4608 arg3: Reg, 4609 ) -> Option<Reg> { 4610 let pattern0_0 = arg0; 4611 let pattern1_0 = arg1; 4612 if let &ProducesBool::ProducesBool { 4613 producer: ref pattern2_0, 4614 cond: ref pattern2_1, 4615 } = pattern1_0 4616 { 4617 let pattern3_0 = arg2; 4618 let pattern4_0 = arg3; 4619 // Rule at src/isa/s390x/inst.isle line 2337. 4620 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4621 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4622 let expr2_0 = constructor_emit_mov(ctx, pattern0_0, expr0_0, pattern4_0)?; 4623 let expr3_0 = constructor_emit_cmov_reg(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4624 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4625 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4626 return Some(expr5_0); 4627 } 4628 return None; 4629 } 4630 4631 // Generated as internal constructor for term select_bool_imm. 4632 pub fn constructor_select_bool_imm<C: Context>( 4633 ctx: &mut C, 4634 arg0: Type, 4635 arg1: &ProducesBool, 4636 arg2: i16, 4637 arg3: u64, 4638 ) -> Option<Reg> { 4639 let pattern0_0 = arg0; 4640 let pattern1_0 = arg1; 4641 if let &ProducesBool::ProducesBool { 4642 producer: ref pattern2_0, 4643 cond: ref pattern2_1, 4644 } = pattern1_0 4645 { 4646 let pattern3_0 = arg2; 4647 let pattern4_0 = arg3; 4648 // Rule at src/isa/s390x/inst.isle line 2346. 4649 let expr0_0 = C::temp_writable_reg(ctx, pattern0_0); 4650 let expr1_0 = constructor_emit_producer(ctx, pattern2_0)?; 4651 let expr2_0 = constructor_emit_imm(ctx, pattern0_0, expr0_0, pattern4_0)?; 4652 let expr3_0 = constructor_emit_cmov_imm(ctx, pattern0_0, expr0_0, pattern2_1, pattern3_0)?; 4653 let expr4_0 = constructor_emit_consumer(ctx, &expr3_0)?; 4654 let expr5_0 = C::writable_reg_to_reg(ctx, expr0_0); 4655 return Some(expr5_0); 4656 } 4657 return None; 4658 } 4659 4660 // Generated as internal constructor for term lower_bool. 4661 pub fn constructor_lower_bool<C: Context>( 4662 ctx: &mut C, 4663 arg0: Type, 4664 arg1: &ProducesBool, 4665 ) -> Option<Reg> { 4666 let pattern0_0 = arg0; 4667 if pattern0_0 == B1 { 4668 let pattern2_0 = arg1; 4669 // Rule at src/isa/s390x/inst.isle line 2356. 4670 let expr0_0: Type = B1; 4671 let expr1_0: i16 = 1; 4672 let expr2_0: u64 = 0; 4673 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4674 return Some(expr3_0); 4675 } 4676 if pattern0_0 == B8 { 4677 let pattern2_0 = arg1; 4678 // Rule at src/isa/s390x/inst.isle line 2357. 4679 let expr0_0: Type = B8; 4680 let expr1_0: i16 = -1; 4681 let expr2_0: u64 = 0; 4682 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4683 return Some(expr3_0); 4684 } 4685 if pattern0_0 == B16 { 4686 let pattern2_0 = arg1; 4687 // Rule at src/isa/s390x/inst.isle line 2358. 4688 let expr0_0: Type = B16; 4689 let expr1_0: i16 = -1; 4690 let expr2_0: u64 = 0; 4691 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4692 return Some(expr3_0); 4693 } 4694 if pattern0_0 == B32 { 4695 let pattern2_0 = arg1; 4696 // Rule at src/isa/s390x/inst.isle line 2359. 4697 let expr0_0: Type = B32; 4698 let expr1_0: i16 = -1; 4699 let expr2_0: u64 = 0; 4700 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4701 return Some(expr3_0); 4702 } 4703 if pattern0_0 == B64 { 4704 let pattern2_0 = arg1; 4705 // Rule at src/isa/s390x/inst.isle line 2360. 4706 let expr0_0: Type = B64; 4707 let expr1_0: i16 = -1; 4708 let expr2_0: u64 = 0; 4709 let expr3_0 = constructor_select_bool_imm(ctx, expr0_0, pattern2_0, expr1_0, expr2_0)?; 4710 return Some(expr3_0); 4711 } 4712 return None; 4713 } 4714 4715 // Generated as internal constructor for term cond_br_bool. 4716 pub fn constructor_cond_br_bool<C: Context>( 4717 ctx: &mut C, 4718 arg0: &ProducesBool, 4719 arg1: MachLabel, 4720 arg2: MachLabel, 4721 ) -> Option<SideEffectNoResult> { 4722 let pattern0_0 = arg0; 4723 if let &ProducesBool::ProducesBool { 4724 producer: ref pattern1_0, 4725 cond: ref pattern1_1, 4726 } = pattern0_0 4727 { 4728 let pattern2_0 = arg1; 4729 let pattern3_0 = arg2; 4730 // Rule at src/isa/s390x/inst.isle line 2364. 4731 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4732 let expr1_0 = constructor_cond_br(ctx, pattern2_0, pattern3_0, pattern1_1)?; 4733 return Some(expr1_0); 4734 } 4735 return None; 4736 } 4737 4738 // Generated as internal constructor for term oneway_cond_br_bool. 4739 pub fn constructor_oneway_cond_br_bool<C: Context>( 4740 ctx: &mut C, 4741 arg0: &ProducesBool, 4742 arg1: MachLabel, 4743 ) -> Option<SideEffectNoResult> { 4744 let pattern0_0 = arg0; 4745 if let &ProducesBool::ProducesBool { 4746 producer: ref pattern1_0, 4747 cond: ref pattern1_1, 4748 } = pattern0_0 4749 { 4750 let pattern2_0 = arg1; 4751 // Rule at src/isa/s390x/inst.isle line 2370. 4752 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4753 let expr1_0 = constructor_oneway_cond_br(ctx, pattern2_0, pattern1_1)?; 4754 return Some(expr1_0); 4755 } 4756 return None; 4757 } 4758 4759 // Generated as internal constructor for term trap_if_bool. 4760 pub fn constructor_trap_if_bool<C: Context>( 4761 ctx: &mut C, 4762 arg0: &ProducesBool, 4763 arg1: &TrapCode, 4764 ) -> Option<SideEffectNoResult> { 4765 let pattern0_0 = arg0; 4766 if let &ProducesBool::ProducesBool { 4767 producer: ref pattern1_0, 4768 cond: ref pattern1_1, 4769 } = pattern0_0 4770 { 4771 let pattern2_0 = arg1; 4772 // Rule at src/isa/s390x/inst.isle line 2376. 4773 let expr0_0 = constructor_emit_producer(ctx, pattern1_0)?; 4774 let expr1_0 = constructor_trap_if_impl(ctx, pattern1_1, pattern2_0)?; 4775 return Some(expr1_0); 4776 } 4777 return None; 4778 } 4779 4780 // Generated as internal constructor for term casloop_val_reg. 4781 pub fn constructor_casloop_val_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4782 // Rule at src/isa/s390x/inst.isle line 2390. 4783 let expr0_0: u8 = 0; 4784 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4785 return Some(expr1_0); 4786 } 4787 4788 // Generated as internal constructor for term casloop_tmp_reg. 4789 pub fn constructor_casloop_tmp_reg<C: Context>(ctx: &mut C) -> Option<WritableReg> { 4790 // Rule at src/isa/s390x/inst.isle line 2394. 4791 let expr0_0: u8 = 1; 4792 let expr1_0 = C::writable_gpr(ctx, expr0_0); 4793 return Some(expr1_0); 4794 } 4795 4796 // Generated as internal constructor for term casloop_emit. 4797 pub fn constructor_casloop_emit<C: Context>( 4798 ctx: &mut C, 4799 arg0: &VecMInstBuilder, 4800 arg1: Type, 4801 arg2: MemFlags, 4802 arg3: Reg, 4803 arg4: Reg, 4804 ) -> Option<Reg> { 4805 let pattern0_0 = arg0; 4806 let pattern1_0 = arg1; 4807 let pattern2_0 = arg2; 4808 let pattern3_0 = arg3; 4809 let pattern4_0 = arg4; 4810 // Rule at src/isa/s390x/inst.isle line 2403. 4811 let expr0_0: i64 = 0; 4812 let expr1_0 = C::memarg_reg_plus_off(ctx, pattern3_0, expr0_0, pattern2_0); 4813 let expr2_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4814 let expr3_0 = constructor_casloop_val_reg(ctx)?; 4815 let expr4_0 = 4816 constructor_push_atomic_cas(ctx, pattern0_0, expr2_0, expr3_0, pattern4_0, &expr1_0)?; 4817 let expr5_0 = constructor_ty_ext32(ctx, pattern1_0)?; 4818 let expr6_0 = constructor_casloop_val_reg(ctx)?; 4819 let expr7_0 = constructor_emit_load(ctx, expr5_0, expr6_0, &expr1_0)?; 4820 let expr8_0 = IntCC::NotEqual; 4821 let expr9_0 = C::intcc_as_cond(ctx, &expr8_0); 4822 let expr10_0 = constructor_emit_loop(ctx, pattern0_0, &expr9_0)?; 4823 return Some(expr4_0); 4824 } 4825 4826 // Generated as internal constructor for term casloop_result. 4827 pub fn constructor_casloop_result<C: Context>( 4828 ctx: &mut C, 4829 arg0: Type, 4830 arg1: MemFlags, 4831 arg2: Reg, 4832 ) -> Option<Reg> { 4833 let pattern0_0 = arg0; 4834 if let Some(pattern1_0) = C::ty_32_or_64(ctx, pattern0_0) { 4835 let pattern2_0 = arg1; 4836 if let Some(()) = C::littleendian(ctx, pattern2_0) { 4837 let pattern4_0 = arg2; 4838 // Rule at src/isa/s390x/inst.isle line 2421. 4839 let expr0_0 = constructor_bswap_reg(ctx, pattern1_0, pattern4_0)?; 4840 return Some(expr0_0); 4841 } 4842 if let Some(()) = C::bigendian(ctx, pattern2_0) { 4843 let pattern4_0 = arg2; 4844 // Rule at src/isa/s390x/inst.isle line 2419. 4845 let expr0_0 = constructor_copy_reg(ctx, pattern1_0, pattern4_0)?; 4846 return Some(expr0_0); 4847 } 4848 } 4849 return None; 4850 } 4851 4852 // Generated as internal constructor for term casloop. 4853 pub fn constructor_casloop<C: Context>( 4854 ctx: &mut C, 4855 arg0: &VecMInstBuilder, 4856 arg1: Type, 4857 arg2: MemFlags, 4858 arg3: Reg, 4859 arg4: Reg, 4860 ) -> Option<Reg> { 4861 let pattern0_0 = arg0; 4862 let pattern1_0 = arg1; 4863 let pattern2_0 = arg2; 4864 let pattern3_0 = arg3; 4865 let pattern4_0 = arg4; 4866 // Rule at src/isa/s390x/inst.isle line 2426. 4867 let expr0_0 = constructor_casloop_emit( 4868 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern4_0, 4869 )?; 4870 let expr1_0 = constructor_casloop_result(ctx, pattern1_0, pattern2_0, expr0_0)?; 4871 return Some(expr1_0); 4872 } 4873 4874 // Generated as internal constructor for term casloop_bitshift. 4875 pub fn constructor_casloop_bitshift<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4876 let pattern0_0 = arg0; 4877 // Rule at src/isa/s390x/inst.isle line 2441. 4878 let expr0_0: Type = I32; 4879 let expr1_0: u8 = 3; 4880 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern0_0, expr1_0)?; 4881 return Some(expr2_0); 4882 } 4883 4884 // Generated as internal constructor for term casloop_aligned_addr. 4885 pub fn constructor_casloop_aligned_addr<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 4886 let pattern0_0 = arg0; 4887 // Rule at src/isa/s390x/inst.isle line 2446. 4888 let expr0_0: Type = I64; 4889 let expr1_0: u16 = 65532; 4890 let expr2_0: u8 = 0; 4891 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 4892 let expr4_0 = constructor_and_uimm16shifted(ctx, expr0_0, pattern0_0, expr3_0)?; 4893 return Some(expr4_0); 4894 } 4895 4896 // Generated as internal constructor for term casloop_rotate_in. 4897 pub fn constructor_casloop_rotate_in<C: Context>( 4898 ctx: &mut C, 4899 arg0: &VecMInstBuilder, 4900 arg1: Type, 4901 arg2: MemFlags, 4902 arg3: Reg, 4903 arg4: Reg, 4904 ) -> Option<Reg> { 4905 let pattern0_0 = arg0; 4906 let pattern1_0 = arg1; 4907 if pattern1_0 == I8 { 4908 let pattern3_0 = arg2; 4909 let pattern4_0 = arg3; 4910 let pattern5_0 = arg4; 4911 // Rule at src/isa/s390x/inst.isle line 2456. 4912 let expr0_0: Type = I32; 4913 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4914 let expr2_0: u8 = 0; 4915 let expr3_0 = constructor_push_rot_imm_reg( 4916 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, pattern4_0, 4917 )?; 4918 return Some(expr3_0); 4919 } 4920 if pattern1_0 == I16 { 4921 let pattern3_0 = arg2; 4922 if let Some(()) = C::littleendian(ctx, pattern3_0) { 4923 let pattern5_0 = arg3; 4924 let pattern6_0 = arg4; 4925 // Rule at src/isa/s390x/inst.isle line 2460. 4926 let expr0_0: Type = I32; 4927 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4928 let expr2_0: u8 = 16; 4929 let expr3_0 = constructor_push_rot_imm_reg( 4930 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4931 )?; 4932 return Some(expr3_0); 4933 } 4934 if let Some(()) = C::bigendian(ctx, pattern3_0) { 4935 let pattern5_0 = arg3; 4936 let pattern6_0 = arg4; 4937 // Rule at src/isa/s390x/inst.isle line 2458. 4938 let expr0_0: Type = I32; 4939 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4940 let expr2_0: u8 = 0; 4941 let expr3_0 = constructor_push_rot_imm_reg( 4942 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4943 )?; 4944 return Some(expr3_0); 4945 } 4946 } 4947 return None; 4948 } 4949 4950 // Generated as internal constructor for term casloop_rotate_out. 4951 pub fn constructor_casloop_rotate_out<C: Context>( 4952 ctx: &mut C, 4953 arg0: &VecMInstBuilder, 4954 arg1: Type, 4955 arg2: MemFlags, 4956 arg3: Reg, 4957 arg4: Reg, 4958 ) -> Option<Reg> { 4959 let pattern0_0 = arg0; 4960 let pattern1_0 = arg1; 4961 if pattern1_0 == I8 { 4962 let pattern3_0 = arg2; 4963 let pattern4_0 = arg3; 4964 let pattern5_0 = arg4; 4965 // Rule at src/isa/s390x/inst.isle line 2469. 4966 let expr0_0: Type = I32; 4967 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4968 let expr2_0: u8 = 0; 4969 let expr3_0: Type = I32; 4970 let expr4_0 = constructor_neg_reg(ctx, expr3_0, pattern4_0)?; 4971 let expr5_0 = constructor_push_rot_imm_reg( 4972 ctx, pattern0_0, expr0_0, expr1_0, pattern5_0, expr2_0, expr4_0, 4973 )?; 4974 return Some(expr5_0); 4975 } 4976 if pattern1_0 == I16 { 4977 let pattern3_0 = arg2; 4978 if let Some(()) = C::littleendian(ctx, pattern3_0) { 4979 let pattern5_0 = arg3; 4980 let pattern6_0 = arg4; 4981 // Rule at src/isa/s390x/inst.isle line 2473. 4982 let expr0_0: Type = I32; 4983 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4984 let expr2_0: u8 = 16; 4985 let expr3_0 = constructor_push_rot_imm_reg( 4986 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4987 )?; 4988 return Some(expr3_0); 4989 } 4990 if let Some(()) = C::bigendian(ctx, pattern3_0) { 4991 let pattern5_0 = arg3; 4992 let pattern6_0 = arg4; 4993 // Rule at src/isa/s390x/inst.isle line 2471. 4994 let expr0_0: Type = I32; 4995 let expr1_0 = constructor_casloop_tmp_reg(ctx)?; 4996 let expr2_0: u8 = 0; 4997 let expr3_0 = constructor_push_rot_imm_reg( 4998 ctx, pattern0_0, expr0_0, expr1_0, pattern6_0, expr2_0, pattern5_0, 4999 )?; 5000 return Some(expr3_0); 5001 } 5002 } 5003 return None; 5004 } 5005 5006 // Generated as internal constructor for term casloop_rotate_result. 5007 pub fn constructor_casloop_rotate_result<C: Context>( 5008 ctx: &mut C, 5009 arg0: Type, 5010 arg1: MemFlags, 5011 arg2: Reg, 5012 arg3: Reg, 5013 ) -> Option<Reg> { 5014 let pattern0_0 = arg0; 5015 if pattern0_0 == I8 { 5016 let pattern2_0 = arg1; 5017 let pattern3_0 = arg2; 5018 let pattern4_0 = arg3; 5019 // Rule at src/isa/s390x/inst.isle line 2484. 5020 let expr0_0: Type = I32; 5021 let expr1_0: u8 = 8; 5022 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern4_0, expr1_0, pattern3_0)?; 5023 return Some(expr2_0); 5024 } 5025 if pattern0_0 == I16 { 5026 let pattern2_0 = arg1; 5027 if let Some(()) = C::littleendian(ctx, pattern2_0) { 5028 let pattern4_0 = arg2; 5029 let pattern5_0 = arg3; 5030 // Rule at src/isa/s390x/inst.isle line 2488. 5031 let expr0_0: Type = I32; 5032 let expr1_0: Type = I32; 5033 let expr2_0 = constructor_rot_reg(ctx, expr1_0, pattern5_0, pattern4_0)?; 5034 let expr3_0 = constructor_bswap_reg(ctx, expr0_0, expr2_0)?; 5035 return Some(expr3_0); 5036 } 5037 if let Some(()) = C::bigendian(ctx, pattern2_0) { 5038 let pattern4_0 = arg2; 5039 let pattern5_0 = arg3; 5040 // Rule at src/isa/s390x/inst.isle line 2486. 5041 let expr0_0: Type = I32; 5042 let expr1_0: u8 = 16; 5043 let expr2_0 = constructor_rot_imm_reg(ctx, expr0_0, pattern5_0, expr1_0, pattern4_0)?; 5044 return Some(expr2_0); 5045 } 5046 } 5047 return None; 5048 } 5049 5050 // Generated as internal constructor for term casloop_subword. 5051 pub fn constructor_casloop_subword<C: Context>( 5052 ctx: &mut C, 5053 arg0: &VecMInstBuilder, 5054 arg1: Type, 5055 arg2: MemFlags, 5056 arg3: Reg, 5057 arg4: Reg, 5058 arg5: Reg, 5059 ) -> Option<Reg> { 5060 let pattern0_0 = arg0; 5061 let pattern1_0 = arg1; 5062 let pattern2_0 = arg2; 5063 let pattern3_0 = arg3; 5064 let pattern4_0 = arg4; 5065 let pattern5_0 = arg5; 5066 // Rule at src/isa/s390x/inst.isle line 2493. 5067 let expr0_0 = constructor_casloop_emit( 5068 ctx, pattern0_0, pattern1_0, pattern2_0, pattern3_0, pattern5_0, 5069 )?; 5070 let expr1_0 = 5071 constructor_casloop_rotate_result(ctx, pattern1_0, pattern2_0, pattern4_0, expr0_0)?; 5072 return Some(expr1_0); 5073 } 5074 5075 // Generated as internal constructor for term clz_reg. 5076 pub fn constructor_clz_reg<C: Context>(ctx: &mut C, arg0: i16, arg1: Reg) -> Option<RegPair> { 5077 let pattern0_0 = arg0; 5078 if pattern0_0 == 64 { 5079 let pattern2_0 = arg1; 5080 // Rule at src/isa/s390x/inst.isle line 2504. 5081 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5082 let expr1_0 = MInst::Flogr { rn: pattern2_0 }; 5083 let expr2_0 = C::emit(ctx, &expr1_0); 5084 let expr3_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5085 return Some(expr3_0); 5086 } 5087 let pattern1_0 = arg1; 5088 // Rule at src/isa/s390x/inst.isle line 2513. 5089 let expr0_0 = constructor_temp_writable_regpair(ctx)?; 5090 let expr1_0 = MInst::Flogr { rn: pattern1_0 }; 5091 let expr2_0 = C::emit(ctx, &expr1_0); 5092 let expr3_0 = constructor_writable_regpair_hi(ctx, &expr0_0)?; 5093 let expr4_0 = IntCC::Equal; 5094 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 5095 let expr6_0 = MInst::CMov64SImm16 { 5096 rd: expr3_0, 5097 cond: expr5_0, 5098 imm: pattern0_0, 5099 }; 5100 let expr7_0 = C::emit(ctx, &expr6_0); 5101 let expr8_0 = constructor_writable_regpair_to_regpair(ctx, &expr0_0)?; 5102 return Some(expr8_0); 5103 } 5104 5105 // Generated as internal constructor for term aluop_add. 5106 pub fn constructor_aluop_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5107 let pattern0_0 = arg0; 5108 if pattern0_0 == I8 { 5109 // Rule at src/isa/s390x/inst.isle line 2524. 5110 let expr0_0 = ALUOp::Add32; 5111 return Some(expr0_0); 5112 } 5113 if pattern0_0 == I16 { 5114 // Rule at src/isa/s390x/inst.isle line 2525. 5115 let expr0_0 = ALUOp::Add32; 5116 return Some(expr0_0); 5117 } 5118 if pattern0_0 == I32 { 5119 // Rule at src/isa/s390x/inst.isle line 2526. 5120 let expr0_0 = ALUOp::Add32; 5121 return Some(expr0_0); 5122 } 5123 if pattern0_0 == I64 { 5124 // Rule at src/isa/s390x/inst.isle line 2527. 5125 let expr0_0 = ALUOp::Add64; 5126 return Some(expr0_0); 5127 } 5128 return None; 5129 } 5130 5131 // Generated as internal constructor for term aluop_add_sext16. 5132 pub fn constructor_aluop_add_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5133 let pattern0_0 = arg0; 5134 if pattern0_0 == I16 { 5135 // Rule at src/isa/s390x/inst.isle line 2530. 5136 let expr0_0 = ALUOp::Add32Ext16; 5137 return Some(expr0_0); 5138 } 5139 if pattern0_0 == I32 { 5140 // Rule at src/isa/s390x/inst.isle line 2531. 5141 let expr0_0 = ALUOp::Add32Ext16; 5142 return Some(expr0_0); 5143 } 5144 if pattern0_0 == I64 { 5145 // Rule at src/isa/s390x/inst.isle line 2532. 5146 let expr0_0 = ALUOp::Add64Ext16; 5147 return Some(expr0_0); 5148 } 5149 return None; 5150 } 5151 5152 // Generated as internal constructor for term aluop_add_sext32. 5153 pub fn constructor_aluop_add_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5154 let pattern0_0 = arg0; 5155 if pattern0_0 == I64 { 5156 // Rule at src/isa/s390x/inst.isle line 2535. 5157 let expr0_0 = ALUOp::Add64Ext32; 5158 return Some(expr0_0); 5159 } 5160 return None; 5161 } 5162 5163 // Generated as internal constructor for term add_reg. 5164 pub fn constructor_add_reg<C: Context>( 5165 ctx: &mut C, 5166 arg0: Type, 5167 arg1: Reg, 5168 arg2: Reg, 5169 ) -> Option<Reg> { 5170 let pattern0_0 = arg0; 5171 let pattern1_0 = arg1; 5172 let pattern2_0 = arg2; 5173 // Rule at src/isa/s390x/inst.isle line 2538. 5174 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5175 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5176 return Some(expr1_0); 5177 } 5178 5179 // Generated as internal constructor for term add_reg_sext32. 5180 pub fn constructor_add_reg_sext32<C: Context>( 5181 ctx: &mut C, 5182 arg0: Type, 5183 arg1: Reg, 5184 arg2: Reg, 5185 ) -> Option<Reg> { 5186 let pattern0_0 = arg0; 5187 let pattern1_0 = arg1; 5188 let pattern2_0 = arg2; 5189 // Rule at src/isa/s390x/inst.isle line 2541. 5190 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5191 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5192 return Some(expr1_0); 5193 } 5194 5195 // Generated as internal constructor for term add_simm16. 5196 pub fn constructor_add_simm16<C: Context>( 5197 ctx: &mut C, 5198 arg0: Type, 5199 arg1: Reg, 5200 arg2: i16, 5201 ) -> Option<Reg> { 5202 let pattern0_0 = arg0; 5203 let pattern1_0 = arg1; 5204 let pattern2_0 = arg2; 5205 // Rule at src/isa/s390x/inst.isle line 2544. 5206 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5207 let expr1_0 = constructor_alu_rrsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5208 return Some(expr1_0); 5209 } 5210 5211 // Generated as internal constructor for term add_simm32. 5212 pub fn constructor_add_simm32<C: Context>( 5213 ctx: &mut C, 5214 arg0: Type, 5215 arg1: Reg, 5216 arg2: i32, 5217 ) -> Option<Reg> { 5218 let pattern0_0 = arg0; 5219 let pattern1_0 = arg1; 5220 let pattern2_0 = arg2; 5221 // Rule at src/isa/s390x/inst.isle line 2547. 5222 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5223 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5224 return Some(expr1_0); 5225 } 5226 5227 // Generated as internal constructor for term add_mem. 5228 pub fn constructor_add_mem<C: Context>( 5229 ctx: &mut C, 5230 arg0: Type, 5231 arg1: Reg, 5232 arg2: &MemArg, 5233 ) -> Option<Reg> { 5234 let pattern0_0 = arg0; 5235 let pattern1_0 = arg1; 5236 let pattern2_0 = arg2; 5237 // Rule at src/isa/s390x/inst.isle line 2550. 5238 let expr0_0 = constructor_aluop_add(ctx, pattern0_0)?; 5239 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5240 return Some(expr1_0); 5241 } 5242 5243 // Generated as internal constructor for term add_mem_sext16. 5244 pub fn constructor_add_mem_sext16<C: Context>( 5245 ctx: &mut C, 5246 arg0: Type, 5247 arg1: Reg, 5248 arg2: &MemArg, 5249 ) -> Option<Reg> { 5250 let pattern0_0 = arg0; 5251 let pattern1_0 = arg1; 5252 let pattern2_0 = arg2; 5253 // Rule at src/isa/s390x/inst.isle line 2553. 5254 let expr0_0 = constructor_aluop_add_sext16(ctx, pattern0_0)?; 5255 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5256 return Some(expr1_0); 5257 } 5258 5259 // Generated as internal constructor for term add_mem_sext32. 5260 pub fn constructor_add_mem_sext32<C: Context>( 5261 ctx: &mut C, 5262 arg0: Type, 5263 arg1: Reg, 5264 arg2: &MemArg, 5265 ) -> Option<Reg> { 5266 let pattern0_0 = arg0; 5267 let pattern1_0 = arg1; 5268 let pattern2_0 = arg2; 5269 // Rule at src/isa/s390x/inst.isle line 2556. 5270 let expr0_0 = constructor_aluop_add_sext32(ctx, pattern0_0)?; 5271 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5272 return Some(expr1_0); 5273 } 5274 5275 // Generated as internal constructor for term aluop_add_logical. 5276 pub fn constructor_aluop_add_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5277 let pattern0_0 = arg0; 5278 if pattern0_0 == I32 { 5279 // Rule at src/isa/s390x/inst.isle line 2562. 5280 let expr0_0 = ALUOp::AddLogical32; 5281 return Some(expr0_0); 5282 } 5283 if pattern0_0 == I64 { 5284 // Rule at src/isa/s390x/inst.isle line 2563. 5285 let expr0_0 = ALUOp::AddLogical64; 5286 return Some(expr0_0); 5287 } 5288 return None; 5289 } 5290 5291 // Generated as internal constructor for term aluop_add_logical_zext32. 5292 pub fn constructor_aluop_add_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5293 let pattern0_0 = arg0; 5294 if pattern0_0 == I64 { 5295 // Rule at src/isa/s390x/inst.isle line 2566. 5296 let expr0_0 = ALUOp::AddLogical64Ext32; 5297 return Some(expr0_0); 5298 } 5299 return None; 5300 } 5301 5302 // Generated as internal constructor for term add_logical_reg. 5303 pub fn constructor_add_logical_reg<C: Context>( 5304 ctx: &mut C, 5305 arg0: Type, 5306 arg1: Reg, 5307 arg2: Reg, 5308 ) -> Option<Reg> { 5309 let pattern0_0 = arg0; 5310 let pattern1_0 = arg1; 5311 let pattern2_0 = arg2; 5312 // Rule at src/isa/s390x/inst.isle line 2569. 5313 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5314 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5315 return Some(expr1_0); 5316 } 5317 5318 // Generated as internal constructor for term add_logical_reg_zext32. 5319 pub fn constructor_add_logical_reg_zext32<C: Context>( 5320 ctx: &mut C, 5321 arg0: Type, 5322 arg1: Reg, 5323 arg2: Reg, 5324 ) -> Option<Reg> { 5325 let pattern0_0 = arg0; 5326 let pattern1_0 = arg1; 5327 let pattern2_0 = arg2; 5328 // Rule at src/isa/s390x/inst.isle line 2572. 5329 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5330 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5331 return Some(expr1_0); 5332 } 5333 5334 // Generated as internal constructor for term add_logical_zimm32. 5335 pub fn constructor_add_logical_zimm32<C: Context>( 5336 ctx: &mut C, 5337 arg0: Type, 5338 arg1: Reg, 5339 arg2: u32, 5340 ) -> Option<Reg> { 5341 let pattern0_0 = arg0; 5342 let pattern1_0 = arg1; 5343 let pattern2_0 = arg2; 5344 // Rule at src/isa/s390x/inst.isle line 2575. 5345 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5346 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5347 return Some(expr1_0); 5348 } 5349 5350 // Generated as internal constructor for term add_logical_mem. 5351 pub fn constructor_add_logical_mem<C: Context>( 5352 ctx: &mut C, 5353 arg0: Type, 5354 arg1: Reg, 5355 arg2: &MemArg, 5356 ) -> Option<Reg> { 5357 let pattern0_0 = arg0; 5358 let pattern1_0 = arg1; 5359 let pattern2_0 = arg2; 5360 // Rule at src/isa/s390x/inst.isle line 2578. 5361 let expr0_0 = constructor_aluop_add_logical(ctx, pattern0_0)?; 5362 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5363 return Some(expr1_0); 5364 } 5365 5366 // Generated as internal constructor for term add_logical_mem_zext32. 5367 pub fn constructor_add_logical_mem_zext32<C: Context>( 5368 ctx: &mut C, 5369 arg0: Type, 5370 arg1: Reg, 5371 arg2: &MemArg, 5372 ) -> Option<Reg> { 5373 let pattern0_0 = arg0; 5374 let pattern1_0 = arg1; 5375 let pattern2_0 = arg2; 5376 // Rule at src/isa/s390x/inst.isle line 2581. 5377 let expr0_0 = constructor_aluop_add_logical_zext32(ctx, pattern0_0)?; 5378 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5379 return Some(expr1_0); 5380 } 5381 5382 // Generated as internal constructor for term aluop_sub. 5383 pub fn constructor_aluop_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5384 let pattern0_0 = arg0; 5385 if pattern0_0 == I8 { 5386 // Rule at src/isa/s390x/inst.isle line 2587. 5387 let expr0_0 = ALUOp::Sub32; 5388 return Some(expr0_0); 5389 } 5390 if pattern0_0 == I16 { 5391 // Rule at src/isa/s390x/inst.isle line 2588. 5392 let expr0_0 = ALUOp::Sub32; 5393 return Some(expr0_0); 5394 } 5395 if pattern0_0 == I32 { 5396 // Rule at src/isa/s390x/inst.isle line 2589. 5397 let expr0_0 = ALUOp::Sub32; 5398 return Some(expr0_0); 5399 } 5400 if pattern0_0 == I64 { 5401 // Rule at src/isa/s390x/inst.isle line 2590. 5402 let expr0_0 = ALUOp::Sub64; 5403 return Some(expr0_0); 5404 } 5405 return None; 5406 } 5407 5408 // Generated as internal constructor for term aluop_sub_sext16. 5409 pub fn constructor_aluop_sub_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5410 let pattern0_0 = arg0; 5411 if pattern0_0 == I16 { 5412 // Rule at src/isa/s390x/inst.isle line 2593. 5413 let expr0_0 = ALUOp::Sub32Ext16; 5414 return Some(expr0_0); 5415 } 5416 if pattern0_0 == I32 { 5417 // Rule at src/isa/s390x/inst.isle line 2594. 5418 let expr0_0 = ALUOp::Sub32Ext16; 5419 return Some(expr0_0); 5420 } 5421 if pattern0_0 == I64 { 5422 // Rule at src/isa/s390x/inst.isle line 2595. 5423 let expr0_0 = ALUOp::Sub64Ext16; 5424 return Some(expr0_0); 5425 } 5426 return None; 5427 } 5428 5429 // Generated as internal constructor for term aluop_sub_sext32. 5430 pub fn constructor_aluop_sub_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5431 let pattern0_0 = arg0; 5432 if pattern0_0 == I64 { 5433 // Rule at src/isa/s390x/inst.isle line 2598. 5434 let expr0_0 = ALUOp::Sub64Ext32; 5435 return Some(expr0_0); 5436 } 5437 return None; 5438 } 5439 5440 // Generated as internal constructor for term sub_reg. 5441 pub fn constructor_sub_reg<C: Context>( 5442 ctx: &mut C, 5443 arg0: Type, 5444 arg1: Reg, 5445 arg2: Reg, 5446 ) -> Option<Reg> { 5447 let pattern0_0 = arg0; 5448 let pattern1_0 = arg1; 5449 let pattern2_0 = arg2; 5450 // Rule at src/isa/s390x/inst.isle line 2601. 5451 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5452 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5453 return Some(expr1_0); 5454 } 5455 5456 // Generated as internal constructor for term sub_reg_sext32. 5457 pub fn constructor_sub_reg_sext32<C: Context>( 5458 ctx: &mut C, 5459 arg0: Type, 5460 arg1: Reg, 5461 arg2: Reg, 5462 ) -> Option<Reg> { 5463 let pattern0_0 = arg0; 5464 let pattern1_0 = arg1; 5465 let pattern2_0 = arg2; 5466 // Rule at src/isa/s390x/inst.isle line 2604. 5467 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5468 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5469 return Some(expr1_0); 5470 } 5471 5472 // Generated as internal constructor for term sub_mem. 5473 pub fn constructor_sub_mem<C: Context>( 5474 ctx: &mut C, 5475 arg0: Type, 5476 arg1: Reg, 5477 arg2: &MemArg, 5478 ) -> Option<Reg> { 5479 let pattern0_0 = arg0; 5480 let pattern1_0 = arg1; 5481 let pattern2_0 = arg2; 5482 // Rule at src/isa/s390x/inst.isle line 2607. 5483 let expr0_0 = constructor_aluop_sub(ctx, pattern0_0)?; 5484 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5485 return Some(expr1_0); 5486 } 5487 5488 // Generated as internal constructor for term sub_mem_sext16. 5489 pub fn constructor_sub_mem_sext16<C: Context>( 5490 ctx: &mut C, 5491 arg0: Type, 5492 arg1: Reg, 5493 arg2: &MemArg, 5494 ) -> Option<Reg> { 5495 let pattern0_0 = arg0; 5496 let pattern1_0 = arg1; 5497 let pattern2_0 = arg2; 5498 // Rule at src/isa/s390x/inst.isle line 2610. 5499 let expr0_0 = constructor_aluop_sub_sext16(ctx, pattern0_0)?; 5500 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5501 return Some(expr1_0); 5502 } 5503 5504 // Generated as internal constructor for term sub_mem_sext32. 5505 pub fn constructor_sub_mem_sext32<C: Context>( 5506 ctx: &mut C, 5507 arg0: Type, 5508 arg1: Reg, 5509 arg2: &MemArg, 5510 ) -> Option<Reg> { 5511 let pattern0_0 = arg0; 5512 let pattern1_0 = arg1; 5513 let pattern2_0 = arg2; 5514 // Rule at src/isa/s390x/inst.isle line 2613. 5515 let expr0_0 = constructor_aluop_sub_sext32(ctx, pattern0_0)?; 5516 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5517 return Some(expr1_0); 5518 } 5519 5520 // Generated as internal constructor for term aluop_sub_logical. 5521 pub fn constructor_aluop_sub_logical<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5522 let pattern0_0 = arg0; 5523 if pattern0_0 == I32 { 5524 // Rule at src/isa/s390x/inst.isle line 2619. 5525 let expr0_0 = ALUOp::SubLogical32; 5526 return Some(expr0_0); 5527 } 5528 if pattern0_0 == I64 { 5529 // Rule at src/isa/s390x/inst.isle line 2620. 5530 let expr0_0 = ALUOp::SubLogical64; 5531 return Some(expr0_0); 5532 } 5533 return None; 5534 } 5535 5536 // Generated as internal constructor for term aluop_sub_logical_zext32. 5537 pub fn constructor_aluop_sub_logical_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5538 let pattern0_0 = arg0; 5539 if pattern0_0 == I64 { 5540 // Rule at src/isa/s390x/inst.isle line 2623. 5541 let expr0_0 = ALUOp::SubLogical64Ext32; 5542 return Some(expr0_0); 5543 } 5544 return None; 5545 } 5546 5547 // Generated as internal constructor for term sub_logical_reg. 5548 pub fn constructor_sub_logical_reg<C: Context>( 5549 ctx: &mut C, 5550 arg0: Type, 5551 arg1: Reg, 5552 arg2: Reg, 5553 ) -> Option<Reg> { 5554 let pattern0_0 = arg0; 5555 let pattern1_0 = arg1; 5556 let pattern2_0 = arg2; 5557 // Rule at src/isa/s390x/inst.isle line 2626. 5558 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5559 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5560 return Some(expr1_0); 5561 } 5562 5563 // Generated as internal constructor for term sub_logical_reg_zext32. 5564 pub fn constructor_sub_logical_reg_zext32<C: Context>( 5565 ctx: &mut C, 5566 arg0: Type, 5567 arg1: Reg, 5568 arg2: Reg, 5569 ) -> Option<Reg> { 5570 let pattern0_0 = arg0; 5571 let pattern1_0 = arg1; 5572 let pattern2_0 = arg2; 5573 // Rule at src/isa/s390x/inst.isle line 2629. 5574 let expr0_0 = constructor_aluop_sub_logical_zext32(ctx, pattern0_0)?; 5575 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5576 return Some(expr1_0); 5577 } 5578 5579 // Generated as internal constructor for term sub_logical_zimm32. 5580 pub fn constructor_sub_logical_zimm32<C: Context>( 5581 ctx: &mut C, 5582 arg0: Type, 5583 arg1: Reg, 5584 arg2: u32, 5585 ) -> Option<Reg> { 5586 let pattern0_0 = arg0; 5587 let pattern1_0 = arg1; 5588 let pattern2_0 = arg2; 5589 // Rule at src/isa/s390x/inst.isle line 2632. 5590 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5591 let expr1_0 = constructor_alu_ruimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5592 return Some(expr1_0); 5593 } 5594 5595 // Generated as internal constructor for term sub_logical_mem. 5596 pub fn constructor_sub_logical_mem<C: Context>( 5597 ctx: &mut C, 5598 arg0: Type, 5599 arg1: Reg, 5600 arg2: &MemArg, 5601 ) -> Option<Reg> { 5602 let pattern0_0 = arg0; 5603 let pattern1_0 = arg1; 5604 let pattern2_0 = arg2; 5605 // Rule at src/isa/s390x/inst.isle line 2635. 5606 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5607 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5608 return Some(expr1_0); 5609 } 5610 5611 // Generated as internal constructor for term sub_logical_mem_zext32. 5612 pub fn constructor_sub_logical_mem_zext32<C: Context>( 5613 ctx: &mut C, 5614 arg0: Type, 5615 arg1: Reg, 5616 arg2: &MemArg, 5617 ) -> Option<Reg> { 5618 let pattern0_0 = arg0; 5619 let pattern1_0 = arg1; 5620 let pattern2_0 = arg2; 5621 // Rule at src/isa/s390x/inst.isle line 2638. 5622 let expr0_0 = constructor_aluop_sub_logical(ctx, pattern0_0)?; 5623 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5624 return Some(expr1_0); 5625 } 5626 5627 // Generated as internal constructor for term aluop_mul. 5628 pub fn constructor_aluop_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5629 let pattern0_0 = arg0; 5630 if pattern0_0 == I8 { 5631 // Rule at src/isa/s390x/inst.isle line 2644. 5632 let expr0_0 = ALUOp::Mul32; 5633 return Some(expr0_0); 5634 } 5635 if pattern0_0 == I16 { 5636 // Rule at src/isa/s390x/inst.isle line 2645. 5637 let expr0_0 = ALUOp::Mul32; 5638 return Some(expr0_0); 5639 } 5640 if pattern0_0 == I32 { 5641 // Rule at src/isa/s390x/inst.isle line 2646. 5642 let expr0_0 = ALUOp::Mul32; 5643 return Some(expr0_0); 5644 } 5645 if pattern0_0 == I64 { 5646 // Rule at src/isa/s390x/inst.isle line 2647. 5647 let expr0_0 = ALUOp::Mul64; 5648 return Some(expr0_0); 5649 } 5650 return None; 5651 } 5652 5653 // Generated as internal constructor for term aluop_mul_sext16. 5654 pub fn constructor_aluop_mul_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5655 let pattern0_0 = arg0; 5656 if pattern0_0 == I16 { 5657 // Rule at src/isa/s390x/inst.isle line 2650. 5658 let expr0_0 = ALUOp::Mul32Ext16; 5659 return Some(expr0_0); 5660 } 5661 if pattern0_0 == I32 { 5662 // Rule at src/isa/s390x/inst.isle line 2651. 5663 let expr0_0 = ALUOp::Mul32Ext16; 5664 return Some(expr0_0); 5665 } 5666 if pattern0_0 == I64 { 5667 // Rule at src/isa/s390x/inst.isle line 2652. 5668 let expr0_0 = ALUOp::Mul64Ext16; 5669 return Some(expr0_0); 5670 } 5671 return None; 5672 } 5673 5674 // Generated as internal constructor for term aluop_mul_sext32. 5675 pub fn constructor_aluop_mul_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5676 let pattern0_0 = arg0; 5677 if pattern0_0 == I64 { 5678 // Rule at src/isa/s390x/inst.isle line 2655. 5679 let expr0_0 = ALUOp::Mul64Ext32; 5680 return Some(expr0_0); 5681 } 5682 return None; 5683 } 5684 5685 // Generated as internal constructor for term mul_reg. 5686 pub fn constructor_mul_reg<C: Context>( 5687 ctx: &mut C, 5688 arg0: Type, 5689 arg1: Reg, 5690 arg2: Reg, 5691 ) -> Option<Reg> { 5692 let pattern0_0 = arg0; 5693 let pattern1_0 = arg1; 5694 let pattern2_0 = arg2; 5695 // Rule at src/isa/s390x/inst.isle line 2658. 5696 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5697 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5698 return Some(expr1_0); 5699 } 5700 5701 // Generated as internal constructor for term mul_reg_sext32. 5702 pub fn constructor_mul_reg_sext32<C: Context>( 5703 ctx: &mut C, 5704 arg0: Type, 5705 arg1: Reg, 5706 arg2: Reg, 5707 ) -> Option<Reg> { 5708 let pattern0_0 = arg0; 5709 let pattern1_0 = arg1; 5710 let pattern2_0 = arg2; 5711 // Rule at src/isa/s390x/inst.isle line 2661. 5712 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5713 let expr1_0 = constructor_alu_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5714 return Some(expr1_0); 5715 } 5716 5717 // Generated as internal constructor for term mul_simm16. 5718 pub fn constructor_mul_simm16<C: Context>( 5719 ctx: &mut C, 5720 arg0: Type, 5721 arg1: Reg, 5722 arg2: i16, 5723 ) -> Option<Reg> { 5724 let pattern0_0 = arg0; 5725 let pattern1_0 = arg1; 5726 let pattern2_0 = arg2; 5727 // Rule at src/isa/s390x/inst.isle line 2664. 5728 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5729 let expr1_0 = constructor_alu_rsimm16(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5730 return Some(expr1_0); 5731 } 5732 5733 // Generated as internal constructor for term mul_simm32. 5734 pub fn constructor_mul_simm32<C: Context>( 5735 ctx: &mut C, 5736 arg0: Type, 5737 arg1: Reg, 5738 arg2: i32, 5739 ) -> Option<Reg> { 5740 let pattern0_0 = arg0; 5741 let pattern1_0 = arg1; 5742 let pattern2_0 = arg2; 5743 // Rule at src/isa/s390x/inst.isle line 2667. 5744 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5745 let expr1_0 = constructor_alu_rsimm32(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5746 return Some(expr1_0); 5747 } 5748 5749 // Generated as internal constructor for term mul_mem. 5750 pub fn constructor_mul_mem<C: Context>( 5751 ctx: &mut C, 5752 arg0: Type, 5753 arg1: Reg, 5754 arg2: &MemArg, 5755 ) -> Option<Reg> { 5756 let pattern0_0 = arg0; 5757 let pattern1_0 = arg1; 5758 let pattern2_0 = arg2; 5759 // Rule at src/isa/s390x/inst.isle line 2670. 5760 let expr0_0 = constructor_aluop_mul(ctx, pattern0_0)?; 5761 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5762 return Some(expr1_0); 5763 } 5764 5765 // Generated as internal constructor for term mul_mem_sext16. 5766 pub fn constructor_mul_mem_sext16<C: Context>( 5767 ctx: &mut C, 5768 arg0: Type, 5769 arg1: Reg, 5770 arg2: &MemArg, 5771 ) -> Option<Reg> { 5772 let pattern0_0 = arg0; 5773 let pattern1_0 = arg1; 5774 let pattern2_0 = arg2; 5775 // Rule at src/isa/s390x/inst.isle line 2673. 5776 let expr0_0 = constructor_aluop_mul_sext16(ctx, pattern0_0)?; 5777 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5778 return Some(expr1_0); 5779 } 5780 5781 // Generated as internal constructor for term mul_mem_sext32. 5782 pub fn constructor_mul_mem_sext32<C: Context>( 5783 ctx: &mut C, 5784 arg0: Type, 5785 arg1: Reg, 5786 arg2: &MemArg, 5787 ) -> Option<Reg> { 5788 let pattern0_0 = arg0; 5789 let pattern1_0 = arg1; 5790 let pattern2_0 = arg2; 5791 // Rule at src/isa/s390x/inst.isle line 2676. 5792 let expr0_0 = constructor_aluop_mul_sext32(ctx, pattern0_0)?; 5793 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5794 return Some(expr1_0); 5795 } 5796 5797 // Generated as internal constructor for term udivmod. 5798 pub fn constructor_udivmod<C: Context>( 5799 ctx: &mut C, 5800 arg0: Type, 5801 arg1: &RegPair, 5802 arg2: Reg, 5803 ) -> Option<RegPair> { 5804 let pattern0_0 = arg0; 5805 if pattern0_0 == I32 { 5806 let pattern2_0 = arg1; 5807 let pattern3_0 = arg2; 5808 // Rule at src/isa/s390x/inst.isle line 2682. 5809 let expr0_0 = constructor_udivmod32(ctx, pattern2_0, pattern3_0)?; 5810 return Some(expr0_0); 5811 } 5812 if pattern0_0 == I64 { 5813 let pattern2_0 = arg1; 5814 let pattern3_0 = arg2; 5815 // Rule at src/isa/s390x/inst.isle line 2683. 5816 let expr0_0 = constructor_udivmod64(ctx, pattern2_0, pattern3_0)?; 5817 return Some(expr0_0); 5818 } 5819 return None; 5820 } 5821 5822 // Generated as internal constructor for term sdivmod. 5823 pub fn constructor_sdivmod<C: Context>( 5824 ctx: &mut C, 5825 arg0: Type, 5826 arg1: &RegPair, 5827 arg2: Reg, 5828 ) -> Option<RegPair> { 5829 let pattern0_0 = arg0; 5830 if pattern0_0 == I32 { 5831 let pattern2_0 = arg1; 5832 let pattern3_0 = arg2; 5833 // Rule at src/isa/s390x/inst.isle line 2689. 5834 let expr0_0 = constructor_sdivmod32(ctx, pattern2_0, pattern3_0)?; 5835 return Some(expr0_0); 5836 } 5837 if pattern0_0 == I64 { 5838 let pattern2_0 = arg1; 5839 let pattern3_0 = arg2; 5840 // Rule at src/isa/s390x/inst.isle line 2690. 5841 let expr0_0 = constructor_sdivmod64(ctx, pattern2_0, pattern3_0)?; 5842 return Some(expr0_0); 5843 } 5844 return None; 5845 } 5846 5847 // Generated as internal constructor for term aluop_and. 5848 pub fn constructor_aluop_and<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5849 let pattern0_0 = arg0; 5850 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5851 // Rule at src/isa/s390x/inst.isle line 2696. 5852 let expr0_0 = ALUOp::And32; 5853 return Some(expr0_0); 5854 } 5855 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5856 // Rule at src/isa/s390x/inst.isle line 2697. 5857 let expr0_0 = ALUOp::And64; 5858 return Some(expr0_0); 5859 } 5860 return None; 5861 } 5862 5863 // Generated as internal constructor for term and_reg. 5864 pub fn constructor_and_reg<C: Context>( 5865 ctx: &mut C, 5866 arg0: Type, 5867 arg1: Reg, 5868 arg2: Reg, 5869 ) -> Option<Reg> { 5870 let pattern0_0 = arg0; 5871 let pattern1_0 = arg1; 5872 let pattern2_0 = arg2; 5873 // Rule at src/isa/s390x/inst.isle line 2700. 5874 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5875 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5876 return Some(expr1_0); 5877 } 5878 5879 // Generated as internal constructor for term and_uimm16shifted. 5880 pub fn constructor_and_uimm16shifted<C: Context>( 5881 ctx: &mut C, 5882 arg0: Type, 5883 arg1: Reg, 5884 arg2: UImm16Shifted, 5885 ) -> Option<Reg> { 5886 let pattern0_0 = arg0; 5887 let pattern1_0 = arg1; 5888 let pattern2_0 = arg2; 5889 // Rule at src/isa/s390x/inst.isle line 2703. 5890 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5891 let expr1_0 = 5892 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5893 return Some(expr1_0); 5894 } 5895 5896 // Generated as internal constructor for term and_uimm32shifted. 5897 pub fn constructor_and_uimm32shifted<C: Context>( 5898 ctx: &mut C, 5899 arg0: Type, 5900 arg1: Reg, 5901 arg2: UImm32Shifted, 5902 ) -> Option<Reg> { 5903 let pattern0_0 = arg0; 5904 let pattern1_0 = arg1; 5905 let pattern2_0 = arg2; 5906 // Rule at src/isa/s390x/inst.isle line 2706. 5907 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5908 let expr1_0 = 5909 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5910 return Some(expr1_0); 5911 } 5912 5913 // Generated as internal constructor for term and_mem. 5914 pub fn constructor_and_mem<C: Context>( 5915 ctx: &mut C, 5916 arg0: Type, 5917 arg1: Reg, 5918 arg2: &MemArg, 5919 ) -> Option<Reg> { 5920 let pattern0_0 = arg0; 5921 let pattern1_0 = arg1; 5922 let pattern2_0 = arg2; 5923 // Rule at src/isa/s390x/inst.isle line 2709. 5924 let expr0_0 = constructor_aluop_and(ctx, pattern0_0)?; 5925 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5926 return Some(expr1_0); 5927 } 5928 5929 // Generated as internal constructor for term aluop_or. 5930 pub fn constructor_aluop_or<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 5931 let pattern0_0 = arg0; 5932 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 5933 // Rule at src/isa/s390x/inst.isle line 2715. 5934 let expr0_0 = ALUOp::Orr32; 5935 return Some(expr0_0); 5936 } 5937 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 5938 // Rule at src/isa/s390x/inst.isle line 2716. 5939 let expr0_0 = ALUOp::Orr64; 5940 return Some(expr0_0); 5941 } 5942 return None; 5943 } 5944 5945 // Generated as internal constructor for term or_reg. 5946 pub fn constructor_or_reg<C: Context>( 5947 ctx: &mut C, 5948 arg0: Type, 5949 arg1: Reg, 5950 arg2: Reg, 5951 ) -> Option<Reg> { 5952 let pattern0_0 = arg0; 5953 let pattern1_0 = arg1; 5954 let pattern2_0 = arg2; 5955 // Rule at src/isa/s390x/inst.isle line 2719. 5956 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5957 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5958 return Some(expr1_0); 5959 } 5960 5961 // Generated as internal constructor for term or_uimm16shifted. 5962 pub fn constructor_or_uimm16shifted<C: Context>( 5963 ctx: &mut C, 5964 arg0: Type, 5965 arg1: Reg, 5966 arg2: UImm16Shifted, 5967 ) -> Option<Reg> { 5968 let pattern0_0 = arg0; 5969 let pattern1_0 = arg1; 5970 let pattern2_0 = arg2; 5971 // Rule at src/isa/s390x/inst.isle line 2722. 5972 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5973 let expr1_0 = 5974 constructor_alu_ruimm16shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5975 return Some(expr1_0); 5976 } 5977 5978 // Generated as internal constructor for term or_uimm32shifted. 5979 pub fn constructor_or_uimm32shifted<C: Context>( 5980 ctx: &mut C, 5981 arg0: Type, 5982 arg1: Reg, 5983 arg2: UImm32Shifted, 5984 ) -> Option<Reg> { 5985 let pattern0_0 = arg0; 5986 let pattern1_0 = arg1; 5987 let pattern2_0 = arg2; 5988 // Rule at src/isa/s390x/inst.isle line 2725. 5989 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 5990 let expr1_0 = 5991 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 5992 return Some(expr1_0); 5993 } 5994 5995 // Generated as internal constructor for term or_mem. 5996 pub fn constructor_or_mem<C: Context>( 5997 ctx: &mut C, 5998 arg0: Type, 5999 arg1: Reg, 6000 arg2: &MemArg, 6001 ) -> Option<Reg> { 6002 let pattern0_0 = arg0; 6003 let pattern1_0 = arg1; 6004 let pattern2_0 = arg2; 6005 // Rule at src/isa/s390x/inst.isle line 2728. 6006 let expr0_0 = constructor_aluop_or(ctx, pattern0_0)?; 6007 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6008 return Some(expr1_0); 6009 } 6010 6011 // Generated as internal constructor for term aluop_xor. 6012 pub fn constructor_aluop_xor<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6013 let pattern0_0 = arg0; 6014 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6015 // Rule at src/isa/s390x/inst.isle line 2734. 6016 let expr0_0 = ALUOp::Xor32; 6017 return Some(expr0_0); 6018 } 6019 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6020 // Rule at src/isa/s390x/inst.isle line 2735. 6021 let expr0_0 = ALUOp::Xor64; 6022 return Some(expr0_0); 6023 } 6024 return None; 6025 } 6026 6027 // Generated as internal constructor for term xor_reg. 6028 pub fn constructor_xor_reg<C: Context>( 6029 ctx: &mut C, 6030 arg0: Type, 6031 arg1: Reg, 6032 arg2: Reg, 6033 ) -> Option<Reg> { 6034 let pattern0_0 = arg0; 6035 let pattern1_0 = arg1; 6036 let pattern2_0 = arg2; 6037 // Rule at src/isa/s390x/inst.isle line 2738. 6038 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6039 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6040 return Some(expr1_0); 6041 } 6042 6043 // Generated as internal constructor for term xor_uimm32shifted. 6044 pub fn constructor_xor_uimm32shifted<C: Context>( 6045 ctx: &mut C, 6046 arg0: Type, 6047 arg1: Reg, 6048 arg2: UImm32Shifted, 6049 ) -> Option<Reg> { 6050 let pattern0_0 = arg0; 6051 let pattern1_0 = arg1; 6052 let pattern2_0 = arg2; 6053 // Rule at src/isa/s390x/inst.isle line 2741. 6054 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6055 let expr1_0 = 6056 constructor_alu_ruimm32shifted(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6057 return Some(expr1_0); 6058 } 6059 6060 // Generated as internal constructor for term xor_mem. 6061 pub fn constructor_xor_mem<C: Context>( 6062 ctx: &mut C, 6063 arg0: Type, 6064 arg1: Reg, 6065 arg2: &MemArg, 6066 ) -> Option<Reg> { 6067 let pattern0_0 = arg0; 6068 let pattern1_0 = arg1; 6069 let pattern2_0 = arg2; 6070 // Rule at src/isa/s390x/inst.isle line 2744. 6071 let expr0_0 = constructor_aluop_xor(ctx, pattern0_0)?; 6072 let expr1_0 = constructor_alu_rx(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6073 return Some(expr1_0); 6074 } 6075 6076 // Generated as internal constructor for term push_xor_uimm32shifted. 6077 pub fn constructor_push_xor_uimm32shifted<C: Context>( 6078 ctx: &mut C, 6079 arg0: &VecMInstBuilder, 6080 arg1: Type, 6081 arg2: WritableReg, 6082 arg3: Reg, 6083 arg4: UImm32Shifted, 6084 ) -> Option<Reg> { 6085 let pattern0_0 = arg0; 6086 let pattern1_0 = arg1; 6087 let pattern2_0 = arg2; 6088 let pattern3_0 = arg3; 6089 let pattern4_0 = arg4; 6090 // Rule at src/isa/s390x/inst.isle line 2747. 6091 let expr0_0 = constructor_aluop_xor(ctx, pattern1_0)?; 6092 let expr1_0 = constructor_push_alu_uimm32shifted( 6093 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, 6094 )?; 6095 return Some(expr1_0); 6096 } 6097 6098 // Generated as internal constructor for term not_reg. 6099 pub fn constructor_not_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6100 let pattern0_0 = arg0; 6101 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6102 let pattern2_0 = arg1; 6103 // Rule at src/isa/s390x/inst.isle line 2753. 6104 let expr0_0: u32 = 4294967295; 6105 let expr1_0: u8 = 0; 6106 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6107 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6108 return Some(expr3_0); 6109 } 6110 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6111 let pattern2_0 = arg1; 6112 // Rule at src/isa/s390x/inst.isle line 2755. 6113 let expr0_0: u32 = 4294967295; 6114 let expr1_0: u8 = 0; 6115 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6116 let expr3_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, pattern2_0, expr2_0)?; 6117 let expr4_0: u32 = 4294967295; 6118 let expr5_0: u8 = 32; 6119 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6120 let expr7_0 = constructor_xor_uimm32shifted(ctx, pattern1_0, expr3_0, expr6_0)?; 6121 return Some(expr7_0); 6122 } 6123 return None; 6124 } 6125 6126 // Generated as internal constructor for term push_not_reg. 6127 pub fn constructor_push_not_reg<C: Context>( 6128 ctx: &mut C, 6129 arg0: &VecMInstBuilder, 6130 arg1: Type, 6131 arg2: WritableReg, 6132 arg3: Reg, 6133 ) -> Option<Reg> { 6134 let pattern0_0 = arg0; 6135 let pattern1_0 = arg1; 6136 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 6137 let pattern3_0 = arg2; 6138 let pattern4_0 = arg3; 6139 // Rule at src/isa/s390x/inst.isle line 2761. 6140 let expr0_0: u32 = 4294967295; 6141 let expr1_0: u8 = 0; 6142 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6143 let expr3_0 = constructor_push_xor_uimm32shifted( 6144 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6145 )?; 6146 return Some(expr3_0); 6147 } 6148 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 6149 let pattern3_0 = arg2; 6150 let pattern4_0 = arg3; 6151 // Rule at src/isa/s390x/inst.isle line 2763. 6152 let expr0_0: u32 = 4294967295; 6153 let expr1_0: u8 = 0; 6154 let expr2_0 = C::uimm32shifted(ctx, expr0_0, expr1_0); 6155 let expr3_0 = constructor_push_xor_uimm32shifted( 6156 ctx, pattern0_0, pattern2_0, pattern3_0, pattern4_0, expr2_0, 6157 )?; 6158 let expr4_0: u32 = 4294967295; 6159 let expr5_0: u8 = 32; 6160 let expr6_0 = C::uimm32shifted(ctx, expr4_0, expr5_0); 6161 let expr7_0 = constructor_push_xor_uimm32shifted( 6162 ctx, pattern0_0, pattern2_0, pattern3_0, expr3_0, expr6_0, 6163 )?; 6164 return Some(expr7_0); 6165 } 6166 return None; 6167 } 6168 6169 // Generated as internal constructor for term aluop_and_not. 6170 pub fn constructor_aluop_and_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6171 let pattern0_0 = arg0; 6172 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6173 // Rule at src/isa/s390x/inst.isle line 2771. 6174 let expr0_0 = ALUOp::AndNot32; 6175 return Some(expr0_0); 6176 } 6177 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6178 // Rule at src/isa/s390x/inst.isle line 2772. 6179 let expr0_0 = ALUOp::AndNot64; 6180 return Some(expr0_0); 6181 } 6182 return None; 6183 } 6184 6185 // Generated as internal constructor for term and_not_reg. 6186 pub fn constructor_and_not_reg<C: Context>( 6187 ctx: &mut C, 6188 arg0: Type, 6189 arg1: Reg, 6190 arg2: Reg, 6191 ) -> Option<Reg> { 6192 let pattern0_0 = arg0; 6193 let pattern1_0 = arg1; 6194 let pattern2_0 = arg2; 6195 // Rule at src/isa/s390x/inst.isle line 2775. 6196 let expr0_0 = constructor_aluop_and_not(ctx, pattern0_0)?; 6197 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6198 return Some(expr1_0); 6199 } 6200 6201 // Generated as internal constructor for term aluop_or_not. 6202 pub fn constructor_aluop_or_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6203 let pattern0_0 = arg0; 6204 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6205 // Rule at src/isa/s390x/inst.isle line 2781. 6206 let expr0_0 = ALUOp::OrrNot32; 6207 return Some(expr0_0); 6208 } 6209 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6210 // Rule at src/isa/s390x/inst.isle line 2782. 6211 let expr0_0 = ALUOp::OrrNot64; 6212 return Some(expr0_0); 6213 } 6214 return None; 6215 } 6216 6217 // Generated as internal constructor for term or_not_reg. 6218 pub fn constructor_or_not_reg<C: Context>( 6219 ctx: &mut C, 6220 arg0: Type, 6221 arg1: Reg, 6222 arg2: Reg, 6223 ) -> Option<Reg> { 6224 let pattern0_0 = arg0; 6225 let pattern1_0 = arg1; 6226 let pattern2_0 = arg2; 6227 // Rule at src/isa/s390x/inst.isle line 2785. 6228 let expr0_0 = constructor_aluop_or_not(ctx, pattern0_0)?; 6229 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6230 return Some(expr1_0); 6231 } 6232 6233 // Generated as internal constructor for term aluop_xor_not. 6234 pub fn constructor_aluop_xor_not<C: Context>(ctx: &mut C, arg0: Type) -> Option<ALUOp> { 6235 let pattern0_0 = arg0; 6236 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 6237 // Rule at src/isa/s390x/inst.isle line 2791. 6238 let expr0_0 = ALUOp::XorNot32; 6239 return Some(expr0_0); 6240 } 6241 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 6242 // Rule at src/isa/s390x/inst.isle line 2792. 6243 let expr0_0 = ALUOp::XorNot64; 6244 return Some(expr0_0); 6245 } 6246 return None; 6247 } 6248 6249 // Generated as internal constructor for term xor_not_reg. 6250 pub fn constructor_xor_not_reg<C: Context>( 6251 ctx: &mut C, 6252 arg0: Type, 6253 arg1: Reg, 6254 arg2: Reg, 6255 ) -> Option<Reg> { 6256 let pattern0_0 = arg0; 6257 let pattern1_0 = arg1; 6258 let pattern2_0 = arg2; 6259 // Rule at src/isa/s390x/inst.isle line 2795. 6260 let expr0_0 = constructor_aluop_xor_not(ctx, pattern0_0)?; 6261 let expr1_0 = constructor_alu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6262 return Some(expr1_0); 6263 } 6264 6265 // Generated as internal constructor for term unaryop_abs. 6266 pub fn constructor_unaryop_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6267 let pattern0_0 = arg0; 6268 if pattern0_0 == I32 { 6269 // Rule at src/isa/s390x/inst.isle line 2801. 6270 let expr0_0 = UnaryOp::Abs32; 6271 return Some(expr0_0); 6272 } 6273 if pattern0_0 == I64 { 6274 // Rule at src/isa/s390x/inst.isle line 2802. 6275 let expr0_0 = UnaryOp::Abs64; 6276 return Some(expr0_0); 6277 } 6278 return None; 6279 } 6280 6281 // Generated as internal constructor for term unaryop_abs_sext32. 6282 pub fn constructor_unaryop_abs_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6283 let pattern0_0 = arg0; 6284 if pattern0_0 == I64 { 6285 // Rule at src/isa/s390x/inst.isle line 2805. 6286 let expr0_0 = UnaryOp::Abs64Ext32; 6287 return Some(expr0_0); 6288 } 6289 return None; 6290 } 6291 6292 // Generated as internal constructor for term abs_reg. 6293 pub fn constructor_abs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6294 let pattern0_0 = arg0; 6295 let pattern1_0 = arg1; 6296 // Rule at src/isa/s390x/inst.isle line 2808. 6297 let expr0_0 = constructor_unaryop_abs(ctx, pattern0_0)?; 6298 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6299 return Some(expr1_0); 6300 } 6301 6302 // Generated as internal constructor for term abs_reg_sext32. 6303 pub fn constructor_abs_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6304 let pattern0_0 = arg0; 6305 let pattern1_0 = arg1; 6306 // Rule at src/isa/s390x/inst.isle line 2811. 6307 let expr0_0 = constructor_unaryop_abs_sext32(ctx, pattern0_0)?; 6308 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6309 return Some(expr1_0); 6310 } 6311 6312 // Generated as internal constructor for term unaryop_neg. 6313 pub fn constructor_unaryop_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6314 let pattern0_0 = arg0; 6315 if pattern0_0 == I8 { 6316 // Rule at src/isa/s390x/inst.isle line 2817. 6317 let expr0_0 = UnaryOp::Neg32; 6318 return Some(expr0_0); 6319 } 6320 if pattern0_0 == I16 { 6321 // Rule at src/isa/s390x/inst.isle line 2818. 6322 let expr0_0 = UnaryOp::Neg32; 6323 return Some(expr0_0); 6324 } 6325 if pattern0_0 == I32 { 6326 // Rule at src/isa/s390x/inst.isle line 2819. 6327 let expr0_0 = UnaryOp::Neg32; 6328 return Some(expr0_0); 6329 } 6330 if pattern0_0 == I64 { 6331 // Rule at src/isa/s390x/inst.isle line 2820. 6332 let expr0_0 = UnaryOp::Neg64; 6333 return Some(expr0_0); 6334 } 6335 return None; 6336 } 6337 6338 // Generated as internal constructor for term unaryop_neg_sext32. 6339 pub fn constructor_unaryop_neg_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6340 let pattern0_0 = arg0; 6341 if pattern0_0 == I64 { 6342 // Rule at src/isa/s390x/inst.isle line 2823. 6343 let expr0_0 = UnaryOp::Neg64Ext32; 6344 return Some(expr0_0); 6345 } 6346 return None; 6347 } 6348 6349 // Generated as internal constructor for term neg_reg. 6350 pub fn constructor_neg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6351 let pattern0_0 = arg0; 6352 let pattern1_0 = arg1; 6353 // Rule at src/isa/s390x/inst.isle line 2826. 6354 let expr0_0 = constructor_unaryop_neg(ctx, pattern0_0)?; 6355 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6356 return Some(expr1_0); 6357 } 6358 6359 // Generated as internal constructor for term neg_reg_sext32. 6360 pub fn constructor_neg_reg_sext32<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6361 let pattern0_0 = arg0; 6362 let pattern1_0 = arg1; 6363 // Rule at src/isa/s390x/inst.isle line 2829. 6364 let expr0_0 = constructor_unaryop_neg_sext32(ctx, pattern0_0)?; 6365 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6366 return Some(expr1_0); 6367 } 6368 6369 // Generated as internal constructor for term unaryop_bswap. 6370 pub fn constructor_unaryop_bswap<C: Context>(ctx: &mut C, arg0: Type) -> Option<UnaryOp> { 6371 let pattern0_0 = arg0; 6372 if pattern0_0 == I32 { 6373 // Rule at src/isa/s390x/inst.isle line 2835. 6374 let expr0_0 = UnaryOp::BSwap32; 6375 return Some(expr0_0); 6376 } 6377 if pattern0_0 == I64 { 6378 // Rule at src/isa/s390x/inst.isle line 2836. 6379 let expr0_0 = UnaryOp::BSwap64; 6380 return Some(expr0_0); 6381 } 6382 return None; 6383 } 6384 6385 // Generated as internal constructor for term bswap_reg. 6386 pub fn constructor_bswap_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 6387 let pattern0_0 = arg0; 6388 let pattern1_0 = arg1; 6389 // Rule at src/isa/s390x/inst.isle line 2839. 6390 let expr0_0 = constructor_unaryop_bswap(ctx, pattern0_0)?; 6391 let expr1_0 = constructor_unary_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 6392 return Some(expr1_0); 6393 } 6394 6395 // Generated as internal constructor for term push_bswap_reg. 6396 pub fn constructor_push_bswap_reg<C: Context>( 6397 ctx: &mut C, 6398 arg0: &VecMInstBuilder, 6399 arg1: Type, 6400 arg2: WritableReg, 6401 arg3: Reg, 6402 ) -> Option<Reg> { 6403 let pattern0_0 = arg0; 6404 let pattern1_0 = arg1; 6405 let pattern2_0 = arg2; 6406 let pattern3_0 = arg3; 6407 // Rule at src/isa/s390x/inst.isle line 2842. 6408 let expr0_0 = constructor_unaryop_bswap(ctx, pattern1_0)?; 6409 let expr1_0 = constructor_push_unary(ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0)?; 6410 return Some(expr1_0); 6411 } 6412 6413 // Generated as internal constructor for term shiftop_rot. 6414 pub fn constructor_shiftop_rot<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6415 let pattern0_0 = arg0; 6416 if pattern0_0 == I32 { 6417 // Rule at src/isa/s390x/inst.isle line 2848. 6418 let expr0_0 = ShiftOp::RotL32; 6419 return Some(expr0_0); 6420 } 6421 if pattern0_0 == I64 { 6422 // Rule at src/isa/s390x/inst.isle line 2849. 6423 let expr0_0 = ShiftOp::RotL64; 6424 return Some(expr0_0); 6425 } 6426 return None; 6427 } 6428 6429 // Generated as internal constructor for term rot_reg. 6430 pub fn constructor_rot_reg<C: Context>( 6431 ctx: &mut C, 6432 arg0: Type, 6433 arg1: Reg, 6434 arg2: Reg, 6435 ) -> Option<Reg> { 6436 let pattern0_0 = arg0; 6437 let pattern1_0 = arg1; 6438 let pattern2_0 = arg2; 6439 // Rule at src/isa/s390x/inst.isle line 2852. 6440 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6441 let expr1_0: u8 = 0; 6442 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6443 return Some(expr2_0); 6444 } 6445 6446 // Generated as internal constructor for term rot_imm. 6447 pub fn constructor_rot_imm<C: Context>( 6448 ctx: &mut C, 6449 arg0: Type, 6450 arg1: Reg, 6451 arg2: u8, 6452 ) -> Option<Reg> { 6453 let pattern0_0 = arg0; 6454 let pattern1_0 = arg1; 6455 let pattern2_0 = arg2; 6456 // Rule at src/isa/s390x/inst.isle line 2856. 6457 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6458 let expr1_0 = C::zero_reg(ctx); 6459 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6460 return Some(expr2_0); 6461 } 6462 6463 // Generated as internal constructor for term rot_imm_reg. 6464 pub fn constructor_rot_imm_reg<C: Context>( 6465 ctx: &mut C, 6466 arg0: Type, 6467 arg1: Reg, 6468 arg2: u8, 6469 arg3: Reg, 6470 ) -> Option<Reg> { 6471 let pattern0_0 = arg0; 6472 let pattern1_0 = arg1; 6473 let pattern2_0 = arg2; 6474 let pattern3_0 = arg3; 6475 // Rule at src/isa/s390x/inst.isle line 2860. 6476 let expr0_0 = constructor_shiftop_rot(ctx, pattern0_0)?; 6477 let expr1_0 = constructor_shift_rr( 6478 ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, pattern3_0, 6479 )?; 6480 return Some(expr1_0); 6481 } 6482 6483 // Generated as internal constructor for term push_rot_imm_reg. 6484 pub fn constructor_push_rot_imm_reg<C: Context>( 6485 ctx: &mut C, 6486 arg0: &VecMInstBuilder, 6487 arg1: Type, 6488 arg2: WritableReg, 6489 arg3: Reg, 6490 arg4: u8, 6491 arg5: Reg, 6492 ) -> Option<Reg> { 6493 let pattern0_0 = arg0; 6494 let pattern1_0 = arg1; 6495 let pattern2_0 = arg2; 6496 let pattern3_0 = arg3; 6497 let pattern4_0 = arg4; 6498 let pattern5_0 = arg5; 6499 // Rule at src/isa/s390x/inst.isle line 2864. 6500 let expr0_0 = constructor_shiftop_rot(ctx, pattern1_0)?; 6501 let expr1_0 = constructor_push_shift( 6502 ctx, pattern0_0, &expr0_0, pattern2_0, pattern3_0, pattern4_0, pattern5_0, 6503 )?; 6504 return Some(expr1_0); 6505 } 6506 6507 // Generated as internal constructor for term shiftop_lshl. 6508 pub fn constructor_shiftop_lshl<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6509 let pattern0_0 = arg0; 6510 if pattern0_0 == I8 { 6511 // Rule at src/isa/s390x/inst.isle line 2871. 6512 let expr0_0 = ShiftOp::LShL32; 6513 return Some(expr0_0); 6514 } 6515 if pattern0_0 == I16 { 6516 // Rule at src/isa/s390x/inst.isle line 2872. 6517 let expr0_0 = ShiftOp::LShL32; 6518 return Some(expr0_0); 6519 } 6520 if pattern0_0 == I32 { 6521 // Rule at src/isa/s390x/inst.isle line 2873. 6522 let expr0_0 = ShiftOp::LShL32; 6523 return Some(expr0_0); 6524 } 6525 if pattern0_0 == I64 { 6526 // Rule at src/isa/s390x/inst.isle line 2874. 6527 let expr0_0 = ShiftOp::LShL64; 6528 return Some(expr0_0); 6529 } 6530 return None; 6531 } 6532 6533 // Generated as internal constructor for term lshl_reg. 6534 pub fn constructor_lshl_reg<C: Context>( 6535 ctx: &mut C, 6536 arg0: Type, 6537 arg1: Reg, 6538 arg2: Reg, 6539 ) -> Option<Reg> { 6540 let pattern0_0 = arg0; 6541 let pattern1_0 = arg1; 6542 let pattern2_0 = arg2; 6543 // Rule at src/isa/s390x/inst.isle line 2877. 6544 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6545 let expr1_0: u8 = 0; 6546 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6547 return Some(expr2_0); 6548 } 6549 6550 // Generated as internal constructor for term lshl_imm. 6551 pub fn constructor_lshl_imm<C: Context>( 6552 ctx: &mut C, 6553 arg0: Type, 6554 arg1: Reg, 6555 arg2: u8, 6556 ) -> Option<Reg> { 6557 let pattern0_0 = arg0; 6558 let pattern1_0 = arg1; 6559 let pattern2_0 = arg2; 6560 // Rule at src/isa/s390x/inst.isle line 2881. 6561 let expr0_0 = constructor_shiftop_lshl(ctx, pattern0_0)?; 6562 let expr1_0 = C::zero_reg(ctx); 6563 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6564 return Some(expr2_0); 6565 } 6566 6567 // Generated as internal constructor for term shiftop_lshr. 6568 pub fn constructor_shiftop_lshr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6569 let pattern0_0 = arg0; 6570 if pattern0_0 == I32 { 6571 // Rule at src/isa/s390x/inst.isle line 2888. 6572 let expr0_0 = ShiftOp::LShR32; 6573 return Some(expr0_0); 6574 } 6575 if pattern0_0 == I64 { 6576 // Rule at src/isa/s390x/inst.isle line 2889. 6577 let expr0_0 = ShiftOp::LShR64; 6578 return Some(expr0_0); 6579 } 6580 return None; 6581 } 6582 6583 // Generated as internal constructor for term lshr_reg. 6584 pub fn constructor_lshr_reg<C: Context>( 6585 ctx: &mut C, 6586 arg0: Type, 6587 arg1: Reg, 6588 arg2: Reg, 6589 ) -> Option<Reg> { 6590 let pattern0_0 = arg0; 6591 let pattern1_0 = arg1; 6592 let pattern2_0 = arg2; 6593 // Rule at src/isa/s390x/inst.isle line 2892. 6594 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6595 let expr1_0: u8 = 0; 6596 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6597 return Some(expr2_0); 6598 } 6599 6600 // Generated as internal constructor for term lshr_imm. 6601 pub fn constructor_lshr_imm<C: Context>( 6602 ctx: &mut C, 6603 arg0: Type, 6604 arg1: Reg, 6605 arg2: u8, 6606 ) -> Option<Reg> { 6607 let pattern0_0 = arg0; 6608 let pattern1_0 = arg1; 6609 let pattern2_0 = arg2; 6610 // Rule at src/isa/s390x/inst.isle line 2896. 6611 let expr0_0 = constructor_shiftop_lshr(ctx, pattern0_0)?; 6612 let expr1_0 = C::zero_reg(ctx); 6613 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6614 return Some(expr2_0); 6615 } 6616 6617 // Generated as internal constructor for term shiftop_ashr. 6618 pub fn constructor_shiftop_ashr<C: Context>(ctx: &mut C, arg0: Type) -> Option<ShiftOp> { 6619 let pattern0_0 = arg0; 6620 if pattern0_0 == I32 { 6621 // Rule at src/isa/s390x/inst.isle line 2903. 6622 let expr0_0 = ShiftOp::AShR32; 6623 return Some(expr0_0); 6624 } 6625 if pattern0_0 == I64 { 6626 // Rule at src/isa/s390x/inst.isle line 2904. 6627 let expr0_0 = ShiftOp::AShR64; 6628 return Some(expr0_0); 6629 } 6630 return None; 6631 } 6632 6633 // Generated as internal constructor for term ashr_reg. 6634 pub fn constructor_ashr_reg<C: Context>( 6635 ctx: &mut C, 6636 arg0: Type, 6637 arg1: Reg, 6638 arg2: Reg, 6639 ) -> Option<Reg> { 6640 let pattern0_0 = arg0; 6641 let pattern1_0 = arg1; 6642 let pattern2_0 = arg2; 6643 // Rule at src/isa/s390x/inst.isle line 2907. 6644 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6645 let expr1_0: u8 = 0; 6646 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, expr1_0, pattern2_0)?; 6647 return Some(expr2_0); 6648 } 6649 6650 // Generated as internal constructor for term ashr_imm. 6651 pub fn constructor_ashr_imm<C: Context>( 6652 ctx: &mut C, 6653 arg0: Type, 6654 arg1: Reg, 6655 arg2: u8, 6656 ) -> Option<Reg> { 6657 let pattern0_0 = arg0; 6658 let pattern1_0 = arg1; 6659 let pattern2_0 = arg2; 6660 // Rule at src/isa/s390x/inst.isle line 2911. 6661 let expr0_0 = constructor_shiftop_ashr(ctx, pattern0_0)?; 6662 let expr1_0 = C::zero_reg(ctx); 6663 let expr2_0 = constructor_shift_rr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0, expr1_0)?; 6664 return Some(expr2_0); 6665 } 6666 6667 // Generated as internal constructor for term popcnt_byte. 6668 pub fn constructor_popcnt_byte<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6669 let pattern0_0 = arg0; 6670 // Rule at src/isa/s390x/inst.isle line 2918. 6671 let expr0_0: Type = I64; 6672 let expr1_0 = UnaryOp::PopcntByte; 6673 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6674 return Some(expr2_0); 6675 } 6676 6677 // Generated as internal constructor for term popcnt_reg. 6678 pub fn constructor_popcnt_reg<C: Context>(ctx: &mut C, arg0: Reg) -> Option<Reg> { 6679 let pattern0_0 = arg0; 6680 // Rule at src/isa/s390x/inst.isle line 2921. 6681 let expr0_0: Type = I64; 6682 let expr1_0 = UnaryOp::PopcntReg; 6683 let expr2_0 = constructor_unary_rr(ctx, expr0_0, &expr1_0, pattern0_0)?; 6684 return Some(expr2_0); 6685 } 6686 6687 // Generated as internal constructor for term atomic_rmw_and. 6688 pub fn constructor_atomic_rmw_and<C: Context>( 6689 ctx: &mut C, 6690 arg0: Type, 6691 arg1: Reg, 6692 arg2: &MemArg, 6693 ) -> Option<Reg> { 6694 let pattern0_0 = arg0; 6695 if pattern0_0 == I32 { 6696 let pattern2_0 = arg1; 6697 let pattern3_0 = arg2; 6698 // Rule at src/isa/s390x/inst.isle line 2927. 6699 let expr0_0: Type = I32; 6700 let expr1_0 = ALUOp::And32; 6701 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6702 return Some(expr2_0); 6703 } 6704 if pattern0_0 == I64 { 6705 let pattern2_0 = arg1; 6706 let pattern3_0 = arg2; 6707 // Rule at src/isa/s390x/inst.isle line 2928. 6708 let expr0_0: Type = I64; 6709 let expr1_0 = ALUOp::And64; 6710 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6711 return Some(expr2_0); 6712 } 6713 return None; 6714 } 6715 6716 // Generated as internal constructor for term atomic_rmw_or. 6717 pub fn constructor_atomic_rmw_or<C: Context>( 6718 ctx: &mut C, 6719 arg0: Type, 6720 arg1: Reg, 6721 arg2: &MemArg, 6722 ) -> Option<Reg> { 6723 let pattern0_0 = arg0; 6724 if pattern0_0 == I32 { 6725 let pattern2_0 = arg1; 6726 let pattern3_0 = arg2; 6727 // Rule at src/isa/s390x/inst.isle line 2931. 6728 let expr0_0: Type = I32; 6729 let expr1_0 = ALUOp::Orr32; 6730 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6731 return Some(expr2_0); 6732 } 6733 if pattern0_0 == I64 { 6734 let pattern2_0 = arg1; 6735 let pattern3_0 = arg2; 6736 // Rule at src/isa/s390x/inst.isle line 2932. 6737 let expr0_0: Type = I64; 6738 let expr1_0 = ALUOp::Orr64; 6739 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6740 return Some(expr2_0); 6741 } 6742 return None; 6743 } 6744 6745 // Generated as internal constructor for term atomic_rmw_xor. 6746 pub fn constructor_atomic_rmw_xor<C: Context>( 6747 ctx: &mut C, 6748 arg0: Type, 6749 arg1: Reg, 6750 arg2: &MemArg, 6751 ) -> Option<Reg> { 6752 let pattern0_0 = arg0; 6753 if pattern0_0 == I32 { 6754 let pattern2_0 = arg1; 6755 let pattern3_0 = arg2; 6756 // Rule at src/isa/s390x/inst.isle line 2935. 6757 let expr0_0: Type = I32; 6758 let expr1_0 = ALUOp::Xor32; 6759 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6760 return Some(expr2_0); 6761 } 6762 if pattern0_0 == I64 { 6763 let pattern2_0 = arg1; 6764 let pattern3_0 = arg2; 6765 // Rule at src/isa/s390x/inst.isle line 2936. 6766 let expr0_0: Type = I64; 6767 let expr1_0 = ALUOp::Xor64; 6768 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6769 return Some(expr2_0); 6770 } 6771 return None; 6772 } 6773 6774 // Generated as internal constructor for term atomic_rmw_add. 6775 pub fn constructor_atomic_rmw_add<C: Context>( 6776 ctx: &mut C, 6777 arg0: Type, 6778 arg1: Reg, 6779 arg2: &MemArg, 6780 ) -> Option<Reg> { 6781 let pattern0_0 = arg0; 6782 if pattern0_0 == I32 { 6783 let pattern2_0 = arg1; 6784 let pattern3_0 = arg2; 6785 // Rule at src/isa/s390x/inst.isle line 2939. 6786 let expr0_0: Type = I32; 6787 let expr1_0 = ALUOp::Add32; 6788 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6789 return Some(expr2_0); 6790 } 6791 if pattern0_0 == I64 { 6792 let pattern2_0 = arg1; 6793 let pattern3_0 = arg2; 6794 // Rule at src/isa/s390x/inst.isle line 2940. 6795 let expr0_0: Type = I64; 6796 let expr1_0 = ALUOp::Add64; 6797 let expr2_0 = constructor_atomic_rmw_impl(ctx, expr0_0, &expr1_0, pattern2_0, pattern3_0)?; 6798 return Some(expr2_0); 6799 } 6800 return None; 6801 } 6802 6803 // Generated as internal constructor for term atomic_cas_impl. 6804 pub fn constructor_atomic_cas_impl<C: Context>( 6805 ctx: &mut C, 6806 arg0: Type, 6807 arg1: Reg, 6808 arg2: Reg, 6809 arg3: &MemArg, 6810 ) -> Option<Reg> { 6811 let pattern0_0 = arg0; 6812 if pattern0_0 == I32 { 6813 let pattern2_0 = arg1; 6814 let pattern3_0 = arg2; 6815 let pattern4_0 = arg3; 6816 // Rule at src/isa/s390x/inst.isle line 2946. 6817 let expr0_0 = constructor_atomic_cas32(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6818 return Some(expr0_0); 6819 } 6820 if pattern0_0 == I64 { 6821 let pattern2_0 = arg1; 6822 let pattern3_0 = arg2; 6823 let pattern4_0 = arg3; 6824 // Rule at src/isa/s390x/inst.isle line 2947. 6825 let expr0_0 = constructor_atomic_cas64(ctx, pattern2_0, pattern3_0, pattern4_0)?; 6826 return Some(expr0_0); 6827 } 6828 return None; 6829 } 6830 6831 // Generated as internal constructor for term push_atomic_cas. 6832 pub fn constructor_push_atomic_cas<C: Context>( 6833 ctx: &mut C, 6834 arg0: &VecMInstBuilder, 6835 arg1: Type, 6836 arg2: WritableReg, 6837 arg3: Reg, 6838 arg4: &MemArg, 6839 ) -> Option<Reg> { 6840 let pattern0_0 = arg0; 6841 let pattern1_0 = arg1; 6842 if pattern1_0 == I32 { 6843 let pattern3_0 = arg2; 6844 let pattern4_0 = arg3; 6845 let pattern5_0 = arg4; 6846 // Rule at src/isa/s390x/inst.isle line 2950. 6847 let expr0_0 = 6848 constructor_push_atomic_cas32(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6849 return Some(expr0_0); 6850 } 6851 if pattern1_0 == I64 { 6852 let pattern3_0 = arg2; 6853 let pattern4_0 = arg3; 6854 let pattern5_0 = arg4; 6855 // Rule at src/isa/s390x/inst.isle line 2951. 6856 let expr0_0 = 6857 constructor_push_atomic_cas64(ctx, pattern0_0, pattern3_0, pattern4_0, pattern5_0)?; 6858 return Some(expr0_0); 6859 } 6860 return None; 6861 } 6862 6863 // Generated as internal constructor for term fpuop2_add. 6864 pub fn constructor_fpuop2_add<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6865 let pattern0_0 = arg0; 6866 if pattern0_0 == F32 { 6867 // Rule at src/isa/s390x/inst.isle line 2957. 6868 let expr0_0 = FPUOp2::Add32; 6869 return Some(expr0_0); 6870 } 6871 if pattern0_0 == F64 { 6872 // Rule at src/isa/s390x/inst.isle line 2958. 6873 let expr0_0 = FPUOp2::Add64; 6874 return Some(expr0_0); 6875 } 6876 return None; 6877 } 6878 6879 // Generated as internal constructor for term fadd_reg. 6880 pub fn constructor_fadd_reg<C: Context>( 6881 ctx: &mut C, 6882 arg0: Type, 6883 arg1: Reg, 6884 arg2: Reg, 6885 ) -> Option<Reg> { 6886 let pattern0_0 = arg0; 6887 let pattern1_0 = arg1; 6888 let pattern2_0 = arg2; 6889 // Rule at src/isa/s390x/inst.isle line 2961. 6890 let expr0_0 = constructor_fpuop2_add(ctx, pattern0_0)?; 6891 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6892 return Some(expr1_0); 6893 } 6894 6895 // Generated as internal constructor for term fpuop2_sub. 6896 pub fn constructor_fpuop2_sub<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6897 let pattern0_0 = arg0; 6898 if pattern0_0 == F32 { 6899 // Rule at src/isa/s390x/inst.isle line 2967. 6900 let expr0_0 = FPUOp2::Sub32; 6901 return Some(expr0_0); 6902 } 6903 if pattern0_0 == F64 { 6904 // Rule at src/isa/s390x/inst.isle line 2968. 6905 let expr0_0 = FPUOp2::Sub64; 6906 return Some(expr0_0); 6907 } 6908 return None; 6909 } 6910 6911 // Generated as internal constructor for term fsub_reg. 6912 pub fn constructor_fsub_reg<C: Context>( 6913 ctx: &mut C, 6914 arg0: Type, 6915 arg1: Reg, 6916 arg2: Reg, 6917 ) -> Option<Reg> { 6918 let pattern0_0 = arg0; 6919 let pattern1_0 = arg1; 6920 let pattern2_0 = arg2; 6921 // Rule at src/isa/s390x/inst.isle line 2971. 6922 let expr0_0 = constructor_fpuop2_sub(ctx, pattern0_0)?; 6923 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6924 return Some(expr1_0); 6925 } 6926 6927 // Generated as internal constructor for term fpuop2_mul. 6928 pub fn constructor_fpuop2_mul<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6929 let pattern0_0 = arg0; 6930 if pattern0_0 == F32 { 6931 // Rule at src/isa/s390x/inst.isle line 2977. 6932 let expr0_0 = FPUOp2::Mul32; 6933 return Some(expr0_0); 6934 } 6935 if pattern0_0 == F64 { 6936 // Rule at src/isa/s390x/inst.isle line 2978. 6937 let expr0_0 = FPUOp2::Mul64; 6938 return Some(expr0_0); 6939 } 6940 return None; 6941 } 6942 6943 // Generated as internal constructor for term fmul_reg. 6944 pub fn constructor_fmul_reg<C: Context>( 6945 ctx: &mut C, 6946 arg0: Type, 6947 arg1: Reg, 6948 arg2: Reg, 6949 ) -> Option<Reg> { 6950 let pattern0_0 = arg0; 6951 let pattern1_0 = arg1; 6952 let pattern2_0 = arg2; 6953 // Rule at src/isa/s390x/inst.isle line 2981. 6954 let expr0_0 = constructor_fpuop2_mul(ctx, pattern0_0)?; 6955 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6956 return Some(expr1_0); 6957 } 6958 6959 // Generated as internal constructor for term fpuop2_div. 6960 pub fn constructor_fpuop2_div<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6961 let pattern0_0 = arg0; 6962 if pattern0_0 == F32 { 6963 // Rule at src/isa/s390x/inst.isle line 2987. 6964 let expr0_0 = FPUOp2::Div32; 6965 return Some(expr0_0); 6966 } 6967 if pattern0_0 == F64 { 6968 // Rule at src/isa/s390x/inst.isle line 2988. 6969 let expr0_0 = FPUOp2::Div64; 6970 return Some(expr0_0); 6971 } 6972 return None; 6973 } 6974 6975 // Generated as internal constructor for term fdiv_reg. 6976 pub fn constructor_fdiv_reg<C: Context>( 6977 ctx: &mut C, 6978 arg0: Type, 6979 arg1: Reg, 6980 arg2: Reg, 6981 ) -> Option<Reg> { 6982 let pattern0_0 = arg0; 6983 let pattern1_0 = arg1; 6984 let pattern2_0 = arg2; 6985 // Rule at src/isa/s390x/inst.isle line 2991. 6986 let expr0_0 = constructor_fpuop2_div(ctx, pattern0_0)?; 6987 let expr1_0 = constructor_fpu_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 6988 return Some(expr1_0); 6989 } 6990 6991 // Generated as internal constructor for term fpuop2_min. 6992 pub fn constructor_fpuop2_min<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 6993 let pattern0_0 = arg0; 6994 if pattern0_0 == F32 { 6995 // Rule at src/isa/s390x/inst.isle line 2997. 6996 let expr0_0 = FPUOp2::Min32; 6997 return Some(expr0_0); 6998 } 6999 if pattern0_0 == F64 { 7000 // Rule at src/isa/s390x/inst.isle line 2998. 7001 let expr0_0 = FPUOp2::Min64; 7002 return Some(expr0_0); 7003 } 7004 return None; 7005 } 7006 7007 // Generated as internal constructor for term fmin_reg. 7008 pub fn constructor_fmin_reg<C: Context>( 7009 ctx: &mut C, 7010 arg0: Type, 7011 arg1: Reg, 7012 arg2: Reg, 7013 ) -> Option<Reg> { 7014 let pattern0_0 = arg0; 7015 let pattern1_0 = arg1; 7016 let pattern2_0 = arg2; 7017 // Rule at src/isa/s390x/inst.isle line 3001. 7018 let expr0_0 = constructor_fpuop2_min(ctx, pattern0_0)?; 7019 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7020 return Some(expr1_0); 7021 } 7022 7023 // Generated as internal constructor for term fpuop2_max. 7024 pub fn constructor_fpuop2_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp2> { 7025 let pattern0_0 = arg0; 7026 if pattern0_0 == F32 { 7027 // Rule at src/isa/s390x/inst.isle line 3007. 7028 let expr0_0 = FPUOp2::Max32; 7029 return Some(expr0_0); 7030 } 7031 if pattern0_0 == F64 { 7032 // Rule at src/isa/s390x/inst.isle line 3008. 7033 let expr0_0 = FPUOp2::Max64; 7034 return Some(expr0_0); 7035 } 7036 return None; 7037 } 7038 7039 // Generated as internal constructor for term fmax_reg. 7040 pub fn constructor_fmax_reg<C: Context>( 7041 ctx: &mut C, 7042 arg0: Type, 7043 arg1: Reg, 7044 arg2: Reg, 7045 ) -> Option<Reg> { 7046 let pattern0_0 = arg0; 7047 let pattern1_0 = arg1; 7048 let pattern2_0 = arg2; 7049 // Rule at src/isa/s390x/inst.isle line 3011. 7050 let expr0_0 = constructor_fpuop2_max(ctx, pattern0_0)?; 7051 let expr1_0 = constructor_fpuvec_rrr(ctx, pattern0_0, &expr0_0, pattern1_0, pattern2_0)?; 7052 return Some(expr1_0); 7053 } 7054 7055 // Generated as internal constructor for term fpuop3_fma. 7056 pub fn constructor_fpuop3_fma<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp3> { 7057 let pattern0_0 = arg0; 7058 if pattern0_0 == F32 { 7059 // Rule at src/isa/s390x/inst.isle line 3017. 7060 let expr0_0 = FPUOp3::MAdd32; 7061 return Some(expr0_0); 7062 } 7063 if pattern0_0 == F64 { 7064 // Rule at src/isa/s390x/inst.isle line 3018. 7065 let expr0_0 = FPUOp3::MAdd64; 7066 return Some(expr0_0); 7067 } 7068 return None; 7069 } 7070 7071 // Generated as internal constructor for term fma_reg. 7072 pub fn constructor_fma_reg<C: Context>( 7073 ctx: &mut C, 7074 arg0: Type, 7075 arg1: Reg, 7076 arg2: Reg, 7077 arg3: Reg, 7078 ) -> Option<Reg> { 7079 let pattern0_0 = arg0; 7080 let pattern1_0 = arg1; 7081 let pattern2_0 = arg2; 7082 let pattern3_0 = arg3; 7083 // Rule at src/isa/s390x/inst.isle line 3021. 7084 let expr0_0 = constructor_fpuop3_fma(ctx, pattern0_0)?; 7085 let expr1_0 = constructor_fpu_rrrr( 7086 ctx, pattern0_0, &expr0_0, pattern3_0, pattern1_0, pattern2_0, 7087 )?; 7088 return Some(expr1_0); 7089 } 7090 7091 // Generated as internal constructor for term fpuop1_sqrt. 7092 pub fn constructor_fpuop1_sqrt<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7093 let pattern0_0 = arg0; 7094 if pattern0_0 == F32 { 7095 // Rule at src/isa/s390x/inst.isle line 3027. 7096 let expr0_0 = FPUOp1::Sqrt32; 7097 return Some(expr0_0); 7098 } 7099 if pattern0_0 == F64 { 7100 // Rule at src/isa/s390x/inst.isle line 3028. 7101 let expr0_0 = FPUOp1::Sqrt64; 7102 return Some(expr0_0); 7103 } 7104 return None; 7105 } 7106 7107 // Generated as internal constructor for term sqrt_reg. 7108 pub fn constructor_sqrt_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7109 let pattern0_0 = arg0; 7110 let pattern1_0 = arg1; 7111 // Rule at src/isa/s390x/inst.isle line 3031. 7112 let expr0_0 = constructor_fpuop1_sqrt(ctx, pattern0_0)?; 7113 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7114 return Some(expr1_0); 7115 } 7116 7117 // Generated as internal constructor for term fpuop1_neg. 7118 pub fn constructor_fpuop1_neg<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7119 let pattern0_0 = arg0; 7120 if pattern0_0 == F32 { 7121 // Rule at src/isa/s390x/inst.isle line 3037. 7122 let expr0_0 = FPUOp1::Neg32; 7123 return Some(expr0_0); 7124 } 7125 if pattern0_0 == F64 { 7126 // Rule at src/isa/s390x/inst.isle line 3038. 7127 let expr0_0 = FPUOp1::Neg64; 7128 return Some(expr0_0); 7129 } 7130 return None; 7131 } 7132 7133 // Generated as internal constructor for term fneg_reg. 7134 pub fn constructor_fneg_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7135 let pattern0_0 = arg0; 7136 let pattern1_0 = arg1; 7137 // Rule at src/isa/s390x/inst.isle line 3041. 7138 let expr0_0 = constructor_fpuop1_neg(ctx, pattern0_0)?; 7139 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7140 return Some(expr1_0); 7141 } 7142 7143 // Generated as internal constructor for term fpuop1_abs. 7144 pub fn constructor_fpuop1_abs<C: Context>(ctx: &mut C, arg0: Type) -> Option<FPUOp1> { 7145 let pattern0_0 = arg0; 7146 if pattern0_0 == F32 { 7147 // Rule at src/isa/s390x/inst.isle line 3047. 7148 let expr0_0 = FPUOp1::Abs32; 7149 return Some(expr0_0); 7150 } 7151 if pattern0_0 == F64 { 7152 // Rule at src/isa/s390x/inst.isle line 3048. 7153 let expr0_0 = FPUOp1::Abs64; 7154 return Some(expr0_0); 7155 } 7156 return None; 7157 } 7158 7159 // Generated as internal constructor for term fabs_reg. 7160 pub fn constructor_fabs_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7161 let pattern0_0 = arg0; 7162 let pattern1_0 = arg1; 7163 // Rule at src/isa/s390x/inst.isle line 3051. 7164 let expr0_0 = constructor_fpuop1_abs(ctx, pattern0_0)?; 7165 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7166 return Some(expr1_0); 7167 } 7168 7169 // Generated as internal constructor for term fpuroundmode_ceil. 7170 pub fn constructor_fpuroundmode_ceil<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7171 let pattern0_0 = arg0; 7172 if pattern0_0 == F32 { 7173 // Rule at src/isa/s390x/inst.isle line 3057. 7174 let expr0_0 = FpuRoundMode::Plus32; 7175 return Some(expr0_0); 7176 } 7177 if pattern0_0 == F64 { 7178 // Rule at src/isa/s390x/inst.isle line 3058. 7179 let expr0_0 = FpuRoundMode::Plus64; 7180 return Some(expr0_0); 7181 } 7182 return None; 7183 } 7184 7185 // Generated as internal constructor for term ceil_reg. 7186 pub fn constructor_ceil_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7187 let pattern0_0 = arg0; 7188 let pattern1_0 = arg1; 7189 // Rule at src/isa/s390x/inst.isle line 3061. 7190 let expr0_0 = constructor_fpuroundmode_ceil(ctx, pattern0_0)?; 7191 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7192 return Some(expr1_0); 7193 } 7194 7195 // Generated as internal constructor for term fpuroundmode_floor. 7196 pub fn constructor_fpuroundmode_floor<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7197 let pattern0_0 = arg0; 7198 if pattern0_0 == F32 { 7199 // Rule at src/isa/s390x/inst.isle line 3067. 7200 let expr0_0 = FpuRoundMode::Minus32; 7201 return Some(expr0_0); 7202 } 7203 if pattern0_0 == F64 { 7204 // Rule at src/isa/s390x/inst.isle line 3068. 7205 let expr0_0 = FpuRoundMode::Minus64; 7206 return Some(expr0_0); 7207 } 7208 return None; 7209 } 7210 7211 // Generated as internal constructor for term floor_reg. 7212 pub fn constructor_floor_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7213 let pattern0_0 = arg0; 7214 let pattern1_0 = arg1; 7215 // Rule at src/isa/s390x/inst.isle line 3071. 7216 let expr0_0 = constructor_fpuroundmode_floor(ctx, pattern0_0)?; 7217 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7218 return Some(expr1_0); 7219 } 7220 7221 // Generated as internal constructor for term fpuroundmode_trunc. 7222 pub fn constructor_fpuroundmode_trunc<C: Context>(ctx: &mut C, arg0: Type) -> Option<FpuRoundMode> { 7223 let pattern0_0 = arg0; 7224 if pattern0_0 == F32 { 7225 // Rule at src/isa/s390x/inst.isle line 3077. 7226 let expr0_0 = FpuRoundMode::Zero32; 7227 return Some(expr0_0); 7228 } 7229 if pattern0_0 == F64 { 7230 // Rule at src/isa/s390x/inst.isle line 3078. 7231 let expr0_0 = FpuRoundMode::Zero64; 7232 return Some(expr0_0); 7233 } 7234 return None; 7235 } 7236 7237 // Generated as internal constructor for term trunc_reg. 7238 pub fn constructor_trunc_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7239 let pattern0_0 = arg0; 7240 let pattern1_0 = arg1; 7241 // Rule at src/isa/s390x/inst.isle line 3081. 7242 let expr0_0 = constructor_fpuroundmode_trunc(ctx, pattern0_0)?; 7243 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7244 return Some(expr1_0); 7245 } 7246 7247 // Generated as internal constructor for term fpuroundmode_nearest. 7248 pub fn constructor_fpuroundmode_nearest<C: Context>( 7249 ctx: &mut C, 7250 arg0: Type, 7251 ) -> Option<FpuRoundMode> { 7252 let pattern0_0 = arg0; 7253 if pattern0_0 == F32 { 7254 // Rule at src/isa/s390x/inst.isle line 3087. 7255 let expr0_0 = FpuRoundMode::Nearest32; 7256 return Some(expr0_0); 7257 } 7258 if pattern0_0 == F64 { 7259 // Rule at src/isa/s390x/inst.isle line 3088. 7260 let expr0_0 = FpuRoundMode::Nearest64; 7261 return Some(expr0_0); 7262 } 7263 return None; 7264 } 7265 7266 // Generated as internal constructor for term nearest_reg. 7267 pub fn constructor_nearest_reg<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 7268 let pattern0_0 = arg0; 7269 let pattern1_0 = arg1; 7270 // Rule at src/isa/s390x/inst.isle line 3091. 7271 let expr0_0 = constructor_fpuroundmode_nearest(ctx, pattern0_0)?; 7272 let expr1_0 = constructor_fpu_round(ctx, pattern0_0, &expr0_0, pattern1_0)?; 7273 return Some(expr1_0); 7274 } 7275 7276 // Generated as internal constructor for term fpuop1_promote. 7277 pub fn constructor_fpuop1_promote<C: Context>( 7278 ctx: &mut C, 7279 arg0: Type, 7280 arg1: Type, 7281 ) -> Option<FPUOp1> { 7282 let pattern0_0 = arg0; 7283 if pattern0_0 == F64 { 7284 let pattern2_0 = arg1; 7285 if pattern2_0 == F32 { 7286 // Rule at src/isa/s390x/inst.isle line 3097. 7287 let expr0_0 = FPUOp1::Cvt32To64; 7288 return Some(expr0_0); 7289 } 7290 } 7291 return None; 7292 } 7293 7294 // Generated as internal constructor for term fpromote_reg. 7295 pub fn constructor_fpromote_reg<C: Context>( 7296 ctx: &mut C, 7297 arg0: Type, 7298 arg1: Type, 7299 arg2: Reg, 7300 ) -> Option<Reg> { 7301 let pattern0_0 = arg0; 7302 let pattern1_0 = arg1; 7303 let pattern2_0 = arg2; 7304 // Rule at src/isa/s390x/inst.isle line 3100. 7305 let expr0_0 = constructor_fpuop1_promote(ctx, pattern0_0, pattern1_0)?; 7306 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7307 return Some(expr1_0); 7308 } 7309 7310 // Generated as internal constructor for term fpuop1_demote. 7311 pub fn constructor_fpuop1_demote<C: Context>( 7312 ctx: &mut C, 7313 arg0: Type, 7314 arg1: Type, 7315 ) -> Option<FPUOp1> { 7316 let pattern0_0 = arg0; 7317 if pattern0_0 == F32 { 7318 let pattern2_0 = arg1; 7319 if pattern2_0 == F64 { 7320 // Rule at src/isa/s390x/inst.isle line 3107. 7321 let expr0_0 = FPUOp1::Cvt64To32; 7322 return Some(expr0_0); 7323 } 7324 } 7325 return None; 7326 } 7327 7328 // Generated as internal constructor for term fdemote_reg. 7329 pub fn constructor_fdemote_reg<C: Context>( 7330 ctx: &mut C, 7331 arg0: Type, 7332 arg1: Type, 7333 arg2: Reg, 7334 ) -> Option<Reg> { 7335 let pattern0_0 = arg0; 7336 let pattern1_0 = arg1; 7337 let pattern2_0 = arg2; 7338 // Rule at src/isa/s390x/inst.isle line 3110. 7339 let expr0_0 = constructor_fpuop1_demote(ctx, pattern0_0, pattern1_0)?; 7340 let expr1_0 = constructor_fpu_rr(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7341 return Some(expr1_0); 7342 } 7343 7344 // Generated as internal constructor for term uint_to_fpu_op. 7345 pub fn constructor_uint_to_fpu_op<C: Context>( 7346 ctx: &mut C, 7347 arg0: Type, 7348 arg1: Type, 7349 ) -> Option<IntToFpuOp> { 7350 let pattern0_0 = arg0; 7351 if pattern0_0 == F32 { 7352 let pattern2_0 = arg1; 7353 if pattern2_0 == I32 { 7354 // Rule at src/isa/s390x/inst.isle line 3117. 7355 let expr0_0 = IntToFpuOp::U32ToF32; 7356 return Some(expr0_0); 7357 } 7358 if pattern2_0 == I64 { 7359 // Rule at src/isa/s390x/inst.isle line 3119. 7360 let expr0_0 = IntToFpuOp::U64ToF32; 7361 return Some(expr0_0); 7362 } 7363 } 7364 if pattern0_0 == F64 { 7365 let pattern2_0 = arg1; 7366 if pattern2_0 == I32 { 7367 // Rule at src/isa/s390x/inst.isle line 3118. 7368 let expr0_0 = IntToFpuOp::U32ToF64; 7369 return Some(expr0_0); 7370 } 7371 if pattern2_0 == I64 { 7372 // Rule at src/isa/s390x/inst.isle line 3120. 7373 let expr0_0 = IntToFpuOp::U64ToF64; 7374 return Some(expr0_0); 7375 } 7376 } 7377 return None; 7378 } 7379 7380 // Generated as internal constructor for term fcvt_from_uint_reg. 7381 pub fn constructor_fcvt_from_uint_reg<C: Context>( 7382 ctx: &mut C, 7383 arg0: Type, 7384 arg1: Type, 7385 arg2: Reg, 7386 ) -> Option<Reg> { 7387 let pattern0_0 = arg0; 7388 let pattern1_0 = arg1; 7389 let pattern2_0 = arg2; 7390 // Rule at src/isa/s390x/inst.isle line 3123. 7391 let expr0_0 = constructor_uint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7392 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7393 return Some(expr1_0); 7394 } 7395 7396 // Generated as internal constructor for term sint_to_fpu_op. 7397 pub fn constructor_sint_to_fpu_op<C: Context>( 7398 ctx: &mut C, 7399 arg0: Type, 7400 arg1: Type, 7401 ) -> Option<IntToFpuOp> { 7402 let pattern0_0 = arg0; 7403 if pattern0_0 == F32 { 7404 let pattern2_0 = arg1; 7405 if pattern2_0 == I32 { 7406 // Rule at src/isa/s390x/inst.isle line 3130. 7407 let expr0_0 = IntToFpuOp::I32ToF32; 7408 return Some(expr0_0); 7409 } 7410 if pattern2_0 == I64 { 7411 // Rule at src/isa/s390x/inst.isle line 3132. 7412 let expr0_0 = IntToFpuOp::I64ToF32; 7413 return Some(expr0_0); 7414 } 7415 } 7416 if pattern0_0 == F64 { 7417 let pattern2_0 = arg1; 7418 if pattern2_0 == I32 { 7419 // Rule at src/isa/s390x/inst.isle line 3131. 7420 let expr0_0 = IntToFpuOp::I32ToF64; 7421 return Some(expr0_0); 7422 } 7423 if pattern2_0 == I64 { 7424 // Rule at src/isa/s390x/inst.isle line 3133. 7425 let expr0_0 = IntToFpuOp::I64ToF64; 7426 return Some(expr0_0); 7427 } 7428 } 7429 return None; 7430 } 7431 7432 // Generated as internal constructor for term fcvt_from_sint_reg. 7433 pub fn constructor_fcvt_from_sint_reg<C: Context>( 7434 ctx: &mut C, 7435 arg0: Type, 7436 arg1: Type, 7437 arg2: Reg, 7438 ) -> Option<Reg> { 7439 let pattern0_0 = arg0; 7440 let pattern1_0 = arg1; 7441 let pattern2_0 = arg2; 7442 // Rule at src/isa/s390x/inst.isle line 3136. 7443 let expr0_0 = constructor_sint_to_fpu_op(ctx, pattern0_0, pattern1_0)?; 7444 let expr1_0 = constructor_int_to_fpu(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7445 return Some(expr1_0); 7446 } 7447 7448 // Generated as internal constructor for term fpu_to_uint_op. 7449 pub fn constructor_fpu_to_uint_op<C: Context>( 7450 ctx: &mut C, 7451 arg0: Type, 7452 arg1: Type, 7453 ) -> Option<FpuToIntOp> { 7454 let pattern0_0 = arg0; 7455 if pattern0_0 == I32 { 7456 let pattern2_0 = arg1; 7457 if pattern2_0 == F32 { 7458 // Rule at src/isa/s390x/inst.isle line 3143. 7459 let expr0_0 = FpuToIntOp::F32ToU32; 7460 return Some(expr0_0); 7461 } 7462 if pattern2_0 == F64 { 7463 // Rule at src/isa/s390x/inst.isle line 3144. 7464 let expr0_0 = FpuToIntOp::F64ToU32; 7465 return Some(expr0_0); 7466 } 7467 } 7468 if pattern0_0 == I64 { 7469 let pattern2_0 = arg1; 7470 if pattern2_0 == F32 { 7471 // Rule at src/isa/s390x/inst.isle line 3145. 7472 let expr0_0 = FpuToIntOp::F32ToU64; 7473 return Some(expr0_0); 7474 } 7475 if pattern2_0 == F64 { 7476 // Rule at src/isa/s390x/inst.isle line 3146. 7477 let expr0_0 = FpuToIntOp::F64ToU64; 7478 return Some(expr0_0); 7479 } 7480 } 7481 return None; 7482 } 7483 7484 // Generated as internal constructor for term fcvt_to_uint_reg_with_flags. 7485 pub fn constructor_fcvt_to_uint_reg_with_flags<C: Context>( 7486 ctx: &mut C, 7487 arg0: Type, 7488 arg1: Type, 7489 arg2: Reg, 7490 ) -> Option<ProducesFlags> { 7491 let pattern0_0 = arg0; 7492 let pattern1_0 = arg1; 7493 let pattern2_0 = arg2; 7494 // Rule at src/isa/s390x/inst.isle line 3149. 7495 let expr0_0 = constructor_fpu_to_uint_op(ctx, pattern0_0, pattern1_0)?; 7496 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7497 return Some(expr1_0); 7498 } 7499 7500 // Generated as internal constructor for term fcvt_to_uint_reg. 7501 pub fn constructor_fcvt_to_uint_reg<C: Context>( 7502 ctx: &mut C, 7503 arg0: Type, 7504 arg1: Type, 7505 arg2: Reg, 7506 ) -> Option<Reg> { 7507 let pattern0_0 = arg0; 7508 let pattern1_0 = arg1; 7509 let pattern2_0 = arg2; 7510 // Rule at src/isa/s390x/inst.isle line 3153. 7511 let expr0_0 = constructor_fcvt_to_uint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7512 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7513 return Some(expr1_0); 7514 } 7515 7516 // Generated as internal constructor for term fpu_to_sint_op. 7517 pub fn constructor_fpu_to_sint_op<C: Context>( 7518 ctx: &mut C, 7519 arg0: Type, 7520 arg1: Type, 7521 ) -> Option<FpuToIntOp> { 7522 let pattern0_0 = arg0; 7523 if pattern0_0 == I32 { 7524 let pattern2_0 = arg1; 7525 if pattern2_0 == F32 { 7526 // Rule at src/isa/s390x/inst.isle line 3160. 7527 let expr0_0 = FpuToIntOp::F32ToI32; 7528 return Some(expr0_0); 7529 } 7530 if pattern2_0 == F64 { 7531 // Rule at src/isa/s390x/inst.isle line 3161. 7532 let expr0_0 = FpuToIntOp::F64ToI32; 7533 return Some(expr0_0); 7534 } 7535 } 7536 if pattern0_0 == I64 { 7537 let pattern2_0 = arg1; 7538 if pattern2_0 == F32 { 7539 // Rule at src/isa/s390x/inst.isle line 3162. 7540 let expr0_0 = FpuToIntOp::F32ToI64; 7541 return Some(expr0_0); 7542 } 7543 if pattern2_0 == F64 { 7544 // Rule at src/isa/s390x/inst.isle line 3163. 7545 let expr0_0 = FpuToIntOp::F64ToI64; 7546 return Some(expr0_0); 7547 } 7548 } 7549 return None; 7550 } 7551 7552 // Generated as internal constructor for term fcvt_to_sint_reg_with_flags. 7553 pub fn constructor_fcvt_to_sint_reg_with_flags<C: Context>( 7554 ctx: &mut C, 7555 arg0: Type, 7556 arg1: Type, 7557 arg2: Reg, 7558 ) -> Option<ProducesFlags> { 7559 let pattern0_0 = arg0; 7560 let pattern1_0 = arg1; 7561 let pattern2_0 = arg2; 7562 // Rule at src/isa/s390x/inst.isle line 3166. 7563 let expr0_0 = constructor_fpu_to_sint_op(ctx, pattern0_0, pattern1_0)?; 7564 let expr1_0 = constructor_fpu_to_int(ctx, pattern0_0, &expr0_0, pattern2_0)?; 7565 return Some(expr1_0); 7566 } 7567 7568 // Generated as internal constructor for term fcvt_to_sint_reg. 7569 pub fn constructor_fcvt_to_sint_reg<C: Context>( 7570 ctx: &mut C, 7571 arg0: Type, 7572 arg1: Type, 7573 arg2: Reg, 7574 ) -> Option<Reg> { 7575 let pattern0_0 = arg0; 7576 let pattern1_0 = arg1; 7577 let pattern2_0 = arg2; 7578 // Rule at src/isa/s390x/inst.isle line 3170. 7579 let expr0_0 = constructor_fcvt_to_sint_reg_with_flags(ctx, pattern0_0, pattern1_0, pattern2_0)?; 7580 let expr1_0 = constructor_drop_flags(ctx, &expr0_0)?; 7581 return Some(expr1_0); 7582 } 7583 7584 // Generated as internal constructor for term cmpop_cmps. 7585 pub fn constructor_cmpop_cmps<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7586 let pattern0_0 = arg0; 7587 if pattern0_0 == I32 { 7588 // Rule at src/isa/s390x/inst.isle line 3177. 7589 let expr0_0 = CmpOp::CmpS32; 7590 return Some(expr0_0); 7591 } 7592 if pattern0_0 == I64 { 7593 // Rule at src/isa/s390x/inst.isle line 3178. 7594 let expr0_0 = CmpOp::CmpS64; 7595 return Some(expr0_0); 7596 } 7597 return None; 7598 } 7599 7600 // Generated as internal constructor for term cmpop_cmps_sext16. 7601 pub fn constructor_cmpop_cmps_sext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7602 let pattern0_0 = arg0; 7603 if pattern0_0 == I32 { 7604 // Rule at src/isa/s390x/inst.isle line 3181. 7605 let expr0_0 = CmpOp::CmpS32Ext16; 7606 return Some(expr0_0); 7607 } 7608 if pattern0_0 == I64 { 7609 // Rule at src/isa/s390x/inst.isle line 3182. 7610 let expr0_0 = CmpOp::CmpS64Ext16; 7611 return Some(expr0_0); 7612 } 7613 return None; 7614 } 7615 7616 // Generated as internal constructor for term cmpop_cmps_sext32. 7617 pub fn constructor_cmpop_cmps_sext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7618 let pattern0_0 = arg0; 7619 if pattern0_0 == I64 { 7620 // Rule at src/isa/s390x/inst.isle line 3185. 7621 let expr0_0 = CmpOp::CmpS64Ext32; 7622 return Some(expr0_0); 7623 } 7624 return None; 7625 } 7626 7627 // Generated as internal constructor for term icmps_reg. 7628 pub fn constructor_icmps_reg<C: Context>( 7629 ctx: &mut C, 7630 arg0: Type, 7631 arg1: Reg, 7632 arg2: Reg, 7633 ) -> Option<ProducesFlags> { 7634 let pattern0_0 = arg0; 7635 let pattern1_0 = arg1; 7636 let pattern2_0 = arg2; 7637 // Rule at src/isa/s390x/inst.isle line 3188. 7638 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7639 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7640 return Some(expr1_0); 7641 } 7642 7643 // Generated as internal constructor for term icmps_reg_sext32. 7644 pub fn constructor_icmps_reg_sext32<C: Context>( 7645 ctx: &mut C, 7646 arg0: Type, 7647 arg1: Reg, 7648 arg2: Reg, 7649 ) -> Option<ProducesFlags> { 7650 let pattern0_0 = arg0; 7651 let pattern1_0 = arg1; 7652 let pattern2_0 = arg2; 7653 // Rule at src/isa/s390x/inst.isle line 3191. 7654 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7655 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7656 return Some(expr1_0); 7657 } 7658 7659 // Generated as internal constructor for term icmps_simm16. 7660 pub fn constructor_icmps_simm16<C: Context>( 7661 ctx: &mut C, 7662 arg0: Type, 7663 arg1: Reg, 7664 arg2: i16, 7665 ) -> Option<ProducesFlags> { 7666 let pattern0_0 = arg0; 7667 let pattern1_0 = arg1; 7668 let pattern2_0 = arg2; 7669 // Rule at src/isa/s390x/inst.isle line 3194. 7670 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7671 let expr1_0 = constructor_cmp_rsimm16(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7672 return Some(expr1_0); 7673 } 7674 7675 // Generated as internal constructor for term icmps_simm32. 7676 pub fn constructor_icmps_simm32<C: Context>( 7677 ctx: &mut C, 7678 arg0: Type, 7679 arg1: Reg, 7680 arg2: i32, 7681 ) -> Option<ProducesFlags> { 7682 let pattern0_0 = arg0; 7683 let pattern1_0 = arg1; 7684 let pattern2_0 = arg2; 7685 // Rule at src/isa/s390x/inst.isle line 3197. 7686 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7687 let expr1_0 = constructor_cmp_rsimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7688 return Some(expr1_0); 7689 } 7690 7691 // Generated as internal constructor for term icmps_mem. 7692 pub fn constructor_icmps_mem<C: Context>( 7693 ctx: &mut C, 7694 arg0: Type, 7695 arg1: Reg, 7696 arg2: &MemArg, 7697 ) -> Option<ProducesFlags> { 7698 let pattern0_0 = arg0; 7699 let pattern1_0 = arg1; 7700 let pattern2_0 = arg2; 7701 // Rule at src/isa/s390x/inst.isle line 3200. 7702 let expr0_0 = constructor_cmpop_cmps(ctx, pattern0_0)?; 7703 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7704 return Some(expr1_0); 7705 } 7706 7707 // Generated as internal constructor for term icmps_mem_sext16. 7708 pub fn constructor_icmps_mem_sext16<C: Context>( 7709 ctx: &mut C, 7710 arg0: Type, 7711 arg1: Reg, 7712 arg2: &MemArg, 7713 ) -> Option<ProducesFlags> { 7714 let pattern0_0 = arg0; 7715 let pattern1_0 = arg1; 7716 let pattern2_0 = arg2; 7717 // Rule at src/isa/s390x/inst.isle line 3203. 7718 let expr0_0 = constructor_cmpop_cmps_sext16(ctx, pattern0_0)?; 7719 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7720 return Some(expr1_0); 7721 } 7722 7723 // Generated as internal constructor for term icmps_mem_sext32. 7724 pub fn constructor_icmps_mem_sext32<C: Context>( 7725 ctx: &mut C, 7726 arg0: Type, 7727 arg1: Reg, 7728 arg2: &MemArg, 7729 ) -> Option<ProducesFlags> { 7730 let pattern0_0 = arg0; 7731 let pattern1_0 = arg1; 7732 let pattern2_0 = arg2; 7733 // Rule at src/isa/s390x/inst.isle line 3206. 7734 let expr0_0 = constructor_cmpop_cmps_sext32(ctx, pattern0_0)?; 7735 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7736 return Some(expr1_0); 7737 } 7738 7739 // Generated as internal constructor for term cmpop_cmpu. 7740 pub fn constructor_cmpop_cmpu<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7741 let pattern0_0 = arg0; 7742 if pattern0_0 == I32 { 7743 // Rule at src/isa/s390x/inst.isle line 3212. 7744 let expr0_0 = CmpOp::CmpL32; 7745 return Some(expr0_0); 7746 } 7747 if pattern0_0 == I64 { 7748 // Rule at src/isa/s390x/inst.isle line 3213. 7749 let expr0_0 = CmpOp::CmpL64; 7750 return Some(expr0_0); 7751 } 7752 return None; 7753 } 7754 7755 // Generated as internal constructor for term cmpop_cmpu_zext16. 7756 pub fn constructor_cmpop_cmpu_zext16<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7757 let pattern0_0 = arg0; 7758 if pattern0_0 == I32 { 7759 // Rule at src/isa/s390x/inst.isle line 3216. 7760 let expr0_0 = CmpOp::CmpL32Ext16; 7761 return Some(expr0_0); 7762 } 7763 if pattern0_0 == I64 { 7764 // Rule at src/isa/s390x/inst.isle line 3217. 7765 let expr0_0 = CmpOp::CmpL64Ext16; 7766 return Some(expr0_0); 7767 } 7768 return None; 7769 } 7770 7771 // Generated as internal constructor for term cmpop_cmpu_zext32. 7772 pub fn constructor_cmpop_cmpu_zext32<C: Context>(ctx: &mut C, arg0: Type) -> Option<CmpOp> { 7773 let pattern0_0 = arg0; 7774 if pattern0_0 == I64 { 7775 // Rule at src/isa/s390x/inst.isle line 3220. 7776 let expr0_0 = CmpOp::CmpL64Ext32; 7777 return Some(expr0_0); 7778 } 7779 return None; 7780 } 7781 7782 // Generated as internal constructor for term icmpu_reg. 7783 pub fn constructor_icmpu_reg<C: Context>( 7784 ctx: &mut C, 7785 arg0: Type, 7786 arg1: Reg, 7787 arg2: Reg, 7788 ) -> Option<ProducesFlags> { 7789 let pattern0_0 = arg0; 7790 let pattern1_0 = arg1; 7791 let pattern2_0 = arg2; 7792 // Rule at src/isa/s390x/inst.isle line 3223. 7793 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7794 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7795 return Some(expr1_0); 7796 } 7797 7798 // Generated as internal constructor for term icmpu_reg_zext32. 7799 pub fn constructor_icmpu_reg_zext32<C: Context>( 7800 ctx: &mut C, 7801 arg0: Type, 7802 arg1: Reg, 7803 arg2: Reg, 7804 ) -> Option<ProducesFlags> { 7805 let pattern0_0 = arg0; 7806 let pattern1_0 = arg1; 7807 let pattern2_0 = arg2; 7808 // Rule at src/isa/s390x/inst.isle line 3226. 7809 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7810 let expr1_0 = constructor_cmp_rr(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7811 return Some(expr1_0); 7812 } 7813 7814 // Generated as internal constructor for term icmpu_uimm32. 7815 pub fn constructor_icmpu_uimm32<C: Context>( 7816 ctx: &mut C, 7817 arg0: Type, 7818 arg1: Reg, 7819 arg2: u32, 7820 ) -> Option<ProducesFlags> { 7821 let pattern0_0 = arg0; 7822 let pattern1_0 = arg1; 7823 let pattern2_0 = arg2; 7824 // Rule at src/isa/s390x/inst.isle line 3229. 7825 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7826 let expr1_0 = constructor_cmp_ruimm32(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7827 return Some(expr1_0); 7828 } 7829 7830 // Generated as internal constructor for term icmpu_mem. 7831 pub fn constructor_icmpu_mem<C: Context>( 7832 ctx: &mut C, 7833 arg0: Type, 7834 arg1: Reg, 7835 arg2: &MemArg, 7836 ) -> Option<ProducesFlags> { 7837 let pattern0_0 = arg0; 7838 let pattern1_0 = arg1; 7839 let pattern2_0 = arg2; 7840 // Rule at src/isa/s390x/inst.isle line 3232. 7841 let expr0_0 = constructor_cmpop_cmpu(ctx, pattern0_0)?; 7842 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7843 return Some(expr1_0); 7844 } 7845 7846 // Generated as internal constructor for term icmpu_mem_zext16. 7847 pub fn constructor_icmpu_mem_zext16<C: Context>( 7848 ctx: &mut C, 7849 arg0: Type, 7850 arg1: Reg, 7851 arg2: &MemArg, 7852 ) -> Option<ProducesFlags> { 7853 let pattern0_0 = arg0; 7854 let pattern1_0 = arg1; 7855 let pattern2_0 = arg2; 7856 // Rule at src/isa/s390x/inst.isle line 3235. 7857 let expr0_0 = constructor_cmpop_cmpu_zext16(ctx, pattern0_0)?; 7858 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7859 return Some(expr1_0); 7860 } 7861 7862 // Generated as internal constructor for term icmpu_mem_zext32. 7863 pub fn constructor_icmpu_mem_zext32<C: Context>( 7864 ctx: &mut C, 7865 arg0: Type, 7866 arg1: Reg, 7867 arg2: &MemArg, 7868 ) -> Option<ProducesFlags> { 7869 let pattern0_0 = arg0; 7870 let pattern1_0 = arg1; 7871 let pattern2_0 = arg2; 7872 // Rule at src/isa/s390x/inst.isle line 3238. 7873 let expr0_0 = constructor_cmpop_cmpu_zext32(ctx, pattern0_0)?; 7874 let expr1_0 = constructor_cmp_rx(ctx, &expr0_0, pattern1_0, pattern2_0)?; 7875 return Some(expr1_0); 7876 } 7877 7878 // Generated as internal constructor for term fcmp_reg. 7879 pub fn constructor_fcmp_reg<C: Context>( 7880 ctx: &mut C, 7881 arg0: Type, 7882 arg1: Reg, 7883 arg2: Reg, 7884 ) -> Option<ProducesFlags> { 7885 let pattern0_0 = arg0; 7886 if pattern0_0 == F32 { 7887 let pattern2_0 = arg1; 7888 let pattern3_0 = arg2; 7889 // Rule at src/isa/s390x/inst.isle line 3244. 7890 let expr0_0 = constructor_fpu_cmp32(ctx, pattern2_0, pattern3_0)?; 7891 return Some(expr0_0); 7892 } 7893 if pattern0_0 == F64 { 7894 let pattern2_0 = arg1; 7895 let pattern3_0 = arg2; 7896 // Rule at src/isa/s390x/inst.isle line 3245. 7897 let expr0_0 = constructor_fpu_cmp64(ctx, pattern2_0, pattern3_0)?; 7898 return Some(expr0_0); 7899 } 7900 return None; 7901 } 7902 7903 // Generated as internal constructor for term lower. 7904 pub fn constructor_lower<C: Context>(ctx: &mut C, arg0: Inst) -> Option<InstOutput> { 7905 let pattern0_0 = arg0; 7906 let pattern1_0 = C::inst_data(ctx, pattern0_0); 7907 match &pattern1_0 { 7908 &InstructionData::NullAry { 7909 opcode: ref pattern2_0, 7910 } => { 7911 match pattern2_0 { 7912 &Opcode::Debugtrap => { 7913 // Rule at src/isa/s390x/lower.isle line 2169. 7914 let expr0_0 = constructor_debugtrap_impl(ctx)?; 7915 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7916 return Some(expr1_0); 7917 } 7918 &Opcode::Nop => { 7919 // Rule at src/isa/s390x/lower.isle line 47. 7920 let expr0_0 = C::invalid_reg(ctx); 7921 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 7922 return Some(expr1_0); 7923 } 7924 &Opcode::Fence => { 7925 // Rule at src/isa/s390x/lower.isle line 1882. 7926 let expr0_0 = constructor_fence_impl(ctx)?; 7927 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 7928 return Some(expr1_0); 7929 } 7930 _ => {} 7931 } 7932 } 7933 &InstructionData::FuncAddr { 7934 opcode: ref pattern2_0, 7935 func_ref: pattern2_1, 7936 } => { 7937 if let &Opcode::FuncAddr = pattern2_0 { 7938 let (pattern4_0, pattern4_1, pattern4_2) = C::func_ref_data(ctx, pattern2_1); 7939 if let Some(()) = C::reloc_distance_near(ctx, pattern4_2) { 7940 // Rule at src/isa/s390x/lower.isle line 1159. 7941 let expr0_0: i32 = 0; 7942 let expr1_0 = C::memflags_trusted(ctx); 7943 let expr2_0 = C::memarg_symbol(ctx, pattern4_1, expr0_0, expr1_0); 7944 let expr3_0 = constructor_load_addr(ctx, &expr2_0)?; 7945 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 7946 return Some(expr4_0); 7947 } 7948 // Rule at src/isa/s390x/lower.isle line 1163. 7949 let expr0_0: i64 = 0; 7950 let expr1_0 = constructor_load_ext_name_far(ctx, pattern4_1, expr0_0)?; 7951 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 7952 return Some(expr2_0); 7953 } 7954 } 7955 &InstructionData::UnaryGlobalValue { 7956 opcode: ref pattern2_0, 7957 global_value: pattern2_1, 7958 } => { 7959 if let &Opcode::SymbolValue = pattern2_0 { 7960 if let Some((pattern4_0, pattern4_1, pattern4_2)) = 7961 C::symbol_value_data(ctx, pattern2_1) 7962 { 7963 if let Some(()) = C::reloc_distance_near(ctx, pattern4_1) { 7964 let pattern6_0 = 0; 7965 if let Some(pattern7_0) = 7966 C::memarg_symbol_offset_sum(ctx, pattern4_2, pattern6_0) 7967 { 7968 // Rule at src/isa/s390x/lower.isle line 1170. 7969 let expr0_0 = C::memflags_trusted(ctx); 7970 let expr1_0 = C::memarg_symbol(ctx, pattern4_0, pattern7_0, expr0_0); 7971 let expr2_0 = constructor_load_addr(ctx, &expr1_0)?; 7972 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 7973 return Some(expr3_0); 7974 } 7975 } 7976 // Rule at src/isa/s390x/lower.isle line 1175. 7977 let expr0_0 = constructor_load_ext_name_far(ctx, pattern4_0, pattern4_2)?; 7978 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 7979 return Some(expr1_0); 7980 } 7981 } 7982 } 7983 &InstructionData::UnaryIeee32 { 7984 opcode: ref pattern2_0, 7985 imm: pattern2_1, 7986 } => { 7987 if let &Opcode::F32const = pattern2_0 { 7988 let pattern4_0 = C::u64_from_ieee32(ctx, pattern2_1); 7989 // Rule at src/isa/s390x/lower.isle line 29. 7990 let expr0_0: Type = F32; 7991 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 7992 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 7993 return Some(expr2_0); 7994 } 7995 } 7996 &InstructionData::UnaryIeee64 { 7997 opcode: ref pattern2_0, 7998 imm: pattern2_1, 7999 } => { 8000 if let &Opcode::F64const = pattern2_0 { 8001 let pattern4_0 = C::u64_from_ieee64(ctx, pattern2_1); 8002 // Rule at src/isa/s390x/lower.isle line 35. 8003 let expr0_0: Type = F64; 8004 let expr1_0 = constructor_imm(ctx, expr0_0, pattern4_0)?; 8005 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8006 return Some(expr2_0); 8007 } 8008 } 8009 &InstructionData::Trap { 8010 opcode: ref pattern2_0, 8011 code: ref pattern2_1, 8012 } => { 8013 match pattern2_0 { 8014 &Opcode::Trap => { 8015 // Rule at src/isa/s390x/lower.isle line 2139. 8016 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8017 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8018 return Some(expr1_0); 8019 } 8020 &Opcode::ResumableTrap => { 8021 // Rule at src/isa/s390x/lower.isle line 2145. 8022 let expr0_0 = constructor_trap_impl(ctx, pattern2_1)?; 8023 let expr1_0 = constructor_safepoint(ctx, &expr0_0)?; 8024 return Some(expr1_0); 8025 } 8026 _ => {} 8027 } 8028 } 8029 &InstructionData::StoreNoOffset { 8030 opcode: ref pattern2_0, 8031 args: ref pattern2_1, 8032 flags: pattern2_2, 8033 } => { 8034 if let &Opcode::AtomicStore = pattern2_0 { 8035 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8036 let pattern5_0 = C::value_type(ctx, pattern4_0); 8037 if pattern5_0 == I8 { 8038 // Rule at src/isa/s390x/lower.isle line 1863. 8039 let expr0_0 = C::zero_offset(ctx); 8040 let expr1_0 = 8041 constructor_istore8_impl(ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0)?; 8042 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8043 return Some(expr2_0); 8044 } 8045 if pattern5_0 == I16 { 8046 // Rule at src/isa/s390x/lower.isle line 1867. 8047 let expr0_0 = C::zero_offset(ctx); 8048 let expr1_0 = constructor_istore16_impl( 8049 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8050 )?; 8051 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8052 return Some(expr2_0); 8053 } 8054 if pattern5_0 == I32 { 8055 // Rule at src/isa/s390x/lower.isle line 1871. 8056 let expr0_0 = C::zero_offset(ctx); 8057 let expr1_0 = constructor_istore32_impl( 8058 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8059 )?; 8060 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8061 return Some(expr2_0); 8062 } 8063 if pattern5_0 == I64 { 8064 // Rule at src/isa/s390x/lower.isle line 1875. 8065 let expr0_0 = C::zero_offset(ctx); 8066 let expr1_0 = constructor_istore64_impl( 8067 ctx, pattern2_2, pattern4_0, pattern4_1, expr0_0, 8068 )?; 8069 let expr2_0 = constructor_atomic_store_impl(ctx, &expr1_0)?; 8070 return Some(expr2_0); 8071 } 8072 } 8073 } 8074 &InstructionData::Store { 8075 opcode: ref pattern2_0, 8076 args: ref pattern2_1, 8077 flags: pattern2_2, 8078 offset: pattern2_3, 8079 } => { 8080 match pattern2_0 { 8081 &Opcode::Store => { 8082 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8083 let pattern5_0 = C::value_type(ctx, pattern4_0); 8084 if pattern5_0 == I8 { 8085 // Rule at src/isa/s390x/lower.isle line 1354. 8086 let expr0_0 = constructor_istore8_impl( 8087 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8088 )?; 8089 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8090 return Some(expr1_0); 8091 } 8092 if pattern5_0 == I16 { 8093 // Rule at src/isa/s390x/lower.isle line 1358. 8094 let expr0_0 = constructor_istore16_impl( 8095 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8096 )?; 8097 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8098 return Some(expr1_0); 8099 } 8100 if pattern5_0 == I32 { 8101 // Rule at src/isa/s390x/lower.isle line 1362. 8102 let expr0_0 = constructor_istore32_impl( 8103 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8104 )?; 8105 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8106 return Some(expr1_0); 8107 } 8108 if pattern5_0 == I64 { 8109 // Rule at src/isa/s390x/lower.isle line 1366. 8110 let expr0_0 = constructor_istore64_impl( 8111 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8112 )?; 8113 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8114 return Some(expr1_0); 8115 } 8116 if pattern5_0 == R64 { 8117 // Rule at src/isa/s390x/lower.isle line 1370. 8118 let expr0_0 = constructor_istore64_impl( 8119 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8120 )?; 8121 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8122 return Some(expr1_0); 8123 } 8124 if pattern5_0 == F32 { 8125 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8126 // Rule at src/isa/s390x/lower.isle line 1374. 8127 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8128 let expr1_0 = 8129 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8130 let expr2_0 = constructor_fpu_store32(ctx, expr0_0, &expr1_0)?; 8131 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8132 return Some(expr3_0); 8133 } 8134 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8135 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8136 // Rule at src/isa/s390x/lower.isle line 1380. 8137 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8138 let expr1_0 = constructor_lower_address( 8139 ctx, pattern2_2, pattern4_1, pattern2_3, 8140 )?; 8141 let expr2_0 = constructor_fpu_storerev32(ctx, expr0_0, &expr1_0)?; 8142 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8143 return Some(expr3_0); 8144 } 8145 } 8146 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8147 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8148 // Rule at src/isa/s390x/lower.isle line 1386. 8149 let expr0_0: Type = I64; 8150 let expr1_0 = C::put_in_reg(ctx, pattern4_0); 8151 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8152 let expr3_0: u8 = 32; 8153 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8154 let expr5_0 = constructor_lower_address( 8155 ctx, pattern2_2, pattern4_1, pattern2_3, 8156 )?; 8157 let expr6_0 = constructor_storerev32(ctx, expr4_0, &expr5_0)?; 8158 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 8159 return Some(expr7_0); 8160 } 8161 } 8162 } 8163 if pattern5_0 == F64 { 8164 if let Some(()) = C::bigendian(ctx, pattern2_2) { 8165 // Rule at src/isa/s390x/lower.isle line 1392. 8166 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8167 let expr1_0 = 8168 constructor_lower_address(ctx, pattern2_2, pattern4_1, pattern2_3)?; 8169 let expr2_0 = constructor_fpu_store64(ctx, expr0_0, &expr1_0)?; 8170 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8171 return Some(expr3_0); 8172 } 8173 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern5_0) { 8174 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8175 // Rule at src/isa/s390x/lower.isle line 1398. 8176 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8177 let expr1_0 = constructor_lower_address( 8178 ctx, pattern2_2, pattern4_1, pattern2_3, 8179 )?; 8180 let expr2_0 = constructor_fpu_storerev64(ctx, expr0_0, &expr1_0)?; 8181 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8182 return Some(expr3_0); 8183 } 8184 } 8185 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern5_0) { 8186 if let Some(()) = C::littleendian(ctx, pattern2_2) { 8187 // Rule at src/isa/s390x/lower.isle line 1404. 8188 let expr0_0 = C::put_in_reg(ctx, pattern4_0); 8189 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8190 let expr2_0 = constructor_lower_address( 8191 ctx, pattern2_2, pattern4_1, pattern2_3, 8192 )?; 8193 let expr3_0 = constructor_storerev64(ctx, expr1_0, &expr2_0)?; 8194 let expr4_0 = constructor_side_effect(ctx, &expr3_0)?; 8195 return Some(expr4_0); 8196 } 8197 } 8198 } 8199 } 8200 &Opcode::Istore8 => { 8201 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8202 // Rule at src/isa/s390x/lower.isle line 1413. 8203 let expr0_0 = constructor_istore8_impl( 8204 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8205 )?; 8206 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8207 return Some(expr1_0); 8208 } 8209 &Opcode::Istore16 => { 8210 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8211 // Rule at src/isa/s390x/lower.isle line 1431. 8212 let expr0_0 = constructor_istore16_impl( 8213 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8214 )?; 8215 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8216 return Some(expr1_0); 8217 } 8218 &Opcode::Istore32 => { 8219 let (pattern4_0, pattern4_1) = C::unpack_value_array_2(ctx, pattern2_1); 8220 // Rule at src/isa/s390x/lower.isle line 1457. 8221 let expr0_0 = constructor_istore32_impl( 8222 ctx, pattern2_2, pattern4_0, pattern4_1, pattern2_3, 8223 )?; 8224 let expr1_0 = constructor_side_effect(ctx, &expr0_0)?; 8225 return Some(expr1_0); 8226 } 8227 _ => {} 8228 } 8229 } 8230 &InstructionData::Unary { 8231 opcode: ref pattern2_0, 8232 arg: pattern2_1, 8233 } => { 8234 match pattern2_0 { 8235 &Opcode::Copy => { 8236 // Rule at src/isa/s390x/lower.isle line 53. 8237 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8238 return Some(expr0_0); 8239 } 8240 &Opcode::Breduce => { 8241 // Rule at src/isa/s390x/lower.isle line 752. 8242 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8243 return Some(expr0_0); 8244 } 8245 &Opcode::Ireduce => { 8246 // Rule at src/isa/s390x/lower.isle line 596. 8247 let expr0_0 = constructor_output_value(ctx, pattern2_1)?; 8248 return Some(expr0_0); 8249 } 8250 _ => {} 8251 } 8252 } 8253 &InstructionData::IntCondTrap { 8254 opcode: ref pattern2_0, 8255 arg: pattern2_1, 8256 cond: ref pattern2_2, 8257 code: ref pattern2_3, 8258 } => { 8259 if let &Opcode::Trapif = pattern2_0 { 8260 if let Some(pattern4_0) = C::def_inst(ctx, pattern2_1) { 8261 let pattern5_0 = C::inst_data(ctx, pattern4_0); 8262 if let &InstructionData::Binary { 8263 opcode: ref pattern6_0, 8264 args: ref pattern6_1, 8265 } = &pattern5_0 8266 { 8267 match pattern6_0 { 8268 &Opcode::Ifcmp => { 8269 let (pattern8_0, pattern8_1) = 8270 C::unpack_value_array_2(ctx, pattern6_1); 8271 // Rule at src/isa/s390x/lower.isle line 2181. 8272 let expr0_0: bool = false; 8273 let expr1_0 = constructor_icmp_val( 8274 ctx, expr0_0, pattern2_2, pattern8_0, pattern8_1, 8275 )?; 8276 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_3)?; 8277 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8278 return Some(expr3_0); 8279 } 8280 &Opcode::IaddIfcout => { 8281 let (pattern8_0, pattern8_1) = 8282 C::unpack_value_array_2(ctx, pattern6_1); 8283 if let &IntCC::UnsignedGreaterThan = pattern2_2 { 8284 // Rule at src/isa/s390x/lower.isle line 2206. 8285 let expr0_0: u8 = 3; 8286 let expr1_0 = C::mask_as_cond(ctx, expr0_0); 8287 let expr2_0 = 8288 constructor_trap_if_impl(ctx, &expr1_0, pattern2_3)?; 8289 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 8290 return Some(expr3_0); 8291 } 8292 } 8293 _ => {} 8294 } 8295 } 8296 } 8297 } 8298 } 8299 &InstructionData::CondTrap { 8300 opcode: ref pattern2_0, 8301 arg: pattern2_1, 8302 code: ref pattern2_2, 8303 } => { 8304 match pattern2_0 { 8305 &Opcode::Trapz => { 8306 // Rule at src/isa/s390x/lower.isle line 2151. 8307 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8308 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 8309 let expr2_0 = constructor_trap_if_bool(ctx, &expr1_0, pattern2_2)?; 8310 let expr3_0 = constructor_safepoint(ctx, &expr2_0)?; 8311 return Some(expr3_0); 8312 } 8313 &Opcode::Trapnz => { 8314 // Rule at src/isa/s390x/lower.isle line 2157. 8315 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8316 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8317 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8318 return Some(expr2_0); 8319 } 8320 &Opcode::ResumableTrapnz => { 8321 // Rule at src/isa/s390x/lower.isle line 2163. 8322 let expr0_0 = constructor_value_nonzero(ctx, pattern2_1)?; 8323 let expr1_0 = constructor_trap_if_bool(ctx, &expr0_0, pattern2_2)?; 8324 let expr2_0 = constructor_safepoint(ctx, &expr1_0)?; 8325 return Some(expr2_0); 8326 } 8327 _ => {} 8328 } 8329 } 8330 _ => {} 8331 } 8332 if let Some(pattern1_0) = C::first_result(ctx, pattern0_0) { 8333 let pattern2_0 = C::value_type(ctx, pattern1_0); 8334 if pattern2_0 == B1 { 8335 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8336 if let &InstructionData::Unary { 8337 opcode: ref pattern5_0, 8338 arg: pattern5_1, 8339 } = &pattern4_0 8340 { 8341 match pattern5_0 { 8342 &Opcode::IsNull => { 8343 let pattern7_0 = C::value_type(ctx, pattern5_1); 8344 if pattern7_0 == R64 { 8345 // Rule at src/isa/s390x/lower.isle line 2017. 8346 let expr0_0: Type = B1; 8347 let expr1_0: Type = I64; 8348 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8349 let expr3_0: i16 = 0; 8350 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8351 let expr5_0 = IntCC::Equal; 8352 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8353 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8354 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8355 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8356 return Some(expr9_0); 8357 } 8358 } 8359 &Opcode::IsInvalid => { 8360 let pattern7_0 = C::value_type(ctx, pattern5_1); 8361 if pattern7_0 == R64 { 8362 // Rule at src/isa/s390x/lower.isle line 2023. 8363 let expr0_0: Type = B1; 8364 let expr1_0: Type = I64; 8365 let expr2_0 = C::put_in_reg(ctx, pattern5_1); 8366 let expr3_0: i16 = -1; 8367 let expr4_0 = constructor_icmps_simm16(ctx, expr1_0, expr2_0, expr3_0)?; 8368 let expr5_0 = IntCC::Equal; 8369 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 8370 let expr7_0 = constructor_bool(ctx, &expr4_0, &expr6_0)?; 8371 let expr8_0 = constructor_lower_bool(ctx, expr0_0, &expr7_0)?; 8372 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 8373 return Some(expr9_0); 8374 } 8375 } 8376 _ => {} 8377 } 8378 } 8379 } 8380 if pattern2_0 == I8 { 8381 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8382 match &pattern4_0 { 8383 &InstructionData::Unary { 8384 opcode: ref pattern5_0, 8385 arg: pattern5_1, 8386 } => { 8387 if let &Opcode::Popcnt = pattern5_0 { 8388 // Rule at src/isa/s390x/lower.isle line 884. 8389 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8390 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 8391 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8392 return Some(expr2_0); 8393 } 8394 } 8395 &InstructionData::LoadNoOffset { 8396 opcode: ref pattern5_0, 8397 arg: pattern5_1, 8398 flags: pattern5_2, 8399 } => { 8400 if let &Opcode::AtomicLoad = pattern5_0 { 8401 // Rule at src/isa/s390x/lower.isle line 1826. 8402 let expr0_0: Type = I8; 8403 let expr1_0 = C::zero_offset(ctx); 8404 let expr2_0 = 8405 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8406 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8407 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8408 return Some(expr4_0); 8409 } 8410 } 8411 &InstructionData::Load { 8412 opcode: ref pattern5_0, 8413 arg: pattern5_1, 8414 flags: pattern5_2, 8415 offset: pattern5_3, 8416 } => { 8417 if let &Opcode::Load = pattern5_0 { 8418 // Rule at src/isa/s390x/lower.isle line 1182. 8419 let expr0_0: Type = I8; 8420 let expr1_0 = 8421 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8422 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8423 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8424 return Some(expr3_0); 8425 } 8426 } 8427 _ => {} 8428 } 8429 } 8430 if pattern2_0 == I16 { 8431 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8432 match &pattern4_0 { 8433 &InstructionData::LoadNoOffset { 8434 opcode: ref pattern5_0, 8435 arg: pattern5_1, 8436 flags: pattern5_2, 8437 } => { 8438 if let &Opcode::AtomicLoad = pattern5_0 { 8439 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8440 // Rule at src/isa/s390x/lower.isle line 1834. 8441 let expr0_0 = C::zero_offset(ctx); 8442 let expr1_0 = 8443 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8444 let expr2_0 = constructor_loadrev16(ctx, &expr1_0)?; 8445 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8446 return Some(expr3_0); 8447 } 8448 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8449 // Rule at src/isa/s390x/lower.isle line 1830. 8450 let expr0_0: Type = I16; 8451 let expr1_0 = C::zero_offset(ctx); 8452 let expr2_0 = 8453 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr1_0)?; 8454 let expr3_0 = constructor_zext32_mem(ctx, expr0_0, &expr2_0)?; 8455 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8456 return Some(expr4_0); 8457 } 8458 } 8459 } 8460 &InstructionData::Load { 8461 opcode: ref pattern5_0, 8462 arg: pattern5_1, 8463 flags: pattern5_2, 8464 offset: pattern5_3, 8465 } => { 8466 if let &Opcode::Load = pattern5_0 { 8467 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8468 // Rule at src/isa/s390x/lower.isle line 1190. 8469 let expr0_0 = 8470 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8471 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 8472 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8473 return Some(expr2_0); 8474 } 8475 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8476 // Rule at src/isa/s390x/lower.isle line 1186. 8477 let expr0_0: Type = I16; 8478 let expr1_0 = 8479 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8480 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 8481 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8482 return Some(expr3_0); 8483 } 8484 } 8485 } 8486 _ => {} 8487 } 8488 } 8489 if pattern2_0 == I32 { 8490 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8491 match &pattern4_0 { 8492 &InstructionData::Binary { 8493 opcode: ref pattern5_0, 8494 args: ref pattern5_1, 8495 } => { 8496 match pattern5_0 { 8497 &Opcode::Umulhi => { 8498 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8499 // Rule at src/isa/s390x/lower.isle line 252. 8500 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern7_0)?; 8501 let expr1_0 = constructor_put_in_reg_zext64(ctx, pattern7_1)?; 8502 let expr2_0: Type = I64; 8503 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8504 let expr4_0: Type = I64; 8505 let expr5_0: u8 = 32; 8506 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8507 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8508 return Some(expr7_0); 8509 } 8510 &Opcode::Smulhi => { 8511 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8512 // Rule at src/isa/s390x/lower.isle line 274. 8513 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern7_0)?; 8514 let expr1_0 = constructor_put_in_reg_sext64(ctx, pattern7_1)?; 8515 let expr2_0: Type = I64; 8516 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 8517 let expr4_0: Type = I64; 8518 let expr5_0: u8 = 32; 8519 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 8520 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 8521 return Some(expr7_0); 8522 } 8523 _ => {} 8524 } 8525 } 8526 &InstructionData::Unary { 8527 opcode: ref pattern5_0, 8528 arg: pattern5_1, 8529 } => { 8530 if let &Opcode::Bitcast = pattern5_0 { 8531 let pattern7_0 = C::value_type(ctx, pattern5_1); 8532 if pattern7_0 == F32 { 8533 // Rule at src/isa/s390x/lower.isle line 1145. 8534 let expr0_0: Type = I64; 8535 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8536 let expr2_0 = constructor_mov_from_fpr(ctx, expr1_0)?; 8537 let expr3_0: u8 = 32; 8538 let expr4_0 = constructor_lshr_imm(ctx, expr0_0, expr2_0, expr3_0)?; 8539 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8540 return Some(expr5_0); 8541 } 8542 } 8543 } 8544 &InstructionData::LoadNoOffset { 8545 opcode: ref pattern5_0, 8546 arg: pattern5_1, 8547 flags: pattern5_2, 8548 } => { 8549 if let &Opcode::AtomicLoad = pattern5_0 { 8550 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8551 // Rule at src/isa/s390x/lower.isle line 1842. 8552 let expr0_0 = C::zero_offset(ctx); 8553 let expr1_0 = 8554 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8555 let expr2_0 = constructor_loadrev32(ctx, &expr1_0)?; 8556 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8557 return Some(expr3_0); 8558 } 8559 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8560 // Rule at src/isa/s390x/lower.isle line 1838. 8561 let expr0_0 = C::zero_offset(ctx); 8562 let expr1_0 = 8563 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8564 let expr2_0 = constructor_load32(ctx, &expr1_0)?; 8565 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8566 return Some(expr3_0); 8567 } 8568 } 8569 } 8570 &InstructionData::Load { 8571 opcode: ref pattern5_0, 8572 arg: pattern5_1, 8573 flags: pattern5_2, 8574 offset: pattern5_3, 8575 } => { 8576 if let &Opcode::Load = pattern5_0 { 8577 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8578 // Rule at src/isa/s390x/lower.isle line 1198. 8579 let expr0_0 = 8580 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8581 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 8582 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8583 return Some(expr2_0); 8584 } 8585 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8586 // Rule at src/isa/s390x/lower.isle line 1194. 8587 let expr0_0 = 8588 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8589 let expr1_0 = constructor_load32(ctx, &expr0_0)?; 8590 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8591 return Some(expr2_0); 8592 } 8593 } 8594 } 8595 _ => {} 8596 } 8597 } 8598 if pattern2_0 == I64 { 8599 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8600 match &pattern4_0 { 8601 &InstructionData::Binary { 8602 opcode: ref pattern5_0, 8603 args: ref pattern5_1, 8604 } => { 8605 match pattern5_0 { 8606 &Opcode::Umulhi => { 8607 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8608 // Rule at src/isa/s390x/lower.isle line 259. 8609 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8610 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8611 let expr2_0 = constructor_umul_wide(ctx, expr0_0, expr1_0)?; 8612 let expr3_0: Type = I64; 8613 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8614 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8615 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8616 return Some(expr6_0); 8617 } 8618 &Opcode::Smulhi => { 8619 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 8620 // Rule at src/isa/s390x/lower.isle line 281. 8621 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 8622 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 8623 let expr2_0 = constructor_smul_wide(ctx, expr0_0, expr1_0)?; 8624 let expr3_0: Type = I64; 8625 let expr4_0 = constructor_regpair_hi(ctx, &expr2_0)?; 8626 let expr5_0 = constructor_copy_reg(ctx, expr3_0, expr4_0)?; 8627 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 8628 return Some(expr6_0); 8629 } 8630 _ => {} 8631 } 8632 } 8633 &InstructionData::Unary { 8634 opcode: ref pattern5_0, 8635 arg: pattern5_1, 8636 } => { 8637 if let &Opcode::Bitcast = pattern5_0 { 8638 let pattern7_0 = C::value_type(ctx, pattern5_1); 8639 if pattern7_0 == F64 { 8640 // Rule at src/isa/s390x/lower.isle line 1135. 8641 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8642 let expr1_0 = constructor_mov_from_fpr(ctx, expr0_0)?; 8643 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8644 return Some(expr2_0); 8645 } 8646 } 8647 } 8648 &InstructionData::LoadNoOffset { 8649 opcode: ref pattern5_0, 8650 arg: pattern5_1, 8651 flags: pattern5_2, 8652 } => { 8653 if let &Opcode::AtomicLoad = pattern5_0 { 8654 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8655 // Rule at src/isa/s390x/lower.isle line 1850. 8656 let expr0_0 = C::zero_offset(ctx); 8657 let expr1_0 = 8658 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8659 let expr2_0 = constructor_loadrev64(ctx, &expr1_0)?; 8660 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8661 return Some(expr3_0); 8662 } 8663 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8664 // Rule at src/isa/s390x/lower.isle line 1846. 8665 let expr0_0 = C::zero_offset(ctx); 8666 let expr1_0 = 8667 constructor_lower_address(ctx, pattern5_2, pattern5_1, expr0_0)?; 8668 let expr2_0 = constructor_load64(ctx, &expr1_0)?; 8669 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8670 return Some(expr3_0); 8671 } 8672 } 8673 } 8674 &InstructionData::Load { 8675 opcode: ref pattern5_0, 8676 arg: pattern5_1, 8677 flags: pattern5_2, 8678 offset: pattern5_3, 8679 } => { 8680 if let &Opcode::Load = pattern5_0 { 8681 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8682 // Rule at src/isa/s390x/lower.isle line 1206. 8683 let expr0_0 = 8684 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8685 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8686 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8687 return Some(expr2_0); 8688 } 8689 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8690 // Rule at src/isa/s390x/lower.isle line 1202. 8691 let expr0_0 = 8692 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8693 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8694 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8695 return Some(expr2_0); 8696 } 8697 } 8698 } 8699 _ => {} 8700 } 8701 } 8702 if pattern2_0 == R64 { 8703 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8704 if let &InstructionData::Load { 8705 opcode: ref pattern5_0, 8706 arg: pattern5_1, 8707 flags: pattern5_2, 8708 offset: pattern5_3, 8709 } = &pattern4_0 8710 { 8711 if let &Opcode::Load = pattern5_0 { 8712 if let Some(()) = C::littleendian(ctx, pattern5_2) { 8713 // Rule at src/isa/s390x/lower.isle line 1214. 8714 let expr0_0 = 8715 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8716 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 8717 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8718 return Some(expr2_0); 8719 } 8720 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8721 // Rule at src/isa/s390x/lower.isle line 1210. 8722 let expr0_0 = 8723 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8724 let expr1_0 = constructor_load64(ctx, &expr0_0)?; 8725 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8726 return Some(expr2_0); 8727 } 8728 } 8729 } 8730 } 8731 if pattern2_0 == F32 { 8732 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8733 match &pattern4_0 { 8734 &InstructionData::Unary { 8735 opcode: ref pattern5_0, 8736 arg: pattern5_1, 8737 } => { 8738 if let &Opcode::Bitcast = pattern5_0 { 8739 let pattern7_0 = C::value_type(ctx, pattern5_1); 8740 if pattern7_0 == I32 { 8741 // Rule at src/isa/s390x/lower.isle line 1140. 8742 let expr0_0: Type = I64; 8743 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 8744 let expr2_0: u8 = 32; 8745 let expr3_0 = constructor_lshl_imm(ctx, expr0_0, expr1_0, expr2_0)?; 8746 let expr4_0 = constructor_mov_to_fpr(ctx, expr3_0)?; 8747 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 8748 return Some(expr5_0); 8749 } 8750 } 8751 } 8752 &InstructionData::Load { 8753 opcode: ref pattern5_0, 8754 arg: pattern5_1, 8755 flags: pattern5_2, 8756 offset: pattern5_3, 8757 } => { 8758 if let &Opcode::Load = pattern5_0 { 8759 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8760 // Rule at src/isa/s390x/lower.isle line 1218. 8761 let expr0_0 = 8762 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8763 let expr1_0 = constructor_fpu_load32(ctx, &expr0_0)?; 8764 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8765 return Some(expr2_0); 8766 } 8767 } 8768 } 8769 _ => {} 8770 } 8771 } 8772 if pattern2_0 == F64 { 8773 let pattern4_0 = C::inst_data(ctx, pattern0_0); 8774 match &pattern4_0 { 8775 &InstructionData::Unary { 8776 opcode: ref pattern5_0, 8777 arg: pattern5_1, 8778 } => { 8779 if let &Opcode::Bitcast = pattern5_0 { 8780 let pattern7_0 = C::value_type(ctx, pattern5_1); 8781 if pattern7_0 == I64 { 8782 // Rule at src/isa/s390x/lower.isle line 1131. 8783 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 8784 let expr1_0 = constructor_mov_to_fpr(ctx, expr0_0)?; 8785 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8786 return Some(expr2_0); 8787 } 8788 } 8789 } 8790 &InstructionData::Load { 8791 opcode: ref pattern5_0, 8792 arg: pattern5_1, 8793 flags: pattern5_2, 8794 offset: pattern5_3, 8795 } => { 8796 if let &Opcode::Load = pattern5_0 { 8797 if let Some(()) = C::bigendian(ctx, pattern5_2) { 8798 // Rule at src/isa/s390x/lower.isle line 1233. 8799 let expr0_0 = 8800 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 8801 let expr1_0 = constructor_fpu_load64(ctx, &expr0_0)?; 8802 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8803 return Some(expr2_0); 8804 } 8805 } 8806 } 8807 _ => {} 8808 } 8809 } 8810 let pattern3_0 = C::inst_data(ctx, pattern0_0); 8811 match &pattern3_0 { 8812 &InstructionData::NullAry { 8813 opcode: ref pattern4_0, 8814 } => { 8815 if let &Opcode::Null = pattern4_0 { 8816 // Rule at src/isa/s390x/lower.isle line 41. 8817 let expr0_0: u64 = 0; 8818 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8819 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8820 return Some(expr2_0); 8821 } 8822 } 8823 &InstructionData::UnaryImm { 8824 opcode: ref pattern4_0, 8825 imm: pattern4_1, 8826 } => { 8827 if let &Opcode::Iconst = pattern4_0 { 8828 let pattern6_0 = C::u64_from_imm64(ctx, pattern4_1); 8829 // Rule at src/isa/s390x/lower.isle line 15. 8830 let expr0_0 = constructor_imm(ctx, pattern2_0, pattern6_0)?; 8831 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8832 return Some(expr1_0); 8833 } 8834 } 8835 &InstructionData::StackLoad { 8836 opcode: ref pattern4_0, 8837 stack_slot: pattern4_1, 8838 offset: pattern4_2, 8839 } => { 8840 if let &Opcode::StackAddr = pattern4_0 { 8841 // Rule at src/isa/s390x/lower.isle line 1152. 8842 let expr0_0 = 8843 constructor_stack_addr_impl(ctx, pattern2_0, pattern4_1, pattern4_2)?; 8844 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 8845 return Some(expr1_0); 8846 } 8847 } 8848 &InstructionData::UnaryBool { 8849 opcode: ref pattern4_0, 8850 imm: pattern4_1, 8851 } => { 8852 if let &Opcode::Bconst = pattern4_0 { 8853 if pattern4_1 == true { 8854 // Rule at src/isa/s390x/lower.isle line 23. 8855 let expr0_0: u64 = 1; 8856 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8857 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8858 return Some(expr2_0); 8859 } 8860 if pattern4_1 == false { 8861 // Rule at src/isa/s390x/lower.isle line 21. 8862 let expr0_0: u64 = 0; 8863 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 8864 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8865 return Some(expr2_0); 8866 } 8867 } 8868 } 8869 &InstructionData::Binary { 8870 opcode: ref pattern4_0, 8871 args: ref pattern4_1, 8872 } => { 8873 match pattern4_0 { 8874 &Opcode::Fadd => { 8875 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8876 // Rule at src/isa/s390x/lower.isle line 920. 8877 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8878 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8879 let expr2_0 = constructor_fadd_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8880 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8881 return Some(expr3_0); 8882 } 8883 &Opcode::Fsub => { 8884 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8885 // Rule at src/isa/s390x/lower.isle line 927. 8886 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8887 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8888 let expr2_0 = constructor_fsub_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8889 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8890 return Some(expr3_0); 8891 } 8892 &Opcode::Fmul => { 8893 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8894 // Rule at src/isa/s390x/lower.isle line 934. 8895 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8896 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8897 let expr2_0 = constructor_fmul_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8898 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8899 return Some(expr3_0); 8900 } 8901 &Opcode::Fdiv => { 8902 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8903 // Rule at src/isa/s390x/lower.isle line 941. 8904 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8905 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8906 let expr2_0 = constructor_fdiv_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8907 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8908 return Some(expr3_0); 8909 } 8910 &Opcode::Fcopysign => { 8911 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8912 // Rule at src/isa/s390x/lower.isle line 962. 8913 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8914 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8915 let expr2_0 = constructor_fpu_copysign(ctx, pattern2_0, expr0_0, expr1_0)?; 8916 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8917 return Some(expr3_0); 8918 } 8919 &Opcode::Fmin => { 8920 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8921 // Rule at src/isa/s390x/lower.isle line 948. 8922 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8923 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8924 let expr2_0 = constructor_fmin_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8925 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8926 return Some(expr3_0); 8927 } 8928 &Opcode::Fmax => { 8929 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8930 // Rule at src/isa/s390x/lower.isle line 955. 8931 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8932 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8933 let expr2_0 = constructor_fmax_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 8934 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8935 return Some(expr3_0); 8936 } 8937 _ => {} 8938 } 8939 } 8940 &InstructionData::FloatCompare { 8941 opcode: ref pattern4_0, 8942 args: ref pattern4_1, 8943 cond: ref pattern4_2, 8944 } => { 8945 if let &Opcode::Fcmp = pattern4_0 { 8946 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8947 // Rule at src/isa/s390x/lower.isle line 2004. 8948 let expr0_0 = constructor_fcmp_val(ctx, pattern4_2, pattern6_0, pattern6_1)?; 8949 let expr1_0 = constructor_lower_bool(ctx, pattern2_0, &expr0_0)?; 8950 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 8951 return Some(expr2_0); 8952 } 8953 } 8954 &InstructionData::IntCompare { 8955 opcode: ref pattern4_0, 8956 args: ref pattern4_1, 8957 cond: ref pattern4_2, 8958 } => { 8959 if let &Opcode::Icmp = pattern4_0 { 8960 let (pattern6_0, pattern6_1) = C::unpack_value_array_2(ctx, pattern4_1); 8961 // Rule at src/isa/s390x/lower.isle line 1915. 8962 let expr0_0: bool = true; 8963 let expr1_0 = 8964 constructor_icmp_val(ctx, expr0_0, pattern4_2, pattern6_0, pattern6_1)?; 8965 let expr2_0 = constructor_lower_bool(ctx, pattern2_0, &expr1_0)?; 8966 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 8967 return Some(expr3_0); 8968 } 8969 } 8970 &InstructionData::Ternary { 8971 opcode: ref pattern4_0, 8972 args: ref pattern4_1, 8973 } => { 8974 match pattern4_0 { 8975 &Opcode::Select => { 8976 let (pattern6_0, pattern6_1, pattern6_2) = 8977 C::unpack_value_array_3(ctx, pattern4_1); 8978 // Rule at src/isa/s390x/lower.isle line 2046. 8979 let expr0_0 = constructor_value_nonzero(ctx, pattern6_0)?; 8980 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8981 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8982 let expr3_0 = constructor_select_bool_reg( 8983 ctx, pattern2_0, &expr0_0, expr1_0, expr2_0, 8984 )?; 8985 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8986 return Some(expr4_0); 8987 } 8988 &Opcode::Fma => { 8989 let (pattern6_0, pattern6_1, pattern6_2) = 8990 C::unpack_value_array_3(ctx, pattern4_1); 8991 // Rule at src/isa/s390x/lower.isle line 969. 8992 let expr0_0 = C::put_in_reg(ctx, pattern6_0); 8993 let expr1_0 = C::put_in_reg(ctx, pattern6_1); 8994 let expr2_0 = C::put_in_reg(ctx, pattern6_2); 8995 let expr3_0 = 8996 constructor_fma_reg(ctx, pattern2_0, expr0_0, expr1_0, expr2_0)?; 8997 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 8998 return Some(expr4_0); 8999 } 9000 _ => {} 9001 } 9002 } 9003 &InstructionData::IntSelect { 9004 opcode: ref pattern4_0, 9005 args: ref pattern4_1, 9006 cond: ref pattern4_2, 9007 } => { 9008 if let &Opcode::SelectifSpectreGuard = pattern4_0 { 9009 let (pattern6_0, pattern6_1, pattern6_2) = 9010 C::unpack_value_array_3(ctx, pattern4_1); 9011 if let Some(pattern7_0) = C::def_inst(ctx, pattern6_0) { 9012 let pattern8_0 = C::inst_data(ctx, pattern7_0); 9013 if let &InstructionData::Binary { 9014 opcode: ref pattern9_0, 9015 args: ref pattern9_1, 9016 } = &pattern8_0 9017 { 9018 if let &Opcode::Ifcmp = pattern9_0 { 9019 let (pattern11_0, pattern11_1) = 9020 C::unpack_value_array_2(ctx, pattern9_1); 9021 // Rule at src/isa/s390x/lower.isle line 2058. 9022 let expr0_0: bool = false; 9023 let expr1_0 = constructor_icmp_val( 9024 ctx, 9025 expr0_0, 9026 pattern4_2, 9027 pattern11_0, 9028 pattern11_1, 9029 )?; 9030 let expr2_0 = C::put_in_reg(ctx, pattern6_1); 9031 let expr3_0 = C::put_in_reg(ctx, pattern6_2); 9032 let expr4_0 = constructor_select_bool_reg( 9033 ctx, pattern2_0, &expr1_0, expr2_0, expr3_0, 9034 )?; 9035 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9036 return Some(expr5_0); 9037 } 9038 } 9039 } 9040 } 9041 } 9042 &InstructionData::Unary { 9043 opcode: ref pattern4_0, 9044 arg: pattern4_1, 9045 } => { 9046 match pattern4_0 { 9047 &Opcode::Sqrt => { 9048 // Rule at src/isa/s390x/lower.isle line 976. 9049 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9050 let expr1_0 = constructor_sqrt_reg(ctx, pattern2_0, expr0_0)?; 9051 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9052 return Some(expr2_0); 9053 } 9054 &Opcode::Fneg => { 9055 // Rule at src/isa/s390x/lower.isle line 983. 9056 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9057 let expr1_0 = constructor_fneg_reg(ctx, pattern2_0, expr0_0)?; 9058 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9059 return Some(expr2_0); 9060 } 9061 &Opcode::Fabs => { 9062 // Rule at src/isa/s390x/lower.isle line 990. 9063 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9064 let expr1_0 = constructor_fabs_reg(ctx, pattern2_0, expr0_0)?; 9065 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9066 return Some(expr2_0); 9067 } 9068 &Opcode::Ceil => { 9069 // Rule at src/isa/s390x/lower.isle line 997. 9070 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9071 let expr1_0 = constructor_ceil_reg(ctx, pattern2_0, expr0_0)?; 9072 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9073 return Some(expr2_0); 9074 } 9075 &Opcode::Floor => { 9076 // Rule at src/isa/s390x/lower.isle line 1004. 9077 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9078 let expr1_0 = constructor_floor_reg(ctx, pattern2_0, expr0_0)?; 9079 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9080 return Some(expr2_0); 9081 } 9082 &Opcode::Trunc => { 9083 // Rule at src/isa/s390x/lower.isle line 1011. 9084 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9085 let expr1_0 = constructor_trunc_reg(ctx, pattern2_0, expr0_0)?; 9086 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9087 return Some(expr2_0); 9088 } 9089 &Opcode::Nearest => { 9090 // Rule at src/isa/s390x/lower.isle line 1018. 9091 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9092 let expr1_0 = constructor_nearest_reg(ctx, pattern2_0, expr0_0)?; 9093 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9094 return Some(expr2_0); 9095 } 9096 &Opcode::Bextend => { 9097 // Rule at src/isa/s390x/lower.isle line 760. 9098 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9099 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9100 return Some(expr1_0); 9101 } 9102 &Opcode::Bmask => { 9103 // Rule at src/isa/s390x/lower.isle line 762. 9104 let expr0_0 = constructor_cast_bool(ctx, pattern2_0, pattern4_1)?; 9105 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 9106 return Some(expr1_0); 9107 } 9108 &Opcode::Fpromote => { 9109 let pattern6_0 = C::value_type(ctx, pattern4_1); 9110 // Rule at src/isa/s390x/lower.isle line 1025. 9111 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9112 let expr1_0 = 9113 constructor_fpromote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9114 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9115 return Some(expr2_0); 9116 } 9117 &Opcode::Fdemote => { 9118 let pattern6_0 = C::value_type(ctx, pattern4_1); 9119 // Rule at src/isa/s390x/lower.isle line 1032. 9120 let expr0_0 = C::put_in_reg(ctx, pattern4_1); 9121 let expr1_0 = 9122 constructor_fdemote_reg(ctx, pattern2_0, pattern6_0, expr0_0)?; 9123 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9124 return Some(expr2_0); 9125 } 9126 &Opcode::FcvtFromUint => { 9127 let pattern6_0 = C::value_type(ctx, pattern4_1); 9128 // Rule at src/isa/s390x/lower.isle line 1039. 9129 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9130 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern4_1)?; 9131 let expr2_0 = 9132 constructor_fcvt_from_uint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9133 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9134 return Some(expr3_0); 9135 } 9136 &Opcode::FcvtFromSint => { 9137 let pattern6_0 = C::value_type(ctx, pattern4_1); 9138 // Rule at src/isa/s390x/lower.isle line 1047. 9139 let expr0_0 = constructor_ty_ext32(ctx, pattern6_0)?; 9140 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern4_1)?; 9141 let expr2_0 = 9142 constructor_fcvt_from_sint_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 9143 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9144 return Some(expr3_0); 9145 } 9146 _ => {} 9147 } 9148 } 9149 _ => {} 9150 } 9151 if let Some(()) = C::mie2_enabled(ctx, pattern2_0) { 9152 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9153 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9154 match &pattern5_0 { 9155 &InstructionData::Binary { 9156 opcode: ref pattern6_0, 9157 args: ref pattern6_1, 9158 } => { 9159 match pattern6_0 { 9160 &Opcode::BandNot => { 9161 let (pattern8_0, pattern8_1) = 9162 C::unpack_value_array_2(ctx, pattern6_1); 9163 // Rule at src/isa/s390x/lower.isle line 702. 9164 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9165 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9166 let expr2_0 = 9167 constructor_and_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9168 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9169 return Some(expr3_0); 9170 } 9171 &Opcode::BorNot => { 9172 let (pattern8_0, pattern8_1) = 9173 C::unpack_value_array_2(ctx, pattern6_1); 9174 // Rule at src/isa/s390x/lower.isle line 713. 9175 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9176 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9177 let expr2_0 = 9178 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9179 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9180 return Some(expr3_0); 9181 } 9182 &Opcode::BxorNot => { 9183 let (pattern8_0, pattern8_1) = 9184 C::unpack_value_array_2(ctx, pattern6_1); 9185 // Rule at src/isa/s390x/lower.isle line 724. 9186 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9187 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9188 let expr2_0 = 9189 constructor_xor_not_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9190 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9191 return Some(expr3_0); 9192 } 9193 _ => {} 9194 } 9195 } 9196 &InstructionData::Ternary { 9197 opcode: ref pattern6_0, 9198 args: ref pattern6_1, 9199 } => { 9200 if let &Opcode::Bitselect = pattern6_0 { 9201 let (pattern8_0, pattern8_1, pattern8_2) = 9202 C::unpack_value_array_3(ctx, pattern6_1); 9203 // Rule at src/isa/s390x/lower.isle line 735. 9204 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9205 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9206 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9207 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9208 let expr4_0 = 9209 constructor_and_not_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9210 let expr5_0 = constructor_or_reg(ctx, pattern4_0, expr4_0, expr2_0)?; 9211 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9212 return Some(expr6_0); 9213 } 9214 } 9215 &InstructionData::Unary { 9216 opcode: ref pattern6_0, 9217 arg: pattern6_1, 9218 } => { 9219 match pattern6_0 { 9220 &Opcode::Bnot => { 9221 // Rule at src/isa/s390x/lower.isle line 625. 9222 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9223 let expr1_0 = 9224 constructor_or_not_reg(ctx, pattern4_0, expr0_0, expr0_0)?; 9225 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9226 return Some(expr2_0); 9227 } 9228 &Opcode::Popcnt => { 9229 // Rule at src/isa/s390x/lower.isle line 889. 9230 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern6_1)?; 9231 let expr1_0 = constructor_popcnt_reg(ctx, expr0_0)?; 9232 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9233 return Some(expr2_0); 9234 } 9235 _ => {} 9236 } 9237 } 9238 _ => {} 9239 } 9240 } 9241 } 9242 if let Some(()) = C::mie2_disabled(ctx, pattern2_0) { 9243 if pattern2_0 == I16 { 9244 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9245 if let &InstructionData::Unary { 9246 opcode: ref pattern6_0, 9247 arg: pattern6_1, 9248 } = &pattern5_0 9249 { 9250 if let &Opcode::Popcnt = pattern6_0 { 9251 // Rule at src/isa/s390x/lower.isle line 898. 9252 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9253 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9254 let expr2_0: Type = I32; 9255 let expr3_0: Type = I32; 9256 let expr4_0: u8 = 8; 9257 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9258 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9259 let expr7_0: Type = I32; 9260 let expr8_0: u8 = 8; 9261 let expr9_0 = constructor_lshr_imm(ctx, expr7_0, expr6_0, expr8_0)?; 9262 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 9263 return Some(expr10_0); 9264 } 9265 } 9266 } 9267 if pattern2_0 == I32 { 9268 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9269 if let &InstructionData::Unary { 9270 opcode: ref pattern6_0, 9271 arg: pattern6_1, 9272 } = &pattern5_0 9273 { 9274 if let &Opcode::Popcnt = pattern6_0 { 9275 // Rule at src/isa/s390x/lower.isle line 903. 9276 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9277 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9278 let expr2_0: Type = I32; 9279 let expr3_0: Type = I32; 9280 let expr4_0: u8 = 16; 9281 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9282 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9283 let expr7_0: Type = I32; 9284 let expr8_0: Type = I32; 9285 let expr9_0: u8 = 8; 9286 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9287 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9288 let expr12_0: Type = I32; 9289 let expr13_0: u8 = 24; 9290 let expr14_0 = constructor_lshr_imm(ctx, expr12_0, expr11_0, expr13_0)?; 9291 let expr15_0 = constructor_output_reg(ctx, expr14_0)?; 9292 return Some(expr15_0); 9293 } 9294 } 9295 } 9296 if pattern2_0 == I64 { 9297 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9298 if let &InstructionData::Unary { 9299 opcode: ref pattern6_0, 9300 arg: pattern6_1, 9301 } = &pattern5_0 9302 { 9303 if let &Opcode::Popcnt = pattern6_0 { 9304 // Rule at src/isa/s390x/lower.isle line 909. 9305 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9306 let expr1_0 = constructor_popcnt_byte(ctx, expr0_0)?; 9307 let expr2_0: Type = I64; 9308 let expr3_0: Type = I64; 9309 let expr4_0: u8 = 32; 9310 let expr5_0 = constructor_lshl_imm(ctx, expr3_0, expr1_0, expr4_0)?; 9311 let expr6_0 = constructor_add_reg(ctx, expr2_0, expr1_0, expr5_0)?; 9312 let expr7_0: Type = I64; 9313 let expr8_0: Type = I64; 9314 let expr9_0: u8 = 16; 9315 let expr10_0 = constructor_lshl_imm(ctx, expr8_0, expr6_0, expr9_0)?; 9316 let expr11_0 = constructor_add_reg(ctx, expr7_0, expr6_0, expr10_0)?; 9317 let expr12_0: Type = I64; 9318 let expr13_0: Type = I64; 9319 let expr14_0: u8 = 8; 9320 let expr15_0 = constructor_lshl_imm(ctx, expr13_0, expr11_0, expr14_0)?; 9321 let expr16_0 = constructor_add_reg(ctx, expr12_0, expr11_0, expr15_0)?; 9322 let expr17_0: Type = I64; 9323 let expr18_0: u8 = 56; 9324 let expr19_0 = constructor_lshr_imm(ctx, expr17_0, expr16_0, expr18_0)?; 9325 let expr20_0 = constructor_output_reg(ctx, expr19_0)?; 9326 return Some(expr20_0); 9327 } 9328 } 9329 } 9330 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern2_0) { 9331 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9332 match &pattern5_0 { 9333 &InstructionData::Binary { 9334 opcode: ref pattern6_0, 9335 args: ref pattern6_1, 9336 } => { 9337 match pattern6_0 { 9338 &Opcode::BandNot => { 9339 let (pattern8_0, pattern8_1) = 9340 C::unpack_value_array_2(ctx, pattern6_1); 9341 // Rule at src/isa/s390x/lower.isle line 706. 9342 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9343 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9344 let expr2_0 = 9345 constructor_and_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9346 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9347 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9348 return Some(expr4_0); 9349 } 9350 &Opcode::BorNot => { 9351 let (pattern8_0, pattern8_1) = 9352 C::unpack_value_array_2(ctx, pattern6_1); 9353 // Rule at src/isa/s390x/lower.isle line 717. 9354 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9355 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9356 let expr2_0 = 9357 constructor_or_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9358 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9359 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9360 return Some(expr4_0); 9361 } 9362 &Opcode::BxorNot => { 9363 let (pattern8_0, pattern8_1) = 9364 C::unpack_value_array_2(ctx, pattern6_1); 9365 // Rule at src/isa/s390x/lower.isle line 728. 9366 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9367 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9368 let expr2_0 = 9369 constructor_xor_reg(ctx, pattern4_0, expr0_0, expr1_0)?; 9370 let expr3_0 = constructor_not_reg(ctx, pattern4_0, expr2_0)?; 9371 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 9372 return Some(expr4_0); 9373 } 9374 _ => {} 9375 } 9376 } 9377 &InstructionData::Ternary { 9378 opcode: ref pattern6_0, 9379 args: ref pattern6_1, 9380 } => { 9381 if let &Opcode::Bitselect = pattern6_0 { 9382 let (pattern8_0, pattern8_1, pattern8_2) = 9383 C::unpack_value_array_3(ctx, pattern6_1); 9384 // Rule at src/isa/s390x/lower.isle line 742. 9385 let expr0_0 = C::put_in_reg(ctx, pattern8_0); 9386 let expr1_0 = C::put_in_reg(ctx, pattern8_1); 9387 let expr2_0 = constructor_and_reg(ctx, pattern4_0, expr1_0, expr0_0)?; 9388 let expr3_0 = C::put_in_reg(ctx, pattern8_2); 9389 let expr4_0 = constructor_and_reg(ctx, pattern4_0, expr3_0, expr0_0)?; 9390 let expr5_0 = constructor_not_reg(ctx, pattern4_0, expr4_0)?; 9391 let expr6_0 = constructor_or_reg(ctx, pattern4_0, expr5_0, expr2_0)?; 9392 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 9393 return Some(expr7_0); 9394 } 9395 } 9396 &InstructionData::Unary { 9397 opcode: ref pattern6_0, 9398 arg: pattern6_1, 9399 } => { 9400 if let &Opcode::Bnot = pattern6_0 { 9401 // Rule at src/isa/s390x/lower.isle line 630. 9402 let expr0_0 = C::put_in_reg(ctx, pattern6_1); 9403 let expr1_0 = constructor_not_reg(ctx, pattern4_0, expr0_0)?; 9404 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9405 return Some(expr2_0); 9406 } 9407 } 9408 _ => {} 9409 } 9410 } 9411 } 9412 if let Some(()) = C::vxrs_ext2_enabled(ctx, pattern2_0) { 9413 if pattern2_0 == F32 { 9414 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9415 if let &InstructionData::Load { 9416 opcode: ref pattern6_0, 9417 arg: pattern6_1, 9418 flags: pattern6_2, 9419 offset: pattern6_3, 9420 } = &pattern5_0 9421 { 9422 if let &Opcode::Load = pattern6_0 { 9423 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9424 // Rule at src/isa/s390x/lower.isle line 1222. 9425 let expr0_0 = 9426 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9427 let expr1_0 = constructor_fpu_loadrev32(ctx, &expr0_0)?; 9428 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9429 return Some(expr2_0); 9430 } 9431 } 9432 } 9433 } 9434 if pattern2_0 == F64 { 9435 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9436 if let &InstructionData::Load { 9437 opcode: ref pattern6_0, 9438 arg: pattern6_1, 9439 flags: pattern6_2, 9440 offset: pattern6_3, 9441 } = &pattern5_0 9442 { 9443 if let &Opcode::Load = pattern6_0 { 9444 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9445 // Rule at src/isa/s390x/lower.isle line 1237. 9446 let expr0_0 = 9447 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9448 let expr1_0 = constructor_fpu_loadrev64(ctx, &expr0_0)?; 9449 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9450 return Some(expr2_0); 9451 } 9452 } 9453 } 9454 } 9455 } 9456 if let Some(()) = C::vxrs_ext2_disabled(ctx, pattern2_0) { 9457 if pattern2_0 == F32 { 9458 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9459 if let &InstructionData::Load { 9460 opcode: ref pattern6_0, 9461 arg: pattern6_1, 9462 flags: pattern6_2, 9463 offset: pattern6_3, 9464 } = &pattern5_0 9465 { 9466 if let &Opcode::Load = pattern6_0 { 9467 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9468 // Rule at src/isa/s390x/lower.isle line 1227. 9469 let expr0_0 = 9470 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9471 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 9472 let expr2_0: Type = I64; 9473 let expr3_0: u8 = 32; 9474 let expr4_0 = constructor_lshl_imm(ctx, expr2_0, expr1_0, expr3_0)?; 9475 let expr5_0 = constructor_mov_to_fpr(ctx, expr4_0)?; 9476 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 9477 return Some(expr6_0); 9478 } 9479 } 9480 } 9481 } 9482 if pattern2_0 == F64 { 9483 let pattern5_0 = C::inst_data(ctx, pattern0_0); 9484 if let &InstructionData::Load { 9485 opcode: ref pattern6_0, 9486 arg: pattern6_1, 9487 flags: pattern6_2, 9488 offset: pattern6_3, 9489 } = &pattern5_0 9490 { 9491 if let &Opcode::Load = pattern6_0 { 9492 if let Some(()) = C::littleendian(ctx, pattern6_2) { 9493 // Rule at src/isa/s390x/lower.isle line 1242. 9494 let expr0_0 = 9495 constructor_lower_address(ctx, pattern6_2, pattern6_1, pattern6_3)?; 9496 let expr1_0 = constructor_loadrev64(ctx, &expr0_0)?; 9497 let expr2_0 = constructor_mov_to_fpr(ctx, expr1_0)?; 9498 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9499 return Some(expr3_0); 9500 } 9501 } 9502 } 9503 } 9504 } 9505 if let Some(pattern3_0) = C::fits_in_16(ctx, pattern2_0) { 9506 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9507 if let &InstructionData::Unary { 9508 opcode: ref pattern5_0, 9509 arg: pattern5_1, 9510 } = &pattern4_0 9511 { 9512 if let &Opcode::Bint = pattern5_0 { 9513 // Rule at src/isa/s390x/lower.isle line 796. 9514 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9515 let expr1_0: u16 = 1; 9516 let expr2_0: u8 = 0; 9517 let expr3_0 = C::uimm16shifted(ctx, expr1_0, expr2_0); 9518 let expr4_0 = constructor_and_uimm16shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9519 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9520 return Some(expr5_0); 9521 } 9522 } 9523 } 9524 if let Some(pattern3_0) = C::fits_in_32(ctx, pattern2_0) { 9525 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9526 if let &InstructionData::Unary { 9527 opcode: ref pattern5_0, 9528 arg: pattern5_1, 9529 } = &pattern4_0 9530 { 9531 if let &Opcode::Bint = pattern5_0 { 9532 // Rule at src/isa/s390x/lower.isle line 800. 9533 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 9534 let expr1_0: u32 = 1; 9535 let expr2_0: u8 = 0; 9536 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 9537 let expr4_0 = constructor_and_uimm32shifted(ctx, pattern3_0, expr0_0, expr3_0)?; 9538 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 9539 return Some(expr5_0); 9540 } 9541 } 9542 } 9543 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 9544 let pattern4_0 = C::inst_data(ctx, pattern0_0); 9545 match &pattern4_0 { 9546 &InstructionData::Binary { 9547 opcode: ref pattern5_0, 9548 args: ref pattern5_1, 9549 } => { 9550 match pattern5_0 { 9551 &Opcode::Iadd => { 9552 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9553 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9554 // Rule at src/isa/s390x/lower.isle line 72. 9555 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9556 let expr1_0 = 9557 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9558 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9559 return Some(expr2_0); 9560 } 9561 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9562 // Rule at src/isa/s390x/lower.isle line 76. 9563 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9564 let expr1_0 = 9565 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9566 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9567 return Some(expr2_0); 9568 } 9569 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9570 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9571 if let &InstructionData::Unary { 9572 opcode: ref pattern10_0, 9573 arg: pattern10_1, 9574 } = &pattern9_0 9575 { 9576 if let &Opcode::Sextend = pattern10_0 { 9577 let pattern12_0 = C::value_type(ctx, pattern10_1); 9578 if pattern12_0 == I32 { 9579 // Rule at src/isa/s390x/lower.isle line 66. 9580 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9581 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9582 let expr2_0 = constructor_add_reg_sext32( 9583 ctx, pattern3_0, expr0_0, expr1_0, 9584 )?; 9585 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9586 return Some(expr3_0); 9587 } 9588 } 9589 } 9590 } 9591 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 9592 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9593 if let &InstructionData::Load { 9594 opcode: ref pattern10_0, 9595 arg: pattern10_1, 9596 flags: pattern10_2, 9597 offset: pattern10_3, 9598 } = &pattern9_0 9599 { 9600 match pattern10_0 { 9601 &Opcode::Sload16 => { 9602 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9603 // Rule at src/isa/s390x/lower.isle line 94. 9604 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9605 let expr1_0 = 9606 constructor_sink_sload16(ctx, pattern8_0)?; 9607 let expr2_0 = constructor_add_mem_sext16( 9608 ctx, pattern3_0, expr0_0, &expr1_0, 9609 )?; 9610 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9611 return Some(expr3_0); 9612 } 9613 } 9614 &Opcode::Sload32 => { 9615 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9616 // Rule at src/isa/s390x/lower.isle line 98. 9617 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9618 let expr1_0 = 9619 constructor_sink_sload32(ctx, pattern8_0)?; 9620 let expr2_0 = constructor_add_mem_sext32( 9621 ctx, pattern3_0, expr0_0, &expr1_0, 9622 )?; 9623 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9624 return Some(expr3_0); 9625 } 9626 } 9627 _ => {} 9628 } 9629 } 9630 } 9631 let pattern8_0 = C::value_type(ctx, pattern7_0); 9632 if pattern8_0 == I16 { 9633 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9634 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9635 if let &InstructionData::Load { 9636 opcode: ref pattern12_0, 9637 arg: pattern12_1, 9638 flags: pattern12_2, 9639 offset: pattern12_3, 9640 } = &pattern11_0 9641 { 9642 if let &Opcode::Load = pattern12_0 { 9643 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9644 // Rule at src/isa/s390x/lower.isle line 88. 9645 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9646 let expr1_0 = 9647 constructor_sink_load(ctx, pattern10_0)?; 9648 let expr2_0 = constructor_add_mem_sext16( 9649 ctx, pattern3_0, expr0_0, &expr1_0, 9650 )?; 9651 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9652 return Some(expr3_0); 9653 } 9654 } 9655 } 9656 } 9657 } 9658 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9659 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 9660 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9661 if let &InstructionData::Load { 9662 opcode: ref pattern12_0, 9663 arg: pattern12_1, 9664 flags: pattern12_2, 9665 offset: pattern12_3, 9666 } = &pattern11_0 9667 { 9668 if let &Opcode::Load = pattern12_0 { 9669 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9670 // Rule at src/isa/s390x/lower.isle line 82. 9671 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9672 let expr1_0 = 9673 constructor_sink_load(ctx, pattern10_0)?; 9674 let expr2_0 = constructor_add_mem( 9675 ctx, pattern3_0, expr0_0, &expr1_0, 9676 )?; 9677 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9678 return Some(expr3_0); 9679 } 9680 } 9681 } 9682 } 9683 } 9684 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 9685 // Rule at src/isa/s390x/lower.isle line 70. 9686 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9687 let expr1_0 = 9688 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9689 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9690 return Some(expr2_0); 9691 } 9692 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 9693 // Rule at src/isa/s390x/lower.isle line 74. 9694 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9695 let expr1_0 = 9696 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9697 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9698 return Some(expr2_0); 9699 } 9700 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9701 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9702 if let &InstructionData::Unary { 9703 opcode: ref pattern10_0, 9704 arg: pattern10_1, 9705 } = &pattern9_0 9706 { 9707 if let &Opcode::Sextend = pattern10_0 { 9708 let pattern12_0 = C::value_type(ctx, pattern10_1); 9709 if pattern12_0 == I32 { 9710 // Rule at src/isa/s390x/lower.isle line 64. 9711 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9712 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9713 let expr2_0 = constructor_add_reg_sext32( 9714 ctx, pattern3_0, expr0_0, expr1_0, 9715 )?; 9716 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9717 return Some(expr3_0); 9718 } 9719 } 9720 } 9721 } 9722 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9723 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9724 if let &InstructionData::Load { 9725 opcode: ref pattern10_0, 9726 arg: pattern10_1, 9727 flags: pattern10_2, 9728 offset: pattern10_3, 9729 } = &pattern9_0 9730 { 9731 match pattern10_0 { 9732 &Opcode::Sload16 => { 9733 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9734 // Rule at src/isa/s390x/lower.isle line 92. 9735 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9736 let expr1_0 = 9737 constructor_sink_sload16(ctx, pattern8_0)?; 9738 let expr2_0 = constructor_add_mem_sext16( 9739 ctx, pattern3_0, expr0_0, &expr1_0, 9740 )?; 9741 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9742 return Some(expr3_0); 9743 } 9744 } 9745 &Opcode::Sload32 => { 9746 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9747 // Rule at src/isa/s390x/lower.isle line 96. 9748 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9749 let expr1_0 = 9750 constructor_sink_sload32(ctx, pattern8_0)?; 9751 let expr2_0 = constructor_add_mem_sext32( 9752 ctx, pattern3_0, expr0_0, &expr1_0, 9753 )?; 9754 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9755 return Some(expr3_0); 9756 } 9757 } 9758 _ => {} 9759 } 9760 } 9761 } 9762 let pattern8_0 = C::value_type(ctx, pattern7_1); 9763 if pattern8_0 == I16 { 9764 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9765 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9766 if let &InstructionData::Load { 9767 opcode: ref pattern12_0, 9768 arg: pattern12_1, 9769 flags: pattern12_2, 9770 offset: pattern12_3, 9771 } = &pattern11_0 9772 { 9773 if let &Opcode::Load = pattern12_0 { 9774 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9775 // Rule at src/isa/s390x/lower.isle line 86. 9776 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9777 let expr1_0 = 9778 constructor_sink_load(ctx, pattern10_0)?; 9779 let expr2_0 = constructor_add_mem_sext16( 9780 ctx, pattern3_0, expr0_0, &expr1_0, 9781 )?; 9782 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9783 return Some(expr3_0); 9784 } 9785 } 9786 } 9787 } 9788 } 9789 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9790 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9791 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9792 if let &InstructionData::Load { 9793 opcode: ref pattern12_0, 9794 arg: pattern12_1, 9795 flags: pattern12_2, 9796 offset: pattern12_3, 9797 } = &pattern11_0 9798 { 9799 if let &Opcode::Load = pattern12_0 { 9800 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9801 // Rule at src/isa/s390x/lower.isle line 80. 9802 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9803 let expr1_0 = 9804 constructor_sink_load(ctx, pattern10_0)?; 9805 let expr2_0 = constructor_add_mem( 9806 ctx, pattern3_0, expr0_0, &expr1_0, 9807 )?; 9808 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9809 return Some(expr3_0); 9810 } 9811 } 9812 } 9813 } 9814 } 9815 // Rule at src/isa/s390x/lower.isle line 60. 9816 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9817 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9818 let expr2_0 = constructor_add_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9819 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9820 return Some(expr3_0); 9821 } 9822 &Opcode::Isub => { 9823 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9824 if let Some(pattern8_0) = C::i16_from_negated_value(ctx, pattern7_1) { 9825 // Rule at src/isa/s390x/lower.isle line 113. 9826 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9827 let expr1_0 = 9828 constructor_add_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9829 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9830 return Some(expr2_0); 9831 } 9832 if let Some(pattern8_0) = C::i32_from_negated_value(ctx, pattern7_1) { 9833 // Rule at src/isa/s390x/lower.isle line 115. 9834 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9835 let expr1_0 = 9836 constructor_add_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9837 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9838 return Some(expr2_0); 9839 } 9840 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 9841 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9842 if let &InstructionData::Unary { 9843 opcode: ref pattern10_0, 9844 arg: pattern10_1, 9845 } = &pattern9_0 9846 { 9847 if let &Opcode::Sextend = pattern10_0 { 9848 let pattern12_0 = C::value_type(ctx, pattern10_1); 9849 if pattern12_0 == I32 { 9850 // Rule at src/isa/s390x/lower.isle line 109. 9851 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9852 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9853 let expr2_0 = constructor_sub_reg_sext32( 9854 ctx, pattern3_0, expr0_0, expr1_0, 9855 )?; 9856 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9857 return Some(expr3_0); 9858 } 9859 } 9860 } 9861 } 9862 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 9863 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9864 if let &InstructionData::Load { 9865 opcode: ref pattern10_0, 9866 arg: pattern10_1, 9867 flags: pattern10_2, 9868 offset: pattern10_3, 9869 } = &pattern9_0 9870 { 9871 match pattern10_0 { 9872 &Opcode::Sload16 => { 9873 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9874 // Rule at src/isa/s390x/lower.isle line 127. 9875 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9876 let expr1_0 = 9877 constructor_sink_sload16(ctx, pattern8_0)?; 9878 let expr2_0 = constructor_sub_mem_sext16( 9879 ctx, pattern3_0, expr0_0, &expr1_0, 9880 )?; 9881 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9882 return Some(expr3_0); 9883 } 9884 } 9885 &Opcode::Sload32 => { 9886 if let Some(()) = C::bigendian(ctx, pattern10_2) { 9887 // Rule at src/isa/s390x/lower.isle line 129. 9888 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9889 let expr1_0 = 9890 constructor_sink_sload32(ctx, pattern8_0)?; 9891 let expr2_0 = constructor_sub_mem_sext32( 9892 ctx, pattern3_0, expr0_0, &expr1_0, 9893 )?; 9894 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9895 return Some(expr3_0); 9896 } 9897 } 9898 _ => {} 9899 } 9900 } 9901 } 9902 let pattern8_0 = C::value_type(ctx, pattern7_1); 9903 if pattern8_0 == I16 { 9904 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9905 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9906 if let &InstructionData::Load { 9907 opcode: ref pattern12_0, 9908 arg: pattern12_1, 9909 flags: pattern12_2, 9910 offset: pattern12_3, 9911 } = &pattern11_0 9912 { 9913 if let &Opcode::Load = pattern12_0 { 9914 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9915 // Rule at src/isa/s390x/lower.isle line 123. 9916 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9917 let expr1_0 = 9918 constructor_sink_load(ctx, pattern10_0)?; 9919 let expr2_0 = constructor_sub_mem_sext16( 9920 ctx, pattern3_0, expr0_0, &expr1_0, 9921 )?; 9922 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9923 return Some(expr3_0); 9924 } 9925 } 9926 } 9927 } 9928 } 9929 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 9930 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 9931 let pattern11_0 = C::inst_data(ctx, pattern10_0); 9932 if let &InstructionData::Load { 9933 opcode: ref pattern12_0, 9934 arg: pattern12_1, 9935 flags: pattern12_2, 9936 offset: pattern12_3, 9937 } = &pattern11_0 9938 { 9939 if let &Opcode::Load = pattern12_0 { 9940 if let Some(()) = C::bigendian(ctx, pattern12_2) { 9941 // Rule at src/isa/s390x/lower.isle line 119. 9942 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9943 let expr1_0 = 9944 constructor_sink_load(ctx, pattern10_0)?; 9945 let expr2_0 = constructor_sub_mem( 9946 ctx, pattern3_0, expr0_0, &expr1_0, 9947 )?; 9948 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9949 return Some(expr3_0); 9950 } 9951 } 9952 } 9953 } 9954 } 9955 // Rule at src/isa/s390x/lower.isle line 105. 9956 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 9957 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 9958 let expr2_0 = constructor_sub_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 9959 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9960 return Some(expr3_0); 9961 } 9962 &Opcode::Imul => { 9963 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 9964 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_0) { 9965 // Rule at src/isa/s390x/lower.isle line 212. 9966 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9967 let expr1_0 = 9968 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 9969 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9970 return Some(expr2_0); 9971 } 9972 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_0) { 9973 // Rule at src/isa/s390x/lower.isle line 216. 9974 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9975 let expr1_0 = 9976 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 9977 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 9978 return Some(expr2_0); 9979 } 9980 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 9981 let pattern9_0 = C::inst_data(ctx, pattern8_0); 9982 if let &InstructionData::Unary { 9983 opcode: ref pattern10_0, 9984 arg: pattern10_1, 9985 } = &pattern9_0 9986 { 9987 if let &Opcode::Sextend = pattern10_0 { 9988 let pattern12_0 = C::value_type(ctx, pattern10_1); 9989 if pattern12_0 == I32 { 9990 // Rule at src/isa/s390x/lower.isle line 206. 9991 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 9992 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 9993 let expr2_0 = constructor_mul_reg_sext32( 9994 ctx, pattern3_0, expr0_0, expr1_0, 9995 )?; 9996 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 9997 return Some(expr3_0); 9998 } 9999 } 10000 } 10001 } 10002 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10003 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10004 if let &InstructionData::Load { 10005 opcode: ref pattern10_0, 10006 arg: pattern10_1, 10007 flags: pattern10_2, 10008 offset: pattern10_3, 10009 } = &pattern9_0 10010 { 10011 match pattern10_0 { 10012 &Opcode::Sload16 => { 10013 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10014 // Rule at src/isa/s390x/lower.isle line 234. 10015 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10016 let expr1_0 = 10017 constructor_sink_sload16(ctx, pattern8_0)?; 10018 let expr2_0 = constructor_mul_mem_sext16( 10019 ctx, pattern3_0, expr0_0, &expr1_0, 10020 )?; 10021 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10022 return Some(expr3_0); 10023 } 10024 } 10025 &Opcode::Sload32 => { 10026 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10027 // Rule at src/isa/s390x/lower.isle line 238. 10028 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10029 let expr1_0 = 10030 constructor_sink_sload32(ctx, pattern8_0)?; 10031 let expr2_0 = constructor_mul_mem_sext32( 10032 ctx, pattern3_0, expr0_0, &expr1_0, 10033 )?; 10034 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10035 return Some(expr3_0); 10036 } 10037 } 10038 _ => {} 10039 } 10040 } 10041 } 10042 let pattern8_0 = C::value_type(ctx, pattern7_0); 10043 if pattern8_0 == I16 { 10044 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10045 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10046 if let &InstructionData::Load { 10047 opcode: ref pattern12_0, 10048 arg: pattern12_1, 10049 flags: pattern12_2, 10050 offset: pattern12_3, 10051 } = &pattern11_0 10052 { 10053 if let &Opcode::Load = pattern12_0 { 10054 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10055 // Rule at src/isa/s390x/lower.isle line 228. 10056 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10057 let expr1_0 = 10058 constructor_sink_load(ctx, pattern10_0)?; 10059 let expr2_0 = constructor_mul_mem_sext16( 10060 ctx, pattern3_0, expr0_0, &expr1_0, 10061 )?; 10062 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10063 return Some(expr3_0); 10064 } 10065 } 10066 } 10067 } 10068 } 10069 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10070 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10071 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10072 if let &InstructionData::Load { 10073 opcode: ref pattern12_0, 10074 arg: pattern12_1, 10075 flags: pattern12_2, 10076 offset: pattern12_3, 10077 } = &pattern11_0 10078 { 10079 if let &Opcode::Load = pattern12_0 { 10080 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10081 // Rule at src/isa/s390x/lower.isle line 222. 10082 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10083 let expr1_0 = 10084 constructor_sink_load(ctx, pattern10_0)?; 10085 let expr2_0 = constructor_mul_mem( 10086 ctx, pattern3_0, expr0_0, &expr1_0, 10087 )?; 10088 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10089 return Some(expr3_0); 10090 } 10091 } 10092 } 10093 } 10094 } 10095 if let Some(pattern8_0) = C::i16_from_value(ctx, pattern7_1) { 10096 // Rule at src/isa/s390x/lower.isle line 210. 10097 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10098 let expr1_0 = 10099 constructor_mul_simm16(ctx, pattern3_0, expr0_0, pattern8_0)?; 10100 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10101 return Some(expr2_0); 10102 } 10103 if let Some(pattern8_0) = C::i32_from_value(ctx, pattern7_1) { 10104 // Rule at src/isa/s390x/lower.isle line 214. 10105 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10106 let expr1_0 = 10107 constructor_mul_simm32(ctx, pattern3_0, expr0_0, pattern8_0)?; 10108 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10109 return Some(expr2_0); 10110 } 10111 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10112 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10113 if let &InstructionData::Unary { 10114 opcode: ref pattern10_0, 10115 arg: pattern10_1, 10116 } = &pattern9_0 10117 { 10118 if let &Opcode::Sextend = pattern10_0 { 10119 let pattern12_0 = C::value_type(ctx, pattern10_1); 10120 if pattern12_0 == I32 { 10121 // Rule at src/isa/s390x/lower.isle line 204. 10122 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10123 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10124 let expr2_0 = constructor_mul_reg_sext32( 10125 ctx, pattern3_0, expr0_0, expr1_0, 10126 )?; 10127 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10128 return Some(expr3_0); 10129 } 10130 } 10131 } 10132 } 10133 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10134 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10135 if let &InstructionData::Load { 10136 opcode: ref pattern10_0, 10137 arg: pattern10_1, 10138 flags: pattern10_2, 10139 offset: pattern10_3, 10140 } = &pattern9_0 10141 { 10142 match pattern10_0 { 10143 &Opcode::Sload16 => { 10144 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10145 // Rule at src/isa/s390x/lower.isle line 232. 10146 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10147 let expr1_0 = 10148 constructor_sink_sload16(ctx, pattern8_0)?; 10149 let expr2_0 = constructor_mul_mem_sext16( 10150 ctx, pattern3_0, expr0_0, &expr1_0, 10151 )?; 10152 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10153 return Some(expr3_0); 10154 } 10155 } 10156 &Opcode::Sload32 => { 10157 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10158 // Rule at src/isa/s390x/lower.isle line 236. 10159 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10160 let expr1_0 = 10161 constructor_sink_sload32(ctx, pattern8_0)?; 10162 let expr2_0 = constructor_mul_mem_sext32( 10163 ctx, pattern3_0, expr0_0, &expr1_0, 10164 )?; 10165 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10166 return Some(expr3_0); 10167 } 10168 } 10169 _ => {} 10170 } 10171 } 10172 } 10173 let pattern8_0 = C::value_type(ctx, pattern7_1); 10174 if pattern8_0 == I16 { 10175 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10176 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10177 if let &InstructionData::Load { 10178 opcode: ref pattern12_0, 10179 arg: pattern12_1, 10180 flags: pattern12_2, 10181 offset: pattern12_3, 10182 } = &pattern11_0 10183 { 10184 if let &Opcode::Load = pattern12_0 { 10185 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10186 // Rule at src/isa/s390x/lower.isle line 226. 10187 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10188 let expr1_0 = 10189 constructor_sink_load(ctx, pattern10_0)?; 10190 let expr2_0 = constructor_mul_mem_sext16( 10191 ctx, pattern3_0, expr0_0, &expr1_0, 10192 )?; 10193 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10194 return Some(expr3_0); 10195 } 10196 } 10197 } 10198 } 10199 } 10200 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10201 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10202 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10203 if let &InstructionData::Load { 10204 opcode: ref pattern12_0, 10205 arg: pattern12_1, 10206 flags: pattern12_2, 10207 offset: pattern12_3, 10208 } = &pattern11_0 10209 { 10210 if let &Opcode::Load = pattern12_0 { 10211 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10212 // Rule at src/isa/s390x/lower.isle line 220. 10213 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10214 let expr1_0 = 10215 constructor_sink_load(ctx, pattern10_0)?; 10216 let expr2_0 = constructor_mul_mem( 10217 ctx, pattern3_0, expr0_0, &expr1_0, 10218 )?; 10219 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10220 return Some(expr3_0); 10221 } 10222 } 10223 } 10224 } 10225 } 10226 // Rule at src/isa/s390x/lower.isle line 200. 10227 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10228 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10229 let expr2_0 = constructor_mul_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10230 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10231 return Some(expr3_0); 10232 } 10233 &Opcode::Udiv => { 10234 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10235 // Rule at src/isa/s390x/lower.isle line 303. 10236 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10237 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10238 let expr2_0: u64 = 0; 10239 let expr3_0 = constructor_uninitialized_regpair(ctx)?; 10240 let expr4_0 = 10241 constructor_imm_regpair_hi(ctx, expr1_0, expr2_0, &expr3_0)?; 10242 let expr5_0 = 10243 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr4_0)?; 10244 let expr6_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10245 let expr7_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10246 let expr8_0 = constructor_maybe_trap_if_zero_divisor( 10247 ctx, expr0_0, expr7_0, expr6_0, 10248 )?; 10249 let expr9_0 = constructor_udivmod(ctx, expr7_0, &expr5_0, expr6_0)?; 10250 let expr10_0 = constructor_regpair_lo(ctx, &expr9_0)?; 10251 let expr11_0 = constructor_copy_reg(ctx, pattern3_0, expr10_0)?; 10252 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 10253 return Some(expr12_0); 10254 } 10255 &Opcode::Sdiv => { 10256 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10257 // Rule at src/isa/s390x/lower.isle line 375. 10258 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10259 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10260 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10261 let expr3_0 = 10262 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10263 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10264 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10265 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10266 ctx, expr0_0, expr5_0, expr4_0, 10267 )?; 10268 let expr7_0 = constructor_maybe_trap_if_sdiv_overflow( 10269 ctx, expr1_0, expr5_0, pattern3_0, &expr3_0, expr4_0, 10270 )?; 10271 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr3_0, expr4_0)?; 10272 let expr9_0 = constructor_regpair_lo(ctx, &expr8_0)?; 10273 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10274 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10275 return Some(expr11_0); 10276 } 10277 &Opcode::Urem => { 10278 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10279 // Rule at src/isa/s390x/lower.isle line 326. 10280 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10281 let expr1_0: u64 = 0; 10282 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10283 let expr3_0 = 10284 constructor_imm_regpair_hi(ctx, pattern3_0, expr1_0, &expr2_0)?; 10285 let expr4_0 = 10286 constructor_put_in_regpair_lo_zext32(ctx, pattern7_0, &expr3_0)?; 10287 let expr5_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 10288 let expr6_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10289 let expr7_0 = constructor_maybe_trap_if_zero_divisor( 10290 ctx, expr0_0, expr6_0, expr5_0, 10291 )?; 10292 let expr8_0 = constructor_udivmod(ctx, expr6_0, &expr4_0, expr5_0)?; 10293 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10294 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10295 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10296 return Some(expr11_0); 10297 } 10298 &Opcode::Srem => { 10299 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10300 // Rule at src/isa/s390x/lower.isle line 398. 10301 let expr0_0 = constructor_zero_divisor_check_needed(ctx, pattern7_1)?; 10302 let expr1_0 = constructor_div_overflow_check_needed(ctx, pattern7_1)?; 10303 let expr2_0 = constructor_uninitialized_regpair(ctx)?; 10304 let expr3_0 = 10305 constructor_put_in_regpair_lo_sext64(ctx, pattern7_0, &expr2_0)?; 10306 let expr4_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 10307 let expr5_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10308 let expr6_0 = constructor_maybe_trap_if_zero_divisor( 10309 ctx, expr0_0, expr5_0, expr4_0, 10310 )?; 10311 let expr7_0 = constructor_maybe_avoid_srem_overflow( 10312 ctx, expr1_0, expr5_0, &expr3_0, expr4_0, 10313 )?; 10314 let expr8_0 = constructor_sdivmod(ctx, expr5_0, &expr7_0, expr4_0)?; 10315 let expr9_0 = constructor_regpair_hi(ctx, &expr8_0)?; 10316 let expr10_0 = constructor_copy_reg(ctx, pattern3_0, expr9_0)?; 10317 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 10318 return Some(expr11_0); 10319 } 10320 &Opcode::IaddIfcout => { 10321 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10322 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_0) { 10323 // Rule at src/isa/s390x/lower.isle line 170. 10324 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10325 let expr1_0 = constructor_add_logical_zimm32( 10326 ctx, pattern3_0, expr0_0, pattern8_0, 10327 )?; 10328 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10329 return Some(expr2_0); 10330 } 10331 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_0) { 10332 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10333 if let &InstructionData::Unary { 10334 opcode: ref pattern10_0, 10335 arg: pattern10_1, 10336 } = &pattern9_0 10337 { 10338 if let &Opcode::Uextend = pattern10_0 { 10339 let pattern12_0 = C::value_type(ctx, pattern10_1); 10340 if pattern12_0 == I32 { 10341 // Rule at src/isa/s390x/lower.isle line 164. 10342 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10343 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10344 let expr2_0 = constructor_add_logical_reg_zext32( 10345 ctx, pattern3_0, expr0_0, expr1_0, 10346 )?; 10347 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10348 return Some(expr3_0); 10349 } 10350 } 10351 } 10352 } 10353 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_0) { 10354 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10355 if let &InstructionData::Load { 10356 opcode: ref pattern10_0, 10357 arg: pattern10_1, 10358 flags: pattern10_2, 10359 offset: pattern10_3, 10360 } = &pattern9_0 10361 { 10362 if let &Opcode::Uload32 = pattern10_0 { 10363 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10364 // Rule at src/isa/s390x/lower.isle line 182. 10365 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10366 let expr1_0 = 10367 constructor_sink_uload32(ctx, pattern8_0)?; 10368 let expr2_0 = constructor_add_logical_mem_zext32( 10369 ctx, pattern3_0, expr0_0, &expr1_0, 10370 )?; 10371 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10372 return Some(expr3_0); 10373 } 10374 } 10375 } 10376 } 10377 let pattern8_0 = C::value_type(ctx, pattern7_0); 10378 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10379 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10380 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10381 if let &InstructionData::Load { 10382 opcode: ref pattern12_0, 10383 arg: pattern12_1, 10384 flags: pattern12_2, 10385 offset: pattern12_3, 10386 } = &pattern11_0 10387 { 10388 if let &Opcode::Load = pattern12_0 { 10389 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10390 // Rule at src/isa/s390x/lower.isle line 176. 10391 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10392 let expr1_0 = 10393 constructor_sink_load(ctx, pattern10_0)?; 10394 let expr2_0 = constructor_add_logical_mem( 10395 ctx, pattern3_0, expr0_0, &expr1_0, 10396 )?; 10397 let expr3_0 = 10398 constructor_output_ifcout(ctx, expr2_0)?; 10399 return Some(expr3_0); 10400 } 10401 } 10402 } 10403 } 10404 } 10405 if let Some(pattern8_0) = C::u32_from_value(ctx, pattern7_1) { 10406 // Rule at src/isa/s390x/lower.isle line 168. 10407 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10408 let expr1_0 = constructor_add_logical_zimm32( 10409 ctx, pattern3_0, expr0_0, pattern8_0, 10410 )?; 10411 let expr2_0 = constructor_output_ifcout(ctx, expr1_0)?; 10412 return Some(expr2_0); 10413 } 10414 if let Some(pattern8_0) = C::def_inst(ctx, pattern7_1) { 10415 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10416 if let &InstructionData::Unary { 10417 opcode: ref pattern10_0, 10418 arg: pattern10_1, 10419 } = &pattern9_0 10420 { 10421 if let &Opcode::Uextend = pattern10_0 { 10422 let pattern12_0 = C::value_type(ctx, pattern10_1); 10423 if pattern12_0 == I32 { 10424 // Rule at src/isa/s390x/lower.isle line 162. 10425 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10426 let expr1_0 = C::put_in_reg(ctx, pattern10_1); 10427 let expr2_0 = constructor_add_logical_reg_zext32( 10428 ctx, pattern3_0, expr0_0, expr1_0, 10429 )?; 10430 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10431 return Some(expr3_0); 10432 } 10433 } 10434 } 10435 } 10436 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern7_1) { 10437 let pattern9_0 = C::inst_data(ctx, pattern8_0); 10438 if let &InstructionData::Load { 10439 opcode: ref pattern10_0, 10440 arg: pattern10_1, 10441 flags: pattern10_2, 10442 offset: pattern10_3, 10443 } = &pattern9_0 10444 { 10445 if let &Opcode::Uload32 = pattern10_0 { 10446 if let Some(()) = C::bigendian(ctx, pattern10_2) { 10447 // Rule at src/isa/s390x/lower.isle line 180. 10448 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10449 let expr1_0 = 10450 constructor_sink_uload32(ctx, pattern8_0)?; 10451 let expr2_0 = constructor_add_logical_mem_zext32( 10452 ctx, pattern3_0, expr0_0, &expr1_0, 10453 )?; 10454 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10455 return Some(expr3_0); 10456 } 10457 } 10458 } 10459 } 10460 let pattern8_0 = C::value_type(ctx, pattern7_1); 10461 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10462 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10463 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10464 if let &InstructionData::Load { 10465 opcode: ref pattern12_0, 10466 arg: pattern12_1, 10467 flags: pattern12_2, 10468 offset: pattern12_3, 10469 } = &pattern11_0 10470 { 10471 if let &Opcode::Load = pattern12_0 { 10472 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10473 // Rule at src/isa/s390x/lower.isle line 174. 10474 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10475 let expr1_0 = 10476 constructor_sink_load(ctx, pattern10_0)?; 10477 let expr2_0 = constructor_add_logical_mem( 10478 ctx, pattern3_0, expr0_0, &expr1_0, 10479 )?; 10480 let expr3_0 = 10481 constructor_output_ifcout(ctx, expr2_0)?; 10482 return Some(expr3_0); 10483 } 10484 } 10485 } 10486 } 10487 } 10488 // Rule at src/isa/s390x/lower.isle line 158. 10489 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10490 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10491 let expr2_0 = 10492 constructor_add_logical_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10493 let expr3_0 = constructor_output_ifcout(ctx, expr2_0)?; 10494 return Some(expr3_0); 10495 } 10496 &Opcode::Band => { 10497 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10498 let pattern8_0 = C::value_type(ctx, pattern7_0); 10499 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10500 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10501 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10502 if let &InstructionData::Load { 10503 opcode: ref pattern12_0, 10504 arg: pattern12_1, 10505 flags: pattern12_2, 10506 offset: pattern12_3, 10507 } = &pattern11_0 10508 { 10509 if let &Opcode::Load = pattern12_0 { 10510 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10511 // Rule at src/isa/s390x/lower.isle line 653. 10512 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10513 let expr1_0 = 10514 constructor_sink_load(ctx, pattern10_0)?; 10515 let expr2_0 = constructor_and_mem( 10516 ctx, pattern3_0, expr0_0, &expr1_0, 10517 )?; 10518 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10519 return Some(expr3_0); 10520 } 10521 } 10522 } 10523 } 10524 } 10525 if let Some(pattern8_0) = 10526 C::uimm32shifted_from_inverted_value(ctx, pattern7_0) 10527 { 10528 // Rule at src/isa/s390x/lower.isle line 647. 10529 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10530 let expr1_0 = constructor_and_uimm32shifted( 10531 ctx, pattern3_0, expr0_0, pattern8_0, 10532 )?; 10533 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10534 return Some(expr2_0); 10535 } 10536 if let Some(pattern8_0) = 10537 C::uimm16shifted_from_inverted_value(ctx, pattern7_0) 10538 { 10539 // Rule at src/isa/s390x/lower.isle line 643. 10540 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10541 let expr1_0 = constructor_and_uimm16shifted( 10542 ctx, pattern3_0, expr0_0, pattern8_0, 10543 )?; 10544 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10545 return Some(expr2_0); 10546 } 10547 let pattern8_0 = C::value_type(ctx, pattern7_1); 10548 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10549 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10550 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10551 if let &InstructionData::Load { 10552 opcode: ref pattern12_0, 10553 arg: pattern12_1, 10554 flags: pattern12_2, 10555 offset: pattern12_3, 10556 } = &pattern11_0 10557 { 10558 if let &Opcode::Load = pattern12_0 { 10559 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10560 // Rule at src/isa/s390x/lower.isle line 651. 10561 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10562 let expr1_0 = 10563 constructor_sink_load(ctx, pattern10_0)?; 10564 let expr2_0 = constructor_and_mem( 10565 ctx, pattern3_0, expr0_0, &expr1_0, 10566 )?; 10567 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10568 return Some(expr3_0); 10569 } 10570 } 10571 } 10572 } 10573 } 10574 if let Some(pattern8_0) = 10575 C::uimm32shifted_from_inverted_value(ctx, pattern7_1) 10576 { 10577 // Rule at src/isa/s390x/lower.isle line 645. 10578 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10579 let expr1_0 = constructor_and_uimm32shifted( 10580 ctx, pattern3_0, expr0_0, pattern8_0, 10581 )?; 10582 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10583 return Some(expr2_0); 10584 } 10585 if let Some(pattern8_0) = 10586 C::uimm16shifted_from_inverted_value(ctx, pattern7_1) 10587 { 10588 // Rule at src/isa/s390x/lower.isle line 641. 10589 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10590 let expr1_0 = constructor_and_uimm16shifted( 10591 ctx, pattern3_0, expr0_0, pattern8_0, 10592 )?; 10593 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10594 return Some(expr2_0); 10595 } 10596 // Rule at src/isa/s390x/lower.isle line 637. 10597 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10598 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10599 let expr2_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10600 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10601 return Some(expr3_0); 10602 } 10603 &Opcode::Bor => { 10604 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10605 let pattern8_0 = C::value_type(ctx, pattern7_0); 10606 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10607 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10608 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10609 if let &InstructionData::Load { 10610 opcode: ref pattern12_0, 10611 arg: pattern12_1, 10612 flags: pattern12_2, 10613 offset: pattern12_3, 10614 } = &pattern11_0 10615 { 10616 if let &Opcode::Load = pattern12_0 { 10617 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10618 // Rule at src/isa/s390x/lower.isle line 676. 10619 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10620 let expr1_0 = 10621 constructor_sink_load(ctx, pattern10_0)?; 10622 let expr2_0 = constructor_or_mem( 10623 ctx, pattern3_0, expr0_0, &expr1_0, 10624 )?; 10625 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10626 return Some(expr3_0); 10627 } 10628 } 10629 } 10630 } 10631 } 10632 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10633 // Rule at src/isa/s390x/lower.isle line 670. 10634 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10635 let expr1_0 = constructor_or_uimm32shifted( 10636 ctx, pattern3_0, expr0_0, pattern8_0, 10637 )?; 10638 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10639 return Some(expr2_0); 10640 } 10641 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_0) { 10642 // Rule at src/isa/s390x/lower.isle line 666. 10643 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10644 let expr1_0 = constructor_or_uimm16shifted( 10645 ctx, pattern3_0, expr0_0, pattern8_0, 10646 )?; 10647 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10648 return Some(expr2_0); 10649 } 10650 let pattern8_0 = C::value_type(ctx, pattern7_1); 10651 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10652 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10653 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10654 if let &InstructionData::Load { 10655 opcode: ref pattern12_0, 10656 arg: pattern12_1, 10657 flags: pattern12_2, 10658 offset: pattern12_3, 10659 } = &pattern11_0 10660 { 10661 if let &Opcode::Load = pattern12_0 { 10662 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10663 // Rule at src/isa/s390x/lower.isle line 674. 10664 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10665 let expr1_0 = 10666 constructor_sink_load(ctx, pattern10_0)?; 10667 let expr2_0 = constructor_or_mem( 10668 ctx, pattern3_0, expr0_0, &expr1_0, 10669 )?; 10670 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10671 return Some(expr3_0); 10672 } 10673 } 10674 } 10675 } 10676 } 10677 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10678 // Rule at src/isa/s390x/lower.isle line 668. 10679 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10680 let expr1_0 = constructor_or_uimm32shifted( 10681 ctx, pattern3_0, expr0_0, pattern8_0, 10682 )?; 10683 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10684 return Some(expr2_0); 10685 } 10686 if let Some(pattern8_0) = C::uimm16shifted_from_value(ctx, pattern7_1) { 10687 // Rule at src/isa/s390x/lower.isle line 664. 10688 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10689 let expr1_0 = constructor_or_uimm16shifted( 10690 ctx, pattern3_0, expr0_0, pattern8_0, 10691 )?; 10692 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10693 return Some(expr2_0); 10694 } 10695 // Rule at src/isa/s390x/lower.isle line 660. 10696 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10697 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10698 let expr2_0 = constructor_or_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10699 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10700 return Some(expr3_0); 10701 } 10702 &Opcode::Bxor => { 10703 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10704 let pattern8_0 = C::value_type(ctx, pattern7_0); 10705 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10706 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_0) { 10707 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10708 if let &InstructionData::Load { 10709 opcode: ref pattern12_0, 10710 arg: pattern12_1, 10711 flags: pattern12_2, 10712 offset: pattern12_3, 10713 } = &pattern11_0 10714 { 10715 if let &Opcode::Load = pattern12_0 { 10716 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10717 // Rule at src/isa/s390x/lower.isle line 695. 10718 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10719 let expr1_0 = 10720 constructor_sink_load(ctx, pattern10_0)?; 10721 let expr2_0 = constructor_xor_mem( 10722 ctx, pattern3_0, expr0_0, &expr1_0, 10723 )?; 10724 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10725 return Some(expr3_0); 10726 } 10727 } 10728 } 10729 } 10730 } 10731 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_0) { 10732 // Rule at src/isa/s390x/lower.isle line 689. 10733 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10734 let expr1_0 = constructor_xor_uimm32shifted( 10735 ctx, pattern3_0, expr0_0, pattern8_0, 10736 )?; 10737 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10738 return Some(expr2_0); 10739 } 10740 let pattern8_0 = C::value_type(ctx, pattern7_1); 10741 if let Some(pattern9_0) = C::ty_32_or_64(ctx, pattern8_0) { 10742 if let Some(pattern10_0) = C::sinkable_inst(ctx, pattern7_1) { 10743 let pattern11_0 = C::inst_data(ctx, pattern10_0); 10744 if let &InstructionData::Load { 10745 opcode: ref pattern12_0, 10746 arg: pattern12_1, 10747 flags: pattern12_2, 10748 offset: pattern12_3, 10749 } = &pattern11_0 10750 { 10751 if let &Opcode::Load = pattern12_0 { 10752 if let Some(()) = C::bigendian(ctx, pattern12_2) { 10753 // Rule at src/isa/s390x/lower.isle line 693. 10754 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10755 let expr1_0 = 10756 constructor_sink_load(ctx, pattern10_0)?; 10757 let expr2_0 = constructor_xor_mem( 10758 ctx, pattern3_0, expr0_0, &expr1_0, 10759 )?; 10760 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10761 return Some(expr3_0); 10762 } 10763 } 10764 } 10765 } 10766 } 10767 if let Some(pattern8_0) = C::uimm32shifted_from_value(ctx, pattern7_1) { 10768 // Rule at src/isa/s390x/lower.isle line 687. 10769 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10770 let expr1_0 = constructor_xor_uimm32shifted( 10771 ctx, pattern3_0, expr0_0, pattern8_0, 10772 )?; 10773 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10774 return Some(expr2_0); 10775 } 10776 // Rule at src/isa/s390x/lower.isle line 683. 10777 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10778 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10779 let expr2_0 = constructor_xor_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10780 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10781 return Some(expr3_0); 10782 } 10783 &Opcode::Ishl => { 10784 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10785 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10786 // Rule at src/isa/s390x/lower.isle line 482. 10787 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10788 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10789 let expr2_0 = 10790 constructor_lshl_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10791 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10792 return Some(expr3_0); 10793 } 10794 // Rule at src/isa/s390x/lower.isle line 477. 10795 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10796 let expr1_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr0_0)?; 10797 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10798 let expr3_0 = constructor_lshl_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10799 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10800 return Some(expr4_0); 10801 } 10802 &Opcode::Ushr => { 10803 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10804 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10805 // Rule at src/isa/s390x/lower.isle line 498. 10806 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10807 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10808 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10809 let expr3_0 = constructor_lshr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10810 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10811 return Some(expr4_0); 10812 } 10813 // Rule at src/isa/s390x/lower.isle line 491. 10814 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 10815 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10816 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10817 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10818 let expr4_0 = constructor_lshr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10819 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10820 return Some(expr5_0); 10821 } 10822 &Opcode::Sshr => { 10823 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10824 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10825 // Rule at src/isa/s390x/lower.isle line 515. 10826 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10827 let expr1_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10828 let expr2_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10829 let expr3_0 = constructor_ashr_imm(ctx, expr2_0, expr0_0, expr1_0)?; 10830 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10831 return Some(expr4_0); 10832 } 10833 // Rule at src/isa/s390x/lower.isle line 508. 10834 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 10835 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10836 let expr2_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr1_0)?; 10837 let expr3_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10838 let expr4_0 = constructor_ashr_reg(ctx, expr3_0, expr0_0, expr2_0)?; 10839 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10840 return Some(expr5_0); 10841 } 10842 _ => {} 10843 } 10844 } 10845 &InstructionData::Unary { 10846 opcode: ref pattern5_0, 10847 arg: pattern5_1, 10848 } => { 10849 match pattern5_0 { 10850 &Opcode::Ineg => { 10851 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10852 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10853 if let &InstructionData::Unary { 10854 opcode: ref pattern9_0, 10855 arg: pattern9_1, 10856 } = &pattern8_0 10857 { 10858 if let &Opcode::Sextend = pattern9_0 { 10859 let pattern11_0 = C::value_type(ctx, pattern9_1); 10860 if pattern11_0 == I32 { 10861 // Rule at src/isa/s390x/lower.isle line 193. 10862 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10863 let expr1_0 = constructor_neg_reg_sext32( 10864 ctx, pattern3_0, expr0_0, 10865 )?; 10866 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10867 return Some(expr2_0); 10868 } 10869 } 10870 } 10871 } 10872 // Rule at src/isa/s390x/lower.isle line 189. 10873 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10874 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10875 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10876 return Some(expr2_0); 10877 } 10878 &Opcode::Iabs => { 10879 if let Some(pattern7_0) = C::def_inst(ctx, pattern5_1) { 10880 let pattern8_0 = C::inst_data(ctx, pattern7_0); 10881 if let &InstructionData::Unary { 10882 opcode: ref pattern9_0, 10883 arg: pattern9_1, 10884 } = &pattern8_0 10885 { 10886 if let &Opcode::Sextend = pattern9_0 { 10887 let pattern11_0 = C::value_type(ctx, pattern9_1); 10888 if pattern11_0 == I32 { 10889 // Rule at src/isa/s390x/lower.isle line 141. 10890 let expr0_0 = C::put_in_reg(ctx, pattern9_1); 10891 let expr1_0 = constructor_abs_reg_sext32( 10892 ctx, pattern3_0, expr0_0, 10893 )?; 10894 let expr2_0 = constructor_output_reg(ctx, expr1_0)?; 10895 return Some(expr2_0); 10896 } 10897 } 10898 } 10899 } 10900 // Rule at src/isa/s390x/lower.isle line 137. 10901 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 10902 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 10903 let expr2_0 = constructor_abs_reg(ctx, expr0_0, expr1_0)?; 10904 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10905 return Some(expr3_0); 10906 } 10907 &Opcode::Clz => { 10908 // Rule at src/isa/s390x/lower.isle line 821. 10909 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 10910 let expr1_0: i16 = 64; 10911 let expr2_0 = constructor_clz_reg(ctx, expr1_0, expr0_0)?; 10912 let expr3_0 = constructor_regpair_hi(ctx, &expr2_0)?; 10913 let expr4_0 = constructor_clz_offset(ctx, pattern3_0, expr3_0)?; 10914 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 10915 return Some(expr5_0); 10916 } 10917 &Opcode::Cls => { 10918 // Rule at src/isa/s390x/lower.isle line 836. 10919 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 10920 let expr1_0: Type = I64; 10921 let expr2_0: u8 = 63; 10922 let expr3_0 = constructor_ashr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 10923 let expr4_0: Type = I64; 10924 let expr5_0 = constructor_xor_reg(ctx, expr4_0, expr0_0, expr3_0)?; 10925 let expr6_0: i16 = 64; 10926 let expr7_0 = constructor_clz_reg(ctx, expr6_0, expr5_0)?; 10927 let expr8_0 = constructor_regpair_hi(ctx, &expr7_0)?; 10928 let expr9_0 = constructor_clz_offset(ctx, pattern3_0, expr8_0)?; 10929 let expr10_0 = constructor_output_reg(ctx, expr9_0)?; 10930 return Some(expr10_0); 10931 } 10932 &Opcode::Bint => { 10933 // Rule at src/isa/s390x/lower.isle line 804. 10934 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 10935 let expr1_0: u64 = 1; 10936 let expr2_0 = constructor_imm(ctx, pattern3_0, expr1_0)?; 10937 let expr3_0 = constructor_and_reg(ctx, pattern3_0, expr0_0, expr2_0)?; 10938 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10939 return Some(expr4_0); 10940 } 10941 _ => {} 10942 } 10943 } 10944 _ => {} 10945 } 10946 } 10947 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern2_0) { 10948 let pattern4_0 = C::inst_data(ctx, pattern0_0); 10949 match &pattern4_0 { 10950 &InstructionData::Binary { 10951 opcode: ref pattern5_0, 10952 args: ref pattern5_1, 10953 } => { 10954 match pattern5_0 { 10955 &Opcode::Rotl => { 10956 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10957 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 10958 // Rule at src/isa/s390x/lower.isle line 528. 10959 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10960 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10961 let expr2_0 = 10962 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10963 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10964 return Some(expr3_0); 10965 } 10966 // Rule at src/isa/s390x/lower.isle line 524. 10967 let expr0_0 = C::put_in_reg(ctx, pattern7_0); 10968 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 10969 let expr2_0 = constructor_rot_reg(ctx, pattern3_0, expr0_0, expr1_0)?; 10970 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10971 return Some(expr3_0); 10972 } 10973 &Opcode::Rotr => { 10974 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 10975 if let Some(pattern8_0) = C::i64_from_negated_value(ctx, pattern7_1) { 10976 // Rule at src/isa/s390x/lower.isle line 566. 10977 let expr0_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 10978 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 10979 let expr2_0 = 10980 constructor_rot_imm(ctx, pattern3_0, expr1_0, expr0_0)?; 10981 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 10982 return Some(expr3_0); 10983 } 10984 // Rule at src/isa/s390x/lower.isle line 560. 10985 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 10986 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 10987 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 10988 let expr3_0 = constructor_rot_reg(ctx, pattern3_0, expr2_0, expr1_0)?; 10989 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 10990 return Some(expr4_0); 10991 } 10992 _ => {} 10993 } 10994 } 10995 &InstructionData::AtomicRmw { 10996 opcode: ref pattern5_0, 10997 args: ref pattern5_1, 10998 flags: pattern5_2, 10999 op: ref pattern5_3, 11000 } => { 11001 if let &Opcode::AtomicRmw = pattern5_0 { 11002 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11003 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11004 match pattern5_3 { 11005 &AtomicRmwOp::And => { 11006 // Rule at src/isa/s390x/lower.isle line 1505. 11007 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11008 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11009 let expr2_0 = C::zero_offset(ctx); 11010 let expr3_0 = constructor_lower_address( 11011 ctx, pattern5_2, pattern7_0, expr2_0, 11012 )?; 11013 let expr4_0 = constructor_atomic_rmw_and( 11014 ctx, pattern3_0, expr1_0, &expr3_0, 11015 )?; 11016 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11017 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11018 return Some(expr6_0); 11019 } 11020 &AtomicRmwOp::Or => { 11021 // Rule at src/isa/s390x/lower.isle line 1517. 11022 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11023 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11024 let expr2_0 = C::zero_offset(ctx); 11025 let expr3_0 = constructor_lower_address( 11026 ctx, pattern5_2, pattern7_0, expr2_0, 11027 )?; 11028 let expr4_0 = constructor_atomic_rmw_or( 11029 ctx, pattern3_0, expr1_0, &expr3_0, 11030 )?; 11031 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11032 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11033 return Some(expr6_0); 11034 } 11035 &AtomicRmwOp::Xor => { 11036 // Rule at src/isa/s390x/lower.isle line 1529. 11037 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11038 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11039 let expr2_0 = C::zero_offset(ctx); 11040 let expr3_0 = constructor_lower_address( 11041 ctx, pattern5_2, pattern7_0, expr2_0, 11042 )?; 11043 let expr4_0 = constructor_atomic_rmw_xor( 11044 ctx, pattern3_0, expr1_0, &expr3_0, 11045 )?; 11046 let expr5_0 = constructor_bswap_reg(ctx, pattern3_0, expr4_0)?; 11047 let expr6_0 = constructor_output_reg(ctx, expr5_0)?; 11048 return Some(expr6_0); 11049 } 11050 _ => {} 11051 } 11052 } 11053 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11054 match pattern5_3 { 11055 &AtomicRmwOp::Add => { 11056 // Rule at src/isa/s390x/lower.isle line 1535. 11057 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11058 let expr1_0 = C::zero_offset(ctx); 11059 let expr2_0 = constructor_lower_address( 11060 ctx, pattern5_2, pattern7_0, expr1_0, 11061 )?; 11062 let expr3_0 = constructor_atomic_rmw_add( 11063 ctx, pattern3_0, expr0_0, &expr2_0, 11064 )?; 11065 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11066 return Some(expr4_0); 11067 } 11068 &AtomicRmwOp::And => { 11069 // Rule at src/isa/s390x/lower.isle line 1499. 11070 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11071 let expr1_0 = C::zero_offset(ctx); 11072 let expr2_0 = constructor_lower_address( 11073 ctx, pattern5_2, pattern7_0, expr1_0, 11074 )?; 11075 let expr3_0 = constructor_atomic_rmw_and( 11076 ctx, pattern3_0, expr0_0, &expr2_0, 11077 )?; 11078 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11079 return Some(expr4_0); 11080 } 11081 &AtomicRmwOp::Or => { 11082 // Rule at src/isa/s390x/lower.isle line 1511. 11083 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11084 let expr1_0 = C::zero_offset(ctx); 11085 let expr2_0 = constructor_lower_address( 11086 ctx, pattern5_2, pattern7_0, expr1_0, 11087 )?; 11088 let expr3_0 = constructor_atomic_rmw_or( 11089 ctx, pattern3_0, expr0_0, &expr2_0, 11090 )?; 11091 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11092 return Some(expr4_0); 11093 } 11094 &AtomicRmwOp::Sub => { 11095 // Rule at src/isa/s390x/lower.isle line 1541. 11096 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11097 let expr1_0 = constructor_neg_reg(ctx, pattern3_0, expr0_0)?; 11098 let expr2_0 = C::zero_offset(ctx); 11099 let expr3_0 = constructor_lower_address( 11100 ctx, pattern5_2, pattern7_0, expr2_0, 11101 )?; 11102 let expr4_0 = constructor_atomic_rmw_add( 11103 ctx, pattern3_0, expr1_0, &expr3_0, 11104 )?; 11105 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11106 return Some(expr5_0); 11107 } 11108 &AtomicRmwOp::Xor => { 11109 // Rule at src/isa/s390x/lower.isle line 1523. 11110 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11111 let expr1_0 = C::zero_offset(ctx); 11112 let expr2_0 = constructor_lower_address( 11113 ctx, pattern5_2, pattern7_0, expr1_0, 11114 )?; 11115 let expr3_0 = constructor_atomic_rmw_xor( 11116 ctx, pattern3_0, expr0_0, &expr2_0, 11117 )?; 11118 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11119 return Some(expr4_0); 11120 } 11121 _ => {} 11122 } 11123 } 11124 // Rule at src/isa/s390x/lower.isle line 1550. 11125 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11126 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11127 let expr2_0 = C::inst_builder_new(ctx); 11128 let expr3_0 = constructor_casloop_val_reg(ctx)?; 11129 let expr4_0 = C::writable_reg_to_reg(ctx, expr3_0); 11130 let expr5_0 = constructor_casloop_tmp_reg(ctx)?; 11131 let expr6_0 = constructor_atomic_rmw_body( 11132 ctx, &expr2_0, pattern3_0, pattern5_2, pattern5_3, expr5_0, expr4_0, 11133 expr0_0, 11134 )?; 11135 let expr7_0 = constructor_casloop( 11136 ctx, &expr2_0, pattern3_0, pattern5_2, expr1_0, expr6_0, 11137 )?; 11138 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11139 return Some(expr8_0); 11140 } 11141 } 11142 &InstructionData::AtomicCas { 11143 opcode: ref pattern5_0, 11144 args: ref pattern5_1, 11145 flags: pattern5_2, 11146 } => { 11147 if let &Opcode::AtomicCas = pattern5_0 { 11148 let (pattern7_0, pattern7_1, pattern7_2) = 11149 C::unpack_value_array_3(ctx, pattern5_1); 11150 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11151 // Rule at src/isa/s390x/lower.isle line 1762. 11152 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11153 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, expr0_0)?; 11154 let expr2_0 = C::put_in_reg(ctx, pattern7_2); 11155 let expr3_0 = constructor_bswap_reg(ctx, pattern3_0, expr2_0)?; 11156 let expr4_0 = C::zero_offset(ctx); 11157 let expr5_0 = 11158 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr4_0)?; 11159 let expr6_0 = constructor_atomic_cas_impl( 11160 ctx, pattern3_0, expr1_0, expr3_0, &expr5_0, 11161 )?; 11162 let expr7_0 = constructor_bswap_reg(ctx, pattern3_0, expr6_0)?; 11163 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11164 return Some(expr8_0); 11165 } 11166 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11167 // Rule at src/isa/s390x/lower.isle line 1755. 11168 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11169 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11170 let expr2_0 = C::zero_offset(ctx); 11171 let expr3_0 = 11172 constructor_lower_address(ctx, pattern5_2, pattern7_0, expr2_0)?; 11173 let expr4_0 = constructor_atomic_cas_impl( 11174 ctx, pattern3_0, expr0_0, expr1_0, &expr3_0, 11175 )?; 11176 let expr5_0 = constructor_output_reg(ctx, expr4_0)?; 11177 return Some(expr5_0); 11178 } 11179 } 11180 } 11181 &InstructionData::Unary { 11182 opcode: ref pattern5_0, 11183 arg: pattern5_1, 11184 } => { 11185 match pattern5_0 { 11186 &Opcode::FcvtToUint => { 11187 let pattern7_0 = C::value_type(ctx, pattern5_1); 11188 // Rule at src/isa/s390x/lower.isle line 1057. 11189 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11190 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11191 let expr2_0 = FloatCC::Unordered; 11192 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11193 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11194 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11195 let expr6_0 = constructor_fcvt_to_uint_reg_with_flags( 11196 ctx, pattern3_0, pattern7_0, expr0_0, 11197 )?; 11198 let expr7_0 = FloatCC::Unordered; 11199 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11200 let expr9_0 = C::trap_code_integer_overflow(ctx); 11201 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11202 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11203 return Some(expr11_0); 11204 } 11205 &Opcode::FcvtToUintSat => { 11206 let pattern7_0 = C::value_type(ctx, pattern5_1); 11207 // Rule at src/isa/s390x/lower.isle line 1098. 11208 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11209 let expr1_0 = 11210 constructor_fcvt_to_uint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11211 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11212 let expr3_0 = FloatCC::Unordered; 11213 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11214 let expr5_0: i16 = 0; 11215 let expr6_0 = 11216 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11217 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11218 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11219 return Some(expr8_0); 11220 } 11221 &Opcode::FcvtToSint => { 11222 let pattern7_0 = C::value_type(ctx, pattern5_1); 11223 // Rule at src/isa/s390x/lower.isle line 1078. 11224 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11225 let expr1_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11226 let expr2_0 = FloatCC::Unordered; 11227 let expr3_0 = C::floatcc_as_cond(ctx, &expr2_0); 11228 let expr4_0 = C::trap_code_bad_conversion_to_integer(ctx); 11229 let expr5_0 = constructor_trap_if(ctx, &expr1_0, &expr3_0, &expr4_0)?; 11230 let expr6_0 = constructor_fcvt_to_sint_reg_with_flags( 11231 ctx, pattern3_0, pattern7_0, expr0_0, 11232 )?; 11233 let expr7_0 = FloatCC::Unordered; 11234 let expr8_0 = C::floatcc_as_cond(ctx, &expr7_0); 11235 let expr9_0 = C::trap_code_integer_overflow(ctx); 11236 let expr10_0 = constructor_trap_if(ctx, &expr6_0, &expr8_0, &expr9_0)?; 11237 let expr11_0 = constructor_output_reg(ctx, expr10_0)?; 11238 return Some(expr11_0); 11239 } 11240 &Opcode::FcvtToSintSat => { 11241 let pattern7_0 = C::value_type(ctx, pattern5_1); 11242 // Rule at src/isa/s390x/lower.isle line 1115. 11243 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11244 let expr1_0 = 11245 constructor_fcvt_to_sint_reg(ctx, pattern3_0, pattern7_0, expr0_0)?; 11246 let expr2_0 = constructor_fcmp_reg(ctx, pattern7_0, expr0_0, expr0_0)?; 11247 let expr3_0 = FloatCC::Unordered; 11248 let expr4_0 = C::floatcc_as_cond(ctx, &expr3_0); 11249 let expr5_0: i16 = 0; 11250 let expr6_0 = 11251 constructor_cmov_imm(ctx, pattern3_0, &expr4_0, expr5_0, expr1_0)?; 11252 let expr7_0 = constructor_with_flags_reg(ctx, &expr2_0, &expr6_0)?; 11253 let expr8_0 = constructor_output_reg(ctx, expr7_0)?; 11254 return Some(expr8_0); 11255 } 11256 _ => {} 11257 } 11258 } 11259 _ => {} 11260 } 11261 } 11262 if let Some(pattern3_0) = C::ty_8_or_16(ctx, pattern2_0) { 11263 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11264 match &pattern4_0 { 11265 &InstructionData::Binary { 11266 opcode: ref pattern5_0, 11267 args: ref pattern5_1, 11268 } => { 11269 match pattern5_0 { 11270 &Opcode::Umulhi => { 11271 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11272 // Rule at src/isa/s390x/lower.isle line 245. 11273 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11274 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern7_1)?; 11275 let expr2_0: Type = I32; 11276 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11277 let expr4_0: Type = I32; 11278 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11279 let expr6_0 = constructor_lshr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11280 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11281 return Some(expr7_0); 11282 } 11283 &Opcode::Smulhi => { 11284 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11285 // Rule at src/isa/s390x/lower.isle line 267. 11286 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern7_0)?; 11287 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern7_1)?; 11288 let expr2_0: Type = I32; 11289 let expr3_0 = constructor_mul_reg(ctx, expr2_0, expr0_0, expr1_0)?; 11290 let expr4_0: Type = I32; 11291 let expr5_0 = C::ty_bits(ctx, pattern3_0); 11292 let expr6_0 = constructor_ashr_imm(ctx, expr4_0, expr3_0, expr5_0)?; 11293 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11294 return Some(expr7_0); 11295 } 11296 &Opcode::Rotl => { 11297 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11298 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11299 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11300 { 11301 // Rule at src/isa/s390x/lower.isle line 546. 11302 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11303 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11304 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11305 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11306 let expr4_0 = 11307 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11308 let expr5_0 = 11309 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11310 let expr6_0 = 11311 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11312 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11313 return Some(expr7_0); 11314 } 11315 } 11316 // Rule at src/isa/s390x/lower.isle line 534. 11317 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11318 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11319 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11320 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11321 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11322 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11323 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11324 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11325 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11326 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11327 return Some(expr9_0); 11328 } 11329 &Opcode::Rotr => { 11330 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11331 if let Some(pattern8_0) = C::i64_from_value(ctx, pattern7_1) { 11332 if let Some(pattern9_0) = C::i64_from_negated_value(ctx, pattern7_1) 11333 { 11334 // Rule at src/isa/s390x/lower.isle line 584. 11335 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11336 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11337 let expr2_0 = C::mask_amt_imm(ctx, pattern3_0, pattern8_0); 11338 let expr3_0 = C::mask_amt_imm(ctx, pattern3_0, pattern9_0); 11339 let expr4_0 = 11340 constructor_lshl_imm(ctx, expr1_0, expr0_0, expr3_0)?; 11341 let expr5_0 = 11342 constructor_lshr_imm(ctx, expr1_0, expr0_0, expr2_0)?; 11343 let expr6_0 = 11344 constructor_or_reg(ctx, pattern3_0, expr4_0, expr5_0)?; 11345 let expr7_0 = constructor_output_reg(ctx, expr6_0)?; 11346 return Some(expr7_0); 11347 } 11348 } 11349 // Rule at src/isa/s390x/lower.isle line 572. 11350 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern7_0)?; 11351 let expr1_0 = constructor_ty_ext32(ctx, pattern3_0)?; 11352 let expr2_0 = C::put_in_reg(ctx, pattern7_1); 11353 let expr3_0 = constructor_neg_reg(ctx, pattern3_0, expr2_0)?; 11354 let expr4_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr2_0)?; 11355 let expr5_0 = constructor_mask_amt_reg(ctx, pattern3_0, expr3_0)?; 11356 let expr6_0 = constructor_lshl_reg(ctx, expr1_0, expr0_0, expr5_0)?; 11357 let expr7_0 = constructor_lshr_reg(ctx, expr1_0, expr0_0, expr4_0)?; 11358 let expr8_0 = constructor_or_reg(ctx, pattern3_0, expr6_0, expr7_0)?; 11359 let expr9_0 = constructor_output_reg(ctx, expr8_0)?; 11360 return Some(expr9_0); 11361 } 11362 _ => {} 11363 } 11364 } 11365 &InstructionData::AtomicRmw { 11366 opcode: ref pattern5_0, 11367 args: ref pattern5_1, 11368 flags: pattern5_2, 11369 op: ref pattern5_3, 11370 } => { 11371 if let &Opcode::AtomicRmw = pattern5_0 { 11372 let (pattern7_0, pattern7_1) = C::unpack_value_array_2(ctx, pattern5_1); 11373 // Rule at src/isa/s390x/lower.isle line 1562. 11374 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11375 let expr1_0 = C::put_in_reg(ctx, pattern7_0); 11376 let expr2_0 = constructor_casloop_bitshift(ctx, expr1_0)?; 11377 let expr3_0 = constructor_casloop_aligned_addr(ctx, expr1_0)?; 11378 let expr4_0 = C::inst_builder_new(ctx); 11379 let expr5_0 = constructor_casloop_val_reg(ctx)?; 11380 let expr6_0 = C::writable_reg_to_reg(ctx, expr5_0); 11381 let expr7_0 = constructor_casloop_rotate_in( 11382 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr6_0, 11383 )?; 11384 let expr8_0 = constructor_casloop_tmp_reg(ctx)?; 11385 let expr9_0 = constructor_atomic_rmw_body( 11386 ctx, &expr4_0, pattern3_0, pattern5_2, pattern5_3, expr8_0, expr7_0, 11387 expr0_0, 11388 )?; 11389 let expr10_0 = constructor_casloop_rotate_out( 11390 ctx, &expr4_0, pattern3_0, pattern5_2, expr2_0, expr9_0, 11391 )?; 11392 let expr11_0 = constructor_casloop_subword( 11393 ctx, &expr4_0, pattern3_0, pattern5_2, expr3_0, expr2_0, expr10_0, 11394 )?; 11395 let expr12_0 = constructor_output_reg(ctx, expr11_0)?; 11396 return Some(expr12_0); 11397 } 11398 } 11399 &InstructionData::AtomicCas { 11400 opcode: ref pattern5_0, 11401 args: ref pattern5_1, 11402 flags: pattern5_2, 11403 } => { 11404 if let &Opcode::AtomicCas = pattern5_0 { 11405 let (pattern7_0, pattern7_1, pattern7_2) = 11406 C::unpack_value_array_3(ctx, pattern5_1); 11407 // Rule at src/isa/s390x/lower.isle line 1769. 11408 let expr0_0 = C::put_in_reg(ctx, pattern7_1); 11409 let expr1_0 = C::put_in_reg(ctx, pattern7_2); 11410 let expr2_0 = C::put_in_reg(ctx, pattern7_0); 11411 let expr3_0 = constructor_casloop_bitshift(ctx, expr2_0)?; 11412 let expr4_0 = constructor_casloop_aligned_addr(ctx, expr2_0)?; 11413 let expr5_0 = C::inst_builder_new(ctx); 11414 let expr6_0 = constructor_casloop_val_reg(ctx)?; 11415 let expr7_0 = C::writable_reg_to_reg(ctx, expr6_0); 11416 let expr8_0 = constructor_casloop_rotate_in( 11417 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr7_0, 11418 )?; 11419 let expr9_0 = constructor_casloop_tmp_reg(ctx)?; 11420 let expr10_0 = constructor_atomic_cas_body( 11421 ctx, &expr5_0, pattern3_0, pattern5_2, expr9_0, expr8_0, expr0_0, 11422 expr1_0, 11423 )?; 11424 let expr11_0 = constructor_casloop_rotate_out( 11425 ctx, &expr5_0, pattern3_0, pattern5_2, expr3_0, expr10_0, 11426 )?; 11427 let expr12_0 = constructor_casloop_subword( 11428 ctx, &expr5_0, pattern3_0, pattern5_2, expr4_0, expr3_0, expr11_0, 11429 )?; 11430 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11431 return Some(expr13_0); 11432 } 11433 } 11434 _ => {} 11435 } 11436 } 11437 if let Some(pattern3_0) = C::gpr32_ty(ctx, pattern2_0) { 11438 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11439 match &pattern4_0 { 11440 &InstructionData::Unary { 11441 opcode: ref pattern5_0, 11442 arg: pattern5_1, 11443 } => { 11444 match pattern5_0 { 11445 &Opcode::Ctz => { 11446 // Rule at src/isa/s390x/lower.isle line 859. 11447 let expr0_0: Type = I64; 11448 let expr1_0 = C::put_in_reg(ctx, pattern5_1); 11449 let expr2_0 = constructor_ctz_guardbit(ctx, pattern3_0)?; 11450 let expr3_0 = 11451 constructor_or_uimm16shifted(ctx, expr0_0, expr1_0, expr2_0)?; 11452 let expr4_0: Type = I64; 11453 let expr5_0: Type = I64; 11454 let expr6_0 = constructor_neg_reg(ctx, expr5_0, expr3_0)?; 11455 let expr7_0 = constructor_and_reg(ctx, expr4_0, expr3_0, expr6_0)?; 11456 let expr8_0: i16 = 64; 11457 let expr9_0 = constructor_clz_reg(ctx, expr8_0, expr7_0)?; 11458 let expr10_0: u64 = 63; 11459 let expr11_0 = constructor_imm(ctx, pattern3_0, expr10_0)?; 11460 let expr12_0 = constructor_regpair_hi(ctx, &expr9_0)?; 11461 let expr13_0 = 11462 constructor_sub_reg(ctx, pattern3_0, expr11_0, expr12_0)?; 11463 let expr14_0 = constructor_output_reg(ctx, expr13_0)?; 11464 return Some(expr14_0); 11465 } 11466 &Opcode::Uextend => { 11467 // Rule at src/isa/s390x/lower.isle line 603. 11468 let expr0_0 = constructor_put_in_reg_zext32(ctx, pattern5_1)?; 11469 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11470 return Some(expr1_0); 11471 } 11472 &Opcode::Sextend => { 11473 // Rule at src/isa/s390x/lower.isle line 614. 11474 let expr0_0 = constructor_put_in_reg_sext32(ctx, pattern5_1)?; 11475 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11476 return Some(expr1_0); 11477 } 11478 _ => {} 11479 } 11480 } 11481 &InstructionData::Load { 11482 opcode: ref pattern5_0, 11483 arg: pattern5_1, 11484 flags: pattern5_2, 11485 offset: pattern5_3, 11486 } => { 11487 match pattern5_0 { 11488 &Opcode::Uload8 => { 11489 // Rule at src/isa/s390x/lower.isle line 1251. 11490 let expr0_0: Type = I8; 11491 let expr1_0 = 11492 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11493 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11494 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11495 return Some(expr3_0); 11496 } 11497 &Opcode::Sload8 => { 11498 // Rule at src/isa/s390x/lower.isle line 1262. 11499 let expr0_0: Type = I8; 11500 let expr1_0 = 11501 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11502 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11503 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11504 return Some(expr3_0); 11505 } 11506 &Opcode::Uload16 => { 11507 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11508 // Rule at src/isa/s390x/lower.isle line 1278. 11509 let expr0_0 = constructor_lower_address( 11510 ctx, pattern5_2, pattern5_1, pattern5_3, 11511 )?; 11512 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11513 let expr2_0: Type = I16; 11514 let expr3_0 = constructor_zext32_reg(ctx, expr2_0, expr1_0)?; 11515 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11516 return Some(expr4_0); 11517 } 11518 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11519 // Rule at src/isa/s390x/lower.isle line 1273. 11520 let expr0_0: Type = I16; 11521 let expr1_0 = constructor_lower_address( 11522 ctx, pattern5_2, pattern5_1, pattern5_3, 11523 )?; 11524 let expr2_0 = constructor_zext32_mem(ctx, expr0_0, &expr1_0)?; 11525 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11526 return Some(expr3_0); 11527 } 11528 } 11529 &Opcode::Sload16 => { 11530 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11531 // Rule at src/isa/s390x/lower.isle line 1303. 11532 let expr0_0 = constructor_lower_address( 11533 ctx, pattern5_2, pattern5_1, pattern5_3, 11534 )?; 11535 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11536 let expr2_0: Type = I16; 11537 let expr3_0 = constructor_sext32_reg(ctx, expr2_0, expr1_0)?; 11538 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11539 return Some(expr4_0); 11540 } 11541 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11542 // Rule at src/isa/s390x/lower.isle line 1298. 11543 let expr0_0: Type = I16; 11544 let expr1_0 = constructor_lower_address( 11545 ctx, pattern5_2, pattern5_1, pattern5_3, 11546 )?; 11547 let expr2_0 = constructor_sext32_mem(ctx, expr0_0, &expr1_0)?; 11548 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11549 return Some(expr3_0); 11550 } 11551 } 11552 _ => {} 11553 } 11554 } 11555 _ => {} 11556 } 11557 } 11558 if let Some(pattern3_0) = C::gpr64_ty(ctx, pattern2_0) { 11559 let pattern4_0 = C::inst_data(ctx, pattern0_0); 11560 match &pattern4_0 { 11561 &InstructionData::Unary { 11562 opcode: ref pattern5_0, 11563 arg: pattern5_1, 11564 } => { 11565 match pattern5_0 { 11566 &Opcode::Ctz => { 11567 // Rule at src/isa/s390x/lower.isle line 874. 11568 let expr0_0 = C::put_in_reg(ctx, pattern5_1); 11569 let expr1_0: Type = I64; 11570 let expr2_0: Type = I64; 11571 let expr3_0 = constructor_neg_reg(ctx, expr2_0, expr0_0)?; 11572 let expr4_0 = constructor_and_reg(ctx, expr1_0, expr0_0, expr3_0)?; 11573 let expr5_0: i16 = -1; 11574 let expr6_0 = constructor_clz_reg(ctx, expr5_0, expr4_0)?; 11575 let expr7_0: Type = I64; 11576 let expr8_0: Type = I64; 11577 let expr9_0: u64 = 63; 11578 let expr10_0 = constructor_imm(ctx, expr8_0, expr9_0)?; 11579 let expr11_0 = constructor_regpair_hi(ctx, &expr6_0)?; 11580 let expr12_0 = constructor_sub_reg(ctx, expr7_0, expr10_0, expr11_0)?; 11581 let expr13_0 = constructor_output_reg(ctx, expr12_0)?; 11582 return Some(expr13_0); 11583 } 11584 &Opcode::Uextend => { 11585 // Rule at src/isa/s390x/lower.isle line 607. 11586 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern5_1)?; 11587 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11588 return Some(expr1_0); 11589 } 11590 &Opcode::Sextend => { 11591 // Rule at src/isa/s390x/lower.isle line 618. 11592 let expr0_0 = constructor_put_in_reg_sext64(ctx, pattern5_1)?; 11593 let expr1_0 = constructor_output_reg(ctx, expr0_0)?; 11594 return Some(expr1_0); 11595 } 11596 _ => {} 11597 } 11598 } 11599 &InstructionData::Load { 11600 opcode: ref pattern5_0, 11601 arg: pattern5_1, 11602 flags: pattern5_2, 11603 offset: pattern5_3, 11604 } => { 11605 match pattern5_0 { 11606 &Opcode::Uload8 => { 11607 // Rule at src/isa/s390x/lower.isle line 1255. 11608 let expr0_0: Type = I8; 11609 let expr1_0 = 11610 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11611 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11612 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11613 return Some(expr3_0); 11614 } 11615 &Opcode::Sload8 => { 11616 // Rule at src/isa/s390x/lower.isle line 1266. 11617 let expr0_0: Type = I8; 11618 let expr1_0 = 11619 constructor_lower_address(ctx, pattern5_2, pattern5_1, pattern5_3)?; 11620 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11621 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11622 return Some(expr3_0); 11623 } 11624 &Opcode::Uload16 => { 11625 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11626 // Rule at src/isa/s390x/lower.isle line 1289. 11627 let expr0_0 = constructor_lower_address( 11628 ctx, pattern5_2, pattern5_1, pattern5_3, 11629 )?; 11630 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11631 let expr2_0: Type = I16; 11632 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11633 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11634 return Some(expr4_0); 11635 } 11636 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11637 // Rule at src/isa/s390x/lower.isle line 1284. 11638 let expr0_0: Type = I16; 11639 let expr1_0 = constructor_lower_address( 11640 ctx, pattern5_2, pattern5_1, pattern5_3, 11641 )?; 11642 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11643 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11644 return Some(expr3_0); 11645 } 11646 } 11647 &Opcode::Sload16 => { 11648 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11649 // Rule at src/isa/s390x/lower.isle line 1314. 11650 let expr0_0 = constructor_lower_address( 11651 ctx, pattern5_2, pattern5_1, pattern5_3, 11652 )?; 11653 let expr1_0 = constructor_loadrev16(ctx, &expr0_0)?; 11654 let expr2_0: Type = I16; 11655 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11656 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11657 return Some(expr4_0); 11658 } 11659 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11660 // Rule at src/isa/s390x/lower.isle line 1309. 11661 let expr0_0: Type = I16; 11662 let expr1_0 = constructor_lower_address( 11663 ctx, pattern5_2, pattern5_1, pattern5_3, 11664 )?; 11665 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11666 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11667 return Some(expr3_0); 11668 } 11669 } 11670 &Opcode::Uload32 => { 11671 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11672 // Rule at src/isa/s390x/lower.isle line 1328. 11673 let expr0_0 = constructor_lower_address( 11674 ctx, pattern5_2, pattern5_1, pattern5_3, 11675 )?; 11676 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11677 let expr2_0: Type = I32; 11678 let expr3_0 = constructor_zext64_reg(ctx, expr2_0, expr1_0)?; 11679 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11680 return Some(expr4_0); 11681 } 11682 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11683 // Rule at src/isa/s390x/lower.isle line 1323. 11684 let expr0_0: Type = I32; 11685 let expr1_0 = constructor_lower_address( 11686 ctx, pattern5_2, pattern5_1, pattern5_3, 11687 )?; 11688 let expr2_0 = constructor_zext64_mem(ctx, expr0_0, &expr1_0)?; 11689 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11690 return Some(expr3_0); 11691 } 11692 } 11693 &Opcode::Sload32 => { 11694 if let Some(()) = C::littleendian(ctx, pattern5_2) { 11695 // Rule at src/isa/s390x/lower.isle line 1342. 11696 let expr0_0 = constructor_lower_address( 11697 ctx, pattern5_2, pattern5_1, pattern5_3, 11698 )?; 11699 let expr1_0 = constructor_loadrev32(ctx, &expr0_0)?; 11700 let expr2_0: Type = I32; 11701 let expr3_0 = constructor_sext64_reg(ctx, expr2_0, expr1_0)?; 11702 let expr4_0 = constructor_output_reg(ctx, expr3_0)?; 11703 return Some(expr4_0); 11704 } 11705 if let Some(()) = C::bigendian(ctx, pattern5_2) { 11706 // Rule at src/isa/s390x/lower.isle line 1337. 11707 let expr0_0: Type = I32; 11708 let expr1_0 = constructor_lower_address( 11709 ctx, pattern5_2, pattern5_1, pattern5_3, 11710 )?; 11711 let expr2_0 = constructor_sext64_mem(ctx, expr0_0, &expr1_0)?; 11712 let expr3_0 = constructor_output_reg(ctx, expr2_0)?; 11713 return Some(expr3_0); 11714 } 11715 } 11716 _ => {} 11717 } 11718 } 11719 _ => {} 11720 } 11721 } 11722 } 11723 return None; 11724 } 11725 11726 // Generated as internal constructor for term lower_branch. 11727 pub fn constructor_lower_branch<C: Context>( 11728 ctx: &mut C, 11729 arg0: Inst, 11730 arg1: &VecMachLabel, 11731 ) -> Option<InstOutput> { 11732 let pattern0_0 = arg0; 11733 let pattern1_0 = C::inst_data(ctx, pattern0_0); 11734 match &pattern1_0 { 11735 &InstructionData::BranchTable { 11736 opcode: ref pattern2_0, 11737 arg: pattern2_1, 11738 destination: pattern2_2, 11739 table: pattern2_3, 11740 } => { 11741 if let &Opcode::BrTable = pattern2_0 { 11742 let pattern4_0 = arg1; 11743 // Rule at src/isa/s390x/lower.isle line 2076. 11744 let expr0_0 = constructor_put_in_reg_zext64(ctx, pattern2_1)?; 11745 let expr1_0: Type = I64; 11746 let expr2_0 = C::vec_length_minus1(ctx, pattern4_0); 11747 let expr3_0 = constructor_icmpu_uimm32(ctx, expr1_0, expr0_0, expr2_0)?; 11748 let expr4_0 = IntCC::UnsignedGreaterThanOrEqual; 11749 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 11750 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 11751 let expr7_0: u8 = 0; 11752 let expr8_0 = C::vec_element(ctx, pattern4_0, expr7_0); 11753 let expr9_0 = constructor_oneway_cond_br_bool(ctx, &expr6_0, expr8_0)?; 11754 let expr10_0 = constructor_side_effect(ctx, &expr9_0)?; 11755 let expr11_0: Type = I64; 11756 let expr12_0: u8 = 2; 11757 let expr13_0 = constructor_lshl_imm(ctx, expr11_0, expr0_0, expr12_0)?; 11758 let expr14_0 = constructor_jt_sequence(ctx, expr13_0, pattern4_0)?; 11759 let expr15_0 = constructor_side_effect(ctx, &expr14_0)?; 11760 return Some(expr15_0); 11761 } 11762 } 11763 &InstructionData::Branch { 11764 opcode: ref pattern2_0, 11765 args: pattern2_1, 11766 destination: pattern2_2, 11767 } => { 11768 match pattern2_0 { 11769 &Opcode::Brz => { 11770 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 11771 let pattern5_0 = arg1; 11772 // Rule at src/isa/s390x/lower.isle line 2109. 11773 let expr0_0 = constructor_value_nonzero(ctx, pattern4_0)?; 11774 let expr1_0 = constructor_invert_bool(ctx, &expr0_0)?; 11775 let expr2_0: u8 = 0; 11776 let expr3_0 = C::vec_element(ctx, pattern5_0, expr2_0); 11777 let expr4_0: u8 = 1; 11778 let expr5_0 = C::vec_element(ctx, pattern5_0, expr4_0); 11779 let expr6_0 = constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11780 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11781 return Some(expr7_0); 11782 } 11783 &Opcode::Brnz => { 11784 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 11785 let pattern5_0 = arg1; 11786 // Rule at src/isa/s390x/lower.isle line 2120. 11787 let expr0_0 = constructor_value_nonzero(ctx, pattern4_0)?; 11788 let expr1_0: u8 = 0; 11789 let expr2_0 = C::vec_element(ctx, pattern5_0, expr1_0); 11790 let expr3_0: u8 = 1; 11791 let expr4_0 = C::vec_element(ctx, pattern5_0, expr3_0); 11792 let expr5_0 = constructor_cond_br_bool(ctx, &expr0_0, expr2_0, expr4_0)?; 11793 let expr6_0 = constructor_side_effect(ctx, &expr5_0)?; 11794 return Some(expr6_0); 11795 } 11796 _ => {} 11797 } 11798 } 11799 &InstructionData::Jump { 11800 opcode: ref pattern2_0, 11801 args: pattern2_1, 11802 destination: pattern2_2, 11803 } => { 11804 if let &Opcode::Jump = pattern2_0 { 11805 let pattern4_0 = C::value_list_slice(ctx, pattern2_1); 11806 let pattern5_0 = arg1; 11807 // Rule at src/isa/s390x/lower.isle line 2068. 11808 let expr0_0: u8 = 0; 11809 let expr1_0 = C::vec_element(ctx, pattern5_0, expr0_0); 11810 let expr2_0 = constructor_jump_impl(ctx, expr1_0)?; 11811 let expr3_0 = constructor_side_effect(ctx, &expr2_0)?; 11812 return Some(expr3_0); 11813 } 11814 } 11815 &InstructionData::BranchInt { 11816 opcode: ref pattern2_0, 11817 args: pattern2_1, 11818 cond: ref pattern2_2, 11819 destination: pattern2_3, 11820 } => { 11821 if let &Opcode::Brif = pattern2_0 { 11822 let (pattern4_0, pattern4_1) = C::unwrap_head_value_list_1(ctx, pattern2_1); 11823 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 11824 let pattern6_0 = C::inst_data(ctx, pattern5_0); 11825 if let &InstructionData::Binary { 11826 opcode: ref pattern7_0, 11827 args: ref pattern7_1, 11828 } = &pattern6_0 11829 { 11830 if let &Opcode::Ifcmp = pattern7_0 { 11831 let (pattern9_0, pattern9_1) = C::unpack_value_array_2(ctx, pattern7_1); 11832 let pattern10_0 = arg1; 11833 // Rule at src/isa/s390x/lower.isle line 2131. 11834 let expr0_0: bool = false; 11835 let expr1_0 = constructor_icmp_val( 11836 ctx, expr0_0, pattern2_2, pattern9_0, pattern9_1, 11837 )?; 11838 let expr2_0: u8 = 0; 11839 let expr3_0 = C::vec_element(ctx, pattern10_0, expr2_0); 11840 let expr4_0: u8 = 1; 11841 let expr5_0 = C::vec_element(ctx, pattern10_0, expr4_0); 11842 let expr6_0 = 11843 constructor_cond_br_bool(ctx, &expr1_0, expr3_0, expr5_0)?; 11844 let expr7_0 = constructor_side_effect(ctx, &expr6_0)?; 11845 return Some(expr7_0); 11846 } 11847 } 11848 } 11849 } 11850 } 11851 _ => {} 11852 } 11853 return None; 11854 } 11855 11856 // Generated as internal constructor for term output_ifcout. 11857 pub fn constructor_output_ifcout<C: Context>(ctx: &mut C, arg0: Reg) -> Option<InstOutput> { 11858 let pattern0_0 = arg0; 11859 // Rule at src/isa/s390x/lower.isle line 154. 11860 let expr0_0 = C::value_reg(ctx, pattern0_0); 11861 let expr1_0 = C::value_regs_invalid(ctx); 11862 let expr2_0 = C::output_pair(ctx, expr0_0, expr1_0); 11863 return Some(expr2_0); 11864 } 11865 11866 // Generated as internal constructor for term zero_divisor_check_needed. 11867 pub fn constructor_zero_divisor_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11868 let pattern0_0 = arg0; 11869 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11870 let pattern2_0 = 0; 11871 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11872 // Rule at src/isa/s390x/lower.isle line 344. 11873 let expr0_0: bool = false; 11874 return Some(expr0_0); 11875 } 11876 } 11877 let pattern1_0 = C::value_type(ctx, pattern0_0); 11878 if let Some(()) = C::allow_div_traps(ctx, pattern1_0) { 11879 // Rule at src/isa/s390x/lower.isle line 345. 11880 let expr0_0: bool = false; 11881 return Some(expr0_0); 11882 } 11883 // Rule at src/isa/s390x/lower.isle line 346. 11884 let expr0_0: bool = true; 11885 return Some(expr0_0); 11886 } 11887 11888 // Generated as internal constructor for term maybe_trap_if_zero_divisor. 11889 pub fn constructor_maybe_trap_if_zero_divisor<C: Context>( 11890 ctx: &mut C, 11891 arg0: bool, 11892 arg1: Type, 11893 arg2: Reg, 11894 ) -> Option<Reg> { 11895 let pattern0_0 = arg0; 11896 if pattern0_0 == true { 11897 let pattern2_0 = arg1; 11898 let pattern3_0 = arg2; 11899 // Rule at src/isa/s390x/lower.isle line 352. 11900 let expr0_0: i16 = 0; 11901 let expr1_0 = IntCC::Equal; 11902 let expr2_0 = C::intcc_as_cond(ctx, &expr1_0); 11903 let expr3_0 = C::trap_code_division_by_zero(ctx); 11904 let expr4_0 = constructor_icmps_simm16_and_trap( 11905 ctx, pattern2_0, pattern3_0, expr0_0, &expr2_0, &expr3_0, 11906 )?; 11907 return Some(expr4_0); 11908 } 11909 if pattern0_0 == false { 11910 let pattern2_0 = arg1; 11911 let pattern3_0 = arg2; 11912 // Rule at src/isa/s390x/lower.isle line 351. 11913 let expr0_0 = C::invalid_reg(ctx); 11914 return Some(expr0_0); 11915 } 11916 return None; 11917 } 11918 11919 // Generated as internal constructor for term div_overflow_check_needed. 11920 pub fn constructor_div_overflow_check_needed<C: Context>(ctx: &mut C, arg0: Value) -> Option<bool> { 11921 let pattern0_0 = arg0; 11922 if let Some(pattern1_0) = C::i64_from_value(ctx, pattern0_0) { 11923 let pattern2_0 = -1; 11924 if let Some(pattern3_0) = C::i64_nonequal(ctx, pattern1_0, pattern2_0) { 11925 // Rule at src/isa/s390x/lower.isle line 425. 11926 let expr0_0: bool = false; 11927 return Some(expr0_0); 11928 } 11929 } 11930 // Rule at src/isa/s390x/lower.isle line 426. 11931 let expr0_0: bool = true; 11932 return Some(expr0_0); 11933 } 11934 11935 // Generated as internal constructor for term maybe_trap_if_sdiv_overflow. 11936 pub fn constructor_maybe_trap_if_sdiv_overflow<C: Context>( 11937 ctx: &mut C, 11938 arg0: bool, 11939 arg1: Type, 11940 arg2: Type, 11941 arg3: &RegPair, 11942 arg4: Reg, 11943 ) -> Option<Reg> { 11944 let pattern0_0 = arg0; 11945 if pattern0_0 == true { 11946 let pattern2_0 = arg1; 11947 let pattern3_0 = arg2; 11948 let pattern4_0 = arg3; 11949 let pattern5_0 = arg4; 11950 // Rule at src/isa/s390x/lower.isle line 439. 11951 let expr0_0 = constructor_int_max(ctx, pattern3_0)?; 11952 let expr1_0 = constructor_imm(ctx, pattern2_0, expr0_0)?; 11953 let expr2_0 = constructor_regpair_lo(ctx, pattern4_0)?; 11954 let expr3_0 = constructor_xor_reg(ctx, pattern2_0, expr1_0, expr2_0)?; 11955 let expr4_0 = constructor_and_reg(ctx, pattern2_0, expr3_0, pattern5_0)?; 11956 let expr5_0: i16 = -1; 11957 let expr6_0 = IntCC::Equal; 11958 let expr7_0 = C::intcc_as_cond(ctx, &expr6_0); 11959 let expr8_0 = C::trap_code_integer_overflow(ctx); 11960 let expr9_0 = constructor_icmps_simm16_and_trap( 11961 ctx, pattern2_0, expr4_0, expr5_0, &expr7_0, &expr8_0, 11962 )?; 11963 return Some(expr9_0); 11964 } 11965 if pattern0_0 == false { 11966 let pattern2_0 = arg1; 11967 let pattern3_0 = arg2; 11968 let pattern4_0 = arg3; 11969 let pattern5_0 = arg4; 11970 // Rule at src/isa/s390x/lower.isle line 438. 11971 let expr0_0 = C::invalid_reg(ctx); 11972 return Some(expr0_0); 11973 } 11974 return None; 11975 } 11976 11977 // Generated as internal constructor for term int_max. 11978 pub fn constructor_int_max<C: Context>(ctx: &mut C, arg0: Type) -> Option<u64> { 11979 let pattern0_0 = arg0; 11980 if pattern0_0 == I8 { 11981 // Rule at src/isa/s390x/lower.isle line 447. 11982 let expr0_0: u64 = 127; 11983 return Some(expr0_0); 11984 } 11985 if pattern0_0 == I16 { 11986 // Rule at src/isa/s390x/lower.isle line 448. 11987 let expr0_0: u64 = 32767; 11988 return Some(expr0_0); 11989 } 11990 if pattern0_0 == I32 { 11991 // Rule at src/isa/s390x/lower.isle line 449. 11992 let expr0_0: u64 = 2147483647; 11993 return Some(expr0_0); 11994 } 11995 if pattern0_0 == I64 { 11996 // Rule at src/isa/s390x/lower.isle line 450. 11997 let expr0_0: u64 = 9223372036854775807; 11998 return Some(expr0_0); 11999 } 12000 return None; 12001 } 12002 12003 // Generated as internal constructor for term maybe_avoid_srem_overflow. 12004 pub fn constructor_maybe_avoid_srem_overflow<C: Context>( 12005 ctx: &mut C, 12006 arg0: bool, 12007 arg1: Type, 12008 arg2: &RegPair, 12009 arg3: Reg, 12010 ) -> Option<RegPair> { 12011 let pattern0_0 = arg0; 12012 if pattern0_0 == true { 12013 let pattern2_0 = arg1; 12014 if pattern2_0 == I32 { 12015 let pattern4_0 = arg2; 12016 let pattern5_0 = arg3; 12017 // Rule at src/isa/s390x/lower.isle line 468. 12018 return Some(pattern4_0.clone()); 12019 } 12020 if pattern2_0 == I64 { 12021 let pattern4_0 = arg2; 12022 let pattern5_0 = arg3; 12023 // Rule at src/isa/s390x/lower.isle line 469. 12024 let expr0_0: Type = I64; 12025 let expr1_0: Type = I64; 12026 let expr2_0: i16 = -1; 12027 let expr3_0 = constructor_icmps_simm16(ctx, expr1_0, pattern5_0, expr2_0)?; 12028 let expr4_0 = IntCC::Equal; 12029 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 12030 let expr6_0: i16 = 0; 12031 let expr7_0 = constructor_cmov_imm_regpair_lo( 12032 ctx, expr0_0, &expr3_0, &expr5_0, expr6_0, pattern4_0, 12033 )?; 12034 return Some(expr7_0); 12035 } 12036 } 12037 if pattern0_0 == false { 12038 let pattern2_0 = arg1; 12039 let pattern3_0 = arg2; 12040 let pattern4_0 = arg3; 12041 // Rule at src/isa/s390x/lower.isle line 467. 12042 return Some(pattern3_0.clone()); 12043 } 12044 return None; 12045 } 12046 12047 // Generated as internal constructor for term cast_bool. 12048 pub fn constructor_cast_bool<C: Context>(ctx: &mut C, arg0: Type, arg1: Value) -> Option<Reg> { 12049 let pattern0_0 = arg0; 12050 if pattern0_0 == B1 { 12051 let pattern2_0 = arg1; 12052 let pattern3_0 = C::value_type(ctx, pattern2_0); 12053 if pattern3_0 == B1 { 12054 // Rule at src/isa/s390x/lower.isle line 766. 12055 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12056 return Some(expr0_0); 12057 } 12058 if pattern3_0 == B8 { 12059 // Rule at src/isa/s390x/lower.isle line 767. 12060 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12061 return Some(expr0_0); 12062 } 12063 } 12064 if pattern0_0 == B8 { 12065 let pattern2_0 = arg1; 12066 let pattern3_0 = C::value_type(ctx, pattern2_0); 12067 if pattern3_0 == B8 { 12068 // Rule at src/isa/s390x/lower.isle line 768. 12069 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12070 return Some(expr0_0); 12071 } 12072 } 12073 if pattern0_0 == I8 { 12074 let pattern2_0 = arg1; 12075 let pattern3_0 = C::value_type(ctx, pattern2_0); 12076 if pattern3_0 == B8 { 12077 // Rule at src/isa/s390x/lower.isle line 769. 12078 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12079 return Some(expr0_0); 12080 } 12081 } 12082 if let Some(pattern1_0) = C::fits_in_16(ctx, pattern0_0) { 12083 let pattern2_0 = arg1; 12084 let pattern3_0 = C::value_type(ctx, pattern2_0); 12085 if pattern3_0 == B16 { 12086 // Rule at src/isa/s390x/lower.isle line 770. 12087 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12088 return Some(expr0_0); 12089 } 12090 } 12091 if let Some(pattern1_0) = C::fits_in_32(ctx, pattern0_0) { 12092 let pattern2_0 = arg1; 12093 let pattern3_0 = C::value_type(ctx, pattern2_0); 12094 if pattern3_0 == B32 { 12095 // Rule at src/isa/s390x/lower.isle line 771. 12096 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12097 return Some(expr0_0); 12098 } 12099 } 12100 if let Some(pattern1_0) = C::fits_in_64(ctx, pattern0_0) { 12101 let pattern2_0 = arg1; 12102 let pattern3_0 = C::value_type(ctx, pattern2_0); 12103 if pattern3_0 == B64 { 12104 // Rule at src/isa/s390x/lower.isle line 772. 12105 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12106 return Some(expr0_0); 12107 } 12108 } 12109 if let Some(pattern1_0) = C::gpr32_ty(ctx, pattern0_0) { 12110 let pattern2_0 = arg1; 12111 let pattern3_0 = C::value_type(ctx, pattern2_0); 12112 if pattern3_0 == B1 { 12113 // Rule at src/isa/s390x/lower.isle line 775. 12114 let expr0_0: Type = I32; 12115 let expr1_0: Type = I32; 12116 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12117 let expr3_0: u8 = 31; 12118 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12119 let expr5_0: u8 = 31; 12120 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12121 return Some(expr6_0); 12122 } 12123 if pattern3_0 == B8 { 12124 // Rule at src/isa/s390x/lower.isle line 781. 12125 let expr0_0: Type = I8; 12126 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12127 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12128 return Some(expr2_0); 12129 } 12130 if pattern3_0 == B16 { 12131 // Rule at src/isa/s390x/lower.isle line 783. 12132 let expr0_0: Type = I16; 12133 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12134 let expr2_0 = constructor_sext32_reg(ctx, expr0_0, expr1_0)?; 12135 return Some(expr2_0); 12136 } 12137 } 12138 if let Some(pattern1_0) = C::gpr64_ty(ctx, pattern0_0) { 12139 let pattern2_0 = arg1; 12140 let pattern3_0 = C::value_type(ctx, pattern2_0); 12141 if pattern3_0 == B1 { 12142 // Rule at src/isa/s390x/lower.isle line 777. 12143 let expr0_0: Type = I64; 12144 let expr1_0: Type = I64; 12145 let expr2_0 = C::put_in_reg(ctx, pattern2_0); 12146 let expr3_0: u8 = 63; 12147 let expr4_0 = constructor_lshl_imm(ctx, expr1_0, expr2_0, expr3_0)?; 12148 let expr5_0: u8 = 63; 12149 let expr6_0 = constructor_ashr_imm(ctx, expr0_0, expr4_0, expr5_0)?; 12150 return Some(expr6_0); 12151 } 12152 if pattern3_0 == B8 { 12153 // Rule at src/isa/s390x/lower.isle line 785. 12154 let expr0_0: Type = I8; 12155 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12156 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12157 return Some(expr2_0); 12158 } 12159 if pattern3_0 == B16 { 12160 // Rule at src/isa/s390x/lower.isle line 787. 12161 let expr0_0: Type = I16; 12162 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12163 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12164 return Some(expr2_0); 12165 } 12166 if pattern3_0 == B32 { 12167 // Rule at src/isa/s390x/lower.isle line 789. 12168 let expr0_0: Type = I32; 12169 let expr1_0 = C::put_in_reg(ctx, pattern2_0); 12170 let expr2_0 = constructor_sext64_reg(ctx, expr0_0, expr1_0)?; 12171 return Some(expr2_0); 12172 } 12173 } 12174 return None; 12175 } 12176 12177 // Generated as internal constructor for term clz_offset. 12178 pub fn constructor_clz_offset<C: Context>(ctx: &mut C, arg0: Type, arg1: Reg) -> Option<Reg> { 12179 let pattern0_0 = arg0; 12180 if pattern0_0 == I8 { 12181 let pattern2_0 = arg1; 12182 // Rule at src/isa/s390x/lower.isle line 814. 12183 let expr0_0: Type = I8; 12184 let expr1_0: i16 = -56; 12185 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12186 return Some(expr2_0); 12187 } 12188 if pattern0_0 == I16 { 12189 let pattern2_0 = arg1; 12190 // Rule at src/isa/s390x/lower.isle line 815. 12191 let expr0_0: Type = I16; 12192 let expr1_0: i16 = -48; 12193 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12194 return Some(expr2_0); 12195 } 12196 if pattern0_0 == I32 { 12197 let pattern2_0 = arg1; 12198 // Rule at src/isa/s390x/lower.isle line 816. 12199 let expr0_0: Type = I32; 12200 let expr1_0: i16 = -32; 12201 let expr2_0 = constructor_add_simm16(ctx, expr0_0, pattern2_0, expr1_0)?; 12202 return Some(expr2_0); 12203 } 12204 if pattern0_0 == I64 { 12205 let pattern2_0 = arg1; 12206 // Rule at src/isa/s390x/lower.isle line 817. 12207 let expr0_0: Type = I64; 12208 let expr1_0 = constructor_copy_reg(ctx, expr0_0, pattern2_0)?; 12209 return Some(expr1_0); 12210 } 12211 return None; 12212 } 12213 12214 // Generated as internal constructor for term ctz_guardbit. 12215 pub fn constructor_ctz_guardbit<C: Context>(ctx: &mut C, arg0: Type) -> Option<UImm16Shifted> { 12216 let pattern0_0 = arg0; 12217 if pattern0_0 == I8 { 12218 // Rule at src/isa/s390x/lower.isle line 866. 12219 let expr0_0: u16 = 256; 12220 let expr1_0: u8 = 0; 12221 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12222 return Some(expr2_0); 12223 } 12224 if pattern0_0 == I16 { 12225 // Rule at src/isa/s390x/lower.isle line 867. 12226 let expr0_0: u16 = 1; 12227 let expr1_0: u8 = 16; 12228 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12229 return Some(expr2_0); 12230 } 12231 if pattern0_0 == I32 { 12232 // Rule at src/isa/s390x/lower.isle line 868. 12233 let expr0_0: u16 = 1; 12234 let expr1_0: u8 = 32; 12235 let expr2_0 = C::uimm16shifted(ctx, expr0_0, expr1_0); 12236 return Some(expr2_0); 12237 } 12238 return None; 12239 } 12240 12241 // Generated as internal constructor for term istore8_impl. 12242 pub fn constructor_istore8_impl<C: Context>( 12243 ctx: &mut C, 12244 arg0: MemFlags, 12245 arg1: Value, 12246 arg2: Value, 12247 arg3: Offset32, 12248 ) -> Option<SideEffectNoResult> { 12249 let pattern0_0 = arg0; 12250 let pattern1_0 = arg1; 12251 if let Some(pattern2_0) = C::u8_from_value(ctx, pattern1_0) { 12252 let pattern3_0 = arg2; 12253 let pattern4_0 = arg3; 12254 // Rule at src/isa/s390x/lower.isle line 1424. 12255 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12256 let expr1_0 = constructor_store8_imm(ctx, pattern2_0, &expr0_0)?; 12257 return Some(expr1_0); 12258 } 12259 let pattern2_0 = arg2; 12260 let pattern3_0 = arg3; 12261 // Rule at src/isa/s390x/lower.isle line 1420. 12262 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 12263 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern2_0, pattern3_0)?; 12264 let expr2_0 = constructor_store8(ctx, expr0_0, &expr1_0)?; 12265 return Some(expr2_0); 12266 } 12267 12268 // Generated as internal constructor for term istore16_impl. 12269 pub fn constructor_istore16_impl<C: Context>( 12270 ctx: &mut C, 12271 arg0: MemFlags, 12272 arg1: Value, 12273 arg2: Value, 12274 arg3: Offset32, 12275 ) -> Option<SideEffectNoResult> { 12276 let pattern0_0 = arg0; 12277 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12278 let pattern2_0 = arg1; 12279 if let Some(pattern3_0) = C::i16_from_swapped_value(ctx, pattern2_0) { 12280 let pattern4_0 = arg2; 12281 let pattern5_0 = arg3; 12282 // Rule at src/isa/s390x/lower.isle line 1450. 12283 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12284 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12285 return Some(expr1_0); 12286 } 12287 let pattern3_0 = arg2; 12288 let pattern4_0 = arg3; 12289 // Rule at src/isa/s390x/lower.isle line 1442. 12290 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12291 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12292 let expr2_0 = constructor_storerev16(ctx, expr0_0, &expr1_0)?; 12293 return Some(expr2_0); 12294 } 12295 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12296 let pattern2_0 = arg1; 12297 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12298 let pattern4_0 = arg2; 12299 let pattern5_0 = arg3; 12300 // Rule at src/isa/s390x/lower.isle line 1446. 12301 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12302 let expr1_0 = constructor_store16_imm(ctx, pattern3_0, &expr0_0)?; 12303 return Some(expr1_0); 12304 } 12305 let pattern3_0 = arg2; 12306 let pattern4_0 = arg3; 12307 // Rule at src/isa/s390x/lower.isle line 1438. 12308 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12309 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12310 let expr2_0 = constructor_store16(ctx, expr0_0, &expr1_0)?; 12311 return Some(expr2_0); 12312 } 12313 return None; 12314 } 12315 12316 // Generated as internal constructor for term istore32_impl. 12317 pub fn constructor_istore32_impl<C: Context>( 12318 ctx: &mut C, 12319 arg0: MemFlags, 12320 arg1: Value, 12321 arg2: Value, 12322 arg3: Offset32, 12323 ) -> Option<SideEffectNoResult> { 12324 let pattern0_0 = arg0; 12325 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12326 let pattern2_0 = arg1; 12327 let pattern3_0 = arg2; 12328 let pattern4_0 = arg3; 12329 // Rule at src/isa/s390x/lower.isle line 1472. 12330 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12331 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12332 let expr2_0 = constructor_storerev32(ctx, expr0_0, &expr1_0)?; 12333 return Some(expr2_0); 12334 } 12335 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12336 let pattern2_0 = arg1; 12337 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12338 let pattern4_0 = arg2; 12339 let pattern5_0 = arg3; 12340 // Rule at src/isa/s390x/lower.isle line 1468. 12341 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12342 let expr1_0 = constructor_store32_simm16(ctx, pattern3_0, &expr0_0)?; 12343 return Some(expr1_0); 12344 } 12345 let pattern3_0 = arg2; 12346 let pattern4_0 = arg3; 12347 // Rule at src/isa/s390x/lower.isle line 1464. 12348 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12349 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12350 let expr2_0 = constructor_store32(ctx, expr0_0, &expr1_0)?; 12351 return Some(expr2_0); 12352 } 12353 return None; 12354 } 12355 12356 // Generated as internal constructor for term istore64_impl. 12357 pub fn constructor_istore64_impl<C: Context>( 12358 ctx: &mut C, 12359 arg0: MemFlags, 12360 arg1: Value, 12361 arg2: Value, 12362 arg3: Offset32, 12363 ) -> Option<SideEffectNoResult> { 12364 let pattern0_0 = arg0; 12365 if let Some(()) = C::littleendian(ctx, pattern0_0) { 12366 let pattern2_0 = arg1; 12367 let pattern3_0 = arg2; 12368 let pattern4_0 = arg3; 12369 // Rule at src/isa/s390x/lower.isle line 1490. 12370 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12371 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12372 let expr2_0 = constructor_storerev64(ctx, expr0_0, &expr1_0)?; 12373 return Some(expr2_0); 12374 } 12375 if let Some(()) = C::bigendian(ctx, pattern0_0) { 12376 let pattern2_0 = arg1; 12377 if let Some(pattern3_0) = C::i16_from_value(ctx, pattern2_0) { 12378 let pattern4_0 = arg2; 12379 let pattern5_0 = arg3; 12380 // Rule at src/isa/s390x/lower.isle line 1486. 12381 let expr0_0 = constructor_lower_address(ctx, pattern0_0, pattern4_0, pattern5_0)?; 12382 let expr1_0 = constructor_store64_simm16(ctx, pattern3_0, &expr0_0)?; 12383 return Some(expr1_0); 12384 } 12385 let pattern3_0 = arg2; 12386 let pattern4_0 = arg3; 12387 // Rule at src/isa/s390x/lower.isle line 1482. 12388 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 12389 let expr1_0 = constructor_lower_address(ctx, pattern0_0, pattern3_0, pattern4_0)?; 12390 let expr2_0 = constructor_store64(ctx, expr0_0, &expr1_0)?; 12391 return Some(expr2_0); 12392 } 12393 return None; 12394 } 12395 12396 // Generated as internal constructor for term atomic_rmw_body. 12397 pub fn constructor_atomic_rmw_body<C: Context>( 12398 ctx: &mut C, 12399 arg0: &VecMInstBuilder, 12400 arg1: Type, 12401 arg2: MemFlags, 12402 arg3: &AtomicRmwOp, 12403 arg4: WritableReg, 12404 arg5: Reg, 12405 arg6: Reg, 12406 ) -> Option<Reg> { 12407 let pattern0_0 = arg0; 12408 let pattern1_0 = arg1; 12409 if let Some(()) = C::mie2_enabled(ctx, pattern1_0) { 12410 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12411 let pattern4_0 = arg2; 12412 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12413 let pattern6_0 = arg3; 12414 if let &AtomicRmwOp::Nand = pattern6_0 { 12415 let pattern8_0 = arg4; 12416 let pattern9_0 = arg5; 12417 let pattern10_0 = arg6; 12418 // Rule at src/isa/s390x/lower.isle line 1598. 12419 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12420 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12421 let expr2_0 = constructor_push_alu_reg( 12422 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12423 )?; 12424 return Some(expr2_0); 12425 } 12426 } 12427 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12428 let pattern6_0 = arg3; 12429 if let &AtomicRmwOp::Nand = pattern6_0 { 12430 let pattern8_0 = arg4; 12431 let pattern9_0 = arg5; 12432 let pattern10_0 = arg6; 12433 // Rule at src/isa/s390x/lower.isle line 1595. 12434 let expr0_0 = constructor_aluop_and_not(ctx, pattern3_0)?; 12435 let expr1_0 = constructor_push_alu_reg( 12436 ctx, 12437 pattern0_0, 12438 &expr0_0, 12439 pattern8_0, 12440 pattern9_0, 12441 pattern10_0, 12442 )?; 12443 return Some(expr1_0); 12444 } 12445 } 12446 } 12447 } 12448 if let Some(()) = C::mie2_disabled(ctx, pattern1_0) { 12449 if let Some(pattern3_0) = C::ty_32_or_64(ctx, pattern1_0) { 12450 let pattern4_0 = arg2; 12451 if let Some(()) = C::littleendian(ctx, pattern4_0) { 12452 let pattern6_0 = arg3; 12453 if let &AtomicRmwOp::Nand = pattern6_0 { 12454 let pattern8_0 = arg4; 12455 let pattern9_0 = arg5; 12456 let pattern10_0 = arg6; 12457 // Rule at src/isa/s390x/lower.isle line 1605. 12458 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12459 let expr1_0 = constructor_bswap_reg(ctx, pattern3_0, pattern10_0)?; 12460 let expr2_0 = constructor_push_alu_reg( 12461 ctx, pattern0_0, &expr0_0, pattern8_0, pattern9_0, expr1_0, 12462 )?; 12463 let expr3_0 = 12464 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr2_0)?; 12465 return Some(expr3_0); 12466 } 12467 } 12468 if let Some(()) = C::bigendian(ctx, pattern4_0) { 12469 let pattern6_0 = arg3; 12470 if let &AtomicRmwOp::Nand = pattern6_0 { 12471 let pattern8_0 = arg4; 12472 let pattern9_0 = arg5; 12473 let pattern10_0 = arg6; 12474 // Rule at src/isa/s390x/lower.isle line 1601. 12475 let expr0_0 = constructor_aluop_and(ctx, pattern3_0)?; 12476 let expr1_0 = constructor_push_alu_reg( 12477 ctx, 12478 pattern0_0, 12479 &expr0_0, 12480 pattern8_0, 12481 pattern9_0, 12482 pattern10_0, 12483 )?; 12484 let expr2_0 = 12485 constructor_push_not_reg(ctx, pattern0_0, pattern3_0, pattern8_0, expr1_0)?; 12486 return Some(expr2_0); 12487 } 12488 } 12489 } 12490 } 12491 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12492 let pattern3_0 = arg2; 12493 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12494 let pattern5_0 = arg3; 12495 if let &AtomicRmwOp::Xchg = pattern5_0 { 12496 let pattern7_0 = arg4; 12497 let pattern8_0 = arg5; 12498 let pattern9_0 = arg6; 12499 // Rule at src/isa/s390x/lower.isle line 1587. 12500 let expr0_0 = constructor_bswap_reg(ctx, pattern2_0, pattern9_0)?; 12501 return Some(expr0_0); 12502 } 12503 } 12504 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12505 let pattern5_0 = arg3; 12506 if let &AtomicRmwOp::Xchg = pattern5_0 { 12507 let pattern7_0 = arg4; 12508 let pattern8_0 = arg5; 12509 let pattern9_0 = arg6; 12510 // Rule at src/isa/s390x/lower.isle line 1584. 12511 return Some(pattern9_0); 12512 } 12513 } 12514 } 12515 if let Some(pattern2_0) = C::ty_8_or_16(ctx, pattern1_0) { 12516 let pattern3_0 = arg2; 12517 let pattern4_0 = arg3; 12518 match pattern4_0 { 12519 &AtomicRmwOp::And => { 12520 let pattern6_0 = arg4; 12521 let pattern7_0 = arg5; 12522 let pattern8_0 = arg6; 12523 // Rule at src/isa/s390x/lower.isle line 1615. 12524 let expr0_0 = RxSBGOp::And; 12525 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12526 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12527 pattern8_0, 12528 )?; 12529 return Some(expr1_0); 12530 } 12531 &AtomicRmwOp::Nand => { 12532 let pattern6_0 = arg4; 12533 let pattern7_0 = arg5; 12534 let pattern8_0 = arg6; 12535 // Rule at src/isa/s390x/lower.isle line 1621. 12536 let expr0_0 = RxSBGOp::And; 12537 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12538 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12539 pattern8_0, 12540 )?; 12541 let expr2_0 = constructor_atomic_rmw_body_invert( 12542 ctx, pattern0_0, pattern2_0, pattern3_0, pattern6_0, expr1_0, 12543 )?; 12544 return Some(expr2_0); 12545 } 12546 &AtomicRmwOp::Or => { 12547 let pattern6_0 = arg4; 12548 let pattern7_0 = arg5; 12549 let pattern8_0 = arg6; 12550 // Rule at src/isa/s390x/lower.isle line 1617. 12551 let expr0_0 = RxSBGOp::Or; 12552 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12553 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12554 pattern8_0, 12555 )?; 12556 return Some(expr1_0); 12557 } 12558 &AtomicRmwOp::Xchg => { 12559 let pattern6_0 = arg4; 12560 let pattern7_0 = arg5; 12561 let pattern8_0 = arg6; 12562 // Rule at src/isa/s390x/lower.isle line 1613. 12563 let expr0_0 = RxSBGOp::Insert; 12564 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12565 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12566 pattern8_0, 12567 )?; 12568 return Some(expr1_0); 12569 } 12570 &AtomicRmwOp::Xor => { 12571 let pattern6_0 = arg4; 12572 let pattern7_0 = arg5; 12573 let pattern8_0 = arg6; 12574 // Rule at src/isa/s390x/lower.isle line 1619. 12575 let expr0_0 = RxSBGOp::Xor; 12576 let expr1_0 = constructor_atomic_rmw_body_rxsbg( 12577 ctx, pattern0_0, pattern2_0, pattern3_0, &expr0_0, pattern6_0, pattern7_0, 12578 pattern8_0, 12579 )?; 12580 return Some(expr1_0); 12581 } 12582 _ => {} 12583 } 12584 } 12585 let pattern2_0 = arg2; 12586 let pattern3_0 = arg3; 12587 match pattern3_0 { 12588 &AtomicRmwOp::Add => { 12589 let pattern5_0 = arg4; 12590 let pattern6_0 = arg5; 12591 let pattern7_0 = arg6; 12592 // Rule at src/isa/s390x/lower.isle line 1653. 12593 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12594 let expr1_0 = constructor_aluop_add(ctx, expr0_0)?; 12595 let expr2_0 = constructor_atomic_rmw_body_addsub( 12596 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12597 pattern7_0, 12598 )?; 12599 return Some(expr2_0); 12600 } 12601 &AtomicRmwOp::Smax => { 12602 let pattern5_0 = arg4; 12603 let pattern6_0 = arg5; 12604 let pattern7_0 = arg6; 12605 // Rule at src/isa/s390x/lower.isle line 1694. 12606 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12607 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12608 let expr2_0 = IntCC::SignedGreaterThan; 12609 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12610 let expr4_0 = constructor_atomic_rmw_body_minmax( 12611 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12612 pattern6_0, pattern7_0, 12613 )?; 12614 return Some(expr4_0); 12615 } 12616 &AtomicRmwOp::Smin => { 12617 let pattern5_0 = arg4; 12618 let pattern6_0 = arg5; 12619 let pattern7_0 = arg6; 12620 // Rule at src/isa/s390x/lower.isle line 1691. 12621 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12622 let expr1_0 = constructor_cmpop_cmps(ctx, expr0_0)?; 12623 let expr2_0 = IntCC::SignedLessThan; 12624 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12625 let expr4_0 = constructor_atomic_rmw_body_minmax( 12626 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12627 pattern6_0, pattern7_0, 12628 )?; 12629 return Some(expr4_0); 12630 } 12631 &AtomicRmwOp::Sub => { 12632 let pattern5_0 = arg4; 12633 let pattern6_0 = arg5; 12634 let pattern7_0 = arg6; 12635 // Rule at src/isa/s390x/lower.isle line 1655. 12636 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12637 let expr1_0 = constructor_aluop_sub(ctx, expr0_0)?; 12638 let expr2_0 = constructor_atomic_rmw_body_addsub( 12639 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, pattern5_0, pattern6_0, 12640 pattern7_0, 12641 )?; 12642 return Some(expr2_0); 12643 } 12644 &AtomicRmwOp::Umax => { 12645 let pattern5_0 = arg4; 12646 let pattern6_0 = arg5; 12647 let pattern7_0 = arg6; 12648 // Rule at src/isa/s390x/lower.isle line 1700. 12649 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12650 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12651 let expr2_0 = IntCC::UnsignedGreaterThan; 12652 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12653 let expr4_0 = constructor_atomic_rmw_body_minmax( 12654 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12655 pattern6_0, pattern7_0, 12656 )?; 12657 return Some(expr4_0); 12658 } 12659 &AtomicRmwOp::Umin => { 12660 let pattern5_0 = arg4; 12661 let pattern6_0 = arg5; 12662 let pattern7_0 = arg6; 12663 // Rule at src/isa/s390x/lower.isle line 1697. 12664 let expr0_0 = constructor_ty_ext32(ctx, pattern1_0)?; 12665 let expr1_0 = constructor_cmpop_cmpu(ctx, expr0_0)?; 12666 let expr2_0 = IntCC::UnsignedLessThan; 12667 let expr3_0 = C::intcc_as_cond(ctx, &expr2_0); 12668 let expr4_0 = constructor_atomic_rmw_body_minmax( 12669 ctx, pattern0_0, pattern1_0, pattern2_0, &expr1_0, &expr3_0, pattern5_0, 12670 pattern6_0, pattern7_0, 12671 )?; 12672 return Some(expr4_0); 12673 } 12674 _ => {} 12675 } 12676 return None; 12677 } 12678 12679 // Generated as internal constructor for term atomic_rmw_body_rxsbg. 12680 pub fn constructor_atomic_rmw_body_rxsbg<C: Context>( 12681 ctx: &mut C, 12682 arg0: &VecMInstBuilder, 12683 arg1: Type, 12684 arg2: MemFlags, 12685 arg3: &RxSBGOp, 12686 arg4: WritableReg, 12687 arg5: Reg, 12688 arg6: Reg, 12689 ) -> Option<Reg> { 12690 let pattern0_0 = arg0; 12691 let pattern1_0 = arg1; 12692 if pattern1_0 == I8 { 12693 let pattern3_0 = arg2; 12694 let pattern4_0 = arg3; 12695 let pattern5_0 = arg4; 12696 let pattern6_0 = arg5; 12697 let pattern7_0 = arg6; 12698 // Rule at src/isa/s390x/lower.isle line 1629. 12699 let expr0_0: u8 = 32; 12700 let expr1_0: u8 = 40; 12701 let expr2_0: i8 = 24; 12702 let expr3_0 = constructor_push_rxsbg( 12703 ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, pattern7_0, expr0_0, expr1_0, 12704 expr2_0, 12705 )?; 12706 return Some(expr3_0); 12707 } 12708 if pattern1_0 == I16 { 12709 let pattern3_0 = arg2; 12710 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12711 let pattern5_0 = arg3; 12712 let pattern6_0 = arg4; 12713 let pattern7_0 = arg5; 12714 let pattern8_0 = arg6; 12715 // Rule at src/isa/s390x/lower.isle line 1637. 12716 let expr0_0: Type = I32; 12717 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern8_0)?; 12718 let expr2_0: u8 = 48; 12719 let expr3_0: u8 = 64; 12720 let expr4_0: i8 = -16; 12721 let expr5_0 = constructor_push_rxsbg( 12722 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 12723 expr4_0, 12724 )?; 12725 return Some(expr5_0); 12726 } 12727 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12728 let pattern5_0 = arg3; 12729 let pattern6_0 = arg4; 12730 let pattern7_0 = arg5; 12731 let pattern8_0 = arg6; 12732 // Rule at src/isa/s390x/lower.isle line 1633. 12733 let expr0_0: u8 = 32; 12734 let expr1_0: u8 = 48; 12735 let expr2_0: i8 = 16; 12736 let expr3_0 = constructor_push_rxsbg( 12737 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, expr0_0, expr1_0, 12738 expr2_0, 12739 )?; 12740 return Some(expr3_0); 12741 } 12742 } 12743 return None; 12744 } 12745 12746 // Generated as internal constructor for term atomic_rmw_body_invert. 12747 pub fn constructor_atomic_rmw_body_invert<C: Context>( 12748 ctx: &mut C, 12749 arg0: &VecMInstBuilder, 12750 arg1: Type, 12751 arg2: MemFlags, 12752 arg3: WritableReg, 12753 arg4: Reg, 12754 ) -> Option<Reg> { 12755 let pattern0_0 = arg0; 12756 let pattern1_0 = arg1; 12757 if pattern1_0 == I8 { 12758 let pattern3_0 = arg2; 12759 let pattern4_0 = arg3; 12760 let pattern5_0 = arg4; 12761 // Rule at src/isa/s390x/lower.isle line 1643. 12762 let expr0_0: Type = I32; 12763 let expr1_0: u32 = 4278190080; 12764 let expr2_0: u8 = 0; 12765 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12766 let expr4_0 = constructor_push_xor_uimm32shifted( 12767 ctx, pattern0_0, expr0_0, pattern4_0, pattern5_0, expr3_0, 12768 )?; 12769 return Some(expr4_0); 12770 } 12771 if pattern1_0 == I16 { 12772 let pattern3_0 = arg2; 12773 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12774 let pattern5_0 = arg3; 12775 let pattern6_0 = arg4; 12776 // Rule at src/isa/s390x/lower.isle line 1649. 12777 let expr0_0: Type = I32; 12778 let expr1_0: u32 = 65535; 12779 let expr2_0: u8 = 0; 12780 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12781 let expr4_0 = constructor_push_xor_uimm32shifted( 12782 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12783 )?; 12784 return Some(expr4_0); 12785 } 12786 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12787 let pattern5_0 = arg3; 12788 let pattern6_0 = arg4; 12789 // Rule at src/isa/s390x/lower.isle line 1646. 12790 let expr0_0: Type = I32; 12791 let expr1_0: u32 = 4294901760; 12792 let expr2_0: u8 = 0; 12793 let expr3_0 = C::uimm32shifted(ctx, expr1_0, expr2_0); 12794 let expr4_0 = constructor_push_xor_uimm32shifted( 12795 ctx, pattern0_0, expr0_0, pattern5_0, pattern6_0, expr3_0, 12796 )?; 12797 return Some(expr4_0); 12798 } 12799 } 12800 return None; 12801 } 12802 12803 // Generated as internal constructor for term atomic_rmw_body_addsub. 12804 pub fn constructor_atomic_rmw_body_addsub<C: Context>( 12805 ctx: &mut C, 12806 arg0: &VecMInstBuilder, 12807 arg1: Type, 12808 arg2: MemFlags, 12809 arg3: &ALUOp, 12810 arg4: WritableReg, 12811 arg5: Reg, 12812 arg6: Reg, 12813 ) -> Option<Reg> { 12814 let pattern0_0 = arg0; 12815 let pattern1_0 = arg1; 12816 if pattern1_0 == I8 { 12817 let pattern3_0 = arg2; 12818 let pattern4_0 = arg3; 12819 let pattern5_0 = arg4; 12820 let pattern6_0 = arg5; 12821 let pattern7_0 = arg6; 12822 // Rule at src/isa/s390x/lower.isle line 1672. 12823 let expr0_0: Type = I32; 12824 let expr1_0: u8 = 24; 12825 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern7_0, expr1_0)?; 12826 let expr3_0 = 12827 constructor_push_alu_reg(ctx, pattern0_0, pattern4_0, pattern5_0, pattern6_0, expr2_0)?; 12828 return Some(expr3_0); 12829 } 12830 if pattern1_0 == I16 { 12831 let pattern3_0 = arg2; 12832 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12833 let pattern5_0 = arg3; 12834 let pattern6_0 = arg4; 12835 let pattern7_0 = arg5; 12836 let pattern8_0 = arg6; 12837 // Rule at src/isa/s390x/lower.isle line 1684. 12838 let expr0_0: Type = I32; 12839 let expr1_0: u8 = 16; 12840 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12841 let expr3_0: Type = I32; 12842 let expr4_0 = 12843 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern6_0, pattern7_0)?; 12844 let expr5_0 = constructor_push_alu_reg( 12845 ctx, pattern0_0, pattern5_0, pattern6_0, expr4_0, expr2_0, 12846 )?; 12847 let expr6_0: Type = I32; 12848 let expr7_0 = 12849 constructor_push_bswap_reg(ctx, pattern0_0, expr6_0, pattern6_0, expr5_0)?; 12850 return Some(expr7_0); 12851 } 12852 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12853 let pattern5_0 = arg3; 12854 let pattern6_0 = arg4; 12855 let pattern7_0 = arg5; 12856 let pattern8_0 = arg6; 12857 // Rule at src/isa/s390x/lower.isle line 1676. 12858 let expr0_0: Type = I32; 12859 let expr1_0: u8 = 16; 12860 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12861 let expr3_0 = constructor_push_alu_reg( 12862 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, expr2_0, 12863 )?; 12864 return Some(expr3_0); 12865 } 12866 } 12867 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12868 let pattern3_0 = arg2; 12869 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12870 let pattern5_0 = arg3; 12871 let pattern6_0 = arg4; 12872 let pattern7_0 = arg5; 12873 let pattern8_0 = arg6; 12874 // Rule at src/isa/s390x/lower.isle line 1666. 12875 let expr0_0 = 12876 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, pattern7_0)?; 12877 let expr1_0 = constructor_push_alu_reg( 12878 ctx, pattern0_0, pattern5_0, pattern6_0, expr0_0, pattern8_0, 12879 )?; 12880 let expr2_0 = 12881 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern6_0, expr1_0)?; 12882 return Some(expr2_0); 12883 } 12884 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12885 let pattern5_0 = arg3; 12886 let pattern6_0 = arg4; 12887 let pattern7_0 = arg5; 12888 let pattern8_0 = arg6; 12889 // Rule at src/isa/s390x/lower.isle line 1662. 12890 let expr0_0 = constructor_push_alu_reg( 12891 ctx, pattern0_0, pattern5_0, pattern6_0, pattern7_0, pattern8_0, 12892 )?; 12893 return Some(expr0_0); 12894 } 12895 } 12896 return None; 12897 } 12898 12899 // Generated as internal constructor for term atomic_rmw_body_minmax. 12900 pub fn constructor_atomic_rmw_body_minmax<C: Context>( 12901 ctx: &mut C, 12902 arg0: &VecMInstBuilder, 12903 arg1: Type, 12904 arg2: MemFlags, 12905 arg3: &CmpOp, 12906 arg4: &Cond, 12907 arg5: WritableReg, 12908 arg6: Reg, 12909 arg7: Reg, 12910 ) -> Option<Reg> { 12911 let pattern0_0 = arg0; 12912 let pattern1_0 = arg1; 12913 if pattern1_0 == I8 { 12914 let pattern3_0 = arg2; 12915 let pattern4_0 = arg3; 12916 let pattern5_0 = arg4; 12917 let pattern6_0 = arg5; 12918 let pattern7_0 = arg6; 12919 let pattern8_0 = arg7; 12920 // Rule at src/isa/s390x/lower.isle line 1729. 12921 let expr0_0: Type = I32; 12922 let expr1_0: u8 = 24; 12923 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern8_0, expr1_0)?; 12924 let expr3_0 = constructor_cmp_rr(ctx, pattern4_0, expr2_0, pattern7_0)?; 12925 let expr4_0 = C::invert_cond(ctx, pattern5_0); 12926 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 12927 let expr6_0 = RxSBGOp::Insert; 12928 let expr7_0: u8 = 32; 12929 let expr8_0: u8 = 40; 12930 let expr9_0: i8 = 0; 12931 let expr10_0 = constructor_push_rxsbg( 12932 ctx, pattern0_0, &expr6_0, pattern6_0, pattern7_0, expr2_0, expr7_0, expr8_0, expr9_0, 12933 )?; 12934 return Some(expr10_0); 12935 } 12936 if pattern1_0 == I16 { 12937 let pattern3_0 = arg2; 12938 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12939 let pattern5_0 = arg3; 12940 let pattern6_0 = arg4; 12941 let pattern7_0 = arg5; 12942 let pattern8_0 = arg6; 12943 let pattern9_0 = arg7; 12944 // Rule at src/isa/s390x/lower.isle line 1742. 12945 let expr0_0: Type = I32; 12946 let expr1_0: u8 = 16; 12947 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 12948 let expr3_0: Type = I32; 12949 let expr4_0 = 12950 constructor_push_bswap_reg(ctx, pattern0_0, expr3_0, pattern7_0, pattern8_0)?; 12951 let expr5_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, expr4_0)?; 12952 let expr6_0 = C::invert_cond(ctx, pattern6_0); 12953 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr5_0, &expr6_0)?; 12954 let expr8_0 = RxSBGOp::Insert; 12955 let expr9_0: u8 = 32; 12956 let expr10_0: u8 = 48; 12957 let expr11_0: i8 = 0; 12958 let expr12_0 = constructor_push_rxsbg( 12959 ctx, pattern0_0, &expr8_0, pattern7_0, expr4_0, expr2_0, expr9_0, expr10_0, 12960 expr11_0, 12961 )?; 12962 let expr13_0: Type = I32; 12963 let expr14_0 = 12964 constructor_push_bswap_reg(ctx, pattern0_0, expr13_0, pattern7_0, expr12_0)?; 12965 return Some(expr14_0); 12966 } 12967 if let Some(()) = C::bigendian(ctx, pattern3_0) { 12968 let pattern5_0 = arg3; 12969 let pattern6_0 = arg4; 12970 let pattern7_0 = arg5; 12971 let pattern8_0 = arg6; 12972 let pattern9_0 = arg7; 12973 // Rule at src/isa/s390x/lower.isle line 1735. 12974 let expr0_0: Type = I32; 12975 let expr1_0: u8 = 16; 12976 let expr2_0 = constructor_lshl_imm(ctx, expr0_0, pattern9_0, expr1_0)?; 12977 let expr3_0 = constructor_cmp_rr(ctx, pattern5_0, expr2_0, pattern8_0)?; 12978 let expr4_0 = C::invert_cond(ctx, pattern6_0); 12979 let expr5_0 = constructor_push_break_if(ctx, pattern0_0, &expr3_0, &expr4_0)?; 12980 let expr6_0 = RxSBGOp::Insert; 12981 let expr7_0: u8 = 32; 12982 let expr8_0: u8 = 48; 12983 let expr9_0: i8 = 0; 12984 let expr10_0 = constructor_push_rxsbg( 12985 ctx, pattern0_0, &expr6_0, pattern7_0, pattern8_0, expr2_0, expr7_0, expr8_0, 12986 expr9_0, 12987 )?; 12988 return Some(expr10_0); 12989 } 12990 } 12991 if let Some(pattern2_0) = C::ty_32_or_64(ctx, pattern1_0) { 12992 let pattern3_0 = arg2; 12993 if let Some(()) = C::littleendian(ctx, pattern3_0) { 12994 let pattern5_0 = arg3; 12995 let pattern6_0 = arg4; 12996 let pattern7_0 = arg5; 12997 let pattern8_0 = arg6; 12998 let pattern9_0 = arg7; 12999 // Rule at src/isa/s390x/lower.isle line 1717. 13000 let expr0_0 = 13001 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern8_0)?; 13002 let expr1_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, expr0_0)?; 13003 let expr2_0 = C::invert_cond(ctx, pattern6_0); 13004 let expr3_0 = constructor_push_break_if(ctx, pattern0_0, &expr1_0, &expr2_0)?; 13005 let expr4_0 = 13006 constructor_push_bswap_reg(ctx, pattern0_0, pattern2_0, pattern7_0, pattern9_0)?; 13007 return Some(expr4_0); 13008 } 13009 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13010 let pattern5_0 = arg3; 13011 let pattern6_0 = arg4; 13012 let pattern7_0 = arg5; 13013 let pattern8_0 = arg6; 13014 let pattern9_0 = arg7; 13015 // Rule at src/isa/s390x/lower.isle line 1710. 13016 let expr0_0 = constructor_cmp_rr(ctx, pattern5_0, pattern9_0, pattern8_0)?; 13017 let expr1_0 = C::invert_cond(ctx, pattern6_0); 13018 let expr2_0 = constructor_push_break_if(ctx, pattern0_0, &expr0_0, &expr1_0)?; 13019 return Some(pattern9_0); 13020 } 13021 } 13022 return None; 13023 } 13024 13025 // Generated as internal constructor for term atomic_cas_body. 13026 pub fn constructor_atomic_cas_body<C: Context>( 13027 ctx: &mut C, 13028 arg0: &VecMInstBuilder, 13029 arg1: Type, 13030 arg2: MemFlags, 13031 arg3: WritableReg, 13032 arg4: Reg, 13033 arg5: Reg, 13034 arg6: Reg, 13035 ) -> Option<Reg> { 13036 let pattern0_0 = arg0; 13037 let pattern1_0 = arg1; 13038 if pattern1_0 == I8 { 13039 let pattern3_0 = arg2; 13040 let pattern4_0 = arg3; 13041 let pattern5_0 = arg4; 13042 let pattern6_0 = arg5; 13043 let pattern7_0 = arg6; 13044 // Rule at src/isa/s390x/lower.isle line 1794. 13045 let expr0_0 = RxSBGOp::Xor; 13046 let expr1_0: u8 = 32; 13047 let expr2_0: u8 = 40; 13048 let expr3_0: i8 = 24; 13049 let expr4_0 = constructor_rxsbg_test( 13050 ctx, &expr0_0, pattern5_0, pattern6_0, expr1_0, expr2_0, expr3_0, 13051 )?; 13052 let expr5_0 = IntCC::NotEqual; 13053 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13054 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13055 let expr8_0 = RxSBGOp::Insert; 13056 let expr9_0: u8 = 32; 13057 let expr10_0: u8 = 40; 13058 let expr11_0: i8 = 24; 13059 let expr12_0 = constructor_push_rxsbg( 13060 ctx, pattern0_0, &expr8_0, pattern4_0, pattern5_0, pattern7_0, expr9_0, expr10_0, 13061 expr11_0, 13062 )?; 13063 return Some(expr12_0); 13064 } 13065 if pattern1_0 == I16 { 13066 let pattern3_0 = arg2; 13067 if let Some(()) = C::littleendian(ctx, pattern3_0) { 13068 let pattern5_0 = arg3; 13069 let pattern6_0 = arg4; 13070 let pattern7_0 = arg5; 13071 let pattern8_0 = arg6; 13072 // Rule at src/isa/s390x/lower.isle line 1812. 13073 let expr0_0: Type = I32; 13074 let expr1_0 = constructor_bswap_reg(ctx, expr0_0, pattern7_0)?; 13075 let expr2_0: Type = I32; 13076 let expr3_0 = constructor_bswap_reg(ctx, expr2_0, pattern8_0)?; 13077 let expr4_0 = RxSBGOp::Xor; 13078 let expr5_0: u8 = 48; 13079 let expr6_0: u8 = 64; 13080 let expr7_0: i8 = -16; 13081 let expr8_0 = constructor_rxsbg_test( 13082 ctx, &expr4_0, pattern6_0, expr1_0, expr5_0, expr6_0, expr7_0, 13083 )?; 13084 let expr9_0 = IntCC::NotEqual; 13085 let expr10_0 = C::intcc_as_cond(ctx, &expr9_0); 13086 let expr11_0 = constructor_push_break_if(ctx, pattern0_0, &expr8_0, &expr10_0)?; 13087 let expr12_0 = RxSBGOp::Insert; 13088 let expr13_0: u8 = 48; 13089 let expr14_0: u8 = 64; 13090 let expr15_0: i8 = -16; 13091 let expr16_0 = constructor_push_rxsbg( 13092 ctx, pattern0_0, &expr12_0, pattern5_0, pattern6_0, expr3_0, expr13_0, expr14_0, 13093 expr15_0, 13094 )?; 13095 return Some(expr16_0); 13096 } 13097 if let Some(()) = C::bigendian(ctx, pattern3_0) { 13098 let pattern5_0 = arg3; 13099 let pattern6_0 = arg4; 13100 let pattern7_0 = arg5; 13101 let pattern8_0 = arg6; 13102 // Rule at src/isa/s390x/lower.isle line 1801. 13103 let expr0_0 = RxSBGOp::Xor; 13104 let expr1_0: u8 = 32; 13105 let expr2_0: u8 = 48; 13106 let expr3_0: i8 = 16; 13107 let expr4_0 = constructor_rxsbg_test( 13108 ctx, &expr0_0, pattern6_0, pattern7_0, expr1_0, expr2_0, expr3_0, 13109 )?; 13110 let expr5_0 = IntCC::NotEqual; 13111 let expr6_0 = C::intcc_as_cond(ctx, &expr5_0); 13112 let expr7_0 = constructor_push_break_if(ctx, pattern0_0, &expr4_0, &expr6_0)?; 13113 let expr8_0 = RxSBGOp::Insert; 13114 let expr9_0: u8 = 32; 13115 let expr10_0: u8 = 48; 13116 let expr11_0: i8 = 16; 13117 let expr12_0 = constructor_push_rxsbg( 13118 ctx, pattern0_0, &expr8_0, pattern5_0, pattern6_0, pattern8_0, expr9_0, expr10_0, 13119 expr11_0, 13120 )?; 13121 return Some(expr12_0); 13122 } 13123 } 13124 return None; 13125 } 13126 13127 // Generated as internal constructor for term atomic_store_impl. 13128 pub fn constructor_atomic_store_impl<C: Context>( 13129 ctx: &mut C, 13130 arg0: &SideEffectNoResult, 13131 ) -> Option<InstOutput> { 13132 let pattern0_0 = arg0; 13133 // Rule at src/isa/s390x/lower.isle line 1858. 13134 let expr0_0 = constructor_side_effect(ctx, pattern0_0)?; 13135 let expr1_0 = constructor_fence_impl(ctx)?; 13136 let expr2_0 = constructor_side_effect(ctx, &expr1_0)?; 13137 return Some(expr2_0); 13138 } 13139 13140 // Generated as internal constructor for term icmp_val. 13141 pub fn constructor_icmp_val<C: Context>( 13142 ctx: &mut C, 13143 arg0: bool, 13144 arg1: &IntCC, 13145 arg2: Value, 13146 arg3: Value, 13147 ) -> Option<ProducesBool> { 13148 let pattern0_0 = arg0; 13149 let pattern1_0 = arg1; 13150 if let Some(()) = C::signed(ctx, pattern1_0) { 13151 let pattern3_0 = arg2; 13152 let pattern4_0 = arg3; 13153 // Rule at src/isa/s390x/lower.isle line 1925. 13154 let expr0_0 = constructor_icmps_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13155 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13156 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13157 return Some(expr2_0); 13158 } 13159 if let Some(()) = C::unsigned(ctx, pattern1_0) { 13160 let pattern3_0 = arg2; 13161 let pattern4_0 = arg3; 13162 // Rule at src/isa/s390x/lower.isle line 1928. 13163 let expr0_0 = constructor_icmpu_val(ctx, pattern0_0, pattern3_0, pattern4_0)?; 13164 let expr1_0 = C::intcc_as_cond(ctx, pattern1_0); 13165 let expr2_0 = constructor_bool(ctx, &expr0_0, &expr1_0)?; 13166 return Some(expr2_0); 13167 } 13168 return None; 13169 } 13170 13171 // Generated as internal constructor for term icmps_val. 13172 pub fn constructor_icmps_val<C: Context>( 13173 ctx: &mut C, 13174 arg0: bool, 13175 arg1: Value, 13176 arg2: Value, 13177 ) -> Option<ProducesFlags> { 13178 let pattern0_0 = arg0; 13179 if pattern0_0 == true { 13180 let pattern2_0 = arg1; 13181 let pattern3_0 = C::value_type(ctx, pattern2_0); 13182 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13183 let pattern5_0 = arg2; 13184 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13185 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13186 if let &InstructionData::Load { 13187 opcode: ref pattern8_0, 13188 arg: pattern8_1, 13189 flags: pattern8_2, 13190 offset: pattern8_3, 13191 } = &pattern7_0 13192 { 13193 match pattern8_0 { 13194 &Opcode::Sload16 => { 13195 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13196 // Rule at src/isa/s390x/lower.isle line 1958. 13197 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13198 let expr1_0 = constructor_sink_sload16(ctx, pattern6_0)?; 13199 let expr2_0 = constructor_icmps_mem_sext16( 13200 ctx, pattern4_0, expr0_0, &expr1_0, 13201 )?; 13202 return Some(expr2_0); 13203 } 13204 } 13205 &Opcode::Sload32 => { 13206 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13207 // Rule at src/isa/s390x/lower.isle line 1960. 13208 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13209 let expr1_0 = constructor_sink_sload32(ctx, pattern6_0)?; 13210 let expr2_0 = constructor_icmps_mem_sext32( 13211 ctx, pattern4_0, expr0_0, &expr1_0, 13212 )?; 13213 return Some(expr2_0); 13214 } 13215 } 13216 _ => {} 13217 } 13218 } 13219 } 13220 let pattern6_0 = C::value_type(ctx, pattern5_0); 13221 if pattern6_0 == I16 { 13222 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13223 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13224 if let &InstructionData::Load { 13225 opcode: ref pattern10_0, 13226 arg: pattern10_1, 13227 flags: pattern10_2, 13228 offset: pattern10_3, 13229 } = &pattern9_0 13230 { 13231 if let &Opcode::Load = pattern10_0 { 13232 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13233 // Rule at src/isa/s390x/lower.isle line 1954. 13234 let expr0_0 = constructor_ty_ext32(ctx, pattern4_0)?; 13235 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern2_0)?; 13236 let expr2_0 = constructor_sink_load(ctx, pattern8_0)?; 13237 let expr3_0 = 13238 constructor_icmps_mem_sext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13239 return Some(expr3_0); 13240 } 13241 } 13242 } 13243 } 13244 } 13245 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13246 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13247 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13248 if let &InstructionData::Load { 13249 opcode: ref pattern10_0, 13250 arg: pattern10_1, 13251 flags: pattern10_2, 13252 offset: pattern10_3, 13253 } = &pattern9_0 13254 { 13255 if let &Opcode::Load = pattern10_0 { 13256 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13257 // Rule at src/isa/s390x/lower.isle line 1950. 13258 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13259 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13260 let expr2_0 = 13261 constructor_icmps_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13262 return Some(expr2_0); 13263 } 13264 } 13265 } 13266 } 13267 } 13268 } 13269 } 13270 let pattern1_0 = arg1; 13271 let pattern2_0 = C::value_type(ctx, pattern1_0); 13272 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13273 let pattern4_0 = arg2; 13274 if let Some(pattern5_0) = C::i16_from_value(ctx, pattern4_0) { 13275 // Rule at src/isa/s390x/lower.isle line 1944. 13276 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13277 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13278 let expr2_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, pattern5_0)?; 13279 return Some(expr2_0); 13280 } 13281 if let Some(pattern5_0) = C::i32_from_value(ctx, pattern4_0) { 13282 // Rule at src/isa/s390x/lower.isle line 1946. 13283 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13284 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13285 let expr2_0 = constructor_icmps_simm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13286 return Some(expr2_0); 13287 } 13288 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13289 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13290 if let &InstructionData::Unary { 13291 opcode: ref pattern7_0, 13292 arg: pattern7_1, 13293 } = &pattern6_0 13294 { 13295 if let &Opcode::Sextend = pattern7_0 { 13296 let pattern9_0 = C::value_type(ctx, pattern7_1); 13297 if pattern9_0 == I32 { 13298 // Rule at src/isa/s390x/lower.isle line 1940. 13299 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13300 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13301 let expr2_0 = 13302 constructor_icmps_reg_sext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13303 return Some(expr2_0); 13304 } 13305 } 13306 } 13307 } 13308 // Rule at src/isa/s390x/lower.isle line 1936. 13309 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13310 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern1_0)?; 13311 let expr2_0 = constructor_put_in_reg_sext32(ctx, pattern4_0)?; 13312 let expr3_0 = constructor_icmps_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13313 return Some(expr3_0); 13314 } 13315 return None; 13316 } 13317 13318 // Generated as internal constructor for term icmpu_val. 13319 pub fn constructor_icmpu_val<C: Context>( 13320 ctx: &mut C, 13321 arg0: bool, 13322 arg1: Value, 13323 arg2: Value, 13324 ) -> Option<ProducesFlags> { 13325 let pattern0_0 = arg0; 13326 if pattern0_0 == true { 13327 let pattern2_0 = arg1; 13328 let pattern3_0 = C::value_type(ctx, pattern2_0); 13329 if let Some(pattern4_0) = C::fits_in_64(ctx, pattern3_0) { 13330 let pattern5_0 = arg2; 13331 if let Some(pattern6_0) = C::sinkable_inst(ctx, pattern5_0) { 13332 let pattern7_0 = C::inst_data(ctx, pattern6_0); 13333 if let &InstructionData::Load { 13334 opcode: ref pattern8_0, 13335 arg: pattern8_1, 13336 flags: pattern8_2, 13337 offset: pattern8_3, 13338 } = &pattern7_0 13339 { 13340 match pattern8_0 { 13341 &Opcode::Uload16 => { 13342 if let Some(pattern10_0) = C::def_inst(ctx, pattern8_1) { 13343 let pattern11_0 = C::inst_data(ctx, pattern10_0); 13344 if let &InstructionData::UnaryGlobalValue { 13345 opcode: ref pattern12_0, 13346 global_value: pattern12_1, 13347 } = &pattern11_0 13348 { 13349 if let &Opcode::SymbolValue = pattern12_0 { 13350 if let Some((pattern14_0, pattern14_1, pattern14_2)) = 13351 C::symbol_value_data(ctx, pattern12_1) 13352 { 13353 if let Some(()) = 13354 C::reloc_distance_near(ctx, pattern14_1) 13355 { 13356 let pattern16_0 = 13357 C::i64_from_offset(ctx, pattern8_3); 13358 let closure17 = || { 13359 return Some(pattern14_2); 13360 }; 13361 if let Some(pattern17_0) = closure17() { 13362 if let Some(pattern18_0) = 13363 C::memarg_symbol_offset_sum( 13364 ctx, 13365 pattern16_0, 13366 pattern17_0, 13367 ) 13368 { 13369 let pattern19_0 = 13370 C::inst_data(ctx, pattern6_0); 13371 if let &InstructionData::Load { 13372 opcode: ref pattern20_0, 13373 arg: pattern20_1, 13374 flags: pattern20_2, 13375 offset: pattern20_3, 13376 } = &pattern19_0 13377 { 13378 if let &Opcode::Uload16 = pattern20_0 { 13379 if let Some(()) = 13380 C::bigendian(ctx, pattern20_2) 13381 { 13382 // Rule at src/isa/s390x/lower.isle line 1993. 13383 let expr0_0 = C::put_in_reg( 13384 ctx, pattern2_0, 13385 ); 13386 let expr1_0 = 13387 constructor_sink_uload16( 13388 ctx, pattern6_0, 13389 )?; 13390 let expr2_0 = constructor_icmpu_mem_zext16(ctx, pattern4_0, expr0_0, &expr1_0)?; 13391 return Some(expr2_0); 13392 } 13393 } 13394 } 13395 } 13396 } 13397 } 13398 } 13399 } 13400 } 13401 } 13402 } 13403 &Opcode::Uload32 => { 13404 if let Some(()) = C::bigendian(ctx, pattern8_2) { 13405 // Rule at src/isa/s390x/lower.isle line 1996. 13406 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13407 let expr1_0 = constructor_sink_uload32(ctx, pattern6_0)?; 13408 let expr2_0 = constructor_icmpu_mem_zext32( 13409 ctx, pattern4_0, expr0_0, &expr1_0, 13410 )?; 13411 return Some(expr2_0); 13412 } 13413 } 13414 _ => {} 13415 } 13416 } 13417 } 13418 let pattern6_0 = C::value_type(ctx, pattern5_0); 13419 if pattern6_0 == I16 { 13420 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13421 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13422 if let &InstructionData::Load { 13423 opcode: ref pattern10_0, 13424 arg: pattern10_1, 13425 flags: pattern10_2, 13426 offset: pattern10_3, 13427 } = &pattern9_0 13428 { 13429 if let &Opcode::Load = pattern10_0 { 13430 if let Some(pattern12_0) = C::def_inst(ctx, pattern10_1) { 13431 let pattern13_0 = C::inst_data(ctx, pattern12_0); 13432 if let &InstructionData::UnaryGlobalValue { 13433 opcode: ref pattern14_0, 13434 global_value: pattern14_1, 13435 } = &pattern13_0 13436 { 13437 if let &Opcode::SymbolValue = pattern14_0 { 13438 if let Some((pattern16_0, pattern16_1, pattern16_2)) = 13439 C::symbol_value_data(ctx, pattern14_1) 13440 { 13441 if let Some(()) = 13442 C::reloc_distance_near(ctx, pattern16_1) 13443 { 13444 let pattern18_0 = 13445 C::i64_from_offset(ctx, pattern10_3); 13446 let closure19 = || { 13447 return Some(pattern16_2); 13448 }; 13449 if let Some(pattern19_0) = closure19() { 13450 if let Some(pattern20_0) = 13451 C::memarg_symbol_offset_sum( 13452 ctx, 13453 pattern18_0, 13454 pattern19_0, 13455 ) 13456 { 13457 let pattern21_0 = 13458 C::inst_data(ctx, pattern8_0); 13459 if let &InstructionData::Load { 13460 opcode: ref pattern22_0, 13461 arg: pattern22_1, 13462 flags: pattern22_2, 13463 offset: pattern22_3, 13464 } = &pattern21_0 13465 { 13466 if let &Opcode::Load = pattern22_0 { 13467 if let Some(()) = 13468 C::bigendian(ctx, pattern22_2) 13469 { 13470 // Rule at src/isa/s390x/lower.isle line 1986. 13471 let expr0_0 = 13472 constructor_ty_ext32( 13473 ctx, pattern4_0, 13474 )?; 13475 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern2_0)?; 13476 let expr2_0 = 13477 constructor_sink_load( 13478 ctx, pattern8_0, 13479 )?; 13480 let expr3_0 = constructor_icmpu_mem_zext16(ctx, expr0_0, expr1_0, &expr2_0)?; 13481 return Some(expr3_0); 13482 } 13483 } 13484 } 13485 } 13486 } 13487 } 13488 } 13489 } 13490 } 13491 } 13492 } 13493 } 13494 } 13495 } 13496 if let Some(pattern7_0) = C::ty_32_or_64(ctx, pattern6_0) { 13497 if let Some(pattern8_0) = C::sinkable_inst(ctx, pattern5_0) { 13498 let pattern9_0 = C::inst_data(ctx, pattern8_0); 13499 if let &InstructionData::Load { 13500 opcode: ref pattern10_0, 13501 arg: pattern10_1, 13502 flags: pattern10_2, 13503 offset: pattern10_3, 13504 } = &pattern9_0 13505 { 13506 if let &Opcode::Load = pattern10_0 { 13507 if let Some(()) = C::bigendian(ctx, pattern10_2) { 13508 // Rule at src/isa/s390x/lower.isle line 1980. 13509 let expr0_0 = C::put_in_reg(ctx, pattern2_0); 13510 let expr1_0 = constructor_sink_load(ctx, pattern8_0)?; 13511 let expr2_0 = 13512 constructor_icmpu_mem(ctx, pattern4_0, expr0_0, &expr1_0)?; 13513 return Some(expr2_0); 13514 } 13515 } 13516 } 13517 } 13518 } 13519 } 13520 } 13521 let pattern1_0 = arg1; 13522 let pattern2_0 = C::value_type(ctx, pattern1_0); 13523 if let Some(pattern3_0) = C::fits_in_64(ctx, pattern2_0) { 13524 let pattern4_0 = arg2; 13525 if let Some(pattern5_0) = C::u32_from_value(ctx, pattern4_0) { 13526 // Rule at src/isa/s390x/lower.isle line 1976. 13527 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13528 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13529 let expr2_0 = constructor_icmpu_uimm32(ctx, expr0_0, expr1_0, pattern5_0)?; 13530 return Some(expr2_0); 13531 } 13532 if let Some(pattern5_0) = C::def_inst(ctx, pattern4_0) { 13533 let pattern6_0 = C::inst_data(ctx, pattern5_0); 13534 if let &InstructionData::Unary { 13535 opcode: ref pattern7_0, 13536 arg: pattern7_1, 13537 } = &pattern6_0 13538 { 13539 if let &Opcode::Uextend = pattern7_0 { 13540 let pattern9_0 = C::value_type(ctx, pattern7_1); 13541 if pattern9_0 == I32 { 13542 // Rule at src/isa/s390x/lower.isle line 1972. 13543 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13544 let expr1_0 = C::put_in_reg(ctx, pattern7_1); 13545 let expr2_0 = 13546 constructor_icmpu_reg_zext32(ctx, pattern3_0, expr0_0, expr1_0)?; 13547 return Some(expr2_0); 13548 } 13549 } 13550 } 13551 } 13552 // Rule at src/isa/s390x/lower.isle line 1968. 13553 let expr0_0 = constructor_ty_ext32(ctx, pattern3_0)?; 13554 let expr1_0 = constructor_put_in_reg_zext32(ctx, pattern1_0)?; 13555 let expr2_0 = constructor_put_in_reg_zext32(ctx, pattern4_0)?; 13556 let expr3_0 = constructor_icmpu_reg(ctx, expr0_0, expr1_0, expr2_0)?; 13557 return Some(expr3_0); 13558 } 13559 return None; 13560 } 13561 13562 // Generated as internal constructor for term fcmp_val. 13563 pub fn constructor_fcmp_val<C: Context>( 13564 ctx: &mut C, 13565 arg0: &FloatCC, 13566 arg1: Value, 13567 arg2: Value, 13568 ) -> Option<ProducesBool> { 13569 let pattern0_0 = arg0; 13570 let pattern1_0 = arg1; 13571 let pattern2_0 = C::value_type(ctx, pattern1_0); 13572 let pattern3_0 = arg2; 13573 // Rule at src/isa/s390x/lower.isle line 2009. 13574 let expr0_0 = C::put_in_reg(ctx, pattern1_0); 13575 let expr1_0 = C::put_in_reg(ctx, pattern3_0); 13576 let expr2_0 = constructor_fcmp_reg(ctx, pattern2_0, expr0_0, expr1_0)?; 13577 let expr3_0 = C::floatcc_as_cond(ctx, pattern0_0); 13578 let expr4_0 = constructor_bool(ctx, &expr2_0, &expr3_0)?; 13579 return Some(expr4_0); 13580 } 13581 13582 // Generated as internal constructor for term value_nonzero. 13583 pub fn constructor_value_nonzero<C: Context>(ctx: &mut C, arg0: Value) -> Option<ProducesBool> { 13584 let pattern0_0 = arg0; 13585 if let Some(pattern1_0) = C::def_inst(ctx, pattern0_0) { 13586 let pattern2_0 = C::inst_data(ctx, pattern1_0); 13587 match &pattern2_0 { 13588 &InstructionData::FloatCompare { 13589 opcode: ref pattern3_0, 13590 args: ref pattern3_1, 13591 cond: ref pattern3_2, 13592 } => { 13593 if let &Opcode::Fcmp = pattern3_0 { 13594 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13595 // Rule at src/isa/s390x/lower.isle line 2037. 13596 let expr0_0 = constructor_fcmp_val(ctx, pattern3_2, pattern5_0, pattern5_1)?; 13597 return Some(expr0_0); 13598 } 13599 } 13600 &InstructionData::IntCompare { 13601 opcode: ref pattern3_0, 13602 args: ref pattern3_1, 13603 cond: ref pattern3_2, 13604 } => { 13605 if let &Opcode::Icmp = pattern3_0 { 13606 let (pattern5_0, pattern5_1) = C::unpack_value_array_2(ctx, pattern3_1); 13607 // Rule at src/isa/s390x/lower.isle line 2036. 13608 let expr0_0: bool = false; 13609 let expr1_0 = 13610 constructor_icmp_val(ctx, expr0_0, pattern3_2, pattern5_0, pattern5_1)?; 13611 return Some(expr1_0); 13612 } 13613 } 13614 &InstructionData::Unary { 13615 opcode: ref pattern3_0, 13616 arg: pattern3_1, 13617 } => { 13618 if let &Opcode::Bint = pattern3_0 { 13619 // Rule at src/isa/s390x/lower.isle line 2035. 13620 let expr0_0 = constructor_value_nonzero(ctx, pattern3_1)?; 13621 return Some(expr0_0); 13622 } 13623 } 13624 _ => {} 13625 } 13626 } 13627 let pattern1_0 = C::value_type(ctx, pattern0_0); 13628 if let Some(pattern2_0) = C::gpr32_ty(ctx, pattern1_0) { 13629 // Rule at src/isa/s390x/lower.isle line 2038. 13630 let expr0_0: Type = I32; 13631 let expr1_0 = constructor_put_in_reg_sext32(ctx, pattern0_0)?; 13632 let expr2_0: i16 = 0; 13633 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13634 let expr4_0 = IntCC::NotEqual; 13635 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13636 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13637 return Some(expr6_0); 13638 } 13639 if let Some(pattern2_0) = C::gpr64_ty(ctx, pattern1_0) { 13640 // Rule at src/isa/s390x/lower.isle line 2041. 13641 let expr0_0: Type = I64; 13642 let expr1_0 = C::put_in_reg(ctx, pattern0_0); 13643 let expr2_0: i16 = 0; 13644 let expr3_0 = constructor_icmps_simm16(ctx, expr0_0, expr1_0, expr2_0)?; 13645 let expr4_0 = IntCC::NotEqual; 13646 let expr5_0 = C::intcc_as_cond(ctx, &expr4_0); 13647 let expr6_0 = constructor_bool(ctx, &expr3_0, &expr5_0)?; 13648 return Some(expr6_0); 13649 } 13650 return None; 13651 } 13652