1 //! Binary machine code emission. 2 //! 3 //! The `binemit` module contains code for translating Cranelift's intermediate representation into 4 //! binary machine code. 5 6 mod stack_map; 7 8 pub use self::stack_map::StackMap; 9 use core::fmt; 10 #[cfg(feature = "enable-serde")] 11 use serde::{Deserialize, Serialize}; 12 13 /// Offset in bytes from the beginning of the function. 14 /// 15 /// Cranelift can be used as a cross compiler, so we don't want to use a type like `usize` which 16 /// depends on the *host* platform, not the *target* platform. 17 pub type CodeOffset = u32; 18 19 /// Addend to add to the symbol value. 20 pub type Addend = i64; 21 22 /// Relocation kinds for every ISA 23 #[derive(Copy, Clone, Debug, PartialEq, Eq)] 24 #[cfg_attr(feature = "enable-serde", derive(Serialize, Deserialize))] 25 pub enum Reloc { 26 /// absolute 4-byte 27 Abs4, 28 /// absolute 8-byte 29 Abs8, 30 /// x86 PC-relative 4-byte 31 X86PCRel4, 32 /// x86 call to PC-relative 4-byte 33 X86CallPCRel4, 34 /// x86 call to PLT-relative 4-byte 35 X86CallPLTRel4, 36 /// x86 GOT PC-relative 4-byte 37 X86GOTPCRel4, 38 /// The 32-bit offset of the target from the beginning of its section. 39 /// Equivalent to `IMAGE_REL_AMD64_SECREL`. 40 /// See: [PE Format](https://docs.microsoft.com/en-us/windows/win32/debug/pe-format) 41 X86SecRel, 42 /// Arm32 call target 43 Arm32Call, 44 /// Arm64 call target. Encoded as bottom 26 bits of instruction. This 45 /// value is sign-extended, multiplied by 4, and added to the PC of 46 /// the call instruction to form the destination address. 47 Arm64Call, 48 /// s390x PC-relative 4-byte offset 49 S390xPCRel32Dbl, 50 /// s390x PC-relative 4-byte offset to PLT 51 S390xPLTRel32Dbl, 52 53 /// Elf x86_64 32 bit signed PC relative offset to two GOT entries for GD symbol. 54 ElfX86_64TlsGd, 55 56 /// Mach-O x86_64 32 bit signed PC relative offset to a `__thread_vars` entry. 57 MachOX86_64Tlv, 58 59 /// AArch64 TLS GD 60 /// Set an ADRP immediate field to the top 21 bits of the final address. Checks for overflow. 61 /// This is equivalent to `R_AARCH64_TLSGD_ADR_PAGE21` in the [aaelf64](https://github.com/ARM-software/abi-aa/blob/2bcab1e3b22d55170c563c3c7940134089176746/aaelf64/aaelf64.rst#relocations-for-thread-local-storage) 62 Aarch64TlsGdAdrPage21, 63 64 /// AArch64 TLS GD 65 /// Set the add immediate field to the low 12 bits of the final address. Does not check for overflow. 66 /// This is equivalent to `R_AARCH64_TLSGD_ADD_LO12_NC` in the [aaelf64](https://github.com/ARM-software/abi-aa/blob/2bcab1e3b22d55170c563c3c7940134089176746/aaelf64/aaelf64.rst#relocations-for-thread-local-storage) 67 Aarch64TlsGdAddLo12Nc, 68 69 /// s390x TLS GD64 - 64-bit offset of tls_index for GD symbol in GOT 70 S390xTlsGd64, 71 /// s390x TLS GDCall - marker to enable optimization of TLS calls 72 S390xTlsGdCall, 73 } 74 75 impl fmt::Display for Reloc { 76 /// Display trait implementation drops the arch, since its used in contexts where the arch is 77 /// already unambiguous, e.g. clif syntax with isa specified. In other contexts, use Debug. 78 fn fmt(&self, f: &mut fmt::Formatter) -> fmt::Result { 79 match *self { 80 Self::Abs4 => write!(f, "Abs4"), 81 Self::Abs8 => write!(f, "Abs8"), 82 Self::S390xPCRel32Dbl => write!(f, "PCRel32Dbl"), 83 Self::S390xPLTRel32Dbl => write!(f, "PLTRel32Dbl"), 84 Self::X86PCRel4 => write!(f, "PCRel4"), 85 Self::X86CallPCRel4 => write!(f, "CallPCRel4"), 86 Self::X86CallPLTRel4 => write!(f, "CallPLTRel4"), 87 Self::X86GOTPCRel4 => write!(f, "GOTPCRel4"), 88 Self::X86SecRel => write!(f, "SecRel"), 89 Self::Arm32Call | Self::Arm64Call => write!(f, "Call"), 90 91 Self::ElfX86_64TlsGd => write!(f, "ElfX86_64TlsGd"), 92 Self::MachOX86_64Tlv => write!(f, "MachOX86_64Tlv"), 93 Self::Aarch64TlsGdAdrPage21 => write!(f, "Aarch64TlsGdAdrPage21"), 94 Self::Aarch64TlsGdAddLo12Nc => write!(f, "Aarch64TlsGdAddLo12Nc"), 95 Self::S390xTlsGd64 => write!(f, "TlsGd64"), 96 Self::S390xTlsGdCall => write!(f, "TlsGdCall"), 97 } 98 } 99 } 100 101 /// Container for information about a vector of compiled code and its supporting read-only data. 102 /// 103 /// The code starts at offset 0 and is followed optionally by relocatable jump tables and copyable 104 /// (raw binary) read-only data. Any padding between sections is always part of the section that 105 /// precedes the boundary between the sections. 106 #[derive(Debug, PartialEq)] 107 pub struct CodeInfo { 108 /// Number of bytes in total. 109 pub total_size: CodeOffset, 110 } 111