1 use crate::cdsl::settings::{SettingGroup, SettingGroupBuilder}; 2 3 pub(crate) fn define() -> SettingGroup { 4 let mut settings = SettingGroupBuilder::new("shared"); 5 6 settings.add_bool( 7 "regalloc_checker", 8 "Enable the symbolic checker for register allocation.", 9 r#" 10 This performs a verification that the register allocator preserves 11 equivalent dataflow with respect to the original (pre-regalloc) 12 program. This analysis is somewhat expensive. However, if it succeeds, 13 it provides independent evidence (by a carefully-reviewed, from-first-principles 14 analysis) that no regalloc bugs were triggered for the particular compilations 15 performed. This is a valuable assurance to have as regalloc bugs can be 16 very dangerous and difficult to debug. 17 "#, 18 false, 19 ); 20 21 settings.add_enum( 22 "opt_level", 23 "Optimization level for generated code.", 24 r#" 25 Supported levels: 26 27 - `none`: Minimise compile time by disabling most optimizations. 28 - `speed`: Generate the fastest possible code 29 - `speed_and_size`: like "speed", but also perform transformations aimed at reducing code size. 30 "#, 31 vec!["none", "speed", "speed_and_size"], 32 ); 33 34 settings.add_bool( 35 "enable_verifier", 36 "Run the Cranelift IR verifier at strategic times during compilation.", 37 r#" 38 This makes compilation slower but catches many bugs. The verifier is always enabled by 39 default, which is useful during development. 40 "#, 41 true, 42 ); 43 44 // Note that Cranelift doesn't currently need an is_pie flag, because PIE is 45 // just PIC where symbols can't be pre-empted, which can be expressed with the 46 // `colocated` flag on external functions and global values. 47 settings.add_bool( 48 "is_pic", 49 "Enable Position-Independent Code generation.", 50 "", 51 false, 52 ); 53 54 settings.add_bool( 55 "use_colocated_libcalls", 56 "Use colocated libcalls.", 57 r#" 58 Generate code that assumes that libcalls can be declared "colocated", 59 meaning they will be defined along with the current function, such that 60 they can use more efficient addressing. 61 "#, 62 false, 63 ); 64 65 settings.add_bool( 66 "avoid_div_traps", 67 "Generate explicit checks around native division instructions to avoid their trapping.", 68 r#" 69 This is primarily used by SpiderMonkey which doesn't install a signal 70 handler for SIGFPE, but expects a SIGILL trap for division by zero. 71 72 On ISAs like ARM where the native division instructions don't trap, 73 this setting has no effect - explicit checks are always inserted. 74 "#, 75 false, 76 ); 77 78 settings.add_bool( 79 "enable_float", 80 "Enable the use of floating-point instructions.", 81 r#" 82 Disabling use of floating-point instructions is not yet implemented. 83 "#, 84 true, 85 ); 86 87 settings.add_bool( 88 "enable_nan_canonicalization", 89 "Enable NaN canonicalization.", 90 r#" 91 This replaces NaNs with a single canonical value, for users requiring 92 entirely deterministic WebAssembly computation. This is not required 93 by the WebAssembly spec, so it is not enabled by default. 94 "#, 95 false, 96 ); 97 98 settings.add_bool( 99 "enable_pinned_reg", 100 "Enable the use of the pinned register.", 101 r#" 102 This register is excluded from register allocation, and is completely under the control of 103 the end-user. It is possible to read it via the get_pinned_reg instruction, and to set it 104 with the set_pinned_reg instruction. 105 "#, 106 false, 107 ); 108 109 settings.add_bool( 110 "use_pinned_reg_as_heap_base", 111 "Use the pinned register as the heap base.", 112 r#" 113 Enabling this requires the enable_pinned_reg setting to be set to true. It enables a custom 114 legalization of the `heap_addr` instruction so it will use the pinned register as the heap 115 base, instead of fetching it from a global value. 116 117 Warning! Enabling this means that the pinned register *must* be maintained to contain the 118 heap base address at all times, during the lifetime of a function. Using the pinned 119 register for other purposes when this is set is very likely to cause crashes. 120 "#, 121 false, 122 ); 123 124 settings.add_bool( 125 "enable_simd", 126 "Enable the use of SIMD instructions.", 127 "", 128 false, 129 ); 130 131 settings.add_bool( 132 "enable_atomics", 133 "Enable the use of atomic instructions", 134 "", 135 true, 136 ); 137 138 settings.add_bool( 139 "enable_safepoints", 140 "Enable safepoint instruction insertions.", 141 r#" 142 This will allow the emit_stack_maps() function to insert the safepoint 143 instruction on top of calls and interrupt traps in order to display the 144 live reference values at that point in the program. 145 "#, 146 false, 147 ); 148 149 settings.add_enum( 150 "tls_model", 151 "Defines the model used to perform TLS accesses.", 152 "", 153 vec!["none", "elf_gd", "macho", "coff"], 154 ); 155 156 // Settings specific to the `baldrdash` calling convention. 157 158 settings.add_enum( 159 "libcall_call_conv", 160 "Defines the calling convention to use for LibCalls call expansion.", 161 r#" 162 This may be different from the ISA default calling convention. 163 164 The default value is to use the same calling convention as the ISA 165 default calling convention. 166 167 This list should be kept in sync with the list of calling 168 conventions available in isa/call_conv.rs. 169 "#, 170 vec![ 171 "isa_default", 172 "fast", 173 "cold", 174 "system_v", 175 "windows_fastcall", 176 "apple_aarch64", 177 "baldrdash_system_v", 178 "baldrdash_windows", 179 "baldrdash_2020", 180 "probestack", 181 ], 182 ); 183 184 settings.add_num( 185 "baldrdash_prologue_words", 186 "Number of pointer-sized words pushed by the baldrdash prologue.", 187 r#" 188 Functions with the `baldrdash` calling convention don't generate their 189 own prologue and epilogue. They depend on externally generated code 190 that pushes a fixed number of words in the prologue and restores them 191 in the epilogue. 192 193 This setting configures the number of pointer-sized words pushed on the 194 stack when the Cranelift-generated code is entered. This includes the 195 pushed return address on x86. 196 "#, 197 0, 198 ); 199 200 settings.add_bool( 201 "enable_llvm_abi_extensions", 202 "Enable various ABI extensions defined by LLVM's behavior.", 203 r#" 204 In some cases, LLVM's implementation of an ABI (calling convention) 205 goes beyond a standard and supports additional argument types or 206 behavior. This option instructs Cranelift codegen to follow LLVM's 207 behavior where applicable. 208 209 Currently, this applies only to Windows Fastcall on x86-64, and 210 allows an `i128` argument to be spread across two 64-bit integer 211 registers. The Fastcall implementation otherwise does not support 212 `i128` arguments, and will panic if they are present and this 213 option is not set. 214 "#, 215 false, 216 ); 217 218 settings.add_bool( 219 "unwind_info", 220 "Generate unwind information.", 221 r#" 222 This increases metadata size and compile time, but allows for the 223 debugger to trace frames, is needed for GC tracing that relies on 224 libunwind (such as in Wasmtime), and is unconditionally needed on 225 certain platforms (such as Windows) that must always be able to unwind. 226 "#, 227 true, 228 ); 229 230 settings.add_bool( 231 "machine_code_cfg_info", 232 "Generate CFG metadata for machine code.", 233 r#" 234 This increases metadata size and compile time, but allows for the 235 embedder to more easily post-process or analyze the generated 236 machine code. It provides code offsets for the start of each 237 basic block in the generated machine code, and a list of CFG 238 edges (with blocks identified by start offsets) between them. 239 This is useful for, e.g., machine-code analyses that verify certain 240 properties of the generated code. 241 "#, 242 false, 243 ); 244 245 // BaldrMonkey requires that not-yet-relocated function addresses be encoded 246 // as all-ones bitpatterns. 247 settings.add_bool( 248 "emit_all_ones_funcaddrs", 249 "Emit not-yet-relocated function addresses as all-ones bit patterns.", 250 "", 251 false, 252 ); 253 254 // Stack probing options. 255 256 settings.add_bool( 257 "enable_probestack", 258 "Enable the use of stack probes for supported calling conventions.", 259 "", 260 true, 261 ); 262 263 settings.add_bool( 264 "probestack_func_adjusts_sp", 265 "Enable if the stack probe adjusts the stack pointer.", 266 "", 267 false, 268 ); 269 270 settings.add_num( 271 "probestack_size_log2", 272 "The log2 of the size of the stack guard region.", 273 r#" 274 Stack frames larger than this size will have stack overflow checked 275 by calling the probestack function. 276 277 The default is 12, which translates to a size of 4096. 278 "#, 279 12, 280 ); 281 282 // Jump table options. 283 284 settings.add_bool( 285 "enable_jump_tables", 286 "Enable the use of jump tables in generated machine code.", 287 "", 288 true, 289 ); 290 291 // Spectre options. 292 293 settings.add_bool( 294 "enable_heap_access_spectre_mitigation", 295 "Enable Spectre mitigation on heap bounds checks.", 296 r#" 297 This is a no-op for any heap that needs no bounds checks; e.g., 298 if the limit is static and the guard region is large enough that 299 the index cannot reach past it. 300 301 This option is enabled by default because it is highly 302 recommended for secure sandboxing. The embedder should consider 303 the security implications carefully before disabling this option. 304 "#, 305 true, 306 ); 307 308 settings.add_bool( 309 "enable_table_access_spectre_mitigation", 310 "Enable Spectre mitigation on table bounds checks.", 311 r#" 312 This option uses a conditional move to ensure that when a table 313 access index is bounds-checked and a conditional branch is used 314 for the out-of-bounds case, a misspeculation of that conditional 315 branch (falsely predicted in-bounds) will select an in-bounds 316 index to load on the speculative path. 317 318 This option is enabled by default because it is highly 319 recommended for secure sandboxing. The embedder should consider 320 the security implications carefully before disabling this option. 321 "#, 322 true, 323 ); 324 325 settings.build() 326 } 327