1 use crate::dsl::{Eflags::*, Feature::*, Inst, Location::*}; 2 use crate::dsl::{fmt, inst, rex, w}; 3 4 #[rustfmt::skip] // Keeps instructions on a single line. 5 pub fn list() -> Vec<Inst> { 6 vec![ 7 // Note that the Intel manual lists many mnemonics for this family of 8 // instructions which are duplicates of other mnemonics. The order here 9 // matches the order in the manual and comments are left when variants 10 // are omitted due to the instructions being duplicates of another. 11 // 12 // Also note that the `digit(0)` annotation here is not mentioned in the 13 // manual's description for the encoding of these instructions. This is 14 // due to: 15 // 16 // > The reg field of the ModR/M byte is not used for the SETCC 17 // > instruction and those opcode bits are ignored by the processor. 18 // 19 // Here 0 is used in the reg field to match what other assemblers look 20 // like they're doing of setting the reg bits to zero. 21 inst("seta", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x97]).digit(0), _64b | compat), 22 inst("setae", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x93]).digit(0), _64b | compat), 23 inst("setb", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x92]).digit(0), _64b | compat), 24 inst("setbe", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x96]).digit(0), _64b | compat), 25 // NB: setc* is omitted here as it has the same encoding as setb* 26 inst("sete", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x94]).digit(0), _64b | compat), 27 inst("setg", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9f]).digit(0), _64b | compat), 28 inst("setge", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9d]).digit(0), _64b | compat), 29 inst("setl", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9c]).digit(0), _64b | compat), 30 inst("setle", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9e]).digit(0), _64b | compat), 31 // NB: setna* is omitted here as it has the same encoding as setbe* 32 // NB: setnae* is omitted here as it has the same encoding as setb* 33 // NB: setnb* is omitted here as it has the same encoding as setae* 34 // NB: setnbe* is omitted here as it has the same encoding as seta* 35 // NB: setnc* is omitted here as it has the same encoding as setae* 36 inst("setne", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x95]).digit(0), _64b | compat), 37 // NB: setng* is omitted here as it has the same encoding as setle* 38 // NB: setnge* is omitted here as it has the same encoding as setl* 39 // NB: setnl* is omitted here as it has the same encoding as setge* 40 // NB: setnle* is omitted here as it has the same encoding as setg* 41 inst("setno", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x91]).digit(0), _64b | compat), 42 inst("setnp", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9b]).digit(0), _64b | compat), 43 inst("setns", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x99]).digit(0), _64b | compat), 44 // NB: setnz* is omitted here as it has the same encoding as setne* 45 inst("seto", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x90]).digit(0), _64b | compat), 46 inst("setp", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x9a]).digit(0), _64b | compat), 47 // NB: setpe* is omitted here as it has the same encoding as setp* 48 // NB: setpo* is omitted here as it has the same encoding as setnp* 49 inst("sets", fmt("M", [w(rm8)]).flags(R), rex([0x0f, 0x98]).digit(0), _64b | compat), 50 // NB: setz* is omitted here as it has the same encoding as sete* 51 ] 52 } 53