1" Vim syntax file 2" Language: Verilog 3" Maintainer: Mun Johl <[email protected]> 4" Last Update: Wed Jul 20 16:04:19 PDT 2011 5 6" For version 5.x: Clear all syntax items 7" For version 6.x: Quit when a syntax file was already loaded 8if version < 600 9 syntax clear 10elseif exists("b:current_syntax") 11 finish 12endif 13 14" Set the local value of the 'iskeyword' option. 15" NOTE: '?' was added so that verilogNumber would be processed correctly when 16" '?' is the last character of the number. 17if version >= 600 18 setlocal iskeyword=@,48-57,63,_,192-255 19else 20 set iskeyword=@,48-57,63,_,192-255 21endif 22 23" A bunch of useful Verilog keywords 24 25syn keyword verilogStatement always and assign automatic buf 26syn keyword verilogStatement bufif0 bufif1 cell cmos 27syn keyword verilogStatement config deassign defparam design 28syn keyword verilogStatement disable edge endconfig 29syn keyword verilogStatement endfunction endgenerate endmodule 30syn keyword verilogStatement endprimitive endspecify endtable endtask 31syn keyword verilogStatement event force function 32syn keyword verilogStatement generate genvar highz0 highz1 ifnone 33syn keyword verilogStatement incdir include initial inout input 34syn keyword verilogStatement instance integer large liblist 35syn keyword verilogStatement library localparam macromodule medium 36syn keyword verilogStatement module nand negedge nmos nor 37syn keyword verilogStatement noshowcancelled not notif0 notif1 or 38syn keyword verilogStatement output parameter pmos posedge primitive 39syn keyword verilogStatement pull0 pull1 pulldown pullup 40syn keyword verilogStatement pulsestyle_onevent pulsestyle_ondetect 41syn keyword verilogStatement rcmos real realtime reg release 42syn keyword verilogStatement rnmos rpmos rtran rtranif0 rtranif1 43syn keyword verilogStatement scalared showcancelled signed small 44syn keyword verilogStatement specify specparam strong0 strong1 45syn keyword verilogStatement supply0 supply1 table task time tran 46syn keyword verilogStatement tranif0 tranif1 tri tri0 tri1 triand 47syn keyword verilogStatement trior trireg unsigned use vectored wait 48syn keyword verilogStatement wand weak0 weak1 wire wor xnor xor 49syn keyword verilogLabel begin end fork join 50syn keyword verilogConditional if else case casex casez default endcase 51syn keyword verilogRepeat forever repeat while for 52 53syn keyword verilogTodo contained TODO FIXME 54 55syn match verilogOperator "[&|~><!)(*#%@+/=?:;}{,.\^\-\[\]]" 56 57syn region verilogComment start="/\*" end="\*/" contains=verilogTodo,@Spell 58syn match verilogComment "//.*" contains=verilogTodo,@Spell 59 60"syn match verilogGlobal "`[a-zA-Z0-9_]\+\>" 61syn match verilogGlobal "`celldefine" 62syn match verilogGlobal "`default_nettype" 63syn match verilogGlobal "`define" 64syn match verilogGlobal "`else" 65syn match verilogGlobal "`elsif" 66syn match verilogGlobal "`endcelldefine" 67syn match verilogGlobal "`endif" 68syn match verilogGlobal "`ifdef" 69syn match verilogGlobal "`ifndef" 70syn match verilogGlobal "`include" 71syn match verilogGlobal "`line" 72syn match verilogGlobal "`nounconnected_drive" 73syn match verilogGlobal "`resetall" 74syn match verilogGlobal "`timescale" 75syn match verilogGlobal "`unconnected_drive" 76syn match verilogGlobal "`undef" 77syn match verilogGlobal "$[a-zA-Z0-9_]\+\>" 78 79syn match verilogConstant "\<[A-Z][A-Z0-9_]\+\>" 80 81syn match verilogNumber "\(\<\d\+\|\)'[sS]\?[bB]\s*[0-1_xXzZ?]\+\>" 82syn match verilogNumber "\(\<\d\+\|\)'[sS]\?[oO]\s*[0-7_xXzZ?]\+\>" 83syn match verilogNumber "\(\<\d\+\|\)'[sS]\?[dD]\s*[0-9_xXzZ?]\+\>" 84syn match verilogNumber "\(\<\d\+\|\)'[sS]\?[hH]\s*[0-9a-fA-F_xXzZ?]\+\>" 85syn match verilogNumber "\<[+-]\=[0-9_]\+\(\.[0-9_]*\|\)\(e[0-9_]*\|\)\>" 86 87syn region verilogString start=+"+ skip=+\\"+ end=+"+ contains=verilogEscape,@Spell 88syn match verilogEscape +\\[nt"\\]+ contained 89syn match verilogEscape "\\\o\o\=\o\=" contained 90 91" Directives 92syn match verilogDirective "//\s*synopsys\>.*$" 93syn region verilogDirective start="/\*\s*synopsys\>" end="\*/" 94syn region verilogDirective start="//\s*synopsys dc_script_begin\>" end="//\s*synopsys dc_script_end\>" 95 96syn match verilogDirective "//\s*\$s\>.*$" 97syn region verilogDirective start="/\*\s*\$s\>" end="\*/" 98syn region verilogDirective start="//\s*\$s dc_script_begin\>" end="//\s*\$s dc_script_end\>" 99 100"Modify the following as needed. The trade-off is performance versus 101"functionality. 102syn sync minlines=50 103 104" Define the default highlighting. 105" For version 5.7 and earlier: only when not done already 106" For version 5.8 and later: only when an item doesn't have highlighting yet 107if version >= 508 || !exists("did_verilog_syn_inits") 108 if version < 508 109 let did_verilog_syn_inits = 1 110 command -nargs=+ HiLink hi link <args> 111 else 112 command -nargs=+ HiLink hi def link <args> 113 endif 114 115 " The default highlighting. 116 HiLink verilogCharacter Character 117 HiLink verilogConditional Conditional 118 HiLink verilogRepeat Repeat 119 HiLink verilogString String 120 HiLink verilogTodo Todo 121 HiLink verilogComment Comment 122 HiLink verilogConstant Constant 123 HiLink verilogLabel Label 124 HiLink verilogNumber Number 125 HiLink verilogOperator Special 126 HiLink verilogStatement Statement 127 HiLink verilogGlobal Define 128 HiLink verilogDirective SpecialComment 129 HiLink verilogEscape Special 130 131 delcommand HiLink 132endif 133 134let b:current_syntax = "verilog" 135 136" vim: ts=8 137