1; RUN: opt %loadPolly -polly-codegen -S < %s | FileCheck %s -check-prefix=SEQUENTIAL
2; RUN: opt %loadPolly -polly-codegen -polly-ast-detect-parallel -S < %s | FileCheck %s -check-prefix=PARALLEL
3target datalayout = "e-p:64:64:64-i1:8:8-i8:8:8-i16:16:16-i32:32:32-i64:64:64-f32:32:32-f64:64:64-v64:64:64-v128:128:128-a0:0:64-s0:64:64-f80:128:128-n8:16:32:64"
4
5; This is a trivially parallel loop. We just use it to ensure that we actually
6; emit the right information.
7;
8; for (i = 0; i < n; i++)
9;   A[i] = 1;
10;
11@A = common global [1024 x i32] zeroinitializer
12define void @test-one(i64 %n) {
13start:
14  fence seq_cst
15  br label %loop.header
16
17loop.header:
18  %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ]
19  %exitcond = icmp ne i64 %i, %n
20  br i1 %exitcond, label %loop.body, label %ret
21
22loop.body:
23  %scevgep = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %i
24  store i32 1, i32* %scevgep
25  br label %loop.backedge
26
27loop.backedge:
28  %i.next = add nsw i64 %i, 1
29  br label %loop.header
30
31ret:
32  fence seq_cst
33  ret void
34}
35
36; SEQUENTIAL-LABEL: @test-one
37; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access
38; SEQUENTIAL-NOT: !llvm.access.group
39; SEQUENTIAL-NOT: !llvm.loop
40
41; PARALLEL: @test-one
42; PARALLEL: store i32 1, i32* %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID3:[0-9]+]]
43; PARALLEL:  br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID4:[0-9]+]]
44
45
46; This loop has memory dependences that require at least a simple dependence
47; analysis to detect the parallelism.
48;
49; for (i = 0; i < n; i++)
50;   A[2 * i] = A[2 * i + 1];
51;
52define void @test-two(i64 %n) {
53start:
54  fence seq_cst
55  br label %loop.header
56
57loop.header:
58  %i = phi i64 [ 0, %start ], [ %i.next, %loop.backedge ]
59  %exitcond = icmp ne i64 %i, %n
60  br i1 %exitcond, label %loop.body, label %ret
61
62loop.body:
63  %loadoffset1 = mul nsw i64 %i, 2
64  %loadoffset2 = add nsw i64 %loadoffset1, 1
65  %scevgepload = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %loadoffset2
66  %val = load i32, i32* %scevgepload
67  %storeoffset = mul i64 %i, 2
68  %scevgepstore = getelementptr [1024 x i32], [1024 x i32]* @A, i64 0, i64 %storeoffset
69  store i32 %val, i32* %scevgepstore
70  br label %loop.backedge
71
72loop.backedge:
73  %i.next = add nsw i64 %i, 1
74  br label %loop.header
75
76ret:
77  fence seq_cst
78  ret void
79}
80
81; SEQUENTIAL-LABEL: @test-two
82; SEQUENTIAL-NOT: !llvm.mem.parallel_loop_access
83; SEQUENTIAL-NOT: !llvm.access.group
84; SEQUENTIAL-NOT: !llvm.loop
85
86; PARALLEL: @test-two
87; PARALLEL: %val_p_scalar_ = load i32, i32* %scevgep, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8:[0-9]*]]
88; PARALLEL: store i32 %val_p_scalar_, i32* %scevgep1, {{[ ._!,a-zA-Z0-9]*}}, !llvm.access.group ![[GROUPID8]]
89; PARALLEL:  br i1 %polly.loop_cond, label %polly.loop_header, label %polly.loop_exit, !llvm.loop ![[LoopID9:[0-9]*]]
90
91
92; PARALLEL: ![[LoopID4]] = distinct !{![[LoopID4]], ![[PARACC5:[0-9]+]]}
93; PARALLEL: ![[PARACC5]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID3]]}
94; PARALLEL: ![[LoopID9]] = distinct !{![[LoopID9]], ![[PARACC10:[0-9]+]]}
95; PARALLEL: ![[PARACC10]] = !{!"llvm.loop.parallel_accesses", ![[GROUPID8]]}
96