1 //===--------- SCEVAffinator.cpp - Create Scops from LLVM IR -------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // Create a polyhedral description for a SCEV value. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "polly/Support/SCEVAffinator.h" 14 #include "polly/Options.h" 15 #include "polly/ScopInfo.h" 16 #include "polly/Support/GICHelper.h" 17 #include "polly/Support/SCEVValidator.h" 18 #include "isl/aff.h" 19 #include "isl/local_space.h" 20 #include "isl/set.h" 21 #include "isl/val.h" 22 23 using namespace llvm; 24 using namespace polly; 25 26 static cl::opt<bool> IgnoreIntegerWrapping( 27 "polly-ignore-integer-wrapping", 28 cl::desc("Do not build run-time checks to proof absence of integer " 29 "wrapping"), 30 cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::cat(PollyCategory)); 31 32 // The maximal number of basic sets we allow during the construction of a 33 // piecewise affine function. More complex ones will result in very high 34 // compile time. 35 static int const MaxDisjunctionsInPwAff = 100; 36 37 // The maximal number of bits for which a general expression is modeled 38 // precisely. 39 static unsigned const MaxSmallBitWidth = 7; 40 41 /// Add the number of basic sets in @p Domain to @p User 42 static isl_stat addNumBasicSets(__isl_take isl_set *Domain, 43 __isl_take isl_aff *Aff, void *User) { 44 auto *NumBasicSets = static_cast<unsigned *>(User); 45 *NumBasicSets += isl_set_n_basic_set(Domain); 46 isl_set_free(Domain); 47 isl_aff_free(Aff); 48 return isl_stat_ok; 49 } 50 51 /// Determine if @p PWAC is too complex to continue. 52 static bool isTooComplex(PWACtx PWAC) { 53 unsigned NumBasicSets = 0; 54 isl_pw_aff_foreach_piece(PWAC.first.get(), addNumBasicSets, &NumBasicSets); 55 if (NumBasicSets <= MaxDisjunctionsInPwAff) 56 return false; 57 return true; 58 } 59 60 /// Return the flag describing the possible wrapping of @p Expr. 61 static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) { 62 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr)) 63 return NAry->getNoWrapFlags(); 64 return SCEV::NoWrapMask; 65 } 66 67 static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1, 68 __isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *, 69 __isl_take isl_pw_aff *)) { 70 PWAC0.first = isl::manage(Fn(PWAC0.first.release(), PWAC1.first.release())); 71 PWAC0.second = PWAC0.second.unite(PWAC1.second); 72 return PWAC0; 73 } 74 75 static __isl_give isl_pw_aff *getWidthExpValOnDomain(unsigned Width, 76 __isl_take isl_set *Dom) { 77 auto *Ctx = isl_set_get_ctx(Dom); 78 auto *WidthVal = isl_val_int_from_ui(Ctx, Width); 79 auto *ExpVal = isl_val_2exp(WidthVal); 80 return isl_pw_aff_val_on_domain(Dom, ExpVal); 81 } 82 83 SCEVAffinator::SCEVAffinator(Scop *S, LoopInfo &LI) 84 : S(S), Ctx(S->getIslCtx().get()), SE(*S->getSE()), LI(LI), 85 TD(S->getFunction().getParent()->getDataLayout()) {} 86 87 Loop *SCEVAffinator::getScope() { return BB ? LI.getLoopFor(BB) : nullptr; } 88 89 void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) { 90 auto *NonNegDom = isl_pw_aff_nonneg_set(PWAC.first.copy()); 91 auto *NonNegPWA = 92 isl_pw_aff_intersect_domain(PWAC.first.copy(), isl_set_copy(NonNegDom)); 93 auto *ExpPWA = getWidthExpValOnDomain(Width, isl_set_complement(NonNegDom)); 94 PWAC.first = isl::manage(isl_pw_aff_union_add( 95 NonNegPWA, isl_pw_aff_add(PWAC.first.release(), ExpPWA))); 96 } 97 98 void SCEVAffinator::takeNonNegativeAssumption(PWACtx &PWAC) { 99 auto *NegPWA = isl_pw_aff_neg(PWAC.first.copy()); 100 auto *NegDom = isl_pw_aff_pos_set(NegPWA); 101 PWAC.second = 102 isl::manage(isl_set_union(PWAC.second.release(), isl_set_copy(NegDom))); 103 auto *Restriction = BB ? NegDom : isl_set_params(NegDom); 104 auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 105 S->recordAssumption(UNSIGNED, isl::manage(Restriction), DL, AS_RESTRICTION, 106 BB); 107 } 108 109 PWACtx SCEVAffinator::getPWACtxFromPWA(isl::pw_aff PWA) { 110 return std::make_pair(PWA, isl::set::empty(isl::space(Ctx, 0, NumIterators))); 111 } 112 113 PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) { 114 this->BB = BB; 115 116 if (BB) { 117 auto *DC = S->getDomainConditions(BB).release(); 118 NumIterators = isl_set_n_dim(DC); 119 isl_set_free(DC); 120 } else 121 NumIterators = 0; 122 123 return visit(Expr); 124 } 125 126 PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr, PWACtx PWAC) const { 127 // If the SCEV flags do contain NSW (no signed wrap) then PWA already 128 // represents Expr in modulo semantic (it is not allowed to overflow), thus we 129 // are done. Otherwise, we will compute: 130 // PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1) 131 // whereas n is the number of bits of the Expr, hence: 132 // n = bitwidth(ExprType) 133 134 if (IgnoreIntegerWrapping || (getNoWrapFlags(Expr) & SCEV::FlagNSW)) 135 return PWAC; 136 137 isl::pw_aff PWAMod = addModuloSemantic(PWAC.first, Expr->getType()); 138 139 isl::set NotEqualSet = PWAC.first.ne_set(PWAMod); 140 PWAC.second = PWAC.second.unite(NotEqualSet).coalesce(); 141 142 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 143 if (!BB) 144 NotEqualSet = NotEqualSet.params(); 145 NotEqualSet = NotEqualSet.coalesce(); 146 147 if (!NotEqualSet.is_empty()) 148 S->recordAssumption(WRAPPING, NotEqualSet, Loc, AS_RESTRICTION, BB); 149 150 return PWAC; 151 } 152 153 isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA, 154 Type *ExprType) const { 155 unsigned Width = TD.getTypeSizeInBits(ExprType); 156 157 auto ModVal = isl::val::int_from_ui(Ctx, Width); 158 ModVal = ModVal.pow2(); 159 160 isl::set Domain = PWA.domain(); 161 isl::pw_aff AddPW = 162 isl::manage(getWidthExpValOnDomain(Width - 1, Domain.release())); 163 164 return PWA.add(AddPW).mod(ModVal).sub(AddPW); 165 } 166 167 bool SCEVAffinator::hasNSWAddRecForLoop(Loop *L) const { 168 for (const auto &CachedPair : CachedExpressions) { 169 auto *AddRec = dyn_cast<SCEVAddRecExpr>(CachedPair.first.first); 170 if (!AddRec) 171 continue; 172 if (AddRec->getLoop() != L) 173 continue; 174 if (AddRec->getNoWrapFlags() & SCEV::FlagNSW) 175 return true; 176 } 177 178 return false; 179 } 180 181 bool SCEVAffinator::computeModuloForExpr(const SCEV *Expr) { 182 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 183 // We assume nsw expressions never overflow. 184 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr)) 185 if (NAry->getNoWrapFlags() & SCEV::FlagNSW) 186 return false; 187 return Width <= MaxSmallBitWidth; 188 } 189 190 PWACtx SCEVAffinator::visit(const SCEV *Expr) { 191 192 auto Key = std::make_pair(Expr, BB); 193 PWACtx PWAC = CachedExpressions[Key]; 194 if (PWAC.first) 195 return PWAC; 196 197 auto ConstantAndLeftOverPair = extractConstantFactor(Expr, SE); 198 auto *Factor = ConstantAndLeftOverPair.first; 199 Expr = ConstantAndLeftOverPair.second; 200 201 auto *Scope = getScope(); 202 S->addParams(getParamsInAffineExpr(&S->getRegion(), Scope, Expr, SE)); 203 204 // In case the scev is a valid parameter, we do not further analyze this 205 // expression, but create a new parameter in the isl_pw_aff. This allows us 206 // to treat subexpressions that we cannot translate into an piecewise affine 207 // expression, as constant parameters of the piecewise affine expression. 208 if (isl_id *Id = S->getIdForParam(Expr).release()) { 209 isl_space *Space = isl_space_set_alloc(Ctx.get(), 1, NumIterators); 210 Space = isl_space_set_dim_id(Space, isl_dim_param, 0, Id); 211 212 isl_set *Domain = isl_set_universe(isl_space_copy(Space)); 213 isl_aff *Affine = isl_aff_zero_on_domain(isl_local_space_from_space(Space)); 214 Affine = isl_aff_add_coefficient_si(Affine, isl_dim_param, 0, 1); 215 216 PWAC = getPWACtxFromPWA(isl::manage(isl_pw_aff_alloc(Domain, Affine))); 217 } else { 218 PWAC = SCEVVisitor<SCEVAffinator, PWACtx>::visit(Expr); 219 if (computeModuloForExpr(Expr)) 220 PWAC.first = addModuloSemantic(PWAC.first, Expr->getType()); 221 else 222 PWAC = checkForWrapping(Expr, PWAC); 223 } 224 225 if (!Factor->getType()->isIntegerTy(1)) { 226 PWAC = combine(PWAC, visitConstant(Factor), isl_pw_aff_mul); 227 if (computeModuloForExpr(Key.first)) 228 PWAC.first = addModuloSemantic(PWAC.first, Expr->getType()); 229 } 230 231 // For compile time reasons we need to simplify the PWAC before we cache and 232 // return it. 233 PWAC.first = PWAC.first.coalesce(); 234 if (!computeModuloForExpr(Key.first)) 235 PWAC = checkForWrapping(Key.first, PWAC); 236 237 CachedExpressions[Key] = PWAC; 238 return PWAC; 239 } 240 241 PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) { 242 ConstantInt *Value = Expr->getValue(); 243 isl_val *v; 244 245 // LLVM does not define if an integer value is interpreted as a signed or 246 // unsigned value. Hence, without further information, it is unknown how 247 // this value needs to be converted to GMP. At the moment, we only support 248 // signed operations. So we just interpret it as signed. Later, there are 249 // two options: 250 // 251 // 1. We always interpret any value as signed and convert the values on 252 // demand. 253 // 2. We pass down the signedness of the calculation and use it to interpret 254 // this constant correctly. 255 v = isl_valFromAPInt(Ctx.get(), Value->getValue(), /* isSigned */ true); 256 257 isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators); 258 isl_local_space *ls = isl_local_space_from_space(Space); 259 return getPWACtxFromPWA( 260 isl::manage(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls, v)))); 261 } 262 263 PWACtx SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) { 264 // Truncate operations are basically modulo operations, thus we can 265 // model them that way. However, for large types we assume the operand 266 // to fit in the new type size instead of introducing a modulo with a very 267 // large constant. 268 269 auto *Op = Expr->getOperand(); 270 auto OpPWAC = visit(Op); 271 272 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 273 274 if (computeModuloForExpr(Expr)) 275 return OpPWAC; 276 277 auto *Dom = OpPWAC.first.domain().release(); 278 auto *ExpPWA = getWidthExpValOnDomain(Width - 1, Dom); 279 auto *GreaterDom = 280 isl_pw_aff_ge_set(OpPWAC.first.copy(), isl_pw_aff_copy(ExpPWA)); 281 auto *SmallerDom = 282 isl_pw_aff_lt_set(OpPWAC.first.copy(), isl_pw_aff_neg(ExpPWA)); 283 auto *OutOfBoundsDom = isl_set_union(SmallerDom, GreaterDom); 284 OpPWAC.second = OpPWAC.second.unite(isl::manage_copy(OutOfBoundsDom)); 285 286 if (!BB) { 287 assert(isl_set_dim(OutOfBoundsDom, isl_dim_set) == 0 && 288 "Expected a zero dimensional set for non-basic-block domains"); 289 OutOfBoundsDom = isl_set_params(OutOfBoundsDom); 290 } 291 292 S->recordAssumption(UNSIGNED, isl::manage(OutOfBoundsDom), DebugLoc(), 293 AS_RESTRICTION, BB); 294 295 return OpPWAC; 296 } 297 298 PWACtx SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) { 299 // A zero-extended value can be interpreted as a piecewise defined signed 300 // value. If the value was non-negative it stays the same, otherwise it 301 // is the sum of the original value and 2^n where n is the bit-width of 302 // the original (or operand) type. Examples: 303 // zext i8 127 to i32 -> { [127] } 304 // zext i8 -1 to i32 -> { [256 + (-1)] } = { [255] } 305 // zext i8 %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 } 306 // 307 // However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a 308 // truncate) to represent some forms of modulo computation. The left-hand side 309 // of the condition in the code below would result in the SCEV 310 // "zext i1 <false, +, true>for.body" which is just another description 311 // of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0". 312 // 313 // for (i = 0; i < N; i++) 314 // if (i & 1 != 0 /* == i % 2 */) 315 // /* do something */ 316 // 317 // If we do not make the modulo explicit but only use the mechanism described 318 // above we will get the very restrictive assumption "N < 3", because for all 319 // values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap. 320 // Alternatively, we can make the modulo in the operand explicit in the 321 // resulting piecewise function and thereby avoid the assumption on N. For the 322 // example this would result in the following piecewise affine function: 323 // { [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0; 324 // [i0] -> [(0)] : 2*floor((i0)/2) = i0 } 325 // To this end we can first determine if the (immediate) operand of the 326 // zero-extend can wrap and, in case it might, we will use explicit modulo 327 // semantic to compute the result instead of emitting non-wrapping 328 // assumptions. 329 // 330 // Note that operands with large bit-widths are less likely to be negative 331 // because it would result in a very large access offset or loop bound after 332 // the zero-extend. To this end one can optimistically assume the operand to 333 // be positive and avoid the piecewise definition if the bit-width is bigger 334 // than some threshold (here MaxZextSmallBitWidth). 335 // 336 // We choose to go with a hybrid solution of all modeling techniques described 337 // above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the 338 // wrapping explicitly and use a piecewise defined function. However, if the 339 // bit-width is bigger than MaxZextSmallBitWidth we will employ overflow 340 // assumptions and assume the "former negative" piece will not exist. 341 342 auto *Op = Expr->getOperand(); 343 auto OpPWAC = visit(Op); 344 345 // If the width is to big we assume the negative part does not occur. 346 if (!computeModuloForExpr(Op)) { 347 takeNonNegativeAssumption(OpPWAC); 348 return OpPWAC; 349 } 350 351 // If the width is small build the piece for the non-negative part and 352 // the one for the negative part and unify them. 353 unsigned Width = TD.getTypeSizeInBits(Op->getType()); 354 interpretAsUnsigned(OpPWAC, Width); 355 return OpPWAC; 356 } 357 358 PWACtx SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) { 359 // As all values are represented as signed, a sign extension is a noop. 360 return visit(Expr->getOperand()); 361 } 362 363 PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) { 364 PWACtx Sum = visit(Expr->getOperand(0)); 365 366 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 367 Sum = combine(Sum, visit(Expr->getOperand(i)), isl_pw_aff_add); 368 if (isTooComplex(Sum)) 369 return complexityBailout(); 370 } 371 372 return Sum; 373 } 374 375 PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) { 376 PWACtx Prod = visit(Expr->getOperand(0)); 377 378 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 379 Prod = combine(Prod, visit(Expr->getOperand(i)), isl_pw_aff_mul); 380 if (isTooComplex(Prod)) 381 return complexityBailout(); 382 } 383 384 return Prod; 385 } 386 387 PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) { 388 assert(Expr->isAffine() && "Only affine AddRecurrences allowed"); 389 390 auto Flags = Expr->getNoWrapFlags(); 391 392 // Directly generate isl_pw_aff for Expr if 'start' is zero. 393 if (Expr->getStart()->isZero()) { 394 assert(S->contains(Expr->getLoop()) && 395 "Scop does not contain the loop referenced in this AddRec"); 396 397 PWACtx Step = visit(Expr->getOperand(1)); 398 isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators); 399 isl_local_space *LocalSpace = isl_local_space_from_space(Space); 400 401 unsigned loopDimension = S->getRelativeLoopDepth(Expr->getLoop()); 402 403 isl_aff *LAff = isl_aff_set_coefficient_si( 404 isl_aff_zero_on_domain(LocalSpace), isl_dim_in, loopDimension, 1); 405 isl_pw_aff *LPwAff = isl_pw_aff_from_aff(LAff); 406 407 Step.first = Step.first.mul(isl::manage(LPwAff)); 408 return Step; 409 } 410 411 // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}' 412 // if 'start' is not zero. 413 // TODO: Using the original SCEV no-wrap flags is not always safe, however 414 // as our code generation is reordering the expression anyway it doesn't 415 // really matter. 416 const SCEV *ZeroStartExpr = 417 SE.getAddRecExpr(SE.getConstant(Expr->getStart()->getType(), 0), 418 Expr->getStepRecurrence(SE), Expr->getLoop(), Flags); 419 420 PWACtx Result = visit(ZeroStartExpr); 421 PWACtx Start = visit(Expr->getStart()); 422 Result = combine(Result, Start, isl_pw_aff_add); 423 return Result; 424 } 425 426 PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) { 427 PWACtx Max = visit(Expr->getOperand(0)); 428 429 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 430 Max = combine(Max, visit(Expr->getOperand(i)), isl_pw_aff_max); 431 if (isTooComplex(Max)) 432 return complexityBailout(); 433 } 434 435 return Max; 436 } 437 438 PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) { 439 llvm_unreachable("SCEVUMaxExpr not yet supported"); 440 } 441 442 PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) { 443 // The handling of unsigned division is basically the same as for signed 444 // division, except the interpretation of the operands. As the divisor 445 // has to be constant in both cases we can simply interpret it as an 446 // unsigned value without additional complexity in the representation. 447 // For the dividend we could choose from the different representation 448 // schemes introduced for zero-extend operations but for now we will 449 // simply use an assumption. 450 auto *Dividend = Expr->getLHS(); 451 auto *Divisor = Expr->getRHS(); 452 assert(isa<SCEVConstant>(Divisor) && 453 "UDiv is no parameter but has a non-constant RHS."); 454 455 auto DividendPWAC = visit(Dividend); 456 auto DivisorPWAC = visit(Divisor); 457 458 if (SE.isKnownNegative(Divisor)) { 459 // Interpret negative divisors unsigned. This is a special case of the 460 // piece-wise defined value described for zero-extends as we already know 461 // the actual value of the constant divisor. 462 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 463 auto *DivisorDom = DivisorPWAC.first.domain().release(); 464 auto *WidthExpPWA = getWidthExpValOnDomain(Width, DivisorDom); 465 DivisorPWAC.first = DivisorPWAC.first.add(isl::manage(WidthExpPWA)); 466 } 467 468 // TODO: One can represent the dividend as piece-wise function to be more 469 // precise but therefor a heuristic is needed. 470 471 // Assume a non-negative dividend. 472 takeNonNegativeAssumption(DividendPWAC); 473 474 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_div); 475 DividendPWAC.first = DividendPWAC.first.floor(); 476 477 return DividendPWAC; 478 } 479 480 PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) { 481 assert(SDiv->getOpcode() == Instruction::SDiv && "Assumed SDiv instruction!"); 482 483 auto *Scope = getScope(); 484 auto *Divisor = SDiv->getOperand(1); 485 auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope); 486 auto DivisorPWAC = visit(DivisorSCEV); 487 assert(isa<SCEVConstant>(DivisorSCEV) && 488 "SDiv is no parameter but has a non-constant RHS."); 489 490 auto *Dividend = SDiv->getOperand(0); 491 auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope); 492 auto DividendPWAC = visit(DividendSCEV); 493 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_q); 494 return DividendPWAC; 495 } 496 497 PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) { 498 assert(SRem->getOpcode() == Instruction::SRem && "Assumed SRem instruction!"); 499 500 auto *Scope = getScope(); 501 auto *Divisor = SRem->getOperand(1); 502 auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope); 503 auto DivisorPWAC = visit(DivisorSCEV); 504 assert(isa<ConstantInt>(Divisor) && 505 "SRem is no parameter but has a non-constant RHS."); 506 507 auto *Dividend = SRem->getOperand(0); 508 auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope); 509 auto DividendPWAC = visit(DividendSCEV); 510 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_r); 511 return DividendPWAC; 512 } 513 514 PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) { 515 if (Instruction *I = dyn_cast<Instruction>(Expr->getValue())) { 516 switch (I->getOpcode()) { 517 case Instruction::IntToPtr: 518 return visit(SE.getSCEVAtScope(I->getOperand(0), getScope())); 519 case Instruction::PtrToInt: 520 return visit(SE.getSCEVAtScope(I->getOperand(0), getScope())); 521 case Instruction::SDiv: 522 return visitSDivInstruction(I); 523 case Instruction::SRem: 524 return visitSRemInstruction(I); 525 default: 526 break; // Fall through. 527 } 528 } 529 530 llvm_unreachable( 531 "Unknowns SCEV was neither parameter nor a valid instruction."); 532 } 533 534 PWACtx SCEVAffinator::complexityBailout() { 535 // We hit the complexity limit for affine expressions; invalidate the scop 536 // and return a constant zero. 537 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 538 S->invalidate(COMPLEXITY, Loc); 539 return visit(SE.getZero(Type::getInt32Ty(S->getFunction().getContext()))); 540 } 541