1 //===--------- SCEVAffinator.cpp - Create Scops from LLVM IR -------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // Create a polyhedral description for a SCEV value. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "polly/Support/SCEVAffinator.h" 15 #include "polly/Options.h" 16 #include "polly/ScopInfo.h" 17 #include "polly/Support/GICHelper.h" 18 #include "polly/Support/SCEVValidator.h" 19 #include "polly/Support/ScopHelper.h" 20 #include "isl/aff.h" 21 #include "isl/local_space.h" 22 #include "isl/set.h" 23 #include "isl/val.h" 24 25 using namespace llvm; 26 using namespace polly; 27 28 static cl::opt<bool> IgnoreIntegerWrapping( 29 "polly-ignore-integer-wrapping", 30 cl::desc("Do not build run-time checks to proof absence of integer " 31 "wrapping"), 32 cl::Hidden, cl::ZeroOrMore, cl::init(false), cl::cat(PollyCategory)); 33 34 // The maximal number of basic sets we allow during the construction of a 35 // piecewise affine function. More complex ones will result in very high 36 // compile time. 37 static int const MaxDisjunctionsInPwAff = 100; 38 39 // The maximal number of bits for which a general expression is modeled 40 // precisely. 41 static unsigned const MaxSmallBitWidth = 7; 42 43 /// Add the number of basic sets in @p Domain to @p User 44 static isl_stat addNumBasicSets(__isl_take isl_set *Domain, 45 __isl_take isl_aff *Aff, void *User) { 46 auto *NumBasicSets = static_cast<unsigned *>(User); 47 *NumBasicSets += isl_set_n_basic_set(Domain); 48 isl_set_free(Domain); 49 isl_aff_free(Aff); 50 return isl_stat_ok; 51 } 52 53 /// Determine if @p PWAC is too complex to continue. 54 static bool isTooComplex(PWACtx PWAC) { 55 unsigned NumBasicSets = 0; 56 isl_pw_aff_foreach_piece(PWAC.first.get(), addNumBasicSets, &NumBasicSets); 57 if (NumBasicSets <= MaxDisjunctionsInPwAff) 58 return false; 59 return true; 60 } 61 62 /// Return the flag describing the possible wrapping of @p Expr. 63 static SCEV::NoWrapFlags getNoWrapFlags(const SCEV *Expr) { 64 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr)) 65 return NAry->getNoWrapFlags(); 66 return SCEV::NoWrapMask; 67 } 68 69 static PWACtx combine(PWACtx PWAC0, PWACtx PWAC1, 70 __isl_give isl_pw_aff *(Fn)(__isl_take isl_pw_aff *, 71 __isl_take isl_pw_aff *)) { 72 PWAC0.first = isl::manage(Fn(PWAC0.first.release(), PWAC1.first.release())); 73 PWAC0.second = PWAC0.second.unite(PWAC1.second); 74 return PWAC0; 75 } 76 77 static __isl_give isl_pw_aff *getWidthExpValOnDomain(unsigned Width, 78 __isl_take isl_set *Dom) { 79 auto *Ctx = isl_set_get_ctx(Dom); 80 auto *WidthVal = isl_val_int_from_ui(Ctx, Width); 81 auto *ExpVal = isl_val_2exp(WidthVal); 82 return isl_pw_aff_val_on_domain(Dom, ExpVal); 83 } 84 85 SCEVAffinator::SCEVAffinator(Scop *S, LoopInfo &LI) 86 : S(S), Ctx(S->getIslCtx().get()), SE(*S->getSE()), LI(LI), 87 TD(S->getFunction().getParent()->getDataLayout()) {} 88 89 Loop *SCEVAffinator::getScope() { return BB ? LI.getLoopFor(BB) : nullptr; } 90 91 void SCEVAffinator::interpretAsUnsigned(PWACtx &PWAC, unsigned Width) { 92 auto *NonNegDom = isl_pw_aff_nonneg_set(PWAC.first.copy()); 93 auto *NonNegPWA = 94 isl_pw_aff_intersect_domain(PWAC.first.copy(), isl_set_copy(NonNegDom)); 95 auto *ExpPWA = getWidthExpValOnDomain(Width, isl_set_complement(NonNegDom)); 96 PWAC.first = isl::manage(isl_pw_aff_union_add( 97 NonNegPWA, isl_pw_aff_add(PWAC.first.release(), ExpPWA))); 98 } 99 100 void SCEVAffinator::takeNonNegativeAssumption(PWACtx &PWAC) { 101 auto *NegPWA = isl_pw_aff_neg(PWAC.first.copy()); 102 auto *NegDom = isl_pw_aff_pos_set(NegPWA); 103 PWAC.second = 104 isl::manage(isl_set_union(PWAC.second.release(), isl_set_copy(NegDom))); 105 auto *Restriction = BB ? NegDom : isl_set_params(NegDom); 106 auto DL = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 107 S->recordAssumption(UNSIGNED, isl::manage(Restriction), DL, AS_RESTRICTION, 108 BB); 109 } 110 111 PWACtx SCEVAffinator::getPWACtxFromPWA(isl::pw_aff PWA) { 112 return std::make_pair(PWA, isl::set::empty(isl::space(Ctx, 0, NumIterators))); 113 } 114 115 PWACtx SCEVAffinator::getPwAff(const SCEV *Expr, BasicBlock *BB) { 116 this->BB = BB; 117 118 if (BB) { 119 auto *DC = S->getDomainConditions(BB).release(); 120 NumIterators = isl_set_n_dim(DC); 121 isl_set_free(DC); 122 } else 123 NumIterators = 0; 124 125 return visit(Expr); 126 } 127 128 PWACtx SCEVAffinator::checkForWrapping(const SCEV *Expr, PWACtx PWAC) const { 129 // If the SCEV flags do contain NSW (no signed wrap) then PWA already 130 // represents Expr in modulo semantic (it is not allowed to overflow), thus we 131 // are done. Otherwise, we will compute: 132 // PWA = ((PWA + 2^(n-1)) mod (2 ^ n)) - 2^(n-1) 133 // whereas n is the number of bits of the Expr, hence: 134 // n = bitwidth(ExprType) 135 136 if (IgnoreIntegerWrapping || (getNoWrapFlags(Expr) & SCEV::FlagNSW)) 137 return PWAC; 138 139 isl::pw_aff PWAMod = addModuloSemantic(PWAC.first, Expr->getType()); 140 141 isl::set NotEqualSet = PWAC.first.ne_set(PWAMod); 142 PWAC.second = PWAC.second.unite(NotEqualSet).coalesce(); 143 144 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 145 if (!BB) 146 NotEqualSet = NotEqualSet.params(); 147 NotEqualSet = NotEqualSet.coalesce(); 148 149 if (!NotEqualSet.is_empty()) 150 S->recordAssumption(WRAPPING, NotEqualSet, Loc, AS_RESTRICTION, BB); 151 152 return PWAC; 153 } 154 155 isl::pw_aff SCEVAffinator::addModuloSemantic(isl::pw_aff PWA, 156 Type *ExprType) const { 157 unsigned Width = TD.getTypeSizeInBits(ExprType); 158 159 auto ModVal = isl::val::int_from_ui(Ctx, Width); 160 ModVal = ModVal.pow2(); 161 162 isl::set Domain = PWA.domain(); 163 isl::pw_aff AddPW = 164 isl::manage(getWidthExpValOnDomain(Width - 1, Domain.release())); 165 166 return PWA.add(AddPW).mod(ModVal).sub(AddPW); 167 } 168 169 bool SCEVAffinator::hasNSWAddRecForLoop(Loop *L) const { 170 for (const auto &CachedPair : CachedExpressions) { 171 auto *AddRec = dyn_cast<SCEVAddRecExpr>(CachedPair.first.first); 172 if (!AddRec) 173 continue; 174 if (AddRec->getLoop() != L) 175 continue; 176 if (AddRec->getNoWrapFlags() & SCEV::FlagNSW) 177 return true; 178 } 179 180 return false; 181 } 182 183 bool SCEVAffinator::computeModuloForExpr(const SCEV *Expr) { 184 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 185 // We assume nsw expressions never overflow. 186 if (auto *NAry = dyn_cast<SCEVNAryExpr>(Expr)) 187 if (NAry->getNoWrapFlags() & SCEV::FlagNSW) 188 return false; 189 return Width <= MaxSmallBitWidth; 190 } 191 192 PWACtx SCEVAffinator::visit(const SCEV *Expr) { 193 194 auto Key = std::make_pair(Expr, BB); 195 PWACtx PWAC = CachedExpressions[Key]; 196 if (PWAC.first) 197 return PWAC; 198 199 auto ConstantAndLeftOverPair = extractConstantFactor(Expr, SE); 200 auto *Factor = ConstantAndLeftOverPair.first; 201 Expr = ConstantAndLeftOverPair.second; 202 203 auto *Scope = getScope(); 204 S->addParams(getParamsInAffineExpr(&S->getRegion(), Scope, Expr, SE)); 205 206 // In case the scev is a valid parameter, we do not further analyze this 207 // expression, but create a new parameter in the isl_pw_aff. This allows us 208 // to treat subexpressions that we cannot translate into an piecewise affine 209 // expression, as constant parameters of the piecewise affine expression. 210 if (isl_id *Id = S->getIdForParam(Expr).release()) { 211 isl_space *Space = isl_space_set_alloc(Ctx.get(), 1, NumIterators); 212 Space = isl_space_set_dim_id(Space, isl_dim_param, 0, Id); 213 214 isl_set *Domain = isl_set_universe(isl_space_copy(Space)); 215 isl_aff *Affine = isl_aff_zero_on_domain(isl_local_space_from_space(Space)); 216 Affine = isl_aff_add_coefficient_si(Affine, isl_dim_param, 0, 1); 217 218 PWAC = getPWACtxFromPWA(isl::manage(isl_pw_aff_alloc(Domain, Affine))); 219 } else { 220 PWAC = SCEVVisitor<SCEVAffinator, PWACtx>::visit(Expr); 221 if (computeModuloForExpr(Expr)) 222 PWAC.first = addModuloSemantic(PWAC.first, Expr->getType()); 223 else 224 PWAC = checkForWrapping(Expr, PWAC); 225 } 226 227 if (!Factor->getType()->isIntegerTy(1)) { 228 PWAC = combine(PWAC, visitConstant(Factor), isl_pw_aff_mul); 229 if (computeModuloForExpr(Key.first)) 230 PWAC.first = addModuloSemantic(PWAC.first, Expr->getType()); 231 } 232 233 // For compile time reasons we need to simplify the PWAC before we cache and 234 // return it. 235 PWAC.first = PWAC.first.coalesce(); 236 if (!computeModuloForExpr(Key.first)) 237 PWAC = checkForWrapping(Key.first, PWAC); 238 239 CachedExpressions[Key] = PWAC; 240 return PWAC; 241 } 242 243 PWACtx SCEVAffinator::visitConstant(const SCEVConstant *Expr) { 244 ConstantInt *Value = Expr->getValue(); 245 isl_val *v; 246 247 // LLVM does not define if an integer value is interpreted as a signed or 248 // unsigned value. Hence, without further information, it is unknown how 249 // this value needs to be converted to GMP. At the moment, we only support 250 // signed operations. So we just interpret it as signed. Later, there are 251 // two options: 252 // 253 // 1. We always interpret any value as signed and convert the values on 254 // demand. 255 // 2. We pass down the signedness of the calculation and use it to interpret 256 // this constant correctly. 257 v = isl_valFromAPInt(Ctx.get(), Value->getValue(), /* isSigned */ true); 258 259 isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators); 260 isl_local_space *ls = isl_local_space_from_space(Space); 261 return getPWACtxFromPWA( 262 isl::manage(isl_pw_aff_from_aff(isl_aff_val_on_domain(ls, v)))); 263 } 264 265 PWACtx SCEVAffinator::visitTruncateExpr(const SCEVTruncateExpr *Expr) { 266 // Truncate operations are basically modulo operations, thus we can 267 // model them that way. However, for large types we assume the operand 268 // to fit in the new type size instead of introducing a modulo with a very 269 // large constant. 270 271 auto *Op = Expr->getOperand(); 272 auto OpPWAC = visit(Op); 273 274 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 275 276 if (computeModuloForExpr(Expr)) 277 return OpPWAC; 278 279 auto *Dom = OpPWAC.first.domain().release(); 280 auto *ExpPWA = getWidthExpValOnDomain(Width - 1, Dom); 281 auto *GreaterDom = 282 isl_pw_aff_ge_set(OpPWAC.first.copy(), isl_pw_aff_copy(ExpPWA)); 283 auto *SmallerDom = 284 isl_pw_aff_lt_set(OpPWAC.first.copy(), isl_pw_aff_neg(ExpPWA)); 285 auto *OutOfBoundsDom = isl_set_union(SmallerDom, GreaterDom); 286 OpPWAC.second = OpPWAC.second.unite(isl::manage_copy(OutOfBoundsDom)); 287 288 if (!BB) { 289 assert(isl_set_dim(OutOfBoundsDom, isl_dim_set) == 0 && 290 "Expected a zero dimensional set for non-basic-block domains"); 291 OutOfBoundsDom = isl_set_params(OutOfBoundsDom); 292 } 293 294 S->recordAssumption(UNSIGNED, isl::manage(OutOfBoundsDom), DebugLoc(), 295 AS_RESTRICTION, BB); 296 297 return OpPWAC; 298 } 299 300 PWACtx SCEVAffinator::visitZeroExtendExpr(const SCEVZeroExtendExpr *Expr) { 301 // A zero-extended value can be interpreted as a piecewise defined signed 302 // value. If the value was non-negative it stays the same, otherwise it 303 // is the sum of the original value and 2^n where n is the bit-width of 304 // the original (or operand) type. Examples: 305 // zext i8 127 to i32 -> { [127] } 306 // zext i8 -1 to i32 -> { [256 + (-1)] } = { [255] } 307 // zext i8 %v to i32 -> [v] -> { [v] | v >= 0; [256 + v] | v < 0 } 308 // 309 // However, LLVM/Scalar Evolution uses zero-extend (potentially lead by a 310 // truncate) to represent some forms of modulo computation. The left-hand side 311 // of the condition in the code below would result in the SCEV 312 // "zext i1 <false, +, true>for.body" which is just another description 313 // of the C expression "i & 1 != 0" or, equivalently, "i % 2 != 0". 314 // 315 // for (i = 0; i < N; i++) 316 // if (i & 1 != 0 /* == i % 2 */) 317 // /* do something */ 318 // 319 // If we do not make the modulo explicit but only use the mechanism described 320 // above we will get the very restrictive assumption "N < 3", because for all 321 // values of N >= 3 the SCEVAddRecExpr operand of the zero-extend would wrap. 322 // Alternatively, we can make the modulo in the operand explicit in the 323 // resulting piecewise function and thereby avoid the assumption on N. For the 324 // example this would result in the following piecewise affine function: 325 // { [i0] -> [(1)] : 2*floor((-1 + i0)/2) = -1 + i0; 326 // [i0] -> [(0)] : 2*floor((i0)/2) = i0 } 327 // To this end we can first determine if the (immediate) operand of the 328 // zero-extend can wrap and, in case it might, we will use explicit modulo 329 // semantic to compute the result instead of emitting non-wrapping 330 // assumptions. 331 // 332 // Note that operands with large bit-widths are less likely to be negative 333 // because it would result in a very large access offset or loop bound after 334 // the zero-extend. To this end one can optimistically assume the operand to 335 // be positive and avoid the piecewise definition if the bit-width is bigger 336 // than some threshold (here MaxZextSmallBitWidth). 337 // 338 // We choose to go with a hybrid solution of all modeling techniques described 339 // above. For small bit-widths (up to MaxZextSmallBitWidth) we will model the 340 // wrapping explicitly and use a piecewise defined function. However, if the 341 // bit-width is bigger than MaxZextSmallBitWidth we will employ overflow 342 // assumptions and assume the "former negative" piece will not exist. 343 344 auto *Op = Expr->getOperand(); 345 auto OpPWAC = visit(Op); 346 347 // If the width is to big we assume the negative part does not occur. 348 if (!computeModuloForExpr(Op)) { 349 takeNonNegativeAssumption(OpPWAC); 350 return OpPWAC; 351 } 352 353 // If the width is small build the piece for the non-negative part and 354 // the one for the negative part and unify them. 355 unsigned Width = TD.getTypeSizeInBits(Op->getType()); 356 interpretAsUnsigned(OpPWAC, Width); 357 return OpPWAC; 358 } 359 360 PWACtx SCEVAffinator::visitSignExtendExpr(const SCEVSignExtendExpr *Expr) { 361 // As all values are represented as signed, a sign extension is a noop. 362 return visit(Expr->getOperand()); 363 } 364 365 PWACtx SCEVAffinator::visitAddExpr(const SCEVAddExpr *Expr) { 366 PWACtx Sum = visit(Expr->getOperand(0)); 367 368 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 369 Sum = combine(Sum, visit(Expr->getOperand(i)), isl_pw_aff_add); 370 if (isTooComplex(Sum)) 371 return complexityBailout(); 372 } 373 374 return Sum; 375 } 376 377 PWACtx SCEVAffinator::visitMulExpr(const SCEVMulExpr *Expr) { 378 PWACtx Prod = visit(Expr->getOperand(0)); 379 380 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 381 Prod = combine(Prod, visit(Expr->getOperand(i)), isl_pw_aff_mul); 382 if (isTooComplex(Prod)) 383 return complexityBailout(); 384 } 385 386 return Prod; 387 } 388 389 PWACtx SCEVAffinator::visitAddRecExpr(const SCEVAddRecExpr *Expr) { 390 assert(Expr->isAffine() && "Only affine AddRecurrences allowed"); 391 392 auto Flags = Expr->getNoWrapFlags(); 393 394 // Directly generate isl_pw_aff for Expr if 'start' is zero. 395 if (Expr->getStart()->isZero()) { 396 assert(S->contains(Expr->getLoop()) && 397 "Scop does not contain the loop referenced in this AddRec"); 398 399 PWACtx Step = visit(Expr->getOperand(1)); 400 isl_space *Space = isl_space_set_alloc(Ctx.get(), 0, NumIterators); 401 isl_local_space *LocalSpace = isl_local_space_from_space(Space); 402 403 unsigned loopDimension = S->getRelativeLoopDepth(Expr->getLoop()); 404 405 isl_aff *LAff = isl_aff_set_coefficient_si( 406 isl_aff_zero_on_domain(LocalSpace), isl_dim_in, loopDimension, 1); 407 isl_pw_aff *LPwAff = isl_pw_aff_from_aff(LAff); 408 409 Step.first = Step.first.mul(isl::manage(LPwAff)); 410 return Step; 411 } 412 413 // Translate AddRecExpr from '{start, +, inc}' into 'start + {0, +, inc}' 414 // if 'start' is not zero. 415 // TODO: Using the original SCEV no-wrap flags is not always safe, however 416 // as our code generation is reordering the expression anyway it doesn't 417 // really matter. 418 const SCEV *ZeroStartExpr = 419 SE.getAddRecExpr(SE.getConstant(Expr->getStart()->getType(), 0), 420 Expr->getStepRecurrence(SE), Expr->getLoop(), Flags); 421 422 PWACtx Result = visit(ZeroStartExpr); 423 PWACtx Start = visit(Expr->getStart()); 424 Result = combine(Result, Start, isl_pw_aff_add); 425 return Result; 426 } 427 428 PWACtx SCEVAffinator::visitSMaxExpr(const SCEVSMaxExpr *Expr) { 429 PWACtx Max = visit(Expr->getOperand(0)); 430 431 for (int i = 1, e = Expr->getNumOperands(); i < e; ++i) { 432 Max = combine(Max, visit(Expr->getOperand(i)), isl_pw_aff_max); 433 if (isTooComplex(Max)) 434 return complexityBailout(); 435 } 436 437 return Max; 438 } 439 440 PWACtx SCEVAffinator::visitUMaxExpr(const SCEVUMaxExpr *Expr) { 441 llvm_unreachable("SCEVUMaxExpr not yet supported"); 442 } 443 444 PWACtx SCEVAffinator::visitUDivExpr(const SCEVUDivExpr *Expr) { 445 // The handling of unsigned division is basically the same as for signed 446 // division, except the interpretation of the operands. As the divisor 447 // has to be constant in both cases we can simply interpret it as an 448 // unsigned value without additional complexity in the representation. 449 // For the dividend we could choose from the different representation 450 // schemes introduced for zero-extend operations but for now we will 451 // simply use an assumption. 452 auto *Dividend = Expr->getLHS(); 453 auto *Divisor = Expr->getRHS(); 454 assert(isa<SCEVConstant>(Divisor) && 455 "UDiv is no parameter but has a non-constant RHS."); 456 457 auto DividendPWAC = visit(Dividend); 458 auto DivisorPWAC = visit(Divisor); 459 460 if (SE.isKnownNegative(Divisor)) { 461 // Interpret negative divisors unsigned. This is a special case of the 462 // piece-wise defined value described for zero-extends as we already know 463 // the actual value of the constant divisor. 464 unsigned Width = TD.getTypeSizeInBits(Expr->getType()); 465 auto *DivisorDom = DivisorPWAC.first.domain().release(); 466 auto *WidthExpPWA = getWidthExpValOnDomain(Width, DivisorDom); 467 DivisorPWAC.first = DivisorPWAC.first.add(isl::manage(WidthExpPWA)); 468 } 469 470 // TODO: One can represent the dividend as piece-wise function to be more 471 // precise but therefor a heuristic is needed. 472 473 // Assume a non-negative dividend. 474 takeNonNegativeAssumption(DividendPWAC); 475 476 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_div); 477 DividendPWAC.first = DividendPWAC.first.floor(); 478 479 return DividendPWAC; 480 } 481 482 PWACtx SCEVAffinator::visitSDivInstruction(Instruction *SDiv) { 483 assert(SDiv->getOpcode() == Instruction::SDiv && "Assumed SDiv instruction!"); 484 485 auto *Scope = getScope(); 486 auto *Divisor = SDiv->getOperand(1); 487 auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope); 488 auto DivisorPWAC = visit(DivisorSCEV); 489 assert(isa<SCEVConstant>(DivisorSCEV) && 490 "SDiv is no parameter but has a non-constant RHS."); 491 492 auto *Dividend = SDiv->getOperand(0); 493 auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope); 494 auto DividendPWAC = visit(DividendSCEV); 495 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_q); 496 return DividendPWAC; 497 } 498 499 PWACtx SCEVAffinator::visitSRemInstruction(Instruction *SRem) { 500 assert(SRem->getOpcode() == Instruction::SRem && "Assumed SRem instruction!"); 501 502 auto *Scope = getScope(); 503 auto *Divisor = SRem->getOperand(1); 504 auto *DivisorSCEV = SE.getSCEVAtScope(Divisor, Scope); 505 auto DivisorPWAC = visit(DivisorSCEV); 506 assert(isa<ConstantInt>(Divisor) && 507 "SRem is no parameter but has a non-constant RHS."); 508 509 auto *Dividend = SRem->getOperand(0); 510 auto *DividendSCEV = SE.getSCEVAtScope(Dividend, Scope); 511 auto DividendPWAC = visit(DividendSCEV); 512 DividendPWAC = combine(DividendPWAC, DivisorPWAC, isl_pw_aff_tdiv_r); 513 return DividendPWAC; 514 } 515 516 PWACtx SCEVAffinator::visitUnknown(const SCEVUnknown *Expr) { 517 if (Instruction *I = dyn_cast<Instruction>(Expr->getValue())) { 518 switch (I->getOpcode()) { 519 case Instruction::IntToPtr: 520 return visit(SE.getSCEVAtScope(I->getOperand(0), getScope())); 521 case Instruction::PtrToInt: 522 return visit(SE.getSCEVAtScope(I->getOperand(0), getScope())); 523 case Instruction::SDiv: 524 return visitSDivInstruction(I); 525 case Instruction::SRem: 526 return visitSRemInstruction(I); 527 default: 528 break; // Fall through. 529 } 530 } 531 532 llvm_unreachable( 533 "Unknowns SCEV was neither parameter nor a valid instruction."); 534 } 535 536 PWACtx SCEVAffinator::complexityBailout() { 537 // We hit the complexity limit for affine expressions; invalidate the scop 538 // and return a constant zero. 539 const DebugLoc &Loc = BB ? BB->getTerminator()->getDebugLoc() : DebugLoc(); 540 S->invalidate(COMPLEXITY, Loc); 541 return visit(SE.getZero(Type::getInt32Ty(S->getFunction().getContext()))); 542 } 543