1*3fef2d26SRiver Riddle //===- TestConvertGPUKernelToHsaco.cpp - Test gpu kernel hsaco lowering ---===// 2*3fef2d26SRiver Riddle // 3*3fef2d26SRiver Riddle // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4*3fef2d26SRiver Riddle // See https://llvm.org/LICENSE.txt for license information. 5*3fef2d26SRiver Riddle // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6*3fef2d26SRiver Riddle // 7*3fef2d26SRiver Riddle //===----------------------------------------------------------------------===// 8*3fef2d26SRiver Riddle 9*3fef2d26SRiver Riddle #include "mlir/Dialect/GPU/Passes.h" 10*3fef2d26SRiver Riddle 11*3fef2d26SRiver Riddle #include "mlir/Pass/Pass.h" 12*3fef2d26SRiver Riddle #include "mlir/Target/LLVMIR/Dialect/ROCDL/ROCDLToLLVMIRTranslation.h" 13*3fef2d26SRiver Riddle #include "mlir/Target/LLVMIR/Export.h" 14*3fef2d26SRiver Riddle #include "llvm/Support/TargetSelect.h" 15*3fef2d26SRiver Riddle 16*3fef2d26SRiver Riddle using namespace mlir; 17*3fef2d26SRiver Riddle 18*3fef2d26SRiver Riddle #if MLIR_ROCM_CONVERSIONS_ENABLED 19*3fef2d26SRiver Riddle namespace { 20*3fef2d26SRiver Riddle class TestSerializeToHsacoPass 21*3fef2d26SRiver Riddle : public PassWrapper<TestSerializeToHsacoPass, gpu::SerializeToBlobPass> { 22*3fef2d26SRiver Riddle public: 23*3fef2d26SRiver Riddle TestSerializeToHsacoPass(); 24*3fef2d26SRiver Riddle 25*3fef2d26SRiver Riddle private: 26*3fef2d26SRiver Riddle void getDependentDialects(DialectRegistry ®istry) const override; 27*3fef2d26SRiver Riddle 28*3fef2d26SRiver Riddle // Serializes ROCDL IR to HSACO. 29*3fef2d26SRiver Riddle std::unique_ptr<std::vector<char>> 30*3fef2d26SRiver Riddle serializeISA(const std::string &isa) override; 31*3fef2d26SRiver Riddle }; 32*3fef2d26SRiver Riddle } // namespace 33*3fef2d26SRiver Riddle 34*3fef2d26SRiver Riddle TestSerializeToHsacoPass::TestSerializeToHsacoPass() { 35*3fef2d26SRiver Riddle this->triple = "amdgcn-amd-amdhsa"; 36*3fef2d26SRiver Riddle this->chip = "gfx900"; 37*3fef2d26SRiver Riddle } 38*3fef2d26SRiver Riddle 39*3fef2d26SRiver Riddle void TestSerializeToHsacoPass::getDependentDialects( 40*3fef2d26SRiver Riddle DialectRegistry ®istry) const { 41*3fef2d26SRiver Riddle registerROCDLDialectTranslation(registry); 42*3fef2d26SRiver Riddle gpu::SerializeToBlobPass::getDependentDialects(registry); 43*3fef2d26SRiver Riddle } 44*3fef2d26SRiver Riddle 45*3fef2d26SRiver Riddle std::unique_ptr<std::vector<char>> 46*3fef2d26SRiver Riddle TestSerializeToHsacoPass::serializeISA(const std::string &) { 47*3fef2d26SRiver Riddle std::string data = "HSACO"; 48*3fef2d26SRiver Riddle return std::make_unique<std::vector<char>>(data.begin(), data.end()); 49*3fef2d26SRiver Riddle } 50*3fef2d26SRiver Riddle 51*3fef2d26SRiver Riddle namespace mlir { 52*3fef2d26SRiver Riddle namespace test { 53*3fef2d26SRiver Riddle // Register test pass to serialize GPU module to a HSAco binary annotation. 54*3fef2d26SRiver Riddle void registerTestGpuSerializeToHsacoPass() { 55*3fef2d26SRiver Riddle PassRegistration<TestSerializeToHsacoPass> registerSerializeToHsaco( 56*3fef2d26SRiver Riddle "test-gpu-to-hsaco", 57*3fef2d26SRiver Riddle "Lower GPU kernel function to HSAco binary annotations", [] { 58*3fef2d26SRiver Riddle // Initialize LLVM AMDGPU backend. 59*3fef2d26SRiver Riddle LLVMInitializeAMDGPUTarget(); 60*3fef2d26SRiver Riddle LLVMInitializeAMDGPUTargetInfo(); 61*3fef2d26SRiver Riddle LLVMInitializeAMDGPUTargetMC(); 62*3fef2d26SRiver Riddle LLVMInitializeAMDGPUAsmPrinter(); 63*3fef2d26SRiver Riddle 64*3fef2d26SRiver Riddle return std::make_unique<TestSerializeToHsacoPass>(); 65*3fef2d26SRiver Riddle }); 66*3fef2d26SRiver Riddle } 67*3fef2d26SRiver Riddle } // namespace test 68*3fef2d26SRiver Riddle } // namespace mlir 69*3fef2d26SRiver Riddle #endif // MLIR_ROCM_CONVERSIONS_ENABLED 70