1// RUN: mlir-opt %s --sparse-compiler | \ 2// RUN: mlir-cpu-runner -e entry -entry-point-result=void \ 3// RUN: -shared-libs=%mlir_integration_test_dir/libmlir_c_runner_utils%shlibext | \ 4// RUN: FileCheck %s 5 6#DCSR = #sparse_tensor.encoding<{ 7 dimLevelType = [ "compressed", "compressed" ] 8}> 9 10#DCSC = #sparse_tensor.encoding<{ 11 dimLevelType = [ "compressed", "compressed" ], 12 dimOrdering = affine_map<(i,j) -> (j,i)> 13}> 14 15#transpose_trait = { 16 indexing_maps = [ 17 affine_map<(i,j) -> (j,i)>, // A 18 affine_map<(i,j) -> (i,j)> // X 19 ], 20 iterator_types = ["parallel", "parallel"], 21 doc = "X(i,j) = A(j,i)" 22} 23 24module { 25 26 // 27 // Transposing a sparse row-wise matrix into another sparse row-wise 28 // matrix would fail direct codegen, since it introduces a cycle in 29 // the iteration graph. This can be avoided by converting the incoming 30 // matrix into a sparse column-wise matrix first. 31 // 32 func.func @sparse_transpose(%arga: tensor<3x4xf64, #DCSR>) -> tensor<4x3xf64, #DCSR> { 33 %t = sparse_tensor.convert %arga : tensor<3x4xf64, #DCSR> to tensor<3x4xf64, #DCSC> 34 35 %i = bufferization.alloc_tensor() : tensor<4x3xf64, #DCSR> 36 37 %0 = linalg.generic #transpose_trait 38 ins(%t: tensor<3x4xf64, #DCSC>) 39 outs(%i: tensor<4x3xf64, #DCSR>) { 40 ^bb(%a: f64, %x: f64): 41 linalg.yield %a : f64 42 } -> tensor<4x3xf64, #DCSR> 43 44 sparse_tensor.release %t : tensor<3x4xf64, #DCSC> 45 46 return %0 : tensor<4x3xf64, #DCSR> 47 } 48 49 // 50 // Main driver. 51 // 52 func.func @entry() { 53 %c0 = arith.constant 0 : index 54 %c1 = arith.constant 1 : index 55 %c4 = arith.constant 4 : index 56 %du = arith.constant 0.0 : f64 57 58 // Setup input sparse matrix from compressed constant. 59 %d = arith.constant dense <[ 60 [ 1.1, 1.2, 0.0, 1.4 ], 61 [ 0.0, 0.0, 0.0, 0.0 ], 62 [ 3.1, 0.0, 3.3, 3.4 ] 63 ]> : tensor<3x4xf64> 64 %a = sparse_tensor.convert %d : tensor<3x4xf64> to tensor<3x4xf64, #DCSR> 65 66 // Call the kernel. 67 %0 = call @sparse_transpose(%a) : (tensor<3x4xf64, #DCSR>) -> tensor<4x3xf64, #DCSR> 68 69 // 70 // Verify result. 71 // 72 // CHECK: ( 1.1, 0, 3.1 ) 73 // CHECK-NEXT: ( 1.2, 0, 0 ) 74 // CHECK-NEXT: ( 0, 0, 3.3 ) 75 // CHECK-NEXT: ( 1.4, 0, 3.4 ) 76 // 77 %x = sparse_tensor.convert %0 : tensor<4x3xf64, #DCSR> to tensor<4x3xf64> 78 %m = bufferization.to_memref %x : memref<4x3xf64> 79 scf.for %i = %c0 to %c4 step %c1 { 80 %v = vector.transfer_read %m[%i, %c0], %du: memref<4x3xf64>, vector<3xf64> 81 vector.print %v : vector<3xf64> 82 } 83 84 // Release resources. 85 sparse_tensor.release %a : tensor<3x4xf64, #DCSR> 86 sparse_tensor.release %0 : tensor<4x3xf64, #DCSR> 87 memref.dealloc %m : memref<4x3xf64> 88 89 return 90 } 91} 92