1 //===- OpenMPDialect.cpp - MLIR Dialect for OpenMP implementation ---------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements the OpenMP dialect and its operations. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "mlir/Dialect/OpenMP/OpenMPDialect.h" 14 #include "mlir/Dialect/LLVMIR/LLVMTypes.h" 15 #include "mlir/IR/Attributes.h" 16 #include "mlir/IR/DialectImplementation.h" 17 #include "mlir/IR/OpImplementation.h" 18 #include "mlir/IR/OperationSupport.h" 19 20 #include "llvm/ADT/BitVector.h" 21 #include "llvm/ADT/SmallString.h" 22 #include "llvm/ADT/StringExtras.h" 23 #include "llvm/ADT/StringRef.h" 24 #include "llvm/ADT/StringSwitch.h" 25 #include "llvm/ADT/TypeSwitch.h" 26 #include <cstddef> 27 28 #include "mlir/Dialect/OpenMP/OpenMPOpsDialect.cpp.inc" 29 #include "mlir/Dialect/OpenMP/OpenMPOpsEnums.cpp.inc" 30 #include "mlir/Dialect/OpenMP/OpenMPOpsInterfaces.cpp.inc" 31 #include "mlir/Dialect/OpenMP/OpenMPTypeInterfaces.cpp.inc" 32 33 using namespace mlir; 34 using namespace mlir::omp; 35 36 namespace { 37 /// Model for pointer-like types that already provide a `getElementType` method. 38 template <typename T> 39 struct PointerLikeModel 40 : public PointerLikeType::ExternalModel<PointerLikeModel<T>, T> { 41 Type getElementType(Type pointer) const { 42 return pointer.cast<T>().getElementType(); 43 } 44 }; 45 } // namespace 46 47 void OpenMPDialect::initialize() { 48 addOperations< 49 #define GET_OP_LIST 50 #include "mlir/Dialect/OpenMP/OpenMPOps.cpp.inc" 51 >(); 52 addAttributes< 53 #define GET_ATTRDEF_LIST 54 #include "mlir/Dialect/OpenMP/OpenMPOpsAttributes.cpp.inc" 55 >(); 56 57 LLVM::LLVMPointerType::attachInterface< 58 PointerLikeModel<LLVM::LLVMPointerType>>(*getContext()); 59 MemRefType::attachInterface<PointerLikeModel<MemRefType>>(*getContext()); 60 } 61 62 //===----------------------------------------------------------------------===// 63 // Parser and printer for Allocate Clause 64 //===----------------------------------------------------------------------===// 65 66 /// Parse an allocate clause with allocators and a list of operands with types. 67 /// 68 /// allocate-operand-list :: = allocate-operand | 69 /// allocator-operand `,` allocate-operand-list 70 /// allocate-operand :: = ssa-id-and-type -> ssa-id-and-type 71 /// ssa-id-and-type ::= ssa-id `:` type 72 static ParseResult parseAllocateAndAllocator( 73 OpAsmParser &parser, 74 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &operandsAllocate, 75 SmallVectorImpl<Type> &typesAllocate, 76 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &operandsAllocator, 77 SmallVectorImpl<Type> &typesAllocator) { 78 79 return parser.parseCommaSeparatedList([&]() -> ParseResult { 80 OpAsmParser::UnresolvedOperand operand; 81 Type type; 82 if (parser.parseOperand(operand) || parser.parseColonType(type)) 83 return failure(); 84 operandsAllocator.push_back(operand); 85 typesAllocator.push_back(type); 86 if (parser.parseArrow()) 87 return failure(); 88 if (parser.parseOperand(operand) || parser.parseColonType(type)) 89 return failure(); 90 91 operandsAllocate.push_back(operand); 92 typesAllocate.push_back(type); 93 return success(); 94 }); 95 } 96 97 /// Print allocate clause 98 static void printAllocateAndAllocator(OpAsmPrinter &p, Operation *op, 99 OperandRange varsAllocate, 100 TypeRange typesAllocate, 101 OperandRange varsAllocator, 102 TypeRange typesAllocator) { 103 for (unsigned i = 0; i < varsAllocate.size(); ++i) { 104 std::string separator = i == varsAllocate.size() - 1 ? "" : ", "; 105 p << varsAllocator[i] << " : " << typesAllocator[i] << " -> "; 106 p << varsAllocate[i] << " : " << typesAllocate[i] << separator; 107 } 108 } 109 110 //===----------------------------------------------------------------------===// 111 // Parser and printer for a clause attribute (StringEnumAttr) 112 //===----------------------------------------------------------------------===// 113 114 template <typename ClauseAttr> 115 static ParseResult parseClauseAttr(AsmParser &parser, ClauseAttr &attr) { 116 using ClauseT = decltype(std::declval<ClauseAttr>().getValue()); 117 StringRef enumStr; 118 SMLoc loc = parser.getCurrentLocation(); 119 if (parser.parseKeyword(&enumStr)) 120 return failure(); 121 if (Optional<ClauseT> enumValue = symbolizeEnum<ClauseT>(enumStr)) { 122 attr = ClauseAttr::get(parser.getContext(), *enumValue); 123 return success(); 124 } 125 return parser.emitError(loc, "invalid clause value: '") << enumStr << "'"; 126 } 127 128 template <typename ClauseAttr> 129 void printClauseAttr(OpAsmPrinter &p, Operation *op, ClauseAttr attr) { 130 p << stringifyEnum(attr.getValue()); 131 } 132 133 //===----------------------------------------------------------------------===// 134 // Parser and printer for Linear Clause 135 //===----------------------------------------------------------------------===// 136 137 /// linear ::= `linear` `(` linear-list `)` 138 /// linear-list := linear-val | linear-val linear-list 139 /// linear-val := ssa-id-and-type `=` ssa-id-and-type 140 static ParseResult 141 parseLinearClause(OpAsmParser &parser, 142 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &vars, 143 SmallVectorImpl<Type> &types, 144 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &stepVars) { 145 do { 146 OpAsmParser::UnresolvedOperand var; 147 Type type; 148 OpAsmParser::UnresolvedOperand stepVar; 149 if (parser.parseOperand(var) || parser.parseEqual() || 150 parser.parseOperand(stepVar) || parser.parseColonType(type)) 151 return failure(); 152 153 vars.push_back(var); 154 types.push_back(type); 155 stepVars.push_back(stepVar); 156 } while (succeeded(parser.parseOptionalComma())); 157 return success(); 158 } 159 160 /// Print Linear Clause 161 static void printLinearClause(OpAsmPrinter &p, Operation *op, 162 ValueRange linearVars, TypeRange linearVarTypes, 163 ValueRange linearStepVars) { 164 size_t linearVarsSize = linearVars.size(); 165 for (unsigned i = 0; i < linearVarsSize; ++i) { 166 std::string separator = i == linearVarsSize - 1 ? "" : ", "; 167 p << linearVars[i]; 168 if (linearStepVars.size() > i) 169 p << " = " << linearStepVars[i]; 170 p << " : " << linearVars[i].getType() << separator; 171 } 172 } 173 174 //===----------------------------------------------------------------------===// 175 // Parser, printer and verifier for Schedule Clause 176 //===----------------------------------------------------------------------===// 177 178 static ParseResult 179 verifyScheduleModifiers(OpAsmParser &parser, 180 SmallVectorImpl<SmallString<12>> &modifiers) { 181 if (modifiers.size() > 2) 182 return parser.emitError(parser.getNameLoc()) << " unexpected modifier(s)"; 183 for (const auto &mod : modifiers) { 184 // Translate the string. If it has no value, then it was not a valid 185 // modifier! 186 auto symbol = symbolizeScheduleModifier(mod); 187 if (!symbol.hasValue()) 188 return parser.emitError(parser.getNameLoc()) 189 << " unknown modifier type: " << mod; 190 } 191 192 // If we have one modifier that is "simd", then stick a "none" modiifer in 193 // index 0. 194 if (modifiers.size() == 1) { 195 if (symbolizeScheduleModifier(modifiers[0]) == ScheduleModifier::simd) { 196 modifiers.push_back(modifiers[0]); 197 modifiers[0] = stringifyScheduleModifier(ScheduleModifier::none); 198 } 199 } else if (modifiers.size() == 2) { 200 // If there are two modifier: 201 // First modifier should not be simd, second one should be simd 202 if (symbolizeScheduleModifier(modifiers[0]) == ScheduleModifier::simd || 203 symbolizeScheduleModifier(modifiers[1]) != ScheduleModifier::simd) 204 return parser.emitError(parser.getNameLoc()) 205 << " incorrect modifier order"; 206 } 207 return success(); 208 } 209 210 /// schedule ::= `schedule` `(` sched-list `)` 211 /// sched-list ::= sched-val | sched-val sched-list | 212 /// sched-val `,` sched-modifier 213 /// sched-val ::= sched-with-chunk | sched-wo-chunk 214 /// sched-with-chunk ::= sched-with-chunk-types (`=` ssa-id-and-type)? 215 /// sched-with-chunk-types ::= `static` | `dynamic` | `guided` 216 /// sched-wo-chunk ::= `auto` | `runtime` 217 /// sched-modifier ::= sched-mod-val | sched-mod-val `,` sched-mod-val 218 /// sched-mod-val ::= `monotonic` | `nonmonotonic` | `simd` | `none` 219 static ParseResult parseScheduleClause( 220 OpAsmParser &parser, ClauseScheduleKindAttr &scheduleAttr, 221 ScheduleModifierAttr &scheduleModifier, UnitAttr &simdModifier, 222 Optional<OpAsmParser::UnresolvedOperand> &chunkSize, Type &chunkType) { 223 StringRef keyword; 224 if (parser.parseKeyword(&keyword)) 225 return failure(); 226 llvm::Optional<mlir::omp::ClauseScheduleKind> schedule = 227 symbolizeClauseScheduleKind(keyword); 228 if (!schedule) 229 return parser.emitError(parser.getNameLoc()) << " expected schedule kind"; 230 231 scheduleAttr = ClauseScheduleKindAttr::get(parser.getContext(), *schedule); 232 switch (*schedule) { 233 case ClauseScheduleKind::Static: 234 case ClauseScheduleKind::Dynamic: 235 case ClauseScheduleKind::Guided: 236 if (succeeded(parser.parseOptionalEqual())) { 237 chunkSize = OpAsmParser::UnresolvedOperand{}; 238 if (parser.parseOperand(*chunkSize) || parser.parseColonType(chunkType)) 239 return failure(); 240 } else { 241 chunkSize = llvm::NoneType::None; 242 } 243 break; 244 case ClauseScheduleKind::Auto: 245 case ClauseScheduleKind::Runtime: 246 chunkSize = llvm::NoneType::None; 247 } 248 249 // If there is a comma, we have one or more modifiers.. 250 SmallVector<SmallString<12>> modifiers; 251 while (succeeded(parser.parseOptionalComma())) { 252 StringRef mod; 253 if (parser.parseKeyword(&mod)) 254 return failure(); 255 modifiers.push_back(mod); 256 } 257 258 if (verifyScheduleModifiers(parser, modifiers)) 259 return failure(); 260 261 if (!modifiers.empty()) { 262 SMLoc loc = parser.getCurrentLocation(); 263 if (Optional<ScheduleModifier> mod = 264 symbolizeScheduleModifier(modifiers[0])) { 265 scheduleModifier = ScheduleModifierAttr::get(parser.getContext(), *mod); 266 } else { 267 return parser.emitError(loc, "invalid schedule modifier"); 268 } 269 // Only SIMD attribute is allowed here! 270 if (modifiers.size() > 1) { 271 assert(symbolizeScheduleModifier(modifiers[1]) == ScheduleModifier::simd); 272 simdModifier = UnitAttr::get(parser.getBuilder().getContext()); 273 } 274 } 275 276 return success(); 277 } 278 279 /// Print schedule clause 280 static void printScheduleClause(OpAsmPrinter &p, Operation *op, 281 ClauseScheduleKindAttr schedAttr, 282 ScheduleModifierAttr modifier, UnitAttr simd, 283 Value scheduleChunkVar, 284 Type scheduleChunkType) { 285 p << stringifyClauseScheduleKind(schedAttr.getValue()); 286 if (scheduleChunkVar) 287 p << " = " << scheduleChunkVar << " : " << scheduleChunkVar.getType(); 288 if (modifier) 289 p << ", " << stringifyScheduleModifier(modifier.getValue()); 290 if (simd) 291 p << ", simd"; 292 } 293 294 //===----------------------------------------------------------------------===// 295 // Parser, printer and verifier for ReductionVarList 296 //===----------------------------------------------------------------------===// 297 298 /// reduction-entry-list ::= reduction-entry 299 /// | reduction-entry-list `,` reduction-entry 300 /// reduction-entry ::= symbol-ref `->` ssa-id `:` type 301 static ParseResult 302 parseReductionVarList(OpAsmParser &parser, 303 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &operands, 304 SmallVectorImpl<Type> &types, 305 ArrayAttr &redcuctionSymbols) { 306 SmallVector<SymbolRefAttr> reductionVec; 307 do { 308 if (parser.parseAttribute(reductionVec.emplace_back()) || 309 parser.parseArrow() || parser.parseOperand(operands.emplace_back()) || 310 parser.parseColonType(types.emplace_back())) 311 return failure(); 312 } while (succeeded(parser.parseOptionalComma())); 313 SmallVector<Attribute> reductions(reductionVec.begin(), reductionVec.end()); 314 redcuctionSymbols = ArrayAttr::get(parser.getContext(), reductions); 315 return success(); 316 } 317 318 /// Print Reduction clause 319 static void printReductionVarList(OpAsmPrinter &p, Operation *op, 320 OperandRange reductionVars, 321 TypeRange reductionTypes, 322 Optional<ArrayAttr> reductions) { 323 for (unsigned i = 0, e = reductions->size(); i < e; ++i) { 324 if (i != 0) 325 p << ", "; 326 p << (*reductions)[i] << " -> " << reductionVars[i] << " : " 327 << reductionVars[i].getType(); 328 } 329 } 330 331 /// Verifies Reduction Clause 332 static LogicalResult verifyReductionVarList(Operation *op, 333 Optional<ArrayAttr> reductions, 334 OperandRange reductionVars) { 335 if (!reductionVars.empty()) { 336 if (!reductions || reductions->size() != reductionVars.size()) 337 return op->emitOpError() 338 << "expected as many reduction symbol references " 339 "as reduction variables"; 340 } else { 341 if (reductions) 342 return op->emitOpError() << "unexpected reduction symbol references"; 343 return success(); 344 } 345 346 // TODO: The followings should be done in 347 // SymbolUserOpInterface::verifySymbolUses. 348 DenseSet<Value> accumulators; 349 for (auto args : llvm::zip(reductionVars, *reductions)) { 350 Value accum = std::get<0>(args); 351 352 if (!accumulators.insert(accum).second) 353 return op->emitOpError() << "accumulator variable used more than once"; 354 355 Type varType = accum.getType().cast<PointerLikeType>(); 356 auto symbolRef = std::get<1>(args).cast<SymbolRefAttr>(); 357 auto decl = 358 SymbolTable::lookupNearestSymbolFrom<ReductionDeclareOp>(op, symbolRef); 359 if (!decl) 360 return op->emitOpError() << "expected symbol reference " << symbolRef 361 << " to point to a reduction declaration"; 362 363 if (decl.getAccumulatorType() && decl.getAccumulatorType() != varType) 364 return op->emitOpError() 365 << "expected accumulator (" << varType 366 << ") to be the same type as reduction declaration (" 367 << decl.getAccumulatorType() << ")"; 368 } 369 370 return success(); 371 } 372 373 //===----------------------------------------------------------------------===// 374 // Parser, printer and verifier for Synchronization Hint (2.17.12) 375 //===----------------------------------------------------------------------===// 376 377 /// Parses a Synchronization Hint clause. The value of hint is an integer 378 /// which is a combination of different hints from `omp_sync_hint_t`. 379 /// 380 /// hint-clause = `hint` `(` hint-value `)` 381 static ParseResult parseSynchronizationHint(OpAsmParser &parser, 382 IntegerAttr &hintAttr) { 383 StringRef hintKeyword; 384 int64_t hint = 0; 385 do { 386 if (failed(parser.parseKeyword(&hintKeyword))) 387 return failure(); 388 if (hintKeyword == "uncontended") 389 hint |= 1; 390 else if (hintKeyword == "contended") 391 hint |= 2; 392 else if (hintKeyword == "nonspeculative") 393 hint |= 4; 394 else if (hintKeyword == "speculative") 395 hint |= 8; 396 else 397 return parser.emitError(parser.getCurrentLocation()) 398 << hintKeyword << " is not a valid hint"; 399 } while (succeeded(parser.parseOptionalComma())); 400 hintAttr = IntegerAttr::get(parser.getBuilder().getI64Type(), hint); 401 return success(); 402 } 403 404 /// Prints a Synchronization Hint clause 405 static void printSynchronizationHint(OpAsmPrinter &p, Operation *op, 406 IntegerAttr hintAttr) { 407 int64_t hint = hintAttr.getInt(); 408 409 if (hint == 0) 410 return; 411 412 // Helper function to get n-th bit from the right end of `value` 413 auto bitn = [](int value, int n) -> bool { return value & (1 << n); }; 414 415 bool uncontended = bitn(hint, 0); 416 bool contended = bitn(hint, 1); 417 bool nonspeculative = bitn(hint, 2); 418 bool speculative = bitn(hint, 3); 419 420 SmallVector<StringRef> hints; 421 if (uncontended) 422 hints.push_back("uncontended"); 423 if (contended) 424 hints.push_back("contended"); 425 if (nonspeculative) 426 hints.push_back("nonspeculative"); 427 if (speculative) 428 hints.push_back("speculative"); 429 430 llvm::interleaveComma(hints, p); 431 } 432 433 /// Verifies a synchronization hint clause 434 static LogicalResult verifySynchronizationHint(Operation *op, uint64_t hint) { 435 436 // Helper function to get n-th bit from the right end of `value` 437 auto bitn = [](int value, int n) -> bool { return value & (1 << n); }; 438 439 bool uncontended = bitn(hint, 0); 440 bool contended = bitn(hint, 1); 441 bool nonspeculative = bitn(hint, 2); 442 bool speculative = bitn(hint, 3); 443 444 if (uncontended && contended) 445 return op->emitOpError() << "the hints omp_sync_hint_uncontended and " 446 "omp_sync_hint_contended cannot be combined"; 447 if (nonspeculative && speculative) 448 return op->emitOpError() << "the hints omp_sync_hint_nonspeculative and " 449 "omp_sync_hint_speculative cannot be combined."; 450 return success(); 451 } 452 453 //===----------------------------------------------------------------------===// 454 // ParallelOp 455 //===----------------------------------------------------------------------===// 456 457 void ParallelOp::build(OpBuilder &builder, OperationState &state, 458 ArrayRef<NamedAttribute> attributes) { 459 ParallelOp::build( 460 builder, state, /*if_expr_var=*/nullptr, /*num_threads_var=*/nullptr, 461 /*allocate_vars=*/ValueRange(), /*allocators_vars=*/ValueRange(), 462 /*reduction_vars=*/ValueRange(), /*reductions=*/nullptr, 463 /*proc_bind_val=*/nullptr); 464 state.addAttributes(attributes); 465 } 466 467 LogicalResult ParallelOp::verify() { 468 if (allocate_vars().size() != allocators_vars().size()) 469 return emitError( 470 "expected equal sizes for allocate and allocator variables"); 471 return verifyReductionVarList(*this, reductions(), reduction_vars()); 472 } 473 474 //===----------------------------------------------------------------------===// 475 // Verifier for SectionsOp 476 //===----------------------------------------------------------------------===// 477 478 LogicalResult SectionsOp::verify() { 479 if (allocate_vars().size() != allocators_vars().size()) 480 return emitError( 481 "expected equal sizes for allocate and allocator variables"); 482 483 return verifyReductionVarList(*this, reductions(), reduction_vars()); 484 } 485 486 LogicalResult SectionsOp::verifyRegions() { 487 for (auto &inst : *region().begin()) { 488 if (!(isa<SectionOp>(inst) || isa<TerminatorOp>(inst))) { 489 return emitOpError() 490 << "expected omp.section op or terminator op inside region"; 491 } 492 } 493 494 return success(); 495 } 496 497 LogicalResult SingleOp::verify() { 498 // Check for allocate clause restrictions 499 if (allocate_vars().size() != allocators_vars().size()) 500 return emitError( 501 "expected equal sizes for allocate and allocator variables"); 502 503 return success(); 504 } 505 506 //===----------------------------------------------------------------------===// 507 // WsLoopOp 508 //===----------------------------------------------------------------------===// 509 510 /// loop-control ::= `(` ssa-id-list `)` `:` type `=` loop-bounds 511 /// loop-bounds := `(` ssa-id-list `)` to `(` ssa-id-list `)` inclusive? steps 512 /// steps := `step` `(`ssa-id-list`)` 513 ParseResult 514 parseWsLoopControl(OpAsmParser &parser, Region ®ion, 515 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &lowerBound, 516 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &upperBound, 517 SmallVectorImpl<OpAsmParser::UnresolvedOperand> &steps, 518 SmallVectorImpl<Type> &loopVarTypes, UnitAttr &inclusive) { 519 // Parse an opening `(` followed by induction variables followed by `)` 520 SmallVector<OpAsmParser::UnresolvedOperand> ivs; 521 if (parser.parseRegionArgumentList(ivs, /*requiredOperandCount=*/-1, 522 OpAsmParser::Delimiter::Paren)) 523 return failure(); 524 525 size_t numIVs = ivs.size(); 526 Type loopVarType; 527 if (parser.parseColonType(loopVarType)) 528 return failure(); 529 530 // Parse loop bounds. 531 if (parser.parseEqual() || 532 parser.parseOperandList(lowerBound, numIVs, 533 OpAsmParser::Delimiter::Paren)) 534 return failure(); 535 if (parser.parseKeyword("to") || 536 parser.parseOperandList(upperBound, numIVs, 537 OpAsmParser::Delimiter::Paren)) 538 return failure(); 539 540 if (succeeded(parser.parseOptionalKeyword("inclusive"))) { 541 inclusive = UnitAttr::get(parser.getBuilder().getContext()); 542 } 543 544 // Parse step values. 545 if (parser.parseKeyword("step") || 546 parser.parseOperandList(steps, numIVs, OpAsmParser::Delimiter::Paren)) 547 return failure(); 548 549 // Now parse the body. 550 loopVarTypes = SmallVector<Type>(numIVs, loopVarType); 551 SmallVector<OpAsmParser::UnresolvedOperand> blockArgs(ivs); 552 if (parser.parseRegion(region, blockArgs, loopVarTypes)) 553 return failure(); 554 return success(); 555 } 556 557 void printWsLoopControl(OpAsmPrinter &p, Operation *op, Region ®ion, 558 ValueRange lowerBound, ValueRange upperBound, 559 ValueRange steps, TypeRange loopVarTypes, 560 UnitAttr inclusive) { 561 auto args = region.front().getArguments(); 562 p << " (" << args << ") : " << args[0].getType() << " = (" << lowerBound 563 << ") to (" << upperBound << ") "; 564 if (inclusive) 565 p << "inclusive "; 566 p << "step (" << steps << ") "; 567 p.printRegion(region, /*printEntryBlockArgs=*/false); 568 } 569 570 //===----------------------------------------------------------------------===// 571 // SimdLoopOp 572 //===----------------------------------------------------------------------===// 573 /// Parses an OpenMP Simd construct [2.9.3.1] 574 /// 575 /// simdloop ::= `omp.simdloop` loop-control clause-list 576 /// loop-control ::= `(` ssa-id-list `)` `:` type `=` loop-bounds 577 /// loop-bounds := `(` ssa-id-list `)` to `(` ssa-id-list `)` steps 578 /// steps := `step` `(`ssa-id-list`)` 579 /// clause-list ::= clause clause-list | empty 580 /// clause ::= TODO 581 ParseResult SimdLoopOp::parse(OpAsmParser &parser, OperationState &result) { 582 // Parse an opening `(` followed by induction variables followed by `)` 583 SmallVector<OpAsmParser::UnresolvedOperand> ivs; 584 if (parser.parseRegionArgumentList(ivs, /*requiredOperandCount=*/-1, 585 OpAsmParser::Delimiter::Paren)) 586 return failure(); 587 int numIVs = static_cast<int>(ivs.size()); 588 Type loopVarType; 589 if (parser.parseColonType(loopVarType)) 590 return failure(); 591 // Parse loop bounds. 592 SmallVector<OpAsmParser::UnresolvedOperand> lower; 593 if (parser.parseEqual() || 594 parser.parseOperandList(lower, numIVs, OpAsmParser::Delimiter::Paren) || 595 parser.resolveOperands(lower, loopVarType, result.operands)) 596 return failure(); 597 SmallVector<OpAsmParser::UnresolvedOperand> upper; 598 if (parser.parseKeyword("to") || 599 parser.parseOperandList(upper, numIVs, OpAsmParser::Delimiter::Paren) || 600 parser.resolveOperands(upper, loopVarType, result.operands)) 601 return failure(); 602 603 // Parse step values. 604 SmallVector<OpAsmParser::UnresolvedOperand> steps; 605 if (parser.parseKeyword("step") || 606 parser.parseOperandList(steps, numIVs, OpAsmParser::Delimiter::Paren) || 607 parser.resolveOperands(steps, loopVarType, result.operands)) 608 return failure(); 609 610 SmallVector<int> segments{numIVs, numIVs, numIVs}; 611 // TODO: Add parseClauses() when we support clauses 612 result.addAttribute("operand_segment_sizes", 613 parser.getBuilder().getI32VectorAttr(segments)); 614 615 // Now parse the body. 616 Region *body = result.addRegion(); 617 SmallVector<Type> ivTypes(numIVs, loopVarType); 618 SmallVector<OpAsmParser::UnresolvedOperand> blockArgs(ivs); 619 if (parser.parseRegion(*body, blockArgs, ivTypes)) 620 return failure(); 621 return success(); 622 } 623 624 void SimdLoopOp::print(OpAsmPrinter &p) { 625 auto args = getRegion().front().getArguments(); 626 p << " (" << args << ") : " << args[0].getType() << " = (" << lowerBound() 627 << ") to (" << upperBound() << ") "; 628 p << "step (" << step() << ") "; 629 630 p.printRegion(region(), /*printEntryBlockArgs=*/false); 631 } 632 633 //===----------------------------------------------------------------------===// 634 // Verifier for Simd construct [2.9.3.1] 635 //===----------------------------------------------------------------------===// 636 637 LogicalResult SimdLoopOp::verify() { 638 if (this->lowerBound().empty()) { 639 return emitOpError() << "empty lowerbound for simd loop operation"; 640 } 641 return success(); 642 } 643 644 //===----------------------------------------------------------------------===// 645 // ReductionOp 646 //===----------------------------------------------------------------------===// 647 648 static ParseResult parseAtomicReductionRegion(OpAsmParser &parser, 649 Region ®ion) { 650 if (parser.parseOptionalKeyword("atomic")) 651 return success(); 652 return parser.parseRegion(region); 653 } 654 655 static void printAtomicReductionRegion(OpAsmPrinter &printer, 656 ReductionDeclareOp op, Region ®ion) { 657 if (region.empty()) 658 return; 659 printer << "atomic "; 660 printer.printRegion(region); 661 } 662 663 LogicalResult ReductionDeclareOp::verifyRegions() { 664 if (initializerRegion().empty()) 665 return emitOpError() << "expects non-empty initializer region"; 666 Block &initializerEntryBlock = initializerRegion().front(); 667 if (initializerEntryBlock.getNumArguments() != 1 || 668 initializerEntryBlock.getArgument(0).getType() != type()) { 669 return emitOpError() << "expects initializer region with one argument " 670 "of the reduction type"; 671 } 672 673 for (YieldOp yieldOp : initializerRegion().getOps<YieldOp>()) { 674 if (yieldOp.results().size() != 1 || 675 yieldOp.results().getTypes()[0] != type()) 676 return emitOpError() << "expects initializer region to yield a value " 677 "of the reduction type"; 678 } 679 680 if (reductionRegion().empty()) 681 return emitOpError() << "expects non-empty reduction region"; 682 Block &reductionEntryBlock = reductionRegion().front(); 683 if (reductionEntryBlock.getNumArguments() != 2 || 684 reductionEntryBlock.getArgumentTypes()[0] != 685 reductionEntryBlock.getArgumentTypes()[1] || 686 reductionEntryBlock.getArgumentTypes()[0] != type()) 687 return emitOpError() << "expects reduction region with two arguments of " 688 "the reduction type"; 689 for (YieldOp yieldOp : reductionRegion().getOps<YieldOp>()) { 690 if (yieldOp.results().size() != 1 || 691 yieldOp.results().getTypes()[0] != type()) 692 return emitOpError() << "expects reduction region to yield a value " 693 "of the reduction type"; 694 } 695 696 if (atomicReductionRegion().empty()) 697 return success(); 698 699 Block &atomicReductionEntryBlock = atomicReductionRegion().front(); 700 if (atomicReductionEntryBlock.getNumArguments() != 2 || 701 atomicReductionEntryBlock.getArgumentTypes()[0] != 702 atomicReductionEntryBlock.getArgumentTypes()[1]) 703 return emitOpError() << "expects atomic reduction region with two " 704 "arguments of the same type"; 705 auto ptrType = atomicReductionEntryBlock.getArgumentTypes()[0] 706 .dyn_cast<PointerLikeType>(); 707 if (!ptrType || ptrType.getElementType() != type()) 708 return emitOpError() << "expects atomic reduction region arguments to " 709 "be accumulators containing the reduction type"; 710 return success(); 711 } 712 713 LogicalResult ReductionOp::verify() { 714 auto *op = (*this)->getParentWithTrait<ReductionClauseInterface::Trait>(); 715 if (!op) 716 return emitOpError() << "must be used within an operation supporting " 717 "reduction clause interface"; 718 while (op) { 719 for (const auto &var : 720 cast<ReductionClauseInterface>(op).getReductionVars()) 721 if (var == accumulator()) 722 return success(); 723 op = op->getParentWithTrait<ReductionClauseInterface::Trait>(); 724 } 725 return emitOpError() << "the accumulator is not used by the parent"; 726 } 727 728 //===----------------------------------------------------------------------===// 729 // TaskOp 730 //===----------------------------------------------------------------------===// 731 LogicalResult TaskOp::verify() { 732 return verifyReductionVarList(*this, in_reductions(), in_reduction_vars()); 733 } 734 735 //===----------------------------------------------------------------------===// 736 // WsLoopOp 737 //===----------------------------------------------------------------------===// 738 739 void WsLoopOp::build(OpBuilder &builder, OperationState &state, 740 ValueRange lowerBound, ValueRange upperBound, 741 ValueRange step, ArrayRef<NamedAttribute> attributes) { 742 build(builder, state, lowerBound, upperBound, step, 743 /*linear_vars=*/ValueRange(), 744 /*linear_step_vars=*/ValueRange(), /*reduction_vars=*/ValueRange(), 745 /*reductions=*/nullptr, /*schedule_val=*/nullptr, 746 /*schedule_chunk_var=*/nullptr, /*schedule_modifier=*/nullptr, 747 /*simd_modifier=*/false, /*collapse_val=*/nullptr, /*nowait=*/false, 748 /*ordered_val=*/nullptr, /*order_val=*/nullptr, /*inclusive=*/false); 749 state.addAttributes(attributes); 750 } 751 752 LogicalResult WsLoopOp::verify() { 753 return verifyReductionVarList(*this, reductions(), reduction_vars()); 754 } 755 756 //===----------------------------------------------------------------------===// 757 // Verifier for critical construct (2.17.1) 758 //===----------------------------------------------------------------------===// 759 760 LogicalResult CriticalDeclareOp::verify() { 761 return verifySynchronizationHint(*this, hint_val()); 762 } 763 764 LogicalResult CriticalOp::verifySymbolUses(SymbolTableCollection &symbolTable) { 765 if (nameAttr()) { 766 SymbolRefAttr symbolRef = nameAttr(); 767 auto decl = symbolTable.lookupNearestSymbolFrom<CriticalDeclareOp>( 768 *this, symbolRef); 769 if (!decl) { 770 return emitOpError() << "expected symbol reference " << symbolRef 771 << " to point to a critical declaration"; 772 } 773 } 774 775 return success(); 776 } 777 778 //===----------------------------------------------------------------------===// 779 // Verifier for ordered construct 780 //===----------------------------------------------------------------------===// 781 782 LogicalResult OrderedOp::verify() { 783 auto container = (*this)->getParentOfType<WsLoopOp>(); 784 if (!container || !container.ordered_valAttr() || 785 container.ordered_valAttr().getInt() == 0) 786 return emitOpError() << "ordered depend directive must be closely " 787 << "nested inside a worksharing-loop with ordered " 788 << "clause with parameter present"; 789 790 if (container.ordered_valAttr().getInt() != 791 (int64_t)num_loops_val().getValue()) 792 return emitOpError() << "number of variables in depend clause does not " 793 << "match number of iteration variables in the " 794 << "doacross loop"; 795 796 return success(); 797 } 798 799 LogicalResult OrderedRegionOp::verify() { 800 // TODO: The code generation for ordered simd directive is not supported yet. 801 if (simd()) 802 return failure(); 803 804 if (auto container = (*this)->getParentOfType<WsLoopOp>()) { 805 if (!container.ordered_valAttr() || 806 container.ordered_valAttr().getInt() != 0) 807 return emitOpError() << "ordered region must be closely nested inside " 808 << "a worksharing-loop region with an ordered " 809 << "clause without parameter present"; 810 } 811 812 return success(); 813 } 814 815 //===----------------------------------------------------------------------===// 816 // Verifier for AtomicReadOp 817 //===----------------------------------------------------------------------===// 818 819 LogicalResult AtomicReadOp::verify() { 820 if (auto mo = memory_order_val()) { 821 if (*mo == ClauseMemoryOrderKind::Acq_rel || 822 *mo == ClauseMemoryOrderKind::Release) { 823 return emitError( 824 "memory-order must not be acq_rel or release for atomic reads"); 825 } 826 } 827 if (x() == v()) 828 return emitError( 829 "read and write must not be to the same location for atomic reads"); 830 return verifySynchronizationHint(*this, hint_val()); 831 } 832 833 //===----------------------------------------------------------------------===// 834 // Verifier for AtomicWriteOp 835 //===----------------------------------------------------------------------===// 836 837 LogicalResult AtomicWriteOp::verify() { 838 if (auto mo = memory_order_val()) { 839 if (*mo == ClauseMemoryOrderKind::Acq_rel || 840 *mo == ClauseMemoryOrderKind::Acquire) { 841 return emitError( 842 "memory-order must not be acq_rel or acquire for atomic writes"); 843 } 844 } 845 return verifySynchronizationHint(*this, hint_val()); 846 } 847 848 //===----------------------------------------------------------------------===// 849 // Verifier for AtomicUpdateOp 850 //===----------------------------------------------------------------------===// 851 852 LogicalResult AtomicUpdateOp::verify() { 853 if (auto mo = memory_order_val()) { 854 if (*mo == ClauseMemoryOrderKind::Acq_rel || 855 *mo == ClauseMemoryOrderKind::Acquire) { 856 return emitError( 857 "memory-order must not be acq_rel or acquire for atomic updates"); 858 } 859 } 860 861 if (x().getType().cast<PointerLikeType>().getElementType() != 862 region().getArgument(0).getType()) { 863 return emitError("the type of the operand must be a pointer type whose " 864 "element type is the same as that of the region argument"); 865 } 866 867 return success(); 868 } 869 870 LogicalResult AtomicUpdateOp::verifyRegions() { 871 if (region().getNumArguments() != 1) 872 return emitError("the region must accept exactly one argument"); 873 874 if (region().front().getOperations().size() < 2) 875 return emitError() << "the update region must have at least two operations " 876 "(binop and terminator)"; 877 878 YieldOp yieldOp = *region().getOps<YieldOp>().begin(); 879 880 if (yieldOp.results().size() != 1) 881 return emitError("only updated value must be returned"); 882 if (yieldOp.results().front().getType() != region().getArgument(0).getType()) 883 return emitError("input and yielded value must have the same type"); 884 return success(); 885 } 886 887 //===----------------------------------------------------------------------===// 888 // Verifier for AtomicCaptureOp 889 //===----------------------------------------------------------------------===// 890 891 Operation *AtomicCaptureOp::getFirstOp() { 892 return &getRegion().front().getOperations().front(); 893 } 894 895 Operation *AtomicCaptureOp::getSecondOp() { 896 auto &ops = getRegion().front().getOperations(); 897 return ops.getNextNode(ops.front()); 898 } 899 900 AtomicReadOp AtomicCaptureOp::getAtomicReadOp() { 901 if (auto op = dyn_cast<AtomicReadOp>(getFirstOp())) 902 return op; 903 return dyn_cast<AtomicReadOp>(getSecondOp()); 904 } 905 906 AtomicWriteOp AtomicCaptureOp::getAtomicWriteOp() { 907 if (auto op = dyn_cast<AtomicWriteOp>(getFirstOp())) 908 return op; 909 return dyn_cast<AtomicWriteOp>(getSecondOp()); 910 } 911 912 AtomicUpdateOp AtomicCaptureOp::getAtomicUpdateOp() { 913 if (auto op = dyn_cast<AtomicUpdateOp>(getFirstOp())) 914 return op; 915 return dyn_cast<AtomicUpdateOp>(getSecondOp()); 916 } 917 918 LogicalResult AtomicCaptureOp::verifyRegions() { 919 Block::OpListType &ops = region().front().getOperations(); 920 if (ops.size() != 3) 921 return emitError() 922 << "expected three operations in omp.atomic.capture region (one " 923 "terminator, and two atomic ops)"; 924 auto &firstOp = ops.front(); 925 auto &secondOp = *ops.getNextNode(firstOp); 926 auto firstReadStmt = dyn_cast<AtomicReadOp>(firstOp); 927 auto firstUpdateStmt = dyn_cast<AtomicUpdateOp>(firstOp); 928 auto secondReadStmt = dyn_cast<AtomicReadOp>(secondOp); 929 auto secondUpdateStmt = dyn_cast<AtomicUpdateOp>(secondOp); 930 auto secondWriteStmt = dyn_cast<AtomicWriteOp>(secondOp); 931 932 if (!((firstUpdateStmt && secondReadStmt) || 933 (firstReadStmt && secondUpdateStmt) || 934 (firstReadStmt && secondWriteStmt))) 935 return ops.front().emitError() 936 << "invalid sequence of operations in the capture region"; 937 if (firstUpdateStmt && secondReadStmt && 938 firstUpdateStmt.x() != secondReadStmt.x()) 939 return firstUpdateStmt.emitError() 940 << "updated variable in omp.atomic.update must be captured in " 941 "second operation"; 942 if (firstReadStmt && secondUpdateStmt && 943 firstReadStmt.x() != secondUpdateStmt.x()) 944 return firstReadStmt.emitError() 945 << "captured variable in omp.atomic.read must be updated in second " 946 "operation"; 947 if (firstReadStmt && secondWriteStmt && 948 firstReadStmt.x() != secondWriteStmt.address()) 949 return firstReadStmt.emitError() 950 << "captured variable in omp.atomic.read must be updated in " 951 "second operation"; 952 return success(); 953 } 954 955 #define GET_ATTRDEF_CLASSES 956 #include "mlir/Dialect/OpenMP/OpenMPOpsAttributes.cpp.inc" 957 958 #define GET_OP_CLASSES 959 #include "mlir/Dialect/OpenMP/OpenMPOps.cpp.inc" 960