1 //===- Utils.cpp - Utilities to support the Linalg dialect ----------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements utilities for the Linalg dialect. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "mlir/Dialect/Linalg/Utils/Utils.h" 14 15 #include "mlir/Analysis/SliceAnalysis.h" 16 #include "mlir/Dialect/Affine/Analysis/AffineStructures.h" 17 #include "mlir/Dialect/Affine/IR/AffineOps.h" 18 #include "mlir/Dialect/Affine/IR/AffineValueMap.h" 19 #include "mlir/Dialect/Affine/LoopUtils.h" 20 #include "mlir/Dialect/Arithmetic/IR/Arithmetic.h" 21 #include "mlir/Dialect/Arithmetic/Utils/Utils.h" 22 #include "mlir/Dialect/Linalg/IR/Linalg.h" 23 #include "mlir/Dialect/MemRef/IR/MemRef.h" 24 #include "mlir/Dialect/SCF/SCF.h" 25 #include "mlir/Dialect/Tensor/IR/Tensor.h" 26 #include "mlir/Dialect/Tensor/Utils/Utils.h" 27 #include "mlir/Dialect/Utils/StaticValueUtils.h" 28 #include "mlir/IR/AffineExpr.h" 29 #include "mlir/IR/AffineExprVisitor.h" 30 #include "mlir/IR/AffineMap.h" 31 #include "mlir/IR/Matchers.h" 32 #include "mlir/IR/OpImplementation.h" 33 #include "mlir/Pass/Pass.h" 34 #include "llvm/ADT/TypeSwitch.h" 35 #include "llvm/Support/Debug.h" 36 37 #define DEBUG_TYPE "linalg-utils" 38 39 using namespace mlir; 40 using namespace presburger; 41 using namespace mlir::linalg; 42 using namespace mlir::scf; 43 44 static bool isZero(Value v) { 45 if (auto cst = v.getDefiningOp<arith::ConstantIndexOp>()) 46 return cst.value() == 0; 47 return false; 48 } 49 50 namespace { 51 52 // Helper visitor to determine whether an AffineExpr is tiled. 53 // This is achieved by traversing every AffineDimExpr with position `pos` and 54 // checking whether the corresponding `tileSizes[pos]` is non-zero. 55 // This also enforces only positive coefficients occur in multiplications. 56 // 57 // Example: 58 // `d0 + 2 * d1 + d3` is tiled by [0, 0, 0, 2] but not by [0, 0, 2, 0] 59 // 60 struct TileCheck : public AffineExprVisitor<TileCheck> { 61 TileCheck(ValueRange tileSizes) : tileSizes(tileSizes) {} 62 63 void visitDimExpr(AffineDimExpr expr) { 64 isTiled |= !isZero(tileSizes[expr.getPosition()]); 65 } 66 void visitAffineBinaryOpExpr(AffineBinaryOpExpr expr) { 67 visit(expr.getLHS()); 68 visit(expr.getRHS()); 69 if (expr.getKind() == mlir::AffineExprKind::Mul) 70 assert(expr.getRHS().cast<AffineConstantExpr>().getValue() > 0 && 71 "nonpositive multiplying coefficient"); 72 } 73 bool isTiled = false; 74 ValueRange tileSizes; 75 }; 76 77 } // namespace 78 79 static bool isTiled(AffineExpr expr, ValueRange tileSizes) { 80 if (!expr) 81 return false; 82 TileCheck t(tileSizes); 83 t.visit(expr); 84 return t.isTiled; 85 } 86 87 // Checks whether the `map varies with respect to a non-zero `tileSize`. 88 static bool isTiled(AffineMap map, ValueRange tileSizes) { 89 if (!map) 90 return false; 91 for (unsigned r = 0; r < map.getNumResults(); ++r) 92 if (isTiled(map.getResult(r), tileSizes)) 93 return true; 94 return false; 95 } 96 97 Optional<RegionMatcher::BinaryOpKind> 98 RegionMatcher::matchAsScalarBinaryOp(GenericOp op) { 99 auto ®ion = op.region(); 100 if (!llvm::hasSingleElement(region)) 101 return llvm::None; 102 103 Block &block = region.front(); 104 if (block.getNumArguments() != 2 || 105 !block.getArgument(0).getType().isSignlessIntOrFloat() || 106 !block.getArgument(1).getType().isSignlessIntOrFloat()) 107 return llvm::None; 108 109 auto &ops = block.getOperations(); 110 if (!llvm::hasSingleElement(block.without_terminator())) 111 return llvm::None; 112 113 using mlir::matchers::m_Val; 114 auto a = m_Val(block.getArgument(0)); 115 auto b = m_Val(block.getArgument(1)); 116 117 auto addPattern = m_Op<linalg::YieldOp>(m_Op<arith::AddIOp>(a, b)); 118 if (addPattern.match(&ops.back())) 119 return BinaryOpKind::IAdd; 120 121 return llvm::None; 122 } 123 124 /// Explicit instantiation of loop nest generator for different loop types. 125 template struct mlir::linalg::GenerateLoopNest<scf::ForOp>; 126 template struct mlir::linalg::GenerateLoopNest<scf::ParallelOp>; 127 template struct mlir::linalg::GenerateLoopNest<AffineForOp>; 128 129 /// Given a list of subview ranges, extract individual values for lower, upper 130 /// bounds and steps and put them into the corresponding vectors. 131 static void unpackRanges(ArrayRef<Range> ranges, SmallVectorImpl<Value> &lbs, 132 SmallVectorImpl<Value> &ubs, 133 SmallVectorImpl<Value> &steps) { 134 for (Range range : ranges) { 135 lbs.emplace_back(range.offset); 136 ubs.emplace_back(range.size); 137 steps.emplace_back(range.stride); 138 } 139 } 140 141 namespace mlir { 142 namespace linalg { 143 144 bool isPermutation(ArrayRef<int64_t> permutation) { 145 // Count the number of appearances for all indices. 146 SmallVector<int64_t> indexCounts(permutation.size(), 0); 147 for (auto index : permutation) { 148 // Exit if the index is out-of-range. 149 if (index < 0 || index >= static_cast<int64_t>(permutation.size())) 150 return false; 151 indexCounts[index]++; 152 } 153 // Return true if all indices appear once. 154 return count(indexCounts, 1) == static_cast<int64_t>(permutation.size()); 155 } 156 157 /// Helper function that creates a memref::DimOp or tensor::DimOp depending on 158 /// the type of `source`. 159 Value createOrFoldDimOp(OpBuilder &b, Location loc, Value source, int64_t dim) { 160 if (source.getType().isa<UnrankedMemRefType, MemRefType>()) 161 return b.createOrFold<memref::DimOp>(loc, source, dim); 162 if (source.getType().isa<UnrankedTensorType, RankedTensorType>()) 163 return b.createOrFold<tensor::DimOp>(loc, source, dim); 164 llvm_unreachable("Expected MemRefType or TensorType"); 165 } 166 167 /// Given an operation, retrieves the value of each dynamic dimension through 168 /// constructing the necessary DimOp operators. 169 SmallVector<Value, 4> getDynOperands(Location loc, Value val, OpBuilder &b) { 170 SmallVector<Value, 4> dynOperands; 171 auto shapedType = val.getType().cast<ShapedType>(); 172 for (const auto &dim : llvm::enumerate(shapedType.getShape())) { 173 if (dim.value() == ShapedType::kDynamicSize) 174 dynOperands.push_back(createOrFoldDimOp(b, loc, val, dim.index())); 175 } 176 return dynOperands; 177 } 178 179 void getUpperBoundForIndex(Value value, AffineMap &boundMap, 180 SmallVectorImpl<Value> &boundOperands, 181 bool constantRequired) { 182 // Initialize `boundMap` and `boundOperands` to the identity returning 183 // `value`. This combination is the default result of the method if no 184 // simplification is possible. 185 assert(value.getType().isIndex() && "expect value to have index type"); 186 boundMap = AffineMap::getMultiDimIdentityMap(1, value.getContext()); 187 boundOperands.assign({value}); 188 canonicalizeMapAndOperands(&boundMap, &boundOperands); 189 190 // Continue only if there is an affine index computation to simplify. 191 Operation *definingOp = value.getDefiningOp(); 192 if (!definingOp || !isa<AffineApplyOp, AffineMinOp>(definingOp)) 193 return; 194 195 // Get the backward slice containing the affine index computation. 196 SetVector<Operation *> backwardSlice; 197 getBackwardSlice(definingOp, &backwardSlice, [](Operation *op) { 198 return isa<AffineApplyOp, AffineMinOp>(op); 199 }); 200 backwardSlice.insert(definingOp); 201 202 // Setup a system of affine constraints that describe the index computation. 203 FlatAffineValueConstraints constraints; 204 205 // Helper to find or create an identifier for the given value. 206 auto findOrCreateId = [&](Value value) { 207 if (!constraints.containsId(value)) { 208 constraints.appendDimId(value); 209 return true; 210 } 211 unsigned pos; 212 constraints.findId(value, &pos); 213 return pos < constraints.getNumDimIds(); 214 }; 215 // Helper to get the position for the given value. 216 auto getPosition = [&](Value value) { 217 unsigned pos; 218 bool exists = constraints.findId(value, &pos); 219 (void)exists; 220 assert(exists && "expect to find the identifier"); 221 return pos; 222 }; 223 224 // Add the affine operations in `backwardSlice` to the constraints. 225 for (Operation *op : llvm::reverse(backwardSlice)) { 226 // Add an identifier for all op results and operands. 227 if (!(llvm::all_of(op->getResults(), findOrCreateId) && 228 llvm::all_of(op->getOperands(), findOrCreateId))) 229 return; 230 231 // Add AffineApplyOps to the constraints. 232 if (auto applyOp = dyn_cast<AffineApplyOp>(op)) { 233 AffineMap map = constraints.computeAlignedMap(applyOp.getAffineMap(), 234 applyOp.getOperands()); 235 if (failed(constraints.addBound(IntegerPolyhedron::EQ, 236 getPosition(applyOp.getResult()), map))) 237 return; 238 continue; 239 } 240 // Add AffineMinOps to the constraints. 241 auto minOp = cast<AffineMinOp>(op); 242 AffineMap map = constraints.computeAlignedMap(minOp.getAffineMap(), 243 minOp.getOperands()); 244 if (failed(constraints.addBound(IntegerPolyhedron::UB, 245 getPosition(minOp.getResult()), map, 246 /*isClosedBound=*/true))) 247 return; 248 } 249 250 // Obtain an upper bound for the affine index computation by projecting out 251 // all temporary results and expressing the upper bound for `value` in terms 252 // of the terminals of the index computation. 253 unsigned pos = getPosition(value); 254 if (constantRequired) { 255 auto ubConst = constraints.getConstantBound( 256 FlatAffineValueConstraints::BoundType::UB, pos); 257 if (!ubConst.hasValue()) 258 return; 259 260 boundMap = 261 AffineMap::getConstantMap(ubConst.getValue(), value.getContext()); 262 return; 263 } 264 265 SmallVector<AffineMap> lowerBounds(1), upperBounds(1); 266 constraints.getSliceBounds(pos, 1, value.getContext(), &lowerBounds, 267 &upperBounds, 268 /*getClosedUB=*/true); 269 // Verify `upperBounds[0]` is valid and has at least one result. 270 if (!upperBounds[0] || upperBounds[0].getNumResults() == 0) 271 return; 272 273 // Set `boundMap` and `boundOperands` to the computed upper bound. 274 boundMap = upperBounds[0]; 275 constraints.getAllValues(&boundOperands); 276 erase_value(boundOperands, value); 277 canonicalizeMapAndOperands(&boundMap, &boundOperands); 278 } 279 280 FailureOr<int64_t> getConstantUpperBoundForIndex(Value value) { 281 // Compute an upper bound for `value`. 282 AffineMap boundMap; 283 SmallVector<Value> boundOperands; 284 getUpperBoundForIndex(value, boundMap, boundOperands, 285 /*constantRequired=*/true); 286 287 // Search the results of `boundMap` for constant upper bounds. 288 SmallVector<int64_t> constantBounds; 289 for (AffineExpr result : boundMap.getResults()) 290 if (auto constExpr = result.dyn_cast<AffineConstantExpr>()) 291 constantBounds.push_back(constExpr.getValue()); 292 293 // Return the minimal upper bound or failure if none is found. 294 if (constantBounds.empty()) 295 return failure(); 296 return *std::min_element(constantBounds.begin(), constantBounds.end()); 297 } 298 299 tensor::ExtractSliceOp makeComposedExtractSliceOp( 300 OpBuilder &b, Location loc, Value source, ArrayRef<OpFoldResult> offsets, 301 ArrayRef<OpFoldResult> sizes, ArrayRef<OpFoldResult> strides) { 302 assert(source && "expect source to be nonzero"); 303 304 // Do not fold if the producer is not an ExtractSliceOp. 305 auto producerOp = source.getDefiningOp<tensor::ExtractSliceOp>(); 306 if (!producerOp) 307 return b.create<tensor::ExtractSliceOp>(loc, source, offsets, sizes, 308 strides); 309 310 // Do not fold if the producer is rank reducing or if there are any non-unit 311 // strides. Supporting non-unit strides complicates the offset computation 312 // since the consumer offsets need to be multiplied by the producer strides. 313 // TODO: support non-unit strides once there are use cases. 314 SmallVector<OpFoldResult> allStrides = producerOp.getMixedStrides(); 315 allStrides.append(strides.begin(), strides.end()); 316 bool hasNonUnitStride = any_of(allStrides, [](OpFoldResult ofr) { 317 return getConstantIntValue(ofr) != static_cast<int64_t>(1); 318 }); 319 if (hasNonUnitStride || 320 producerOp.getSourceType().getRank() != 321 producerOp.getResult().getType().cast<ShapedType>().getRank()) 322 return b.create<tensor::ExtractSliceOp>(loc, source, offsets, sizes, 323 strides); 324 325 // Fold the producer by adding the offests and extracting the slice directly 326 // from the producer source tensor. 327 SmallVector<OpFoldResult> foldedOffsets(offsets.begin(), offsets.end()); 328 AffineExpr dim1, dim2; 329 bindDims(b.getContext(), dim1, dim2); 330 for (const auto &en : enumerate(producerOp.getMixedOffsets())) { 331 SmallVector<Value> offsetValues = { 332 getValueOrCreateConstantIndexOp(b, loc, foldedOffsets[en.index()]), 333 getValueOrCreateConstantIndexOp(b, loc, en.value())}; 334 foldedOffsets[en.index()] = 335 makeComposedAffineApply(b, loc, dim1 + dim2, offsetValues).getResult(); 336 } 337 return b.create<tensor::ExtractSliceOp>(loc, producerOp.source(), 338 foldedOffsets, sizes, strides); 339 } 340 341 Value makeComposedPadHighOp(OpBuilder &b, Location loc, RankedTensorType type, 342 Value source, Value pad, bool nofold) { 343 // Exit if `source` is not defined by an ExtractSliceOp. 344 auto sliceOp = source.getDefiningOp<tensor::ExtractSliceOp>(); 345 if (!sliceOp) 346 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 347 348 // Search the `source` use-def chain for padded LinalgOps. 349 Value current = sliceOp.source(); 350 while (current) { 351 auto linalgOp = current.getDefiningOp<LinalgOp>(); 352 if (!linalgOp) 353 break; 354 OpResult opResult = current.cast<OpResult>(); 355 current = linalgOp.getOutputOperand(opResult.getResultNumber())->get(); 356 } 357 auto padOp = current ? current.getDefiningOp<tensor::PadOp>() : nullptr; 358 359 // Exit if the search fails to match a tensor::PadOp at the end of the matched 360 // LinalgOp sequence. 361 if (!padOp) 362 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 363 364 // Exit if the padded result type does not match. 365 if (sliceOp.source().getType() != type) 366 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 367 368 // Exit if the LinalgOps are not high padded. 369 if (llvm::any_of(padOp.getMixedLowPad(), [](OpFoldResult ofr) { 370 return getConstantIntValue(ofr) != static_cast<int64_t>(0); 371 })) 372 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 373 374 // Exit if `padOpSliceOp`, which defines the slice used by 375 // `padOp`, is rank-reducing. 376 auto padOpSliceOp = padOp.source().getDefiningOp<tensor::ExtractSliceOp>(); 377 if (!padOpSliceOp || 378 sliceOp.getMixedSizes().size() != padOpSliceOp.getMixedSizes().size()) 379 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 380 381 // Exit if the sizes of the dynamic sizes of `sliceOp` do not match the size 382 // of the slice padded by `padOp`. 383 if (llvm::any_of( 384 llvm::zip(sliceOp.getMixedSizes(), padOpSliceOp.getMixedSizes()), 385 [](std::tuple<OpFoldResult, OpFoldResult> it) { 386 return !isEqualConstantIntOrValue(std::get<0>(it), std::get<1>(it)); 387 })) 388 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 389 390 // Exit if the padding values do not match. 391 Attribute padOpPadAttr, padAttr; 392 Value padOpPad = padOp.getConstantPaddingValue(); 393 if (!padOpPad || !matchPattern(padOpPad, m_Constant(&padOpPadAttr)) || 394 !matchPattern(pad, m_Constant(&padAttr)) || padOpPadAttr != padAttr) 395 return tensor::createPadHighOp(type, source, pad, nofold, loc, b); 396 397 // Return the padded result if the padding values and sizes match. 398 return sliceOp.source(); 399 } 400 401 GenericOp makeTransposeOp(OpBuilder &b, Location loc, Value inputTensor, 402 Value outputTensor, 403 ArrayRef<int64_t> transposeVector) { 404 auto resultTensorType = outputTensor.getType().cast<RankedTensorType>(); 405 Type elementType = resultTensorType.getElementType(); 406 407 assert(isPermutation(transposeVector) && 408 "expect transpose vector to be a permutation"); 409 assert(transposeVector.size() == 410 static_cast<size_t>(resultTensorType.getRank()) && 411 "expect transpose vector size to match result tensor rank"); 412 413 // Compute the transpose and the indentity indexing maps. 414 SmallVector<AffineMap> indexingMaps = { 415 inversePermutation(AffineMap::getPermutationMap( 416 SmallVector<unsigned>(transposeVector.begin(), transposeVector.end()), 417 b.getContext())), 418 AffineMap::getMultiDimIdentityMap(transposeVector.size(), 419 b.getContext())}; 420 SmallVector<llvm::StringRef> iteratorTypes(transposeVector.size(), 421 getParallelIteratorTypeName()); 422 423 // Create a GenericOp to transpose `inputTensor` into `outputTensor`. 424 auto transposeOp = b.create<GenericOp>( 425 loc, resultTensorType, inputTensor, outputTensor, 426 b.getAffineMapArrayAttr(indexingMaps), b.getStrArrayAttr(iteratorTypes), 427 /*doc=*/nullptr, 428 /*library_call=*/nullptr); 429 Region &body = transposeOp.getRegion(); 430 body.push_back(new Block()); 431 body.front().addArguments({elementType, elementType}, {loc, loc}); 432 433 // Create the body of the transpose operation. 434 OpBuilder::InsertionGuard g(b); 435 b.setInsertionPointToEnd(&body.front()); 436 b.create<YieldOp>(loc, transposeOp.getRegion().front().getArgument(0)); 437 return transposeOp; 438 } 439 440 GenericOp makeMemRefCopyOp(OpBuilder &b, Location loc, Value from, Value to) { 441 auto memrefTypeTo = to.getType().cast<MemRefType>(); 442 #ifndef NDEBUG 443 auto memrefTypeFrom = from.getType().cast<MemRefType>(); 444 assert(memrefTypeFrom.getRank() == memrefTypeTo.getRank() && 445 "`from` and `to` memref must have the same rank"); 446 #endif // NDEBUG 447 448 AffineMap id = 449 AffineMap::getMultiDimIdentityMap(memrefTypeTo.getRank(), b.getContext()); 450 SmallVector<StringRef> iteratorTypes(memrefTypeTo.getRank(), 451 getParallelIteratorTypeName()); 452 return b.create<linalg::GenericOp>( 453 loc, 454 /*inputs=*/from, 455 /*outputs=*/to, 456 /*indexingMaps=*/llvm::makeArrayRef({id, id}), 457 /*iteratorTypes=*/iteratorTypes, 458 [](OpBuilder &b, Location loc, ValueRange args) { 459 b.create<linalg::YieldOp>(loc, args.front()); 460 }); 461 } 462 463 /// Specialization to build an scf "for" nest. 464 template <> 465 void GenerateLoopNest<scf::ForOp>::doit( 466 OpBuilder &b, Location loc, ArrayRef<Range> loopRanges, LinalgOp linalgOp, 467 ArrayRef<Attribute> iteratorTypes, 468 function_ref<scf::ValueVector(OpBuilder &, Location, ValueRange, 469 ValueRange)> 470 bodyBuilderFn, 471 Optional<LinalgLoopDistributionOptions> distributionOptions, 472 ArrayRef<StringRef> distributionTypes) { 473 SmallVector<Value> iterArgInitValues = linalgOp.getOutputTensorOperands(); 474 // Create procInfo so it dominates loops, if appropriate. 475 SmallVector<ProcInfo, 4> procInfo; 476 SmallVector<DistributionMethod, 0> distributionMethod; 477 if (distributionOptions.hasValue()) { 478 // Collect loop ranges for parallel dimensions. 479 SmallVector<Range, 2> parallelLoopRanges; 480 for (const auto &iteratorType : enumerate(iteratorTypes)) 481 if (isParallelIterator(iteratorType.value())) 482 parallelLoopRanges.push_back(loopRanges[iteratorType.index()]); 483 484 // Get their distribution schemes. 485 distributionMethod = distributionOptions->distributionMethod; 486 if (distributionMethod.size() < parallelLoopRanges.size()) 487 parallelLoopRanges.resize(distributionMethod.size()); 488 procInfo = distributionOptions->procInfo(b, loc, parallelLoopRanges); 489 } 490 491 SmallVector<Value, 4> lbs, ubs, steps; 492 unpackRanges(loopRanges, lbs, ubs, steps); 493 LoopNest loopNest = mlir::scf::buildLoopNest( 494 b, loc, lbs, ubs, steps, iterArgInitValues, 495 [&](OpBuilder &b, Location loc, ValueRange ivs, ValueRange iterArgs) { 496 assert(iterArgs.size() == linalgOp.getOutputTensorOperands().size() && 497 "expect the number of output tensors and iter args to match"); 498 SmallVector<Value> operandValuesToUse = 499 linalgOp.getInputAndOutputOperands(); 500 if (!iterArgs.empty()) { 501 operandValuesToUse = linalgOp.getInputOperands(); 502 operandValuesToUse.append(iterArgs.begin(), iterArgs.end()); 503 } 504 return bodyBuilderFn(b, loc, ivs, operandValuesToUse); 505 }); 506 507 if (!distributionOptions || loopNest.loops.empty()) 508 return; 509 510 // Filter out scf.for loops that were created out of parallel dimensions. 511 SmallVector<scf::ForOp, 4> loops; 512 for (const auto &iteratorType : enumerate(iteratorTypes)) 513 if (isParallelIterator(iteratorType.value())) 514 loops.push_back(loopNest.loops[iteratorType.index()]); 515 516 // Distribute - only supports cyclic distribution for now. 517 for (auto it : llvm::zip(loops, procInfo, distributionMethod)) 518 if (std::get<2>(it) == DistributionMethod::Cyclic) 519 mapLoopToProcessorIds(std::get<0>(it), std::get<1>(it).procId, 520 std::get<1>(it).nprocs); 521 } 522 523 /// Specialization to build affine "for" nest. 524 template <> 525 void GenerateLoopNest<AffineForOp>::doit( 526 OpBuilder &b, Location loc, ArrayRef<Range> loopRanges, LinalgOp linalgOp, 527 ArrayRef<Attribute> iteratorTypes, 528 function_ref<scf::ValueVector(OpBuilder &, Location, ValueRange, 529 ValueRange)> 530 bodyBuilderFn, 531 Optional<LinalgLoopDistributionOptions>, ArrayRef<StringRef>) { 532 SmallVector<Value> iterArgInitValues = linalgOp.getOutputTensorOperands(); 533 assert(iterArgInitValues.empty() && "unexpected AffineForOp init values"); 534 SmallVector<Value, 4> lbs, ubs, steps; 535 unpackRanges(loopRanges, lbs, ubs, steps); 536 537 // Affine loops require constant steps. 538 SmallVector<int64_t, 4> constantSteps; 539 constantSteps.reserve(steps.size()); 540 for (Value v : steps) { 541 auto op = v.getDefiningOp<arith::ConstantIndexOp>(); 542 assert(op && "Affine loops require constant steps"); 543 constantSteps.push_back(op.value()); 544 } 545 546 mlir::buildAffineLoopNest(b, loc, lbs, ubs, constantSteps, 547 [&](OpBuilder &b, Location loc, ValueRange ivs) { 548 SmallVector<Value> operandValuesToUse = 549 linalgOp.getInputAndOutputOperands(); 550 bodyBuilderFn(b, loc, ivs, operandValuesToUse); 551 }); 552 } 553 554 /// Update the `lb`, `ub` and `step` to get per processor `lb`, `ub` and `step`. 555 void updateBoundsForCyclicDistribution(OpBuilder &b, Location loc, Value procId, 556 Value nprocs, Value &lb, Value &ub, 557 Value &step) { 558 AffineExpr d0, d1; 559 bindDims(b.getContext(), d0, d1); 560 AffineExpr s0 = getAffineSymbolExpr(0, b.getContext()); 561 lb = makeComposedAffineApply(b, loc, d0 + d1 * s0, {lb, procId, step}); 562 step = makeComposedAffineApply(b, loc, d0 * s0, {nprocs, step}); 563 } 564 565 /// Generates a loop nest consisting of scf.parallel and scf.for, depending 566 /// on the `iteratorTypes.` Consecutive parallel loops create a single 567 /// scf.parallel operation; each sequential loop creates a new scf.for 568 /// operation. The body of the innermost loop is populated by 569 /// `bodyBuilderFn` that accepts a range of induction variables for all 570 /// loops. `ivStorage` is used to store the partial list of induction 571 /// variables. 572 // TODO: this function can be made iterative instead. However, it 573 // will have at most as many recursive calls as nested loops, which rarely 574 // exceeds 10. 575 static void generateParallelLoopNest( 576 OpBuilder &b, Location loc, ValueRange lbs, ValueRange ubs, 577 ValueRange steps, ArrayRef<Attribute> iteratorTypes, 578 function_ref<void(OpBuilder &, Location, ValueRange)> bodyBuilderFn, 579 SmallVectorImpl<Value> &ivStorage, 580 ArrayRef<DistributionMethod> distributionMethod = {}) { 581 assert(lbs.size() == ubs.size()); 582 assert(lbs.size() == steps.size()); 583 assert(lbs.size() == iteratorTypes.size()); 584 585 // If there are no (more) loops to be generated, generate the body and be 586 // done with it. 587 if (iteratorTypes.empty()) { 588 bodyBuilderFn(b, loc, ivStorage); 589 return; 590 } 591 592 // Find the outermost parallel loops and drop their types from the list. 593 unsigned nLoops = iteratorTypes.size(); 594 unsigned nOuterPar = 595 nLoops - iteratorTypes.drop_while(isParallelIterator).size(); 596 597 // If there are no outer parallel loops, generate one sequential loop and 598 // recurse. Note that we wouldn't have dropped anything from `iteratorTypes` 599 // in this case. 600 if (nOuterPar == 0) { 601 LoopNest singleLoop = buildLoopNest( 602 b, loc, lbs.take_front(), ubs.take_front(), steps.take_front(), 603 [&](OpBuilder &b, Location loc, ValueRange ivs) { 604 ivStorage.append(ivs.begin(), ivs.end()); 605 generateParallelLoopNest(b, loc, lbs.drop_front(), ubs.drop_front(), 606 steps.drop_front(), 607 iteratorTypes.drop_front(), bodyBuilderFn, 608 ivStorage, distributionMethod); 609 }); 610 return; 611 } 612 if (distributionMethod.empty()) { 613 // Generate a single parallel loop-nest operation for all outermost 614 // parallel loops and recurse. 615 b.create<scf::ParallelOp>( 616 loc, lbs.take_front(nOuterPar), ubs.take_front(nOuterPar), 617 steps.take_front(nOuterPar), 618 [&](OpBuilder &nestedBuilder, Location nestedLoc, ValueRange localIvs) { 619 ivStorage.append(localIvs.begin(), localIvs.end()); 620 generateParallelLoopNest( 621 nestedBuilder, nestedLoc, lbs.drop_front(nOuterPar), 622 ubs.drop_front(nOuterPar), steps.drop_front(nOuterPar), 623 iteratorTypes.drop_front(nOuterPar), bodyBuilderFn, ivStorage, 624 (distributionMethod.size() < nOuterPar) 625 ? ArrayRef<DistributionMethod>() 626 : distributionMethod.drop_front(nOuterPar)); 627 }); 628 return; 629 } 630 631 // Process all consecutive similarly distributed loops simultaneously. 632 DistributionMethod methodToUse = distributionMethod[0]; 633 unsigned numProcessed = 1; 634 for (unsigned i = 1; i < nOuterPar && i < distributionMethod.size(); ++i) { 635 if (distributionMethod[i] != methodToUse) 636 break; 637 numProcessed++; 638 } 639 640 switch (methodToUse) { 641 case DistributionMethod::Cyclic: { 642 // Generate a single parallel loop-nest operation for all outermost 643 // parallel loops and recurse. 644 b.create<scf::ParallelOp>( 645 loc, lbs.take_front(numProcessed), ubs.take_front(numProcessed), 646 steps.take_front(numProcessed), 647 [&](OpBuilder &nestedBuilder, Location nestedLoc, ValueRange localIvs) { 648 ivStorage.append(localIvs.begin(), localIvs.end()); 649 generateParallelLoopNest( 650 nestedBuilder, nestedLoc, lbs.drop_front(numProcessed), 651 ubs.drop_front(numProcessed), steps.drop_front(numProcessed), 652 iteratorTypes.drop_front(numProcessed), bodyBuilderFn, ivStorage, 653 (distributionMethod.size() < numProcessed) 654 ? ArrayRef<DistributionMethod>() 655 : distributionMethod.drop_front(numProcessed)); 656 }); 657 return; 658 } 659 case DistributionMethod::CyclicNumProcsGeNumIters: { 660 // Check (for the processed loops) that the iteration is in-bounds. 661 ArithBuilder ab(b, loc); 662 Value cond = ab.slt(lbs[0], ubs[0]); 663 for (unsigned i = 1; i < numProcessed; ++i) 664 cond = ab._and(cond, ab.slt(lbs[i], ubs[i])); 665 ivStorage.append(lbs.begin(), std::next(lbs.begin(), numProcessed)); 666 b.create<scf::IfOp>(loc, cond, [&](OpBuilder &b, Location loc) { 667 generateParallelLoopNest( 668 b, loc, lbs.drop_front(numProcessed), ubs.drop_front(numProcessed), 669 steps.drop_front(numProcessed), 670 iteratorTypes.drop_front(numProcessed), bodyBuilderFn, ivStorage, 671 distributionMethod.drop_front(numProcessed)); 672 b.create<scf::YieldOp>(loc, ValueRange{}); 673 }); 674 return; 675 } 676 case DistributionMethod::CyclicNumProcsEqNumIters: 677 // No check/loops needed here. Set the `%iv` to be the `%lb` and proceed 678 // with inner loop generation. 679 ivStorage.append(lbs.begin(), std::next(lbs.begin(), numProcessed)); 680 generateParallelLoopNest( 681 b, loc, lbs.drop_front(numProcessed), ubs.drop_front(numProcessed), 682 steps.drop_front(numProcessed), iteratorTypes.drop_front(numProcessed), 683 bodyBuilderFn, ivStorage, distributionMethod.drop_front(numProcessed)); 684 return; 685 } 686 } 687 688 /// Specialization for generating a mix of parallel and sequential scf loops. 689 template <> 690 void GenerateLoopNest<scf::ParallelOp>::doit( 691 OpBuilder &b, Location loc, ArrayRef<Range> loopRanges, LinalgOp linalgOp, 692 ArrayRef<Attribute> iteratorTypes, 693 function_ref<scf::ValueVector(OpBuilder &, Location, ValueRange, 694 ValueRange)> 695 bodyBuilderFn, 696 Optional<LinalgLoopDistributionOptions> distributionOptions, 697 ArrayRef<StringRef> distributionTypes) { 698 SmallVector<Value> iterArgInitValues = linalgOp.getOutputTensorOperands(); 699 assert(iterArgInitValues.empty() && "unexpected ParallelOp init values"); 700 // This function may be passed more iterator types than ranges. 701 assert(iteratorTypes.size() >= loopRanges.size() && 702 "expected iterator type for all ranges"); 703 iteratorTypes = iteratorTypes.take_front(loopRanges.size()); 704 SmallVector<Value, 8> lbsStorage, ubsStorage, stepsStorage, ivs; 705 unsigned numLoops = iteratorTypes.size(); 706 ivs.reserve(numLoops); 707 lbsStorage.reserve(numLoops); 708 ubsStorage.reserve(numLoops); 709 stepsStorage.reserve(numLoops); 710 711 // Get the loop lb, ub, and step. 712 unpackRanges(loopRanges, lbsStorage, ubsStorage, stepsStorage); 713 714 // Modify the lb, ub, and step based on the distribution options. 715 SmallVector<DistributionMethod, 0> distributionMethod; 716 if (distributionOptions) { 717 auto &options = distributionOptions.getValue(); 718 distributionMethod.assign(distributionOptions->distributionMethod.begin(), 719 distributionOptions->distributionMethod.end()); 720 SmallVector<Range, 2> parallelLoopRanges; 721 for (const auto &iteratorType : enumerate(iteratorTypes)) { 722 if (isParallelIterator(iteratorType.value())) 723 parallelLoopRanges.push_back(loopRanges[iteratorType.index()]); 724 } 725 if (distributionMethod.size() < parallelLoopRanges.size()) 726 parallelLoopRanges.resize(distributionMethod.size()); 727 SmallVector<ProcInfo, 2> procInfo = 728 options.procInfo(b, loc, parallelLoopRanges); 729 unsigned index = 0; 730 for (const auto &iteratorType : enumerate(iteratorTypes)) { 731 if (index >= procInfo.size()) 732 break; 733 if (isParallelIterator(iteratorType.value())) { 734 unsigned i = iteratorType.index(); 735 updateBoundsForCyclicDistribution(b, loc, procInfo[index].procId, 736 procInfo[index].nprocs, lbsStorage[i], 737 ubsStorage[i], stepsStorage[i]); 738 index++; 739 } 740 } 741 } 742 ValueRange lbs(lbsStorage), ubs(ubsStorage), steps(stepsStorage); 743 generateParallelLoopNest( 744 b, loc, lbs, ubs, steps, iteratorTypes, 745 [&](OpBuilder &b, Location loc, ValueRange ivs) { 746 SmallVector<Value> operandValuesToUse = 747 linalgOp.getInputAndOutputOperands(); 748 bodyBuilderFn(b, loc, ivs, operandValuesToUse); 749 }, 750 ivs, distributionMethod); 751 752 assert(ivs.size() == iteratorTypes.size() && "did not generate enough loops"); 753 } 754 755 static Value fullyComposeAndAffineApply(OpBuilder &b, Location loc, 756 AffineExpr expr, ValueRange operands) { 757 AffineMap map = AffineMap::inferFromExprList({expr}).front(); 758 SmallVector<Value> normalizedOperands(operands.begin(), operands.end()); 759 mlir::fullyComposeAffineMapAndOperands(&map, &normalizedOperands); 760 canonicalizeMapAndOperands(&map, &normalizedOperands); 761 return b.createOrFold<AffineApplyOp>(loc, map, normalizedOperands); 762 } 763 764 Value makeTiledShape(OpBuilder &builder, Location loc, Value valueToTile, 765 ValueRange tileSizes, AffineMap map, ValueRange lbs, 766 ValueRange ubs, ValueRange subShapeSizes, 767 bool omitPartialTileCheck) { 768 auto shapedType = valueToTile.getType().dyn_cast<ShapedType>(); 769 assert(shapedType && "only shaped types can be tiled"); 770 ArrayRef<int64_t> shape = shapedType.getShape(); 771 int64_t rank = shapedType.getRank(); 772 773 // Construct a new subview / extract_slice for the tile. 774 SmallVector<OpFoldResult, 4> offsets, sizes, strides; 775 offsets.reserve(rank); 776 sizes.reserve(rank); 777 strides.reserve(rank); 778 for (unsigned r = 0; r < rank; ++r) { 779 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: for dim#" << r); 780 if (!isTiled(map.getSubMap({r}), tileSizes)) { 781 offsets.push_back(builder.getIndexAttr(0)); 782 Value dim = createOrFoldDimOp(builder, loc, valueToTile, r); 783 sizes.push_back(getAsOpFoldResult(dim)); 784 strides.push_back(builder.getIndexAttr(1)); 785 LLVM_DEBUG(llvm::dbgs() << ": not tiled: use size: " << dim << "\n"); 786 continue; 787 } 788 LLVM_DEBUG(llvm::dbgs() << ": tiled: figure out subsize...\n"); 789 790 // Tiling creates a new slice at the proper index, the slice step is 1 791 // (i.e. the op does not subsample, stepping occurs in the loop). 792 auto m = map.getSubMap({r}); 793 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: submap: " << m << "\n"); 794 auto offset = applyMapToValues(builder, loc, m, lbs).front(); 795 offsets.push_back(getAsOpFoldResult(offset)); 796 auto closedIntSize = 797 applyMapToValues(builder, loc, m, subShapeSizes).front(); 798 // Resulting size needs to be made half open interval again. 799 AffineExpr s0 = getAffineSymbolExpr(0, builder.getContext()); 800 Value size = 801 fullyComposeAndAffineApply(builder, loc, s0 + 1, closedIntSize); 802 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: raw size: " << size << "\n"); 803 LLVM_DEBUG(llvm::dbgs() 804 << "makeTiledShape: new offset: " << offset << "\n"); 805 strides.push_back(builder.getIndexAttr(1)); 806 807 if (omitPartialTileCheck) { 808 // We statically know that the partial/boundary tile condition is 809 // unnecessary. 810 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: new size: " << size << "\n"); 811 sizes.push_back(getAsOpFoldResult(size)); 812 continue; 813 } 814 815 // The size of the subview / extract_slice should be trimmed to avoid 816 // out-of-bounds accesses, unless: 817 // a. We statically know the subshape size divides the shape size evenly. 818 // b. The subshape size is 1. According to the way the loops are set up, 819 // tensors with "0" dimensions would never be constructed. 820 int64_t shapeSize = shape[r]; 821 auto sizeCst = size.getDefiningOp<arith::ConstantIndexOp>(); 822 auto hasTileSizeOne = sizeCst && sizeCst.value() == 1; 823 auto dividesEvenly = sizeCst && !ShapedType::isDynamic(shapeSize) && 824 ((shapeSize % sizeCst.value()) == 0); 825 if (!hasTileSizeOne && !dividesEvenly) { 826 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: shapeSize=" << shapeSize 827 << ", size: " << size 828 << ": make sure in bound with affine.min\n"); 829 830 AffineExpr dim0, dim1, dim2; 831 bindDims(builder.getContext(), dim0, dim1, dim2); 832 833 // Get the dimension size for this dimension. We need to first calculate 834 // the max index and then plus one. This is important because for 835 // convolution ops, we have its input window dimension's affine map of the 836 // form `(d0 * s0 + d1)`, where `d0`/`d1 is an output/filter window 837 // dimension and `s0` is stride. Directly use the dimension size of 838 // output/filer window dimensions will cause incorrect calculation. 839 AffineMap minusOneMap = 840 AffineMap::inferFromExprList({ArrayRef<AffineExpr>{dim0 - 1}}) 841 .front(); 842 AffineMap plusOneMap = 843 AffineMap::inferFromExprList({ArrayRef<AffineExpr>{dim0 + 1}}) 844 .front(); 845 auto maxIndices = llvm::to_vector<8>(llvm::map_range(ubs, [&](Value ub) { 846 return makeComposedAffineApply(builder, loc, minusOneMap, {ub}) 847 .getResult(); 848 })); 849 Value maxIndex = applyMapToValues(builder, loc, m, maxIndices).front(); 850 Value d = makeComposedAffineApply(builder, loc, plusOneMap, {maxIndex}); 851 852 // Compute min(dim - offset, size) to avoid out-of-bounds accesses. 853 AffineMap minMap = AffineMap::inferFromExprList( 854 {ArrayRef<AffineExpr>{dim1 - dim2, dim0}}) 855 .front(); 856 SmallVector<Value, 4> operands{size, d, offset}; 857 fullyComposeAffineMapAndOperands(&minMap, &operands); 858 canonicalizeMapAndOperands(&minMap, &operands); 859 size = builder.create<AffineMinOp>(loc, builder.getIndexType(), minMap, 860 operands); 861 } 862 LLVM_DEBUG(llvm::dbgs() << "makeTiledShape: new size: " << size << "\n"); 863 sizes.push_back(getAsOpFoldResult(size)); 864 } 865 866 auto *sliceOp = TypeSwitch<ShapedType, Operation *>(shapedType) 867 .Case([&](MemRefType) { 868 return builder.create<memref::SubViewOp>( 869 loc, valueToTile, offsets, sizes, strides); 870 }) 871 .Case([&](RankedTensorType) { 872 return makeComposedExtractSliceOp( 873 builder, loc, valueToTile, offsets, sizes, strides); 874 }) 875 .Default([](ShapedType) -> Operation * { 876 llvm_unreachable("Unexpected shaped type"); 877 }); 878 return sliceOp->getResult(0); 879 } 880 881 SmallVector<Value> computeTileOffsets(OpBuilder &b, Location loc, 882 ValueRange ivs, ValueRange tileSizes) { 883 SmallVector<Value> offsets; 884 for (unsigned idx = 0, idxIvs = 0, e = tileSizes.size(); idx < e; ++idx) { 885 LLVM_DEBUG(llvm::dbgs() << "makeTiledShapes: for loop#" << idx << "\n"); 886 bool isTiled = !isZero(tileSizes[idx]); 887 offsets.push_back( 888 isTiled ? ivs[idxIvs++] 889 : b.create<arith::ConstantIndexOp>(loc, 0).getResult()); 890 LLVM_DEBUG(llvm::dbgs() 891 << "computeTileOffsets: " << offsets.back() << "\n"); 892 } 893 return offsets; 894 } 895 896 SmallVector<Value> computeTileSizes(OpBuilder &b, Location loc, ValueRange ivs, 897 ValueRange tileSizes, 898 ArrayRef<Value> sizeBounds) { 899 SmallVector<Value> sizes; 900 for (unsigned idx = 0, e = tileSizes.size(); idx < e; ++idx) { 901 bool isTiled = !isZero(tileSizes[idx]); 902 // Before composing, we need to make range a closed interval. 903 Value size = isTiled ? tileSizes[idx] : sizeBounds[idx]; 904 AffineExpr d0 = getAffineDimExpr(0, b.getContext()); 905 sizes.push_back(fullyComposeAndAffineApply(b, loc, d0 - 1, size)); 906 LLVM_DEBUG(llvm::dbgs() << "computeTileSizes: " << sizes.back() << "\n"); 907 } 908 return sizes; 909 } 910 911 SmallVector<Value, 4> makeTiledShapes(OpBuilder &b, Location loc, 912 LinalgOp linalgOp, 913 ArrayRef<Value> valuesToTile, 914 ValueRange ivs, ValueRange tileSizes, 915 ArrayRef<Value> sizeBounds, 916 bool omitPartialTileCheck) { 917 assert(ivs.size() == static_cast<size_t>(llvm::count_if( 918 llvm::make_range(tileSizes.begin(), tileSizes.end()), 919 [](Value v) { return !isZero(v); })) && 920 "expected as many ivs as non-zero sizes"); 921 922 // Construct (potentially temporary) mins and maxes on which to apply maps 923 // that define tile subshapes. 924 SmallVector<Value> lbs = computeTileOffsets(b, loc, ivs, tileSizes); 925 SmallVector<Value> subShapeSizes = 926 computeTileSizes(b, loc, ivs, tileSizes, sizeBounds); 927 928 assert(static_cast<int64_t>(valuesToTile.size()) == 929 linalgOp.getNumInputsAndOutputs() && 930 "expected one value to tile for every operand"); 931 SmallVector<Value, 4> tiledShapes; 932 tiledShapes.reserve(valuesToTile.size()); 933 for (OpOperand *opOperand : linalgOp.getInputAndOutputOperands()) { 934 Value shapedOp = valuesToTile[opOperand->getOperandNumber()]; 935 LLVM_DEBUG(llvm::dbgs() << "makeTiledShapes: for operand " << shapedOp); 936 AffineMap map = linalgOp.getTiedIndexingMap(opOperand); 937 // Use `opOperand` as is if it is not tiled and not an output tensor. Having 938 // an extract/insert slice pair for all output tensors simplifies follow up 939 // transformations such as padding and bufferization since the 940 // extract/insert slice pairs make the accessed iteration argument 941 // subdomains explicit. 942 if (!isTiled(map, tileSizes) && !linalgOp.isOutputTensor(opOperand)) { 943 tiledShapes.push_back(shapedOp); 944 LLVM_DEBUG(llvm::dbgs() << ": not tiled: use shape: " 945 << opOperand->get().getType() << "\n"); 946 continue; 947 } 948 LLVM_DEBUG(llvm::dbgs() << ": tiled: figure out subshape...\n"); 949 950 tiledShapes.push_back(makeTiledShape(b, loc, shapedOp, tileSizes, map, lbs, 951 sizeBounds, subShapeSizes, 952 omitPartialTileCheck)); 953 } 954 955 return tiledShapes; 956 } 957 958 void addTileLoopIvsToIndexOpResults(OpBuilder &b, LinalgOp tiledOp, 959 ArrayRef<Value> ivs) { 960 if (tiledOp.hasIndexSemantics()) { 961 for (IndexOp indexOp : tiledOp.getBlock()->getOps<IndexOp>()) { 962 if (ivs[indexOp.dim()] == nullptr) 963 continue; 964 OpBuilder::InsertionGuard guard(b); 965 b.setInsertionPointAfter(indexOp); 966 AffineExpr index, offset; 967 bindDims(b.getContext(), index, offset); 968 AffineApplyOp applyOp = makeComposedAffineApply( 969 b, indexOp.getLoc(), index + offset, 970 ValueRange{indexOp.getResult(), ivs[indexOp.dim()]}); 971 indexOp.getResult().replaceAllUsesExcept(applyOp, applyOp); 972 } 973 } 974 } 975 976 } // namespace linalg 977 } // namespace mlir 978