1b8737614SUday Bondhugula //===- LoopTiling.cpp --- Loop tiling pass ------------------------------*-===//
2b8737614SUday Bondhugula //
3b8737614SUday Bondhugula // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4b8737614SUday Bondhugula // See https://llvm.org/LICENSE.txt for license information.
5b8737614SUday Bondhugula // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6b8737614SUday Bondhugula //
7b8737614SUday Bondhugula //===----------------------------------------------------------------------===//
8b8737614SUday Bondhugula //
9b8737614SUday Bondhugula // This file implements a pass to tile loop nests.
10b8737614SUday Bondhugula //
11b8737614SUday Bondhugula //===----------------------------------------------------------------------===//
12b8737614SUday Bondhugula
131834ad4aSRiver Riddle #include "PassDetail.h"
14755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/AffineAnalysis.h"
15755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/AffineStructures.h"
16755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/LoopAnalysis.h"
17755dc07dSRiver Riddle #include "mlir/Dialect/Affine/Analysis/Utils.h"
18b8737614SUday Bondhugula #include "mlir/Dialect/Affine/IR/AffineOps.h"
1943a95a54SUday Bondhugula #include "mlir/Dialect/Affine/IR/AffineValueMap.h"
20a70aa7bbSRiver Riddle #include "mlir/Dialect/Affine/LoopUtils.h"
21b8737614SUday Bondhugula #include "mlir/Dialect/Affine/Passes.h"
22a70aa7bbSRiver Riddle #include "mlir/Dialect/Affine/Utils.h"
2343a95a54SUday Bondhugula #include "mlir/IR/BlockAndValueMapping.h"
24b8737614SUday Bondhugula #include "mlir/IR/Builders.h"
25b8737614SUday Bondhugula #include "llvm/Support/CommandLine.h"
26b8737614SUday Bondhugula #include "llvm/Support/Debug.h"
27b8737614SUday Bondhugula using namespace mlir;
28b8737614SUday Bondhugula
29b8737614SUday Bondhugula #define DEBUG_TYPE "affine-loop-tile"
30b8737614SUday Bondhugula
31b8737614SUday Bondhugula namespace {
32b8737614SUday Bondhugula
33b8737614SUday Bondhugula /// A pass to perform loop tiling on all suitable loop nests of a Function.
341834ad4aSRiver Riddle struct LoopTiling : public AffineLoopTilingBase<LoopTiling> {
35400ad6f9SRiver Riddle LoopTiling() = default;
LoopTiling__anond42b48350111::LoopTiling36400ad6f9SRiver Riddle explicit LoopTiling(uint64_t cacheSizeBytes, bool avoidMaxMinBounds = true)
37400ad6f9SRiver Riddle : avoidMaxMinBounds(avoidMaxMinBounds) {
38400ad6f9SRiver Riddle this->cacheSizeInKiB = cacheSizeBytes / 1024;
39400ad6f9SRiver Riddle }
40b8737614SUday Bondhugula
4141574554SRiver Riddle void runOnOperation() override;
42b8737614SUday Bondhugula void getTileSizes(ArrayRef<AffineForOp> band,
43b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes);
44b8737614SUday Bondhugula
45b8737614SUday Bondhugula // Default tile size if nothing is provided.
46b8737614SUday Bondhugula constexpr static unsigned kDefaultTileSize = 4;
47b8737614SUday Bondhugula
48b8737614SUday Bondhugula // If true, tile sizes are set to avoid max/min in bounds if possible.
49400ad6f9SRiver Riddle bool avoidMaxMinBounds = true;
50b8737614SUday Bondhugula };
51b8737614SUday Bondhugula
52be0a7e9fSMehdi Amini } // namespace
53b8737614SUday Bondhugula
54b8737614SUday Bondhugula /// Creates a pass to perform loop tiling on all suitable loop nests of a
55b8737614SUday Bondhugula /// Function.
5658ceae95SRiver Riddle std::unique_ptr<OperationPass<func::FuncOp>>
createLoopTilingPass(uint64_t cacheSizeBytes)57b8737614SUday Bondhugula mlir::createLoopTilingPass(uint64_t cacheSizeBytes) {
58b8737614SUday Bondhugula return std::make_unique<LoopTiling>(cacheSizeBytes);
59b8737614SUday Bondhugula }
createLoopTilingPass()6058ceae95SRiver Riddle std::unique_ptr<OperationPass<func::FuncOp>> mlir::createLoopTilingPass() {
61e3d834a5SRiver Riddle return std::make_unique<LoopTiling>();
62e3d834a5SRiver Riddle }
63b8737614SUday Bondhugula
64ecddafd8SUday Bondhugula /// Reduces each tile size to the largest divisor of the corresponding trip
65ecddafd8SUday Bondhugula /// count (if the trip count is known).
adjustToDivisorsOfTripCounts(ArrayRef<AffineForOp> band,SmallVectorImpl<unsigned> * tileSizes)66b8737614SUday Bondhugula static void adjustToDivisorsOfTripCounts(ArrayRef<AffineForOp> band,
67b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes) {
68b8737614SUday Bondhugula assert(band.size() == tileSizes->size() && "invalid tile size count");
69b8737614SUday Bondhugula for (unsigned i = 0, e = band.size(); i < e; i++) {
70b8737614SUday Bondhugula unsigned &tSizeAdjusted = (*tileSizes)[i];
710602e8f7SNavdeep Kumar Optional<uint64_t> mayConst = getConstantTripCount(band[i]);
72ecddafd8SUday Bondhugula if (!mayConst)
73b8737614SUday Bondhugula continue;
74b8737614SUday Bondhugula // Adjust the tile size to largest factor of the trip count less than
75b8737614SUday Bondhugula // tSize.
76*6d5fc1e3SKazu Hirata uint64_t constTripCount = *mayConst;
77b8737614SUday Bondhugula if (constTripCount > 1 && tSizeAdjusted > constTripCount / 2)
78b8737614SUday Bondhugula tSizeAdjusted = constTripCount / 2;
79b8737614SUday Bondhugula while (constTripCount % tSizeAdjusted != 0)
80b8737614SUday Bondhugula tSizeAdjusted--;
81b8737614SUday Bondhugula }
82b8737614SUday Bondhugula }
83b8737614SUday Bondhugula
84b8737614SUday Bondhugula // Returns tile sizes to use. Checks CL options; if none are specified, sets it
85b8737614SUday Bondhugula // based on a simple model that looks at the memory footprint and determines
86b8737614SUday Bondhugula // tile sizes assuming identity accesses / 1:1 tile size proportional footprint
87b8737614SUday Bondhugula // along each of the dimensions being tiled.
889db53a18SRiver Riddle // TODO: evolve this model. Tile size determination is a large area
89b8737614SUday Bondhugula // to play with in general.
getTileSizes(ArrayRef<AffineForOp> band,SmallVectorImpl<unsigned> * tileSizes)90b8737614SUday Bondhugula void LoopTiling::getTileSizes(ArrayRef<AffineForOp> band,
91b8737614SUday Bondhugula SmallVectorImpl<unsigned> *tileSizes) {
92b8737614SUday Bondhugula if (band.empty())
93b8737614SUday Bondhugula return;
94b8737614SUday Bondhugula
95ecddafd8SUday Bondhugula // Use command-line tileSize for all loops if specified.
96ecddafd8SUday Bondhugula if (tileSize) {
97400ad6f9SRiver Riddle tileSizes->assign(band.size(), tileSize);
98400ad6f9SRiver Riddle return;
99400ad6f9SRiver Riddle }
100400ad6f9SRiver Riddle
101400ad6f9SRiver Riddle // Use tileSizes and fill them with default tile size if it's short.
102400ad6f9SRiver Riddle if (!this->tileSizes.empty()) {
103400ad6f9SRiver Riddle tileSizes->assign(this->tileSizes.begin(), this->tileSizes.end());
104400ad6f9SRiver Riddle tileSizes->resize(band.size(), kDefaultTileSize);
105400ad6f9SRiver Riddle return;
106400ad6f9SRiver Riddle }
107b8737614SUday Bondhugula tileSizes->resize(band.size());
108b8737614SUday Bondhugula
109b8737614SUday Bondhugula // The first loop in the band.
1100602e8f7SNavdeep Kumar AffineForOp rootForOp = band[0];
111b8737614SUday Bondhugula (void)rootForOp;
112b8737614SUday Bondhugula
113b8737614SUday Bondhugula // Obtain memory footprint and set tile sizes so that a tile fits in
114b8737614SUday Bondhugula // the cache size. This is an approximation with the assumption that the
115b8737614SUday Bondhugula // footprint increases with the tile size linearly in that dimension (i.e.,
116b8737614SUday Bondhugula // assumes one-to-one access function).
1170602e8f7SNavdeep Kumar Optional<int64_t> fp = getMemoryFootprintBytes(band[0], 0);
118ecddafd8SUday Bondhugula if (!fp) {
119b8737614SUday Bondhugula // Fill with default tile sizes if footprint is unknown.
120b8737614SUday Bondhugula std::fill(tileSizes->begin(), tileSizes->end(),
121b8737614SUday Bondhugula LoopTiling::kDefaultTileSize);
122b8737614SUday Bondhugula if (avoidMaxMinBounds)
123b8737614SUday Bondhugula adjustToDivisorsOfTripCounts(band, tileSizes);
124b8737614SUday Bondhugula LLVM_DEBUG(
125b8737614SUday Bondhugula rootForOp.emitWarning("memory footprint unknown: using default tile "
126b8737614SUday Bondhugula "sizes adjusted to trip count divisors"));
127b8737614SUday Bondhugula return;
128b8737614SUday Bondhugula }
129b8737614SUday Bondhugula
130b8737614SUday Bondhugula // Check how many times larger the cache size is when compared to footprint.
131400ad6f9SRiver Riddle uint64_t cacheSizeBytes = cacheSizeInKiB * 1024;
132*6d5fc1e3SKazu Hirata uint64_t excessFactor = llvm::divideCeil(*fp, cacheSizeBytes);
133b8737614SUday Bondhugula if (excessFactor <= 1) {
134b8737614SUday Bondhugula // No need of any tiling - set tile size to 1.
135b8737614SUday Bondhugula std::fill(tileSizes->begin(), tileSizes->end(), 1);
136b8737614SUday Bondhugula return;
137b8737614SUday Bondhugula }
138b8737614SUday Bondhugula
139b8737614SUday Bondhugula // Divide all loops equally in an attempt to reduce footprint.
1409db53a18SRiver Riddle // TODO: this is approximate. Ideally, obtain reuse factor /
141b8737614SUday Bondhugula // profitability along each dimension and weight tile sizes based on that as
142b8737614SUday Bondhugula // one possible approach. Or compute a polynomial in tile sizes and solve for
143b8737614SUday Bondhugula // it.
144b8737614SUday Bondhugula
145ecddafd8SUday Bondhugula // For an n-d tileable band, compute the n^th root of the excess.
146b8737614SUday Bondhugula unsigned tSize =
147b8737614SUday Bondhugula static_cast<unsigned>(floorl(std::pow(excessFactor, 1.0 / band.size())));
148b8737614SUday Bondhugula // We'll keep a running product to determine the last tile size better.
149b8737614SUday Bondhugula unsigned cumulProductOfTileSizes = 1;
150b8737614SUday Bondhugula for (unsigned i = 0, e = band.size(); i < e; i++) {
151b8737614SUday Bondhugula if (i < e - 1)
152b8737614SUday Bondhugula (*tileSizes)[i] = tSize;
153b8737614SUday Bondhugula else
154b8737614SUday Bondhugula // Set last tile size to cover the balance.
155b8737614SUday Bondhugula (*tileSizes)[i] = std::max(
156b8737614SUday Bondhugula 1U, static_cast<unsigned>(excessFactor / cumulProductOfTileSizes));
157b8737614SUday Bondhugula cumulProductOfTileSizes *= (*tileSizes)[i];
158b8737614SUday Bondhugula }
159b8737614SUday Bondhugula if (avoidMaxMinBounds)
160b8737614SUday Bondhugula adjustToDivisorsOfTripCounts(band, tileSizes);
161b8737614SUday Bondhugula }
162b8737614SUday Bondhugula
runOnOperation()16341574554SRiver Riddle void LoopTiling::runOnOperation() {
164b8737614SUday Bondhugula // Bands of loops to tile.
165b8737614SUday Bondhugula std::vector<SmallVector<AffineForOp, 6>> bands;
16641574554SRiver Riddle getTileableBands(getOperation(), &bands);
167b8737614SUday Bondhugula
16878e61496SUday Bondhugula // Tile each band.
169b8737614SUday Bondhugula for (auto &band : bands) {
170b8737614SUday Bondhugula // Set up tile sizes; fill missing tile sizes at the end with default tile
171400ad6f9SRiver Riddle // size or tileSize if one was provided.
172b8737614SUday Bondhugula SmallVector<unsigned, 6> tileSizes;
173b8737614SUday Bondhugula getTileSizes(band, &tileSizes);
174b8737614SUday Bondhugula if (llvm::DebugFlag) {
175b8737614SUday Bondhugula auto diag = band[0].emitRemark("using tile sizes [");
1760602e8f7SNavdeep Kumar for (unsigned tSize : tileSizes)
17778e61496SUday Bondhugula diag << tSize << ' ';
178b8737614SUday Bondhugula diag << "]\n";
179b8737614SUday Bondhugula }
18043a95a54SUday Bondhugula SmallVector<AffineForOp, 6> tiledNest;
1819cf9ed94SUday Bondhugula if (failed(tilePerfectlyNested(band, tileSizes, &tiledNest))) {
1829cf9ed94SUday Bondhugula // An empty band always succeeds.
1839cf9ed94SUday Bondhugula assert(!band.empty() && "guaranteed to succeed on empty bands");
1849cf9ed94SUday Bondhugula LLVM_DEBUG(band.front()->emitRemark("loop tiling failed!\n"));
1859cf9ed94SUday Bondhugula continue;
1869cf9ed94SUday Bondhugula }
18743a95a54SUday Bondhugula
18843a95a54SUday Bondhugula // Separate full and partial tiles.
189400ad6f9SRiver Riddle if (separate) {
19043a95a54SUday Bondhugula auto intraTileLoops =
19143a95a54SUday Bondhugula MutableArrayRef<AffineForOp>(tiledNest).drop_front(band.size());
1929cf9ed94SUday Bondhugula if (failed(separateFullTiles(intraTileLoops))) {
1939cf9ed94SUday Bondhugula assert(!intraTileLoops.empty() &&
1949cf9ed94SUday Bondhugula "guaranteed to succeed on empty bands");
1959cf9ed94SUday Bondhugula LLVM_DEBUG(intraTileLoops.front()->emitRemark(
1969cf9ed94SUday Bondhugula "separation post tiling failed!\n"));
1979cf9ed94SUday Bondhugula }
19843a95a54SUday Bondhugula }
199b8737614SUday Bondhugula }
200b8737614SUday Bondhugula }
201b8737614SUday Bondhugula
202b8737614SUday Bondhugula constexpr unsigned LoopTiling::kDefaultTileSize;
203