1 //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
10 
11 #include "../PassDetail.h"
12 
13 #include "mlir/Conversion/ArmSVEToLLVM/ArmSVEToLLVM.h"
14 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
15 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
16 #include "mlir/Dialect/AVX512/AVX512Dialect.h"
17 #include "mlir/Dialect/AVX512/Transforms.h"
18 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
19 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
20 #include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
21 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
22 #include "mlir/Dialect/StandardOps/IR/Ops.h"
23 #include "mlir/Dialect/Vector/VectorOps.h"
24 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
25 
26 using namespace mlir;
27 using namespace mlir::vector;
28 
29 namespace {
30 struct LowerVectorToLLVMPass
31     : public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> {
32   LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
33     this->reassociateFPReductions = options.reassociateFPReductions;
34     this->enableIndexOptimizations = options.enableIndexOptimizations;
35     this->enableArmNeon = options.enableArmNeon;
36     this->enableArmSVE = options.enableArmSVE;
37     this->enableAVX512 = options.enableAVX512;
38   }
39   // Override explicitly to allow conditional dialect dependence.
40   void getDependentDialects(DialectRegistry &registry) const override {
41     registry.insert<LLVM::LLVMDialect>();
42     if (enableArmNeon)
43       registry.insert<arm_neon::ArmNeonDialect>();
44     if (enableArmSVE)
45       registry.insert<LLVM::LLVMArmSVEDialect>();
46     if (enableAVX512)
47       registry.insert<avx512::AVX512Dialect>();
48   }
49   void runOnOperation() override;
50 };
51 } // namespace
52 
53 void LowerVectorToLLVMPass::runOnOperation() {
54   // Perform progressive lowering of operations on slices and
55   // all contraction operations. Also applies folding and DCE.
56   {
57     OwningRewritePatternList patterns;
58     populateVectorToVectorCanonicalizationPatterns(patterns, &getContext());
59     populateVectorSlicesLoweringPatterns(patterns, &getContext());
60     populateVectorContractLoweringPatterns(patterns, &getContext());
61     (void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns));
62   }
63 
64   // Convert to the LLVM IR dialect.
65   LLVMTypeConverter converter(&getContext());
66   OwningRewritePatternList patterns;
67   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
68   populateVectorToLLVMConversionPatterns(
69       converter, patterns, reassociateFPReductions, enableIndexOptimizations);
70   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
71 
72   // Architecture specific augmentations.
73   LLVMConversionTarget target(getContext());
74   target.addLegalOp<LLVM::DialectCastOp>();
75   target.addLegalDialect<StandardOpsDialect>();
76   target.addLegalOp<UnrealizedConversionCastOp>();
77   if (enableArmNeon) {
78     // TODO: we may or may not want to include in-dialect lowering to
79     // LLVM-compatible operations here. So far, all operations in the dialect
80     // can be translated to LLVM IR so there is no conversion necessary.
81     target.addLegalDialect<arm_neon::ArmNeonDialect>();
82   }
83   if (enableArmSVE) {
84     target.addLegalDialect<LLVM::LLVMArmSVEDialect>();
85     target.addIllegalDialect<arm_sve::ArmSVEDialect>();
86     auto hasScalableVectorType = [](TypeRange types) {
87       for (Type type : types)
88         if (type.isa<arm_sve::ScalableVectorType>())
89           return true;
90       return false;
91     };
92     // Remove any ArmSVE-specific types from function signatures and results.
93     populateFuncOpTypeConversionPattern(patterns, &getContext(), converter);
94     target.addDynamicallyLegalOp<FuncOp>([hasScalableVectorType](FuncOp op) {
95       return !hasScalableVectorType(op.getType().getInputs()) &&
96              !hasScalableVectorType(op.getType().getResults());
97     });
98     target.addDynamicallyLegalOp<CallOp, CallIndirectOp, ReturnOp>(
99         [hasScalableVectorType](Operation *op) {
100           return !hasScalableVectorType(op->getOperandTypes()) &&
101                  !hasScalableVectorType(op->getResultTypes());
102         });
103     populateArmSVEToLLVMConversionPatterns(converter, patterns);
104   }
105   if (enableAVX512) {
106     configureAVX512LegalizeForExportTarget(target);
107     populateAVX512LegalizeForLLVMExportPatterns(converter, patterns);
108   }
109 
110   if (failed(
111           applyPartialConversion(getOperation(), target, std::move(patterns))))
112     signalPassFailure();
113 }
114 
115 std::unique_ptr<OperationPass<ModuleOp>>
116 mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
117   return std::make_unique<LowerVectorToLLVMPass>(options);
118 }
119