1 //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
10 
11 #include "../PassDetail.h"
12 
13 #include "mlir/Conversion/ArmSVEToLLVM/ArmSVEToLLVM.h"
14 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVM.h"
15 #include "mlir/Conversion/StandardToLLVM/ConvertStandardToLLVMPass.h"
16 #include "mlir/Dialect/AVX512/AVX512Dialect.h"
17 #include "mlir/Dialect/AVX512/Transforms.h"
18 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
19 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
20 #include "mlir/Dialect/LLVMIR/LLVMArmSVEDialect.h"
21 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
22 #include "mlir/Dialect/MemRef/IR/MemRef.h"
23 #include "mlir/Dialect/StandardOps/IR/Ops.h"
24 #include "mlir/Dialect/Vector/VectorOps.h"
25 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
26 
27 using namespace mlir;
28 using namespace mlir::vector;
29 
30 namespace {
31 struct LowerVectorToLLVMPass
32     : public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> {
33   LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
34     this->reassociateFPReductions = options.reassociateFPReductions;
35     this->enableIndexOptimizations = options.enableIndexOptimizations;
36     this->enableArmNeon = options.enableArmNeon;
37     this->enableArmSVE = options.enableArmSVE;
38     this->enableAVX512 = options.enableAVX512;
39   }
40   // Override explicitly to allow conditional dialect dependence.
41   void getDependentDialects(DialectRegistry &registry) const override {
42     registry.insert<LLVM::LLVMDialect>();
43     registry.insert<memref::MemRefDialect>();
44     if (enableArmNeon)
45       registry.insert<arm_neon::ArmNeonDialect>();
46     if (enableArmSVE)
47       registry.insert<LLVM::LLVMArmSVEDialect>();
48     if (enableAVX512)
49       registry.insert<avx512::AVX512Dialect>();
50   }
51   void runOnOperation() override;
52 };
53 } // namespace
54 
55 void LowerVectorToLLVMPass::runOnOperation() {
56   // Perform progressive lowering of operations on slices and
57   // all contraction operations. Also applies folding and DCE.
58   {
59     OwningRewritePatternList patterns;
60     populateVectorToVectorCanonicalizationPatterns(patterns, &getContext());
61     populateVectorSlicesLoweringPatterns(patterns, &getContext());
62     populateVectorContractLoweringPatterns(patterns, &getContext());
63     (void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns));
64   }
65 
66   // Convert to the LLVM IR dialect.
67   LLVMTypeConverter converter(&getContext());
68   OwningRewritePatternList patterns;
69   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
70   populateVectorToLLVMConversionPatterns(
71       converter, patterns, reassociateFPReductions, enableIndexOptimizations);
72   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
73 
74   // Architecture specific augmentations.
75   LLVMConversionTarget target(getContext());
76   target.addLegalOp<LLVM::DialectCastOp>();
77   target.addLegalDialect<memref::MemRefDialect>();
78   target.addLegalDialect<StandardOpsDialect>();
79   target.addLegalOp<UnrealizedConversionCastOp>();
80   if (enableArmNeon) {
81     // TODO: we may or may not want to include in-dialect lowering to
82     // LLVM-compatible operations here. So far, all operations in the dialect
83     // can be translated to LLVM IR so there is no conversion necessary.
84     target.addLegalDialect<arm_neon::ArmNeonDialect>();
85   }
86   if (enableArmSVE) {
87     target.addLegalDialect<LLVM::LLVMArmSVEDialect>();
88     target.addIllegalDialect<arm_sve::ArmSVEDialect>();
89     auto hasScalableVectorType = [](TypeRange types) {
90       for (Type type : types)
91         if (type.isa<arm_sve::ScalableVectorType>())
92           return true;
93       return false;
94     };
95     // Remove any ArmSVE-specific types from function signatures and results.
96     populateFuncOpTypeConversionPattern(patterns, &getContext(), converter);
97     target.addDynamicallyLegalOp<FuncOp>([hasScalableVectorType](FuncOp op) {
98       return !hasScalableVectorType(op.getType().getInputs()) &&
99              !hasScalableVectorType(op.getType().getResults());
100     });
101     target.addDynamicallyLegalOp<CallOp, CallIndirectOp, ReturnOp>(
102         [hasScalableVectorType](Operation *op) {
103           return !hasScalableVectorType(op->getOperandTypes()) &&
104                  !hasScalableVectorType(op->getResultTypes());
105         });
106     populateArmSVEToLLVMConversionPatterns(converter, patterns);
107   }
108   if (enableAVX512) {
109     configureAVX512LegalizeForExportTarget(target);
110     populateAVX512LegalizeForLLVMExportPatterns(converter, patterns);
111   }
112 
113   if (failed(
114           applyPartialConversion(getOperation(), target, std::move(patterns))))
115     signalPassFailure();
116 }
117 
118 std::unique_ptr<OperationPass<ModuleOp>>
119 mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
120   return std::make_unique<LowerVectorToLLVMPass>(options);
121 }
122