1 //===- VectorToLLVM.cpp - Conversion from Vector to the LLVM dialect ------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 
9 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h"
10 
11 #include "../PassDetail.h"
12 
13 #include "mlir/Conversion/LLVMCommon/ConversionTarget.h"
14 #include "mlir/Conversion/LLVMCommon/TypeConverter.h"
15 #include "mlir/Dialect/AMX/AMXDialect.h"
16 #include "mlir/Dialect/AMX/Transforms.h"
17 #include "mlir/Dialect/ArmNeon/ArmNeonDialect.h"
18 #include "mlir/Dialect/ArmSVE/ArmSVEDialect.h"
19 #include "mlir/Dialect/ArmSVE/Transforms.h"
20 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
21 #include "mlir/Dialect/MemRef/IR/MemRef.h"
22 #include "mlir/Dialect/StandardOps/IR/Ops.h"
23 #include "mlir/Dialect/Vector/VectorOps.h"
24 #include "mlir/Dialect/X86Vector/Transforms.h"
25 #include "mlir/Dialect/X86Vector/X86VectorDialect.h"
26 #include "mlir/Transforms/GreedyPatternRewriteDriver.h"
27 
28 using namespace mlir;
29 using namespace mlir::vector;
30 
31 namespace {
32 struct LowerVectorToLLVMPass
33     : public ConvertVectorToLLVMBase<LowerVectorToLLVMPass> {
34   LowerVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
35     this->reassociateFPReductions = options.reassociateFPReductions;
36     this->enableIndexOptimizations = options.enableIndexOptimizations;
37     this->enableArmNeon = options.enableArmNeon;
38     this->enableArmSVE = options.enableArmSVE;
39     this->enableAMX = options.enableAMX;
40     this->enableX86Vector = options.enableX86Vector;
41   }
42   // Override explicitly to allow conditional dialect dependence.
43   void getDependentDialects(DialectRegistry &registry) const override {
44     registry.insert<LLVM::LLVMDialect>();
45     registry.insert<memref::MemRefDialect>();
46     if (enableArmNeon)
47       registry.insert<arm_neon::ArmNeonDialect>();
48     if (enableArmSVE)
49       registry.insert<arm_sve::ArmSVEDialect>();
50     if (enableAMX)
51       registry.insert<amx::AMXDialect>();
52     if (enableX86Vector)
53       registry.insert<x86vector::X86VectorDialect>();
54   }
55   void runOnOperation() override;
56 };
57 } // namespace
58 
59 void LowerVectorToLLVMPass::runOnOperation() {
60   // Perform progressive lowering of operations on slices and
61   // all contraction operations. Also applies folding and DCE.
62   {
63     RewritePatternSet patterns(&getContext());
64     populateVectorToVectorCanonicalizationPatterns(patterns);
65     populateVectorBroadcastLoweringPatterns(patterns);
66     populateVectorContractLoweringPatterns(patterns);
67     populateVectorMaskOpLoweringPatterns(patterns);
68     populateVectorShapeCastLoweringPatterns(patterns);
69     populateVectorTransposeLoweringPatterns(patterns);
70     // Vector transfer ops with rank > 1 should be lowered with VectorToSCF.
71     populateVectorTransferLoweringPatterns(patterns, /*maxTransferRank=*/1);
72     (void)applyPatternsAndFoldGreedily(getOperation(), std::move(patterns));
73   }
74 
75   // Convert to the LLVM IR dialect.
76   LLVMTypeConverter converter(&getContext());
77   RewritePatternSet patterns(&getContext());
78   populateVectorMaskMaterializationPatterns(patterns, enableIndexOptimizations);
79   populateVectorTransferLoweringPatterns(patterns);
80   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
81   populateVectorToLLVMConversionPatterns(converter, patterns,
82                                          reassociateFPReductions);
83   populateVectorToLLVMMatrixConversionPatterns(converter, patterns);
84 
85   // Architecture specific augmentations.
86   LLVMConversionTarget target(getContext());
87   target.addLegalDialect<memref::MemRefDialect>();
88   target.addLegalDialect<StandardOpsDialect>();
89   target.addLegalOp<UnrealizedConversionCastOp>();
90   if (enableArmNeon) {
91     // TODO: we may or may not want to include in-dialect lowering to
92     // LLVM-compatible operations here. So far, all operations in the dialect
93     // can be translated to LLVM IR so there is no conversion necessary.
94     target.addLegalDialect<arm_neon::ArmNeonDialect>();
95   }
96   if (enableArmSVE) {
97     configureArmSVELegalizeForExportTarget(target);
98     populateArmSVELegalizeForLLVMExportPatterns(converter, patterns);
99   }
100   if (enableAMX) {
101     configureAMXLegalizeForExportTarget(target);
102     populateAMXLegalizeForLLVMExportPatterns(converter, patterns);
103   }
104   if (enableX86Vector) {
105     configureX86VectorLegalizeForExportTarget(target);
106     populateX86VectorLegalizeForLLVMExportPatterns(converter, patterns);
107   }
108 
109   if (failed(
110           applyPartialConversion(getOperation(), target, std::move(patterns))))
111     signalPassFailure();
112 }
113 
114 std::unique_ptr<OperationPass<ModuleOp>>
115 mlir::createConvertVectorToLLVMPass(const LowerVectorToLLVMOptions &options) {
116   return std::make_unique<LowerVectorToLLVMPass>(options);
117 }
118