1 //===- SPIRVToLLVM.cpp - SPIR-V to LLVM Patterns --------------------------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements patterns to convert SPIR-V dialect to LLVM dialect. 10 // 11 //===----------------------------------------------------------------------===// 12 13 #include "mlir/Conversion/SPIRVToLLVM/SPIRVToLLVM.h" 14 #include "mlir/Conversion/LLVMCommon/Pattern.h" 15 #include "mlir/Conversion/LLVMCommon/TypeConverter.h" 16 #include "mlir/Dialect/LLVMIR/LLVMDialect.h" 17 #include "mlir/Dialect/SPIRV/IR/SPIRVDialect.h" 18 #include "mlir/Dialect/SPIRV/IR/SPIRVOps.h" 19 #include "mlir/Dialect/SPIRV/Utils/LayoutUtils.h" 20 #include "mlir/Dialect/StandardOps/IR/Ops.h" 21 #include "mlir/IR/BuiltinOps.h" 22 #include "mlir/IR/PatternMatch.h" 23 #include "mlir/Support/LogicalResult.h" 24 #include "mlir/Transforms/DialectConversion.h" 25 #include "llvm/Support/Debug.h" 26 #include "llvm/Support/FormatVariadic.h" 27 28 #define DEBUG_TYPE "spirv-to-llvm-pattern" 29 30 using namespace mlir; 31 32 //===----------------------------------------------------------------------===// 33 // Utility functions 34 //===----------------------------------------------------------------------===// 35 36 /// Returns true if the given type is a signed integer or vector type. 37 static bool isSignedIntegerOrVector(Type type) { 38 if (type.isSignedInteger()) 39 return true; 40 if (auto vecType = type.dyn_cast<VectorType>()) 41 return vecType.getElementType().isSignedInteger(); 42 return false; 43 } 44 45 /// Returns true if the given type is an unsigned integer or vector type 46 static bool isUnsignedIntegerOrVector(Type type) { 47 if (type.isUnsignedInteger()) 48 return true; 49 if (auto vecType = type.dyn_cast<VectorType>()) 50 return vecType.getElementType().isUnsignedInteger(); 51 return false; 52 } 53 54 /// Returns the bit width of integer, float or vector of float or integer values 55 static unsigned getBitWidth(Type type) { 56 assert((type.isIntOrFloat() || type.isa<VectorType>()) && 57 "bitwidth is not supported for this type"); 58 if (type.isIntOrFloat()) 59 return type.getIntOrFloatBitWidth(); 60 auto vecType = type.dyn_cast<VectorType>(); 61 auto elementType = vecType.getElementType(); 62 assert(elementType.isIntOrFloat() && 63 "only integers and floats have a bitwidth"); 64 return elementType.getIntOrFloatBitWidth(); 65 } 66 67 /// Returns the bit width of LLVMType integer or vector. 68 static unsigned getLLVMTypeBitWidth(Type type) { 69 return (LLVM::isCompatibleVectorType(type) ? LLVM::getVectorElementType(type) 70 : type) 71 .cast<IntegerType>() 72 .getWidth(); 73 } 74 75 /// Creates `IntegerAttribute` with all bits set for given type 76 static IntegerAttr minusOneIntegerAttribute(Type type, Builder builder) { 77 if (auto vecType = type.dyn_cast<VectorType>()) { 78 auto integerType = vecType.getElementType().cast<IntegerType>(); 79 return builder.getIntegerAttr(integerType, -1); 80 } 81 auto integerType = type.cast<IntegerType>(); 82 return builder.getIntegerAttr(integerType, -1); 83 } 84 85 /// Creates `llvm.mlir.constant` with all bits set for the given type. 86 static Value createConstantAllBitsSet(Location loc, Type srcType, Type dstType, 87 PatternRewriter &rewriter) { 88 if (srcType.isa<VectorType>()) { 89 return rewriter.create<LLVM::ConstantOp>( 90 loc, dstType, 91 SplatElementsAttr::get(srcType.cast<ShapedType>(), 92 minusOneIntegerAttribute(srcType, rewriter))); 93 } 94 return rewriter.create<LLVM::ConstantOp>( 95 loc, dstType, minusOneIntegerAttribute(srcType, rewriter)); 96 } 97 98 /// Creates `llvm.mlir.constant` with a floating-point scalar or vector value. 99 static Value createFPConstant(Location loc, Type srcType, Type dstType, 100 PatternRewriter &rewriter, double value) { 101 if (auto vecType = srcType.dyn_cast<VectorType>()) { 102 auto floatType = vecType.getElementType().cast<FloatType>(); 103 return rewriter.create<LLVM::ConstantOp>( 104 loc, dstType, 105 SplatElementsAttr::get(vecType, 106 rewriter.getFloatAttr(floatType, value))); 107 } 108 auto floatType = srcType.cast<FloatType>(); 109 return rewriter.create<LLVM::ConstantOp>( 110 loc, dstType, rewriter.getFloatAttr(floatType, value)); 111 } 112 113 /// Utility function for bitfield ops: 114 /// - `BitFieldInsert` 115 /// - `BitFieldSExtract` 116 /// - `BitFieldUExtract` 117 /// Truncates or extends the value. If the bitwidth of the value is the same as 118 /// `llvmType` bitwidth, the value remains unchanged. 119 static Value optionallyTruncateOrExtend(Location loc, Value value, 120 Type llvmType, 121 PatternRewriter &rewriter) { 122 auto srcType = value.getType(); 123 unsigned targetBitWidth = getLLVMTypeBitWidth(llvmType); 124 unsigned valueBitWidth = LLVM::isCompatibleType(srcType) 125 ? getLLVMTypeBitWidth(srcType) 126 : getBitWidth(srcType); 127 128 if (valueBitWidth < targetBitWidth) 129 return rewriter.create<LLVM::ZExtOp>(loc, llvmType, value); 130 // If the bit widths of `Count` and `Offset` are greater than the bit width 131 // of the target type, they are truncated. Truncation is safe since `Count` 132 // and `Offset` must be no more than 64 for op behaviour to be defined. Hence, 133 // both values can be expressed in 8 bits. 134 if (valueBitWidth > targetBitWidth) 135 return rewriter.create<LLVM::TruncOp>(loc, llvmType, value); 136 return value; 137 } 138 139 /// Broadcasts the value to vector with `numElements` number of elements. 140 static Value broadcast(Location loc, Value toBroadcast, unsigned numElements, 141 LLVMTypeConverter &typeConverter, 142 ConversionPatternRewriter &rewriter) { 143 auto vectorType = VectorType::get(numElements, toBroadcast.getType()); 144 auto llvmVectorType = typeConverter.convertType(vectorType); 145 auto llvmI32Type = typeConverter.convertType(rewriter.getIntegerType(32)); 146 Value broadcasted = rewriter.create<LLVM::UndefOp>(loc, llvmVectorType); 147 for (unsigned i = 0; i < numElements; ++i) { 148 auto index = rewriter.create<LLVM::ConstantOp>( 149 loc, llvmI32Type, rewriter.getI32IntegerAttr(i)); 150 broadcasted = rewriter.create<LLVM::InsertElementOp>( 151 loc, llvmVectorType, broadcasted, toBroadcast, index); 152 } 153 return broadcasted; 154 } 155 156 /// Broadcasts the value. If `srcType` is a scalar, the value remains unchanged. 157 static Value optionallyBroadcast(Location loc, Value value, Type srcType, 158 LLVMTypeConverter &typeConverter, 159 ConversionPatternRewriter &rewriter) { 160 if (auto vectorType = srcType.dyn_cast<VectorType>()) { 161 unsigned numElements = vectorType.getNumElements(); 162 return broadcast(loc, value, numElements, typeConverter, rewriter); 163 } 164 return value; 165 } 166 167 /// Utility function for bitfield ops: `BitFieldInsert`, `BitFieldSExtract` and 168 /// `BitFieldUExtract`. 169 /// Broadcast `Offset` and `Count` to match the type of `Base`. If `Base` is of 170 /// a vector type, construct a vector that has: 171 /// - same number of elements as `Base` 172 /// - each element has the type that is the same as the type of `Offset` or 173 /// `Count` 174 /// - each element has the same value as `Offset` or `Count` 175 /// Then cast `Offset` and `Count` if their bit width is different 176 /// from `Base` bit width. 177 static Value processCountOrOffset(Location loc, Value value, Type srcType, 178 Type dstType, LLVMTypeConverter &converter, 179 ConversionPatternRewriter &rewriter) { 180 Value broadcasted = 181 optionallyBroadcast(loc, value, srcType, converter, rewriter); 182 return optionallyTruncateOrExtend(loc, broadcasted, dstType, rewriter); 183 } 184 185 /// Converts SPIR-V struct with a regular (according to `VulkanLayoutUtils`) 186 /// offset to LLVM struct. Otherwise, the conversion is not supported. 187 static Optional<Type> 188 convertStructTypeWithOffset(spirv::StructType type, 189 LLVMTypeConverter &converter) { 190 if (type != VulkanLayoutUtils::decorateType(type)) 191 return llvm::None; 192 193 auto elementsVector = llvm::to_vector<8>( 194 llvm::map_range(type.getElementTypes(), [&](Type elementType) { 195 return converter.convertType(elementType); 196 })); 197 return LLVM::LLVMStructType::getLiteral(type.getContext(), elementsVector, 198 /*isPacked=*/false); 199 } 200 201 /// Converts SPIR-V struct with no offset to packed LLVM struct. 202 static Type convertStructTypePacked(spirv::StructType type, 203 LLVMTypeConverter &converter) { 204 auto elementsVector = llvm::to_vector<8>( 205 llvm::map_range(type.getElementTypes(), [&](Type elementType) { 206 return converter.convertType(elementType); 207 })); 208 return LLVM::LLVMStructType::getLiteral(type.getContext(), elementsVector, 209 /*isPacked=*/true); 210 } 211 212 /// Creates LLVM dialect constant with the given value. 213 static Value createI32ConstantOf(Location loc, PatternRewriter &rewriter, 214 unsigned value) { 215 return rewriter.create<LLVM::ConstantOp>( 216 loc, IntegerType::get(rewriter.getContext(), 32), 217 rewriter.getIntegerAttr(rewriter.getI32Type(), value)); 218 } 219 220 /// Utility for `spv.Load` and `spv.Store` conversion. 221 static LogicalResult replaceWithLoadOrStore(Operation *op, 222 ConversionPatternRewriter &rewriter, 223 LLVMTypeConverter &typeConverter, 224 unsigned alignment, bool isVolatile, 225 bool isNonTemporal) { 226 if (auto loadOp = dyn_cast<spirv::LoadOp>(op)) { 227 auto dstType = typeConverter.convertType(loadOp.getType()); 228 if (!dstType) 229 return failure(); 230 rewriter.replaceOpWithNewOp<LLVM::LoadOp>( 231 loadOp, dstType, loadOp.ptr(), alignment, isVolatile, isNonTemporal); 232 return success(); 233 } 234 auto storeOp = cast<spirv::StoreOp>(op); 235 rewriter.replaceOpWithNewOp<LLVM::StoreOp>(storeOp, storeOp.value(), 236 storeOp.ptr(), alignment, 237 isVolatile, isNonTemporal); 238 return success(); 239 } 240 241 //===----------------------------------------------------------------------===// 242 // Type conversion 243 //===----------------------------------------------------------------------===// 244 245 /// Converts SPIR-V array type to LLVM array. Natural stride (according to 246 /// `VulkanLayoutUtils`) is also mapped to LLVM array. This has to be respected 247 /// when converting ops that manipulate array types. 248 static Optional<Type> convertArrayType(spirv::ArrayType type, 249 TypeConverter &converter) { 250 unsigned stride = type.getArrayStride(); 251 Type elementType = type.getElementType(); 252 auto sizeInBytes = elementType.cast<spirv::SPIRVType>().getSizeInBytes(); 253 if (stride != 0 && 254 !(sizeInBytes.hasValue() && sizeInBytes.getValue() == stride)) 255 return llvm::None; 256 257 auto llvmElementType = converter.convertType(elementType); 258 unsigned numElements = type.getNumElements(); 259 return LLVM::LLVMArrayType::get(llvmElementType, numElements); 260 } 261 262 /// Converts SPIR-V pointer type to LLVM pointer. Pointer's storage class is not 263 /// modelled at the moment. 264 static Type convertPointerType(spirv::PointerType type, 265 TypeConverter &converter) { 266 auto pointeeType = converter.convertType(type.getPointeeType()); 267 return LLVM::LLVMPointerType::get(pointeeType); 268 } 269 270 /// Converts SPIR-V runtime array to LLVM array. Since LLVM allows indexing over 271 /// the bounds, the runtime array is converted to a 0-sized LLVM array. There is 272 /// no modelling of array stride at the moment. 273 static Optional<Type> convertRuntimeArrayType(spirv::RuntimeArrayType type, 274 TypeConverter &converter) { 275 if (type.getArrayStride() != 0) 276 return llvm::None; 277 auto elementType = converter.convertType(type.getElementType()); 278 return LLVM::LLVMArrayType::get(elementType, 0); 279 } 280 281 /// Converts SPIR-V struct to LLVM struct. There is no support of structs with 282 /// member decorations. Also, only natural offset is supported. 283 static Optional<Type> convertStructType(spirv::StructType type, 284 LLVMTypeConverter &converter) { 285 SmallVector<spirv::StructType::MemberDecorationInfo, 4> memberDecorations; 286 type.getMemberDecorations(memberDecorations); 287 if (!memberDecorations.empty()) 288 return llvm::None; 289 if (type.hasOffset()) 290 return convertStructTypeWithOffset(type, converter); 291 return convertStructTypePacked(type, converter); 292 } 293 294 //===----------------------------------------------------------------------===// 295 // Operation conversion 296 //===----------------------------------------------------------------------===// 297 298 namespace { 299 300 class AccessChainPattern : public SPIRVToLLVMConversion<spirv::AccessChainOp> { 301 public: 302 using SPIRVToLLVMConversion<spirv::AccessChainOp>::SPIRVToLLVMConversion; 303 304 LogicalResult 305 matchAndRewrite(spirv::AccessChainOp op, OpAdaptor adaptor, 306 ConversionPatternRewriter &rewriter) const override { 307 auto dstType = typeConverter.convertType(op.component_ptr().getType()); 308 if (!dstType) 309 return failure(); 310 // To use GEP we need to add a first 0 index to go through the pointer. 311 auto indices = llvm::to_vector<4>(op.indices()); 312 Type indexType = op.indices().front().getType(); 313 auto llvmIndexType = typeConverter.convertType(indexType); 314 if (!llvmIndexType) 315 return failure(); 316 Value zero = rewriter.create<LLVM::ConstantOp>( 317 op.getLoc(), llvmIndexType, rewriter.getIntegerAttr(indexType, 0)); 318 indices.insert(indices.begin(), zero); 319 rewriter.replaceOpWithNewOp<LLVM::GEPOp>(op, dstType, op.base_ptr(), 320 indices); 321 return success(); 322 } 323 }; 324 325 class AddressOfPattern : public SPIRVToLLVMConversion<spirv::AddressOfOp> { 326 public: 327 using SPIRVToLLVMConversion<spirv::AddressOfOp>::SPIRVToLLVMConversion; 328 329 LogicalResult 330 matchAndRewrite(spirv::AddressOfOp op, OpAdaptor adaptor, 331 ConversionPatternRewriter &rewriter) const override { 332 auto dstType = typeConverter.convertType(op.pointer().getType()); 333 if (!dstType) 334 return failure(); 335 rewriter.replaceOpWithNewOp<LLVM::AddressOfOp>(op, dstType, op.variable()); 336 return success(); 337 } 338 }; 339 340 class BitFieldInsertPattern 341 : public SPIRVToLLVMConversion<spirv::BitFieldInsertOp> { 342 public: 343 using SPIRVToLLVMConversion<spirv::BitFieldInsertOp>::SPIRVToLLVMConversion; 344 345 LogicalResult 346 matchAndRewrite(spirv::BitFieldInsertOp op, OpAdaptor adaptor, 347 ConversionPatternRewriter &rewriter) const override { 348 auto srcType = op.getType(); 349 auto dstType = typeConverter.convertType(srcType); 350 if (!dstType) 351 return failure(); 352 Location loc = op.getLoc(); 353 354 // Process `Offset` and `Count`: broadcast and extend/truncate if needed. 355 Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType, 356 typeConverter, rewriter); 357 Value count = processCountOrOffset(loc, op.count(), srcType, dstType, 358 typeConverter, rewriter); 359 360 // Create a mask with bits set outside [Offset, Offset + Count - 1]. 361 Value minusOne = createConstantAllBitsSet(loc, srcType, dstType, rewriter); 362 Value maskShiftedByCount = 363 rewriter.create<LLVM::ShlOp>(loc, dstType, minusOne, count); 364 Value negated = rewriter.create<LLVM::XOrOp>(loc, dstType, 365 maskShiftedByCount, minusOne); 366 Value maskShiftedByCountAndOffset = 367 rewriter.create<LLVM::ShlOp>(loc, dstType, negated, offset); 368 Value mask = rewriter.create<LLVM::XOrOp>( 369 loc, dstType, maskShiftedByCountAndOffset, minusOne); 370 371 // Extract unchanged bits from the `Base` that are outside of 372 // [Offset, Offset + Count - 1]. Then `or` with shifted `Insert`. 373 Value baseAndMask = 374 rewriter.create<LLVM::AndOp>(loc, dstType, op.base(), mask); 375 Value insertShiftedByOffset = 376 rewriter.create<LLVM::ShlOp>(loc, dstType, op.insert(), offset); 377 rewriter.replaceOpWithNewOp<LLVM::OrOp>(op, dstType, baseAndMask, 378 insertShiftedByOffset); 379 return success(); 380 } 381 }; 382 383 /// Converts SPIR-V ConstantOp with scalar or vector type. 384 class ConstantScalarAndVectorPattern 385 : public SPIRVToLLVMConversion<spirv::ConstantOp> { 386 public: 387 using SPIRVToLLVMConversion<spirv::ConstantOp>::SPIRVToLLVMConversion; 388 389 LogicalResult 390 matchAndRewrite(spirv::ConstantOp constOp, OpAdaptor adaptor, 391 ConversionPatternRewriter &rewriter) const override { 392 auto srcType = constOp.getType(); 393 if (!srcType.isa<VectorType>() && !srcType.isIntOrFloat()) 394 return failure(); 395 396 auto dstType = typeConverter.convertType(srcType); 397 if (!dstType) 398 return failure(); 399 400 // SPIR-V constant can be a signed/unsigned integer, which has to be 401 // casted to signless integer when converting to LLVM dialect. Removing the 402 // sign bit may have unexpected behaviour. However, it is better to handle 403 // it case-by-case, given that the purpose of the conversion is not to 404 // cover all possible corner cases. 405 if (isSignedIntegerOrVector(srcType) || 406 isUnsignedIntegerOrVector(srcType)) { 407 auto signlessType = rewriter.getIntegerType(getBitWidth(srcType)); 408 409 if (srcType.isa<VectorType>()) { 410 auto dstElementsAttr = constOp.value().cast<DenseIntElementsAttr>(); 411 rewriter.replaceOpWithNewOp<LLVM::ConstantOp>( 412 constOp, dstType, 413 dstElementsAttr.mapValues( 414 signlessType, [&](const APInt &value) { return value; })); 415 return success(); 416 } 417 auto srcAttr = constOp.value().cast<IntegerAttr>(); 418 auto dstAttr = rewriter.getIntegerAttr(signlessType, srcAttr.getValue()); 419 rewriter.replaceOpWithNewOp<LLVM::ConstantOp>(constOp, dstType, dstAttr); 420 return success(); 421 } 422 rewriter.replaceOpWithNewOp<LLVM::ConstantOp>( 423 constOp, dstType, adaptor.getOperands(), constOp->getAttrs()); 424 return success(); 425 } 426 }; 427 428 class BitFieldSExtractPattern 429 : public SPIRVToLLVMConversion<spirv::BitFieldSExtractOp> { 430 public: 431 using SPIRVToLLVMConversion<spirv::BitFieldSExtractOp>::SPIRVToLLVMConversion; 432 433 LogicalResult 434 matchAndRewrite(spirv::BitFieldSExtractOp op, OpAdaptor adaptor, 435 ConversionPatternRewriter &rewriter) const override { 436 auto srcType = op.getType(); 437 auto dstType = typeConverter.convertType(srcType); 438 if (!dstType) 439 return failure(); 440 Location loc = op.getLoc(); 441 442 // Process `Offset` and `Count`: broadcast and extend/truncate if needed. 443 Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType, 444 typeConverter, rewriter); 445 Value count = processCountOrOffset(loc, op.count(), srcType, dstType, 446 typeConverter, rewriter); 447 448 // Create a constant that holds the size of the `Base`. 449 IntegerType integerType; 450 if (auto vecType = srcType.dyn_cast<VectorType>()) 451 integerType = vecType.getElementType().cast<IntegerType>(); 452 else 453 integerType = srcType.cast<IntegerType>(); 454 455 auto baseSize = rewriter.getIntegerAttr(integerType, getBitWidth(srcType)); 456 Value size = 457 srcType.isa<VectorType>() 458 ? rewriter.create<LLVM::ConstantOp>( 459 loc, dstType, 460 SplatElementsAttr::get(srcType.cast<ShapedType>(), baseSize)) 461 : rewriter.create<LLVM::ConstantOp>(loc, dstType, baseSize); 462 463 // Shift `Base` left by [sizeof(Base) - (Count + Offset)], so that the bit 464 // at Offset + Count - 1 is the most significant bit now. 465 Value countPlusOffset = 466 rewriter.create<LLVM::AddOp>(loc, dstType, count, offset); 467 Value amountToShiftLeft = 468 rewriter.create<LLVM::SubOp>(loc, dstType, size, countPlusOffset); 469 Value baseShiftedLeft = rewriter.create<LLVM::ShlOp>( 470 loc, dstType, op.base(), amountToShiftLeft); 471 472 // Shift the result right, filling the bits with the sign bit. 473 Value amountToShiftRight = 474 rewriter.create<LLVM::AddOp>(loc, dstType, offset, amountToShiftLeft); 475 rewriter.replaceOpWithNewOp<LLVM::AShrOp>(op, dstType, baseShiftedLeft, 476 amountToShiftRight); 477 return success(); 478 } 479 }; 480 481 class BitFieldUExtractPattern 482 : public SPIRVToLLVMConversion<spirv::BitFieldUExtractOp> { 483 public: 484 using SPIRVToLLVMConversion<spirv::BitFieldUExtractOp>::SPIRVToLLVMConversion; 485 486 LogicalResult 487 matchAndRewrite(spirv::BitFieldUExtractOp op, OpAdaptor adaptor, 488 ConversionPatternRewriter &rewriter) const override { 489 auto srcType = op.getType(); 490 auto dstType = typeConverter.convertType(srcType); 491 if (!dstType) 492 return failure(); 493 Location loc = op.getLoc(); 494 495 // Process `Offset` and `Count`: broadcast and extend/truncate if needed. 496 Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType, 497 typeConverter, rewriter); 498 Value count = processCountOrOffset(loc, op.count(), srcType, dstType, 499 typeConverter, rewriter); 500 501 // Create a mask with bits set at [0, Count - 1]. 502 Value minusOne = createConstantAllBitsSet(loc, srcType, dstType, rewriter); 503 Value maskShiftedByCount = 504 rewriter.create<LLVM::ShlOp>(loc, dstType, minusOne, count); 505 Value mask = rewriter.create<LLVM::XOrOp>(loc, dstType, maskShiftedByCount, 506 minusOne); 507 508 // Shift `Base` by `Offset` and apply the mask on it. 509 Value shiftedBase = 510 rewriter.create<LLVM::LShrOp>(loc, dstType, op.base(), offset); 511 rewriter.replaceOpWithNewOp<LLVM::AndOp>(op, dstType, shiftedBase, mask); 512 return success(); 513 } 514 }; 515 516 class BranchConversionPattern : public SPIRVToLLVMConversion<spirv::BranchOp> { 517 public: 518 using SPIRVToLLVMConversion<spirv::BranchOp>::SPIRVToLLVMConversion; 519 520 LogicalResult 521 matchAndRewrite(spirv::BranchOp branchOp, OpAdaptor adaptor, 522 ConversionPatternRewriter &rewriter) const override { 523 rewriter.replaceOpWithNewOp<LLVM::BrOp>(branchOp, adaptor.getOperands(), 524 branchOp.getTarget()); 525 return success(); 526 } 527 }; 528 529 class BranchConditionalConversionPattern 530 : public SPIRVToLLVMConversion<spirv::BranchConditionalOp> { 531 public: 532 using SPIRVToLLVMConversion< 533 spirv::BranchConditionalOp>::SPIRVToLLVMConversion; 534 535 LogicalResult 536 matchAndRewrite(spirv::BranchConditionalOp op, OpAdaptor adaptor, 537 ConversionPatternRewriter &rewriter) const override { 538 // If branch weights exist, map them to 32-bit integer vector. 539 ElementsAttr branchWeights = nullptr; 540 if (auto weights = op.branch_weights()) { 541 VectorType weightType = VectorType::get(2, rewriter.getI32Type()); 542 branchWeights = 543 DenseElementsAttr::get(weightType, weights.getValue().getValue()); 544 } 545 546 rewriter.replaceOpWithNewOp<LLVM::CondBrOp>( 547 op, op.condition(), op.getTrueBlockArguments(), 548 op.getFalseBlockArguments(), branchWeights, op.getTrueBlock(), 549 op.getFalseBlock()); 550 return success(); 551 } 552 }; 553 554 /// Converts `spv.CompositeExtract` to `llvm.extractvalue` if the container type 555 /// is an aggregate type (struct or array). Otherwise, converts to 556 /// `llvm.extractelement` that operates on vectors. 557 class CompositeExtractPattern 558 : public SPIRVToLLVMConversion<spirv::CompositeExtractOp> { 559 public: 560 using SPIRVToLLVMConversion<spirv::CompositeExtractOp>::SPIRVToLLVMConversion; 561 562 LogicalResult 563 matchAndRewrite(spirv::CompositeExtractOp op, OpAdaptor adaptor, 564 ConversionPatternRewriter &rewriter) const override { 565 auto dstType = this->typeConverter.convertType(op.getType()); 566 if (!dstType) 567 return failure(); 568 569 Type containerType = op.composite().getType(); 570 if (containerType.isa<VectorType>()) { 571 Location loc = op.getLoc(); 572 IntegerAttr value = op.indices()[0].cast<IntegerAttr>(); 573 Value index = createI32ConstantOf(loc, rewriter, value.getInt()); 574 rewriter.replaceOpWithNewOp<LLVM::ExtractElementOp>( 575 op, dstType, op.composite(), index); 576 return success(); 577 } 578 rewriter.replaceOpWithNewOp<LLVM::ExtractValueOp>( 579 op, dstType, op.composite(), op.indices()); 580 return success(); 581 } 582 }; 583 584 /// Converts `spv.CompositeInsert` to `llvm.insertvalue` if the container type 585 /// is an aggregate type (struct or array). Otherwise, converts to 586 /// `llvm.insertelement` that operates on vectors. 587 class CompositeInsertPattern 588 : public SPIRVToLLVMConversion<spirv::CompositeInsertOp> { 589 public: 590 using SPIRVToLLVMConversion<spirv::CompositeInsertOp>::SPIRVToLLVMConversion; 591 592 LogicalResult 593 matchAndRewrite(spirv::CompositeInsertOp op, OpAdaptor adaptor, 594 ConversionPatternRewriter &rewriter) const override { 595 auto dstType = this->typeConverter.convertType(op.getType()); 596 if (!dstType) 597 return failure(); 598 599 Type containerType = op.composite().getType(); 600 if (containerType.isa<VectorType>()) { 601 Location loc = op.getLoc(); 602 IntegerAttr value = op.indices()[0].cast<IntegerAttr>(); 603 Value index = createI32ConstantOf(loc, rewriter, value.getInt()); 604 rewriter.replaceOpWithNewOp<LLVM::InsertElementOp>( 605 op, dstType, op.composite(), op.object(), index); 606 return success(); 607 } 608 rewriter.replaceOpWithNewOp<LLVM::InsertValueOp>( 609 op, dstType, op.composite(), op.object(), op.indices()); 610 return success(); 611 } 612 }; 613 614 /// Converts SPIR-V operations that have straightforward LLVM equivalent 615 /// into LLVM dialect operations. 616 template <typename SPIRVOp, typename LLVMOp> 617 class DirectConversionPattern : public SPIRVToLLVMConversion<SPIRVOp> { 618 public: 619 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 620 621 LogicalResult 622 matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor, 623 ConversionPatternRewriter &rewriter) const override { 624 auto dstType = this->typeConverter.convertType(operation.getType()); 625 if (!dstType) 626 return failure(); 627 rewriter.template replaceOpWithNewOp<LLVMOp>( 628 operation, dstType, adaptor.getOperands(), operation->getAttrs()); 629 return success(); 630 } 631 }; 632 633 /// Converts `spv.ExecutionMode` into a global struct constant that holds 634 /// execution mode information. 635 class ExecutionModePattern 636 : public SPIRVToLLVMConversion<spirv::ExecutionModeOp> { 637 public: 638 using SPIRVToLLVMConversion<spirv::ExecutionModeOp>::SPIRVToLLVMConversion; 639 640 LogicalResult 641 matchAndRewrite(spirv::ExecutionModeOp op, OpAdaptor adaptor, 642 ConversionPatternRewriter &rewriter) const override { 643 // First, create the global struct's name that would be associated with 644 // this entry point's execution mode. We set it to be: 645 // __spv__{SPIR-V module name}_{function name}_execution_mode_info_{mode} 646 ModuleOp module = op->getParentOfType<ModuleOp>(); 647 IntegerAttr executionModeAttr = op.execution_modeAttr(); 648 std::string moduleName; 649 if (module.getName().hasValue()) 650 moduleName = "_" + module.getName().getValue().str(); 651 else 652 moduleName = ""; 653 std::string executionModeInfoName = 654 llvm::formatv("__spv_{0}_{1}_execution_mode_info_{2}", moduleName, 655 op.fn().str(), executionModeAttr.getValue()); 656 657 MLIRContext *context = rewriter.getContext(); 658 OpBuilder::InsertionGuard guard(rewriter); 659 rewriter.setInsertionPointToStart(module.getBody()); 660 661 // Create a struct type, corresponding to the C struct below. 662 // struct { 663 // int32_t executionMode; 664 // int32_t values[]; // optional values 665 // }; 666 auto llvmI32Type = IntegerType::get(context, 32); 667 SmallVector<Type, 2> fields; 668 fields.push_back(llvmI32Type); 669 ArrayAttr values = op.values(); 670 if (!values.empty()) { 671 auto arrayType = LLVM::LLVMArrayType::get(llvmI32Type, values.size()); 672 fields.push_back(arrayType); 673 } 674 auto structType = LLVM::LLVMStructType::getLiteral(context, fields); 675 676 // Create `llvm.mlir.global` with initializer region containing one block. 677 auto global = rewriter.create<LLVM::GlobalOp>( 678 UnknownLoc::get(context), structType, /*isConstant=*/true, 679 LLVM::Linkage::External, executionModeInfoName, Attribute(), 680 /*alignment=*/0); 681 Location loc = global.getLoc(); 682 Region ®ion = global.getInitializerRegion(); 683 Block *block = rewriter.createBlock(®ion); 684 685 // Initialize the struct and set the execution mode value. 686 rewriter.setInsertionPoint(block, block->begin()); 687 Value structValue = rewriter.create<LLVM::UndefOp>(loc, structType); 688 Value executionMode = 689 rewriter.create<LLVM::ConstantOp>(loc, llvmI32Type, executionModeAttr); 690 structValue = rewriter.create<LLVM::InsertValueOp>( 691 loc, structType, structValue, executionMode, 692 ArrayAttr::get(context, 693 {rewriter.getIntegerAttr(rewriter.getI32Type(), 0)})); 694 695 // Insert extra operands if they exist into execution mode info struct. 696 for (unsigned i = 0, e = values.size(); i < e; ++i) { 697 auto attr = values.getValue()[i]; 698 Value entry = rewriter.create<LLVM::ConstantOp>(loc, llvmI32Type, attr); 699 structValue = rewriter.create<LLVM::InsertValueOp>( 700 loc, structType, structValue, entry, 701 ArrayAttr::get(context, 702 {rewriter.getIntegerAttr(rewriter.getI32Type(), 1), 703 rewriter.getIntegerAttr(rewriter.getI32Type(), i)})); 704 } 705 rewriter.create<LLVM::ReturnOp>(loc, ArrayRef<Value>({structValue})); 706 rewriter.eraseOp(op); 707 return success(); 708 } 709 }; 710 711 /// Converts `spv.GlobalVariable` to `llvm.mlir.global`. Note that SPIR-V global 712 /// returns a pointer, whereas in LLVM dialect the global holds an actual value. 713 /// This difference is handled by `spv.mlir.addressof` and 714 /// `llvm.mlir.addressof`ops that both return a pointer. 715 class GlobalVariablePattern 716 : public SPIRVToLLVMConversion<spirv::GlobalVariableOp> { 717 public: 718 using SPIRVToLLVMConversion<spirv::GlobalVariableOp>::SPIRVToLLVMConversion; 719 720 LogicalResult 721 matchAndRewrite(spirv::GlobalVariableOp op, OpAdaptor adaptor, 722 ConversionPatternRewriter &rewriter) const override { 723 // Currently, there is no support of initialization with a constant value in 724 // SPIR-V dialect. Specialization constants are not considered as well. 725 if (op.initializer()) 726 return failure(); 727 728 auto srcType = op.type().cast<spirv::PointerType>(); 729 auto dstType = typeConverter.convertType(srcType.getPointeeType()); 730 if (!dstType) 731 return failure(); 732 733 // Limit conversion to the current invocation only or `StorageBuffer` 734 // required by SPIR-V runner. 735 // This is okay because multiple invocations are not supported yet. 736 auto storageClass = srcType.getStorageClass(); 737 switch (storageClass) { 738 case spirv::StorageClass::Input: 739 case spirv::StorageClass::Private: 740 case spirv::StorageClass::Output: 741 case spirv::StorageClass::StorageBuffer: 742 case spirv::StorageClass::UniformConstant: 743 break; 744 default: 745 return failure(); 746 } 747 748 // LLVM dialect spec: "If the global value is a constant, storing into it is 749 // not allowed.". This corresponds to SPIR-V 'Input' and 'UniformConstant' 750 // storage class that is read-only. 751 bool isConstant = (storageClass == spirv::StorageClass::Input) || 752 (storageClass == spirv::StorageClass::UniformConstant); 753 // SPIR-V spec: "By default, functions and global variables are private to a 754 // module and cannot be accessed by other modules. However, a module may be 755 // written to export or import functions and global (module scope) 756 // variables.". Therefore, map 'Private' storage class to private linkage, 757 // 'Input' and 'Output' to external linkage. 758 auto linkage = storageClass == spirv::StorageClass::Private 759 ? LLVM::Linkage::Private 760 : LLVM::Linkage::External; 761 auto newGlobalOp = rewriter.replaceOpWithNewOp<LLVM::GlobalOp>( 762 op, dstType, isConstant, linkage, op.sym_name(), Attribute(), 763 /*alignment=*/0); 764 765 // Attach location attribute if applicable 766 if (op.locationAttr()) 767 newGlobalOp->setAttr(op.locationAttrName(), op.locationAttr()); 768 769 return success(); 770 } 771 }; 772 773 /// Converts SPIR-V cast ops that do not have straightforward LLVM 774 /// equivalent in LLVM dialect. 775 template <typename SPIRVOp, typename LLVMExtOp, typename LLVMTruncOp> 776 class IndirectCastPattern : public SPIRVToLLVMConversion<SPIRVOp> { 777 public: 778 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 779 780 LogicalResult 781 matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor, 782 ConversionPatternRewriter &rewriter) const override { 783 784 Type fromType = operation.operand().getType(); 785 Type toType = operation.getType(); 786 787 auto dstType = this->typeConverter.convertType(toType); 788 if (!dstType) 789 return failure(); 790 791 if (getBitWidth(fromType) < getBitWidth(toType)) { 792 rewriter.template replaceOpWithNewOp<LLVMExtOp>(operation, dstType, 793 adaptor.getOperands()); 794 return success(); 795 } 796 if (getBitWidth(fromType) > getBitWidth(toType)) { 797 rewriter.template replaceOpWithNewOp<LLVMTruncOp>(operation, dstType, 798 adaptor.getOperands()); 799 return success(); 800 } 801 return failure(); 802 } 803 }; 804 805 class FunctionCallPattern 806 : public SPIRVToLLVMConversion<spirv::FunctionCallOp> { 807 public: 808 using SPIRVToLLVMConversion<spirv::FunctionCallOp>::SPIRVToLLVMConversion; 809 810 LogicalResult 811 matchAndRewrite(spirv::FunctionCallOp callOp, OpAdaptor adaptor, 812 ConversionPatternRewriter &rewriter) const override { 813 if (callOp.getNumResults() == 0) { 814 rewriter.replaceOpWithNewOp<LLVM::CallOp>( 815 callOp, llvm::None, adaptor.getOperands(), callOp->getAttrs()); 816 return success(); 817 } 818 819 // Function returns a single result. 820 auto dstType = typeConverter.convertType(callOp.getType(0)); 821 rewriter.replaceOpWithNewOp<LLVM::CallOp>( 822 callOp, dstType, adaptor.getOperands(), callOp->getAttrs()); 823 return success(); 824 } 825 }; 826 827 /// Converts SPIR-V floating-point comparisons to llvm.fcmp "predicate" 828 template <typename SPIRVOp, LLVM::FCmpPredicate predicate> 829 class FComparePattern : public SPIRVToLLVMConversion<SPIRVOp> { 830 public: 831 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 832 833 LogicalResult 834 matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor, 835 ConversionPatternRewriter &rewriter) const override { 836 837 auto dstType = this->typeConverter.convertType(operation.getType()); 838 if (!dstType) 839 return failure(); 840 841 rewriter.template replaceOpWithNewOp<LLVM::FCmpOp>( 842 operation, dstType, predicate, operation.operand1(), 843 operation.operand2()); 844 return success(); 845 } 846 }; 847 848 /// Converts SPIR-V integer comparisons to llvm.icmp "predicate" 849 template <typename SPIRVOp, LLVM::ICmpPredicate predicate> 850 class IComparePattern : public SPIRVToLLVMConversion<SPIRVOp> { 851 public: 852 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 853 854 LogicalResult 855 matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor, 856 ConversionPatternRewriter &rewriter) const override { 857 858 auto dstType = this->typeConverter.convertType(operation.getType()); 859 if (!dstType) 860 return failure(); 861 862 rewriter.template replaceOpWithNewOp<LLVM::ICmpOp>( 863 operation, dstType, predicate, operation.operand1(), 864 operation.operand2()); 865 return success(); 866 } 867 }; 868 869 class InverseSqrtPattern 870 : public SPIRVToLLVMConversion<spirv::GLSLInverseSqrtOp> { 871 public: 872 using SPIRVToLLVMConversion<spirv::GLSLInverseSqrtOp>::SPIRVToLLVMConversion; 873 874 LogicalResult 875 matchAndRewrite(spirv::GLSLInverseSqrtOp op, OpAdaptor adaptor, 876 ConversionPatternRewriter &rewriter) const override { 877 auto srcType = op.getType(); 878 auto dstType = typeConverter.convertType(srcType); 879 if (!dstType) 880 return failure(); 881 882 Location loc = op.getLoc(); 883 Value one = createFPConstant(loc, srcType, dstType, rewriter, 1.0); 884 Value sqrt = rewriter.create<LLVM::SqrtOp>(loc, dstType, op.operand()); 885 rewriter.replaceOpWithNewOp<LLVM::FDivOp>(op, dstType, one, sqrt); 886 return success(); 887 } 888 }; 889 890 /// Converts `spv.Load` and `spv.Store` to LLVM dialect. 891 template <typename SPIRVOp> 892 class LoadStorePattern : public SPIRVToLLVMConversion<SPIRVOp> { 893 public: 894 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 895 896 LogicalResult 897 matchAndRewrite(SPIRVOp op, typename SPIRVOp::Adaptor adaptor, 898 ConversionPatternRewriter &rewriter) const override { 899 if (!op.memory_access().hasValue()) { 900 return replaceWithLoadOrStore( 901 op, rewriter, this->typeConverter, /*alignment=*/0, 902 /*isVolatile=*/false, /*isNonTemporal=*/false); 903 } 904 auto memoryAccess = op.memory_access().getValue(); 905 switch (memoryAccess) { 906 case spirv::MemoryAccess::Aligned: 907 case spirv::MemoryAccess::None: 908 case spirv::MemoryAccess::Nontemporal: 909 case spirv::MemoryAccess::Volatile: { 910 unsigned alignment = 911 memoryAccess == spirv::MemoryAccess::Aligned ? *op.alignment() : 0; 912 bool isNonTemporal = memoryAccess == spirv::MemoryAccess::Nontemporal; 913 bool isVolatile = memoryAccess == spirv::MemoryAccess::Volatile; 914 return replaceWithLoadOrStore(op, rewriter, this->typeConverter, 915 alignment, isVolatile, isNonTemporal); 916 } 917 default: 918 // There is no support of other memory access attributes. 919 return failure(); 920 } 921 } 922 }; 923 924 /// Converts `spv.Not` and `spv.LogicalNot` into LLVM dialect. 925 template <typename SPIRVOp> 926 class NotPattern : public SPIRVToLLVMConversion<SPIRVOp> { 927 public: 928 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 929 930 LogicalResult 931 matchAndRewrite(SPIRVOp notOp, typename SPIRVOp::Adaptor adaptor, 932 ConversionPatternRewriter &rewriter) const override { 933 auto srcType = notOp.getType(); 934 auto dstType = this->typeConverter.convertType(srcType); 935 if (!dstType) 936 return failure(); 937 938 Location loc = notOp.getLoc(); 939 IntegerAttr minusOne = minusOneIntegerAttribute(srcType, rewriter); 940 auto mask = srcType.template isa<VectorType>() 941 ? rewriter.create<LLVM::ConstantOp>( 942 loc, dstType, 943 SplatElementsAttr::get( 944 srcType.template cast<VectorType>(), minusOne)) 945 : rewriter.create<LLVM::ConstantOp>(loc, dstType, minusOne); 946 rewriter.template replaceOpWithNewOp<LLVM::XOrOp>(notOp, dstType, 947 notOp.operand(), mask); 948 return success(); 949 } 950 }; 951 952 /// A template pattern that erases the given `SPIRVOp`. 953 template <typename SPIRVOp> 954 class ErasePattern : public SPIRVToLLVMConversion<SPIRVOp> { 955 public: 956 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 957 958 LogicalResult 959 matchAndRewrite(SPIRVOp op, typename SPIRVOp::Adaptor adaptor, 960 ConversionPatternRewriter &rewriter) const override { 961 rewriter.eraseOp(op); 962 return success(); 963 } 964 }; 965 966 class ReturnPattern : public SPIRVToLLVMConversion<spirv::ReturnOp> { 967 public: 968 using SPIRVToLLVMConversion<spirv::ReturnOp>::SPIRVToLLVMConversion; 969 970 LogicalResult 971 matchAndRewrite(spirv::ReturnOp returnOp, OpAdaptor adaptor, 972 ConversionPatternRewriter &rewriter) const override { 973 rewriter.replaceOpWithNewOp<LLVM::ReturnOp>(returnOp, ArrayRef<Type>(), 974 ArrayRef<Value>()); 975 return success(); 976 } 977 }; 978 979 class ReturnValuePattern : public SPIRVToLLVMConversion<spirv::ReturnValueOp> { 980 public: 981 using SPIRVToLLVMConversion<spirv::ReturnValueOp>::SPIRVToLLVMConversion; 982 983 LogicalResult 984 matchAndRewrite(spirv::ReturnValueOp returnValueOp, OpAdaptor adaptor, 985 ConversionPatternRewriter &rewriter) const override { 986 rewriter.replaceOpWithNewOp<LLVM::ReturnOp>(returnValueOp, ArrayRef<Type>(), 987 adaptor.getOperands()); 988 return success(); 989 } 990 }; 991 992 /// Converts `spv.mlir.loop` to LLVM dialect. All blocks within selection should 993 /// be reachable for conversion to succeed. The structure of the loop in LLVM 994 /// dialect will be the following: 995 /// 996 /// +------------------------------------+ 997 /// | <code before spv.mlir.loop> | 998 /// | llvm.br ^header | 999 /// +------------------------------------+ 1000 /// | 1001 /// +----------------+ | 1002 /// | | | 1003 /// | V V 1004 /// | +------------------------------------+ 1005 /// | | ^header: | 1006 /// | | <header code> | 1007 /// | | llvm.cond_br %cond, ^body, ^exit | 1008 /// | +------------------------------------+ 1009 /// | | 1010 /// | |----------------------+ 1011 /// | | | 1012 /// | V | 1013 /// | +------------------------------------+ | 1014 /// | | ^body: | | 1015 /// | | <body code> | | 1016 /// | | llvm.br ^continue | | 1017 /// | +------------------------------------+ | 1018 /// | | | 1019 /// | V | 1020 /// | +------------------------------------+ | 1021 /// | | ^continue: | | 1022 /// | | <continue code> | | 1023 /// | | llvm.br ^header | | 1024 /// | +------------------------------------+ | 1025 /// | | | 1026 /// +---------------+ +----------------------+ 1027 /// | 1028 /// V 1029 /// +------------------------------------+ 1030 /// | ^exit: | 1031 /// | llvm.br ^remaining | 1032 /// +------------------------------------+ 1033 /// | 1034 /// V 1035 /// +------------------------------------+ 1036 /// | ^remaining: | 1037 /// | <code after spv.mlir.loop> | 1038 /// +------------------------------------+ 1039 /// 1040 class LoopPattern : public SPIRVToLLVMConversion<spirv::LoopOp> { 1041 public: 1042 using SPIRVToLLVMConversion<spirv::LoopOp>::SPIRVToLLVMConversion; 1043 1044 LogicalResult 1045 matchAndRewrite(spirv::LoopOp loopOp, OpAdaptor adaptor, 1046 ConversionPatternRewriter &rewriter) const override { 1047 // There is no support of loop control at the moment. 1048 if (loopOp.loop_control() != spirv::LoopControl::None) 1049 return failure(); 1050 1051 Location loc = loopOp.getLoc(); 1052 1053 // Split the current block after `spv.mlir.loop`. The remaining ops will be 1054 // used in `endBlock`. 1055 Block *currentBlock = rewriter.getBlock(); 1056 auto position = Block::iterator(loopOp); 1057 Block *endBlock = rewriter.splitBlock(currentBlock, position); 1058 1059 // Remove entry block and create a branch in the current block going to the 1060 // header block. 1061 Block *entryBlock = loopOp.getEntryBlock(); 1062 assert(entryBlock->getOperations().size() == 1); 1063 auto brOp = dyn_cast<spirv::BranchOp>(entryBlock->getOperations().front()); 1064 if (!brOp) 1065 return failure(); 1066 Block *headerBlock = loopOp.getHeaderBlock(); 1067 rewriter.setInsertionPointToEnd(currentBlock); 1068 rewriter.create<LLVM::BrOp>(loc, brOp.getBlockArguments(), headerBlock); 1069 rewriter.eraseBlock(entryBlock); 1070 1071 // Branch from merge block to end block. 1072 Block *mergeBlock = loopOp.getMergeBlock(); 1073 Operation *terminator = mergeBlock->getTerminator(); 1074 ValueRange terminatorOperands = terminator->getOperands(); 1075 rewriter.setInsertionPointToEnd(mergeBlock); 1076 rewriter.create<LLVM::BrOp>(loc, terminatorOperands, endBlock); 1077 1078 rewriter.inlineRegionBefore(loopOp.body(), endBlock); 1079 rewriter.replaceOp(loopOp, endBlock->getArguments()); 1080 return success(); 1081 } 1082 }; 1083 1084 /// Converts `spv.mlir.selection` with `spv.BranchConditional` in its header 1085 /// block. All blocks within selection should be reachable for conversion to 1086 /// succeed. 1087 class SelectionPattern : public SPIRVToLLVMConversion<spirv::SelectionOp> { 1088 public: 1089 using SPIRVToLLVMConversion<spirv::SelectionOp>::SPIRVToLLVMConversion; 1090 1091 LogicalResult 1092 matchAndRewrite(spirv::SelectionOp op, OpAdaptor adaptor, 1093 ConversionPatternRewriter &rewriter) const override { 1094 // There is no support for `Flatten` or `DontFlatten` selection control at 1095 // the moment. This are just compiler hints and can be performed during the 1096 // optimization passes. 1097 if (op.selection_control() != spirv::SelectionControl::None) 1098 return failure(); 1099 1100 // `spv.mlir.selection` should have at least two blocks: one selection 1101 // header block and one merge block. If no blocks are present, or control 1102 // flow branches straight to merge block (two blocks are present), the op is 1103 // redundant and it is erased. 1104 if (op.body().getBlocks().size() <= 2) { 1105 rewriter.eraseOp(op); 1106 return success(); 1107 } 1108 1109 Location loc = op.getLoc(); 1110 1111 // Split the current block after `spv.mlir.selection`. The remaining ops 1112 // will be used in `continueBlock`. 1113 auto *currentBlock = rewriter.getInsertionBlock(); 1114 rewriter.setInsertionPointAfter(op); 1115 auto position = rewriter.getInsertionPoint(); 1116 auto *continueBlock = rewriter.splitBlock(currentBlock, position); 1117 1118 // Extract conditional branch information from the header block. By SPIR-V 1119 // dialect spec, it should contain `spv.BranchConditional` or `spv.Switch` 1120 // op. Note that `spv.Switch op` is not supported at the moment in the 1121 // SPIR-V dialect. Remove this block when finished. 1122 auto *headerBlock = op.getHeaderBlock(); 1123 assert(headerBlock->getOperations().size() == 1); 1124 auto condBrOp = dyn_cast<spirv::BranchConditionalOp>( 1125 headerBlock->getOperations().front()); 1126 if (!condBrOp) 1127 return failure(); 1128 rewriter.eraseBlock(headerBlock); 1129 1130 // Branch from merge block to continue block. 1131 auto *mergeBlock = op.getMergeBlock(); 1132 Operation *terminator = mergeBlock->getTerminator(); 1133 ValueRange terminatorOperands = terminator->getOperands(); 1134 rewriter.setInsertionPointToEnd(mergeBlock); 1135 rewriter.create<LLVM::BrOp>(loc, terminatorOperands, continueBlock); 1136 1137 // Link current block to `true` and `false` blocks within the selection. 1138 Block *trueBlock = condBrOp.getTrueBlock(); 1139 Block *falseBlock = condBrOp.getFalseBlock(); 1140 rewriter.setInsertionPointToEnd(currentBlock); 1141 rewriter.create<LLVM::CondBrOp>(loc, condBrOp.condition(), trueBlock, 1142 condBrOp.trueTargetOperands(), falseBlock, 1143 condBrOp.falseTargetOperands()); 1144 1145 rewriter.inlineRegionBefore(op.body(), continueBlock); 1146 rewriter.replaceOp(op, continueBlock->getArguments()); 1147 return success(); 1148 } 1149 }; 1150 1151 /// Converts SPIR-V shift ops to LLVM shift ops. Since LLVM dialect 1152 /// puts a restriction on `Shift` and `Base` to have the same bit width, 1153 /// `Shift` is zero or sign extended to match this specification. Cases when 1154 /// `Shift` bit width > `Base` bit width are considered to be illegal. 1155 template <typename SPIRVOp, typename LLVMOp> 1156 class ShiftPattern : public SPIRVToLLVMConversion<SPIRVOp> { 1157 public: 1158 using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion; 1159 1160 LogicalResult 1161 matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor, 1162 ConversionPatternRewriter &rewriter) const override { 1163 1164 auto dstType = this->typeConverter.convertType(operation.getType()); 1165 if (!dstType) 1166 return failure(); 1167 1168 Type op1Type = operation.operand1().getType(); 1169 Type op2Type = operation.operand2().getType(); 1170 1171 if (op1Type == op2Type) { 1172 rewriter.template replaceOpWithNewOp<LLVMOp>(operation, dstType, 1173 adaptor.getOperands()); 1174 return success(); 1175 } 1176 1177 Location loc = operation.getLoc(); 1178 Value extended; 1179 if (isUnsignedIntegerOrVector(op2Type)) { 1180 extended = rewriter.template create<LLVM::ZExtOp>(loc, dstType, 1181 operation.operand2()); 1182 } else { 1183 extended = rewriter.template create<LLVM::SExtOp>(loc, dstType, 1184 operation.operand2()); 1185 } 1186 Value result = rewriter.template create<LLVMOp>( 1187 loc, dstType, operation.operand1(), extended); 1188 rewriter.replaceOp(operation, result); 1189 return success(); 1190 } 1191 }; 1192 1193 class TanPattern : public SPIRVToLLVMConversion<spirv::GLSLTanOp> { 1194 public: 1195 using SPIRVToLLVMConversion<spirv::GLSLTanOp>::SPIRVToLLVMConversion; 1196 1197 LogicalResult 1198 matchAndRewrite(spirv::GLSLTanOp tanOp, OpAdaptor adaptor, 1199 ConversionPatternRewriter &rewriter) const override { 1200 auto dstType = typeConverter.convertType(tanOp.getType()); 1201 if (!dstType) 1202 return failure(); 1203 1204 Location loc = tanOp.getLoc(); 1205 Value sin = rewriter.create<LLVM::SinOp>(loc, dstType, tanOp.operand()); 1206 Value cos = rewriter.create<LLVM::CosOp>(loc, dstType, tanOp.operand()); 1207 rewriter.replaceOpWithNewOp<LLVM::FDivOp>(tanOp, dstType, sin, cos); 1208 return success(); 1209 } 1210 }; 1211 1212 /// Convert `spv.Tanh` to 1213 /// 1214 /// exp(2x) - 1 1215 /// ----------- 1216 /// exp(2x) + 1 1217 /// 1218 class TanhPattern : public SPIRVToLLVMConversion<spirv::GLSLTanhOp> { 1219 public: 1220 using SPIRVToLLVMConversion<spirv::GLSLTanhOp>::SPIRVToLLVMConversion; 1221 1222 LogicalResult 1223 matchAndRewrite(spirv::GLSLTanhOp tanhOp, OpAdaptor adaptor, 1224 ConversionPatternRewriter &rewriter) const override { 1225 auto srcType = tanhOp.getType(); 1226 auto dstType = typeConverter.convertType(srcType); 1227 if (!dstType) 1228 return failure(); 1229 1230 Location loc = tanhOp.getLoc(); 1231 Value two = createFPConstant(loc, srcType, dstType, rewriter, 2.0); 1232 Value multiplied = 1233 rewriter.create<LLVM::FMulOp>(loc, dstType, two, tanhOp.operand()); 1234 Value exponential = rewriter.create<LLVM::ExpOp>(loc, dstType, multiplied); 1235 Value one = createFPConstant(loc, srcType, dstType, rewriter, 1.0); 1236 Value numerator = 1237 rewriter.create<LLVM::FSubOp>(loc, dstType, exponential, one); 1238 Value denominator = 1239 rewriter.create<LLVM::FAddOp>(loc, dstType, exponential, one); 1240 rewriter.replaceOpWithNewOp<LLVM::FDivOp>(tanhOp, dstType, numerator, 1241 denominator); 1242 return success(); 1243 } 1244 }; 1245 1246 class VariablePattern : public SPIRVToLLVMConversion<spirv::VariableOp> { 1247 public: 1248 using SPIRVToLLVMConversion<spirv::VariableOp>::SPIRVToLLVMConversion; 1249 1250 LogicalResult 1251 matchAndRewrite(spirv::VariableOp varOp, OpAdaptor adaptor, 1252 ConversionPatternRewriter &rewriter) const override { 1253 auto srcType = varOp.getType(); 1254 // Initialization is supported for scalars and vectors only. 1255 auto pointerTo = srcType.cast<spirv::PointerType>().getPointeeType(); 1256 auto init = varOp.initializer(); 1257 if (init && !pointerTo.isIntOrFloat() && !pointerTo.isa<VectorType>()) 1258 return failure(); 1259 1260 auto dstType = typeConverter.convertType(srcType); 1261 if (!dstType) 1262 return failure(); 1263 1264 Location loc = varOp.getLoc(); 1265 Value size = createI32ConstantOf(loc, rewriter, 1); 1266 if (!init) { 1267 rewriter.replaceOpWithNewOp<LLVM::AllocaOp>(varOp, dstType, size); 1268 return success(); 1269 } 1270 Value allocated = rewriter.create<LLVM::AllocaOp>(loc, dstType, size); 1271 rewriter.create<LLVM::StoreOp>(loc, init, allocated); 1272 rewriter.replaceOp(varOp, allocated); 1273 return success(); 1274 } 1275 }; 1276 1277 //===----------------------------------------------------------------------===// 1278 // FuncOp conversion 1279 //===----------------------------------------------------------------------===// 1280 1281 class FuncConversionPattern : public SPIRVToLLVMConversion<spirv::FuncOp> { 1282 public: 1283 using SPIRVToLLVMConversion<spirv::FuncOp>::SPIRVToLLVMConversion; 1284 1285 LogicalResult 1286 matchAndRewrite(spirv::FuncOp funcOp, OpAdaptor adaptor, 1287 ConversionPatternRewriter &rewriter) const override { 1288 1289 // Convert function signature. At the moment LLVMType converter is enough 1290 // for currently supported types. 1291 auto funcType = funcOp.getType(); 1292 TypeConverter::SignatureConversion signatureConverter( 1293 funcType.getNumInputs()); 1294 auto llvmType = typeConverter.convertFunctionSignature( 1295 funcOp.getType(), /*isVariadic=*/false, signatureConverter); 1296 if (!llvmType) 1297 return failure(); 1298 1299 // Create a new `LLVMFuncOp` 1300 Location loc = funcOp.getLoc(); 1301 StringRef name = funcOp.getName(); 1302 auto newFuncOp = rewriter.create<LLVM::LLVMFuncOp>(loc, name, llvmType); 1303 1304 // Convert SPIR-V Function Control to equivalent LLVM function attribute 1305 MLIRContext *context = funcOp.getContext(); 1306 switch (funcOp.function_control()) { 1307 #define DISPATCH(functionControl, llvmAttr) \ 1308 case functionControl: \ 1309 newFuncOp->setAttr("passthrough", ArrayAttr::get(context, {llvmAttr})); \ 1310 break; 1311 1312 DISPATCH(spirv::FunctionControl::Inline, 1313 StringAttr::get(context, "alwaysinline")); 1314 DISPATCH(spirv::FunctionControl::DontInline, 1315 StringAttr::get(context, "noinline")); 1316 DISPATCH(spirv::FunctionControl::Pure, 1317 StringAttr::get(context, "readonly")); 1318 DISPATCH(spirv::FunctionControl::Const, 1319 StringAttr::get(context, "readnone")); 1320 1321 #undef DISPATCH 1322 1323 // Default: if `spirv::FunctionControl::None`, then no attributes are 1324 // needed. 1325 default: 1326 break; 1327 } 1328 1329 rewriter.inlineRegionBefore(funcOp.getBody(), newFuncOp.getBody(), 1330 newFuncOp.end()); 1331 if (failed(rewriter.convertRegionTypes(&newFuncOp.getBody(), typeConverter, 1332 &signatureConverter))) { 1333 return failure(); 1334 } 1335 rewriter.eraseOp(funcOp); 1336 return success(); 1337 } 1338 }; 1339 1340 //===----------------------------------------------------------------------===// 1341 // ModuleOp conversion 1342 //===----------------------------------------------------------------------===// 1343 1344 class ModuleConversionPattern : public SPIRVToLLVMConversion<spirv::ModuleOp> { 1345 public: 1346 using SPIRVToLLVMConversion<spirv::ModuleOp>::SPIRVToLLVMConversion; 1347 1348 LogicalResult 1349 matchAndRewrite(spirv::ModuleOp spvModuleOp, OpAdaptor adaptor, 1350 ConversionPatternRewriter &rewriter) const override { 1351 1352 auto newModuleOp = 1353 rewriter.create<ModuleOp>(spvModuleOp.getLoc(), spvModuleOp.getName()); 1354 rewriter.inlineRegionBefore(spvModuleOp.getRegion(), newModuleOp.getBody()); 1355 1356 // Remove the terminator block that was automatically added by builder 1357 rewriter.eraseBlock(&newModuleOp.getBodyRegion().back()); 1358 rewriter.eraseOp(spvModuleOp); 1359 return success(); 1360 } 1361 }; 1362 1363 } // namespace 1364 1365 //===----------------------------------------------------------------------===// 1366 // Pattern population 1367 //===----------------------------------------------------------------------===// 1368 1369 void mlir::populateSPIRVToLLVMTypeConversion(LLVMTypeConverter &typeConverter) { 1370 typeConverter.addConversion([&](spirv::ArrayType type) { 1371 return convertArrayType(type, typeConverter); 1372 }); 1373 typeConverter.addConversion([&](spirv::PointerType type) { 1374 return convertPointerType(type, typeConverter); 1375 }); 1376 typeConverter.addConversion([&](spirv::RuntimeArrayType type) { 1377 return convertRuntimeArrayType(type, typeConverter); 1378 }); 1379 typeConverter.addConversion([&](spirv::StructType type) { 1380 return convertStructType(type, typeConverter); 1381 }); 1382 } 1383 1384 void mlir::populateSPIRVToLLVMConversionPatterns( 1385 LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) { 1386 patterns.add< 1387 // Arithmetic ops 1388 DirectConversionPattern<spirv::IAddOp, LLVM::AddOp>, 1389 DirectConversionPattern<spirv::IMulOp, LLVM::MulOp>, 1390 DirectConversionPattern<spirv::ISubOp, LLVM::SubOp>, 1391 DirectConversionPattern<spirv::FAddOp, LLVM::FAddOp>, 1392 DirectConversionPattern<spirv::FDivOp, LLVM::FDivOp>, 1393 DirectConversionPattern<spirv::FMulOp, LLVM::FMulOp>, 1394 DirectConversionPattern<spirv::FNegateOp, LLVM::FNegOp>, 1395 DirectConversionPattern<spirv::FRemOp, LLVM::FRemOp>, 1396 DirectConversionPattern<spirv::FSubOp, LLVM::FSubOp>, 1397 DirectConversionPattern<spirv::SDivOp, LLVM::SDivOp>, 1398 DirectConversionPattern<spirv::SRemOp, LLVM::SRemOp>, 1399 DirectConversionPattern<spirv::UDivOp, LLVM::UDivOp>, 1400 DirectConversionPattern<spirv::UModOp, LLVM::URemOp>, 1401 1402 // Bitwise ops 1403 BitFieldInsertPattern, BitFieldUExtractPattern, BitFieldSExtractPattern, 1404 DirectConversionPattern<spirv::BitCountOp, LLVM::CtPopOp>, 1405 DirectConversionPattern<spirv::BitReverseOp, LLVM::BitReverseOp>, 1406 DirectConversionPattern<spirv::BitwiseAndOp, LLVM::AndOp>, 1407 DirectConversionPattern<spirv::BitwiseOrOp, LLVM::OrOp>, 1408 DirectConversionPattern<spirv::BitwiseXorOp, LLVM::XOrOp>, 1409 NotPattern<spirv::NotOp>, 1410 1411 // Cast ops 1412 DirectConversionPattern<spirv::BitcastOp, LLVM::BitcastOp>, 1413 DirectConversionPattern<spirv::ConvertFToSOp, LLVM::FPToSIOp>, 1414 DirectConversionPattern<spirv::ConvertFToUOp, LLVM::FPToUIOp>, 1415 DirectConversionPattern<spirv::ConvertSToFOp, LLVM::SIToFPOp>, 1416 DirectConversionPattern<spirv::ConvertUToFOp, LLVM::UIToFPOp>, 1417 IndirectCastPattern<spirv::FConvertOp, LLVM::FPExtOp, LLVM::FPTruncOp>, 1418 IndirectCastPattern<spirv::SConvertOp, LLVM::SExtOp, LLVM::TruncOp>, 1419 IndirectCastPattern<spirv::UConvertOp, LLVM::ZExtOp, LLVM::TruncOp>, 1420 1421 // Comparison ops 1422 IComparePattern<spirv::IEqualOp, LLVM::ICmpPredicate::eq>, 1423 IComparePattern<spirv::INotEqualOp, LLVM::ICmpPredicate::ne>, 1424 FComparePattern<spirv::FOrdEqualOp, LLVM::FCmpPredicate::oeq>, 1425 FComparePattern<spirv::FOrdGreaterThanOp, LLVM::FCmpPredicate::ogt>, 1426 FComparePattern<spirv::FOrdGreaterThanEqualOp, LLVM::FCmpPredicate::oge>, 1427 FComparePattern<spirv::FOrdLessThanEqualOp, LLVM::FCmpPredicate::ole>, 1428 FComparePattern<spirv::FOrdLessThanOp, LLVM::FCmpPredicate::olt>, 1429 FComparePattern<spirv::FOrdNotEqualOp, LLVM::FCmpPredicate::one>, 1430 FComparePattern<spirv::FUnordEqualOp, LLVM::FCmpPredicate::ueq>, 1431 FComparePattern<spirv::FUnordGreaterThanOp, LLVM::FCmpPredicate::ugt>, 1432 FComparePattern<spirv::FUnordGreaterThanEqualOp, 1433 LLVM::FCmpPredicate::uge>, 1434 FComparePattern<spirv::FUnordLessThanEqualOp, LLVM::FCmpPredicate::ule>, 1435 FComparePattern<spirv::FUnordLessThanOp, LLVM::FCmpPredicate::ult>, 1436 FComparePattern<spirv::FUnordNotEqualOp, LLVM::FCmpPredicate::une>, 1437 IComparePattern<spirv::SGreaterThanOp, LLVM::ICmpPredicate::sgt>, 1438 IComparePattern<spirv::SGreaterThanEqualOp, LLVM::ICmpPredicate::sge>, 1439 IComparePattern<spirv::SLessThanEqualOp, LLVM::ICmpPredicate::sle>, 1440 IComparePattern<spirv::SLessThanOp, LLVM::ICmpPredicate::slt>, 1441 IComparePattern<spirv::UGreaterThanOp, LLVM::ICmpPredicate::ugt>, 1442 IComparePattern<spirv::UGreaterThanEqualOp, LLVM::ICmpPredicate::uge>, 1443 IComparePattern<spirv::ULessThanEqualOp, LLVM::ICmpPredicate::ule>, 1444 IComparePattern<spirv::ULessThanOp, LLVM::ICmpPredicate::ult>, 1445 1446 // Constant op 1447 ConstantScalarAndVectorPattern, 1448 1449 // Control Flow ops 1450 BranchConversionPattern, BranchConditionalConversionPattern, 1451 FunctionCallPattern, LoopPattern, SelectionPattern, 1452 ErasePattern<spirv::MergeOp>, 1453 1454 // Entry points and execution mode are handled separately. 1455 ErasePattern<spirv::EntryPointOp>, ExecutionModePattern, 1456 1457 // GLSL extended instruction set ops 1458 DirectConversionPattern<spirv::GLSLCeilOp, LLVM::FCeilOp>, 1459 DirectConversionPattern<spirv::GLSLCosOp, LLVM::CosOp>, 1460 DirectConversionPattern<spirv::GLSLExpOp, LLVM::ExpOp>, 1461 DirectConversionPattern<spirv::GLSLFAbsOp, LLVM::FAbsOp>, 1462 DirectConversionPattern<spirv::GLSLFloorOp, LLVM::FFloorOp>, 1463 DirectConversionPattern<spirv::GLSLFMaxOp, LLVM::MaxNumOp>, 1464 DirectConversionPattern<spirv::GLSLFMinOp, LLVM::MinNumOp>, 1465 DirectConversionPattern<spirv::GLSLLogOp, LLVM::LogOp>, 1466 DirectConversionPattern<spirv::GLSLSinOp, LLVM::SinOp>, 1467 DirectConversionPattern<spirv::GLSLSMaxOp, LLVM::SMaxOp>, 1468 DirectConversionPattern<spirv::GLSLSMinOp, LLVM::SMinOp>, 1469 DirectConversionPattern<spirv::GLSLSqrtOp, LLVM::SqrtOp>, 1470 InverseSqrtPattern, TanPattern, TanhPattern, 1471 1472 // Logical ops 1473 DirectConversionPattern<spirv::LogicalAndOp, LLVM::AndOp>, 1474 DirectConversionPattern<spirv::LogicalOrOp, LLVM::OrOp>, 1475 IComparePattern<spirv::LogicalEqualOp, LLVM::ICmpPredicate::eq>, 1476 IComparePattern<spirv::LogicalNotEqualOp, LLVM::ICmpPredicate::ne>, 1477 NotPattern<spirv::LogicalNotOp>, 1478 1479 // Memory ops 1480 AccessChainPattern, AddressOfPattern, GlobalVariablePattern, 1481 LoadStorePattern<spirv::LoadOp>, LoadStorePattern<spirv::StoreOp>, 1482 VariablePattern, 1483 1484 // Miscellaneous ops 1485 CompositeExtractPattern, CompositeInsertPattern, 1486 DirectConversionPattern<spirv::SelectOp, LLVM::SelectOp>, 1487 DirectConversionPattern<spirv::UndefOp, LLVM::UndefOp>, 1488 1489 // Shift ops 1490 ShiftPattern<spirv::ShiftRightArithmeticOp, LLVM::AShrOp>, 1491 ShiftPattern<spirv::ShiftRightLogicalOp, LLVM::LShrOp>, 1492 ShiftPattern<spirv::ShiftLeftLogicalOp, LLVM::ShlOp>, 1493 1494 // Return ops 1495 ReturnPattern, ReturnValuePattern>(patterns.getContext(), typeConverter); 1496 } 1497 1498 void mlir::populateSPIRVToLLVMFunctionConversionPatterns( 1499 LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) { 1500 patterns.add<FuncConversionPattern>(patterns.getContext(), typeConverter); 1501 } 1502 1503 void mlir::populateSPIRVToLLVMModuleConversionPatterns( 1504 LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) { 1505 patterns.add<ModuleConversionPattern>(patterns.getContext(), typeConverter); 1506 } 1507 1508 //===----------------------------------------------------------------------===// 1509 // Pre-conversion hooks 1510 //===----------------------------------------------------------------------===// 1511 1512 /// Hook for descriptor set and binding number encoding. 1513 static constexpr StringRef kBinding = "binding"; 1514 static constexpr StringRef kDescriptorSet = "descriptor_set"; 1515 void mlir::encodeBindAttribute(ModuleOp module) { 1516 auto spvModules = module.getOps<spirv::ModuleOp>(); 1517 for (auto spvModule : spvModules) { 1518 spvModule.walk([&](spirv::GlobalVariableOp op) { 1519 IntegerAttr descriptorSet = 1520 op->getAttrOfType<IntegerAttr>(kDescriptorSet); 1521 IntegerAttr binding = op->getAttrOfType<IntegerAttr>(kBinding); 1522 // For every global variable in the module, get the ones with descriptor 1523 // set and binding numbers. 1524 if (descriptorSet && binding) { 1525 // Encode these numbers into the variable's symbolic name. If the 1526 // SPIR-V module has a name, add it at the beginning. 1527 auto moduleAndName = spvModule.getName().hasValue() 1528 ? spvModule.getName().getValue().str() + "_" + 1529 op.sym_name().str() 1530 : op.sym_name().str(); 1531 std::string name = 1532 llvm::formatv("{0}_descriptor_set{1}_binding{2}", moduleAndName, 1533 std::to_string(descriptorSet.getInt()), 1534 std::to_string(binding.getInt())); 1535 auto nameAttr = StringAttr::get(op->getContext(), name); 1536 1537 // Replace all symbol uses and set the new symbol name. Finally, remove 1538 // descriptor set and binding attributes. 1539 if (failed(SymbolTable::replaceAllSymbolUses(op, nameAttr, spvModule))) 1540 op.emitError("unable to replace all symbol uses for ") << name; 1541 SymbolTable::setSymbolName(op, nameAttr); 1542 op->removeAttr(kDescriptorSet); 1543 op->removeAttr(kBinding); 1544 } 1545 }); 1546 } 1547 } 1548