1 //===- SPIRVToLLVM.cpp - SPIR-V to LLVM Patterns --------------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file implements patterns to convert SPIR-V dialect to LLVM dialect.
10 //
11 //===----------------------------------------------------------------------===//
12 
13 #include "mlir/Conversion/SPIRVToLLVM/SPIRVToLLVM.h"
14 #include "mlir/Conversion/LLVMCommon/Pattern.h"
15 #include "mlir/Conversion/LLVMCommon/TypeConverter.h"
16 #include "mlir/Dialect/LLVMIR/LLVMDialect.h"
17 #include "mlir/Dialect/SPIRV/IR/SPIRVDialect.h"
18 #include "mlir/Dialect/SPIRV/IR/SPIRVOps.h"
19 #include "mlir/Dialect/SPIRV/Utils/LayoutUtils.h"
20 #include "mlir/Dialect/StandardOps/IR/Ops.h"
21 #include "mlir/IR/BuiltinOps.h"
22 #include "mlir/IR/PatternMatch.h"
23 #include "mlir/Support/LogicalResult.h"
24 #include "mlir/Transforms/DialectConversion.h"
25 #include "llvm/Support/Debug.h"
26 #include "llvm/Support/FormatVariadic.h"
27 
28 #define DEBUG_TYPE "spirv-to-llvm-pattern"
29 
30 using namespace mlir;
31 
32 //===----------------------------------------------------------------------===//
33 // Utility functions
34 //===----------------------------------------------------------------------===//
35 
36 /// Returns true if the given type is a signed integer or vector type.
37 static bool isSignedIntegerOrVector(Type type) {
38   if (type.isSignedInteger())
39     return true;
40   if (auto vecType = type.dyn_cast<VectorType>())
41     return vecType.getElementType().isSignedInteger();
42   return false;
43 }
44 
45 /// Returns true if the given type is an unsigned integer or vector type
46 static bool isUnsignedIntegerOrVector(Type type) {
47   if (type.isUnsignedInteger())
48     return true;
49   if (auto vecType = type.dyn_cast<VectorType>())
50     return vecType.getElementType().isUnsignedInteger();
51   return false;
52 }
53 
54 /// Returns the bit width of integer, float or vector of float or integer values
55 static unsigned getBitWidth(Type type) {
56   assert((type.isIntOrFloat() || type.isa<VectorType>()) &&
57          "bitwidth is not supported for this type");
58   if (type.isIntOrFloat())
59     return type.getIntOrFloatBitWidth();
60   auto vecType = type.dyn_cast<VectorType>();
61   auto elementType = vecType.getElementType();
62   assert(elementType.isIntOrFloat() &&
63          "only integers and floats have a bitwidth");
64   return elementType.getIntOrFloatBitWidth();
65 }
66 
67 /// Returns the bit width of LLVMType integer or vector.
68 static unsigned getLLVMTypeBitWidth(Type type) {
69   return (LLVM::isCompatibleVectorType(type) ? LLVM::getVectorElementType(type)
70                                              : type)
71       .cast<IntegerType>()
72       .getWidth();
73 }
74 
75 /// Creates `IntegerAttribute` with all bits set for given type
76 static IntegerAttr minusOneIntegerAttribute(Type type, Builder builder) {
77   if (auto vecType = type.dyn_cast<VectorType>()) {
78     auto integerType = vecType.getElementType().cast<IntegerType>();
79     return builder.getIntegerAttr(integerType, -1);
80   }
81   auto integerType = type.cast<IntegerType>();
82   return builder.getIntegerAttr(integerType, -1);
83 }
84 
85 /// Creates `llvm.mlir.constant` with all bits set for the given type.
86 static Value createConstantAllBitsSet(Location loc, Type srcType, Type dstType,
87                                       PatternRewriter &rewriter) {
88   if (srcType.isa<VectorType>()) {
89     return rewriter.create<LLVM::ConstantOp>(
90         loc, dstType,
91         SplatElementsAttr::get(srcType.cast<ShapedType>(),
92                                minusOneIntegerAttribute(srcType, rewriter)));
93   }
94   return rewriter.create<LLVM::ConstantOp>(
95       loc, dstType, minusOneIntegerAttribute(srcType, rewriter));
96 }
97 
98 /// Creates `llvm.mlir.constant` with a floating-point scalar or vector value.
99 static Value createFPConstant(Location loc, Type srcType, Type dstType,
100                               PatternRewriter &rewriter, double value) {
101   if (auto vecType = srcType.dyn_cast<VectorType>()) {
102     auto floatType = vecType.getElementType().cast<FloatType>();
103     return rewriter.create<LLVM::ConstantOp>(
104         loc, dstType,
105         SplatElementsAttr::get(vecType,
106                                rewriter.getFloatAttr(floatType, value)));
107   }
108   auto floatType = srcType.cast<FloatType>();
109   return rewriter.create<LLVM::ConstantOp>(
110       loc, dstType, rewriter.getFloatAttr(floatType, value));
111 }
112 
113 /// Utility function for bitfield ops:
114 ///   - `BitFieldInsert`
115 ///   - `BitFieldSExtract`
116 ///   - `BitFieldUExtract`
117 /// Truncates or extends the value. If the bitwidth of the value is the same as
118 /// `llvmType` bitwidth, the value remains unchanged.
119 static Value optionallyTruncateOrExtend(Location loc, Value value,
120                                         Type llvmType,
121                                         PatternRewriter &rewriter) {
122   auto srcType = value.getType();
123   unsigned targetBitWidth = getLLVMTypeBitWidth(llvmType);
124   unsigned valueBitWidth = LLVM::isCompatibleType(srcType)
125                                ? getLLVMTypeBitWidth(srcType)
126                                : getBitWidth(srcType);
127 
128   if (valueBitWidth < targetBitWidth)
129     return rewriter.create<LLVM::ZExtOp>(loc, llvmType, value);
130   // If the bit widths of `Count` and `Offset` are greater than the bit width
131   // of the target type, they are truncated. Truncation is safe since `Count`
132   // and `Offset` must be no more than 64 for op behaviour to be defined. Hence,
133   // both values can be expressed in 8 bits.
134   if (valueBitWidth > targetBitWidth)
135     return rewriter.create<LLVM::TruncOp>(loc, llvmType, value);
136   return value;
137 }
138 
139 /// Broadcasts the value to vector with `numElements` number of elements.
140 static Value broadcast(Location loc, Value toBroadcast, unsigned numElements,
141                        LLVMTypeConverter &typeConverter,
142                        ConversionPatternRewriter &rewriter) {
143   auto vectorType = VectorType::get(numElements, toBroadcast.getType());
144   auto llvmVectorType = typeConverter.convertType(vectorType);
145   auto llvmI32Type = typeConverter.convertType(rewriter.getIntegerType(32));
146   Value broadcasted = rewriter.create<LLVM::UndefOp>(loc, llvmVectorType);
147   for (unsigned i = 0; i < numElements; ++i) {
148     auto index = rewriter.create<LLVM::ConstantOp>(
149         loc, llvmI32Type, rewriter.getI32IntegerAttr(i));
150     broadcasted = rewriter.create<LLVM::InsertElementOp>(
151         loc, llvmVectorType, broadcasted, toBroadcast, index);
152   }
153   return broadcasted;
154 }
155 
156 /// Broadcasts the value. If `srcType` is a scalar, the value remains unchanged.
157 static Value optionallyBroadcast(Location loc, Value value, Type srcType,
158                                  LLVMTypeConverter &typeConverter,
159                                  ConversionPatternRewriter &rewriter) {
160   if (auto vectorType = srcType.dyn_cast<VectorType>()) {
161     unsigned numElements = vectorType.getNumElements();
162     return broadcast(loc, value, numElements, typeConverter, rewriter);
163   }
164   return value;
165 }
166 
167 /// Utility function for bitfield ops: `BitFieldInsert`, `BitFieldSExtract` and
168 /// `BitFieldUExtract`.
169 /// Broadcast `Offset` and `Count` to match the type of `Base`. If `Base` is of
170 /// a vector type, construct a vector that has:
171 ///  - same number of elements as `Base`
172 ///  - each element has the type that is the same as the type of `Offset` or
173 ///    `Count`
174 ///  - each element has the same value as `Offset` or `Count`
175 /// Then cast `Offset` and `Count` if their bit width is different
176 /// from `Base` bit width.
177 static Value processCountOrOffset(Location loc, Value value, Type srcType,
178                                   Type dstType, LLVMTypeConverter &converter,
179                                   ConversionPatternRewriter &rewriter) {
180   Value broadcasted =
181       optionallyBroadcast(loc, value, srcType, converter, rewriter);
182   return optionallyTruncateOrExtend(loc, broadcasted, dstType, rewriter);
183 }
184 
185 /// Converts SPIR-V struct with a regular (according to `VulkanLayoutUtils`)
186 /// offset to LLVM struct. Otherwise, the conversion is not supported.
187 static Optional<Type>
188 convertStructTypeWithOffset(spirv::StructType type,
189                             LLVMTypeConverter &converter) {
190   if (type != VulkanLayoutUtils::decorateType(type))
191     return llvm::None;
192 
193   auto elementsVector = llvm::to_vector<8>(
194       llvm::map_range(type.getElementTypes(), [&](Type elementType) {
195         return converter.convertType(elementType);
196       }));
197   return LLVM::LLVMStructType::getLiteral(type.getContext(), elementsVector,
198                                           /*isPacked=*/false);
199 }
200 
201 /// Converts SPIR-V struct with no offset to packed LLVM struct.
202 static Type convertStructTypePacked(spirv::StructType type,
203                                     LLVMTypeConverter &converter) {
204   auto elementsVector = llvm::to_vector<8>(
205       llvm::map_range(type.getElementTypes(), [&](Type elementType) {
206         return converter.convertType(elementType);
207       }));
208   return LLVM::LLVMStructType::getLiteral(type.getContext(), elementsVector,
209                                           /*isPacked=*/true);
210 }
211 
212 /// Creates LLVM dialect constant with the given value.
213 static Value createI32ConstantOf(Location loc, PatternRewriter &rewriter,
214                                  unsigned value) {
215   return rewriter.create<LLVM::ConstantOp>(
216       loc, IntegerType::get(rewriter.getContext(), 32),
217       rewriter.getIntegerAttr(rewriter.getI32Type(), value));
218 }
219 
220 /// Utility for `spv.Load` and `spv.Store` conversion.
221 static LogicalResult replaceWithLoadOrStore(Operation *op,
222                                             ConversionPatternRewriter &rewriter,
223                                             LLVMTypeConverter &typeConverter,
224                                             unsigned alignment, bool isVolatile,
225                                             bool isNonTemporal) {
226   if (auto loadOp = dyn_cast<spirv::LoadOp>(op)) {
227     auto dstType = typeConverter.convertType(loadOp.getType());
228     if (!dstType)
229       return failure();
230     rewriter.replaceOpWithNewOp<LLVM::LoadOp>(
231         loadOp, dstType, loadOp.ptr(), alignment, isVolatile, isNonTemporal);
232     return success();
233   }
234   auto storeOp = cast<spirv::StoreOp>(op);
235   rewriter.replaceOpWithNewOp<LLVM::StoreOp>(storeOp, storeOp.value(),
236                                              storeOp.ptr(), alignment,
237                                              isVolatile, isNonTemporal);
238   return success();
239 }
240 
241 //===----------------------------------------------------------------------===//
242 // Type conversion
243 //===----------------------------------------------------------------------===//
244 
245 /// Converts SPIR-V array type to LLVM array. Natural stride (according to
246 /// `VulkanLayoutUtils`) is also mapped to LLVM array. This has to be respected
247 /// when converting ops that manipulate array types.
248 static Optional<Type> convertArrayType(spirv::ArrayType type,
249                                        TypeConverter &converter) {
250   unsigned stride = type.getArrayStride();
251   Type elementType = type.getElementType();
252   auto sizeInBytes = elementType.cast<spirv::SPIRVType>().getSizeInBytes();
253   if (stride != 0 &&
254       !(sizeInBytes.hasValue() && sizeInBytes.getValue() == stride))
255     return llvm::None;
256 
257   auto llvmElementType = converter.convertType(elementType);
258   unsigned numElements = type.getNumElements();
259   return LLVM::LLVMArrayType::get(llvmElementType, numElements);
260 }
261 
262 /// Converts SPIR-V pointer type to LLVM pointer. Pointer's storage class is not
263 /// modelled at the moment.
264 static Type convertPointerType(spirv::PointerType type,
265                                TypeConverter &converter) {
266   auto pointeeType = converter.convertType(type.getPointeeType());
267   return LLVM::LLVMPointerType::get(pointeeType);
268 }
269 
270 /// Converts SPIR-V runtime array to LLVM array. Since LLVM allows indexing over
271 /// the bounds, the runtime array is converted to a 0-sized LLVM array. There is
272 /// no modelling of array stride at the moment.
273 static Optional<Type> convertRuntimeArrayType(spirv::RuntimeArrayType type,
274                                               TypeConverter &converter) {
275   if (type.getArrayStride() != 0)
276     return llvm::None;
277   auto elementType = converter.convertType(type.getElementType());
278   return LLVM::LLVMArrayType::get(elementType, 0);
279 }
280 
281 /// Converts SPIR-V struct to LLVM struct. There is no support of structs with
282 /// member decorations. Also, only natural offset is supported.
283 static Optional<Type> convertStructType(spirv::StructType type,
284                                         LLVMTypeConverter &converter) {
285   SmallVector<spirv::StructType::MemberDecorationInfo, 4> memberDecorations;
286   type.getMemberDecorations(memberDecorations);
287   if (!memberDecorations.empty())
288     return llvm::None;
289   if (type.hasOffset())
290     return convertStructTypeWithOffset(type, converter);
291   return convertStructTypePacked(type, converter);
292 }
293 
294 //===----------------------------------------------------------------------===//
295 // Operation conversion
296 //===----------------------------------------------------------------------===//
297 
298 namespace {
299 
300 class AccessChainPattern : public SPIRVToLLVMConversion<spirv::AccessChainOp> {
301 public:
302   using SPIRVToLLVMConversion<spirv::AccessChainOp>::SPIRVToLLVMConversion;
303 
304   LogicalResult
305   matchAndRewrite(spirv::AccessChainOp op, OpAdaptor adaptor,
306                   ConversionPatternRewriter &rewriter) const override {
307     auto dstType = typeConverter.convertType(op.component_ptr().getType());
308     if (!dstType)
309       return failure();
310     // To use GEP we need to add a first 0 index to go through the pointer.
311     auto indices = llvm::to_vector<4>(op.indices());
312     Type indexType = op.indices().front().getType();
313     auto llvmIndexType = typeConverter.convertType(indexType);
314     if (!llvmIndexType)
315       return failure();
316     Value zero = rewriter.create<LLVM::ConstantOp>(
317         op.getLoc(), llvmIndexType, rewriter.getIntegerAttr(indexType, 0));
318     indices.insert(indices.begin(), zero);
319     rewriter.replaceOpWithNewOp<LLVM::GEPOp>(op, dstType, op.base_ptr(),
320                                              indices);
321     return success();
322   }
323 };
324 
325 class AddressOfPattern : public SPIRVToLLVMConversion<spirv::AddressOfOp> {
326 public:
327   using SPIRVToLLVMConversion<spirv::AddressOfOp>::SPIRVToLLVMConversion;
328 
329   LogicalResult
330   matchAndRewrite(spirv::AddressOfOp op, OpAdaptor adaptor,
331                   ConversionPatternRewriter &rewriter) const override {
332     auto dstType = typeConverter.convertType(op.pointer().getType());
333     if (!dstType)
334       return failure();
335     rewriter.replaceOpWithNewOp<LLVM::AddressOfOp>(op, dstType, op.variable());
336     return success();
337   }
338 };
339 
340 class BitFieldInsertPattern
341     : public SPIRVToLLVMConversion<spirv::BitFieldInsertOp> {
342 public:
343   using SPIRVToLLVMConversion<spirv::BitFieldInsertOp>::SPIRVToLLVMConversion;
344 
345   LogicalResult
346   matchAndRewrite(spirv::BitFieldInsertOp op, OpAdaptor adaptor,
347                   ConversionPatternRewriter &rewriter) const override {
348     auto srcType = op.getType();
349     auto dstType = typeConverter.convertType(srcType);
350     if (!dstType)
351       return failure();
352     Location loc = op.getLoc();
353 
354     // Process `Offset` and `Count`: broadcast and extend/truncate if needed.
355     Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType,
356                                         typeConverter, rewriter);
357     Value count = processCountOrOffset(loc, op.count(), srcType, dstType,
358                                        typeConverter, rewriter);
359 
360     // Create a mask with bits set outside [Offset, Offset + Count - 1].
361     Value minusOne = createConstantAllBitsSet(loc, srcType, dstType, rewriter);
362     Value maskShiftedByCount =
363         rewriter.create<LLVM::ShlOp>(loc, dstType, minusOne, count);
364     Value negated = rewriter.create<LLVM::XOrOp>(loc, dstType,
365                                                  maskShiftedByCount, minusOne);
366     Value maskShiftedByCountAndOffset =
367         rewriter.create<LLVM::ShlOp>(loc, dstType, negated, offset);
368     Value mask = rewriter.create<LLVM::XOrOp>(
369         loc, dstType, maskShiftedByCountAndOffset, minusOne);
370 
371     // Extract unchanged bits from the `Base`  that are outside of
372     // [Offset, Offset + Count - 1]. Then `or` with shifted `Insert`.
373     Value baseAndMask =
374         rewriter.create<LLVM::AndOp>(loc, dstType, op.base(), mask);
375     Value insertShiftedByOffset =
376         rewriter.create<LLVM::ShlOp>(loc, dstType, op.insert(), offset);
377     rewriter.replaceOpWithNewOp<LLVM::OrOp>(op, dstType, baseAndMask,
378                                             insertShiftedByOffset);
379     return success();
380   }
381 };
382 
383 /// Converts SPIR-V ConstantOp with scalar or vector type.
384 class ConstantScalarAndVectorPattern
385     : public SPIRVToLLVMConversion<spirv::ConstantOp> {
386 public:
387   using SPIRVToLLVMConversion<spirv::ConstantOp>::SPIRVToLLVMConversion;
388 
389   LogicalResult
390   matchAndRewrite(spirv::ConstantOp constOp, OpAdaptor adaptor,
391                   ConversionPatternRewriter &rewriter) const override {
392     auto srcType = constOp.getType();
393     if (!srcType.isa<VectorType>() && !srcType.isIntOrFloat())
394       return failure();
395 
396     auto dstType = typeConverter.convertType(srcType);
397     if (!dstType)
398       return failure();
399 
400     // SPIR-V constant can be a signed/unsigned integer, which has to be
401     // casted to signless integer when converting to LLVM dialect. Removing the
402     // sign bit may have unexpected behaviour. However, it is better to handle
403     // it case-by-case, given that the purpose of the conversion is not to
404     // cover all possible corner cases.
405     if (isSignedIntegerOrVector(srcType) ||
406         isUnsignedIntegerOrVector(srcType)) {
407       auto signlessType = rewriter.getIntegerType(getBitWidth(srcType));
408 
409       if (srcType.isa<VectorType>()) {
410         auto dstElementsAttr = constOp.value().cast<DenseIntElementsAttr>();
411         rewriter.replaceOpWithNewOp<LLVM::ConstantOp>(
412             constOp, dstType,
413             dstElementsAttr.mapValues(
414                 signlessType, [&](const APInt &value) { return value; }));
415         return success();
416       }
417       auto srcAttr = constOp.value().cast<IntegerAttr>();
418       auto dstAttr = rewriter.getIntegerAttr(signlessType, srcAttr.getValue());
419       rewriter.replaceOpWithNewOp<LLVM::ConstantOp>(constOp, dstType, dstAttr);
420       return success();
421     }
422     rewriter.replaceOpWithNewOp<LLVM::ConstantOp>(
423         constOp, dstType, adaptor.getOperands(), constOp->getAttrs());
424     return success();
425   }
426 };
427 
428 class BitFieldSExtractPattern
429     : public SPIRVToLLVMConversion<spirv::BitFieldSExtractOp> {
430 public:
431   using SPIRVToLLVMConversion<spirv::BitFieldSExtractOp>::SPIRVToLLVMConversion;
432 
433   LogicalResult
434   matchAndRewrite(spirv::BitFieldSExtractOp op, OpAdaptor adaptor,
435                   ConversionPatternRewriter &rewriter) const override {
436     auto srcType = op.getType();
437     auto dstType = typeConverter.convertType(srcType);
438     if (!dstType)
439       return failure();
440     Location loc = op.getLoc();
441 
442     // Process `Offset` and `Count`: broadcast and extend/truncate if needed.
443     Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType,
444                                         typeConverter, rewriter);
445     Value count = processCountOrOffset(loc, op.count(), srcType, dstType,
446                                        typeConverter, rewriter);
447 
448     // Create a constant that holds the size of the `Base`.
449     IntegerType integerType;
450     if (auto vecType = srcType.dyn_cast<VectorType>())
451       integerType = vecType.getElementType().cast<IntegerType>();
452     else
453       integerType = srcType.cast<IntegerType>();
454 
455     auto baseSize = rewriter.getIntegerAttr(integerType, getBitWidth(srcType));
456     Value size =
457         srcType.isa<VectorType>()
458             ? rewriter.create<LLVM::ConstantOp>(
459                   loc, dstType,
460                   SplatElementsAttr::get(srcType.cast<ShapedType>(), baseSize))
461             : rewriter.create<LLVM::ConstantOp>(loc, dstType, baseSize);
462 
463     // Shift `Base` left by [sizeof(Base) - (Count + Offset)], so that the bit
464     // at Offset + Count - 1 is the most significant bit now.
465     Value countPlusOffset =
466         rewriter.create<LLVM::AddOp>(loc, dstType, count, offset);
467     Value amountToShiftLeft =
468         rewriter.create<LLVM::SubOp>(loc, dstType, size, countPlusOffset);
469     Value baseShiftedLeft = rewriter.create<LLVM::ShlOp>(
470         loc, dstType, op.base(), amountToShiftLeft);
471 
472     // Shift the result right, filling the bits with the sign bit.
473     Value amountToShiftRight =
474         rewriter.create<LLVM::AddOp>(loc, dstType, offset, amountToShiftLeft);
475     rewriter.replaceOpWithNewOp<LLVM::AShrOp>(op, dstType, baseShiftedLeft,
476                                               amountToShiftRight);
477     return success();
478   }
479 };
480 
481 class BitFieldUExtractPattern
482     : public SPIRVToLLVMConversion<spirv::BitFieldUExtractOp> {
483 public:
484   using SPIRVToLLVMConversion<spirv::BitFieldUExtractOp>::SPIRVToLLVMConversion;
485 
486   LogicalResult
487   matchAndRewrite(spirv::BitFieldUExtractOp op, OpAdaptor adaptor,
488                   ConversionPatternRewriter &rewriter) const override {
489     auto srcType = op.getType();
490     auto dstType = typeConverter.convertType(srcType);
491     if (!dstType)
492       return failure();
493     Location loc = op.getLoc();
494 
495     // Process `Offset` and `Count`: broadcast and extend/truncate if needed.
496     Value offset = processCountOrOffset(loc, op.offset(), srcType, dstType,
497                                         typeConverter, rewriter);
498     Value count = processCountOrOffset(loc, op.count(), srcType, dstType,
499                                        typeConverter, rewriter);
500 
501     // Create a mask with bits set at [0, Count - 1].
502     Value minusOne = createConstantAllBitsSet(loc, srcType, dstType, rewriter);
503     Value maskShiftedByCount =
504         rewriter.create<LLVM::ShlOp>(loc, dstType, minusOne, count);
505     Value mask = rewriter.create<LLVM::XOrOp>(loc, dstType, maskShiftedByCount,
506                                               minusOne);
507 
508     // Shift `Base` by `Offset` and apply the mask on it.
509     Value shiftedBase =
510         rewriter.create<LLVM::LShrOp>(loc, dstType, op.base(), offset);
511     rewriter.replaceOpWithNewOp<LLVM::AndOp>(op, dstType, shiftedBase, mask);
512     return success();
513   }
514 };
515 
516 class BranchConversionPattern : public SPIRVToLLVMConversion<spirv::BranchOp> {
517 public:
518   using SPIRVToLLVMConversion<spirv::BranchOp>::SPIRVToLLVMConversion;
519 
520   LogicalResult
521   matchAndRewrite(spirv::BranchOp branchOp, OpAdaptor adaptor,
522                   ConversionPatternRewriter &rewriter) const override {
523     rewriter.replaceOpWithNewOp<LLVM::BrOp>(branchOp, adaptor.getOperands(),
524                                             branchOp.getTarget());
525     return success();
526   }
527 };
528 
529 class BranchConditionalConversionPattern
530     : public SPIRVToLLVMConversion<spirv::BranchConditionalOp> {
531 public:
532   using SPIRVToLLVMConversion<
533       spirv::BranchConditionalOp>::SPIRVToLLVMConversion;
534 
535   LogicalResult
536   matchAndRewrite(spirv::BranchConditionalOp op, OpAdaptor adaptor,
537                   ConversionPatternRewriter &rewriter) const override {
538     // If branch weights exist, map them to 32-bit integer vector.
539     ElementsAttr branchWeights = nullptr;
540     if (auto weights = op.branch_weights()) {
541       VectorType weightType = VectorType::get(2, rewriter.getI32Type());
542       branchWeights =
543           DenseElementsAttr::get(weightType, weights.getValue().getValue());
544     }
545 
546     rewriter.replaceOpWithNewOp<LLVM::CondBrOp>(
547         op, op.condition(), op.getTrueBlockArguments(),
548         op.getFalseBlockArguments(), branchWeights, op.getTrueBlock(),
549         op.getFalseBlock());
550     return success();
551   }
552 };
553 
554 /// Converts `spv.CompositeExtract` to `llvm.extractvalue` if the container type
555 /// is an aggregate type (struct or array). Otherwise, converts to
556 /// `llvm.extractelement` that operates on vectors.
557 class CompositeExtractPattern
558     : public SPIRVToLLVMConversion<spirv::CompositeExtractOp> {
559 public:
560   using SPIRVToLLVMConversion<spirv::CompositeExtractOp>::SPIRVToLLVMConversion;
561 
562   LogicalResult
563   matchAndRewrite(spirv::CompositeExtractOp op, OpAdaptor adaptor,
564                   ConversionPatternRewriter &rewriter) const override {
565     auto dstType = this->typeConverter.convertType(op.getType());
566     if (!dstType)
567       return failure();
568 
569     Type containerType = op.composite().getType();
570     if (containerType.isa<VectorType>()) {
571       Location loc = op.getLoc();
572       IntegerAttr value = op.indices()[0].cast<IntegerAttr>();
573       Value index = createI32ConstantOf(loc, rewriter, value.getInt());
574       rewriter.replaceOpWithNewOp<LLVM::ExtractElementOp>(
575           op, dstType, op.composite(), index);
576       return success();
577     }
578     rewriter.replaceOpWithNewOp<LLVM::ExtractValueOp>(
579         op, dstType, op.composite(), op.indices());
580     return success();
581   }
582 };
583 
584 /// Converts `spv.CompositeInsert` to `llvm.insertvalue` if the container type
585 /// is an aggregate type (struct or array). Otherwise, converts to
586 /// `llvm.insertelement` that operates on vectors.
587 class CompositeInsertPattern
588     : public SPIRVToLLVMConversion<spirv::CompositeInsertOp> {
589 public:
590   using SPIRVToLLVMConversion<spirv::CompositeInsertOp>::SPIRVToLLVMConversion;
591 
592   LogicalResult
593   matchAndRewrite(spirv::CompositeInsertOp op, OpAdaptor adaptor,
594                   ConversionPatternRewriter &rewriter) const override {
595     auto dstType = this->typeConverter.convertType(op.getType());
596     if (!dstType)
597       return failure();
598 
599     Type containerType = op.composite().getType();
600     if (containerType.isa<VectorType>()) {
601       Location loc = op.getLoc();
602       IntegerAttr value = op.indices()[0].cast<IntegerAttr>();
603       Value index = createI32ConstantOf(loc, rewriter, value.getInt());
604       rewriter.replaceOpWithNewOp<LLVM::InsertElementOp>(
605           op, dstType, op.composite(), op.object(), index);
606       return success();
607     }
608     rewriter.replaceOpWithNewOp<LLVM::InsertValueOp>(
609         op, dstType, op.composite(), op.object(), op.indices());
610     return success();
611   }
612 };
613 
614 /// Converts SPIR-V operations that have straightforward LLVM equivalent
615 /// into LLVM dialect operations.
616 template <typename SPIRVOp, typename LLVMOp>
617 class DirectConversionPattern : public SPIRVToLLVMConversion<SPIRVOp> {
618 public:
619   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
620 
621   LogicalResult
622   matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor,
623                   ConversionPatternRewriter &rewriter) const override {
624     auto dstType = this->typeConverter.convertType(operation.getType());
625     if (!dstType)
626       return failure();
627     rewriter.template replaceOpWithNewOp<LLVMOp>(
628         operation, dstType, adaptor.getOperands(), operation->getAttrs());
629     return success();
630   }
631 };
632 
633 /// Converts `spv.ExecutionMode` into a global struct constant that holds
634 /// execution mode information.
635 class ExecutionModePattern
636     : public SPIRVToLLVMConversion<spirv::ExecutionModeOp> {
637 public:
638   using SPIRVToLLVMConversion<spirv::ExecutionModeOp>::SPIRVToLLVMConversion;
639 
640   LogicalResult
641   matchAndRewrite(spirv::ExecutionModeOp op, OpAdaptor adaptor,
642                   ConversionPatternRewriter &rewriter) const override {
643     // First, create the global struct's name that would be associated with
644     // this entry point's execution mode. We set it to be:
645     //   __spv__{SPIR-V module name}_{function name}_execution_mode_info
646     ModuleOp module = op->getParentOfType<ModuleOp>();
647     std::string moduleName;
648     if (module.getName().hasValue())
649       moduleName = "_" + module.getName().getValue().str();
650     else
651       moduleName = "";
652     std::string executionModeInfoName = llvm::formatv(
653         "__spv_{0}_{1}_execution_mode_info", moduleName, op.fn().str());
654 
655     MLIRContext *context = rewriter.getContext();
656     OpBuilder::InsertionGuard guard(rewriter);
657     rewriter.setInsertionPointToStart(module.getBody());
658 
659     // Create a struct type, corresponding to the C struct below.
660     // struct {
661     //   int32_t executionMode;
662     //   int32_t values[];          // optional values
663     // };
664     auto llvmI32Type = IntegerType::get(context, 32);
665     SmallVector<Type, 2> fields;
666     fields.push_back(llvmI32Type);
667     ArrayAttr values = op.values();
668     if (!values.empty()) {
669       auto arrayType = LLVM::LLVMArrayType::get(llvmI32Type, values.size());
670       fields.push_back(arrayType);
671     }
672     auto structType = LLVM::LLVMStructType::getLiteral(context, fields);
673 
674     // Create `llvm.mlir.global` with initializer region containing one block.
675     auto global = rewriter.create<LLVM::GlobalOp>(
676         UnknownLoc::get(context), structType, /*isConstant=*/true,
677         LLVM::Linkage::External, executionModeInfoName, Attribute(),
678         /*alignment=*/0);
679     Location loc = global.getLoc();
680     Region &region = global.getInitializerRegion();
681     Block *block = rewriter.createBlock(&region);
682 
683     // Initialize the struct and set the execution mode value.
684     rewriter.setInsertionPoint(block, block->begin());
685     Value structValue = rewriter.create<LLVM::UndefOp>(loc, structType);
686     IntegerAttr executionModeAttr = op.execution_modeAttr();
687     Value executionMode =
688         rewriter.create<LLVM::ConstantOp>(loc, llvmI32Type, executionModeAttr);
689     structValue = rewriter.create<LLVM::InsertValueOp>(
690         loc, structType, structValue, executionMode,
691         ArrayAttr::get(context,
692                        {rewriter.getIntegerAttr(rewriter.getI32Type(), 0)}));
693 
694     // Insert extra operands if they exist into execution mode info struct.
695     for (unsigned i = 0, e = values.size(); i < e; ++i) {
696       auto attr = values.getValue()[i];
697       Value entry = rewriter.create<LLVM::ConstantOp>(loc, llvmI32Type, attr);
698       structValue = rewriter.create<LLVM::InsertValueOp>(
699           loc, structType, structValue, entry,
700           ArrayAttr::get(context,
701                          {rewriter.getIntegerAttr(rewriter.getI32Type(), 1),
702                           rewriter.getIntegerAttr(rewriter.getI32Type(), i)}));
703     }
704     rewriter.create<LLVM::ReturnOp>(loc, ArrayRef<Value>({structValue}));
705     rewriter.eraseOp(op);
706     return success();
707   }
708 };
709 
710 /// Converts `spv.GlobalVariable` to `llvm.mlir.global`. Note that SPIR-V global
711 /// returns a pointer, whereas in LLVM dialect the global holds an actual value.
712 /// This difference is handled by `spv.mlir.addressof` and
713 /// `llvm.mlir.addressof`ops that both return a pointer.
714 class GlobalVariablePattern
715     : public SPIRVToLLVMConversion<spirv::GlobalVariableOp> {
716 public:
717   using SPIRVToLLVMConversion<spirv::GlobalVariableOp>::SPIRVToLLVMConversion;
718 
719   LogicalResult
720   matchAndRewrite(spirv::GlobalVariableOp op, OpAdaptor adaptor,
721                   ConversionPatternRewriter &rewriter) const override {
722     // Currently, there is no support of initialization with a constant value in
723     // SPIR-V dialect. Specialization constants are not considered as well.
724     if (op.initializer())
725       return failure();
726 
727     auto srcType = op.type().cast<spirv::PointerType>();
728     auto dstType = typeConverter.convertType(srcType.getPointeeType());
729     if (!dstType)
730       return failure();
731 
732     // Limit conversion to the current invocation only or `StorageBuffer`
733     // required by SPIR-V runner.
734     // This is okay because multiple invocations are not supported yet.
735     auto storageClass = srcType.getStorageClass();
736     switch (storageClass) {
737     case spirv::StorageClass::Input:
738     case spirv::StorageClass::Private:
739     case spirv::StorageClass::Output:
740     case spirv::StorageClass::StorageBuffer:
741     case spirv::StorageClass::UniformConstant:
742       break;
743     default:
744       return failure();
745     }
746 
747     // LLVM dialect spec: "If the global value is a constant, storing into it is
748     // not allowed.". This corresponds to SPIR-V 'Input' and 'UniformConstant'
749     // storage class that is read-only.
750     bool isConstant = (storageClass == spirv::StorageClass::Input) ||
751                       (storageClass == spirv::StorageClass::UniformConstant);
752     // SPIR-V spec: "By default, functions and global variables are private to a
753     // module and cannot be accessed by other modules. However, a module may be
754     // written to export or import functions and global (module scope)
755     // variables.". Therefore, map 'Private' storage class to private linkage,
756     // 'Input' and 'Output' to external linkage.
757     auto linkage = storageClass == spirv::StorageClass::Private
758                        ? LLVM::Linkage::Private
759                        : LLVM::Linkage::External;
760     auto newGlobalOp = rewriter.replaceOpWithNewOp<LLVM::GlobalOp>(
761         op, dstType, isConstant, linkage, op.sym_name(), Attribute(),
762         /*alignment=*/0);
763 
764     // Attach location attribute if applicable
765     if (op.locationAttr())
766       newGlobalOp->setAttr(op.locationAttrName(), op.locationAttr());
767 
768     return success();
769   }
770 };
771 
772 /// Converts SPIR-V cast ops that do not have straightforward LLVM
773 /// equivalent in LLVM dialect.
774 template <typename SPIRVOp, typename LLVMExtOp, typename LLVMTruncOp>
775 class IndirectCastPattern : public SPIRVToLLVMConversion<SPIRVOp> {
776 public:
777   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
778 
779   LogicalResult
780   matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor,
781                   ConversionPatternRewriter &rewriter) const override {
782 
783     Type fromType = operation.operand().getType();
784     Type toType = operation.getType();
785 
786     auto dstType = this->typeConverter.convertType(toType);
787     if (!dstType)
788       return failure();
789 
790     if (getBitWidth(fromType) < getBitWidth(toType)) {
791       rewriter.template replaceOpWithNewOp<LLVMExtOp>(operation, dstType,
792                                                       adaptor.getOperands());
793       return success();
794     }
795     if (getBitWidth(fromType) > getBitWidth(toType)) {
796       rewriter.template replaceOpWithNewOp<LLVMTruncOp>(operation, dstType,
797                                                         adaptor.getOperands());
798       return success();
799     }
800     return failure();
801   }
802 };
803 
804 class FunctionCallPattern
805     : public SPIRVToLLVMConversion<spirv::FunctionCallOp> {
806 public:
807   using SPIRVToLLVMConversion<spirv::FunctionCallOp>::SPIRVToLLVMConversion;
808 
809   LogicalResult
810   matchAndRewrite(spirv::FunctionCallOp callOp, OpAdaptor adaptor,
811                   ConversionPatternRewriter &rewriter) const override {
812     if (callOp.getNumResults() == 0) {
813       rewriter.replaceOpWithNewOp<LLVM::CallOp>(
814           callOp, llvm::None, adaptor.getOperands(), callOp->getAttrs());
815       return success();
816     }
817 
818     // Function returns a single result.
819     auto dstType = typeConverter.convertType(callOp.getType(0));
820     rewriter.replaceOpWithNewOp<LLVM::CallOp>(
821         callOp, dstType, adaptor.getOperands(), callOp->getAttrs());
822     return success();
823   }
824 };
825 
826 /// Converts SPIR-V floating-point comparisons to llvm.fcmp "predicate"
827 template <typename SPIRVOp, LLVM::FCmpPredicate predicate>
828 class FComparePattern : public SPIRVToLLVMConversion<SPIRVOp> {
829 public:
830   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
831 
832   LogicalResult
833   matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor,
834                   ConversionPatternRewriter &rewriter) const override {
835 
836     auto dstType = this->typeConverter.convertType(operation.getType());
837     if (!dstType)
838       return failure();
839 
840     rewriter.template replaceOpWithNewOp<LLVM::FCmpOp>(
841         operation, dstType, predicate, operation.operand1(),
842         operation.operand2());
843     return success();
844   }
845 };
846 
847 /// Converts SPIR-V integer comparisons to llvm.icmp "predicate"
848 template <typename SPIRVOp, LLVM::ICmpPredicate predicate>
849 class IComparePattern : public SPIRVToLLVMConversion<SPIRVOp> {
850 public:
851   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
852 
853   LogicalResult
854   matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor,
855                   ConversionPatternRewriter &rewriter) const override {
856 
857     auto dstType = this->typeConverter.convertType(operation.getType());
858     if (!dstType)
859       return failure();
860 
861     rewriter.template replaceOpWithNewOp<LLVM::ICmpOp>(
862         operation, dstType, predicate, operation.operand1(),
863         operation.operand2());
864     return success();
865   }
866 };
867 
868 class InverseSqrtPattern
869     : public SPIRVToLLVMConversion<spirv::GLSLInverseSqrtOp> {
870 public:
871   using SPIRVToLLVMConversion<spirv::GLSLInverseSqrtOp>::SPIRVToLLVMConversion;
872 
873   LogicalResult
874   matchAndRewrite(spirv::GLSLInverseSqrtOp op, OpAdaptor adaptor,
875                   ConversionPatternRewriter &rewriter) const override {
876     auto srcType = op.getType();
877     auto dstType = typeConverter.convertType(srcType);
878     if (!dstType)
879       return failure();
880 
881     Location loc = op.getLoc();
882     Value one = createFPConstant(loc, srcType, dstType, rewriter, 1.0);
883     Value sqrt = rewriter.create<LLVM::SqrtOp>(loc, dstType, op.operand());
884     rewriter.replaceOpWithNewOp<LLVM::FDivOp>(op, dstType, one, sqrt);
885     return success();
886   }
887 };
888 
889 /// Converts `spv.Load` and `spv.Store` to LLVM dialect.
890 template <typename SPIRVOp>
891 class LoadStorePattern : public SPIRVToLLVMConversion<SPIRVOp> {
892 public:
893   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
894 
895   LogicalResult
896   matchAndRewrite(SPIRVOp op, typename SPIRVOp::Adaptor adaptor,
897                   ConversionPatternRewriter &rewriter) const override {
898     if (!op.memory_access().hasValue()) {
899       return replaceWithLoadOrStore(
900           op, rewriter, this->typeConverter, /*alignment=*/0,
901           /*isVolatile=*/false, /*isNonTemporal=*/false);
902     }
903     auto memoryAccess = op.memory_access().getValue();
904     switch (memoryAccess) {
905     case spirv::MemoryAccess::Aligned:
906     case spirv::MemoryAccess::None:
907     case spirv::MemoryAccess::Nontemporal:
908     case spirv::MemoryAccess::Volatile: {
909       unsigned alignment =
910           memoryAccess == spirv::MemoryAccess::Aligned ? *op.alignment() : 0;
911       bool isNonTemporal = memoryAccess == spirv::MemoryAccess::Nontemporal;
912       bool isVolatile = memoryAccess == spirv::MemoryAccess::Volatile;
913       return replaceWithLoadOrStore(op, rewriter, this->typeConverter,
914                                     alignment, isVolatile, isNonTemporal);
915     }
916     default:
917       // There is no support of other memory access attributes.
918       return failure();
919     }
920   }
921 };
922 
923 /// Converts `spv.Not` and `spv.LogicalNot` into LLVM dialect.
924 template <typename SPIRVOp>
925 class NotPattern : public SPIRVToLLVMConversion<SPIRVOp> {
926 public:
927   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
928 
929   LogicalResult
930   matchAndRewrite(SPIRVOp notOp, typename SPIRVOp::Adaptor adaptor,
931                   ConversionPatternRewriter &rewriter) const override {
932     auto srcType = notOp.getType();
933     auto dstType = this->typeConverter.convertType(srcType);
934     if (!dstType)
935       return failure();
936 
937     Location loc = notOp.getLoc();
938     IntegerAttr minusOne = minusOneIntegerAttribute(srcType, rewriter);
939     auto mask = srcType.template isa<VectorType>()
940                     ? rewriter.create<LLVM::ConstantOp>(
941                           loc, dstType,
942                           SplatElementsAttr::get(
943                               srcType.template cast<VectorType>(), minusOne))
944                     : rewriter.create<LLVM::ConstantOp>(loc, dstType, minusOne);
945     rewriter.template replaceOpWithNewOp<LLVM::XOrOp>(notOp, dstType,
946                                                       notOp.operand(), mask);
947     return success();
948   }
949 };
950 
951 /// A template pattern that erases the given `SPIRVOp`.
952 template <typename SPIRVOp>
953 class ErasePattern : public SPIRVToLLVMConversion<SPIRVOp> {
954 public:
955   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
956 
957   LogicalResult
958   matchAndRewrite(SPIRVOp op, typename SPIRVOp::Adaptor adaptor,
959                   ConversionPatternRewriter &rewriter) const override {
960     rewriter.eraseOp(op);
961     return success();
962   }
963 };
964 
965 class ReturnPattern : public SPIRVToLLVMConversion<spirv::ReturnOp> {
966 public:
967   using SPIRVToLLVMConversion<spirv::ReturnOp>::SPIRVToLLVMConversion;
968 
969   LogicalResult
970   matchAndRewrite(spirv::ReturnOp returnOp, OpAdaptor adaptor,
971                   ConversionPatternRewriter &rewriter) const override {
972     rewriter.replaceOpWithNewOp<LLVM::ReturnOp>(returnOp, ArrayRef<Type>(),
973                                                 ArrayRef<Value>());
974     return success();
975   }
976 };
977 
978 class ReturnValuePattern : public SPIRVToLLVMConversion<spirv::ReturnValueOp> {
979 public:
980   using SPIRVToLLVMConversion<spirv::ReturnValueOp>::SPIRVToLLVMConversion;
981 
982   LogicalResult
983   matchAndRewrite(spirv::ReturnValueOp returnValueOp, OpAdaptor adaptor,
984                   ConversionPatternRewriter &rewriter) const override {
985     rewriter.replaceOpWithNewOp<LLVM::ReturnOp>(returnValueOp, ArrayRef<Type>(),
986                                                 adaptor.getOperands());
987     return success();
988   }
989 };
990 
991 /// Converts `spv.mlir.loop` to LLVM dialect. All blocks within selection should
992 /// be reachable for conversion to succeed. The structure of the loop in LLVM
993 /// dialect will be the following:
994 ///
995 ///      +------------------------------------+
996 ///      | <code before spv.mlir.loop>        |
997 ///      | llvm.br ^header                    |
998 ///      +------------------------------------+
999 ///                           |
1000 ///   +----------------+      |
1001 ///   |                |      |
1002 ///   |                V      V
1003 ///   |  +------------------------------------+
1004 ///   |  | ^header:                           |
1005 ///   |  |   <header code>                    |
1006 ///   |  |   llvm.cond_br %cond, ^body, ^exit |
1007 ///   |  +------------------------------------+
1008 ///   |                    |
1009 ///   |                    |----------------------+
1010 ///   |                    |                      |
1011 ///   |                    V                      |
1012 ///   |  +------------------------------------+   |
1013 ///   |  | ^body:                             |   |
1014 ///   |  |   <body code>                      |   |
1015 ///   |  |   llvm.br ^continue                |   |
1016 ///   |  +------------------------------------+   |
1017 ///   |                    |                      |
1018 ///   |                    V                      |
1019 ///   |  +------------------------------------+   |
1020 ///   |  | ^continue:                         |   |
1021 ///   |  |   <continue code>                  |   |
1022 ///   |  |   llvm.br ^header                  |   |
1023 ///   |  +------------------------------------+   |
1024 ///   |               |                           |
1025 ///   +---------------+    +----------------------+
1026 ///                        |
1027 ///                        V
1028 ///      +------------------------------------+
1029 ///      | ^exit:                             |
1030 ///      |   llvm.br ^remaining               |
1031 ///      +------------------------------------+
1032 ///                        |
1033 ///                        V
1034 ///      +------------------------------------+
1035 ///      | ^remaining:                        |
1036 ///      |   <code after spv.mlir.loop>       |
1037 ///      +------------------------------------+
1038 ///
1039 class LoopPattern : public SPIRVToLLVMConversion<spirv::LoopOp> {
1040 public:
1041   using SPIRVToLLVMConversion<spirv::LoopOp>::SPIRVToLLVMConversion;
1042 
1043   LogicalResult
1044   matchAndRewrite(spirv::LoopOp loopOp, OpAdaptor adaptor,
1045                   ConversionPatternRewriter &rewriter) const override {
1046     // There is no support of loop control at the moment.
1047     if (loopOp.loop_control() != spirv::LoopControl::None)
1048       return failure();
1049 
1050     Location loc = loopOp.getLoc();
1051 
1052     // Split the current block after `spv.mlir.loop`. The remaining ops will be
1053     // used in `endBlock`.
1054     Block *currentBlock = rewriter.getBlock();
1055     auto position = Block::iterator(loopOp);
1056     Block *endBlock = rewriter.splitBlock(currentBlock, position);
1057 
1058     // Remove entry block and create a branch in the current block going to the
1059     // header block.
1060     Block *entryBlock = loopOp.getEntryBlock();
1061     assert(entryBlock->getOperations().size() == 1);
1062     auto brOp = dyn_cast<spirv::BranchOp>(entryBlock->getOperations().front());
1063     if (!brOp)
1064       return failure();
1065     Block *headerBlock = loopOp.getHeaderBlock();
1066     rewriter.setInsertionPointToEnd(currentBlock);
1067     rewriter.create<LLVM::BrOp>(loc, brOp.getBlockArguments(), headerBlock);
1068     rewriter.eraseBlock(entryBlock);
1069 
1070     // Branch from merge block to end block.
1071     Block *mergeBlock = loopOp.getMergeBlock();
1072     Operation *terminator = mergeBlock->getTerminator();
1073     ValueRange terminatorOperands = terminator->getOperands();
1074     rewriter.setInsertionPointToEnd(mergeBlock);
1075     rewriter.create<LLVM::BrOp>(loc, terminatorOperands, endBlock);
1076 
1077     rewriter.inlineRegionBefore(loopOp.body(), endBlock);
1078     rewriter.replaceOp(loopOp, endBlock->getArguments());
1079     return success();
1080   }
1081 };
1082 
1083 /// Converts `spv.mlir.selection` with `spv.BranchConditional` in its header
1084 /// block. All blocks within selection should be reachable for conversion to
1085 /// succeed.
1086 class SelectionPattern : public SPIRVToLLVMConversion<spirv::SelectionOp> {
1087 public:
1088   using SPIRVToLLVMConversion<spirv::SelectionOp>::SPIRVToLLVMConversion;
1089 
1090   LogicalResult
1091   matchAndRewrite(spirv::SelectionOp op, OpAdaptor adaptor,
1092                   ConversionPatternRewriter &rewriter) const override {
1093     // There is no support for `Flatten` or `DontFlatten` selection control at
1094     // the moment. This are just compiler hints and can be performed during the
1095     // optimization passes.
1096     if (op.selection_control() != spirv::SelectionControl::None)
1097       return failure();
1098 
1099     // `spv.mlir.selection` should have at least two blocks: one selection
1100     // header block and one merge block. If no blocks are present, or control
1101     // flow branches straight to merge block (two blocks are present), the op is
1102     // redundant and it is erased.
1103     if (op.body().getBlocks().size() <= 2) {
1104       rewriter.eraseOp(op);
1105       return success();
1106     }
1107 
1108     Location loc = op.getLoc();
1109 
1110     // Split the current block after `spv.mlir.selection`. The remaining ops
1111     // will be used in `continueBlock`.
1112     auto *currentBlock = rewriter.getInsertionBlock();
1113     rewriter.setInsertionPointAfter(op);
1114     auto position = rewriter.getInsertionPoint();
1115     auto *continueBlock = rewriter.splitBlock(currentBlock, position);
1116 
1117     // Extract conditional branch information from the header block. By SPIR-V
1118     // dialect spec, it should contain `spv.BranchConditional` or `spv.Switch`
1119     // op. Note that `spv.Switch op` is not supported at the moment in the
1120     // SPIR-V dialect. Remove this block when finished.
1121     auto *headerBlock = op.getHeaderBlock();
1122     assert(headerBlock->getOperations().size() == 1);
1123     auto condBrOp = dyn_cast<spirv::BranchConditionalOp>(
1124         headerBlock->getOperations().front());
1125     if (!condBrOp)
1126       return failure();
1127     rewriter.eraseBlock(headerBlock);
1128 
1129     // Branch from merge block to continue block.
1130     auto *mergeBlock = op.getMergeBlock();
1131     Operation *terminator = mergeBlock->getTerminator();
1132     ValueRange terminatorOperands = terminator->getOperands();
1133     rewriter.setInsertionPointToEnd(mergeBlock);
1134     rewriter.create<LLVM::BrOp>(loc, terminatorOperands, continueBlock);
1135 
1136     // Link current block to `true` and `false` blocks within the selection.
1137     Block *trueBlock = condBrOp.getTrueBlock();
1138     Block *falseBlock = condBrOp.getFalseBlock();
1139     rewriter.setInsertionPointToEnd(currentBlock);
1140     rewriter.create<LLVM::CondBrOp>(loc, condBrOp.condition(), trueBlock,
1141                                     condBrOp.trueTargetOperands(), falseBlock,
1142                                     condBrOp.falseTargetOperands());
1143 
1144     rewriter.inlineRegionBefore(op.body(), continueBlock);
1145     rewriter.replaceOp(op, continueBlock->getArguments());
1146     return success();
1147   }
1148 };
1149 
1150 /// Converts SPIR-V shift ops to LLVM shift ops. Since LLVM dialect
1151 /// puts a restriction on `Shift` and `Base` to have the same bit width,
1152 /// `Shift` is zero or sign extended to match this specification. Cases when
1153 /// `Shift` bit width > `Base` bit width are considered to be illegal.
1154 template <typename SPIRVOp, typename LLVMOp>
1155 class ShiftPattern : public SPIRVToLLVMConversion<SPIRVOp> {
1156 public:
1157   using SPIRVToLLVMConversion<SPIRVOp>::SPIRVToLLVMConversion;
1158 
1159   LogicalResult
1160   matchAndRewrite(SPIRVOp operation, typename SPIRVOp::Adaptor adaptor,
1161                   ConversionPatternRewriter &rewriter) const override {
1162 
1163     auto dstType = this->typeConverter.convertType(operation.getType());
1164     if (!dstType)
1165       return failure();
1166 
1167     Type op1Type = operation.operand1().getType();
1168     Type op2Type = operation.operand2().getType();
1169 
1170     if (op1Type == op2Type) {
1171       rewriter.template replaceOpWithNewOp<LLVMOp>(operation, dstType,
1172                                                    adaptor.getOperands());
1173       return success();
1174     }
1175 
1176     Location loc = operation.getLoc();
1177     Value extended;
1178     if (isUnsignedIntegerOrVector(op2Type)) {
1179       extended = rewriter.template create<LLVM::ZExtOp>(loc, dstType,
1180                                                         operation.operand2());
1181     } else {
1182       extended = rewriter.template create<LLVM::SExtOp>(loc, dstType,
1183                                                         operation.operand2());
1184     }
1185     Value result = rewriter.template create<LLVMOp>(
1186         loc, dstType, operation.operand1(), extended);
1187     rewriter.replaceOp(operation, result);
1188     return success();
1189   }
1190 };
1191 
1192 class TanPattern : public SPIRVToLLVMConversion<spirv::GLSLTanOp> {
1193 public:
1194   using SPIRVToLLVMConversion<spirv::GLSLTanOp>::SPIRVToLLVMConversion;
1195 
1196   LogicalResult
1197   matchAndRewrite(spirv::GLSLTanOp tanOp, OpAdaptor adaptor,
1198                   ConversionPatternRewriter &rewriter) const override {
1199     auto dstType = typeConverter.convertType(tanOp.getType());
1200     if (!dstType)
1201       return failure();
1202 
1203     Location loc = tanOp.getLoc();
1204     Value sin = rewriter.create<LLVM::SinOp>(loc, dstType, tanOp.operand());
1205     Value cos = rewriter.create<LLVM::CosOp>(loc, dstType, tanOp.operand());
1206     rewriter.replaceOpWithNewOp<LLVM::FDivOp>(tanOp, dstType, sin, cos);
1207     return success();
1208   }
1209 };
1210 
1211 /// Convert `spv.Tanh` to
1212 ///
1213 ///   exp(2x) - 1
1214 ///   -----------
1215 ///   exp(2x) + 1
1216 ///
1217 class TanhPattern : public SPIRVToLLVMConversion<spirv::GLSLTanhOp> {
1218 public:
1219   using SPIRVToLLVMConversion<spirv::GLSLTanhOp>::SPIRVToLLVMConversion;
1220 
1221   LogicalResult
1222   matchAndRewrite(spirv::GLSLTanhOp tanhOp, OpAdaptor adaptor,
1223                   ConversionPatternRewriter &rewriter) const override {
1224     auto srcType = tanhOp.getType();
1225     auto dstType = typeConverter.convertType(srcType);
1226     if (!dstType)
1227       return failure();
1228 
1229     Location loc = tanhOp.getLoc();
1230     Value two = createFPConstant(loc, srcType, dstType, rewriter, 2.0);
1231     Value multiplied =
1232         rewriter.create<LLVM::FMulOp>(loc, dstType, two, tanhOp.operand());
1233     Value exponential = rewriter.create<LLVM::ExpOp>(loc, dstType, multiplied);
1234     Value one = createFPConstant(loc, srcType, dstType, rewriter, 1.0);
1235     Value numerator =
1236         rewriter.create<LLVM::FSubOp>(loc, dstType, exponential, one);
1237     Value denominator =
1238         rewriter.create<LLVM::FAddOp>(loc, dstType, exponential, one);
1239     rewriter.replaceOpWithNewOp<LLVM::FDivOp>(tanhOp, dstType, numerator,
1240                                               denominator);
1241     return success();
1242   }
1243 };
1244 
1245 class VariablePattern : public SPIRVToLLVMConversion<spirv::VariableOp> {
1246 public:
1247   using SPIRVToLLVMConversion<spirv::VariableOp>::SPIRVToLLVMConversion;
1248 
1249   LogicalResult
1250   matchAndRewrite(spirv::VariableOp varOp, OpAdaptor adaptor,
1251                   ConversionPatternRewriter &rewriter) const override {
1252     auto srcType = varOp.getType();
1253     // Initialization is supported for scalars and vectors only.
1254     auto pointerTo = srcType.cast<spirv::PointerType>().getPointeeType();
1255     auto init = varOp.initializer();
1256     if (init && !pointerTo.isIntOrFloat() && !pointerTo.isa<VectorType>())
1257       return failure();
1258 
1259     auto dstType = typeConverter.convertType(srcType);
1260     if (!dstType)
1261       return failure();
1262 
1263     Location loc = varOp.getLoc();
1264     Value size = createI32ConstantOf(loc, rewriter, 1);
1265     if (!init) {
1266       rewriter.replaceOpWithNewOp<LLVM::AllocaOp>(varOp, dstType, size);
1267       return success();
1268     }
1269     Value allocated = rewriter.create<LLVM::AllocaOp>(loc, dstType, size);
1270     rewriter.create<LLVM::StoreOp>(loc, init, allocated);
1271     rewriter.replaceOp(varOp, allocated);
1272     return success();
1273   }
1274 };
1275 
1276 //===----------------------------------------------------------------------===//
1277 // FuncOp conversion
1278 //===----------------------------------------------------------------------===//
1279 
1280 class FuncConversionPattern : public SPIRVToLLVMConversion<spirv::FuncOp> {
1281 public:
1282   using SPIRVToLLVMConversion<spirv::FuncOp>::SPIRVToLLVMConversion;
1283 
1284   LogicalResult
1285   matchAndRewrite(spirv::FuncOp funcOp, OpAdaptor adaptor,
1286                   ConversionPatternRewriter &rewriter) const override {
1287 
1288     // Convert function signature. At the moment LLVMType converter is enough
1289     // for currently supported types.
1290     auto funcType = funcOp.getType();
1291     TypeConverter::SignatureConversion signatureConverter(
1292         funcType.getNumInputs());
1293     auto llvmType = typeConverter.convertFunctionSignature(
1294         funcOp.getType(), /*isVariadic=*/false, signatureConverter);
1295     if (!llvmType)
1296       return failure();
1297 
1298     // Create a new `LLVMFuncOp`
1299     Location loc = funcOp.getLoc();
1300     StringRef name = funcOp.getName();
1301     auto newFuncOp = rewriter.create<LLVM::LLVMFuncOp>(loc, name, llvmType);
1302 
1303     // Convert SPIR-V Function Control to equivalent LLVM function attribute
1304     MLIRContext *context = funcOp.getContext();
1305     switch (funcOp.function_control()) {
1306 #define DISPATCH(functionControl, llvmAttr)                                    \
1307   case functionControl:                                                        \
1308     newFuncOp->setAttr("passthrough", ArrayAttr::get(context, {llvmAttr}));    \
1309     break;
1310 
1311       DISPATCH(spirv::FunctionControl::Inline,
1312                StringAttr::get(context, "alwaysinline"));
1313       DISPATCH(spirv::FunctionControl::DontInline,
1314                StringAttr::get(context, "noinline"));
1315       DISPATCH(spirv::FunctionControl::Pure,
1316                StringAttr::get(context, "readonly"));
1317       DISPATCH(spirv::FunctionControl::Const,
1318                StringAttr::get(context, "readnone"));
1319 
1320 #undef DISPATCH
1321 
1322     // Default: if `spirv::FunctionControl::None`, then no attributes are
1323     // needed.
1324     default:
1325       break;
1326     }
1327 
1328     rewriter.inlineRegionBefore(funcOp.getBody(), newFuncOp.getBody(),
1329                                 newFuncOp.end());
1330     if (failed(rewriter.convertRegionTypes(&newFuncOp.getBody(), typeConverter,
1331                                            &signatureConverter))) {
1332       return failure();
1333     }
1334     rewriter.eraseOp(funcOp);
1335     return success();
1336   }
1337 };
1338 
1339 //===----------------------------------------------------------------------===//
1340 // ModuleOp conversion
1341 //===----------------------------------------------------------------------===//
1342 
1343 class ModuleConversionPattern : public SPIRVToLLVMConversion<spirv::ModuleOp> {
1344 public:
1345   using SPIRVToLLVMConversion<spirv::ModuleOp>::SPIRVToLLVMConversion;
1346 
1347   LogicalResult
1348   matchAndRewrite(spirv::ModuleOp spvModuleOp, OpAdaptor adaptor,
1349                   ConversionPatternRewriter &rewriter) const override {
1350 
1351     auto newModuleOp =
1352         rewriter.create<ModuleOp>(spvModuleOp.getLoc(), spvModuleOp.getName());
1353     rewriter.inlineRegionBefore(spvModuleOp.getRegion(), newModuleOp.getBody());
1354 
1355     // Remove the terminator block that was automatically added by builder
1356     rewriter.eraseBlock(&newModuleOp.getBodyRegion().back());
1357     rewriter.eraseOp(spvModuleOp);
1358     return success();
1359   }
1360 };
1361 
1362 } // namespace
1363 
1364 //===----------------------------------------------------------------------===//
1365 // Pattern population
1366 //===----------------------------------------------------------------------===//
1367 
1368 void mlir::populateSPIRVToLLVMTypeConversion(LLVMTypeConverter &typeConverter) {
1369   typeConverter.addConversion([&](spirv::ArrayType type) {
1370     return convertArrayType(type, typeConverter);
1371   });
1372   typeConverter.addConversion([&](spirv::PointerType type) {
1373     return convertPointerType(type, typeConverter);
1374   });
1375   typeConverter.addConversion([&](spirv::RuntimeArrayType type) {
1376     return convertRuntimeArrayType(type, typeConverter);
1377   });
1378   typeConverter.addConversion([&](spirv::StructType type) {
1379     return convertStructType(type, typeConverter);
1380   });
1381 }
1382 
1383 void mlir::populateSPIRVToLLVMConversionPatterns(
1384     LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) {
1385   patterns.add<
1386       // Arithmetic ops
1387       DirectConversionPattern<spirv::IAddOp, LLVM::AddOp>,
1388       DirectConversionPattern<spirv::IMulOp, LLVM::MulOp>,
1389       DirectConversionPattern<spirv::ISubOp, LLVM::SubOp>,
1390       DirectConversionPattern<spirv::FAddOp, LLVM::FAddOp>,
1391       DirectConversionPattern<spirv::FDivOp, LLVM::FDivOp>,
1392       DirectConversionPattern<spirv::FMulOp, LLVM::FMulOp>,
1393       DirectConversionPattern<spirv::FNegateOp, LLVM::FNegOp>,
1394       DirectConversionPattern<spirv::FRemOp, LLVM::FRemOp>,
1395       DirectConversionPattern<spirv::FSubOp, LLVM::FSubOp>,
1396       DirectConversionPattern<spirv::SDivOp, LLVM::SDivOp>,
1397       DirectConversionPattern<spirv::SRemOp, LLVM::SRemOp>,
1398       DirectConversionPattern<spirv::UDivOp, LLVM::UDivOp>,
1399       DirectConversionPattern<spirv::UModOp, LLVM::URemOp>,
1400 
1401       // Bitwise ops
1402       BitFieldInsertPattern, BitFieldUExtractPattern, BitFieldSExtractPattern,
1403       DirectConversionPattern<spirv::BitCountOp, LLVM::CtPopOp>,
1404       DirectConversionPattern<spirv::BitReverseOp, LLVM::BitReverseOp>,
1405       DirectConversionPattern<spirv::BitwiseAndOp, LLVM::AndOp>,
1406       DirectConversionPattern<spirv::BitwiseOrOp, LLVM::OrOp>,
1407       DirectConversionPattern<spirv::BitwiseXorOp, LLVM::XOrOp>,
1408       NotPattern<spirv::NotOp>,
1409 
1410       // Cast ops
1411       DirectConversionPattern<spirv::BitcastOp, LLVM::BitcastOp>,
1412       DirectConversionPattern<spirv::ConvertFToSOp, LLVM::FPToSIOp>,
1413       DirectConversionPattern<spirv::ConvertFToUOp, LLVM::FPToUIOp>,
1414       DirectConversionPattern<spirv::ConvertSToFOp, LLVM::SIToFPOp>,
1415       DirectConversionPattern<spirv::ConvertUToFOp, LLVM::UIToFPOp>,
1416       IndirectCastPattern<spirv::FConvertOp, LLVM::FPExtOp, LLVM::FPTruncOp>,
1417       IndirectCastPattern<spirv::SConvertOp, LLVM::SExtOp, LLVM::TruncOp>,
1418       IndirectCastPattern<spirv::UConvertOp, LLVM::ZExtOp, LLVM::TruncOp>,
1419 
1420       // Comparison ops
1421       IComparePattern<spirv::IEqualOp, LLVM::ICmpPredicate::eq>,
1422       IComparePattern<spirv::INotEqualOp, LLVM::ICmpPredicate::ne>,
1423       FComparePattern<spirv::FOrdEqualOp, LLVM::FCmpPredicate::oeq>,
1424       FComparePattern<spirv::FOrdGreaterThanOp, LLVM::FCmpPredicate::ogt>,
1425       FComparePattern<spirv::FOrdGreaterThanEqualOp, LLVM::FCmpPredicate::oge>,
1426       FComparePattern<spirv::FOrdLessThanEqualOp, LLVM::FCmpPredicate::ole>,
1427       FComparePattern<spirv::FOrdLessThanOp, LLVM::FCmpPredicate::olt>,
1428       FComparePattern<spirv::FOrdNotEqualOp, LLVM::FCmpPredicate::one>,
1429       FComparePattern<spirv::FUnordEqualOp, LLVM::FCmpPredicate::ueq>,
1430       FComparePattern<spirv::FUnordGreaterThanOp, LLVM::FCmpPredicate::ugt>,
1431       FComparePattern<spirv::FUnordGreaterThanEqualOp,
1432                       LLVM::FCmpPredicate::uge>,
1433       FComparePattern<spirv::FUnordLessThanEqualOp, LLVM::FCmpPredicate::ule>,
1434       FComparePattern<spirv::FUnordLessThanOp, LLVM::FCmpPredicate::ult>,
1435       FComparePattern<spirv::FUnordNotEqualOp, LLVM::FCmpPredicate::une>,
1436       IComparePattern<spirv::SGreaterThanOp, LLVM::ICmpPredicate::sgt>,
1437       IComparePattern<spirv::SGreaterThanEqualOp, LLVM::ICmpPredicate::sge>,
1438       IComparePattern<spirv::SLessThanEqualOp, LLVM::ICmpPredicate::sle>,
1439       IComparePattern<spirv::SLessThanOp, LLVM::ICmpPredicate::slt>,
1440       IComparePattern<spirv::UGreaterThanOp, LLVM::ICmpPredicate::ugt>,
1441       IComparePattern<spirv::UGreaterThanEqualOp, LLVM::ICmpPredicate::uge>,
1442       IComparePattern<spirv::ULessThanEqualOp, LLVM::ICmpPredicate::ule>,
1443       IComparePattern<spirv::ULessThanOp, LLVM::ICmpPredicate::ult>,
1444 
1445       // Constant op
1446       ConstantScalarAndVectorPattern,
1447 
1448       // Control Flow ops
1449       BranchConversionPattern, BranchConditionalConversionPattern,
1450       FunctionCallPattern, LoopPattern, SelectionPattern,
1451       ErasePattern<spirv::MergeOp>,
1452 
1453       // Entry points and execution mode are handled separately.
1454       ErasePattern<spirv::EntryPointOp>, ExecutionModePattern,
1455 
1456       // GLSL extended instruction set ops
1457       DirectConversionPattern<spirv::GLSLCeilOp, LLVM::FCeilOp>,
1458       DirectConversionPattern<spirv::GLSLCosOp, LLVM::CosOp>,
1459       DirectConversionPattern<spirv::GLSLExpOp, LLVM::ExpOp>,
1460       DirectConversionPattern<spirv::GLSLFAbsOp, LLVM::FAbsOp>,
1461       DirectConversionPattern<spirv::GLSLFloorOp, LLVM::FFloorOp>,
1462       DirectConversionPattern<spirv::GLSLFMaxOp, LLVM::MaxNumOp>,
1463       DirectConversionPattern<spirv::GLSLFMinOp, LLVM::MinNumOp>,
1464       DirectConversionPattern<spirv::GLSLLogOp, LLVM::LogOp>,
1465       DirectConversionPattern<spirv::GLSLSinOp, LLVM::SinOp>,
1466       DirectConversionPattern<spirv::GLSLSMaxOp, LLVM::SMaxOp>,
1467       DirectConversionPattern<spirv::GLSLSMinOp, LLVM::SMinOp>,
1468       DirectConversionPattern<spirv::GLSLSqrtOp, LLVM::SqrtOp>,
1469       InverseSqrtPattern, TanPattern, TanhPattern,
1470 
1471       // Logical ops
1472       DirectConversionPattern<spirv::LogicalAndOp, LLVM::AndOp>,
1473       DirectConversionPattern<spirv::LogicalOrOp, LLVM::OrOp>,
1474       IComparePattern<spirv::LogicalEqualOp, LLVM::ICmpPredicate::eq>,
1475       IComparePattern<spirv::LogicalNotEqualOp, LLVM::ICmpPredicate::ne>,
1476       NotPattern<spirv::LogicalNotOp>,
1477 
1478       // Memory ops
1479       AccessChainPattern, AddressOfPattern, GlobalVariablePattern,
1480       LoadStorePattern<spirv::LoadOp>, LoadStorePattern<spirv::StoreOp>,
1481       VariablePattern,
1482 
1483       // Miscellaneous ops
1484       CompositeExtractPattern, CompositeInsertPattern,
1485       DirectConversionPattern<spirv::SelectOp, LLVM::SelectOp>,
1486       DirectConversionPattern<spirv::UndefOp, LLVM::UndefOp>,
1487 
1488       // Shift ops
1489       ShiftPattern<spirv::ShiftRightArithmeticOp, LLVM::AShrOp>,
1490       ShiftPattern<spirv::ShiftRightLogicalOp, LLVM::LShrOp>,
1491       ShiftPattern<spirv::ShiftLeftLogicalOp, LLVM::ShlOp>,
1492 
1493       // Return ops
1494       ReturnPattern, ReturnValuePattern>(patterns.getContext(), typeConverter);
1495 }
1496 
1497 void mlir::populateSPIRVToLLVMFunctionConversionPatterns(
1498     LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) {
1499   patterns.add<FuncConversionPattern>(patterns.getContext(), typeConverter);
1500 }
1501 
1502 void mlir::populateSPIRVToLLVMModuleConversionPatterns(
1503     LLVMTypeConverter &typeConverter, RewritePatternSet &patterns) {
1504   patterns.add<ModuleConversionPattern>(patterns.getContext(), typeConverter);
1505 }
1506 
1507 //===----------------------------------------------------------------------===//
1508 // Pre-conversion hooks
1509 //===----------------------------------------------------------------------===//
1510 
1511 /// Hook for descriptor set and binding number encoding.
1512 static constexpr StringRef kBinding = "binding";
1513 static constexpr StringRef kDescriptorSet = "descriptor_set";
1514 void mlir::encodeBindAttribute(ModuleOp module) {
1515   auto spvModules = module.getOps<spirv::ModuleOp>();
1516   for (auto spvModule : spvModules) {
1517     spvModule.walk([&](spirv::GlobalVariableOp op) {
1518       IntegerAttr descriptorSet =
1519           op->getAttrOfType<IntegerAttr>(kDescriptorSet);
1520       IntegerAttr binding = op->getAttrOfType<IntegerAttr>(kBinding);
1521       // For every global variable in the module, get the ones with descriptor
1522       // set and binding numbers.
1523       if (descriptorSet && binding) {
1524         // Encode these numbers into the variable's symbolic name. If the
1525         // SPIR-V module has a name, add it at the beginning.
1526         auto moduleAndName = spvModule.getName().hasValue()
1527                                  ? spvModule.getName().getValue().str() + "_" +
1528                                        op.sym_name().str()
1529                                  : op.sym_name().str();
1530         std::string name =
1531             llvm::formatv("{0}_descriptor_set{1}_binding{2}", moduleAndName,
1532                           std::to_string(descriptorSet.getInt()),
1533                           std::to_string(binding.getInt()));
1534         auto nameAttr = StringAttr::get(op->getContext(), name);
1535 
1536         // Replace all symbol uses and set the new symbol name. Finally, remove
1537         // descriptor set and binding attributes.
1538         if (failed(SymbolTable::replaceAllSymbolUses(op, nameAttr, spvModule)))
1539           op.emitError("unable to replace all symbol uses for ") << name;
1540         SymbolTable::setSymbolName(op, nameAttr);
1541         op->removeAttr(kDescriptorSet);
1542         op->removeAttr(kBinding);
1543       }
1544     });
1545   }
1546 }
1547