1 //===- LowerGpuOpsToROCDLOps.cpp - MLIR GPU to ROCDL lowering passes ------===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // This file implements a pass to generate ROCDLIR operations for higher-level 10 // GPU operations. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #include "mlir/Conversion/ControlFlowToLLVM/ControlFlowToLLVM.h" 15 #include "mlir/Conversion/GPUToROCDL/GPUToROCDLPass.h" 16 17 #include "mlir/Conversion/ArithmeticToLLVM/ArithmeticToLLVM.h" 18 #include "mlir/Conversion/FuncToLLVM/ConvertFuncToLLVM.h" 19 #include "mlir/Conversion/LLVMCommon/ConversionTarget.h" 20 #include "mlir/Conversion/LLVMCommon/LoweringOptions.h" 21 #include "mlir/Conversion/LLVMCommon/TypeConverter.h" 22 #include "mlir/Conversion/MemRefToLLVM/MemRefToLLVM.h" 23 #include "mlir/Conversion/VectorToLLVM/ConvertVectorToLLVM.h" 24 #include "mlir/Conversion/VectorToROCDL/VectorToROCDL.h" 25 #include "mlir/Dialect/Func/IR/FuncOps.h" 26 #include "mlir/Dialect/GPU/GPUDialect.h" 27 #include "mlir/Dialect/GPU/Passes.h" 28 #include "mlir/Dialect/LLVMIR/ROCDLDialect.h" 29 #include "mlir/Dialect/Math/IR/Math.h" 30 #include "mlir/Dialect/Vector/IR/VectorOps.h" 31 #include "mlir/Pass/Pass.h" 32 #include "mlir/Transforms/DialectConversion.h" 33 #include "mlir/Transforms/GreedyPatternRewriteDriver.h" 34 #include "llvm/Support/FormatVariadic.h" 35 36 #include "../GPUCommon/GPUOpsLowering.h" 37 #include "../GPUCommon/IndexIntrinsicsOpLowering.h" 38 #include "../GPUCommon/OpToFuncCallLowering.h" 39 #include "../PassDetail.h" 40 41 using namespace mlir; 42 43 namespace { 44 45 /// Import the GPU Ops to ROCDL Patterns. 46 #include "GPUToROCDL.cpp.inc" 47 48 // A pass that replaces all occurrences of GPU device operations with their 49 // corresponding ROCDL equivalent. 50 // 51 // This pass only handles device code and is not meant to be run on GPU host 52 // code. 53 struct LowerGpuOpsToROCDLOpsPass 54 : public ConvertGpuOpsToROCDLOpsBase<LowerGpuOpsToROCDLOpsPass> { 55 LowerGpuOpsToROCDLOpsPass() = default; 56 LowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth, gpu::amd::Runtime runtime) { 57 this->indexBitwidth = indexBitwidth; 58 this->runtime = runtime; 59 } 60 61 void runOnOperation() override { 62 gpu::GPUModuleOp m = getOperation(); 63 64 /// Customize the bitwidth used for the device side index computations. 65 LowerToLLVMOptions options( 66 m.getContext(), 67 DataLayout(cast<DataLayoutOpInterface>(m.getOperation()))); 68 options.emitCWrappers = true; 69 if (indexBitwidth != kDeriveIndexBitwidthFromDataLayout) 70 options.overrideIndexBitwidth(indexBitwidth); 71 LLVMTypeConverter converter(m.getContext(), options); 72 73 RewritePatternSet patterns(m.getContext()); 74 RewritePatternSet llvmPatterns(m.getContext()); 75 76 populateGpuRewritePatterns(patterns); 77 (void)applyPatternsAndFoldGreedily(m, std::move(patterns)); 78 79 mlir::arith::populateArithmeticToLLVMConversionPatterns(converter, 80 llvmPatterns); 81 populateVectorToLLVMConversionPatterns(converter, llvmPatterns); 82 populateVectorToROCDLConversionPatterns(converter, llvmPatterns); 83 cf::populateControlFlowToLLVMConversionPatterns(converter, llvmPatterns); 84 populateFuncToLLVMConversionPatterns(converter, llvmPatterns); 85 populateMemRefToLLVMConversionPatterns(converter, llvmPatterns); 86 populateGpuToROCDLConversionPatterns(converter, llvmPatterns, runtime); 87 LLVMConversionTarget target(getContext()); 88 configureGpuToROCDLConversionLegality(target); 89 if (failed(applyPartialConversion(m, target, std::move(llvmPatterns)))) 90 signalPassFailure(); 91 } 92 }; 93 94 } // namespace 95 96 void mlir::configureGpuToROCDLConversionLegality(ConversionTarget &target) { 97 target.addIllegalOp<func::FuncOp>(); 98 target.addLegalDialect<::mlir::LLVM::LLVMDialect>(); 99 target.addLegalDialect<ROCDL::ROCDLDialect>(); 100 target.addIllegalDialect<gpu::GPUDialect>(); 101 target.addIllegalOp<LLVM::CosOp, LLVM::ExpOp, LLVM::Exp2Op, LLVM::FAbsOp, 102 LLVM::FCeilOp, LLVM::FFloorOp, LLVM::LogOp, LLVM::Log10Op, 103 LLVM::Log2Op, LLVM::PowOp, LLVM::SinOp, LLVM::SqrtOp>(); 104 105 // TODO: Remove once we support replacing non-root ops. 106 target.addLegalOp<gpu::YieldOp, gpu::GPUModuleOp, gpu::ModuleEndOp>(); 107 } 108 109 void mlir::populateGpuToROCDLConversionPatterns( 110 LLVMTypeConverter &converter, RewritePatternSet &patterns, 111 mlir::gpu::amd::Runtime runtime) { 112 using mlir::gpu::amd::Runtime; 113 114 populateWithGenerated(patterns); 115 patterns 116 .add<GPUIndexIntrinsicOpLowering<gpu::ThreadIdOp, ROCDL::ThreadIdXOp, 117 ROCDL::ThreadIdYOp, ROCDL::ThreadIdZOp>, 118 GPUIndexIntrinsicOpLowering<gpu::BlockDimOp, ROCDL::BlockDimXOp, 119 ROCDL::BlockDimYOp, ROCDL::BlockDimZOp>, 120 GPUIndexIntrinsicOpLowering<gpu::BlockIdOp, ROCDL::BlockIdXOp, 121 ROCDL::BlockIdYOp, ROCDL::BlockIdZOp>, 122 GPUIndexIntrinsicOpLowering<gpu::GridDimOp, ROCDL::GridDimXOp, 123 ROCDL::GridDimYOp, ROCDL::GridDimZOp>, 124 GPUReturnOpLowering>(converter); 125 patterns.add<GPUFuncOpLowering>( 126 converter, /*allocaAddrSpace=*/5, 127 StringAttr::get(&converter.getContext(), 128 ROCDL::ROCDLDialect::getKernelFuncAttrName())); 129 if (Runtime::HIP == runtime) { 130 patterns.add<GPUPrintfOpToHIPLowering>(converter); 131 } else if (Runtime::OpenCL == runtime) { 132 // Use address space = 4 to match the OpenCL definition of printf() 133 patterns.add<GPUPrintfOpToLLVMCallLowering>(converter, /*addressSpace=*/4); 134 } 135 136 patterns.add<OpToFuncCallLowering<math::AbsOp>>(converter, "__ocml_fabs_f32", 137 "__ocml_fabs_f64"); 138 patterns.add<OpToFuncCallLowering<math::AtanOp>>(converter, "__ocml_atan_f32", 139 "__ocml_atan_f64"); 140 patterns.add<OpToFuncCallLowering<math::Atan2Op>>( 141 converter, "__ocml_atan2_f32", "__ocml_atan2_f64"); 142 patterns.add<OpToFuncCallLowering<math::CeilOp>>(converter, "__ocml_ceil_f32", 143 "__ocml_ceil_f64"); 144 patterns.add<OpToFuncCallLowering<math::CosOp>>(converter, "__ocml_cos_f32", 145 "__ocml_cos_f64"); 146 patterns.add<OpToFuncCallLowering<math::ExpOp>>(converter, "__ocml_exp_f32", 147 "__ocml_exp_f64"); 148 patterns.add<OpToFuncCallLowering<math::Exp2Op>>(converter, "__ocml_exp2_f32", 149 "__ocml_exp2_f64"); 150 patterns.add<OpToFuncCallLowering<math::ExpM1Op>>( 151 converter, "__ocml_expm1_f32", "__ocml_expm1_f64"); 152 patterns.add<OpToFuncCallLowering<math::FloorOp>>( 153 converter, "__ocml_floor_f32", "__ocml_floor_f64"); 154 patterns.add<OpToFuncCallLowering<math::LogOp>>(converter, "__ocml_log_f32", 155 "__ocml_log_f64"); 156 patterns.add<OpToFuncCallLowering<math::Log10Op>>( 157 converter, "__ocml_log10_f32", "__ocml_log10_f64"); 158 patterns.add<OpToFuncCallLowering<math::Log1pOp>>( 159 converter, "__ocml_log1p_f32", "__ocml_log1p_f64"); 160 patterns.add<OpToFuncCallLowering<math::Log2Op>>(converter, "__ocml_log2_f32", 161 "__ocml_log2_f64"); 162 patterns.add<OpToFuncCallLowering<math::PowFOp>>(converter, "__ocml_pow_f32", 163 "__ocml_pow_f64"); 164 patterns.add<OpToFuncCallLowering<math::RsqrtOp>>( 165 converter, "__ocml_rsqrt_f32", "__ocml_rsqrt_f64"); 166 patterns.add<OpToFuncCallLowering<math::SinOp>>(converter, "__ocml_sin_f32", 167 "__ocml_sin_f64"); 168 patterns.add<OpToFuncCallLowering<math::SqrtOp>>(converter, "__ocml_sqrt_f32", 169 "__ocml_sqrt_f64"); 170 patterns.add<OpToFuncCallLowering<math::TanhOp>>(converter, "__ocml_tanh_f32", 171 "__ocml_tanh_f64"); 172 } 173 174 std::unique_ptr<OperationPass<gpu::GPUModuleOp>> 175 mlir::createLowerGpuOpsToROCDLOpsPass(unsigned indexBitwidth, 176 gpu::amd::Runtime runtime) { 177 return std::make_unique<LowerGpuOpsToROCDLOpsPass>(indexBitwidth, runtime); 178 } 179