1 //===- X86DisassemblerTables.cpp - Disassembler tables ----------*- C++ -*-===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This file is part of the X86 Disassembler Emitter.
10 // It contains the implementation of the disassembler tables.
11 // Documentation for the disassembler emitter in general can be found in
12 //  X86DisassemblerEmitter.h.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "X86DisassemblerTables.h"
17 #include "X86DisassemblerShared.h"
18 #include "llvm/ADT/STLExtras.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/Format.h"
21 #include <map>
22 
23 using namespace llvm;
24 using namespace X86Disassembler;
25 
26 /// stringForContext - Returns a string containing the name of a particular
27 ///   InstructionContext, usually for diagnostic purposes.
28 ///
29 /// @param insnContext  - The instruction class to transform to a string.
30 /// @return           - A statically-allocated string constant that contains the
31 ///                     name of the instruction class.
32 static inline const char* stringForContext(InstructionContext insnContext) {
33   switch (insnContext) {
34   default:
35     llvm_unreachable("Unhandled instruction class");
36 #define ENUM_ENTRY(n, r, d)   case n: return #n; break;
37 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) ENUM_ENTRY(n##_K_B, r, d)\
38         ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)\
39         ENUM_ENTRY(n##_KZ_B, r, d)
40   INSTRUCTION_CONTEXTS
41 #undef ENUM_ENTRY
42 #undef ENUM_ENTRY_K_B
43   }
44 }
45 
46 /// stringForOperandType - Like stringForContext, but for OperandTypes.
47 static inline const char* stringForOperandType(OperandType type) {
48   switch (type) {
49   default:
50     llvm_unreachable("Unhandled type");
51 #define ENUM_ENTRY(i, d) case i: return #i;
52   TYPES
53 #undef ENUM_ENTRY
54   }
55 }
56 
57 /// stringForOperandEncoding - like stringForContext, but for
58 ///   OperandEncodings.
59 static inline const char* stringForOperandEncoding(OperandEncoding encoding) {
60   switch (encoding) {
61   default:
62     llvm_unreachable("Unhandled encoding");
63 #define ENUM_ENTRY(i, d) case i: return #i;
64   ENCODINGS
65 #undef ENUM_ENTRY
66   }
67 }
68 
69 /// inheritsFrom - Indicates whether all instructions in one class also belong
70 ///   to another class.
71 ///
72 /// @param child  - The class that may be the subset
73 /// @param parent - The class that may be the superset
74 /// @return       - True if child is a subset of parent, false otherwise.
75 static inline bool inheritsFrom(InstructionContext child,
76                                 InstructionContext parent, bool noPrefix = true,
77                                 bool VEX_LIG = false, bool VEX_WIG = false,
78                                 bool AdSize64 = false) {
79   if (child == parent)
80     return true;
81 
82   switch (parent) {
83   case IC:
84     return(inheritsFrom(child, IC_64BIT, AdSize64) ||
85            (noPrefix && inheritsFrom(child, IC_OPSIZE, noPrefix)) ||
86            inheritsFrom(child, IC_ADSIZE) ||
87            (noPrefix && inheritsFrom(child, IC_XD, noPrefix)) ||
88            (noPrefix && inheritsFrom(child, IC_XS, noPrefix)));
89   case IC_64BIT:
90     return(inheritsFrom(child, IC_64BIT_REXW)   ||
91            (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE, noPrefix)) ||
92            (!AdSize64 && inheritsFrom(child, IC_64BIT_ADSIZE)) ||
93            (noPrefix && inheritsFrom(child, IC_64BIT_XD, noPrefix))     ||
94            (noPrefix && inheritsFrom(child, IC_64BIT_XS, noPrefix)));
95   case IC_OPSIZE:
96     return inheritsFrom(child, IC_64BIT_OPSIZE) ||
97            inheritsFrom(child, IC_OPSIZE_ADSIZE);
98   case IC_ADSIZE:
99     return (noPrefix && inheritsFrom(child, IC_OPSIZE_ADSIZE, noPrefix));
100   case IC_OPSIZE_ADSIZE:
101     return false;
102   case IC_64BIT_ADSIZE:
103     return (noPrefix && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE, noPrefix));
104   case IC_64BIT_OPSIZE_ADSIZE:
105     return false;
106   case IC_XD:
107     return inheritsFrom(child, IC_64BIT_XD);
108   case IC_XS:
109     return inheritsFrom(child, IC_64BIT_XS);
110   case IC_XD_OPSIZE:
111     return inheritsFrom(child, IC_64BIT_XD_OPSIZE);
112   case IC_XS_OPSIZE:
113     return inheritsFrom(child, IC_64BIT_XS_OPSIZE);
114   case IC_XD_ADSIZE:
115     return inheritsFrom(child, IC_64BIT_XD_ADSIZE);
116   case IC_XS_ADSIZE:
117     return inheritsFrom(child, IC_64BIT_XS_ADSIZE);
118   case IC_64BIT_REXW:
119     return((noPrefix && inheritsFrom(child, IC_64BIT_REXW_XS, noPrefix)) ||
120            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_XD, noPrefix)) ||
121            (noPrefix && inheritsFrom(child, IC_64BIT_REXW_OPSIZE, noPrefix)) ||
122            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE)));
123   case IC_64BIT_OPSIZE:
124     return inheritsFrom(child, IC_64BIT_REXW_OPSIZE) ||
125            (!AdSize64 && inheritsFrom(child, IC_64BIT_OPSIZE_ADSIZE)) ||
126            (!AdSize64 && inheritsFrom(child, IC_64BIT_REXW_ADSIZE));
127   case IC_64BIT_XD:
128     return(inheritsFrom(child, IC_64BIT_REXW_XD) ||
129            (!AdSize64 && inheritsFrom(child, IC_64BIT_XD_ADSIZE)));
130   case IC_64BIT_XS:
131     return(inheritsFrom(child, IC_64BIT_REXW_XS) ||
132            (!AdSize64 && inheritsFrom(child, IC_64BIT_XS_ADSIZE)));
133   case IC_64BIT_XD_OPSIZE:
134   case IC_64BIT_XS_OPSIZE:
135     return false;
136   case IC_64BIT_XD_ADSIZE:
137   case IC_64BIT_XS_ADSIZE:
138     return false;
139   case IC_64BIT_REXW_XD:
140   case IC_64BIT_REXW_XS:
141   case IC_64BIT_REXW_OPSIZE:
142   case IC_64BIT_REXW_ADSIZE:
143     return false;
144   case IC_VEX:
145     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W)) ||
146            (VEX_WIG && inheritsFrom(child, IC_VEX_W)) ||
147            (VEX_LIG && inheritsFrom(child, IC_VEX_L));
148   case IC_VEX_XS:
149     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS)) ||
150            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XS)) ||
151            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XS));
152   case IC_VEX_XD:
153     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD)) ||
154            (VEX_WIG && inheritsFrom(child, IC_VEX_W_XD)) ||
155            (VEX_LIG && inheritsFrom(child, IC_VEX_L_XD));
156   case IC_VEX_OPSIZE:
157     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE)) ||
158            (VEX_WIG && inheritsFrom(child, IC_VEX_W_OPSIZE)) ||
159            (VEX_LIG && inheritsFrom(child, IC_VEX_L_OPSIZE));
160   case IC_VEX_W:
161     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W);
162   case IC_VEX_W_XS:
163     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XS);
164   case IC_VEX_W_XD:
165     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_XD);
166   case IC_VEX_W_OPSIZE:
167     return VEX_LIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
168   case IC_VEX_L:
169     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W);
170   case IC_VEX_L_XS:
171     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XS);
172   case IC_VEX_L_XD:
173     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_XD);
174   case IC_VEX_L_OPSIZE:
175     return VEX_WIG && inheritsFrom(child, IC_VEX_L_W_OPSIZE);
176   case IC_VEX_L_W:
177   case IC_VEX_L_W_XS:
178   case IC_VEX_L_W_XD:
179   case IC_VEX_L_W_OPSIZE:
180     return false;
181   case IC_EVEX:
182     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W)) ||
183            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W)) ||
184            (VEX_WIG && inheritsFrom(child, IC_EVEX_W)) ||
185            (VEX_LIG && inheritsFrom(child, IC_EVEX_L)) ||
186            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2));
187   case IC_EVEX_XS:
188     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
189            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS)) ||
190            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS)) ||
191            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS)) ||
192            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS));
193   case IC_EVEX_XD:
194     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
195            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD)) ||
196            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD)) ||
197            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD)) ||
198            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD));
199   case IC_EVEX_OPSIZE:
200     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
201            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE)) ||
202            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE)) ||
203            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE)) ||
204            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE));
205   case IC_EVEX_K:
206     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
207            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K)) ||
208            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K)) ||
209            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K)) ||
210            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K));
211   case IC_EVEX_XS_K:
212     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
213            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K)) ||
214            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K)) ||
215            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K)) ||
216            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K));
217   case IC_EVEX_XD_K:
218     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
219            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K)) ||
220            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K)) ||
221            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K)) ||
222            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K));
223   case IC_EVEX_OPSIZE_K:
224     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
225            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K)) ||
226            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K)) ||
227            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K)) ||
228            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K));
229   case IC_EVEX_KZ:
230     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
231            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ)) ||
232            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ)) ||
233            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ)) ||
234            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ));
235   case IC_EVEX_XS_KZ:
236     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
237            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ)) ||
238            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ)) ||
239            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ)) ||
240            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ));
241   case IC_EVEX_XD_KZ:
242     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
243            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ)) ||
244            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ)) ||
245            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ)) ||
246            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ));
247   case IC_EVEX_OPSIZE_KZ:
248     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
249            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ)) ||
250            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ)) ||
251            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ)) ||
252            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ));
253   case IC_EVEX_W:
254     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W)) ||
255            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W));
256   case IC_EVEX_W_XS:
257     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS)) ||
258            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS));
259   case IC_EVEX_W_XD:
260     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD)) ||
261            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD));
262   case IC_EVEX_W_OPSIZE:
263     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE)) ||
264            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE));
265   case IC_EVEX_W_K:
266     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K)) ||
267            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K));
268   case IC_EVEX_W_XS_K:
269     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K)) ||
270            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K));
271   case IC_EVEX_W_XD_K:
272     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K)) ||
273            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K));
274   case IC_EVEX_W_OPSIZE_K:
275     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K)) ||
276            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K));
277   case IC_EVEX_W_KZ:
278     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ)) ||
279            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ));
280   case IC_EVEX_W_XS_KZ:
281     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ)) ||
282            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ));
283   case IC_EVEX_W_XD_KZ:
284     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ)) ||
285            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ));
286   case IC_EVEX_W_OPSIZE_KZ:
287     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ)) ||
288            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ));
289   case IC_EVEX_L:
290     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W);
291   case IC_EVEX_L_XS:
292     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS);
293   case IC_EVEX_L_XD:
294     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD);
295   case IC_EVEX_L_OPSIZE:
296     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE);
297   case IC_EVEX_L_K:
298     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K);
299   case IC_EVEX_L_XS_K:
300     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K);
301   case IC_EVEX_L_XD_K:
302     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K);
303   case IC_EVEX_L_OPSIZE_K:
304     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K);
305   case IC_EVEX_L_KZ:
306     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ);
307   case IC_EVEX_L_XS_KZ:
308     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ);
309   case IC_EVEX_L_XD_KZ:
310     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ);
311   case IC_EVEX_L_OPSIZE_KZ:
312     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ);
313   case IC_EVEX_L_W:
314   case IC_EVEX_L_W_XS:
315   case IC_EVEX_L_W_XD:
316   case IC_EVEX_L_W_OPSIZE:
317     return false;
318   case IC_EVEX_L_W_K:
319   case IC_EVEX_L_W_XS_K:
320   case IC_EVEX_L_W_XD_K:
321   case IC_EVEX_L_W_OPSIZE_K:
322     return false;
323   case IC_EVEX_L_W_KZ:
324   case IC_EVEX_L_W_XS_KZ:
325   case IC_EVEX_L_W_XD_KZ:
326   case IC_EVEX_L_W_OPSIZE_KZ:
327     return false;
328   case IC_EVEX_L2:
329     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W);
330   case IC_EVEX_L2_XS:
331     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS);
332   case IC_EVEX_L2_XD:
333     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD);
334   case IC_EVEX_L2_OPSIZE:
335     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE);
336   case IC_EVEX_L2_K:
337     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K);
338   case IC_EVEX_L2_XS_K:
339     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K);
340   case IC_EVEX_L2_XD_K:
341     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K);
342   case IC_EVEX_L2_OPSIZE_K:
343     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K);
344   case IC_EVEX_L2_KZ:
345     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ);
346   case IC_EVEX_L2_XS_KZ:
347     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ);
348   case IC_EVEX_L2_XD_KZ:
349     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ);
350   case IC_EVEX_L2_OPSIZE_KZ:
351     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ);
352   case IC_EVEX_L2_W:
353   case IC_EVEX_L2_W_XS:
354   case IC_EVEX_L2_W_XD:
355   case IC_EVEX_L2_W_OPSIZE:
356     return false;
357   case IC_EVEX_L2_W_K:
358   case IC_EVEX_L2_W_XS_K:
359   case IC_EVEX_L2_W_XD_K:
360   case IC_EVEX_L2_W_OPSIZE_K:
361     return false;
362   case IC_EVEX_L2_W_KZ:
363   case IC_EVEX_L2_W_XS_KZ:
364   case IC_EVEX_L2_W_XD_KZ:
365   case IC_EVEX_L2_W_OPSIZE_KZ:
366     return false;
367   case IC_EVEX_B:
368     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
369            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B)) ||
370            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_B)) ||
371            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_B)) ||
372            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_B));
373   case IC_EVEX_XS_B:
374     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
375            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B)) ||
376            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_B)) ||
377            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_B)) ||
378            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_B));
379   case IC_EVEX_XD_B:
380     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
381            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B)) ||
382            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_B)) ||
383            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_B)) ||
384            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_B));
385   case IC_EVEX_OPSIZE_B:
386     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
387            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B)) ||
388            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_B)) ||
389            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_B)) ||
390            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_B));
391   case IC_EVEX_K_B:
392     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
393            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B)) ||
394            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_K_B)) ||
395            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_K_B)) ||
396            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_K_B));
397   case IC_EVEX_XS_K_B:
398     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
399            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B)) ||
400            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_K_B)) ||
401            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_K_B)) ||
402            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_K_B));
403   case IC_EVEX_XD_K_B:
404     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
405            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B)) ||
406            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_K_B)) ||
407            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_K_B)) ||
408            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_K_B));
409   case IC_EVEX_OPSIZE_K_B:
410     return (VEX_LIG && VEX_WIG &&
411             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
412            (VEX_LIG && VEX_WIG &&
413             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B)) ||
414            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_K_B)) ||
415            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_K_B)) ||
416            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_K_B));
417   case IC_EVEX_KZ_B:
418     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
419            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B)) ||
420            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_KZ_B)) ||
421            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_KZ_B)) ||
422            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_KZ_B));
423   case IC_EVEX_XS_KZ_B:
424     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
425            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B)) ||
426            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XS_KZ_B)) ||
427            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XS_KZ_B)) ||
428            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XS_KZ_B));
429   case IC_EVEX_XD_KZ_B:
430     return (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
431            (VEX_LIG && VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B)) ||
432            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_XD_KZ_B)) ||
433            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_XD_KZ_B)) ||
434            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_XD_KZ_B));
435   case IC_EVEX_OPSIZE_KZ_B:
436     return (VEX_LIG && VEX_WIG &&
437             inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
438            (VEX_LIG && VEX_WIG &&
439             inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B)) ||
440            (VEX_WIG && inheritsFrom(child, IC_EVEX_W_OPSIZE_KZ_B)) ||
441            (VEX_LIG && inheritsFrom(child, IC_EVEX_L_OPSIZE_KZ_B)) ||
442            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_OPSIZE_KZ_B));
443   case IC_EVEX_W_B:
444     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_B)) ||
445            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_B));
446   case IC_EVEX_W_XS_B:
447     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_B)) ||
448            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B));
449   case IC_EVEX_W_XD_B:
450     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_B)) ||
451            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B));
452   case IC_EVEX_W_OPSIZE_B:
453     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B)) ||
454            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B));
455   case IC_EVEX_W_K_B:
456     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_K_B)) ||
457            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_K_B));
458   case IC_EVEX_W_XS_K_B:
459     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B)) ||
460            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B));
461   case IC_EVEX_W_XD_K_B:
462     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B)) ||
463            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B));
464   case IC_EVEX_W_OPSIZE_K_B:
465     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B)) ||
466            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B));
467   case IC_EVEX_W_KZ_B:
468     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B)) ||
469            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B));
470   case IC_EVEX_W_XS_KZ_B:
471     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B)) ||
472            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B));
473   case IC_EVEX_W_XD_KZ_B:
474     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B)) ||
475            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B));
476   case IC_EVEX_W_OPSIZE_KZ_B:
477     return (VEX_LIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B)) ||
478            (VEX_LIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B));
479   case IC_EVEX_L_B:
480     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_B);
481   case IC_EVEX_L_XS_B:
482     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_B);
483   case IC_EVEX_L_XD_B:
484     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_B);
485   case IC_EVEX_L_OPSIZE_B:
486     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_B);
487   case IC_EVEX_L_K_B:
488     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_K_B);
489   case IC_EVEX_L_XS_K_B:
490     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_K_B);
491   case IC_EVEX_L_XD_K_B:
492     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_K_B);
493   case IC_EVEX_L_OPSIZE_K_B:
494     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_K_B);
495   case IC_EVEX_L_KZ_B:
496     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_KZ_B);
497   case IC_EVEX_L_XS_KZ_B:
498     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XS_KZ_B);
499   case IC_EVEX_L_XD_KZ_B:
500     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_XD_KZ_B);
501   case IC_EVEX_L_OPSIZE_KZ_B:
502     return VEX_WIG && inheritsFrom(child, IC_EVEX_L_W_OPSIZE_KZ_B);
503   case IC_EVEX_L_W_B:
504   case IC_EVEX_L_W_XS_B:
505   case IC_EVEX_L_W_XD_B:
506   case IC_EVEX_L_W_OPSIZE_B:
507     return false;
508   case IC_EVEX_L_W_K_B:
509   case IC_EVEX_L_W_XS_K_B:
510   case IC_EVEX_L_W_XD_K_B:
511   case IC_EVEX_L_W_OPSIZE_K_B:
512     return false;
513   case IC_EVEX_L_W_KZ_B:
514   case IC_EVEX_L_W_XS_KZ_B:
515   case IC_EVEX_L_W_XD_KZ_B:
516   case IC_EVEX_L_W_OPSIZE_KZ_B:
517     return false;
518   case IC_EVEX_L2_B:
519     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_B);
520   case IC_EVEX_L2_XS_B:
521     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_B);
522   case IC_EVEX_L2_XD_B:
523     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_B);
524   case IC_EVEX_L2_OPSIZE_B:
525     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_B);
526   case IC_EVEX_L2_K_B:
527     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_K_B);
528   case IC_EVEX_L2_XS_K_B:
529     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_K_B);
530   case IC_EVEX_L2_XD_K_B:
531     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_K_B);
532   case IC_EVEX_L2_OPSIZE_K_B:
533     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_K_B);
534   case IC_EVEX_L2_KZ_B:
535     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_KZ_B);
536   case IC_EVEX_L2_XS_KZ_B:
537     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XS_KZ_B);
538   case IC_EVEX_L2_XD_KZ_B:
539     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_XD_KZ_B);
540   case IC_EVEX_L2_OPSIZE_KZ_B:
541     return VEX_WIG && inheritsFrom(child, IC_EVEX_L2_W_OPSIZE_KZ_B);
542   case IC_EVEX_L2_W_B:
543   case IC_EVEX_L2_W_XS_B:
544   case IC_EVEX_L2_W_XD_B:
545   case IC_EVEX_L2_W_OPSIZE_B:
546     return false;
547   case IC_EVEX_L2_W_K_B:
548   case IC_EVEX_L2_W_XS_K_B:
549   case IC_EVEX_L2_W_XD_K_B:
550   case IC_EVEX_L2_W_OPSIZE_K_B:
551     return false;
552   case IC_EVEX_L2_W_KZ_B:
553   case IC_EVEX_L2_W_XS_KZ_B:
554   case IC_EVEX_L2_W_XD_KZ_B:
555   case IC_EVEX_L2_W_OPSIZE_KZ_B:
556     return false;
557   default:
558     errs() << "Unknown instruction class: " <<
559       stringForContext((InstructionContext)parent) << "\n";
560     llvm_unreachable("Unknown instruction class");
561   }
562 }
563 
564 /// outranks - Indicates whether, if an instruction has two different applicable
565 ///   classes, which class should be preferred when performing decode.  This
566 ///   imposes a total ordering (ties are resolved toward "lower")
567 ///
568 /// @param upper  - The class that may be preferable
569 /// @param lower  - The class that may be less preferable
570 /// @return       - True if upper is to be preferred, false otherwise.
571 static inline bool outranks(InstructionContext upper,
572                             InstructionContext lower) {
573   assert(upper < IC_max);
574   assert(lower < IC_max);
575 
576 #define ENUM_ENTRY(n, r, d) r,
577 #define ENUM_ENTRY_K_B(n, r, d) ENUM_ENTRY(n, r, d) \
578   ENUM_ENTRY(n##_K_B, r, d) ENUM_ENTRY(n##_KZ_B, r, d) \
579   ENUM_ENTRY(n##_KZ, r, d) ENUM_ENTRY(n##_K, r, d) ENUM_ENTRY(n##_B, r, d)
580   static int ranks[IC_max] = {
581     INSTRUCTION_CONTEXTS
582   };
583 #undef ENUM_ENTRY
584 #undef ENUM_ENTRY_K_B
585 
586   return (ranks[upper] > ranks[lower]);
587 }
588 
589 /// getDecisionType - Determines whether a ModRM decision with 255 entries can
590 ///   be compacted by eliminating redundant information.
591 ///
592 /// @param decision - The decision to be compacted.
593 /// @return         - The compactest available representation for the decision.
594 static ModRMDecisionType getDecisionType(ModRMDecision &decision) {
595   bool satisfiesOneEntry = true;
596   bool satisfiesSplitRM = true;
597   bool satisfiesSplitReg = true;
598   bool satisfiesSplitMisc = true;
599 
600   for (unsigned index = 0; index < 256; ++index) {
601     if (decision.instructionIDs[index] != decision.instructionIDs[0])
602       satisfiesOneEntry = false;
603 
604     if (((index & 0xc0) == 0xc0) &&
605        (decision.instructionIDs[index] != decision.instructionIDs[0xc0]))
606       satisfiesSplitRM = false;
607 
608     if (((index & 0xc0) != 0xc0) &&
609        (decision.instructionIDs[index] != decision.instructionIDs[0x00]))
610       satisfiesSplitRM = false;
611 
612     if (((index & 0xc0) == 0xc0) &&
613        (decision.instructionIDs[index] != decision.instructionIDs[index&0xf8]))
614       satisfiesSplitReg = false;
615 
616     if (((index & 0xc0) != 0xc0) &&
617        (decision.instructionIDs[index] != decision.instructionIDs[index&0x38]))
618       satisfiesSplitMisc = false;
619   }
620 
621   if (satisfiesOneEntry)
622     return MODRM_ONEENTRY;
623 
624   if (satisfiesSplitRM)
625     return MODRM_SPLITRM;
626 
627   if (satisfiesSplitReg && satisfiesSplitMisc)
628     return MODRM_SPLITREG;
629 
630   if (satisfiesSplitMisc)
631     return MODRM_SPLITMISC;
632 
633   return MODRM_FULL;
634 }
635 
636 /// stringForDecisionType - Returns a statically-allocated string corresponding
637 ///   to a particular decision type.
638 ///
639 /// @param dt - The decision type.
640 /// @return   - A pointer to the statically-allocated string (e.g.,
641 ///             "MODRM_ONEENTRY" for MODRM_ONEENTRY).
642 static const char* stringForDecisionType(ModRMDecisionType dt) {
643 #define ENUM_ENTRY(n) case n: return #n;
644   switch (dt) {
645     default:
646       llvm_unreachable("Unknown decision type");
647     MODRMTYPES
648   };
649 #undef ENUM_ENTRY
650 }
651 
652 DisassemblerTables::DisassemblerTables() {
653   for (unsigned i = 0; i < array_lengthof(Tables); i++)
654     Tables[i] = llvm::make_unique<ContextDecision>();
655 
656   HasConflicts = false;
657 }
658 
659 DisassemblerTables::~DisassemblerTables() {
660 }
661 
662 void DisassemblerTables::emitModRMDecision(raw_ostream &o1, raw_ostream &o2,
663                                            unsigned &i1, unsigned &i2,
664                                            unsigned &ModRMTableNum,
665                                            ModRMDecision &decision) const {
666   static uint32_t sTableNumber = 0;
667   static uint32_t sEntryNumber = 1;
668   ModRMDecisionType dt = getDecisionType(decision);
669 
670   if (dt == MODRM_ONEENTRY && decision.instructionIDs[0] == 0)
671   {
672     o2.indent(i2) << "{ /* ModRMDecision */" << "\n";
673     i2++;
674 
675     o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
676     o2.indent(i2) << 0 << " /* EmptyTable */\n";
677 
678     i2--;
679     o2.indent(i2) << "}";
680     return;
681   }
682 
683   std::vector<unsigned> ModRMDecision;
684 
685   switch (dt) {
686     default:
687       llvm_unreachable("Unknown decision type");
688     case MODRM_ONEENTRY:
689       ModRMDecision.push_back(decision.instructionIDs[0]);
690       break;
691     case MODRM_SPLITRM:
692       ModRMDecision.push_back(decision.instructionIDs[0x00]);
693       ModRMDecision.push_back(decision.instructionIDs[0xc0]);
694       break;
695     case MODRM_SPLITREG:
696       for (unsigned index = 0; index < 64; index += 8)
697         ModRMDecision.push_back(decision.instructionIDs[index]);
698       for (unsigned index = 0xc0; index < 256; index += 8)
699         ModRMDecision.push_back(decision.instructionIDs[index]);
700       break;
701     case MODRM_SPLITMISC:
702       for (unsigned index = 0; index < 64; index += 8)
703         ModRMDecision.push_back(decision.instructionIDs[index]);
704       for (unsigned index = 0xc0; index < 256; ++index)
705         ModRMDecision.push_back(decision.instructionIDs[index]);
706       break;
707     case MODRM_FULL:
708       for (unsigned index = 0; index < 256; ++index)
709         ModRMDecision.push_back(decision.instructionIDs[index]);
710       break;
711   }
712 
713   unsigned &EntryNumber = ModRMTable[ModRMDecision];
714   if (EntryNumber == 0) {
715     EntryNumber = ModRMTableNum;
716 
717     ModRMTableNum += ModRMDecision.size();
718     o1 << "/* Table" << EntryNumber << " */\n";
719     i1++;
720     for (std::vector<unsigned>::const_iterator I = ModRMDecision.begin(),
721            E = ModRMDecision.end(); I != E; ++I) {
722       o1.indent(i1 * 2) << format("0x%hx", *I) << ", /* "
723                         << InstructionSpecifiers[*I].name << " */\n";
724     }
725     i1--;
726   }
727 
728   o2.indent(i2) << "{ /* struct ModRMDecision */" << "\n";
729   i2++;
730 
731   o2.indent(i2) << stringForDecisionType(dt) << "," << "\n";
732   o2.indent(i2) << EntryNumber << " /* Table" << EntryNumber << " */\n";
733 
734   i2--;
735   o2.indent(i2) << "}";
736 
737   switch (dt) {
738     default:
739       llvm_unreachable("Unknown decision type");
740     case MODRM_ONEENTRY:
741       sEntryNumber += 1;
742       break;
743     case MODRM_SPLITRM:
744       sEntryNumber += 2;
745       break;
746     case MODRM_SPLITREG:
747       sEntryNumber += 16;
748       break;
749     case MODRM_SPLITMISC:
750       sEntryNumber += 8 + 64;
751       break;
752     case MODRM_FULL:
753       sEntryNumber += 256;
754       break;
755   }
756 
757   // We assume that the index can fit into uint16_t.
758   assert(sEntryNumber < 65536U &&
759          "Index into ModRMDecision is too large for uint16_t!");
760 
761   ++sTableNumber;
762 }
763 
764 void DisassemblerTables::emitOpcodeDecision(raw_ostream &o1, raw_ostream &o2,
765                                             unsigned &i1, unsigned &i2,
766                                             unsigned &ModRMTableNum,
767                                             OpcodeDecision &decision) const {
768   o2.indent(i2) << "{ /* struct OpcodeDecision */" << "\n";
769   i2++;
770   o2.indent(i2) << "{" << "\n";
771   i2++;
772 
773   for (unsigned index = 0; index < 256; ++index) {
774     o2.indent(i2);
775 
776     o2 << "/* 0x" << format("%02hhx", index) << " */" << "\n";
777 
778     emitModRMDecision(o1, o2, i1, i2, ModRMTableNum,
779                       decision.modRMDecisions[index]);
780 
781     if (index <  255)
782       o2 << ",";
783 
784     o2 << "\n";
785   }
786 
787   i2--;
788   o2.indent(i2) << "}" << "\n";
789   i2--;
790   o2.indent(i2) << "}" << "\n";
791 }
792 
793 void DisassemblerTables::emitContextDecision(raw_ostream &o1, raw_ostream &o2,
794                                              unsigned &i1, unsigned &i2,
795                                              unsigned &ModRMTableNum,
796                                              ContextDecision &decision,
797                                              const char* name) const {
798   o2.indent(i2) << "static const struct ContextDecision " << name << " = {\n";
799   i2++;
800   o2.indent(i2) << "{ /* opcodeDecisions */" << "\n";
801   i2++;
802 
803   for (unsigned index = 0; index < IC_max; ++index) {
804     o2.indent(i2) << "/* ";
805     o2 << stringForContext((InstructionContext)index);
806     o2 << " */";
807     o2 << "\n";
808 
809     emitOpcodeDecision(o1, o2, i1, i2, ModRMTableNum,
810                        decision.opcodeDecisions[index]);
811 
812     if (index + 1 < IC_max)
813       o2 << ", ";
814   }
815 
816   i2--;
817   o2.indent(i2) << "}" << "\n";
818   i2--;
819   o2.indent(i2) << "};" << "\n";
820 }
821 
822 void DisassemblerTables::emitInstructionInfo(raw_ostream &o,
823                                              unsigned &i) const {
824   unsigned NumInstructions = InstructionSpecifiers.size();
825 
826   o << "static const struct OperandSpecifier x86OperandSets[]["
827     << X86_MAX_OPERANDS << "] = {\n";
828 
829   typedef SmallVector<std::pair<OperandEncoding, OperandType>,
830                       X86_MAX_OPERANDS> OperandListTy;
831   std::map<OperandListTy, unsigned> OperandSets;
832 
833   unsigned OperandSetNum = 0;
834   for (unsigned Index = 0; Index < NumInstructions; ++Index) {
835     OperandListTy OperandList;
836 
837     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
838          ++OperandIndex) {
839       OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[Index]
840                                  .operands[OperandIndex].encoding;
841       OperandType Type = (OperandType)InstructionSpecifiers[Index]
842                          .operands[OperandIndex].type;
843       OperandList.push_back(std::make_pair(Encoding, Type));
844     }
845     unsigned &N = OperandSets[OperandList];
846     if (N != 0) continue;
847 
848     N = ++OperandSetNum;
849 
850     o << "  { /* " << (OperandSetNum - 1) << " */\n";
851     for (unsigned i = 0, e = OperandList.size(); i != e; ++i) {
852       const char *Encoding = stringForOperandEncoding(OperandList[i].first);
853       const char *Type     = stringForOperandType(OperandList[i].second);
854       o << "    { " << Encoding << ", " << Type << " },\n";
855     }
856     o << "  },\n";
857   }
858   o << "};" << "\n\n";
859 
860   o.indent(i * 2) << "static const struct InstructionSpecifier ";
861   o << INSTRUCTIONS_STR "[" << InstructionSpecifiers.size() << "] = {\n";
862 
863   i++;
864 
865   for (unsigned index = 0; index < NumInstructions; ++index) {
866     o.indent(i * 2) << "{ /* " << index << " */\n";
867     i++;
868 
869     OperandListTy OperandList;
870     for (unsigned OperandIndex = 0; OperandIndex < X86_MAX_OPERANDS;
871          ++OperandIndex) {
872       OperandEncoding Encoding = (OperandEncoding)InstructionSpecifiers[index]
873                                  .operands[OperandIndex].encoding;
874       OperandType Type = (OperandType)InstructionSpecifiers[index]
875                          .operands[OperandIndex].type;
876       OperandList.push_back(std::make_pair(Encoding, Type));
877     }
878     o.indent(i * 2) << (OperandSets[OperandList] - 1) << ",\n";
879 
880     o.indent(i * 2) << "/* " << InstructionSpecifiers[index].name << " */\n";
881 
882     i--;
883     o.indent(i * 2) << "},\n";
884   }
885 
886   i--;
887   o.indent(i * 2) << "};" << "\n";
888 }
889 
890 void DisassemblerTables::emitContextTable(raw_ostream &o, unsigned &i) const {
891   const unsigned int tableSize = 16384;
892   o.indent(i * 2) << "static const uint8_t " CONTEXTS_STR
893                      "[" << tableSize << "] = {\n";
894   i++;
895 
896   for (unsigned index = 0; index < tableSize; ++index) {
897     o.indent(i * 2);
898 
899     if (index & ATTR_EVEX) {
900       o << "IC_EVEX";
901       if (index & ATTR_EVEXL2)
902         o << "_L2";
903       else if (index & ATTR_EVEXL)
904         o << "_L";
905       if (index & ATTR_REXW)
906         o << "_W";
907       if (index & ATTR_OPSIZE)
908         o << "_OPSIZE";
909       else if (index & ATTR_XD)
910         o << "_XD";
911       else if (index & ATTR_XS)
912         o << "_XS";
913       if (index & ATTR_EVEXKZ)
914         o << "_KZ";
915       else if (index & ATTR_EVEXK)
916         o << "_K";
917       if (index & ATTR_EVEXB)
918         o << "_B";
919     }
920     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
921       o << "IC_VEX_L_W_OPSIZE";
922     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XD))
923       o << "IC_VEX_L_W_XD";
924     else if ((index & ATTR_VEXL) && (index & ATTR_REXW) && (index & ATTR_XS))
925       o << "IC_VEX_L_W_XS";
926     else if ((index & ATTR_VEXL) && (index & ATTR_REXW))
927       o << "IC_VEX_L_W";
928     else if ((index & ATTR_VEXL) && (index & ATTR_OPSIZE))
929       o << "IC_VEX_L_OPSIZE";
930     else if ((index & ATTR_VEXL) && (index & ATTR_XD))
931       o << "IC_VEX_L_XD";
932     else if ((index & ATTR_VEXL) && (index & ATTR_XS))
933       o << "IC_VEX_L_XS";
934     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_OPSIZE))
935       o << "IC_VEX_W_OPSIZE";
936     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XD))
937       o << "IC_VEX_W_XD";
938     else if ((index & ATTR_VEX) && (index & ATTR_REXW) && (index & ATTR_XS))
939       o << "IC_VEX_W_XS";
940     else if (index & ATTR_VEXL)
941       o << "IC_VEX_L";
942     else if ((index & ATTR_VEX) && (index & ATTR_REXW))
943       o << "IC_VEX_W";
944     else if ((index & ATTR_VEX) && (index & ATTR_OPSIZE))
945       o << "IC_VEX_OPSIZE";
946     else if ((index & ATTR_VEX) && (index & ATTR_XD))
947       o << "IC_VEX_XD";
948     else if ((index & ATTR_VEX) && (index & ATTR_XS))
949       o << "IC_VEX_XS";
950     else if (index & ATTR_VEX)
951       o << "IC_VEX";
952     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XS))
953       o << "IC_64BIT_REXW_XS";
954     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) && (index & ATTR_XD))
955       o << "IC_64BIT_REXW_XD";
956     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
957              (index & ATTR_OPSIZE))
958       o << "IC_64BIT_REXW_OPSIZE";
959     else if ((index & ATTR_64BIT) && (index & ATTR_REXW) &&
960              (index & ATTR_ADSIZE))
961       o << "IC_64BIT_REXW_ADSIZE";
962     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_OPSIZE))
963       o << "IC_64BIT_XD_OPSIZE";
964     else if ((index & ATTR_64BIT) && (index & ATTR_XD) && (index & ATTR_ADSIZE))
965       o << "IC_64BIT_XD_ADSIZE";
966     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_OPSIZE))
967       o << "IC_64BIT_XS_OPSIZE";
968     else if ((index & ATTR_64BIT) && (index & ATTR_XS) && (index & ATTR_ADSIZE))
969       o << "IC_64BIT_XS_ADSIZE";
970     else if ((index & ATTR_64BIT) && (index & ATTR_XS))
971       o << "IC_64BIT_XS";
972     else if ((index & ATTR_64BIT) && (index & ATTR_XD))
973       o << "IC_64BIT_XD";
974     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE) &&
975              (index & ATTR_ADSIZE))
976       o << "IC_64BIT_OPSIZE_ADSIZE";
977     else if ((index & ATTR_64BIT) && (index & ATTR_OPSIZE))
978       o << "IC_64BIT_OPSIZE";
979     else if ((index & ATTR_64BIT) && (index & ATTR_ADSIZE))
980       o << "IC_64BIT_ADSIZE";
981     else if ((index & ATTR_64BIT) && (index & ATTR_REXW))
982       o << "IC_64BIT_REXW";
983     else if ((index & ATTR_64BIT))
984       o << "IC_64BIT";
985     else if ((index & ATTR_XS) && (index & ATTR_OPSIZE))
986       o << "IC_XS_OPSIZE";
987     else if ((index & ATTR_XD) && (index & ATTR_OPSIZE))
988       o << "IC_XD_OPSIZE";
989     else if ((index & ATTR_XS) && (index & ATTR_ADSIZE))
990       o << "IC_XS_ADSIZE";
991     else if ((index & ATTR_XD) && (index & ATTR_ADSIZE))
992       o << "IC_XD_ADSIZE";
993     else if (index & ATTR_XS)
994       o << "IC_XS";
995     else if (index & ATTR_XD)
996       o << "IC_XD";
997     else if ((index & ATTR_OPSIZE) && (index & ATTR_ADSIZE))
998       o << "IC_OPSIZE_ADSIZE";
999     else if (index & ATTR_OPSIZE)
1000       o << "IC_OPSIZE";
1001     else if (index & ATTR_ADSIZE)
1002       o << "IC_ADSIZE";
1003     else
1004       o << "IC";
1005 
1006     if (index < tableSize - 1)
1007       o << ",";
1008     else
1009       o << " ";
1010 
1011     o << " /* " << index << " */";
1012 
1013     o << "\n";
1014   }
1015 
1016   i--;
1017   o.indent(i * 2) << "};" << "\n";
1018 }
1019 
1020 void DisassemblerTables::emitContextDecisions(raw_ostream &o1, raw_ostream &o2,
1021                                               unsigned &i1, unsigned &i2,
1022                                               unsigned &ModRMTableNum) const {
1023   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[0], ONEBYTE_STR);
1024   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[1], TWOBYTE_STR);
1025   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[2], THREEBYTE38_STR);
1026   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[3], THREEBYTE3A_STR);
1027   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[4], XOP8_MAP_STR);
1028   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[5], XOP9_MAP_STR);
1029   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[6], XOPA_MAP_STR);
1030   emitContextDecision(o1, o2, i1, i2, ModRMTableNum, *Tables[7], THREEDNOW_MAP_STR);
1031 }
1032 
1033 void DisassemblerTables::emit(raw_ostream &o) const {
1034   unsigned i1 = 0;
1035   unsigned i2 = 0;
1036 
1037   std::string s1;
1038   std::string s2;
1039 
1040   raw_string_ostream o1(s1);
1041   raw_string_ostream o2(s2);
1042 
1043   emitInstructionInfo(o, i2);
1044   o << "\n";
1045 
1046   emitContextTable(o, i2);
1047   o << "\n";
1048 
1049   unsigned ModRMTableNum = 0;
1050 
1051   o << "static const InstrUID modRMTable[] = {\n";
1052   i1++;
1053   std::vector<unsigned> EmptyTable(1, 0);
1054   ModRMTable[EmptyTable] = ModRMTableNum;
1055   ModRMTableNum += EmptyTable.size();
1056   o1 << "/* EmptyTable */\n";
1057   o1.indent(i1 * 2) << "0x0,\n";
1058   i1--;
1059   emitContextDecisions(o1, o2, i1, i2, ModRMTableNum);
1060 
1061   o << o1.str();
1062   o << "  0x0\n";
1063   o << "};\n";
1064   o << "\n";
1065   o << o2.str();
1066   o << "\n";
1067   o << "\n";
1068 }
1069 
1070 void DisassemblerTables::setTableFields(ModRMDecision     &decision,
1071                                         const ModRMFilter &filter,
1072                                         InstrUID          uid,
1073                                         uint8_t           opcode) {
1074   for (unsigned index = 0; index < 256; ++index) {
1075     if (filter.accepts(index)) {
1076       if (decision.instructionIDs[index] == uid)
1077         continue;
1078 
1079       if (decision.instructionIDs[index] != 0) {
1080         InstructionSpecifier &newInfo =
1081           InstructionSpecifiers[uid];
1082         InstructionSpecifier &previousInfo =
1083           InstructionSpecifiers[decision.instructionIDs[index]];
1084 
1085         if(previousInfo.name == "NOOP" && (newInfo.name == "XCHG16ar" ||
1086                                            newInfo.name == "XCHG32ar" ||
1087                                            newInfo.name == "XCHG64ar"))
1088           continue; // special case for XCHG*ar and NOOP
1089 
1090         if (outranks(previousInfo.insnContext, newInfo.insnContext))
1091           continue;
1092 
1093         if (previousInfo.insnContext == newInfo.insnContext) {
1094           errs() << "Error: Primary decode conflict: ";
1095           errs() << newInfo.name << " would overwrite " << previousInfo.name;
1096           errs() << "\n";
1097           errs() << "ModRM   " << index << "\n";
1098           errs() << "Opcode  " << (uint16_t)opcode << "\n";
1099           errs() << "Context " << stringForContext(newInfo.insnContext) << "\n";
1100           HasConflicts = true;
1101         }
1102       }
1103 
1104       decision.instructionIDs[index] = uid;
1105     }
1106   }
1107 }
1108 
1109 void DisassemblerTables::setTableFields(OpcodeType          type,
1110                                         InstructionContext  insnContext,
1111                                         uint8_t             opcode,
1112                                         const ModRMFilter   &filter,
1113                                         InstrUID            uid,
1114                                         bool                is32bit,
1115                                         bool                noPrefix,
1116                                         bool                ignoresVEX_L,
1117                                         bool                ignoresVEX_W,
1118                                         unsigned            addressSize) {
1119   ContextDecision &decision = *Tables[type];
1120 
1121   for (unsigned index = 0; index < IC_max; ++index) {
1122     if ((is32bit || addressSize == 16) &&
1123         inheritsFrom((InstructionContext)index, IC_64BIT))
1124       continue;
1125 
1126     bool adSize64 = addressSize == 64;
1127     if (inheritsFrom((InstructionContext)index,
1128                      InstructionSpecifiers[uid].insnContext, noPrefix,
1129                      ignoresVEX_L, ignoresVEX_W, adSize64))
1130       setTableFields(decision.opcodeDecisions[index].modRMDecisions[opcode],
1131                      filter,
1132                      uid,
1133                      opcode);
1134   }
1135 }
1136