1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines wrappers for the Target class and related global
11 // functionality.  This makes it easier to access the data and provides a single
12 // place that needs to check it for validity.  All of these classes throw
13 // exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
19 
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
22 #include "Record.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include <algorithm>
25 
26 namespace llvm {
27 
28 struct CodeGenRegister;
29 class CodeGenTarget;
30 
31 // SelectionDAG node properties.
32 //  SDNPMemOperand: indicates that a node touches memory and therefore must
33 //                  have an associated memory operand that describes the access.
34 enum SDNP {
35   SDNPCommutative,
36   SDNPAssociative,
37   SDNPHasChain,
38   SDNPOutFlag,
39   SDNPInFlag,
40   SDNPOptInFlag,
41   SDNPMayLoad,
42   SDNPMayStore,
43   SDNPSideEffect,
44   SDNPMemOperand,
45   SDNPVariadic,
46   SDNPWantRoot,
47   SDNPWantParent
48 };
49 
50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51 /// record corresponds to.
52 MVT::SimpleValueType getValueType(Record *Rec);
53 
54 std::string getName(MVT::SimpleValueType T);
55 std::string getEnumName(MVT::SimpleValueType T);
56 
57 /// getQualifiedName - Return the name of the specified record, with a
58 /// namespace qualifier if the record contains one.
59 std::string getQualifiedName(const Record *R);
60 
61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
62 ///
63 class CodeGenTarget {
64   Record *TargetRec;
65 
66   mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
67   mutable std::vector<CodeGenRegister> Registers;
68   mutable std::vector<Record*> SubRegIndices;
69   mutable std::vector<CodeGenRegisterClass> RegisterClasses;
70   mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
71   void ReadRegisters() const;
72   void ReadSubRegIndices() const;
73   void ReadRegisterClasses() const;
74   void ReadInstructions() const;
75   void ReadLegalValueTypes() const;
76 
77   mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
78 public:
79   CodeGenTarget();
80 
81   Record *getTargetRecord() const { return TargetRec; }
82   const std::string &getName() const;
83 
84   /// getInstNamespace - Return the target-specific instruction namespace.
85   ///
86   std::string getInstNamespace() const;
87 
88   /// getInstructionSet - Return the InstructionSet object.
89   ///
90   Record *getInstructionSet() const;
91 
92   /// getAsmParser - Return the AssemblyParser definition for this target.
93   ///
94   Record *getAsmParser() const;
95 
96   /// getAsmWriter - Return the AssemblyWriter definition for this target.
97   ///
98   Record *getAsmWriter() const;
99 
100   const std::vector<CodeGenRegister> &getRegisters() const {
101     if (Registers.empty()) ReadRegisters();
102     return Registers;
103   }
104 
105   const std::vector<Record*> &getSubRegIndices() const {
106     if (SubRegIndices.empty()) ReadSubRegIndices();
107     return SubRegIndices;
108   }
109 
110   // Map a SubRegIndex Record to its number.
111   unsigned getSubRegIndexNo(Record *idx) const {
112     if (SubRegIndices.empty()) ReadSubRegIndices();
113     std::vector<Record*>::const_iterator i =
114       std::find(SubRegIndices.begin(), SubRegIndices.end(), idx);
115     assert(i != SubRegIndices.end() && "Not a SubRegIndex");
116     return (i - SubRegIndices.begin()) + 1;
117   }
118 
119   const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
120     if (RegisterClasses.empty()) ReadRegisterClasses();
121     return RegisterClasses;
122   }
123 
124   const CodeGenRegisterClass &getRegisterClass(Record *R) const {
125     const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
126     for (unsigned i = 0, e = RC.size(); i != e; ++i)
127       if (RC[i].TheDef == R)
128         return RC[i];
129     assert(0 && "Didn't find the register class");
130     abort();
131   }
132 
133   /// getRegisterClassForRegister - Find the register class that contains the
134   /// specified physical register.  If the register is not in a register
135   /// class, return null. If the register is in multiple classes, and the
136   /// classes have a superset-subset relationship and the same set of
137   /// types, return the superclass.  Otherwise return null.
138   const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
139     const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
140     const CodeGenRegisterClass *FoundRC = 0;
141     for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
142       const CodeGenRegisterClass &RC = RegisterClasses[i];
143       for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
144         if (R != RC.Elements[ei])
145           continue;
146 
147         // If a register's classes have different types, return null.
148         if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
149           return 0;
150 
151         // If this is the first class that contains the register,
152         // make a note of it and go on to the next class.
153         if (!FoundRC) {
154           FoundRC = &RC;
155           break;
156         }
157 
158         std::vector<Record *> Elements(RC.Elements);
159         std::vector<Record *> FoundElements(FoundRC->Elements);
160         std::sort(Elements.begin(), Elements.end());
161         std::sort(FoundElements.begin(), FoundElements.end());
162 
163         // Check to see if the previously found class that contains
164         // the register is a subclass of the current class. If so,
165         // prefer the superclass.
166         if (std::includes(Elements.begin(), Elements.end(),
167                           FoundElements.begin(), FoundElements.end())) {
168           FoundRC = &RC;
169           break;
170         }
171 
172         // Check to see if the previously found class that contains
173         // the register is a superclass of the current class. If so,
174         // prefer the superclass.
175         if (std::includes(FoundElements.begin(), FoundElements.end(),
176                           Elements.begin(), Elements.end()))
177           break;
178 
179         // Multiple classes, and neither is a superclass of the other.
180         // Return null.
181         return 0;
182       }
183     }
184     return FoundRC;
185   }
186 
187   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
188   /// specified physical register.
189   std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
190 
191   const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
192     if (LegalValueTypes.empty()) ReadLegalValueTypes();
193     return LegalValueTypes;
194   }
195 
196   /// isLegalValueType - Return true if the specified value type is natively
197   /// supported by the target (i.e. there are registers that directly hold it).
198   bool isLegalValueType(MVT::SimpleValueType VT) const {
199     const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
200     for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
201       if (LegalVTs[i] == VT) return true;
202     return false;
203   }
204 
205 private:
206   DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
207     if (Instructions.empty()) ReadInstructions();
208     return Instructions;
209   }
210 public:
211 
212   CodeGenInstruction &getInstruction(const Record *InstRec) const {
213     if (Instructions.empty()) ReadInstructions();
214     DenseMap<const Record*, CodeGenInstruction*>::iterator I =
215       Instructions.find(InstRec);
216     assert(I != Instructions.end() && "Not an instruction");
217     return *I->second;
218   }
219 
220   /// getInstructionsByEnumValue - Return all of the instructions defined by the
221   /// target, ordered by their enum value.
222   const std::vector<const CodeGenInstruction*> &
223   getInstructionsByEnumValue() const {
224     if (InstrsByEnum.empty()) ComputeInstrsByEnum();
225     return InstrsByEnum;
226   }
227 
228   typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
229   inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
230   inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
231 
232 
233   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
234   ///
235   bool isLittleEndianEncoding() const;
236 
237 private:
238   void ComputeInstrsByEnum() const;
239 };
240 
241 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
242 /// tablegen class in TargetSelectionDAG.td
243 class ComplexPattern {
244   MVT::SimpleValueType Ty;
245   unsigned NumOperands;
246   std::string SelectFunc;
247   std::vector<Record*> RootNodes;
248   unsigned Properties; // Node properties
249 public:
250   ComplexPattern() : NumOperands(0) {}
251   ComplexPattern(Record *R);
252 
253   MVT::SimpleValueType getValueType() const { return Ty; }
254   unsigned getNumOperands() const { return NumOperands; }
255   const std::string &getSelectFunc() const { return SelectFunc; }
256   const std::vector<Record*> &getRootNodes() const {
257     return RootNodes;
258   }
259   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
260 };
261 
262 } // End llvm namespace
263 
264 #endif
265