1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines wrappers for the Target class and related global
11 // functionality.  This makes it easier to access the data and provides a single
12 // place that needs to check it for validity.  All of these classes abort
13 // on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
18 #define LLVM_UTILS_TABLEGEN_CODEGENTARGET_H
19 
20 #include "CodeGenHwModes.h"
21 #include "CodeGenInstruction.h"
22 #include "CodeGenRegisters.h"
23 #include "InfoByHwMode.h"
24 #include "SDNodeProperties.h"
25 #include "llvm/Support/raw_ostream.h"
26 #include "llvm/TableGen/Record.h"
27 #include <algorithm>
28 
29 namespace llvm {
30 
31 struct CodeGenRegister;
32 class CodeGenSchedModels;
33 class CodeGenTarget;
34 
35 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
36 /// record corresponds to.
37 MVT::SimpleValueType getValueType(Record *Rec);
38 
39 StringRef getName(MVT::SimpleValueType T);
40 StringRef getEnumName(MVT::SimpleValueType T);
41 
42 /// getQualifiedName - Return the name of the specified record, with a
43 /// namespace qualifier if the record contains one.
44 std::string getQualifiedName(const Record *R);
45 
46 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
47 ///
48 class CodeGenTarget {
49   RecordKeeper &Records;
50   Record *TargetRec;
51 
52   mutable DenseMap<const Record*,
53                    std::unique_ptr<CodeGenInstruction>> Instructions;
54   mutable std::unique_ptr<CodeGenRegBank> RegBank;
55   mutable std::vector<Record*> RegAltNameIndices;
56   mutable SmallVector<ValueTypeByHwMode, 8> LegalValueTypes;
57   CodeGenHwModes CGH;
58   void ReadRegAltNameIndices() const;
59   void ReadInstructions() const;
60   void ReadLegalValueTypes() const;
61 
62   mutable std::unique_ptr<CodeGenSchedModels> SchedModels;
63 
64   mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
65 public:
66   CodeGenTarget(RecordKeeper &Records);
67   ~CodeGenTarget();
68 
69   Record *getTargetRecord() const { return TargetRec; }
70   const StringRef getName() const;
71 
72   /// getInstNamespace - Return the target-specific instruction namespace.
73   ///
74   StringRef getInstNamespace() const;
75 
76   /// getInstructionSet - Return the InstructionSet object.
77   ///
78   Record *getInstructionSet() const;
79 
80   /// getAsmParser - Return the AssemblyParser definition for this target.
81   ///
82   Record *getAsmParser() const;
83 
84   /// getAsmParserVariant - Return the AssmblyParserVariant definition for
85   /// this target.
86   ///
87   Record *getAsmParserVariant(unsigned i) const;
88 
89   /// getAsmParserVariantCount - Return the AssmblyParserVariant definition
90   /// available for this target.
91   ///
92   unsigned getAsmParserVariantCount() const;
93 
94   /// getAsmWriter - Return the AssemblyWriter definition for this target.
95   ///
96   Record *getAsmWriter() const;
97 
98   /// getRegBank - Return the register bank description.
99   CodeGenRegBank &getRegBank() const;
100 
101   /// getRegisterByName - If there is a register with the specific AsmName,
102   /// return it.
103   const CodeGenRegister *getRegisterByName(StringRef Name) const;
104 
105   const std::vector<Record*> &getRegAltNameIndices() const {
106     if (RegAltNameIndices.empty()) ReadRegAltNameIndices();
107     return RegAltNameIndices;
108   }
109 
110   const CodeGenRegisterClass &getRegisterClass(Record *R) const {
111     return *getRegBank().getRegClass(R);
112   }
113 
114   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
115   /// specified physical register.
116   std::vector<ValueTypeByHwMode> getRegisterVTs(Record *R) const;
117 
118   ArrayRef<ValueTypeByHwMode> getLegalValueTypes() const {
119     if (LegalValueTypes.empty())
120       ReadLegalValueTypes();
121     return LegalValueTypes;
122   }
123 
124   CodeGenSchedModels &getSchedModels() const;
125 
126   const CodeGenHwModes &getHwModes() const { return CGH; }
127 
128 private:
129   DenseMap<const Record*, std::unique_ptr<CodeGenInstruction>> &
130   getInstructions() const {
131     if (Instructions.empty()) ReadInstructions();
132     return Instructions;
133   }
134 public:
135 
136   CodeGenInstruction &getInstruction(const Record *InstRec) const {
137     if (Instructions.empty()) ReadInstructions();
138     auto I = Instructions.find(InstRec);
139     assert(I != Instructions.end() && "Not an instruction");
140     return *I->second;
141   }
142 
143   /// Returns the number of predefined instructions.
144   static unsigned getNumFixedInstructions();
145 
146   /// getInstructionsByEnumValue - Return all of the instructions defined by the
147   /// target, ordered by their enum value.
148   ArrayRef<const CodeGenInstruction *>
149   getInstructionsByEnumValue() const {
150     if (InstrsByEnum.empty()) ComputeInstrsByEnum();
151     return InstrsByEnum;
152   }
153 
154   typedef ArrayRef<const CodeGenInstruction *>::const_iterator inst_iterator;
155   inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
156   inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
157 
158 
159   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
160   ///
161   bool isLittleEndianEncoding() const;
162 
163   /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
164   /// encodings, reverse the bit order of all instructions.
165   void reverseBitsForLittleEndianEncoding();
166 
167   /// guessInstructionProperties - should we just guess unset instruction
168   /// properties?
169   bool guessInstructionProperties() const;
170 
171 private:
172   void ComputeInstrsByEnum() const;
173 };
174 
175 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
176 /// tablegen class in TargetSelectionDAG.td
177 class ComplexPattern {
178   MVT::SimpleValueType Ty;
179   unsigned NumOperands;
180   std::string SelectFunc;
181   std::vector<Record*> RootNodes;
182   unsigned Properties; // Node properties
183   unsigned Complexity;
184 public:
185   ComplexPattern(Record *R);
186 
187   MVT::SimpleValueType getValueType() const { return Ty; }
188   unsigned getNumOperands() const { return NumOperands; }
189   const std::string &getSelectFunc() const { return SelectFunc; }
190   const std::vector<Record*> &getRootNodes() const {
191     return RootNodes;
192   }
193   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
194   unsigned getComplexity() const { return Complexity; }
195 };
196 
197 } // End llvm namespace
198 
199 #endif
200