1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines wrappers for the Target class and related global
11 // functionality.  This makes it easier to access the data and provides a single
12 // place that needs to check it for validity.  All of these classes throw
13 // exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
19 
20 #include "CodeGenRegisters.h"
21 #include "CodeGenInstruction.h"
22 #include "Record.h"
23 #include "llvm/Support/raw_ostream.h"
24 #include <algorithm>
25 
26 namespace llvm {
27 
28 struct CodeGenRegister;
29 class CodeGenTarget;
30 
31 // SelectionDAG node properties.
32 //  SDNPMemOperand: indicates that a node touches memory and therefore must
33 //                  have an associated memory operand that describes the access.
34 enum SDNP {
35   SDNPCommutative,
36   SDNPAssociative,
37   SDNPHasChain,
38   SDNPOutGlue,
39   SDNPInGlue,
40   SDNPOptInGlue,
41   SDNPMayLoad,
42   SDNPMayStore,
43   SDNPSideEffect,
44   SDNPMemOperand,
45   SDNPVariadic,
46   SDNPWantRoot,
47   SDNPWantParent
48 };
49 
50 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
51 /// record corresponds to.
52 MVT::SimpleValueType getValueType(Record *Rec);
53 
54 std::string getName(MVT::SimpleValueType T);
55 std::string getEnumName(MVT::SimpleValueType T);
56 
57 /// getQualifiedName - Return the name of the specified record, with a
58 /// namespace qualifier if the record contains one.
59 std::string getQualifiedName(const Record *R);
60 
61 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
62 ///
63 class CodeGenTarget {
64   RecordKeeper &Records;
65   Record *TargetRec;
66 
67   mutable DenseMap<const Record*, CodeGenInstruction*> Instructions;
68   mutable std::vector<CodeGenRegister> Registers;
69   mutable std::vector<Record*> SubRegIndices;
70   mutable std::vector<CodeGenRegisterClass> RegisterClasses;
71   mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
72   void ReadRegisters() const;
73   void ReadSubRegIndices() const;
74   void ReadRegisterClasses() const;
75   void ReadInstructions() const;
76   void ReadLegalValueTypes() const;
77 
78   mutable std::vector<const CodeGenInstruction*> InstrsByEnum;
79 public:
80   CodeGenTarget(RecordKeeper &Records);
81 
82   Record *getTargetRecord() const { return TargetRec; }
83   const std::string &getName() const;
84 
85   /// getInstNamespace - Return the target-specific instruction namespace.
86   ///
87   std::string getInstNamespace() const;
88 
89   /// getInstructionSet - Return the InstructionSet object.
90   ///
91   Record *getInstructionSet() const;
92 
93   /// getAsmParser - Return the AssemblyParser definition for this target.
94   ///
95   Record *getAsmParser() const;
96 
97   /// getAsmWriter - Return the AssemblyWriter definition for this target.
98   ///
99   Record *getAsmWriter() const;
100 
101   const std::vector<CodeGenRegister> &getRegisters() const {
102     if (Registers.empty()) ReadRegisters();
103     return Registers;
104   }
105 
106   /// getRegisterByName - If there is a register with the specific AsmName,
107   /// return it.
108   const CodeGenRegister *getRegisterByName(StringRef Name) const;
109 
110   const std::vector<Record*> &getSubRegIndices() const {
111     if (SubRegIndices.empty()) ReadSubRegIndices();
112     return SubRegIndices;
113   }
114 
115   // Map a SubRegIndex Record to its number.
116   unsigned getSubRegIndexNo(Record *idx) const {
117     if (SubRegIndices.empty()) ReadSubRegIndices();
118     std::vector<Record*>::const_iterator i =
119       std::find(SubRegIndices.begin(), SubRegIndices.end(), idx);
120     assert(i != SubRegIndices.end() && "Not a SubRegIndex");
121     return (i - SubRegIndices.begin()) + 1;
122   }
123 
124   // Create a new SubRegIndex with the given name.
125   Record *createSubRegIndex(const std::string &Name);
126 
127   const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
128     if (RegisterClasses.empty()) ReadRegisterClasses();
129     return RegisterClasses;
130   }
131 
132   const CodeGenRegisterClass &getRegisterClass(Record *R) const {
133     const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
134     for (unsigned i = 0, e = RC.size(); i != e; ++i)
135       if (RC[i].TheDef == R)
136         return RC[i];
137     assert(0 && "Didn't find the register class");
138     abort();
139   }
140 
141   /// getRegisterClassForRegister - Find the register class that contains the
142   /// specified physical register.  If the register is not in a register
143   /// class, return null. If the register is in multiple classes, and the
144   /// classes have a superset-subset relationship and the same set of
145   /// types, return the superclass.  Otherwise return null.
146   const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
147     const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
148     const CodeGenRegisterClass *FoundRC = 0;
149     for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
150       const CodeGenRegisterClass &RC = RegisterClasses[i];
151       for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
152         if (R != RC.Elements[ei])
153           continue;
154 
155         // If a register's classes have different types, return null.
156         if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
157           return 0;
158 
159         // If this is the first class that contains the register,
160         // make a note of it and go on to the next class.
161         if (!FoundRC) {
162           FoundRC = &RC;
163           break;
164         }
165 
166         std::vector<Record *> Elements(RC.Elements);
167         std::vector<Record *> FoundElements(FoundRC->Elements);
168         std::sort(Elements.begin(), Elements.end());
169         std::sort(FoundElements.begin(), FoundElements.end());
170 
171         // Check to see if the previously found class that contains
172         // the register is a subclass of the current class. If so,
173         // prefer the superclass.
174         if (std::includes(Elements.begin(), Elements.end(),
175                           FoundElements.begin(), FoundElements.end())) {
176           FoundRC = &RC;
177           break;
178         }
179 
180         // Check to see if the previously found class that contains
181         // the register is a superclass of the current class. If so,
182         // prefer the superclass.
183         if (std::includes(FoundElements.begin(), FoundElements.end(),
184                           Elements.begin(), Elements.end()))
185           break;
186 
187         // Multiple classes, and neither is a superclass of the other.
188         // Return null.
189         return 0;
190       }
191     }
192     return FoundRC;
193   }
194 
195   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
196   /// specified physical register.
197   std::vector<MVT::SimpleValueType> getRegisterVTs(Record *R) const;
198 
199   const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
200     if (LegalValueTypes.empty()) ReadLegalValueTypes();
201     return LegalValueTypes;
202   }
203 
204   /// isLegalValueType - Return true if the specified value type is natively
205   /// supported by the target (i.e. there are registers that directly hold it).
206   bool isLegalValueType(MVT::SimpleValueType VT) const {
207     const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
208     for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
209       if (LegalVTs[i] == VT) return true;
210     return false;
211   }
212 
213 private:
214   DenseMap<const Record*, CodeGenInstruction*> &getInstructions() const {
215     if (Instructions.empty()) ReadInstructions();
216     return Instructions;
217   }
218 public:
219 
220   CodeGenInstruction &getInstruction(const Record *InstRec) const {
221     if (Instructions.empty()) ReadInstructions();
222     DenseMap<const Record*, CodeGenInstruction*>::iterator I =
223       Instructions.find(InstRec);
224     assert(I != Instructions.end() && "Not an instruction");
225     return *I->second;
226   }
227 
228   /// getInstructionsByEnumValue - Return all of the instructions defined by the
229   /// target, ordered by their enum value.
230   const std::vector<const CodeGenInstruction*> &
231   getInstructionsByEnumValue() const {
232     if (InstrsByEnum.empty()) ComputeInstrsByEnum();
233     return InstrsByEnum;
234   }
235 
236   typedef std::vector<const CodeGenInstruction*>::const_iterator inst_iterator;
237   inst_iterator inst_begin() const{return getInstructionsByEnumValue().begin();}
238   inst_iterator inst_end() const { return getInstructionsByEnumValue().end(); }
239 
240 
241   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
242   ///
243   bool isLittleEndianEncoding() const;
244 
245 private:
246   void ComputeInstrsByEnum() const;
247 };
248 
249 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
250 /// tablegen class in TargetSelectionDAG.td
251 class ComplexPattern {
252   MVT::SimpleValueType Ty;
253   unsigned NumOperands;
254   std::string SelectFunc;
255   std::vector<Record*> RootNodes;
256   unsigned Properties; // Node properties
257 public:
258   ComplexPattern() : NumOperands(0) {}
259   ComplexPattern(Record *R);
260 
261   MVT::SimpleValueType getValueType() const { return Ty; }
262   unsigned getNumOperands() const { return NumOperands; }
263   const std::string &getSelectFunc() const { return SelectFunc; }
264   const std::vector<Record*> &getRootNodes() const {
265     return RootNodes;
266   }
267   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
268 };
269 
270 } // End llvm namespace
271 
272 #endif
273