1 //===- CodeGenTarget.h - Target Class Wrapper -------------------*- C++ -*-===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This file defines wrappers for the Target class and related global
11 // functionality.  This makes it easier to access the data and provides a single
12 // place that needs to check it for validity.  All of these classes throw
13 // exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #ifndef CODEGEN_TARGET_H
18 #define CODEGEN_TARGET_H
19 
20 #include "llvm/Support/raw_ostream.h"
21 #include "CodeGenRegisters.h"
22 #include "CodeGenInstruction.h"
23 #include <algorithm>
24 #include <map>
25 
26 namespace llvm {
27 
28 class Record;
29 class RecordKeeper;
30 struct CodeGenRegister;
31 class CodeGenTarget;
32 
33 // SelectionDAG node properties.
34 //  SDNPMemOperand: indicates that a node touches memory and therefore must
35 //                  have an associated memory operand that describes the access.
36 enum SDNP {
37   SDNPCommutative,
38   SDNPAssociative,
39   SDNPHasChain,
40   SDNPOutFlag,
41   SDNPInFlag,
42   SDNPOptInFlag,
43   SDNPMayLoad,
44   SDNPMayStore,
45   SDNPSideEffect,
46   SDNPMemOperand
47 };
48 
49 // ComplexPattern attributes.
50 enum CPAttr { CPAttrParentAsRoot };
51 
52 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
53 /// record corresponds to.
54 MVT::SimpleValueType getValueType(Record *Rec);
55 
56 std::string getName(MVT::SimpleValueType T);
57 std::string getEnumName(MVT::SimpleValueType T);
58 
59 /// getQualifiedName - Return the name of the specified record, with a
60 /// namespace qualifier if the record contains one.
61 std::string getQualifiedName(const Record *R);
62 
63 /// CodeGenTarget - This class corresponds to the Target class in the .td files.
64 ///
65 class CodeGenTarget {
66   Record *TargetRec;
67 
68   mutable std::map<std::string, CodeGenInstruction> Instructions;
69   mutable std::vector<CodeGenRegister> Registers;
70   mutable std::vector<CodeGenRegisterClass> RegisterClasses;
71   mutable std::vector<MVT::SimpleValueType> LegalValueTypes;
72   void ReadRegisters() const;
73   void ReadRegisterClasses() const;
74   void ReadInstructions() const;
75   void ReadLegalValueTypes() const;
76 public:
77   CodeGenTarget();
78 
79   Record *getTargetRecord() const { return TargetRec; }
80   const std::string &getName() const;
81 
82   /// getInstNamespace - Return the target-specific instruction namespace.
83   ///
84   std::string getInstNamespace() const;
85 
86   /// getInstructionSet - Return the InstructionSet object.
87   ///
88   Record *getInstructionSet() const;
89 
90   /// getAsmWriter - Return the AssemblyWriter definition for this target.
91   ///
92   Record *getAsmWriter() const;
93 
94   const std::vector<CodeGenRegister> &getRegisters() const {
95     if (Registers.empty()) ReadRegisters();
96     return Registers;
97   }
98 
99   const std::vector<CodeGenRegisterClass> &getRegisterClasses() const {
100     if (RegisterClasses.empty()) ReadRegisterClasses();
101     return RegisterClasses;
102   }
103 
104   const CodeGenRegisterClass &getRegisterClass(Record *R) const {
105     const std::vector<CodeGenRegisterClass> &RC = getRegisterClasses();
106     for (unsigned i = 0, e = RC.size(); i != e; ++i)
107       if (RC[i].TheDef == R)
108         return RC[i];
109     assert(0 && "Didn't find the register class");
110     abort();
111   }
112 
113   /// getRegisterClassForRegister - Find the register class that contains the
114   /// specified physical register.  If the register is not in a register
115   /// class, return null. If the register is in multiple classes, and the
116   /// classes have a superset-subset relationship and the same set of
117   /// types, return the superclass.  Otherwise return null.
118   const CodeGenRegisterClass *getRegisterClassForRegister(Record *R) const {
119     const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
120     const CodeGenRegisterClass *FoundRC = 0;
121     for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
122       const CodeGenRegisterClass &RC = RegisterClasses[i];
123       for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
124         if (R != RC.Elements[ei])
125           continue;
126 
127         // If a register's classes have different types, return null.
128         if (FoundRC && RC.getValueTypes() != FoundRC->getValueTypes())
129           return 0;
130 
131         // If this is the first class that contains the register,
132         // make a note of it and go on to the next class.
133         if (!FoundRC) {
134           FoundRC = &RC;
135           break;
136         }
137 
138         std::vector<Record *> Elements(RC.Elements);
139         std::vector<Record *> FoundElements(FoundRC->Elements);
140         std::sort(Elements.begin(), Elements.end());
141         std::sort(FoundElements.begin(), FoundElements.end());
142 
143         // Check to see if the previously found class that contains
144         // the register is a subclass of the current class. If so,
145         // prefer the superclass.
146         if (std::includes(Elements.begin(), Elements.end(),
147                           FoundElements.begin(), FoundElements.end())) {
148           FoundRC = &RC;
149           break;
150         }
151 
152         // Check to see if the previously found class that contains
153         // the register is a superclass of the current class. If so,
154         // prefer the superclass.
155         if (std::includes(FoundElements.begin(), FoundElements.end(),
156                           Elements.begin(), Elements.end()))
157           break;
158 
159         // Multiple classes, and neither is a superclass of the other.
160         // Return null.
161         return 0;
162       }
163     }
164     return FoundRC;
165   }
166 
167   /// getRegisterVTs - Find the union of all possible SimpleValueTypes for the
168   /// specified physical register.
169   std::vector<unsigned char> getRegisterVTs(Record *R) const;
170 
171   const std::vector<MVT::SimpleValueType> &getLegalValueTypes() const {
172     if (LegalValueTypes.empty()) ReadLegalValueTypes();
173     return LegalValueTypes;
174   }
175 
176   /// isLegalValueType - Return true if the specified value type is natively
177   /// supported by the target (i.e. there are registers that directly hold it).
178   bool isLegalValueType(MVT::SimpleValueType VT) const {
179     const std::vector<MVT::SimpleValueType> &LegalVTs = getLegalValueTypes();
180     for (unsigned i = 0, e = LegalVTs.size(); i != e; ++i)
181       if (LegalVTs[i] == VT) return true;
182     return false;
183   }
184 
185   /// getInstructions - Return all of the instructions defined for this target.
186   ///
187   const std::map<std::string, CodeGenInstruction> &getInstructions() const {
188     if (Instructions.empty()) ReadInstructions();
189     return Instructions;
190   }
191   std::map<std::string, CodeGenInstruction> &getInstructions() {
192     if (Instructions.empty()) ReadInstructions();
193     return Instructions;
194   }
195 
196   CodeGenInstruction &getInstruction(const std::string &Name) const {
197     const std::map<std::string, CodeGenInstruction> &Insts = getInstructions();
198     assert(Insts.count(Name) && "Not an instruction!");
199     return const_cast<CodeGenInstruction&>(Insts.find(Name)->second);
200   }
201 
202   typedef std::map<std::string,
203                    CodeGenInstruction>::const_iterator inst_iterator;
204   inst_iterator inst_begin() const { return getInstructions().begin(); }
205   inst_iterator inst_end() const { return Instructions.end(); }
206 
207   /// getInstructionsByEnumValue - Return all of the instructions defined by the
208   /// target, ordered by their enum value.
209   void getInstructionsByEnumValue(std::vector<const CodeGenInstruction*>
210                                                 &NumberedInstructions);
211 
212 
213   /// isLittleEndianEncoding - are instruction bit patterns defined as  [0..n]?
214   ///
215   bool isLittleEndianEncoding() const;
216 };
217 
218 /// ComplexPattern - ComplexPattern info, corresponding to the ComplexPattern
219 /// tablegen class in TargetSelectionDAG.td
220 class ComplexPattern {
221   MVT::SimpleValueType Ty;
222   unsigned NumOperands;
223   std::string SelectFunc;
224   std::vector<Record*> RootNodes;
225   unsigned Properties; // Node properties
226   unsigned Attributes; // Pattern attributes
227 public:
228   ComplexPattern() : NumOperands(0) {};
229   ComplexPattern(Record *R);
230 
231   MVT::SimpleValueType getValueType() const { return Ty; }
232   unsigned getNumOperands() const { return NumOperands; }
233   const std::string &getSelectFunc() const { return SelectFunc; }
234   const std::vector<Record*> &getRootNodes() const {
235     return RootNodes;
236   }
237   bool hasProperty(enum SDNP Prop) const { return Properties & (1 << Prop); }
238   bool hasAttribute(enum CPAttr Attr) const { return Attributes & (1 << Attr); }
239 };
240 
241 } // End llvm namespace
242 
243 #endif
244