1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper ---------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file was developed by the LLVM research group and is distributed under 6 // the University of Illinois Open Source License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class wrap target description classes used by the various code 11 // generation TableGen backends. This makes it easier to access the data and 12 // provides a single place that needs to check it for validity. All of these 13 // classes throw exceptions on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "CodeGenTarget.h" 18 #include "CodeGenIntrinsics.h" 19 #include "Record.h" 20 #include "llvm/ADT/StringExtras.h" 21 #include "llvm/Support/CommandLine.h" 22 #include "llvm/Support/Streams.h" 23 #include <set> 24 #include <algorithm> 25 using namespace llvm; 26 27 static cl::opt<unsigned> 28 AsmWriterNum("asmwriternum", cl::init(0), 29 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 30 31 /// getValueType - Return the MCV::ValueType that the specified TableGen record 32 /// corresponds to. 33 MVT::ValueType llvm::getValueType(Record *Rec) { 34 return (MVT::ValueType)Rec->getValueAsInt("Value"); 35 } 36 37 std::string llvm::getName(MVT::ValueType T) { 38 switch (T) { 39 case MVT::Other: return "UNKNOWN"; 40 case MVT::i1: return "MVT::i1"; 41 case MVT::i8: return "MVT::i8"; 42 case MVT::i16: return "MVT::i16"; 43 case MVT::i32: return "MVT::i32"; 44 case MVT::i64: return "MVT::i64"; 45 case MVT::i128: return "MVT::i128"; 46 case MVT::iAny: return "MVT::iAny"; 47 case MVT::fAny: return "MVT::fAny"; 48 case MVT::f32: return "MVT::f32"; 49 case MVT::f64: return "MVT::f64"; 50 case MVT::f80: return "MVT::f80"; 51 case MVT::f128: return "MVT::f128"; 52 case MVT::Flag: return "MVT::Flag"; 53 case MVT::isVoid:return "MVT::void"; 54 case MVT::v8i8: return "MVT::v8i8"; 55 case MVT::v4i16: return "MVT::v4i16"; 56 case MVT::v2i32: return "MVT::v2i32"; 57 case MVT::v1i64: return "MVT::v1i64"; 58 case MVT::v16i8: return "MVT::v16i8"; 59 case MVT::v8i16: return "MVT::v8i16"; 60 case MVT::v4i32: return "MVT::v4i32"; 61 case MVT::v2i64: return "MVT::v2i64"; 62 case MVT::v2f32: return "MVT::v2f32"; 63 case MVT::v4f32: return "MVT::v4f32"; 64 case MVT::v2f64: return "MVT::v2f64"; 65 case MVT::v3i32: return "MVT::v3i32"; 66 case MVT::v3f32: return "MVT::v3f32"; 67 case MVT::iPTR: return "TLI.getPointerTy()"; 68 default: assert(0 && "ILLEGAL VALUE TYPE!"); return ""; 69 } 70 } 71 72 std::string llvm::getEnumName(MVT::ValueType T) { 73 switch (T) { 74 case MVT::Other: return "MVT::Other"; 75 case MVT::i1: return "MVT::i1"; 76 case MVT::i8: return "MVT::i8"; 77 case MVT::i16: return "MVT::i16"; 78 case MVT::i32: return "MVT::i32"; 79 case MVT::i64: return "MVT::i64"; 80 case MVT::i128: return "MVT::i128"; 81 case MVT::iAny: return "MVT::iAny"; 82 case MVT::fAny: return "MVT::fAny"; 83 case MVT::f32: return "MVT::f32"; 84 case MVT::f64: return "MVT::f64"; 85 case MVT::f80: return "MVT::f80"; 86 case MVT::f128: return "MVT::f128"; 87 case MVT::Flag: return "MVT::Flag"; 88 case MVT::isVoid:return "MVT::isVoid"; 89 case MVT::v8i8: return "MVT::v8i8"; 90 case MVT::v4i16: return "MVT::v4i16"; 91 case MVT::v2i32: return "MVT::v2i32"; 92 case MVT::v1i64: return "MVT::v1i64"; 93 case MVT::v16i8: return "MVT::v16i8"; 94 case MVT::v8i16: return "MVT::v8i16"; 95 case MVT::v4i32: return "MVT::v4i32"; 96 case MVT::v2i64: return "MVT::v2i64"; 97 case MVT::v2f32: return "MVT::v2f32"; 98 case MVT::v4f32: return "MVT::v4f32"; 99 case MVT::v2f64: return "MVT::v2f64"; 100 case MVT::v3i32: return "MVT::v3i32"; 101 case MVT::v3f32: return "MVT::v3f32"; 102 case MVT::iPTR: return "MVT::iPTR"; 103 default: assert(0 && "ILLEGAL VALUE TYPE!"); return ""; 104 } 105 } 106 107 108 /// getTarget - Return the current instance of the Target class. 109 /// 110 CodeGenTarget::CodeGenTarget() { 111 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 112 if (Targets.size() == 0) 113 throw std::string("ERROR: No 'Target' subclasses defined!"); 114 if (Targets.size() != 1) 115 throw std::string("ERROR: Multiple subclasses of Target defined!"); 116 TargetRec = Targets[0]; 117 } 118 119 120 const std::string &CodeGenTarget::getName() const { 121 return TargetRec->getName(); 122 } 123 124 Record *CodeGenTarget::getInstructionSet() const { 125 return TargetRec->getValueAsDef("InstructionSet"); 126 } 127 128 /// getAsmWriter - Return the AssemblyWriter definition for this target. 129 /// 130 Record *CodeGenTarget::getAsmWriter() const { 131 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 132 if (AsmWriterNum >= LI.size()) 133 throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"; 134 return LI[AsmWriterNum]; 135 } 136 137 void CodeGenTarget::ReadRegisters() const { 138 std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register"); 139 if (Regs.empty()) 140 throw std::string("No 'Register' subclasses defined!"); 141 142 Registers.reserve(Regs.size()); 143 Registers.assign(Regs.begin(), Regs.end()); 144 } 145 146 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) { 147 DeclaredSpillSize = R->getValueAsInt("SpillSize"); 148 DeclaredSpillAlignment = R->getValueAsInt("SpillAlignment"); 149 } 150 151 const std::string &CodeGenRegister::getName() const { 152 return TheDef->getName(); 153 } 154 155 void CodeGenTarget::ReadRegisterClasses() const { 156 std::vector<Record*> RegClasses = 157 Records.getAllDerivedDefinitions("RegisterClass"); 158 if (RegClasses.empty()) 159 throw std::string("No 'RegisterClass' subclasses defined!"); 160 161 RegisterClasses.reserve(RegClasses.size()); 162 RegisterClasses.assign(RegClasses.begin(), RegClasses.end()); 163 } 164 165 std::vector<unsigned char> CodeGenTarget::getRegisterVTs(Record *R) const { 166 std::vector<unsigned char> Result; 167 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 168 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 169 const CodeGenRegisterClass &RC = RegisterClasses[i]; 170 for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) { 171 if (R == RC.Elements[ei]) { 172 const std::vector<MVT::ValueType> &InVTs = RC.getValueTypes(); 173 for (unsigned i = 0, e = InVTs.size(); i != e; ++i) 174 Result.push_back(InVTs[i]); 175 } 176 } 177 } 178 return Result; 179 } 180 181 182 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) { 183 // Rename anonymous register classes. 184 if (R->getName().size() > 9 && R->getName()[9] == '.') { 185 static unsigned AnonCounter = 0; 186 R->setName("AnonRegClass_"+utostr(AnonCounter++)); 187 } 188 189 std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes"); 190 for (unsigned i = 0, e = TypeList.size(); i != e; ++i) { 191 Record *Type = TypeList[i]; 192 if (!Type->isSubClassOf("ValueType")) 193 throw "RegTypes list member '" + Type->getName() + 194 "' does not derive from the ValueType class!"; 195 VTs.push_back(getValueType(Type)); 196 } 197 assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!"); 198 199 std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList"); 200 for (unsigned i = 0, e = RegList.size(); i != e; ++i) { 201 Record *Reg = RegList[i]; 202 if (!Reg->isSubClassOf("Register")) 203 throw "Register Class member '" + Reg->getName() + 204 "' does not derive from the Register class!"; 205 Elements.push_back(Reg); 206 } 207 208 std::vector<Record*> SubRegClassList = 209 R->getValueAsListOfDefs("SubRegClassList"); 210 for (unsigned i = 0, e = SubRegClassList.size(); i != e; ++i) { 211 Record *SubRegClass = SubRegClassList[i]; 212 if (!SubRegClass->isSubClassOf("RegisterClass")) 213 throw "Register Class member '" + SubRegClass->getName() + 214 "' does not derive from the RegisterClass class!"; 215 SubRegClasses.push_back(SubRegClass); 216 } 217 218 // Allow targets to override the size in bits of the RegisterClass. 219 unsigned Size = R->getValueAsInt("Size"); 220 221 Namespace = R->getValueAsString("Namespace"); 222 SpillSize = Size ? Size : MVT::getSizeInBits(VTs[0]); 223 SpillAlignment = R->getValueAsInt("Alignment"); 224 MethodBodies = R->getValueAsCode("MethodBodies"); 225 MethodProtos = R->getValueAsCode("MethodProtos"); 226 } 227 228 const std::string &CodeGenRegisterClass::getName() const { 229 return TheDef->getName(); 230 } 231 232 void CodeGenTarget::ReadLegalValueTypes() const { 233 const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses(); 234 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 235 for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri) 236 LegalValueTypes.push_back(RCs[i].VTs[ri]); 237 238 // Remove duplicates. 239 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 240 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 241 LegalValueTypes.end()), 242 LegalValueTypes.end()); 243 } 244 245 246 void CodeGenTarget::ReadInstructions() const { 247 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 248 if (Insts.size() <= 2) 249 throw std::string("No 'Instruction' subclasses defined!"); 250 251 // Parse the instructions defined in the .td file. 252 std::string InstFormatName = 253 getAsmWriter()->getValueAsString("InstFormatName"); 254 255 for (unsigned i = 0, e = Insts.size(); i != e; ++i) { 256 std::string AsmStr = Insts[i]->getValueAsString(InstFormatName); 257 Instructions.insert(std::make_pair(Insts[i]->getName(), 258 CodeGenInstruction(Insts[i], AsmStr))); 259 } 260 } 261 262 /// getInstructionsByEnumValue - Return all of the instructions defined by the 263 /// target, ordered by their enum value. 264 void CodeGenTarget:: 265 getInstructionsByEnumValue(std::vector<const CodeGenInstruction*> 266 &NumberedInstructions) { 267 std::map<std::string, CodeGenInstruction>::const_iterator I; 268 I = getInstructions().find("PHI"); 269 if (I == Instructions.end()) throw "Could not find 'PHI' instruction!"; 270 const CodeGenInstruction *PHI = &I->second; 271 272 I = getInstructions().find("INLINEASM"); 273 if (I == Instructions.end()) throw "Could not find 'INLINEASM' instruction!"; 274 const CodeGenInstruction *INLINEASM = &I->second; 275 276 I = getInstructions().find("LABEL"); 277 if (I == Instructions.end()) throw "Could not find 'LABEL' instruction!"; 278 const CodeGenInstruction *LABEL = &I->second; 279 280 I = getInstructions().find("EXTRACT_SUBREG"); 281 if (I == Instructions.end()) 282 throw "Could not find 'EXTRACT_SUBREG' instruction!"; 283 const CodeGenInstruction *EXTRACT_SUBREG = &I->second; 284 285 I = getInstructions().find("INSERT_SUBREG"); 286 if (I == Instructions.end()) 287 throw "Could not find 'INSERT_SUBREG' instruction!"; 288 const CodeGenInstruction *INSERT_SUBREG = &I->second; 289 290 // Print out the rest of the instructions now. 291 NumberedInstructions.push_back(PHI); 292 NumberedInstructions.push_back(INLINEASM); 293 NumberedInstructions.push_back(LABEL); 294 NumberedInstructions.push_back(EXTRACT_SUBREG); 295 NumberedInstructions.push_back(INSERT_SUBREG); 296 for (inst_iterator II = inst_begin(), E = inst_end(); II != E; ++II) 297 if (&II->second != PHI && 298 &II->second != INLINEASM && 299 &II->second != LABEL && 300 &II->second != EXTRACT_SUBREG && 301 &II->second != INSERT_SUBREG) 302 NumberedInstructions.push_back(&II->second); 303 } 304 305 306 /// isLittleEndianEncoding - Return whether this target encodes its instruction 307 /// in little-endian format, i.e. bits laid out in the order [0..n] 308 /// 309 bool CodeGenTarget::isLittleEndianEncoding() const { 310 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 311 } 312 313 314 315 static void ParseConstraint(const std::string &CStr, CodeGenInstruction *I) { 316 // FIXME: Only supports TIED_TO for now. 317 std::string::size_type pos = CStr.find_first_of('='); 318 assert(pos != std::string::npos && "Unrecognized constraint"); 319 std::string Name = CStr.substr(0, pos); 320 321 // TIED_TO: $src1 = $dst 322 std::string::size_type wpos = Name.find_first_of(" \t"); 323 if (wpos == std::string::npos) 324 throw "Illegal format for tied-to constraint: '" + CStr + "'"; 325 std::string DestOpName = Name.substr(0, wpos); 326 std::pair<unsigned,unsigned> DestOp = I->ParseOperandName(DestOpName, false); 327 328 Name = CStr.substr(pos+1); 329 wpos = Name.find_first_not_of(" \t"); 330 if (wpos == std::string::npos) 331 throw "Illegal format for tied-to constraint: '" + CStr + "'"; 332 333 std::pair<unsigned,unsigned> SrcOp = 334 I->ParseOperandName(Name.substr(wpos), false); 335 if (SrcOp > DestOp) 336 throw "Illegal tied-to operand constraint '" + CStr + "'"; 337 338 339 unsigned FlatOpNo = I->getFlattenedOperandNumber(SrcOp); 340 // Build the string for the operand. 341 std::string OpConstraint = 342 "((" + utostr(FlatOpNo) + " << 16) | (1 << TOI::TIED_TO))"; 343 344 345 if (!I->OperandList[DestOp.first].Constraints[DestOp.second].empty()) 346 throw "Operand '" + DestOpName + "' cannot have multiple constraints!"; 347 I->OperandList[DestOp.first].Constraints[DestOp.second] = OpConstraint; 348 } 349 350 static void ParseConstraints(const std::string &CStr, CodeGenInstruction *I) { 351 // Make sure the constraints list for each operand is large enough to hold 352 // constraint info, even if none is present. 353 for (unsigned i = 0, e = I->OperandList.size(); i != e; ++i) 354 I->OperandList[i].Constraints.resize(I->OperandList[i].MINumOperands); 355 356 if (CStr.empty()) return; 357 358 const std::string delims(","); 359 std::string::size_type bidx, eidx; 360 361 bidx = CStr.find_first_not_of(delims); 362 while (bidx != std::string::npos) { 363 eidx = CStr.find_first_of(delims, bidx); 364 if (eidx == std::string::npos) 365 eidx = CStr.length(); 366 367 ParseConstraint(CStr.substr(bidx, eidx), I); 368 bidx = CStr.find_first_not_of(delims, eidx); 369 } 370 } 371 372 CodeGenInstruction::CodeGenInstruction(Record *R, const std::string &AsmStr) 373 : TheDef(R), AsmString(AsmStr) { 374 Name = R->getValueAsString("Name"); 375 Namespace = R->getValueAsString("Namespace"); 376 377 isReturn = R->getValueAsBit("isReturn"); 378 isBranch = R->getValueAsBit("isBranch"); 379 isBarrier = R->getValueAsBit("isBarrier"); 380 isCall = R->getValueAsBit("isCall"); 381 isLoad = R->getValueAsBit("isLoad"); 382 isStore = R->getValueAsBit("isStore"); 383 bool isTwoAddress = R->getValueAsBit("isTwoAddress"); 384 isPredicable = R->getValueAsBit("isPredicable"); 385 isConvertibleToThreeAddress = R->getValueAsBit("isConvertibleToThreeAddress"); 386 isCommutable = R->getValueAsBit("isCommutable"); 387 isTerminator = R->getValueAsBit("isTerminator"); 388 isReMaterializable = R->getValueAsBit("isReMaterializable"); 389 hasDelaySlot = R->getValueAsBit("hasDelaySlot"); 390 usesCustomDAGSchedInserter = R->getValueAsBit("usesCustomDAGSchedInserter"); 391 hasCtrlDep = R->getValueAsBit("hasCtrlDep"); 392 isNotDuplicable = R->getValueAsBit("isNotDuplicable"); 393 hasOptionalDef = false; 394 hasVariableNumberOfOperands = false; 395 396 DagInit *DI; 397 try { 398 DI = R->getValueAsDag("OutOperandList"); 399 } catch (...) { 400 // Error getting operand list, just ignore it (sparcv9). 401 AsmString.clear(); 402 OperandList.clear(); 403 return; 404 } 405 NumDefs = DI->getNumArgs(); 406 407 DagInit *IDI; 408 try { 409 IDI = R->getValueAsDag("InOperandList"); 410 } catch (...) { 411 // Error getting operand list, just ignore it (sparcv9). 412 AsmString.clear(); 413 OperandList.clear(); 414 return; 415 } 416 DI = (DagInit*)(new BinOpInit(BinOpInit::CONCAT, DI, IDI))->Fold(); 417 418 unsigned MIOperandNo = 0; 419 std::set<std::string> OperandNames; 420 for (unsigned i = 0, e = DI->getNumArgs(); i != e; ++i) { 421 DefInit *Arg = dynamic_cast<DefInit*>(DI->getArg(i)); 422 if (!Arg) 423 throw "Illegal operand for the '" + R->getName() + "' instruction!"; 424 425 Record *Rec = Arg->getDef(); 426 std::string PrintMethod = "printOperand"; 427 unsigned NumOps = 1; 428 DagInit *MIOpInfo = 0; 429 if (Rec->isSubClassOf("Operand")) { 430 PrintMethod = Rec->getValueAsString("PrintMethod"); 431 MIOpInfo = Rec->getValueAsDag("MIOperandInfo"); 432 433 // Verify that MIOpInfo has an 'ops' root value. 434 if (!dynamic_cast<DefInit*>(MIOpInfo->getOperator()) || 435 dynamic_cast<DefInit*>(MIOpInfo->getOperator()) 436 ->getDef()->getName() != "ops") 437 throw "Bad value for MIOperandInfo in operand '" + Rec->getName() + 438 "'\n"; 439 440 // If we have MIOpInfo, then we have #operands equal to number of entries 441 // in MIOperandInfo. 442 if (unsigned NumArgs = MIOpInfo->getNumArgs()) 443 NumOps = NumArgs; 444 445 if (Rec->isSubClassOf("PredicateOperand")) 446 isPredicable = true; 447 else if (Rec->isSubClassOf("OptionalDefOperand")) 448 hasOptionalDef = true; 449 } else if (Rec->getName() == "variable_ops") { 450 hasVariableNumberOfOperands = true; 451 continue; 452 } else if (!Rec->isSubClassOf("RegisterClass") && 453 Rec->getName() != "ptr_rc") 454 throw "Unknown operand class '" + Rec->getName() + 455 "' in instruction '" + R->getName() + "' instruction!"; 456 457 // Check that the operand has a name and that it's unique. 458 if (DI->getArgName(i).empty()) 459 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) + 460 " has no name!"; 461 if (!OperandNames.insert(DI->getArgName(i)).second) 462 throw "In instruction '" + R->getName() + "', operand #" + utostr(i) + 463 " has the same name as a previous operand!"; 464 465 OperandList.push_back(OperandInfo(Rec, DI->getArgName(i), PrintMethod, 466 MIOperandNo, NumOps, MIOpInfo)); 467 MIOperandNo += NumOps; 468 } 469 470 // Parse Constraints. 471 ParseConstraints(R->getValueAsString("Constraints"), this); 472 473 // For backward compatibility: isTwoAddress means operand 1 is tied to 474 // operand 0. 475 if (isTwoAddress) { 476 if (!OperandList[1].Constraints[0].empty()) 477 throw R->getName() + ": cannot use isTwoAddress property: instruction " 478 "already has constraint set!"; 479 OperandList[1].Constraints[0] = "((0 << 16) | (1 << TOI::TIED_TO))"; 480 } 481 482 // Any operands with unset constraints get 0 as their constraint. 483 for (unsigned op = 0, e = OperandList.size(); op != e; ++op) 484 for (unsigned j = 0, e = OperandList[op].MINumOperands; j != e; ++j) 485 if (OperandList[op].Constraints[j].empty()) 486 OperandList[op].Constraints[j] = "0"; 487 488 // Parse the DisableEncoding field. 489 std::string DisableEncoding = R->getValueAsString("DisableEncoding"); 490 while (1) { 491 std::string OpName = getToken(DisableEncoding, " ,\t"); 492 if (OpName.empty()) break; 493 494 // Figure out which operand this is. 495 std::pair<unsigned,unsigned> Op = ParseOperandName(OpName, false); 496 497 // Mark the operand as not-to-be encoded. 498 if (Op.second >= OperandList[Op.first].DoNotEncode.size()) 499 OperandList[Op.first].DoNotEncode.resize(Op.second+1); 500 OperandList[Op.first].DoNotEncode[Op.second] = true; 501 } 502 } 503 504 505 506 /// getOperandNamed - Return the index of the operand with the specified 507 /// non-empty name. If the instruction does not have an operand with the 508 /// specified name, throw an exception. 509 /// 510 unsigned CodeGenInstruction::getOperandNamed(const std::string &Name) const { 511 assert(!Name.empty() && "Cannot search for operand with no name!"); 512 for (unsigned i = 0, e = OperandList.size(); i != e; ++i) 513 if (OperandList[i].Name == Name) return i; 514 throw "Instruction '" + TheDef->getName() + 515 "' does not have an operand named '$" + Name + "'!"; 516 } 517 518 std::pair<unsigned,unsigned> 519 CodeGenInstruction::ParseOperandName(const std::string &Op, 520 bool AllowWholeOp) { 521 if (Op.empty() || Op[0] != '$') 522 throw TheDef->getName() + ": Illegal operand name: '" + Op + "'"; 523 524 std::string OpName = Op.substr(1); 525 std::string SubOpName; 526 527 // Check to see if this is $foo.bar. 528 std::string::size_type DotIdx = OpName.find_first_of("."); 529 if (DotIdx != std::string::npos) { 530 SubOpName = OpName.substr(DotIdx+1); 531 if (SubOpName.empty()) 532 throw TheDef->getName() + ": illegal empty suboperand name in '" +Op +"'"; 533 OpName = OpName.substr(0, DotIdx); 534 } 535 536 unsigned OpIdx = getOperandNamed(OpName); 537 538 if (SubOpName.empty()) { // If no suboperand name was specified: 539 // If one was needed, throw. 540 if (OperandList[OpIdx].MINumOperands > 1 && !AllowWholeOp && 541 SubOpName.empty()) 542 throw TheDef->getName() + ": Illegal to refer to" 543 " whole operand part of complex operand '" + Op + "'"; 544 545 // Otherwise, return the operand. 546 return std::make_pair(OpIdx, 0U); 547 } 548 549 // Find the suboperand number involved. 550 DagInit *MIOpInfo = OperandList[OpIdx].MIOperandInfo; 551 if (MIOpInfo == 0) 552 throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'"; 553 554 // Find the operand with the right name. 555 for (unsigned i = 0, e = MIOpInfo->getNumArgs(); i != e; ++i) 556 if (MIOpInfo->getArgName(i) == SubOpName) 557 return std::make_pair(OpIdx, i); 558 559 // Otherwise, didn't find it! 560 throw TheDef->getName() + ": unknown suboperand name in '" + Op + "'"; 561 } 562 563 564 565 566 //===----------------------------------------------------------------------===// 567 // ComplexPattern implementation 568 // 569 ComplexPattern::ComplexPattern(Record *R) { 570 Ty = ::getValueType(R->getValueAsDef("Ty")); 571 NumOperands = R->getValueAsInt("NumOperands"); 572 SelectFunc = R->getValueAsString("SelectFunc"); 573 RootNodes = R->getValueAsListOfDefs("RootNodes"); 574 575 // Parse the properties. 576 Properties = 0; 577 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 578 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 579 if (PropList[i]->getName() == "SDNPHasChain") { 580 Properties |= 1 << SDNPHasChain; 581 } else if (PropList[i]->getName() == "SDNPOptInFlag") { 582 Properties |= 1 << SDNPOptInFlag; 583 } else { 584 cerr << "Unsupported SD Node property '" << PropList[i]->getName() 585 << "' on ComplexPattern '" << R->getName() << "'!\n"; 586 exit(1); 587 } 588 } 589 590 //===----------------------------------------------------------------------===// 591 // CodeGenIntrinsic Implementation 592 //===----------------------------------------------------------------------===// 593 594 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC) { 595 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 596 597 std::vector<CodeGenIntrinsic> Result; 598 599 // If we are in the context of a target .td file, get the target info so that 600 // we can decode the current intptr_t. 601 CodeGenTarget *CGT = 0; 602 if (Records.getClass("Target") && 603 Records.getAllDerivedDefinitions("Target").size() == 1) 604 CGT = new CodeGenTarget(); 605 606 for (unsigned i = 0, e = I.size(); i != e; ++i) 607 Result.push_back(CodeGenIntrinsic(I[i], CGT)); 608 delete CGT; 609 return Result; 610 } 611 612 CodeGenIntrinsic::CodeGenIntrinsic(Record *R, CodeGenTarget *CGT) { 613 TheDef = R; 614 std::string DefName = R->getName(); 615 ModRef = WriteMem; 616 isOverloaded = false; 617 618 if (DefName.size() <= 4 || 619 std::string(DefName.begin(), DefName.begin()+4) != "int_") 620 throw "Intrinsic '" + DefName + "' does not start with 'int_'!"; 621 EnumName = std::string(DefName.begin()+4, DefName.end()); 622 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 623 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 624 TargetPrefix = R->getValueAsString("TargetPrefix"); 625 Name = R->getValueAsString("LLVMName"); 626 if (Name == "") { 627 // If an explicit name isn't specified, derive one from the DefName. 628 Name = "llvm."; 629 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 630 if (EnumName[i] == '_') 631 Name += '.'; 632 else 633 Name += EnumName[i]; 634 } else { 635 // Verify it starts with "llvm.". 636 if (Name.size() <= 5 || 637 std::string(Name.begin(), Name.begin()+5) != "llvm.") 638 throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"; 639 } 640 641 // If TargetPrefix is specified, make sure that Name starts with 642 // "llvm.<targetprefix>.". 643 if (!TargetPrefix.empty()) { 644 if (Name.size() < 6+TargetPrefix.size() || 645 std::string(Name.begin()+5, Name.begin()+6+TargetPrefix.size()) 646 != (TargetPrefix+".")) 647 throw "Intrinsic '" + DefName + "' does not start with 'llvm." + 648 TargetPrefix + ".'!"; 649 } 650 651 // Parse the list of argument types. 652 ListInit *TypeList = R->getValueAsListInit("Types"); 653 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 654 Record *TyEl = TypeList->getElementAsRecord(i); 655 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 656 MVT::ValueType VT = getValueType(TyEl->getValueAsDef("VT")); 657 isOverloaded |= VT == MVT::iAny || VT == MVT::fAny; 658 ArgVTs.push_back(VT); 659 ArgTypeDefs.push_back(TyEl); 660 } 661 if (ArgVTs.size() == 0) 662 throw "Intrinsic '"+DefName+"' needs at least a type for the ret value!"; 663 664 665 // Parse the intrinsic properties. 666 ListInit *PropList = R->getValueAsListInit("Properties"); 667 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 668 Record *Property = PropList->getElementAsRecord(i); 669 assert(Property->isSubClassOf("IntrinsicProperty") && 670 "Expected a property!"); 671 672 if (Property->getName() == "IntrNoMem") 673 ModRef = NoMem; 674 else if (Property->getName() == "IntrReadArgMem") 675 ModRef = ReadArgMem; 676 else if (Property->getName() == "IntrReadMem") 677 ModRef = ReadMem; 678 else if (Property->getName() == "IntrWriteArgMem") 679 ModRef = WriteArgMem; 680 else if (Property->getName() == "IntrWriteMem") 681 ModRef = WriteMem; 682 else 683 assert(0 && "Unknown property!"); 684 } 685 } 686