1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class wraps target description classes used by the various code 11 // generation TableGen backends. This makes it easier to access the data and 12 // provides a single place that needs to check it for validity. All of these 13 // classes abort on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "CodeGenTarget.h" 18 #include "CodeGenIntrinsics.h" 19 #include "CodeGenSchedule.h" 20 #include "llvm/ADT/STLExtras.h" 21 #include "llvm/ADT/StringExtras.h" 22 #include "llvm/Support/CommandLine.h" 23 #include "llvm/TableGen/Error.h" 24 #include "llvm/TableGen/Record.h" 25 #include <algorithm> 26 using namespace llvm; 27 28 static cl::opt<unsigned> 29 AsmParserNum("asmparsernum", cl::init(0), 30 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 31 32 static cl::opt<unsigned> 33 AsmWriterNum("asmwriternum", cl::init(0), 34 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 35 36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 37 /// record corresponds to. 38 MVT::SimpleValueType llvm::getValueType(Record *Rec) { 39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 40 } 41 42 std::string llvm::getName(MVT::SimpleValueType T) { 43 switch (T) { 44 case MVT::Other: return "UNKNOWN"; 45 case MVT::iPTR: return "TLI.getPointerTy()"; 46 case MVT::iPTRAny: return "TLI.getPointerTy()"; 47 default: return getEnumName(T); 48 } 49 } 50 51 std::string llvm::getEnumName(MVT::SimpleValueType T) { 52 switch (T) { 53 case MVT::Other: return "MVT::Other"; 54 case MVT::i1: return "MVT::i1"; 55 case MVT::i8: return "MVT::i8"; 56 case MVT::i16: return "MVT::i16"; 57 case MVT::i32: return "MVT::i32"; 58 case MVT::i64: return "MVT::i64"; 59 case MVT::i128: return "MVT::i128"; 60 case MVT::iAny: return "MVT::iAny"; 61 case MVT::fAny: return "MVT::fAny"; 62 case MVT::vAny: return "MVT::vAny"; 63 case MVT::f16: return "MVT::f16"; 64 case MVT::f32: return "MVT::f32"; 65 case MVT::f64: return "MVT::f64"; 66 case MVT::f80: return "MVT::f80"; 67 case MVT::f128: return "MVT::f128"; 68 case MVT::ppcf128: return "MVT::ppcf128"; 69 case MVT::x86mmx: return "MVT::x86mmx"; 70 case MVT::Glue: return "MVT::Glue"; 71 case MVT::isVoid: return "MVT::isVoid"; 72 case MVT::v2i1: return "MVT::v2i1"; 73 case MVT::v4i1: return "MVT::v4i1"; 74 case MVT::v8i1: return "MVT::v8i1"; 75 case MVT::v16i1: return "MVT::v16i1"; 76 case MVT::v32i1: return "MVT::v32i1"; 77 case MVT::v64i1: return "MVT::v64i1"; 78 case MVT::v1i8: return "MVT::v1i8"; 79 case MVT::v2i8: return "MVT::v2i8"; 80 case MVT::v4i8: return "MVT::v4i8"; 81 case MVT::v8i8: return "MVT::v8i8"; 82 case MVT::v16i8: return "MVT::v16i8"; 83 case MVT::v32i8: return "MVT::v32i8"; 84 case MVT::v64i8: return "MVT::v64i8"; 85 case MVT::v1i16: return "MVT::v1i16"; 86 case MVT::v2i16: return "MVT::v2i16"; 87 case MVT::v4i16: return "MVT::v4i16"; 88 case MVT::v8i16: return "MVT::v8i16"; 89 case MVT::v16i16: return "MVT::v16i16"; 90 case MVT::v32i16: return "MVT::v32i16"; 91 case MVT::v1i32: return "MVT::v1i32"; 92 case MVT::v2i32: return "MVT::v2i32"; 93 case MVT::v4i32: return "MVT::v4i32"; 94 case MVT::v8i32: return "MVT::v8i32"; 95 case MVT::v16i32: return "MVT::v16i32"; 96 case MVT::v1i64: return "MVT::v1i64"; 97 case MVT::v2i64: return "MVT::v2i64"; 98 case MVT::v4i64: return "MVT::v4i64"; 99 case MVT::v8i64: return "MVT::v8i64"; 100 case MVT::v16i64: return "MVT::v16i64"; 101 case MVT::v2f16: return "MVT::v2f16"; 102 case MVT::v4f16: return "MVT::v4f16"; 103 case MVT::v8f16: return "MVT::v8f16"; 104 case MVT::v1f32: return "MVT::v1f32"; 105 case MVT::v2f32: return "MVT::v2f32"; 106 case MVT::v4f32: return "MVT::v4f32"; 107 case MVT::v8f32: return "MVT::v8f32"; 108 case MVT::v16f32: return "MVT::v16f32"; 109 case MVT::v1f64: return "MVT::v1f64"; 110 case MVT::v2f64: return "MVT::v2f64"; 111 case MVT::v4f64: return "MVT::v4f64"; 112 case MVT::v8f64: return "MVT::v8f64"; 113 case MVT::Metadata: return "MVT::Metadata"; 114 case MVT::iPTR: return "MVT::iPTR"; 115 case MVT::iPTRAny: return "MVT::iPTRAny"; 116 case MVT::Untyped: return "MVT::Untyped"; 117 default: llvm_unreachable("ILLEGAL VALUE TYPE!"); 118 } 119 } 120 121 /// getQualifiedName - Return the name of the specified record, with a 122 /// namespace qualifier if the record contains one. 123 /// 124 std::string llvm::getQualifiedName(const Record *R) { 125 std::string Namespace; 126 if (R->getValue("Namespace")) 127 Namespace = R->getValueAsString("Namespace"); 128 if (Namespace.empty()) return R->getName(); 129 return Namespace + "::" + R->getName(); 130 } 131 132 133 /// getTarget - Return the current instance of the Target class. 134 /// 135 CodeGenTarget::CodeGenTarget(RecordKeeper &records) 136 : Records(records), RegBank(0), SchedModels(0) { 137 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 138 if (Targets.size() == 0) 139 PrintFatalError("ERROR: No 'Target' subclasses defined!"); 140 if (Targets.size() != 1) 141 PrintFatalError("ERROR: Multiple subclasses of Target defined!"); 142 TargetRec = Targets[0]; 143 } 144 145 CodeGenTarget::~CodeGenTarget() { 146 DeleteContainerSeconds(Instructions); 147 delete RegBank; 148 delete SchedModels; 149 } 150 151 const std::string &CodeGenTarget::getName() const { 152 return TargetRec->getName(); 153 } 154 155 std::string CodeGenTarget::getInstNamespace() const { 156 for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) { 157 // Make sure not to pick up "TargetOpcode" by accidentally getting 158 // the namespace off the PHI instruction or something. 159 if ((*i)->Namespace != "TargetOpcode") 160 return (*i)->Namespace; 161 } 162 163 return ""; 164 } 165 166 Record *CodeGenTarget::getInstructionSet() const { 167 return TargetRec->getValueAsDef("InstructionSet"); 168 } 169 170 171 /// getAsmParser - Return the AssemblyParser definition for this target. 172 /// 173 Record *CodeGenTarget::getAsmParser() const { 174 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 175 if (AsmParserNum >= LI.size()) 176 PrintFatalError("Target does not have an AsmParser #" + utostr(AsmParserNum) + "!"); 177 return LI[AsmParserNum]; 178 } 179 180 /// getAsmParserVariant - Return the AssmblyParserVariant definition for 181 /// this target. 182 /// 183 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const { 184 std::vector<Record*> LI = 185 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 186 if (i >= LI.size()) 187 PrintFatalError("Target does not have an AsmParserVariant #" + utostr(i) + "!"); 188 return LI[i]; 189 } 190 191 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition 192 /// available for this target. 193 /// 194 unsigned CodeGenTarget::getAsmParserVariantCount() const { 195 std::vector<Record*> LI = 196 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 197 return LI.size(); 198 } 199 200 /// getAsmWriter - Return the AssemblyWriter definition for this target. 201 /// 202 Record *CodeGenTarget::getAsmWriter() const { 203 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 204 if (AsmWriterNum >= LI.size()) 205 PrintFatalError("Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!"); 206 return LI[AsmWriterNum]; 207 } 208 209 CodeGenRegBank &CodeGenTarget::getRegBank() const { 210 if (!RegBank) 211 RegBank = new CodeGenRegBank(Records); 212 return *RegBank; 213 } 214 215 void CodeGenTarget::ReadRegAltNameIndices() const { 216 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); 217 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); 218 } 219 220 /// getRegisterByName - If there is a register with the specific AsmName, 221 /// return it. 222 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 223 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 224 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 225 if (I == Regs.end()) 226 return 0; 227 return I->second; 228 } 229 230 std::vector<MVT::SimpleValueType> CodeGenTarget:: 231 getRegisterVTs(Record *R) const { 232 const CodeGenRegister *Reg = getRegBank().getReg(R); 233 std::vector<MVT::SimpleValueType> Result; 234 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 235 for (unsigned i = 0, e = RCs.size(); i != e; ++i) { 236 const CodeGenRegisterClass &RC = *RCs[i]; 237 if (RC.contains(Reg)) { 238 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes(); 239 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 240 } 241 } 242 243 // Remove duplicates. 244 array_pod_sort(Result.begin(), Result.end()); 245 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 246 return Result; 247 } 248 249 250 void CodeGenTarget::ReadLegalValueTypes() const { 251 ArrayRef<CodeGenRegisterClass*> RCs = getRegBank().getRegClasses(); 252 for (unsigned i = 0, e = RCs.size(); i != e; ++i) 253 for (unsigned ri = 0, re = RCs[i]->VTs.size(); ri != re; ++ri) 254 LegalValueTypes.push_back(RCs[i]->VTs[ri]); 255 256 // Remove duplicates. 257 std::sort(LegalValueTypes.begin(), LegalValueTypes.end()); 258 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 259 LegalValueTypes.end()), 260 LegalValueTypes.end()); 261 } 262 263 CodeGenSchedModels &CodeGenTarget::getSchedModels() const { 264 if (!SchedModels) 265 SchedModels = new CodeGenSchedModels(Records, *this); 266 return *SchedModels; 267 } 268 269 void CodeGenTarget::ReadInstructions() const { 270 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 271 if (Insts.size() <= 2) 272 PrintFatalError("No 'Instruction' subclasses defined!"); 273 274 // Parse the instructions defined in the .td file. 275 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 276 Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]); 277 } 278 279 static const CodeGenInstruction * 280 GetInstByName(const char *Name, 281 const DenseMap<const Record*, CodeGenInstruction*> &Insts, 282 RecordKeeper &Records) { 283 const Record *Rec = Records.getDef(Name); 284 285 DenseMap<const Record*, CodeGenInstruction*>::const_iterator 286 I = Insts.find(Rec); 287 if (Rec == 0 || I == Insts.end()) 288 PrintFatalError(std::string("Could not find '") + Name + "' instruction!"); 289 return I->second; 290 } 291 292 namespace { 293 /// SortInstByName - Sorting predicate to sort instructions by name. 294 /// 295 struct SortInstByName { 296 bool operator()(const CodeGenInstruction *Rec1, 297 const CodeGenInstruction *Rec2) const { 298 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 299 } 300 }; 301 } 302 303 /// \brief Return all of the instructions defined by the target, ordered by 304 /// their enum value. 305 void CodeGenTarget::ComputeInstrsByEnum() const { 306 // The ordering here must match the ordering in TargetOpcodes.h. 307 static const char *const FixedInstrs[] = { 308 "PHI", 309 "INLINEASM", 310 "PROLOG_LABEL", 311 "EH_LABEL", 312 "GC_LABEL", 313 "KILL", 314 "EXTRACT_SUBREG", 315 "INSERT_SUBREG", 316 "IMPLICIT_DEF", 317 "SUBREG_TO_REG", 318 "COPY_TO_REGCLASS", 319 "DBG_VALUE", 320 "REG_SEQUENCE", 321 "COPY", 322 "BUNDLE", 323 "LIFETIME_START", 324 "LIFETIME_END", 325 "STACKMAP", 326 "PATCHPOINT", 327 0 328 }; 329 const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions(); 330 for (const char *const *p = FixedInstrs; *p; ++p) { 331 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 332 assert(Instr && "Missing target independent instruction"); 333 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 334 InstrsByEnum.push_back(Instr); 335 } 336 unsigned EndOfPredefines = InstrsByEnum.size(); 337 338 for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator 339 I = Insts.begin(), E = Insts.end(); I != E; ++I) { 340 const CodeGenInstruction *CGI = I->second; 341 if (CGI->Namespace != "TargetOpcode") 342 InstrsByEnum.push_back(CGI); 343 } 344 345 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 346 347 // All of the instructions are now in random order based on the map iteration. 348 // Sort them by name. 349 std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(), 350 SortInstByName()); 351 } 352 353 354 /// isLittleEndianEncoding - Return whether this target encodes its instruction 355 /// in little-endian format, i.e. bits laid out in the order [0..n] 356 /// 357 bool CodeGenTarget::isLittleEndianEncoding() const { 358 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 359 } 360 361 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit 362 /// encodings, reverse the bit order of all instructions. 363 void CodeGenTarget::reverseBitsForLittleEndianEncoding() { 364 if (!isLittleEndianEncoding()) 365 return; 366 367 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 368 for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end(); 369 I != E; ++I) { 370 Record *R = *I; 371 if (R->getValueAsString("Namespace") == "TargetOpcode" || 372 R->getValueAsBit("isPseudo")) 373 continue; 374 375 BitsInit *BI = R->getValueAsBitsInit("Inst"); 376 377 unsigned numBits = BI->getNumBits(); 378 379 SmallVector<Init *, 16> NewBits(numBits); 380 381 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) { 382 unsigned bitSwapIdx = numBits - bit - 1; 383 Init *OrigBit = BI->getBit(bit); 384 Init *BitSwap = BI->getBit(bitSwapIdx); 385 NewBits[bit] = BitSwap; 386 NewBits[bitSwapIdx] = OrigBit; 387 } 388 if (numBits % 2) { 389 unsigned middle = (numBits + 1) / 2; 390 NewBits[middle] = BI->getBit(middle); 391 } 392 393 BitsInit *NewBI = BitsInit::get(NewBits); 394 395 // Update the bits in reversed order so that emitInstrOpBits will get the 396 // correct endianness. 397 R->getValue("Inst")->setValue(NewBI); 398 } 399 } 400 401 /// guessInstructionProperties - Return true if it's OK to guess instruction 402 /// properties instead of raising an error. 403 /// 404 /// This is configurable as a temporary migration aid. It will eventually be 405 /// permanently false. 406 bool CodeGenTarget::guessInstructionProperties() const { 407 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); 408 } 409 410 //===----------------------------------------------------------------------===// 411 // ComplexPattern implementation 412 // 413 ComplexPattern::ComplexPattern(Record *R) { 414 Ty = ::getValueType(R->getValueAsDef("Ty")); 415 NumOperands = R->getValueAsInt("NumOperands"); 416 SelectFunc = R->getValueAsString("SelectFunc"); 417 RootNodes = R->getValueAsListOfDefs("RootNodes"); 418 419 // Parse the properties. 420 Properties = 0; 421 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 422 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 423 if (PropList[i]->getName() == "SDNPHasChain") { 424 Properties |= 1 << SDNPHasChain; 425 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 426 Properties |= 1 << SDNPOptInGlue; 427 } else if (PropList[i]->getName() == "SDNPMayStore") { 428 Properties |= 1 << SDNPMayStore; 429 } else if (PropList[i]->getName() == "SDNPMayLoad") { 430 Properties |= 1 << SDNPMayLoad; 431 } else if (PropList[i]->getName() == "SDNPSideEffect") { 432 Properties |= 1 << SDNPSideEffect; 433 } else if (PropList[i]->getName() == "SDNPMemOperand") { 434 Properties |= 1 << SDNPMemOperand; 435 } else if (PropList[i]->getName() == "SDNPVariadic") { 436 Properties |= 1 << SDNPVariadic; 437 } else if (PropList[i]->getName() == "SDNPWantRoot") { 438 Properties |= 1 << SDNPWantRoot; 439 } else if (PropList[i]->getName() == "SDNPWantParent") { 440 Properties |= 1 << SDNPWantParent; 441 } else { 442 errs() << "Unsupported SD Node property '" << PropList[i]->getName() 443 << "' on ComplexPattern '" << R->getName() << "'!\n"; 444 exit(1); 445 } 446 } 447 448 //===----------------------------------------------------------------------===// 449 // CodeGenIntrinsic Implementation 450 //===----------------------------------------------------------------------===// 451 452 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 453 bool TargetOnly) { 454 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 455 456 std::vector<CodeGenIntrinsic> Result; 457 458 for (unsigned i = 0, e = I.size(); i != e; ++i) { 459 bool isTarget = I[i]->getValueAsBit("isTarget"); 460 if (isTarget == TargetOnly) 461 Result.push_back(CodeGenIntrinsic(I[i])); 462 } 463 return Result; 464 } 465 466 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 467 TheDef = R; 468 std::string DefName = R->getName(); 469 ModRef = ReadWriteMem; 470 isOverloaded = false; 471 isCommutative = false; 472 canThrow = false; 473 isNoReturn = false; 474 475 if (DefName.size() <= 4 || 476 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 477 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!"); 478 479 EnumName = std::string(DefName.begin()+4, DefName.end()); 480 481 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 482 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 483 484 TargetPrefix = R->getValueAsString("TargetPrefix"); 485 Name = R->getValueAsString("LLVMName"); 486 487 if (Name == "") { 488 // If an explicit name isn't specified, derive one from the DefName. 489 Name = "llvm."; 490 491 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 492 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 493 } else { 494 // Verify it starts with "llvm.". 495 if (Name.size() <= 5 || 496 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 497 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"); 498 } 499 500 // If TargetPrefix is specified, make sure that Name starts with 501 // "llvm.<targetprefix>.". 502 if (!TargetPrefix.empty()) { 503 if (Name.size() < 6+TargetPrefix.size() || 504 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 505 != (TargetPrefix + ".")) 506 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." + 507 TargetPrefix + ".'!"); 508 } 509 510 // Parse the list of return types. 511 std::vector<MVT::SimpleValueType> OverloadedVTs; 512 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 513 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 514 Record *TyEl = TypeList->getElementAsRecord(i); 515 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 516 MVT::SimpleValueType VT; 517 if (TyEl->isSubClassOf("LLVMMatchType")) { 518 unsigned MatchTy = TyEl->getValueAsInt("Number"); 519 assert(MatchTy < OverloadedVTs.size() && 520 "Invalid matching number!"); 521 VT = OverloadedVTs[MatchTy]; 522 // It only makes sense to use the extended and truncated vector element 523 // variants with iAny types; otherwise, if the intrinsic is not 524 // overloaded, all the types can be specified directly. 525 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 526 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 527 VT == MVT::iAny || VT == MVT::vAny) && 528 "Expected iAny or vAny type"); 529 } else { 530 VT = getValueType(TyEl->getValueAsDef("VT")); 531 } 532 if (MVT(VT).isOverloaded()) { 533 OverloadedVTs.push_back(VT); 534 isOverloaded = true; 535 } 536 537 // Reject invalid types. 538 if (VT == MVT::isVoid) 539 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 540 541 IS.RetVTs.push_back(VT); 542 IS.RetTypeDefs.push_back(TyEl); 543 } 544 545 // Parse the list of parameter types. 546 TypeList = R->getValueAsListInit("ParamTypes"); 547 for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) { 548 Record *TyEl = TypeList->getElementAsRecord(i); 549 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 550 MVT::SimpleValueType VT; 551 if (TyEl->isSubClassOf("LLVMMatchType")) { 552 unsigned MatchTy = TyEl->getValueAsInt("Number"); 553 assert(MatchTy < OverloadedVTs.size() && 554 "Invalid matching number!"); 555 VT = OverloadedVTs[MatchTy]; 556 // It only makes sense to use the extended and truncated vector element 557 // variants with iAny types; otherwise, if the intrinsic is not 558 // overloaded, all the types can be specified directly. 559 assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") && 560 !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) || 561 VT == MVT::iAny || VT == MVT::vAny) && 562 "Expected iAny or vAny type"); 563 } else 564 VT = getValueType(TyEl->getValueAsDef("VT")); 565 566 if (MVT(VT).isOverloaded()) { 567 OverloadedVTs.push_back(VT); 568 isOverloaded = true; 569 } 570 571 // Reject invalid types. 572 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 573 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 574 575 IS.ParamVTs.push_back(VT); 576 IS.ParamTypeDefs.push_back(TyEl); 577 } 578 579 // Parse the intrinsic properties. 580 ListInit *PropList = R->getValueAsListInit("Properties"); 581 for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) { 582 Record *Property = PropList->getElementAsRecord(i); 583 assert(Property->isSubClassOf("IntrinsicProperty") && 584 "Expected a property!"); 585 586 if (Property->getName() == "IntrNoMem") 587 ModRef = NoMem; 588 else if (Property->getName() == "IntrReadArgMem") 589 ModRef = ReadArgMem; 590 else if (Property->getName() == "IntrReadMem") 591 ModRef = ReadMem; 592 else if (Property->getName() == "IntrReadWriteArgMem") 593 ModRef = ReadWriteArgMem; 594 else if (Property->getName() == "Commutative") 595 isCommutative = true; 596 else if (Property->getName() == "Throws") 597 canThrow = true; 598 else if (Property->getName() == "IntrNoReturn") 599 isNoReturn = true; 600 else if (Property->isSubClassOf("NoCapture")) { 601 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 602 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 603 } else if (Property->isSubClassOf("ReadOnly")) { 604 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 605 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly)); 606 } else if (Property->isSubClassOf("ReadNone")) { 607 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 608 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone)); 609 } else 610 llvm_unreachable("Unknown property!"); 611 } 612 613 // Sort the argument attributes for later benefit. 614 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end()); 615 } 616