1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
4 // See https://llvm.org/LICENSE.txt for license information.
5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
6 //
7 //===----------------------------------------------------------------------===//
8 //
9 // This class wraps target description classes used by the various code
10 // generation TableGen backends.  This makes it easier to access the data and
11 // provides a single place that needs to check it for validity.  All of these
12 // classes abort on error conditions.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "CodeGenTarget.h"
17 #include "CodeGenDAGPatterns.h"
18 #include "CodeGenIntrinsics.h"
19 #include "CodeGenSchedule.h"
20 #include "llvm/ADT/STLExtras.h"
21 #include "llvm/ADT/StringExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include "llvm/Support/Timer.h"
24 #include "llvm/TableGen/Error.h"
25 #include "llvm/TableGen/Record.h"
26 #include "llvm/TableGen/TableGenBackend.h"
27 #include <algorithm>
28 using namespace llvm;
29 
30 cl::OptionCategory AsmParserCat("Options for -gen-asm-parser");
31 cl::OptionCategory AsmWriterCat("Options for -gen-asm-writer");
32 
33 static cl::opt<unsigned>
34     AsmParserNum("asmparsernum", cl::init(0),
35                  cl::desc("Make -gen-asm-parser emit assembly parser #N"),
36                  cl::cat(AsmParserCat));
37 
38 static cl::opt<unsigned>
39     AsmWriterNum("asmwriternum", cl::init(0),
40                  cl::desc("Make -gen-asm-writer emit assembly writer #N"),
41                  cl::cat(AsmWriterCat));
42 
43 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
44 /// record corresponds to.
45 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
46   return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
47 }
48 
49 StringRef llvm::getName(MVT::SimpleValueType T) {
50   switch (T) {
51   case MVT::Other:   return "UNKNOWN";
52   case MVT::iPTR:    return "TLI.getPointerTy()";
53   case MVT::iPTRAny: return "TLI.getPointerTy()";
54   default: return getEnumName(T);
55   }
56 }
57 
58 StringRef llvm::getEnumName(MVT::SimpleValueType T) {
59   switch (T) {
60   case MVT::Other:    return "MVT::Other";
61   case MVT::i1:       return "MVT::i1";
62   case MVT::i8:       return "MVT::i8";
63   case MVT::i16:      return "MVT::i16";
64   case MVT::i32:      return "MVT::i32";
65   case MVT::i64:      return "MVT::i64";
66   case MVT::i128:     return "MVT::i128";
67   case MVT::Any:      return "MVT::Any";
68   case MVT::iAny:     return "MVT::iAny";
69   case MVT::fAny:     return "MVT::fAny";
70   case MVT::vAny:     return "MVT::vAny";
71   case MVT::f16:      return "MVT::f16";
72   case MVT::f32:      return "MVT::f32";
73   case MVT::f64:      return "MVT::f64";
74   case MVT::f80:      return "MVT::f80";
75   case MVT::f128:     return "MVT::f128";
76   case MVT::ppcf128:  return "MVT::ppcf128";
77   case MVT::x86mmx:   return "MVT::x86mmx";
78   case MVT::Glue:     return "MVT::Glue";
79   case MVT::isVoid:   return "MVT::isVoid";
80   case MVT::v1i1:     return "MVT::v1i1";
81   case MVT::v2i1:     return "MVT::v2i1";
82   case MVT::v4i1:     return "MVT::v4i1";
83   case MVT::v8i1:     return "MVT::v8i1";
84   case MVT::v16i1:    return "MVT::v16i1";
85   case MVT::v32i1:    return "MVT::v32i1";
86   case MVT::v64i1:    return "MVT::v64i1";
87   case MVT::v128i1:   return "MVT::v128i1";
88   case MVT::v512i1:   return "MVT::v512i1";
89   case MVT::v1024i1:  return "MVT::v1024i1";
90   case MVT::v1i8:     return "MVT::v1i8";
91   case MVT::v2i8:     return "MVT::v2i8";
92   case MVT::v4i8:     return "MVT::v4i8";
93   case MVT::v8i8:     return "MVT::v8i8";
94   case MVT::v16i8:    return "MVT::v16i8";
95   case MVT::v32i8:    return "MVT::v32i8";
96   case MVT::v64i8:    return "MVT::v64i8";
97   case MVT::v128i8:   return "MVT::v128i8";
98   case MVT::v256i8:   return "MVT::v256i8";
99   case MVT::v1i16:    return "MVT::v1i16";
100   case MVT::v2i16:    return "MVT::v2i16";
101   case MVT::v3i16:    return "MVT::v3i16";
102   case MVT::v4i16:    return "MVT::v4i16";
103   case MVT::v8i16:    return "MVT::v8i16";
104   case MVT::v16i16:   return "MVT::v16i16";
105   case MVT::v32i16:   return "MVT::v32i16";
106   case MVT::v64i16:   return "MVT::v64i16";
107   case MVT::v128i16:  return "MVT::v128i16";
108   case MVT::v1i32:    return "MVT::v1i32";
109   case MVT::v2i32:    return "MVT::v2i32";
110   case MVT::v3i32:    return "MVT::v3i32";
111   case MVT::v4i32:    return "MVT::v4i32";
112   case MVT::v5i32:    return "MVT::v5i32";
113   case MVT::v8i32:    return "MVT::v8i32";
114   case MVT::v16i32:   return "MVT::v16i32";
115   case MVT::v32i32:   return "MVT::v32i32";
116   case MVT::v64i32:   return "MVT::v64i32";
117   case MVT::v128i32:  return "MVT::v128i32";
118   case MVT::v256i32:  return "MVT::v256i32";
119   case MVT::v512i32:  return "MVT::v512i32";
120   case MVT::v1024i32: return "MVT::v1024i32";
121   case MVT::v2048i32: return "MVT::v2048i32";
122   case MVT::v1i64:    return "MVT::v1i64";
123   case MVT::v2i64:    return "MVT::v2i64";
124   case MVT::v4i64:    return "MVT::v4i64";
125   case MVT::v8i64:    return "MVT::v8i64";
126   case MVT::v16i64:   return "MVT::v16i64";
127   case MVT::v32i64:   return "MVT::v32i64";
128   case MVT::v1i128:   return "MVT::v1i128";
129   case MVT::v2f16:    return "MVT::v2f16";
130   case MVT::v3f16:    return "MVT::v3f16";
131   case MVT::v4f16:    return "MVT::v4f16";
132   case MVT::v8f16:    return "MVT::v8f16";
133   case MVT::v16f16:   return "MVT::v16f16";
134   case MVT::v32f16:   return "MVT::v32f16";
135   case MVT::v1f32:    return "MVT::v1f32";
136   case MVT::v2f32:    return "MVT::v2f32";
137   case MVT::v3f32:    return "MVT::v3f32";
138   case MVT::v4f32:    return "MVT::v4f32";
139   case MVT::v5f32:    return "MVT::v5f32";
140   case MVT::v8f32:    return "MVT::v8f32";
141   case MVT::v16f32:   return "MVT::v16f32";
142   case MVT::v32f32:   return "MVT::v32f32";
143   case MVT::v64f32:   return "MVT::v64f32";
144   case MVT::v128f32:  return "MVT::v128f32";
145   case MVT::v256f32:  return "MVT::v256f32";
146   case MVT::v512f32:  return "MVT::v512f32";
147   case MVT::v1024f32: return "MVT::v1024f32";
148   case MVT::v2048f32: return "MVT::v2048f32";
149   case MVT::v1f64:    return "MVT::v1f64";
150   case MVT::v2f64:    return "MVT::v2f64";
151   case MVT::v4f64:    return "MVT::v4f64";
152   case MVT::v8f64:    return "MVT::v8f64";
153   case MVT::v16f64:   return "MVT::v16f64";
154   case MVT::nxv1i1:   return "MVT::nxv1i1";
155   case MVT::nxv2i1:   return "MVT::nxv2i1";
156   case MVT::nxv4i1:   return "MVT::nxv4i1";
157   case MVT::nxv8i1:   return "MVT::nxv8i1";
158   case MVT::nxv16i1:  return "MVT::nxv16i1";
159   case MVT::nxv32i1:  return "MVT::nxv32i1";
160   case MVT::nxv1i8:   return "MVT::nxv1i8";
161   case MVT::nxv2i8:   return "MVT::nxv2i8";
162   case MVT::nxv4i8:   return "MVT::nxv4i8";
163   case MVT::nxv8i8:   return "MVT::nxv8i8";
164   case MVT::nxv16i8:  return "MVT::nxv16i8";
165   case MVT::nxv32i8:  return "MVT::nxv32i8";
166   case MVT::nxv1i16:  return "MVT::nxv1i16";
167   case MVT::nxv2i16:  return "MVT::nxv2i16";
168   case MVT::nxv4i16:  return "MVT::nxv4i16";
169   case MVT::nxv8i16:  return "MVT::nxv8i16";
170   case MVT::nxv16i16: return "MVT::nxv16i16";
171   case MVT::nxv32i16: return "MVT::nxv32i16";
172   case MVT::nxv1i32:  return "MVT::nxv1i32";
173   case MVT::nxv2i32:  return "MVT::nxv2i32";
174   case MVT::nxv4i32:  return "MVT::nxv4i32";
175   case MVT::nxv8i32:  return "MVT::nxv8i32";
176   case MVT::nxv16i32: return "MVT::nxv16i32";
177   case MVT::nxv1i64:  return "MVT::nxv1i64";
178   case MVT::nxv2i64:  return "MVT::nxv2i64";
179   case MVT::nxv4i64:  return "MVT::nxv4i64";
180   case MVT::nxv8i64:  return "MVT::nxv8i64";
181   case MVT::nxv16i64: return "MVT::nxv16i64";
182   case MVT::nxv2f16:  return "MVT::nxv2f16";
183   case MVT::nxv4f16:  return "MVT::nxv4f16";
184   case MVT::nxv8f16:  return "MVT::nxv8f16";
185   case MVT::nxv1f32:  return "MVT::nxv1f32";
186   case MVT::nxv2f32:  return "MVT::nxv2f32";
187   case MVT::nxv4f32:  return "MVT::nxv4f32";
188   case MVT::nxv8f32:  return "MVT::nxv8f32";
189   case MVT::nxv16f32: return "MVT::nxv16f32";
190   case MVT::nxv1f64:  return "MVT::nxv1f64";
191   case MVT::nxv2f64:  return "MVT::nxv2f64";
192   case MVT::nxv4f64:  return "MVT::nxv4f64";
193   case MVT::nxv8f64:  return "MVT::nxv8f64";
194   case MVT::token:    return "MVT::token";
195   case MVT::Metadata: return "MVT::Metadata";
196   case MVT::iPTR:     return "MVT::iPTR";
197   case MVT::iPTRAny:  return "MVT::iPTRAny";
198   case MVT::Untyped:  return "MVT::Untyped";
199   case MVT::exnref:   return "MVT::exnref";
200   default: llvm_unreachable("ILLEGAL VALUE TYPE!");
201   }
202 }
203 
204 /// getQualifiedName - Return the name of the specified record, with a
205 /// namespace qualifier if the record contains one.
206 ///
207 std::string llvm::getQualifiedName(const Record *R) {
208   std::string Namespace;
209   if (R->getValue("Namespace"))
210     Namespace = std::string(R->getValueAsString("Namespace"));
211   if (Namespace.empty())
212     return std::string(R->getName());
213   return Namespace + "::" + R->getName().str();
214 }
215 
216 
217 /// getTarget - Return the current instance of the Target class.
218 ///
219 CodeGenTarget::CodeGenTarget(RecordKeeper &records)
220   : Records(records), CGH(records) {
221   std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
222   if (Targets.size() == 0)
223     PrintFatalError("ERROR: No 'Target' subclasses defined!");
224   if (Targets.size() != 1)
225     PrintFatalError("ERROR: Multiple subclasses of Target defined!");
226   TargetRec = Targets[0];
227 }
228 
229 CodeGenTarget::~CodeGenTarget() {
230 }
231 
232 const StringRef CodeGenTarget::getName() const {
233   return TargetRec->getName();
234 }
235 
236 StringRef CodeGenTarget::getInstNamespace() const {
237   for (const CodeGenInstruction *Inst : getInstructionsByEnumValue()) {
238     // Make sure not to pick up "TargetOpcode" by accidentally getting
239     // the namespace off the PHI instruction or something.
240     if (Inst->Namespace != "TargetOpcode")
241       return Inst->Namespace;
242   }
243 
244   return "";
245 }
246 
247 Record *CodeGenTarget::getInstructionSet() const {
248   return TargetRec->getValueAsDef("InstructionSet");
249 }
250 
251 bool CodeGenTarget::getAllowRegisterRenaming() const {
252   return TargetRec->getValueAsInt("AllowRegisterRenaming");
253 }
254 
255 /// getAsmParser - Return the AssemblyParser definition for this target.
256 ///
257 Record *CodeGenTarget::getAsmParser() const {
258   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
259   if (AsmParserNum >= LI.size())
260     PrintFatalError("Target does not have an AsmParser #" +
261                     Twine(AsmParserNum) + "!");
262   return LI[AsmParserNum];
263 }
264 
265 /// getAsmParserVariant - Return the AssemblyParserVariant definition for
266 /// this target.
267 ///
268 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const {
269   std::vector<Record*> LI =
270     TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
271   if (i >= LI.size())
272     PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) +
273                     "!");
274   return LI[i];
275 }
276 
277 /// getAsmParserVariantCount - Return the AssemblyParserVariant definition
278 /// available for this target.
279 ///
280 unsigned CodeGenTarget::getAsmParserVariantCount() const {
281   std::vector<Record*> LI =
282     TargetRec->getValueAsListOfDefs("AssemblyParserVariants");
283   return LI.size();
284 }
285 
286 /// getAsmWriter - Return the AssemblyWriter definition for this target.
287 ///
288 Record *CodeGenTarget::getAsmWriter() const {
289   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
290   if (AsmWriterNum >= LI.size())
291     PrintFatalError("Target does not have an AsmWriter #" +
292                     Twine(AsmWriterNum) + "!");
293   return LI[AsmWriterNum];
294 }
295 
296 CodeGenRegBank &CodeGenTarget::getRegBank() const {
297   if (!RegBank)
298     RegBank = std::make_unique<CodeGenRegBank>(Records, getHwModes());
299   return *RegBank;
300 }
301 
302 Optional<CodeGenRegisterClass *>
303 CodeGenTarget::getSuperRegForSubReg(const ValueTypeByHwMode &ValueTy,
304                                     CodeGenRegBank &RegBank,
305                                     const CodeGenSubRegIndex *SubIdx) const {
306   std::vector<CodeGenRegisterClass *> Candidates;
307   auto &RegClasses = RegBank.getRegClasses();
308 
309   // Try to find a register class which supports ValueTy, and also contains
310   // SubIdx.
311   for (CodeGenRegisterClass &RC : RegClasses) {
312     // Is there a subclass of this class which contains this subregister index?
313     CodeGenRegisterClass *SubClassWithSubReg = RC.getSubClassWithSubReg(SubIdx);
314     if (!SubClassWithSubReg)
315       continue;
316 
317     // We have a class. Check if it supports this value type.
318     if (llvm::none_of(SubClassWithSubReg->VTs,
319                       [&ValueTy](const ValueTypeByHwMode &ClassVT) {
320                         return ClassVT == ValueTy;
321                       }))
322       continue;
323 
324     // We have a register class which supports both the value type and
325     // subregister index. Remember it.
326     Candidates.push_back(SubClassWithSubReg);
327   }
328 
329   // If we didn't find anything, we're done.
330   if (Candidates.empty())
331     return None;
332 
333   // Find and return the largest of our candidate classes.
334   llvm::stable_sort(Candidates, [&](const CodeGenRegisterClass *A,
335                                     const CodeGenRegisterClass *B) {
336     if (A->getMembers().size() > B->getMembers().size())
337       return true;
338 
339     if (A->getMembers().size() < B->getMembers().size())
340       return false;
341 
342     // Order by name as a tie-breaker.
343     return StringRef(A->getName()) < B->getName();
344   });
345 
346   return Candidates[0];
347 }
348 
349 void CodeGenTarget::ReadRegAltNameIndices() const {
350   RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex");
351   llvm::sort(RegAltNameIndices, LessRecord());
352 }
353 
354 /// getRegisterByName - If there is a register with the specific AsmName,
355 /// return it.
356 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
357   const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName();
358   StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name);
359   if (I == Regs.end())
360     return nullptr;
361   return I->second;
362 }
363 
364 std::vector<ValueTypeByHwMode> CodeGenTarget::getRegisterVTs(Record *R)
365       const {
366   const CodeGenRegister *Reg = getRegBank().getReg(R);
367   std::vector<ValueTypeByHwMode> Result;
368   for (const auto &RC : getRegBank().getRegClasses()) {
369     if (RC.contains(Reg)) {
370       ArrayRef<ValueTypeByHwMode> InVTs = RC.getValueTypes();
371       Result.insert(Result.end(), InVTs.begin(), InVTs.end());
372     }
373   }
374 
375   // Remove duplicates.
376   llvm::sort(Result);
377   Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
378   return Result;
379 }
380 
381 
382 void CodeGenTarget::ReadLegalValueTypes() const {
383   for (const auto &RC : getRegBank().getRegClasses())
384     LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end());
385 
386   // Remove duplicates.
387   llvm::sort(LegalValueTypes);
388   LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
389                                     LegalValueTypes.end()),
390                         LegalValueTypes.end());
391 }
392 
393 CodeGenSchedModels &CodeGenTarget::getSchedModels() const {
394   if (!SchedModels)
395     SchedModels = std::make_unique<CodeGenSchedModels>(Records, *this);
396   return *SchedModels;
397 }
398 
399 void CodeGenTarget::ReadInstructions() const {
400   NamedRegionTimer T("Read Instructions", "Time spent reading instructions",
401                      "CodeGenTarget", "CodeGenTarget", TimeRegions);
402   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
403   if (Insts.size() <= 2)
404     PrintFatalError("No 'Instruction' subclasses defined!");
405 
406   // Parse the instructions defined in the .td file.
407   for (unsigned i = 0, e = Insts.size(); i != e; ++i)
408     Instructions[Insts[i]] = std::make_unique<CodeGenInstruction>(Insts[i]);
409 }
410 
411 static const CodeGenInstruction *
412 GetInstByName(const char *Name,
413               const DenseMap<const Record*,
414                              std::unique_ptr<CodeGenInstruction>> &Insts,
415               RecordKeeper &Records) {
416   const Record *Rec = Records.getDef(Name);
417 
418   const auto I = Insts.find(Rec);
419   if (!Rec || I == Insts.end())
420     PrintFatalError(Twine("Could not find '") + Name + "' instruction!");
421   return I->second.get();
422 }
423 
424 static const char *const FixedInstrs[] = {
425 #define HANDLE_TARGET_OPCODE(OPC) #OPC,
426 #include "llvm/Support/TargetOpcodes.def"
427     nullptr};
428 
429 unsigned CodeGenTarget::getNumFixedInstructions() {
430   return array_lengthof(FixedInstrs) - 1;
431 }
432 
433 /// Return all of the instructions defined by the target, ordered by
434 /// their enum value.
435 void CodeGenTarget::ComputeInstrsByEnum() const {
436   const auto &Insts = getInstructions();
437   for (const char *const *p = FixedInstrs; *p; ++p) {
438     const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
439     assert(Instr && "Missing target independent instruction");
440     assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
441     InstrsByEnum.push_back(Instr);
442   }
443   unsigned EndOfPredefines = InstrsByEnum.size();
444   assert(EndOfPredefines == getNumFixedInstructions() &&
445          "Missing generic opcode");
446 
447   for (const auto &I : Insts) {
448     const CodeGenInstruction *CGI = I.second.get();
449     if (CGI->Namespace != "TargetOpcode") {
450       InstrsByEnum.push_back(CGI);
451       if (CGI->TheDef->getValueAsBit("isPseudo"))
452         ++NumPseudoInstructions;
453     }
454   }
455 
456   assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
457 
458   // All of the instructions are now in random order based on the map iteration.
459   llvm::sort(
460       InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(),
461       [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) {
462         const auto &D1 = *Rec1->TheDef;
463         const auto &D2 = *Rec2->TheDef;
464         return std::make_tuple(!D1.getValueAsBit("isPseudo"), D1.getName()) <
465                std::make_tuple(!D2.getValueAsBit("isPseudo"), D2.getName());
466       });
467 }
468 
469 
470 /// isLittleEndianEncoding - Return whether this target encodes its instruction
471 /// in little-endian format, i.e. bits laid out in the order [0..n]
472 ///
473 bool CodeGenTarget::isLittleEndianEncoding() const {
474   return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
475 }
476 
477 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit
478 /// encodings, reverse the bit order of all instructions.
479 void CodeGenTarget::reverseBitsForLittleEndianEncoding() {
480   if (!isLittleEndianEncoding())
481     return;
482 
483   std::vector<Record *> Insts =
484       Records.getAllDerivedDefinitions("InstructionEncoding");
485   for (Record *R : Insts) {
486     if (R->getValueAsString("Namespace") == "TargetOpcode" ||
487         R->getValueAsBit("isPseudo"))
488       continue;
489 
490     BitsInit *BI = R->getValueAsBitsInit("Inst");
491 
492     unsigned numBits = BI->getNumBits();
493 
494     SmallVector<Init *, 16> NewBits(numBits);
495 
496     for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
497       unsigned bitSwapIdx = numBits - bit - 1;
498       Init *OrigBit = BI->getBit(bit);
499       Init *BitSwap = BI->getBit(bitSwapIdx);
500       NewBits[bit]        = BitSwap;
501       NewBits[bitSwapIdx] = OrigBit;
502     }
503     if (numBits % 2) {
504       unsigned middle = (numBits + 1) / 2;
505       NewBits[middle] = BI->getBit(middle);
506     }
507 
508     BitsInit *NewBI = BitsInit::get(NewBits);
509 
510     // Update the bits in reversed order so that emitInstrOpBits will get the
511     // correct endianness.
512     R->getValue("Inst")->setValue(NewBI);
513   }
514 }
515 
516 /// guessInstructionProperties - Return true if it's OK to guess instruction
517 /// properties instead of raising an error.
518 ///
519 /// This is configurable as a temporary migration aid. It will eventually be
520 /// permanently false.
521 bool CodeGenTarget::guessInstructionProperties() const {
522   return getInstructionSet()->getValueAsBit("guessInstructionProperties");
523 }
524 
525 //===----------------------------------------------------------------------===//
526 // ComplexPattern implementation
527 //
528 ComplexPattern::ComplexPattern(Record *R) {
529   Ty          = ::getValueType(R->getValueAsDef("Ty"));
530   NumOperands = R->getValueAsInt("NumOperands");
531   SelectFunc = std::string(R->getValueAsString("SelectFunc"));
532   RootNodes   = R->getValueAsListOfDefs("RootNodes");
533 
534   // FIXME: This is a hack to statically increase the priority of patterns which
535   // maps a sub-dag to a complex pattern. e.g. favors LEA over ADD. To get best
536   // possible pattern match we'll need to dynamically calculate the complexity
537   // of all patterns a dag can potentially map to.
538   int64_t RawComplexity = R->getValueAsInt("Complexity");
539   if (RawComplexity == -1)
540     Complexity = NumOperands * 3;
541   else
542     Complexity = RawComplexity;
543 
544   // FIXME: Why is this different from parseSDPatternOperatorProperties?
545   // Parse the properties.
546   Properties = 0;
547   std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
548   for (unsigned i = 0, e = PropList.size(); i != e; ++i)
549     if (PropList[i]->getName() == "SDNPHasChain") {
550       Properties |= 1 << SDNPHasChain;
551     } else if (PropList[i]->getName() == "SDNPOptInGlue") {
552       Properties |= 1 << SDNPOptInGlue;
553     } else if (PropList[i]->getName() == "SDNPMayStore") {
554       Properties |= 1 << SDNPMayStore;
555     } else if (PropList[i]->getName() == "SDNPMayLoad") {
556       Properties |= 1 << SDNPMayLoad;
557     } else if (PropList[i]->getName() == "SDNPSideEffect") {
558       Properties |= 1 << SDNPSideEffect;
559     } else if (PropList[i]->getName() == "SDNPMemOperand") {
560       Properties |= 1 << SDNPMemOperand;
561     } else if (PropList[i]->getName() == "SDNPVariadic") {
562       Properties |= 1 << SDNPVariadic;
563     } else if (PropList[i]->getName() == "SDNPWantRoot") {
564       Properties |= 1 << SDNPWantRoot;
565     } else if (PropList[i]->getName() == "SDNPWantParent") {
566       Properties |= 1 << SDNPWantParent;
567     } else {
568       PrintFatalError(R->getLoc(), "Unsupported SD Node property '" +
569                                        PropList[i]->getName() +
570                                        "' on ComplexPattern '" + R->getName() +
571                                        "'!");
572     }
573 }
574 
575 //===----------------------------------------------------------------------===//
576 // CodeGenIntrinsic Implementation
577 //===----------------------------------------------------------------------===//
578 
579 CodeGenIntrinsicTable::CodeGenIntrinsicTable(const RecordKeeper &RC) {
580   std::vector<Record*> Defs = RC.getAllDerivedDefinitions("Intrinsic");
581 
582   Intrinsics.reserve(Defs.size());
583 
584   for (unsigned I = 0, e = Defs.size(); I != e; ++I)
585     Intrinsics.push_back(CodeGenIntrinsic(Defs[I]));
586 
587   llvm::sort(Intrinsics,
588              [](const CodeGenIntrinsic &LHS, const CodeGenIntrinsic &RHS) {
589                return std::tie(LHS.TargetPrefix, LHS.Name) <
590                       std::tie(RHS.TargetPrefix, RHS.Name);
591              });
592   Targets.push_back({"", 0, 0});
593   for (size_t I = 0, E = Intrinsics.size(); I < E; ++I)
594     if (Intrinsics[I].TargetPrefix != Targets.back().Name) {
595       Targets.back().Count = I - Targets.back().Offset;
596       Targets.push_back({Intrinsics[I].TargetPrefix, I, 0});
597     }
598   Targets.back().Count = Intrinsics.size() - Targets.back().Offset;
599 }
600 
601 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
602   TheDef = R;
603   std::string DefName = std::string(R->getName());
604   ArrayRef<SMLoc> DefLoc = R->getLoc();
605   ModRef = ReadWriteMem;
606   Properties = 0;
607   isOverloaded = false;
608   isCommutative = false;
609   canThrow = false;
610   isNoReturn = false;
611   isNoSync = false;
612   isWillReturn = false;
613   isCold = false;
614   isNoDuplicate = false;
615   isConvergent = false;
616   isSpeculatable = false;
617   hasSideEffects = false;
618 
619   if (DefName.size() <= 4 ||
620       std::string(DefName.begin(), DefName.begin() + 4) != "int_")
621     PrintFatalError(DefLoc,
622                     "Intrinsic '" + DefName + "' does not start with 'int_'!");
623 
624   EnumName = std::string(DefName.begin()+4, DefName.end());
625 
626   if (R->getValue("GCCBuiltinName"))  // Ignore a missing GCCBuiltinName field.
627     GCCBuiltinName = std::string(R->getValueAsString("GCCBuiltinName"));
628   if (R->getValue("MSBuiltinName"))   // Ignore a missing MSBuiltinName field.
629     MSBuiltinName = std::string(R->getValueAsString("MSBuiltinName"));
630 
631   TargetPrefix = std::string(R->getValueAsString("TargetPrefix"));
632   Name = std::string(R->getValueAsString("LLVMName"));
633 
634   if (Name == "") {
635     // If an explicit name isn't specified, derive one from the DefName.
636     Name = "llvm.";
637 
638     for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
639       Name += (EnumName[i] == '_') ? '.' : EnumName[i];
640   } else {
641     // Verify it starts with "llvm.".
642     if (Name.size() <= 5 ||
643         std::string(Name.begin(), Name.begin() + 5) != "llvm.")
644       PrintFatalError(DefLoc, "Intrinsic '" + DefName +
645                                   "'s name does not start with 'llvm.'!");
646   }
647 
648   // If TargetPrefix is specified, make sure that Name starts with
649   // "llvm.<targetprefix>.".
650   if (!TargetPrefix.empty()) {
651     if (Name.size() < 6+TargetPrefix.size() ||
652         std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
653         != (TargetPrefix + "."))
654       PrintFatalError(DefLoc, "Intrinsic '" + DefName +
655                                   "' does not start with 'llvm." +
656                                   TargetPrefix + ".'!");
657   }
658 
659   ListInit *RetTypes = R->getValueAsListInit("RetTypes");
660   ListInit *ParamTypes = R->getValueAsListInit("ParamTypes");
661 
662   // First collate a list of overloaded types.
663   std::vector<MVT::SimpleValueType> OverloadedVTs;
664   for (ListInit *TypeList : {RetTypes, ParamTypes}) {
665     for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
666       Record *TyEl = TypeList->getElementAsRecord(i);
667       assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
668 
669       if (TyEl->isSubClassOf("LLVMMatchType"))
670         continue;
671 
672       MVT::SimpleValueType VT = getValueType(TyEl->getValueAsDef("VT"));
673       if (MVT(VT).isOverloaded()) {
674         OverloadedVTs.push_back(VT);
675         isOverloaded = true;
676       }
677     }
678   }
679 
680   // Parse the list of return types.
681   ListInit *TypeList = RetTypes;
682   for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
683     Record *TyEl = TypeList->getElementAsRecord(i);
684     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
685     MVT::SimpleValueType VT;
686     if (TyEl->isSubClassOf("LLVMMatchType")) {
687       unsigned MatchTy = TyEl->getValueAsInt("Number");
688       assert(MatchTy < OverloadedVTs.size() &&
689              "Invalid matching number!");
690       VT = OverloadedVTs[MatchTy];
691       // It only makes sense to use the extended and truncated vector element
692       // variants with iAny types; otherwise, if the intrinsic is not
693       // overloaded, all the types can be specified directly.
694       assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
695                !TyEl->isSubClassOf("LLVMTruncatedType")) ||
696               VT == MVT::iAny || VT == MVT::vAny) &&
697              "Expected iAny or vAny type");
698     } else {
699       VT = getValueType(TyEl->getValueAsDef("VT"));
700     }
701 
702     // Reject invalid types.
703     if (VT == MVT::isVoid)
704       PrintFatalError(DefLoc, "Intrinsic '" + DefName +
705                                   " has void in result type list!");
706 
707     IS.RetVTs.push_back(VT);
708     IS.RetTypeDefs.push_back(TyEl);
709   }
710 
711   // Parse the list of parameter types.
712   TypeList = ParamTypes;
713   for (unsigned i = 0, e = TypeList->size(); i != e; ++i) {
714     Record *TyEl = TypeList->getElementAsRecord(i);
715     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
716     MVT::SimpleValueType VT;
717     if (TyEl->isSubClassOf("LLVMMatchType")) {
718       unsigned MatchTy = TyEl->getValueAsInt("Number");
719       if (MatchTy >= OverloadedVTs.size()) {
720         PrintError(R->getLoc(),
721                    "Parameter #" + Twine(i) + " has out of bounds matching "
722                    "number " + Twine(MatchTy));
723         PrintFatalError(DefLoc,
724                         Twine("ParamTypes is ") + TypeList->getAsString());
725       }
726       VT = OverloadedVTs[MatchTy];
727       // It only makes sense to use the extended and truncated vector element
728       // variants with iAny types; otherwise, if the intrinsic is not
729       // overloaded, all the types can be specified directly.
730       assert(((!TyEl->isSubClassOf("LLVMExtendedType") &&
731                !TyEl->isSubClassOf("LLVMTruncatedType")) ||
732               VT == MVT::iAny || VT == MVT::vAny) &&
733              "Expected iAny or vAny type");
734     } else
735       VT = getValueType(TyEl->getValueAsDef("VT"));
736 
737     // Reject invalid types.
738     if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
739       PrintFatalError(DefLoc, "Intrinsic '" + DefName +
740                                   " has void in result type list!");
741 
742     IS.ParamVTs.push_back(VT);
743     IS.ParamTypeDefs.push_back(TyEl);
744   }
745 
746   // Parse the intrinsic properties.
747   ListInit *PropList = R->getValueAsListInit("IntrProperties");
748   for (unsigned i = 0, e = PropList->size(); i != e; ++i) {
749     Record *Property = PropList->getElementAsRecord(i);
750     assert(Property->isSubClassOf("IntrinsicProperty") &&
751            "Expected a property!");
752 
753     if (Property->getName() == "IntrNoMem")
754       ModRef = NoMem;
755     else if (Property->getName() == "IntrReadMem")
756       ModRef = ModRefBehavior(ModRef & ~MR_Mod);
757     else if (Property->getName() == "IntrWriteMem")
758       ModRef = ModRefBehavior(ModRef & ~MR_Ref);
759     else if (Property->getName() == "IntrArgMemOnly")
760       ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_ArgMem);
761     else if (Property->getName() == "IntrInaccessibleMemOnly")
762       ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_InaccessibleMem);
763     else if (Property->getName() == "IntrInaccessibleMemOrArgMemOnly")
764       ModRef = ModRefBehavior((ModRef & ~MR_Anywhere) | MR_ArgMem |
765                               MR_InaccessibleMem);
766     else if (Property->getName() == "Commutative")
767       isCommutative = true;
768     else if (Property->getName() == "Throws")
769       canThrow = true;
770     else if (Property->getName() == "IntrNoDuplicate")
771       isNoDuplicate = true;
772     else if (Property->getName() == "IntrConvergent")
773       isConvergent = true;
774     else if (Property->getName() == "IntrNoReturn")
775       isNoReturn = true;
776     else if (Property->getName() == "IntrNoSync")
777       isNoSync = true;
778     else if (Property->getName() == "IntrWillReturn")
779       isWillReturn = true;
780     else if (Property->getName() == "IntrCold")
781       isCold = true;
782     else if (Property->getName() == "IntrSpeculatable")
783       isSpeculatable = true;
784     else if (Property->getName() == "IntrHasSideEffects")
785       hasSideEffects = true;
786     else if (Property->isSubClassOf("NoCapture")) {
787       unsigned ArgNo = Property->getValueAsInt("ArgNo");
788       ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
789     } else if (Property->isSubClassOf("NoAlias")) {
790       unsigned ArgNo = Property->getValueAsInt("ArgNo");
791       ArgumentAttributes.push_back(std::make_pair(ArgNo, NoAlias));
792     } else if (Property->isSubClassOf("Returned")) {
793       unsigned ArgNo = Property->getValueAsInt("ArgNo");
794       ArgumentAttributes.push_back(std::make_pair(ArgNo, Returned));
795     } else if (Property->isSubClassOf("ReadOnly")) {
796       unsigned ArgNo = Property->getValueAsInt("ArgNo");
797       ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly));
798     } else if (Property->isSubClassOf("WriteOnly")) {
799       unsigned ArgNo = Property->getValueAsInt("ArgNo");
800       ArgumentAttributes.push_back(std::make_pair(ArgNo, WriteOnly));
801     } else if (Property->isSubClassOf("ReadNone")) {
802       unsigned ArgNo = Property->getValueAsInt("ArgNo");
803       ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone));
804     } else if (Property->isSubClassOf("ImmArg")) {
805       unsigned ArgNo = Property->getValueAsInt("ArgNo");
806       ArgumentAttributes.push_back(std::make_pair(ArgNo, ImmArg));
807     } else
808       llvm_unreachable("Unknown property!");
809   }
810 
811   // Also record the SDPatternOperator Properties.
812   Properties = parseSDPatternOperatorProperties(R);
813 
814   // Sort the argument attributes for later benefit.
815   llvm::sort(ArgumentAttributes);
816 }
817 
818 bool CodeGenIntrinsic::isParamAPointer(unsigned ParamIdx) const {
819   if (ParamIdx >= IS.ParamVTs.size())
820     return false;
821   MVT ParamType = MVT(IS.ParamVTs[ParamIdx]);
822   return ParamType == MVT::iPTR || ParamType == MVT::iPTRAny;
823 }
824 
825 bool CodeGenIntrinsic::isParamImmArg(unsigned ParamIdx) const {
826   std::pair<unsigned, ArgAttribute> Val = {ParamIdx, ImmArg};
827   return std::binary_search(ArgumentAttributes.begin(),
828                             ArgumentAttributes.end(), Val);
829 }
830