1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This class wraps target description classes used by the various code 11 // generation TableGen backends. This makes it easier to access the data and 12 // provides a single place that needs to check it for validity. All of these 13 // classes abort on error conditions. 14 // 15 //===----------------------------------------------------------------------===// 16 17 #include "CodeGenTarget.h" 18 #include "CodeGenIntrinsics.h" 19 #include "CodeGenSchedule.h" 20 #include "llvm/ADT/STLExtras.h" 21 #include "llvm/ADT/StringExtras.h" 22 #include "llvm/Support/CommandLine.h" 23 #include "llvm/TableGen/Error.h" 24 #include "llvm/TableGen/Record.h" 25 #include <algorithm> 26 using namespace llvm; 27 28 static cl::opt<unsigned> 29 AsmParserNum("asmparsernum", cl::init(0), 30 cl::desc("Make -gen-asm-parser emit assembly parser #N")); 31 32 static cl::opt<unsigned> 33 AsmWriterNum("asmwriternum", cl::init(0), 34 cl::desc("Make -gen-asm-writer emit assembly writer #N")); 35 36 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen 37 /// record corresponds to. 38 MVT::SimpleValueType llvm::getValueType(Record *Rec) { 39 return (MVT::SimpleValueType)Rec->getValueAsInt("Value"); 40 } 41 42 std::string llvm::getName(MVT::SimpleValueType T) { 43 switch (T) { 44 case MVT::Other: return "UNKNOWN"; 45 case MVT::iPTR: return "TLI.getPointerTy()"; 46 case MVT::iPTRAny: return "TLI.getPointerTy()"; 47 default: return getEnumName(T); 48 } 49 } 50 51 std::string llvm::getEnumName(MVT::SimpleValueType T) { 52 switch (T) { 53 case MVT::Other: return "MVT::Other"; 54 case MVT::i1: return "MVT::i1"; 55 case MVT::i8: return "MVT::i8"; 56 case MVT::i16: return "MVT::i16"; 57 case MVT::i32: return "MVT::i32"; 58 case MVT::i64: return "MVT::i64"; 59 case MVT::i128: return "MVT::i128"; 60 case MVT::Any: return "MVT::Any"; 61 case MVT::iAny: return "MVT::iAny"; 62 case MVT::fAny: return "MVT::fAny"; 63 case MVT::vAny: return "MVT::vAny"; 64 case MVT::f16: return "MVT::f16"; 65 case MVT::f32: return "MVT::f32"; 66 case MVT::f64: return "MVT::f64"; 67 case MVT::f80: return "MVT::f80"; 68 case MVT::f128: return "MVT::f128"; 69 case MVT::ppcf128: return "MVT::ppcf128"; 70 case MVT::x86mmx: return "MVT::x86mmx"; 71 case MVT::Glue: return "MVT::Glue"; 72 case MVT::isVoid: return "MVT::isVoid"; 73 case MVT::v2i1: return "MVT::v2i1"; 74 case MVT::v4i1: return "MVT::v4i1"; 75 case MVT::v8i1: return "MVT::v8i1"; 76 case MVT::v16i1: return "MVT::v16i1"; 77 case MVT::v32i1: return "MVT::v32i1"; 78 case MVT::v64i1: return "MVT::v64i1"; 79 case MVT::v512i1: return "MVT::v512i1"; 80 case MVT::v1024i1: return "MVT::v1024i1"; 81 case MVT::v1i8: return "MVT::v1i8"; 82 case MVT::v2i8: return "MVT::v2i8"; 83 case MVT::v4i8: return "MVT::v4i8"; 84 case MVT::v8i8: return "MVT::v8i8"; 85 case MVT::v16i8: return "MVT::v16i8"; 86 case MVT::v32i8: return "MVT::v32i8"; 87 case MVT::v64i8: return "MVT::v64i8"; 88 case MVT::v128i8: return "MVT::v128i8"; 89 case MVT::v256i8: return "MVT::v256i8"; 90 case MVT::v1i16: return "MVT::v1i16"; 91 case MVT::v2i16: return "MVT::v2i16"; 92 case MVT::v4i16: return "MVT::v4i16"; 93 case MVT::v8i16: return "MVT::v8i16"; 94 case MVT::v16i16: return "MVT::v16i16"; 95 case MVT::v32i16: return "MVT::v32i16"; 96 case MVT::v64i16: return "MVT::v64i16"; 97 case MVT::v128i16: return "MVT::v128i16"; 98 case MVT::v1i32: return "MVT::v1i32"; 99 case MVT::v2i32: return "MVT::v2i32"; 100 case MVT::v4i32: return "MVT::v4i32"; 101 case MVT::v8i32: return "MVT::v8i32"; 102 case MVT::v16i32: return "MVT::v16i32"; 103 case MVT::v32i32: return "MVT::v32i32"; 104 case MVT::v64i32: return "MVT::v64i32"; 105 case MVT::v1i64: return "MVT::v1i64"; 106 case MVT::v2i64: return "MVT::v2i64"; 107 case MVT::v4i64: return "MVT::v4i64"; 108 case MVT::v8i64: return "MVT::v8i64"; 109 case MVT::v16i64: return "MVT::v16i64"; 110 case MVT::v32i64: return "MVT::v32i64"; 111 case MVT::v1i128: return "MVT::v1i128"; 112 case MVT::v2f16: return "MVT::v2f16"; 113 case MVT::v4f16: return "MVT::v4f16"; 114 case MVT::v8f16: return "MVT::v8f16"; 115 case MVT::v1f32: return "MVT::v1f32"; 116 case MVT::v2f32: return "MVT::v2f32"; 117 case MVT::v4f32: return "MVT::v4f32"; 118 case MVT::v8f32: return "MVT::v8f32"; 119 case MVT::v16f32: return "MVT::v16f32"; 120 case MVT::v1f64: return "MVT::v1f64"; 121 case MVT::v2f64: return "MVT::v2f64"; 122 case MVT::v4f64: return "MVT::v4f64"; 123 case MVT::v8f64: return "MVT::v8f64"; 124 case MVT::token: return "MVT::token"; 125 case MVT::Metadata: return "MVT::Metadata"; 126 case MVT::iPTR: return "MVT::iPTR"; 127 case MVT::iPTRAny: return "MVT::iPTRAny"; 128 case MVT::Untyped: return "MVT::Untyped"; 129 default: llvm_unreachable("ILLEGAL VALUE TYPE!"); 130 } 131 } 132 133 /// getQualifiedName - Return the name of the specified record, with a 134 /// namespace qualifier if the record contains one. 135 /// 136 std::string llvm::getQualifiedName(const Record *R) { 137 std::string Namespace; 138 if (R->getValue("Namespace")) 139 Namespace = R->getValueAsString("Namespace"); 140 if (Namespace.empty()) return R->getName(); 141 return Namespace + "::" + R->getName(); 142 } 143 144 145 /// getTarget - Return the current instance of the Target class. 146 /// 147 CodeGenTarget::CodeGenTarget(RecordKeeper &records) 148 : Records(records) { 149 std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target"); 150 if (Targets.size() == 0) 151 PrintFatalError("ERROR: No 'Target' subclasses defined!"); 152 if (Targets.size() != 1) 153 PrintFatalError("ERROR: Multiple subclasses of Target defined!"); 154 TargetRec = Targets[0]; 155 } 156 157 CodeGenTarget::~CodeGenTarget() { 158 } 159 160 const std::string &CodeGenTarget::getName() const { 161 return TargetRec->getName(); 162 } 163 164 std::string CodeGenTarget::getInstNamespace() const { 165 for (const CodeGenInstruction *Inst : getInstructionsByEnumValue()) { 166 // Make sure not to pick up "TargetOpcode" by accidentally getting 167 // the namespace off the PHI instruction or something. 168 if (Inst->Namespace != "TargetOpcode") 169 return Inst->Namespace; 170 } 171 172 return ""; 173 } 174 175 Record *CodeGenTarget::getInstructionSet() const { 176 return TargetRec->getValueAsDef("InstructionSet"); 177 } 178 179 180 /// getAsmParser - Return the AssemblyParser definition for this target. 181 /// 182 Record *CodeGenTarget::getAsmParser() const { 183 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers"); 184 if (AsmParserNum >= LI.size()) 185 PrintFatalError("Target does not have an AsmParser #" + 186 Twine(AsmParserNum) + "!"); 187 return LI[AsmParserNum]; 188 } 189 190 /// getAsmParserVariant - Return the AssmblyParserVariant definition for 191 /// this target. 192 /// 193 Record *CodeGenTarget::getAsmParserVariant(unsigned i) const { 194 std::vector<Record*> LI = 195 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 196 if (i >= LI.size()) 197 PrintFatalError("Target does not have an AsmParserVariant #" + Twine(i) + 198 "!"); 199 return LI[i]; 200 } 201 202 /// getAsmParserVariantCount - Return the AssmblyParserVariant definition 203 /// available for this target. 204 /// 205 unsigned CodeGenTarget::getAsmParserVariantCount() const { 206 std::vector<Record*> LI = 207 TargetRec->getValueAsListOfDefs("AssemblyParserVariants"); 208 return LI.size(); 209 } 210 211 /// getAsmWriter - Return the AssemblyWriter definition for this target. 212 /// 213 Record *CodeGenTarget::getAsmWriter() const { 214 std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters"); 215 if (AsmWriterNum >= LI.size()) 216 PrintFatalError("Target does not have an AsmWriter #" + 217 Twine(AsmWriterNum) + "!"); 218 return LI[AsmWriterNum]; 219 } 220 221 CodeGenRegBank &CodeGenTarget::getRegBank() const { 222 if (!RegBank) 223 RegBank = llvm::make_unique<CodeGenRegBank>(Records); 224 return *RegBank; 225 } 226 227 void CodeGenTarget::ReadRegAltNameIndices() const { 228 RegAltNameIndices = Records.getAllDerivedDefinitions("RegAltNameIndex"); 229 std::sort(RegAltNameIndices.begin(), RegAltNameIndices.end(), LessRecord()); 230 } 231 232 /// getRegisterByName - If there is a register with the specific AsmName, 233 /// return it. 234 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const { 235 const StringMap<CodeGenRegister*> &Regs = getRegBank().getRegistersByName(); 236 StringMap<CodeGenRegister*>::const_iterator I = Regs.find(Name); 237 if (I == Regs.end()) 238 return nullptr; 239 return I->second; 240 } 241 242 std::vector<MVT::SimpleValueType> CodeGenTarget:: 243 getRegisterVTs(Record *R) const { 244 const CodeGenRegister *Reg = getRegBank().getReg(R); 245 std::vector<MVT::SimpleValueType> Result; 246 for (const auto &RC : getRegBank().getRegClasses()) { 247 if (RC.contains(Reg)) { 248 ArrayRef<MVT::SimpleValueType> InVTs = RC.getValueTypes(); 249 Result.insert(Result.end(), InVTs.begin(), InVTs.end()); 250 } 251 } 252 253 // Remove duplicates. 254 array_pod_sort(Result.begin(), Result.end()); 255 Result.erase(std::unique(Result.begin(), Result.end()), Result.end()); 256 return Result; 257 } 258 259 260 void CodeGenTarget::ReadLegalValueTypes() const { 261 for (const auto &RC : getRegBank().getRegClasses()) 262 LegalValueTypes.insert(LegalValueTypes.end(), RC.VTs.begin(), RC.VTs.end()); 263 264 // Remove duplicates. 265 array_pod_sort(LegalValueTypes.begin(), LegalValueTypes.end()); 266 LegalValueTypes.erase(std::unique(LegalValueTypes.begin(), 267 LegalValueTypes.end()), 268 LegalValueTypes.end()); 269 } 270 271 CodeGenSchedModels &CodeGenTarget::getSchedModels() const { 272 if (!SchedModels) 273 SchedModels = llvm::make_unique<CodeGenSchedModels>(Records, *this); 274 return *SchedModels; 275 } 276 277 void CodeGenTarget::ReadInstructions() const { 278 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 279 if (Insts.size() <= 2) 280 PrintFatalError("No 'Instruction' subclasses defined!"); 281 282 // Parse the instructions defined in the .td file. 283 for (unsigned i = 0, e = Insts.size(); i != e; ++i) 284 Instructions[Insts[i]] = llvm::make_unique<CodeGenInstruction>(Insts[i]); 285 } 286 287 static const CodeGenInstruction * 288 GetInstByName(const char *Name, 289 const DenseMap<const Record*, 290 std::unique_ptr<CodeGenInstruction>> &Insts, 291 RecordKeeper &Records) { 292 const Record *Rec = Records.getDef(Name); 293 294 const auto I = Insts.find(Rec); 295 if (!Rec || I == Insts.end()) 296 PrintFatalError(Twine("Could not find '") + Name + "' instruction!"); 297 return I->second.get(); 298 } 299 300 /// \brief Return all of the instructions defined by the target, ordered by 301 /// their enum value. 302 void CodeGenTarget::ComputeInstrsByEnum() const { 303 // The ordering here must match the ordering in TargetOpcodes.h. 304 // FIXME: It would be nice to have the opcode directly extracted 305 // to avoid potential errors. At the very, least a compile time 306 // error would be appreciated if the order does not match. 307 static const char *const FixedInstrs[] = { 308 "PHI", "INLINEASM", "CFI_INSTRUCTION", "EH_LABEL", 309 "GC_LABEL", "KILL", "EXTRACT_SUBREG", "INSERT_SUBREG", 310 "IMPLICIT_DEF", "SUBREG_TO_REG", "COPY_TO_REGCLASS", "DBG_VALUE", 311 "REG_SEQUENCE", "COPY", "BUNDLE", "LIFETIME_START", 312 "LIFETIME_END", "STACKMAP", "PATCHPOINT", "LOAD_STACK_GUARD", 313 "STATEPOINT", "LOCAL_ESCAPE", "FAULTING_LOAD_OP", 314 // Generic opcodes for GlobalISel start here. 315 "G_ADD", 316 nullptr}; 317 const auto &Insts = getInstructions(); 318 for (const char *const *p = FixedInstrs; *p; ++p) { 319 const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records); 320 assert(Instr && "Missing target independent instruction"); 321 assert(Instr->Namespace == "TargetOpcode" && "Bad namespace"); 322 InstrsByEnum.push_back(Instr); 323 } 324 unsigned EndOfPredefines = InstrsByEnum.size(); 325 326 for (const auto &I : Insts) { 327 const CodeGenInstruction *CGI = I.second.get(); 328 if (CGI->Namespace != "TargetOpcode") 329 InstrsByEnum.push_back(CGI); 330 } 331 332 assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr"); 333 334 // All of the instructions are now in random order based on the map iteration. 335 // Sort them by name. 336 std::sort(InstrsByEnum.begin() + EndOfPredefines, InstrsByEnum.end(), 337 [](const CodeGenInstruction *Rec1, const CodeGenInstruction *Rec2) { 338 return Rec1->TheDef->getName() < Rec2->TheDef->getName(); 339 }); 340 } 341 342 343 /// isLittleEndianEncoding - Return whether this target encodes its instruction 344 /// in little-endian format, i.e. bits laid out in the order [0..n] 345 /// 346 bool CodeGenTarget::isLittleEndianEncoding() const { 347 return getInstructionSet()->getValueAsBit("isLittleEndianEncoding"); 348 } 349 350 /// reverseBitsForLittleEndianEncoding - For little-endian instruction bit 351 /// encodings, reverse the bit order of all instructions. 352 void CodeGenTarget::reverseBitsForLittleEndianEncoding() { 353 if (!isLittleEndianEncoding()) 354 return; 355 356 std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction"); 357 for (Record *R : Insts) { 358 if (R->getValueAsString("Namespace") == "TargetOpcode" || 359 R->getValueAsBit("isPseudo")) 360 continue; 361 362 BitsInit *BI = R->getValueAsBitsInit("Inst"); 363 364 unsigned numBits = BI->getNumBits(); 365 366 SmallVector<Init *, 16> NewBits(numBits); 367 368 for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) { 369 unsigned bitSwapIdx = numBits - bit - 1; 370 Init *OrigBit = BI->getBit(bit); 371 Init *BitSwap = BI->getBit(bitSwapIdx); 372 NewBits[bit] = BitSwap; 373 NewBits[bitSwapIdx] = OrigBit; 374 } 375 if (numBits % 2) { 376 unsigned middle = (numBits + 1) / 2; 377 NewBits[middle] = BI->getBit(middle); 378 } 379 380 BitsInit *NewBI = BitsInit::get(NewBits); 381 382 // Update the bits in reversed order so that emitInstrOpBits will get the 383 // correct endianness. 384 R->getValue("Inst")->setValue(NewBI); 385 } 386 } 387 388 /// guessInstructionProperties - Return true if it's OK to guess instruction 389 /// properties instead of raising an error. 390 /// 391 /// This is configurable as a temporary migration aid. It will eventually be 392 /// permanently false. 393 bool CodeGenTarget::guessInstructionProperties() const { 394 return getInstructionSet()->getValueAsBit("guessInstructionProperties"); 395 } 396 397 //===----------------------------------------------------------------------===// 398 // ComplexPattern implementation 399 // 400 ComplexPattern::ComplexPattern(Record *R) { 401 Ty = ::getValueType(R->getValueAsDef("Ty")); 402 NumOperands = R->getValueAsInt("NumOperands"); 403 SelectFunc = R->getValueAsString("SelectFunc"); 404 RootNodes = R->getValueAsListOfDefs("RootNodes"); 405 406 // Parse the properties. 407 Properties = 0; 408 std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties"); 409 for (unsigned i = 0, e = PropList.size(); i != e; ++i) 410 if (PropList[i]->getName() == "SDNPHasChain") { 411 Properties |= 1 << SDNPHasChain; 412 } else if (PropList[i]->getName() == "SDNPOptInGlue") { 413 Properties |= 1 << SDNPOptInGlue; 414 } else if (PropList[i]->getName() == "SDNPMayStore") { 415 Properties |= 1 << SDNPMayStore; 416 } else if (PropList[i]->getName() == "SDNPMayLoad") { 417 Properties |= 1 << SDNPMayLoad; 418 } else if (PropList[i]->getName() == "SDNPSideEffect") { 419 Properties |= 1 << SDNPSideEffect; 420 } else if (PropList[i]->getName() == "SDNPMemOperand") { 421 Properties |= 1 << SDNPMemOperand; 422 } else if (PropList[i]->getName() == "SDNPVariadic") { 423 Properties |= 1 << SDNPVariadic; 424 } else if (PropList[i]->getName() == "SDNPWantRoot") { 425 Properties |= 1 << SDNPWantRoot; 426 } else if (PropList[i]->getName() == "SDNPWantParent") { 427 Properties |= 1 << SDNPWantParent; 428 } else { 429 PrintFatalError("Unsupported SD Node property '" + 430 PropList[i]->getName() + "' on ComplexPattern '" + 431 R->getName() + "'!"); 432 } 433 } 434 435 //===----------------------------------------------------------------------===// 436 // CodeGenIntrinsic Implementation 437 //===----------------------------------------------------------------------===// 438 439 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC, 440 bool TargetOnly) { 441 std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic"); 442 443 std::vector<CodeGenIntrinsic> Result; 444 Result.reserve(I.size()); 445 446 for (unsigned i = 0, e = I.size(); i != e; ++i) { 447 bool isTarget = I[i]->getValueAsBit("isTarget"); 448 if (isTarget == TargetOnly) 449 Result.push_back(CodeGenIntrinsic(I[i])); 450 } 451 std::sort(Result.begin(), Result.end(), 452 [](const CodeGenIntrinsic& LHS, const CodeGenIntrinsic& RHS) { 453 return LHS.Name < RHS.Name; 454 }); 455 return Result; 456 } 457 458 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) { 459 TheDef = R; 460 std::string DefName = R->getName(); 461 ModRef = ReadWriteMem; 462 isOverloaded = false; 463 isCommutative = false; 464 canThrow = false; 465 isNoReturn = false; 466 isNoDuplicate = false; 467 isConvergent = false; 468 469 if (DefName.size() <= 4 || 470 std::string(DefName.begin(), DefName.begin() + 4) != "int_") 471 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'int_'!"); 472 473 EnumName = std::string(DefName.begin()+4, DefName.end()); 474 475 if (R->getValue("GCCBuiltinName")) // Ignore a missing GCCBuiltinName field. 476 GCCBuiltinName = R->getValueAsString("GCCBuiltinName"); 477 if (R->getValue("MSBuiltinName")) // Ignore a missing MSBuiltinName field. 478 MSBuiltinName = R->getValueAsString("MSBuiltinName"); 479 480 TargetPrefix = R->getValueAsString("TargetPrefix"); 481 Name = R->getValueAsString("LLVMName"); 482 483 if (Name == "") { 484 // If an explicit name isn't specified, derive one from the DefName. 485 Name = "llvm."; 486 487 for (unsigned i = 0, e = EnumName.size(); i != e; ++i) 488 Name += (EnumName[i] == '_') ? '.' : EnumName[i]; 489 } else { 490 // Verify it starts with "llvm.". 491 if (Name.size() <= 5 || 492 std::string(Name.begin(), Name.begin() + 5) != "llvm.") 493 PrintFatalError("Intrinsic '" + DefName + "'s name does not start with 'llvm.'!"); 494 } 495 496 // If TargetPrefix is specified, make sure that Name starts with 497 // "llvm.<targetprefix>.". 498 if (!TargetPrefix.empty()) { 499 if (Name.size() < 6+TargetPrefix.size() || 500 std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size()) 501 != (TargetPrefix + ".")) 502 PrintFatalError("Intrinsic '" + DefName + "' does not start with 'llvm." + 503 TargetPrefix + ".'!"); 504 } 505 506 // Parse the list of return types. 507 std::vector<MVT::SimpleValueType> OverloadedVTs; 508 ListInit *TypeList = R->getValueAsListInit("RetTypes"); 509 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { 510 Record *TyEl = TypeList->getElementAsRecord(i); 511 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 512 MVT::SimpleValueType VT; 513 if (TyEl->isSubClassOf("LLVMMatchType")) { 514 unsigned MatchTy = TyEl->getValueAsInt("Number"); 515 assert(MatchTy < OverloadedVTs.size() && 516 "Invalid matching number!"); 517 VT = OverloadedVTs[MatchTy]; 518 // It only makes sense to use the extended and truncated vector element 519 // variants with iAny types; otherwise, if the intrinsic is not 520 // overloaded, all the types can be specified directly. 521 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && 522 !TyEl->isSubClassOf("LLVMTruncatedType")) || 523 VT == MVT::iAny || VT == MVT::vAny) && 524 "Expected iAny or vAny type"); 525 } else { 526 VT = getValueType(TyEl->getValueAsDef("VT")); 527 } 528 if (MVT(VT).isOverloaded()) { 529 OverloadedVTs.push_back(VT); 530 isOverloaded = true; 531 } 532 533 // Reject invalid types. 534 if (VT == MVT::isVoid) 535 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 536 537 IS.RetVTs.push_back(VT); 538 IS.RetTypeDefs.push_back(TyEl); 539 } 540 541 // Parse the list of parameter types. 542 TypeList = R->getValueAsListInit("ParamTypes"); 543 for (unsigned i = 0, e = TypeList->size(); i != e; ++i) { 544 Record *TyEl = TypeList->getElementAsRecord(i); 545 assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!"); 546 MVT::SimpleValueType VT; 547 if (TyEl->isSubClassOf("LLVMMatchType")) { 548 unsigned MatchTy = TyEl->getValueAsInt("Number"); 549 assert(MatchTy < OverloadedVTs.size() && 550 "Invalid matching number!"); 551 VT = OverloadedVTs[MatchTy]; 552 // It only makes sense to use the extended and truncated vector element 553 // variants with iAny types; otherwise, if the intrinsic is not 554 // overloaded, all the types can be specified directly. 555 assert(((!TyEl->isSubClassOf("LLVMExtendedType") && 556 !TyEl->isSubClassOf("LLVMTruncatedType") && 557 !TyEl->isSubClassOf("LLVMVectorSameWidth") && 558 !TyEl->isSubClassOf("LLVMPointerToElt")) || 559 VT == MVT::iAny || VT == MVT::vAny) && 560 "Expected iAny or vAny type"); 561 } else 562 VT = getValueType(TyEl->getValueAsDef("VT")); 563 564 if (MVT(VT).isOverloaded()) { 565 OverloadedVTs.push_back(VT); 566 isOverloaded = true; 567 } 568 569 // Reject invalid types. 570 if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/) 571 PrintFatalError("Intrinsic '" + DefName + " has void in result type list!"); 572 573 IS.ParamVTs.push_back(VT); 574 IS.ParamTypeDefs.push_back(TyEl); 575 } 576 577 // Parse the intrinsic properties. 578 ListInit *PropList = R->getValueAsListInit("Properties"); 579 for (unsigned i = 0, e = PropList->size(); i != e; ++i) { 580 Record *Property = PropList->getElementAsRecord(i); 581 assert(Property->isSubClassOf("IntrinsicProperty") && 582 "Expected a property!"); 583 584 if (Property->getName() == "IntrNoMem") 585 ModRef = NoMem; 586 else if (Property->getName() == "IntrReadArgMem") 587 ModRef = ReadArgMem; 588 else if (Property->getName() == "IntrReadMem") 589 ModRef = ReadMem; 590 else if (Property->getName() == "IntrReadWriteArgMem") 591 ModRef = ReadWriteArgMem; 592 else if (Property->getName() == "Commutative") 593 isCommutative = true; 594 else if (Property->getName() == "Throws") 595 canThrow = true; 596 else if (Property->getName() == "IntrNoDuplicate") 597 isNoDuplicate = true; 598 else if (Property->getName() == "IntrConvergent") 599 isConvergent = true; 600 else if (Property->getName() == "IntrNoReturn") 601 isNoReturn = true; 602 else if (Property->isSubClassOf("NoCapture")) { 603 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 604 ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture)); 605 } else if (Property->isSubClassOf("ReadOnly")) { 606 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 607 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadOnly)); 608 } else if (Property->isSubClassOf("ReadNone")) { 609 unsigned ArgNo = Property->getValueAsInt("ArgNo"); 610 ArgumentAttributes.push_back(std::make_pair(ArgNo, ReadNone)); 611 } else 612 llvm_unreachable("Unknown property!"); 613 } 614 615 // Sort the argument attributes for later benefit. 616 std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end()); 617 } 618