1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends.  This makes it easier to access the data and
12 // provides a single place that needs to check it for validity.  All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <algorithm>
24 using namespace llvm;
25 
26 static cl::opt<unsigned>
27 AsmParserNum("asmparsernum", cl::init(0),
28              cl::desc("Make -gen-asm-parser emit assembly parser #N"));
29 
30 static cl::opt<unsigned>
31 AsmWriterNum("asmwriternum", cl::init(0),
32              cl::desc("Make -gen-asm-writer emit assembly writer #N"));
33 
34 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
35 /// record corresponds to.
36 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
37   return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
38 }
39 
40 std::string llvm::getName(MVT::SimpleValueType T) {
41   switch (T) {
42   case MVT::Other:   return "UNKNOWN";
43   case MVT::iPTR:    return "TLI.getPointerTy()";
44   case MVT::iPTRAny: return "TLI.getPointerTy()";
45   default: return getEnumName(T);
46   }
47 }
48 
49 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50   switch (T) {
51   case MVT::Other:    return "MVT::Other";
52   case MVT::i1:       return "MVT::i1";
53   case MVT::i8:       return "MVT::i8";
54   case MVT::i16:      return "MVT::i16";
55   case MVT::i32:      return "MVT::i32";
56   case MVT::i64:      return "MVT::i64";
57   case MVT::i128:     return "MVT::i128";
58   case MVT::iAny:     return "MVT::iAny";
59   case MVT::fAny:     return "MVT::fAny";
60   case MVT::vAny:     return "MVT::vAny";
61   case MVT::f32:      return "MVT::f32";
62   case MVT::f64:      return "MVT::f64";
63   case MVT::f80:      return "MVT::f80";
64   case MVT::f128:     return "MVT::f128";
65   case MVT::ppcf128:  return "MVT::ppcf128";
66   case MVT::x86mmx:   return "MVT::x86mmx";
67   case MVT::Glue:     return "MVT::Glue";
68   case MVT::isVoid:   return "MVT::isVoid";
69   case MVT::v2i8:     return "MVT::v2i8";
70   case MVT::v4i8:     return "MVT::v4i8";
71   case MVT::v8i8:     return "MVT::v8i8";
72   case MVT::v16i8:    return "MVT::v16i8";
73   case MVT::v32i8:    return "MVT::v32i8";
74   case MVT::v2i16:    return "MVT::v2i16";
75   case MVT::v4i16:    return "MVT::v4i16";
76   case MVT::v8i16:    return "MVT::v8i16";
77   case MVT::v16i16:   return "MVT::v16i16";
78   case MVT::v2i32:    return "MVT::v2i32";
79   case MVT::v4i32:    return "MVT::v4i32";
80   case MVT::v8i32:    return "MVT::v8i32";
81   case MVT::v1i64:    return "MVT::v1i64";
82   case MVT::v2i64:    return "MVT::v2i64";
83   case MVT::v4i64:    return "MVT::v4i64";
84   case MVT::v8i64:    return "MVT::v8i64";
85   case MVT::v2f32:    return "MVT::v2f32";
86   case MVT::v4f32:    return "MVT::v4f32";
87   case MVT::v8f32:    return "MVT::v8f32";
88   case MVT::v2f64:    return "MVT::v2f64";
89   case MVT::v4f64:    return "MVT::v4f64";
90   case MVT::Metadata: return "MVT::Metadata";
91   case MVT::iPTR:     return "MVT::iPTR";
92   case MVT::iPTRAny:  return "MVT::iPTRAny";
93   default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
94   }
95 }
96 
97 /// getQualifiedName - Return the name of the specified record, with a
98 /// namespace qualifier if the record contains one.
99 ///
100 std::string llvm::getQualifiedName(const Record *R) {
101   std::string Namespace;
102   if (R->getValue("Namespace"))
103      Namespace = R->getValueAsString("Namespace");
104   if (Namespace.empty()) return R->getName();
105   return Namespace + "::" + R->getName();
106 }
107 
108 
109 /// getTarget - Return the current instance of the Target class.
110 ///
111 CodeGenTarget::CodeGenTarget(RecordKeeper &records) : Records(records) {
112   std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
113   if (Targets.size() == 0)
114     throw std::string("ERROR: No 'Target' subclasses defined!");
115   if (Targets.size() != 1)
116     throw std::string("ERROR: Multiple subclasses of Target defined!");
117   TargetRec = Targets[0];
118 }
119 
120 
121 const std::string &CodeGenTarget::getName() const {
122   return TargetRec->getName();
123 }
124 
125 std::string CodeGenTarget::getInstNamespace() const {
126   for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
127     // Make sure not to pick up "TargetOpcode" by accidentally getting
128     // the namespace off the PHI instruction or something.
129     if ((*i)->Namespace != "TargetOpcode")
130       return (*i)->Namespace;
131   }
132 
133   return "";
134 }
135 
136 Record *CodeGenTarget::getInstructionSet() const {
137   return TargetRec->getValueAsDef("InstructionSet");
138 }
139 
140 
141 /// getAsmParser - Return the AssemblyParser definition for this target.
142 ///
143 Record *CodeGenTarget::getAsmParser() const {
144   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
145   if (AsmParserNum >= LI.size())
146     throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
147   return LI[AsmParserNum];
148 }
149 
150 /// getAsmWriter - Return the AssemblyWriter definition for this target.
151 ///
152 Record *CodeGenTarget::getAsmWriter() const {
153   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
154   if (AsmWriterNum >= LI.size())
155     throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
156   return LI[AsmWriterNum];
157 }
158 
159 void CodeGenTarget::ReadRegisters() const {
160   std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
161   if (Regs.empty())
162     throw std::string("No 'Register' subclasses defined!");
163   std::sort(Regs.begin(), Regs.end(), LessRecord());
164 
165   Registers.reserve(Regs.size());
166   Registers.assign(Regs.begin(), Regs.end());
167   // Assign the enumeration values.
168   for (unsigned i = 0, e = Registers.size(); i != e; ++i)
169     Registers[i].EnumValue = i + 1;
170 }
171 
172 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
173   CostPerUse = R->getValueAsInt("CostPerUse");
174 }
175 
176 const std::string &CodeGenRegister::getName() const {
177   return TheDef->getName();
178 }
179 
180 void CodeGenTarget::ReadSubRegIndices() const {
181   SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex");
182   std::sort(SubRegIndices.begin(), SubRegIndices.end(), LessRecord());
183 }
184 
185 Record *CodeGenTarget::createSubRegIndex(const std::string &Name) {
186   Record *R = new Record(Name, SMLoc(), Records);
187   Records.addDef(R);
188   SubRegIndices.push_back(R);
189   return R;
190 }
191 
192 void CodeGenTarget::ReadRegisterClasses() const {
193   std::vector<Record*> RegClasses =
194     Records.getAllDerivedDefinitions("RegisterClass");
195   if (RegClasses.empty())
196     throw std::string("No 'RegisterClass' subclasses defined!");
197 
198   RegisterClasses.reserve(RegClasses.size());
199   RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
200 }
201 
202 /// getRegisterByName - If there is a register with the specific AsmName,
203 /// return it.
204 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
205   const std::vector<CodeGenRegister> &Regs = getRegisters();
206   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
207     const CodeGenRegister &Reg = Regs[i];
208     if (Reg.TheDef->getValueAsString("AsmName") == Name)
209       return &Reg;
210   }
211 
212   return 0;
213 }
214 
215 std::vector<MVT::SimpleValueType> CodeGenTarget::
216 getRegisterVTs(Record *R) const {
217   std::vector<MVT::SimpleValueType> Result;
218   const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
219   for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
220     const CodeGenRegisterClass &RC = RegisterClasses[i];
221     for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
222       if (R == RC.Elements[ei]) {
223         const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
224         Result.insert(Result.end(), InVTs.begin(), InVTs.end());
225       }
226     }
227   }
228 
229   // Remove duplicates.
230   array_pod_sort(Result.begin(), Result.end());
231   Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
232   return Result;
233 }
234 
235 
236 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
237   // Rename anonymous register classes.
238   if (R->getName().size() > 9 && R->getName()[9] == '.') {
239     static unsigned AnonCounter = 0;
240     R->setName("AnonRegClass_"+utostr(AnonCounter++));
241   }
242 
243   std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
244   for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
245     Record *Type = TypeList[i];
246     if (!Type->isSubClassOf("ValueType"))
247       throw "RegTypes list member '" + Type->getName() +
248         "' does not derive from the ValueType class!";
249     VTs.push_back(getValueType(Type));
250   }
251   assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
252 
253   std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
254   for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
255     Record *Reg = RegList[i];
256     if (!Reg->isSubClassOf("Register"))
257       throw "Register Class member '" + Reg->getName() +
258             "' does not derive from the Register class!";
259     Elements.push_back(Reg);
260   }
261 
262   // SubRegClasses is a list<dag> containing (RC, subregindex, ...) dags.
263   ListInit *SRC = R->getValueAsListInit("SubRegClasses");
264   for (ListInit::const_iterator i = SRC->begin(), e = SRC->end(); i != e; ++i) {
265     DagInit *DAG = dynamic_cast<DagInit*>(*i);
266     if (!DAG) throw "SubRegClasses must contain DAGs";
267     DefInit *DAGOp = dynamic_cast<DefInit*>(DAG->getOperator());
268     Record *RCRec;
269     if (!DAGOp || !(RCRec = DAGOp->getDef())->isSubClassOf("RegisterClass"))
270       throw "Operator '" + DAG->getOperator()->getAsString() +
271         "' in SubRegClasses is not a RegisterClass";
272     // Iterate over args, all SubRegIndex instances.
273     for (DagInit::const_arg_iterator ai = DAG->arg_begin(), ae = DAG->arg_end();
274          ai != ae; ++ai) {
275       DefInit *Idx = dynamic_cast<DefInit*>(*ai);
276       Record *IdxRec;
277       if (!Idx || !(IdxRec = Idx->getDef())->isSubClassOf("SubRegIndex"))
278         throw "Argument '" + (*ai)->getAsString() +
279           "' in SubRegClasses is not a SubRegIndex";
280       if (!SubRegClasses.insert(std::make_pair(IdxRec, RCRec)).second)
281         throw "SubRegIndex '" + IdxRec->getName() + "' mentioned twice";
282     }
283   }
284 
285   // Allow targets to override the size in bits of the RegisterClass.
286   unsigned Size = R->getValueAsInt("Size");
287 
288   Namespace = R->getValueAsString("Namespace");
289   SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
290   SpillAlignment = R->getValueAsInt("Alignment");
291   CopyCost = R->getValueAsInt("CopyCost");
292   MethodBodies = R->getValueAsCode("MethodBodies");
293   MethodProtos = R->getValueAsCode("MethodProtos");
294 }
295 
296 const std::string &CodeGenRegisterClass::getName() const {
297   return TheDef->getName();
298 }
299 
300 void CodeGenTarget::ReadLegalValueTypes() const {
301   const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
302   for (unsigned i = 0, e = RCs.size(); i != e; ++i)
303     for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
304       LegalValueTypes.push_back(RCs[i].VTs[ri]);
305 
306   // Remove duplicates.
307   std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
308   LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
309                                     LegalValueTypes.end()),
310                         LegalValueTypes.end());
311 }
312 
313 
314 void CodeGenTarget::ReadInstructions() const {
315   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
316   if (Insts.size() <= 2)
317     throw std::string("No 'Instruction' subclasses defined!");
318 
319   // Parse the instructions defined in the .td file.
320   for (unsigned i = 0, e = Insts.size(); i != e; ++i)
321     Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
322 }
323 
324 static const CodeGenInstruction *
325 GetInstByName(const char *Name,
326               const DenseMap<const Record*, CodeGenInstruction*> &Insts,
327               RecordKeeper &Records) {
328   const Record *Rec = Records.getDef(Name);
329 
330   DenseMap<const Record*, CodeGenInstruction*>::const_iterator
331     I = Insts.find(Rec);
332   if (Rec == 0 || I == Insts.end())
333     throw std::string("Could not find '") + Name + "' instruction!";
334   return I->second;
335 }
336 
337 namespace {
338 /// SortInstByName - Sorting predicate to sort instructions by name.
339 ///
340 struct SortInstByName {
341   bool operator()(const CodeGenInstruction *Rec1,
342                   const CodeGenInstruction *Rec2) const {
343     return Rec1->TheDef->getName() < Rec2->TheDef->getName();
344   }
345 };
346 }
347 
348 /// getInstructionsByEnumValue - Return all of the instructions defined by the
349 /// target, ordered by their enum value.
350 void CodeGenTarget::ComputeInstrsByEnum() const {
351   // The ordering here must match the ordering in TargetOpcodes.h.
352   const char *const FixedInstrs[] = {
353     "PHI",
354     "INLINEASM",
355     "PROLOG_LABEL",
356     "EH_LABEL",
357     "GC_LABEL",
358     "KILL",
359     "EXTRACT_SUBREG",
360     "INSERT_SUBREG",
361     "IMPLICIT_DEF",
362     "SUBREG_TO_REG",
363     "COPY_TO_REGCLASS",
364     "DBG_VALUE",
365     "REG_SEQUENCE",
366     "COPY",
367     0
368   };
369   const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
370   for (const char *const *p = FixedInstrs; *p; ++p) {
371     const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
372     assert(Instr && "Missing target independent instruction");
373     assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
374     InstrsByEnum.push_back(Instr);
375   }
376   unsigned EndOfPredefines = InstrsByEnum.size();
377 
378   for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
379        I = Insts.begin(), E = Insts.end(); I != E; ++I) {
380     const CodeGenInstruction *CGI = I->second;
381     if (CGI->Namespace != "TargetOpcode")
382       InstrsByEnum.push_back(CGI);
383   }
384 
385   assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
386 
387   // All of the instructions are now in random order based on the map iteration.
388   // Sort them by name.
389   std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
390             SortInstByName());
391 }
392 
393 
394 /// isLittleEndianEncoding - Return whether this target encodes its instruction
395 /// in little-endian format, i.e. bits laid out in the order [0..n]
396 ///
397 bool CodeGenTarget::isLittleEndianEncoding() const {
398   return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
399 }
400 
401 //===----------------------------------------------------------------------===//
402 // ComplexPattern implementation
403 //
404 ComplexPattern::ComplexPattern(Record *R) {
405   Ty          = ::getValueType(R->getValueAsDef("Ty"));
406   NumOperands = R->getValueAsInt("NumOperands");
407   SelectFunc  = R->getValueAsString("SelectFunc");
408   RootNodes   = R->getValueAsListOfDefs("RootNodes");
409 
410   // Parse the properties.
411   Properties = 0;
412   std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
413   for (unsigned i = 0, e = PropList.size(); i != e; ++i)
414     if (PropList[i]->getName() == "SDNPHasChain") {
415       Properties |= 1 << SDNPHasChain;
416     } else if (PropList[i]->getName() == "SDNPOptInGlue") {
417       Properties |= 1 << SDNPOptInGlue;
418     } else if (PropList[i]->getName() == "SDNPMayStore") {
419       Properties |= 1 << SDNPMayStore;
420     } else if (PropList[i]->getName() == "SDNPMayLoad") {
421       Properties |= 1 << SDNPMayLoad;
422     } else if (PropList[i]->getName() == "SDNPSideEffect") {
423       Properties |= 1 << SDNPSideEffect;
424     } else if (PropList[i]->getName() == "SDNPMemOperand") {
425       Properties |= 1 << SDNPMemOperand;
426     } else if (PropList[i]->getName() == "SDNPVariadic") {
427       Properties |= 1 << SDNPVariadic;
428     } else if (PropList[i]->getName() == "SDNPWantRoot") {
429       Properties |= 1 << SDNPWantRoot;
430     } else if (PropList[i]->getName() == "SDNPWantParent") {
431       Properties |= 1 << SDNPWantParent;
432     } else {
433       errs() << "Unsupported SD Node property '" << PropList[i]->getName()
434              << "' on ComplexPattern '" << R->getName() << "'!\n";
435       exit(1);
436     }
437 }
438 
439 //===----------------------------------------------------------------------===//
440 // CodeGenIntrinsic Implementation
441 //===----------------------------------------------------------------------===//
442 
443 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
444                                                    bool TargetOnly) {
445   std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
446 
447   std::vector<CodeGenIntrinsic> Result;
448 
449   for (unsigned i = 0, e = I.size(); i != e; ++i) {
450     bool isTarget = I[i]->getValueAsBit("isTarget");
451     if (isTarget == TargetOnly)
452       Result.push_back(CodeGenIntrinsic(I[i]));
453   }
454   return Result;
455 }
456 
457 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
458   TheDef = R;
459   std::string DefName = R->getName();
460   ModRef = ReadWriteMem;
461   isOverloaded = false;
462   isCommutative = false;
463   canThrow = false;
464 
465   if (DefName.size() <= 4 ||
466       std::string(DefName.begin(), DefName.begin() + 4) != "int_")
467     throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
468 
469   EnumName = std::string(DefName.begin()+4, DefName.end());
470 
471   if (R->getValue("GCCBuiltinName"))  // Ignore a missing GCCBuiltinName field.
472     GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
473 
474   TargetPrefix = R->getValueAsString("TargetPrefix");
475   Name = R->getValueAsString("LLVMName");
476 
477   if (Name == "") {
478     // If an explicit name isn't specified, derive one from the DefName.
479     Name = "llvm.";
480 
481     for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
482       Name += (EnumName[i] == '_') ? '.' : EnumName[i];
483   } else {
484     // Verify it starts with "llvm.".
485     if (Name.size() <= 5 ||
486         std::string(Name.begin(), Name.begin() + 5) != "llvm.")
487       throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
488   }
489 
490   // If TargetPrefix is specified, make sure that Name starts with
491   // "llvm.<targetprefix>.".
492   if (!TargetPrefix.empty()) {
493     if (Name.size() < 6+TargetPrefix.size() ||
494         std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
495         != (TargetPrefix + "."))
496       throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
497         TargetPrefix + ".'!";
498   }
499 
500   // Parse the list of return types.
501   std::vector<MVT::SimpleValueType> OverloadedVTs;
502   ListInit *TypeList = R->getValueAsListInit("RetTypes");
503   for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
504     Record *TyEl = TypeList->getElementAsRecord(i);
505     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
506     MVT::SimpleValueType VT;
507     if (TyEl->isSubClassOf("LLVMMatchType")) {
508       unsigned MatchTy = TyEl->getValueAsInt("Number");
509       assert(MatchTy < OverloadedVTs.size() &&
510              "Invalid matching number!");
511       VT = OverloadedVTs[MatchTy];
512       // It only makes sense to use the extended and truncated vector element
513       // variants with iAny types; otherwise, if the intrinsic is not
514       // overloaded, all the types can be specified directly.
515       assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
516                !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
517               VT == MVT::iAny || VT == MVT::vAny) &&
518              "Expected iAny or vAny type");
519     } else {
520       VT = getValueType(TyEl->getValueAsDef("VT"));
521     }
522     if (EVT(VT).isOverloaded()) {
523       OverloadedVTs.push_back(VT);
524       isOverloaded = true;
525     }
526 
527     // Reject invalid types.
528     if (VT == MVT::isVoid)
529       throw "Intrinsic '" + DefName + " has void in result type list!";
530 
531     IS.RetVTs.push_back(VT);
532     IS.RetTypeDefs.push_back(TyEl);
533   }
534 
535   // Parse the list of parameter types.
536   TypeList = R->getValueAsListInit("ParamTypes");
537   for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
538     Record *TyEl = TypeList->getElementAsRecord(i);
539     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
540     MVT::SimpleValueType VT;
541     if (TyEl->isSubClassOf("LLVMMatchType")) {
542       unsigned MatchTy = TyEl->getValueAsInt("Number");
543       assert(MatchTy < OverloadedVTs.size() &&
544              "Invalid matching number!");
545       VT = OverloadedVTs[MatchTy];
546       // It only makes sense to use the extended and truncated vector element
547       // variants with iAny types; otherwise, if the intrinsic is not
548       // overloaded, all the types can be specified directly.
549       assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
550                !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
551               VT == MVT::iAny || VT == MVT::vAny) &&
552              "Expected iAny or vAny type");
553     } else
554       VT = getValueType(TyEl->getValueAsDef("VT"));
555 
556     if (EVT(VT).isOverloaded()) {
557       OverloadedVTs.push_back(VT);
558       isOverloaded = true;
559     }
560 
561     // Reject invalid types.
562     if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
563       throw "Intrinsic '" + DefName + " has void in result type list!";
564 
565     IS.ParamVTs.push_back(VT);
566     IS.ParamTypeDefs.push_back(TyEl);
567   }
568 
569   // Parse the intrinsic properties.
570   ListInit *PropList = R->getValueAsListInit("Properties");
571   for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
572     Record *Property = PropList->getElementAsRecord(i);
573     assert(Property->isSubClassOf("IntrinsicProperty") &&
574            "Expected a property!");
575 
576     if (Property->getName() == "IntrNoMem")
577       ModRef = NoMem;
578     else if (Property->getName() == "IntrReadArgMem")
579       ModRef = ReadArgMem;
580     else if (Property->getName() == "IntrReadMem")
581       ModRef = ReadMem;
582     else if (Property->getName() == "IntrReadWriteArgMem")
583       ModRef = ReadWriteArgMem;
584     else if (Property->getName() == "Commutative")
585       isCommutative = true;
586     else if (Property->getName() == "Throws")
587       canThrow = true;
588     else if (Property->isSubClassOf("NoCapture")) {
589       unsigned ArgNo = Property->getValueAsInt("ArgNo");
590       ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
591     } else
592       assert(0 && "Unknown property!");
593   }
594 
595   // Sort the argument attributes for later benefit.
596   std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());
597 }
598