1 //===- CodeGenTarget.cpp - CodeGen Target Class Wrapper -------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // This class wraps target description classes used by the various code
11 // generation TableGen backends.  This makes it easier to access the data and
12 // provides a single place that needs to check it for validity.  All of these
13 // classes throw exceptions on error conditions.
14 //
15 //===----------------------------------------------------------------------===//
16 
17 #include "CodeGenTarget.h"
18 #include "CodeGenIntrinsics.h"
19 #include "Record.h"
20 #include "llvm/ADT/StringExtras.h"
21 #include "llvm/ADT/STLExtras.h"
22 #include "llvm/Support/CommandLine.h"
23 #include <algorithm>
24 using namespace llvm;
25 
26 static cl::opt<unsigned>
27 AsmParserNum("asmparsernum", cl::init(0),
28              cl::desc("Make -gen-asm-parser emit assembly parser #N"));
29 
30 static cl::opt<unsigned>
31 AsmWriterNum("asmwriternum", cl::init(0),
32              cl::desc("Make -gen-asm-writer emit assembly writer #N"));
33 
34 /// getValueType - Return the MVT::SimpleValueType that the specified TableGen
35 /// record corresponds to.
36 MVT::SimpleValueType llvm::getValueType(Record *Rec) {
37   return (MVT::SimpleValueType)Rec->getValueAsInt("Value");
38 }
39 
40 std::string llvm::getName(MVT::SimpleValueType T) {
41   switch (T) {
42   case MVT::Other:   return "UNKNOWN";
43   case MVT::iPTR:    return "TLI.getPointerTy()";
44   case MVT::iPTRAny: return "TLI.getPointerTy()";
45   default: return getEnumName(T);
46   }
47 }
48 
49 std::string llvm::getEnumName(MVT::SimpleValueType T) {
50   switch (T) {
51   case MVT::Other:    return "MVT::Other";
52   case MVT::i1:       return "MVT::i1";
53   case MVT::i8:       return "MVT::i8";
54   case MVT::i16:      return "MVT::i16";
55   case MVT::i32:      return "MVT::i32";
56   case MVT::i64:      return "MVT::i64";
57   case MVT::i128:     return "MVT::i128";
58   case MVT::iAny:     return "MVT::iAny";
59   case MVT::fAny:     return "MVT::fAny";
60   case MVT::vAny:     return "MVT::vAny";
61   case MVT::f32:      return "MVT::f32";
62   case MVT::f64:      return "MVT::f64";
63   case MVT::f80:      return "MVT::f80";
64   case MVT::f128:     return "MVT::f128";
65   case MVT::ppcf128:  return "MVT::ppcf128";
66   case MVT::x86mmx:   return "MVT::x86mmx";
67   case MVT::Glue:     return "MVT::Glue";
68   case MVT::isVoid:   return "MVT::isVoid";
69   case MVT::v2i8:     return "MVT::v2i8";
70   case MVT::v4i8:     return "MVT::v4i8";
71   case MVT::v8i8:     return "MVT::v8i8";
72   case MVT::v16i8:    return "MVT::v16i8";
73   case MVT::v32i8:    return "MVT::v32i8";
74   case MVT::v2i16:    return "MVT::v2i16";
75   case MVT::v4i16:    return "MVT::v4i16";
76   case MVT::v8i16:    return "MVT::v8i16";
77   case MVT::v16i16:   return "MVT::v16i16";
78   case MVT::v2i32:    return "MVT::v2i32";
79   case MVT::v4i32:    return "MVT::v4i32";
80   case MVT::v8i32:    return "MVT::v8i32";
81   case MVT::v1i64:    return "MVT::v1i64";
82   case MVT::v2i64:    return "MVT::v2i64";
83   case MVT::v4i64:    return "MVT::v4i64";
84   case MVT::v8i64:    return "MVT::v8i64";
85   case MVT::v2f32:    return "MVT::v2f32";
86   case MVT::v4f32:    return "MVT::v4f32";
87   case MVT::v8f32:    return "MVT::v8f32";
88   case MVT::v2f64:    return "MVT::v2f64";
89   case MVT::v4f64:    return "MVT::v4f64";
90   case MVT::Metadata: return "MVT::Metadata";
91   case MVT::iPTR:     return "MVT::iPTR";
92   case MVT::iPTRAny:  return "MVT::iPTRAny";
93   default: assert(0 && "ILLEGAL VALUE TYPE!"); return "";
94   }
95 }
96 
97 /// getQualifiedName - Return the name of the specified record, with a
98 /// namespace qualifier if the record contains one.
99 ///
100 std::string llvm::getQualifiedName(const Record *R) {
101   std::string Namespace;
102   if (R->getValue("Namespace"))
103      Namespace = R->getValueAsString("Namespace");
104   if (Namespace.empty()) return R->getName();
105   return Namespace + "::" + R->getName();
106 }
107 
108 
109 /// getTarget - Return the current instance of the Target class.
110 ///
111 CodeGenTarget::CodeGenTarget(RecordKeeper &records) : Records(records) {
112   std::vector<Record*> Targets = Records.getAllDerivedDefinitions("Target");
113   if (Targets.size() == 0)
114     throw std::string("ERROR: No 'Target' subclasses defined!");
115   if (Targets.size() != 1)
116     throw std::string("ERROR: Multiple subclasses of Target defined!");
117   TargetRec = Targets[0];
118 }
119 
120 
121 const std::string &CodeGenTarget::getName() const {
122   return TargetRec->getName();
123 }
124 
125 std::string CodeGenTarget::getInstNamespace() const {
126   for (inst_iterator i = inst_begin(), e = inst_end(); i != e; ++i) {
127     // Make sure not to pick up "TargetOpcode" by accidentally getting
128     // the namespace off the PHI instruction or something.
129     if ((*i)->Namespace != "TargetOpcode")
130       return (*i)->Namespace;
131   }
132 
133   return "";
134 }
135 
136 Record *CodeGenTarget::getInstructionSet() const {
137   return TargetRec->getValueAsDef("InstructionSet");
138 }
139 
140 
141 /// getAsmParser - Return the AssemblyParser definition for this target.
142 ///
143 Record *CodeGenTarget::getAsmParser() const {
144   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyParsers");
145   if (AsmParserNum >= LI.size())
146     throw "Target does not have an AsmParser #" + utostr(AsmParserNum) + "!";
147   return LI[AsmParserNum];
148 }
149 
150 /// getAsmWriter - Return the AssemblyWriter definition for this target.
151 ///
152 Record *CodeGenTarget::getAsmWriter() const {
153   std::vector<Record*> LI = TargetRec->getValueAsListOfDefs("AssemblyWriters");
154   if (AsmWriterNum >= LI.size())
155     throw "Target does not have an AsmWriter #" + utostr(AsmWriterNum) + "!";
156   return LI[AsmWriterNum];
157 }
158 
159 void CodeGenTarget::ReadRegisters() const {
160   std::vector<Record*> Regs = Records.getAllDerivedDefinitions("Register");
161   if (Regs.empty())
162     throw std::string("No 'Register' subclasses defined!");
163   std::sort(Regs.begin(), Regs.end(), LessRecord());
164 
165   Registers.reserve(Regs.size());
166   Registers.assign(Regs.begin(), Regs.end());
167   // Assign the enumeration values.
168   for (unsigned i = 0, e = Registers.size(); i != e; ++i)
169     Registers[i].EnumValue = i + 1;
170 }
171 
172 CodeGenRegister::CodeGenRegister(Record *R) : TheDef(R) {
173   CostPerUse = R->getValueAsInt("CostPerUse");
174 }
175 
176 const std::string &CodeGenRegister::getName() const {
177   return TheDef->getName();
178 }
179 
180 void CodeGenTarget::ReadSubRegIndices() const {
181   SubRegIndices = Records.getAllDerivedDefinitions("SubRegIndex");
182   std::sort(SubRegIndices.begin(), SubRegIndices.end(), LessRecord());
183 }
184 
185 Record *CodeGenTarget::createSubRegIndex(const std::string &Name) {
186   Record *R = new Record(Name, SMLoc(), Records);
187   Records.addDef(R);
188   SubRegIndices.push_back(R);
189   return R;
190 }
191 
192 void CodeGenTarget::ReadRegisterClasses() const {
193   std::vector<Record*> RegClasses =
194     Records.getAllDerivedDefinitions("RegisterClass");
195   if (RegClasses.empty())
196     throw std::string("No 'RegisterClass' subclasses defined!");
197 
198   RegisterClasses.reserve(RegClasses.size());
199   RegisterClasses.assign(RegClasses.begin(), RegClasses.end());
200 }
201 
202 /// getRegisterByName - If there is a register with the specific AsmName,
203 /// return it.
204 const CodeGenRegister *CodeGenTarget::getRegisterByName(StringRef Name) const {
205   const std::vector<CodeGenRegister> &Regs = getRegisters();
206   for (unsigned i = 0, e = Regs.size(); i != e; ++i) {
207     const CodeGenRegister &Reg = Regs[i];
208     if (Reg.TheDef->getValueAsString("AsmName") == Name)
209       return &Reg;
210   }
211 
212   return 0;
213 }
214 
215 std::vector<MVT::SimpleValueType> CodeGenTarget::
216 getRegisterVTs(Record *R) const {
217   std::vector<MVT::SimpleValueType> Result;
218   const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
219   for (unsigned i = 0, e = RCs.size(); i != e; ++i) {
220     const CodeGenRegisterClass &RC = RegisterClasses[i];
221     for (unsigned ei = 0, ee = RC.Elements.size(); ei != ee; ++ei) {
222       if (R == RC.Elements[ei]) {
223         const std::vector<MVT::SimpleValueType> &InVTs = RC.getValueTypes();
224         Result.insert(Result.end(), InVTs.begin(), InVTs.end());
225       }
226     }
227   }
228 
229   // Remove duplicates.
230   array_pod_sort(Result.begin(), Result.end());
231   Result.erase(std::unique(Result.begin(), Result.end()), Result.end());
232   return Result;
233 }
234 
235 
236 CodeGenRegisterClass::CodeGenRegisterClass(Record *R) : TheDef(R) {
237   // Rename anonymous register classes.
238   if (R->getName().size() > 9 && R->getName()[9] == '.') {
239     static unsigned AnonCounter = 0;
240     R->setName("AnonRegClass_"+utostr(AnonCounter++));
241   }
242 
243   std::vector<Record*> TypeList = R->getValueAsListOfDefs("RegTypes");
244   for (unsigned i = 0, e = TypeList.size(); i != e; ++i) {
245     Record *Type = TypeList[i];
246     if (!Type->isSubClassOf("ValueType"))
247       throw "RegTypes list member '" + Type->getName() +
248         "' does not derive from the ValueType class!";
249     VTs.push_back(getValueType(Type));
250   }
251   assert(!VTs.empty() && "RegisterClass must contain at least one ValueType!");
252 
253   std::vector<Record*> RegList = R->getValueAsListOfDefs("MemberList");
254   for (unsigned i = 0, e = RegList.size(); i != e; ++i) {
255     Record *Reg = RegList[i];
256     if (!Reg->isSubClassOf("Register"))
257       throw "Register Class member '" + Reg->getName() +
258             "' does not derive from the Register class!";
259     Elements.push_back(Reg);
260   }
261 
262   // SubRegClasses is a list<dag> containing (RC, subregindex, ...) dags.
263   ListInit *SRC = R->getValueAsListInit("SubRegClasses");
264   for (ListInit::const_iterator i = SRC->begin(), e = SRC->end(); i != e; ++i) {
265     DagInit *DAG = dynamic_cast<DagInit*>(*i);
266     if (!DAG) throw "SubRegClasses must contain DAGs";
267     DefInit *DAGOp = dynamic_cast<DefInit*>(DAG->getOperator());
268     Record *RCRec;
269     if (!DAGOp || !(RCRec = DAGOp->getDef())->isSubClassOf("RegisterClass"))
270       throw "Operator '" + DAG->getOperator()->getAsString() +
271         "' in SubRegClasses is not a RegisterClass";
272     // Iterate over args, all SubRegIndex instances.
273     for (DagInit::const_arg_iterator ai = DAG->arg_begin(), ae = DAG->arg_end();
274          ai != ae; ++ai) {
275       DefInit *Idx = dynamic_cast<DefInit*>(*ai);
276       Record *IdxRec;
277       if (!Idx || !(IdxRec = Idx->getDef())->isSubClassOf("SubRegIndex"))
278         throw "Argument '" + (*ai)->getAsString() +
279           "' in SubRegClasses is not a SubRegIndex";
280       if (!SubRegClasses.insert(std::make_pair(IdxRec, RCRec)).second)
281         throw "SubRegIndex '" + IdxRec->getName() + "' mentioned twice";
282     }
283   }
284 
285   // Allow targets to override the size in bits of the RegisterClass.
286   unsigned Size = R->getValueAsInt("Size");
287 
288   Namespace = R->getValueAsString("Namespace");
289   SpillSize = Size ? Size : EVT(VTs[0]).getSizeInBits();
290   SpillAlignment = R->getValueAsInt("Alignment");
291   CopyCost = R->getValueAsInt("CopyCost");
292   Allocatable = R->getValueAsBit("isAllocatable");
293   MethodBodies = R->getValueAsCode("MethodBodies");
294   MethodProtos = R->getValueAsCode("MethodProtos");
295 }
296 
297 const std::string &CodeGenRegisterClass::getName() const {
298   return TheDef->getName();
299 }
300 
301 void CodeGenTarget::ReadLegalValueTypes() const {
302   const std::vector<CodeGenRegisterClass> &RCs = getRegisterClasses();
303   for (unsigned i = 0, e = RCs.size(); i != e; ++i)
304     for (unsigned ri = 0, re = RCs[i].VTs.size(); ri != re; ++ri)
305       LegalValueTypes.push_back(RCs[i].VTs[ri]);
306 
307   // Remove duplicates.
308   std::sort(LegalValueTypes.begin(), LegalValueTypes.end());
309   LegalValueTypes.erase(std::unique(LegalValueTypes.begin(),
310                                     LegalValueTypes.end()),
311                         LegalValueTypes.end());
312 }
313 
314 
315 void CodeGenTarget::ReadInstructions() const {
316   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
317   if (Insts.size() <= 2)
318     throw std::string("No 'Instruction' subclasses defined!");
319 
320   // Parse the instructions defined in the .td file.
321   for (unsigned i = 0, e = Insts.size(); i != e; ++i)
322     Instructions[Insts[i]] = new CodeGenInstruction(Insts[i]);
323 }
324 
325 static const CodeGenInstruction *
326 GetInstByName(const char *Name,
327               const DenseMap<const Record*, CodeGenInstruction*> &Insts,
328               RecordKeeper &Records) {
329   const Record *Rec = Records.getDef(Name);
330 
331   DenseMap<const Record*, CodeGenInstruction*>::const_iterator
332     I = Insts.find(Rec);
333   if (Rec == 0 || I == Insts.end())
334     throw std::string("Could not find '") + Name + "' instruction!";
335   return I->second;
336 }
337 
338 namespace {
339 /// SortInstByName - Sorting predicate to sort instructions by name.
340 ///
341 struct SortInstByName {
342   bool operator()(const CodeGenInstruction *Rec1,
343                   const CodeGenInstruction *Rec2) const {
344     return Rec1->TheDef->getName() < Rec2->TheDef->getName();
345   }
346 };
347 }
348 
349 /// getInstructionsByEnumValue - Return all of the instructions defined by the
350 /// target, ordered by their enum value.
351 void CodeGenTarget::ComputeInstrsByEnum() const {
352   // The ordering here must match the ordering in TargetOpcodes.h.
353   const char *const FixedInstrs[] = {
354     "PHI",
355     "INLINEASM",
356     "PROLOG_LABEL",
357     "EH_LABEL",
358     "GC_LABEL",
359     "KILL",
360     "EXTRACT_SUBREG",
361     "INSERT_SUBREG",
362     "IMPLICIT_DEF",
363     "SUBREG_TO_REG",
364     "COPY_TO_REGCLASS",
365     "DBG_VALUE",
366     "REG_SEQUENCE",
367     "COPY",
368     0
369   };
370   const DenseMap<const Record*, CodeGenInstruction*> &Insts = getInstructions();
371   for (const char *const *p = FixedInstrs; *p; ++p) {
372     const CodeGenInstruction *Instr = GetInstByName(*p, Insts, Records);
373     assert(Instr && "Missing target independent instruction");
374     assert(Instr->Namespace == "TargetOpcode" && "Bad namespace");
375     InstrsByEnum.push_back(Instr);
376   }
377   unsigned EndOfPredefines = InstrsByEnum.size();
378 
379   for (DenseMap<const Record*, CodeGenInstruction*>::const_iterator
380        I = Insts.begin(), E = Insts.end(); I != E; ++I) {
381     const CodeGenInstruction *CGI = I->second;
382     if (CGI->Namespace != "TargetOpcode")
383       InstrsByEnum.push_back(CGI);
384   }
385 
386   assert(InstrsByEnum.size() == Insts.size() && "Missing predefined instr");
387 
388   // All of the instructions are now in random order based on the map iteration.
389   // Sort them by name.
390   std::sort(InstrsByEnum.begin()+EndOfPredefines, InstrsByEnum.end(),
391             SortInstByName());
392 }
393 
394 
395 /// isLittleEndianEncoding - Return whether this target encodes its instruction
396 /// in little-endian format, i.e. bits laid out in the order [0..n]
397 ///
398 bool CodeGenTarget::isLittleEndianEncoding() const {
399   return getInstructionSet()->getValueAsBit("isLittleEndianEncoding");
400 }
401 
402 //===----------------------------------------------------------------------===//
403 // ComplexPattern implementation
404 //
405 ComplexPattern::ComplexPattern(Record *R) {
406   Ty          = ::getValueType(R->getValueAsDef("Ty"));
407   NumOperands = R->getValueAsInt("NumOperands");
408   SelectFunc  = R->getValueAsString("SelectFunc");
409   RootNodes   = R->getValueAsListOfDefs("RootNodes");
410 
411   // Parse the properties.
412   Properties = 0;
413   std::vector<Record*> PropList = R->getValueAsListOfDefs("Properties");
414   for (unsigned i = 0, e = PropList.size(); i != e; ++i)
415     if (PropList[i]->getName() == "SDNPHasChain") {
416       Properties |= 1 << SDNPHasChain;
417     } else if (PropList[i]->getName() == "SDNPOptInGlue") {
418       Properties |= 1 << SDNPOptInGlue;
419     } else if (PropList[i]->getName() == "SDNPMayStore") {
420       Properties |= 1 << SDNPMayStore;
421     } else if (PropList[i]->getName() == "SDNPMayLoad") {
422       Properties |= 1 << SDNPMayLoad;
423     } else if (PropList[i]->getName() == "SDNPSideEffect") {
424       Properties |= 1 << SDNPSideEffect;
425     } else if (PropList[i]->getName() == "SDNPMemOperand") {
426       Properties |= 1 << SDNPMemOperand;
427     } else if (PropList[i]->getName() == "SDNPVariadic") {
428       Properties |= 1 << SDNPVariadic;
429     } else if (PropList[i]->getName() == "SDNPWantRoot") {
430       Properties |= 1 << SDNPWantRoot;
431     } else if (PropList[i]->getName() == "SDNPWantParent") {
432       Properties |= 1 << SDNPWantParent;
433     } else {
434       errs() << "Unsupported SD Node property '" << PropList[i]->getName()
435              << "' on ComplexPattern '" << R->getName() << "'!\n";
436       exit(1);
437     }
438 }
439 
440 //===----------------------------------------------------------------------===//
441 // CodeGenIntrinsic Implementation
442 //===----------------------------------------------------------------------===//
443 
444 std::vector<CodeGenIntrinsic> llvm::LoadIntrinsics(const RecordKeeper &RC,
445                                                    bool TargetOnly) {
446   std::vector<Record*> I = RC.getAllDerivedDefinitions("Intrinsic");
447 
448   std::vector<CodeGenIntrinsic> Result;
449 
450   for (unsigned i = 0, e = I.size(); i != e; ++i) {
451     bool isTarget = I[i]->getValueAsBit("isTarget");
452     if (isTarget == TargetOnly)
453       Result.push_back(CodeGenIntrinsic(I[i]));
454   }
455   return Result;
456 }
457 
458 CodeGenIntrinsic::CodeGenIntrinsic(Record *R) {
459   TheDef = R;
460   std::string DefName = R->getName();
461   ModRef = ReadWriteMem;
462   isOverloaded = false;
463   isCommutative = false;
464   canThrow = false;
465 
466   if (DefName.size() <= 4 ||
467       std::string(DefName.begin(), DefName.begin() + 4) != "int_")
468     throw "Intrinsic '" + DefName + "' does not start with 'int_'!";
469 
470   EnumName = std::string(DefName.begin()+4, DefName.end());
471 
472   if (R->getValue("GCCBuiltinName"))  // Ignore a missing GCCBuiltinName field.
473     GCCBuiltinName = R->getValueAsString("GCCBuiltinName");
474 
475   TargetPrefix = R->getValueAsString("TargetPrefix");
476   Name = R->getValueAsString("LLVMName");
477 
478   if (Name == "") {
479     // If an explicit name isn't specified, derive one from the DefName.
480     Name = "llvm.";
481 
482     for (unsigned i = 0, e = EnumName.size(); i != e; ++i)
483       Name += (EnumName[i] == '_') ? '.' : EnumName[i];
484   } else {
485     // Verify it starts with "llvm.".
486     if (Name.size() <= 5 ||
487         std::string(Name.begin(), Name.begin() + 5) != "llvm.")
488       throw "Intrinsic '" + DefName + "'s name does not start with 'llvm.'!";
489   }
490 
491   // If TargetPrefix is specified, make sure that Name starts with
492   // "llvm.<targetprefix>.".
493   if (!TargetPrefix.empty()) {
494     if (Name.size() < 6+TargetPrefix.size() ||
495         std::string(Name.begin() + 5, Name.begin() + 6 + TargetPrefix.size())
496         != (TargetPrefix + "."))
497       throw "Intrinsic '" + DefName + "' does not start with 'llvm." +
498         TargetPrefix + ".'!";
499   }
500 
501   // Parse the list of return types.
502   std::vector<MVT::SimpleValueType> OverloadedVTs;
503   ListInit *TypeList = R->getValueAsListInit("RetTypes");
504   for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
505     Record *TyEl = TypeList->getElementAsRecord(i);
506     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
507     MVT::SimpleValueType VT;
508     if (TyEl->isSubClassOf("LLVMMatchType")) {
509       unsigned MatchTy = TyEl->getValueAsInt("Number");
510       assert(MatchTy < OverloadedVTs.size() &&
511              "Invalid matching number!");
512       VT = OverloadedVTs[MatchTy];
513       // It only makes sense to use the extended and truncated vector element
514       // variants with iAny types; otherwise, if the intrinsic is not
515       // overloaded, all the types can be specified directly.
516       assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
517                !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
518               VT == MVT::iAny || VT == MVT::vAny) &&
519              "Expected iAny or vAny type");
520     } else {
521       VT = getValueType(TyEl->getValueAsDef("VT"));
522     }
523     if (EVT(VT).isOverloaded()) {
524       OverloadedVTs.push_back(VT);
525       isOverloaded = true;
526     }
527 
528     // Reject invalid types.
529     if (VT == MVT::isVoid)
530       throw "Intrinsic '" + DefName + " has void in result type list!";
531 
532     IS.RetVTs.push_back(VT);
533     IS.RetTypeDefs.push_back(TyEl);
534   }
535 
536   // Parse the list of parameter types.
537   TypeList = R->getValueAsListInit("ParamTypes");
538   for (unsigned i = 0, e = TypeList->getSize(); i != e; ++i) {
539     Record *TyEl = TypeList->getElementAsRecord(i);
540     assert(TyEl->isSubClassOf("LLVMType") && "Expected a type!");
541     MVT::SimpleValueType VT;
542     if (TyEl->isSubClassOf("LLVMMatchType")) {
543       unsigned MatchTy = TyEl->getValueAsInt("Number");
544       assert(MatchTy < OverloadedVTs.size() &&
545              "Invalid matching number!");
546       VT = OverloadedVTs[MatchTy];
547       // It only makes sense to use the extended and truncated vector element
548       // variants with iAny types; otherwise, if the intrinsic is not
549       // overloaded, all the types can be specified directly.
550       assert(((!TyEl->isSubClassOf("LLVMExtendedElementVectorType") &&
551                !TyEl->isSubClassOf("LLVMTruncatedElementVectorType")) ||
552               VT == MVT::iAny || VT == MVT::vAny) &&
553              "Expected iAny or vAny type");
554     } else
555       VT = getValueType(TyEl->getValueAsDef("VT"));
556 
557     if (EVT(VT).isOverloaded()) {
558       OverloadedVTs.push_back(VT);
559       isOverloaded = true;
560     }
561 
562     // Reject invalid types.
563     if (VT == MVT::isVoid && i != e-1 /*void at end means varargs*/)
564       throw "Intrinsic '" + DefName + " has void in result type list!";
565 
566     IS.ParamVTs.push_back(VT);
567     IS.ParamTypeDefs.push_back(TyEl);
568   }
569 
570   // Parse the intrinsic properties.
571   ListInit *PropList = R->getValueAsListInit("Properties");
572   for (unsigned i = 0, e = PropList->getSize(); i != e; ++i) {
573     Record *Property = PropList->getElementAsRecord(i);
574     assert(Property->isSubClassOf("IntrinsicProperty") &&
575            "Expected a property!");
576 
577     if (Property->getName() == "IntrNoMem")
578       ModRef = NoMem;
579     else if (Property->getName() == "IntrReadArgMem")
580       ModRef = ReadArgMem;
581     else if (Property->getName() == "IntrReadMem")
582       ModRef = ReadMem;
583     else if (Property->getName() == "IntrReadWriteArgMem")
584       ModRef = ReadWriteArgMem;
585     else if (Property->getName() == "Commutative")
586       isCommutative = true;
587     else if (Property->getName() == "Throws")
588       canThrow = true;
589     else if (Property->isSubClassOf("NoCapture")) {
590       unsigned ArgNo = Property->getValueAsInt("ArgNo");
591       ArgumentAttributes.push_back(std::make_pair(ArgNo, NoCapture));
592     } else
593       assert(0 && "Unknown property!");
594   }
595 
596   // Sort the argument attributes for later benefit.
597   std::sort(ArgumentAttributes.begin(), ArgumentAttributes.end());
598 }
599