1 //===- CodeGenInstruction.h - Instruction Class Wrapper ---------*- C++ -*-===// 2 // 3 // The LLVM Compiler Infrastructure 4 // 5 // This file is distributed under the University of Illinois Open Source 6 // License. See LICENSE.TXT for details. 7 // 8 //===----------------------------------------------------------------------===// 9 // 10 // This file defines a wrapper class for the 'Instruction' TableGen class. 11 // 12 //===----------------------------------------------------------------------===// 13 14 #ifndef CODEGEN_INSTRUCTION_H 15 #define CODEGEN_INSTRUCTION_H 16 17 #include "llvm/CodeGen/ValueTypes.h" 18 #include "llvm/ADT/StringRef.h" 19 #include "llvm/Support/SourceMgr.h" 20 #include <string> 21 #include <vector> 22 #include <utility> 23 24 namespace llvm { 25 class Record; 26 class DagInit; 27 class CodeGenTarget; 28 class StringRef; 29 30 class CGIOperandList { 31 public: 32 class ConstraintInfo { 33 enum { None, EarlyClobber, Tied } Kind; 34 unsigned OtherTiedOperand; 35 public: 36 ConstraintInfo() : Kind(None) {} 37 38 static ConstraintInfo getEarlyClobber() { 39 ConstraintInfo I; 40 I.Kind = EarlyClobber; 41 I.OtherTiedOperand = 0; 42 return I; 43 } 44 45 static ConstraintInfo getTied(unsigned Op) { 46 ConstraintInfo I; 47 I.Kind = Tied; 48 I.OtherTiedOperand = Op; 49 return I; 50 } 51 52 bool isNone() const { return Kind == None; } 53 bool isEarlyClobber() const { return Kind == EarlyClobber; } 54 bool isTied() const { return Kind == Tied; } 55 56 unsigned getTiedOperand() const { 57 assert(isTied()); 58 return OtherTiedOperand; 59 } 60 }; 61 62 /// OperandInfo - The information we keep track of for each operand in the 63 /// operand list for a tablegen instruction. 64 struct OperandInfo { 65 /// Rec - The definition this operand is declared as. 66 /// 67 Record *Rec; 68 69 /// Name - If this operand was assigned a symbolic name, this is it, 70 /// otherwise, it's empty. 71 std::string Name; 72 73 /// PrinterMethodName - The method used to print operands of this type in 74 /// the asmprinter. 75 std::string PrinterMethodName; 76 77 /// EncoderMethodName - The method used to get the machine operand value 78 /// for binary encoding. "getMachineOpValue" by default. 79 std::string EncoderMethodName; 80 81 /// MIOperandNo - Currently (this is meant to be phased out), some logical 82 /// operands correspond to multiple MachineInstr operands. In the X86 83 /// target for example, one address operand is represented as 4 84 /// MachineOperands. Because of this, the operand number in the 85 /// OperandList may not match the MachineInstr operand num. Until it 86 /// does, this contains the MI operand index of this operand. 87 unsigned MIOperandNo; 88 unsigned MINumOperands; // The number of operands. 89 90 /// DoNotEncode - Bools are set to true in this vector for each operand in 91 /// the DisableEncoding list. These should not be emitted by the code 92 /// emitter. 93 std::vector<bool> DoNotEncode; 94 95 /// MIOperandInfo - Default MI operand type. Note an operand may be made 96 /// up of multiple MI operands. 97 DagInit *MIOperandInfo; 98 99 /// Constraint info for this operand. This operand can have pieces, so we 100 /// track constraint info for each. 101 std::vector<ConstraintInfo> Constraints; 102 103 OperandInfo(Record *R, const std::string &N, const std::string &PMN, 104 const std::string &EMN, unsigned MION, unsigned MINO, 105 DagInit *MIOI) 106 : Rec(R), Name(N), PrinterMethodName(PMN), EncoderMethodName(EMN), 107 MIOperandNo(MION), MINumOperands(MINO), MIOperandInfo(MIOI) {} 108 109 110 /// getTiedOperand - If this operand is tied to another one, return the 111 /// other operand number. Otherwise, return -1. 112 int getTiedRegister() const { 113 for (unsigned j = 0, e = Constraints.size(); j != e; ++j) { 114 const CGIOperandList::ConstraintInfo &CI = Constraints[j]; 115 if (CI.isTied()) return CI.getTiedOperand(); 116 } 117 return -1; 118 } 119 }; 120 121 CGIOperandList(Record *D); 122 123 Record *TheDef; // The actual record containing this OperandList. 124 125 /// NumDefs - Number of def operands declared, this is the number of 126 /// elements in the instruction's (outs) list. 127 /// 128 unsigned NumDefs; 129 130 /// OperandList - The list of declared operands, along with their declared 131 /// type (which is a record). 132 std::vector<OperandInfo> OperandList; 133 134 // Information gleaned from the operand list. 135 bool isPredicable; 136 bool hasOptionalDef; 137 bool isVariadic; 138 139 // Provide transparent accessors to the operand list. 140 unsigned size() const { return OperandList.size(); } 141 const OperandInfo &operator[](unsigned i) const { return OperandList[i]; } 142 OperandInfo &operator[](unsigned i) { return OperandList[i]; } 143 OperandInfo &back() { return OperandList.back(); } 144 const OperandInfo &back() const { return OperandList.back(); } 145 146 147 /// getOperandNamed - Return the index of the operand with the specified 148 /// non-empty name. If the instruction does not have an operand with the 149 /// specified name, throw an exception. 150 unsigned getOperandNamed(StringRef Name) const; 151 152 /// hasOperandNamed - Query whether the instruction has an operand of the 153 /// given name. If so, return true and set OpIdx to the index of the 154 /// operand. Otherwise, return false. 155 bool hasOperandNamed(StringRef Name, unsigned &OpIdx) const; 156 157 /// ParseOperandName - Parse an operand name like "$foo" or "$foo.bar", 158 /// where $foo is a whole operand and $foo.bar refers to a suboperand. 159 /// This throws an exception if the name is invalid. If AllowWholeOp is 160 /// true, references to operands with suboperands are allowed, otherwise 161 /// not. 162 std::pair<unsigned,unsigned> ParseOperandName(const std::string &Op, 163 bool AllowWholeOp = true); 164 165 /// getFlattenedOperandNumber - Flatten a operand/suboperand pair into a 166 /// flat machineinstr operand #. 167 unsigned getFlattenedOperandNumber(std::pair<unsigned,unsigned> Op) const { 168 return OperandList[Op.first].MIOperandNo + Op.second; 169 } 170 171 /// getSubOperandNumber - Unflatten a operand number into an 172 /// operand/suboperand pair. 173 std::pair<unsigned,unsigned> getSubOperandNumber(unsigned Op) const { 174 for (unsigned i = 0; ; ++i) { 175 assert(i < OperandList.size() && "Invalid flat operand #"); 176 if (OperandList[i].MIOperandNo+OperandList[i].MINumOperands > Op) 177 return std::make_pair(i, Op-OperandList[i].MIOperandNo); 178 } 179 } 180 181 182 /// isFlatOperandNotEmitted - Return true if the specified flat operand # 183 /// should not be emitted with the code emitter. 184 bool isFlatOperandNotEmitted(unsigned FlatOpNo) const { 185 std::pair<unsigned,unsigned> Op = getSubOperandNumber(FlatOpNo); 186 if (OperandList[Op.first].DoNotEncode.size() > Op.second) 187 return OperandList[Op.first].DoNotEncode[Op.second]; 188 return false; 189 } 190 191 void ProcessDisableEncoding(std::string Value); 192 }; 193 194 195 class CodeGenInstruction { 196 public: 197 Record *TheDef; // The actual record defining this instruction. 198 std::string Namespace; // The namespace the instruction is in. 199 200 /// AsmString - The format string used to emit a .s file for the 201 /// instruction. 202 std::string AsmString; 203 204 /// Operands - This is information about the (ins) and (outs) list specified 205 /// to the instruction. 206 CGIOperandList Operands; 207 208 /// ImplicitDefs/ImplicitUses - These are lists of registers that are 209 /// implicitly defined and used by the instruction. 210 std::vector<Record*> ImplicitDefs, ImplicitUses; 211 212 // Various boolean values we track for the instruction. 213 bool isReturn; 214 bool isBranch; 215 bool isIndirectBranch; 216 bool isCompare; 217 bool isMoveImm; 218 bool isBitcast; 219 bool isBarrier; 220 bool isCall; 221 bool canFoldAsLoad; 222 bool mayLoad, mayStore; 223 bool isPredicable; 224 bool isConvertibleToThreeAddress; 225 bool isCommutable; 226 bool isTerminator; 227 bool isReMaterializable; 228 bool hasDelaySlot; 229 bool usesCustomInserter; 230 bool hasCtrlDep; 231 bool isNotDuplicable; 232 bool hasSideEffects; 233 bool neverHasSideEffects; 234 bool isAsCheapAsAMove; 235 bool hasExtraSrcRegAllocReq; 236 bool hasExtraDefRegAllocReq; 237 238 239 CodeGenInstruction(Record *R); 240 241 /// HasOneImplicitDefWithKnownVT - If the instruction has at least one 242 /// implicit def and it has a known VT, return the VT, otherwise return 243 /// MVT::Other. 244 MVT::SimpleValueType 245 HasOneImplicitDefWithKnownVT(const CodeGenTarget &TargetInfo) const; 246 247 248 /// FlattenAsmStringVariants - Flatten the specified AsmString to only 249 /// include text from the specified variant, returning the new string. 250 static std::string FlattenAsmStringVariants(StringRef AsmString, 251 unsigned Variant); 252 }; 253 254 255 /// CodeGenInstAlias - This represents an InstAlias definition. 256 class CodeGenInstAlias { 257 public: 258 Record *TheDef; // The actual record defining this InstAlias. 259 260 /// AsmString - The format string used to emit a .s file for the 261 /// instruction. 262 std::string AsmString; 263 264 /// Result - The result instruction. 265 DagInit *Result; 266 267 /// ResultInst - The instruction generated by the alias (decoded from 268 /// Result). 269 CodeGenInstruction *ResultInst; 270 271 272 struct ResultOperand { 273 private: 274 StringRef Name; 275 Record *R; 276 277 int64_t Imm; 278 public: 279 enum { 280 K_Record, 281 K_Imm, 282 K_Reg 283 } Kind; 284 285 ResultOperand(StringRef N, Record *r) : Name(N), R(r), Kind(K_Record) {} 286 ResultOperand(int64_t I) : Imm(I), Kind(K_Imm) {} 287 ResultOperand(Record *r) : R(r), Kind(K_Reg) {} 288 289 bool isRecord() const { return Kind == K_Record; } 290 bool isImm() const { return Kind == K_Imm; } 291 bool isReg() const { return Kind == K_Reg; } 292 293 StringRef getName() const { assert(isRecord()); return Name; } 294 Record *getRecord() const { assert(isRecord()); return R; } 295 int64_t getImm() const { assert(isImm()); return Imm; } 296 Record *getRegister() const { assert(isReg()); return R; } 297 }; 298 299 /// ResultOperands - The decoded operands for the result instruction. 300 std::vector<ResultOperand> ResultOperands; 301 302 /// ResultInstOperandIndex - For each operand, this vector holds a pair of 303 /// indices to identify the corresponding operand in the result 304 /// instruction. The first index specifies the operand and the second 305 /// index specifies the suboperand. If there are no suboperands or if all 306 /// of them are matched by the operand, the second value should be -1. 307 std::vector<std::pair<unsigned, int> > ResultInstOperandIndex; 308 309 CodeGenInstAlias(Record *R, CodeGenTarget &T); 310 311 bool tryAliasOpMatch(DagInit *Result, unsigned AliasOpNo, 312 Record *InstOpRec, bool hasSubOps, SMLoc Loc, 313 CodeGenTarget &T, ResultOperand &ResOp); 314 }; 315 } 316 317 #endif 318