1 //===- CodeEmitterGen.cpp - Code Emitter Generator ------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9 //
10 // CodeEmitterGen uses the descriptions of instructions and their fields to
11 // construct an automated code emitter: a function that, given a MachineInstr,
12 // returns the (currently, 32-bit unsigned) value of the instruction.
13 //
14 //===----------------------------------------------------------------------===//
15 
16 #include "CodeEmitterGen.h"
17 #include "CodeGenTarget.h"
18 #include "Record.h"
19 #include "llvm/ADT/StringExtras.h"
20 #include "llvm/Support/Debug.h"
21 using namespace llvm;
22 
23 void CodeEmitterGen::reverseBits(std::vector<Record*> &Insts) {
24   for (std::vector<Record*>::iterator I = Insts.begin(), E = Insts.end();
25        I != E; ++I) {
26     Record *R = *I;
27     if (R->getValueAsString("Namespace") == "TargetOpcode")
28       continue;
29 
30     BitsInit *BI = R->getValueAsBitsInit("Inst");
31 
32     unsigned numBits = BI->getNumBits();
33     BitsInit *NewBI = new BitsInit(numBits);
34     for (unsigned bit = 0, end = numBits / 2; bit != end; ++bit) {
35       unsigned bitSwapIdx = numBits - bit - 1;
36       Init *OrigBit = BI->getBit(bit);
37       Init *BitSwap = BI->getBit(bitSwapIdx);
38       NewBI->setBit(bit, BitSwap);
39       NewBI->setBit(bitSwapIdx, OrigBit);
40     }
41     if (numBits % 2) {
42       unsigned middle = (numBits + 1) / 2;
43       NewBI->setBit(middle, BI->getBit(middle));
44     }
45 
46     // Update the bits in reversed order so that emitInstrOpBits will get the
47     // correct endianness.
48     R->getValue("Inst")->setValue(NewBI);
49   }
50 }
51 
52 
53 // If the VarBitInit at position 'bit' matches the specified variable then
54 // return the variable bit position.  Otherwise return -1.
55 int CodeEmitterGen::getVariableBit(const std::string &VarName,
56             BitsInit *BI, int bit) {
57   if (VarBitInit *VBI = dynamic_cast<VarBitInit*>(BI->getBit(bit))) {
58     TypedInit *TI = VBI->getVariable();
59 
60     if (VarInit *VI = dynamic_cast<VarInit*>(TI)) {
61       if (VI->getName() == VarName) return VBI->getBitNum();
62     }
63   }
64 
65   return -1;
66 }
67 
68 
69 void CodeEmitterGen::run(raw_ostream &o) {
70   CodeGenTarget Target;
71   std::vector<Record*> Insts = Records.getAllDerivedDefinitions("Instruction");
72 
73   // For little-endian instruction bit encodings, reverse the bit order
74   if (Target.isLittleEndianEncoding()) reverseBits(Insts);
75 
76   EmitSourceFileHeader("Machine Code Emitter", o);
77   std::string Namespace = Insts[0]->getValueAsString("Namespace") + "::";
78 
79   const std::vector<const CodeGenInstruction*> &NumberedInstructions =
80     Target.getInstructionsByEnumValue();
81 
82   // Emit function declaration
83   o << "unsigned " << Target.getName() << "CodeEmitter::"
84     << "getBinaryCodeForInstr(const MachineInstr &MI) const {\n";
85 
86   // Emit instruction base values
87   o << "  static const unsigned InstBits[] = {\n";
88   for (std::vector<const CodeGenInstruction*>::const_iterator
89           IN = NumberedInstructions.begin(),
90           EN = NumberedInstructions.end();
91        IN != EN; ++IN) {
92     const CodeGenInstruction *CGI = *IN;
93     Record *R = CGI->TheDef;
94 
95     if (R->getValueAsString("Namespace") == "TargetOpcode") {
96       o << "    0U,\n";
97       continue;
98     }
99 
100     BitsInit *BI = R->getValueAsBitsInit("Inst");
101 
102     // Start by filling in fixed values...
103     unsigned Value = 0;
104     for (unsigned i = 0, e = BI->getNumBits(); i != e; ++i) {
105       if (BitInit *B = dynamic_cast<BitInit*>(BI->getBit(e-i-1))) {
106         Value |= B->getValue() << (e-i-1);
107       }
108     }
109     o << "    " << Value << "U," << '\t' << "// " << R->getName() << "\n";
110   }
111   o << "    0U\n  };\n";
112 
113   // Map to accumulate all the cases.
114   std::map<std::string, std::vector<std::string> > CaseMap;
115 
116   // Construct all cases statement for each opcode
117   for (std::vector<Record*>::iterator IC = Insts.begin(), EC = Insts.end();
118         IC != EC; ++IC) {
119     Record *R = *IC;
120     if (R->getValueAsString("Namespace") == "TargetOpcode")
121       continue;
122     const std::string &InstName = R->getName();
123     std::string Case("");
124 
125     BitsInit *BI = R->getValueAsBitsInit("Inst");
126     const std::vector<RecordVal> &Vals = R->getValues();
127     CodeGenInstruction &CGI = Target.getInstruction(R);
128 
129     // Loop over all of the fields in the instruction, determining which are the
130     // operands to the instruction.
131     unsigned NumberedOp = 0;
132     for (unsigned i = 0, e = Vals.size(); i != e; ++i) {
133       if (!Vals[i].getPrefix() && !Vals[i].getValue()->isComplete()) {
134         // Is the operand continuous? If so, we can just mask and OR it in
135         // instead of doing it bit-by-bit, saving a lot in runtime cost.
136         const std::string &VarName = Vals[i].getName();
137         bool gotOp = false;
138 
139         for (int bit = BI->getNumBits()-1; bit >= 0; ) {
140           int varBit = getVariableBit(VarName, BI, bit);
141 
142           if (varBit == -1) {
143             --bit;
144           } else {
145             int beginInstBit = bit;
146             int beginVarBit = varBit;
147             int N = 1;
148 
149             for (--bit; bit >= 0;) {
150               varBit = getVariableBit(VarName, BI, bit);
151               if (varBit == -1 || varBit != (beginVarBit - N)) break;
152               ++N;
153               --bit;
154             }
155 
156             if (!gotOp) {
157               // If the operand matches by name, reference according to that
158               // operand number. Non-matching operands are assumed to be in
159               // order.
160               unsigned OpIdx;
161               if (CGI.hasOperandNamed(VarName, OpIdx)) {
162                 // Get the machine operand number for the indicated operand.
163                 OpIdx = CGI.OperandList[OpIdx].MIOperandNo;
164                 assert (!CGI.isFlatOperandNotEmitted(OpIdx) &&
165                         "Explicitly used operand also marked as not emitted!");
166               } else {
167                 /// If this operand is not supposed to be emitted by the
168                 /// generated emitter, skip it.
169                 while (CGI.isFlatOperandNotEmitted(NumberedOp))
170                   ++NumberedOp;
171                 OpIdx = NumberedOp++;
172               }
173               std::pair<unsigned, unsigned> SO = CGI.getSubOperandNumber(OpIdx);
174               std::string &EncoderMethodName =
175                 CGI.OperandList[SO.first].EncoderMethodName;
176 
177               // If the source operand has a custom encoder, use it. This will
178               // get the encoding for all of the suboperands.
179               if (!EncoderMethodName.empty()) {
180                 // A custom encoder has all of the information for the
181                 // sub-operands, if there are more than one, so only
182                 // query the encoder once per source operand.
183                 if (SO.second == 0) {
184                   Case += "      // op: " + VarName + "\n"
185                        + "      op = " + EncoderMethodName + "(MI, "
186                        + utostr(OpIdx) + ");\n";
187                 }
188               } else {
189                 Case += "      // op: " + VarName + "\n"
190                      +  "      op = getMachineOpValue(MI, MI.getOperand("
191                      +  utostr(OpIdx) + "));\n";
192               }
193               gotOp = true;
194             }
195 
196             unsigned opMask = ~0U >> (32-N);
197             int opShift = beginVarBit - N + 1;
198             opMask <<= opShift;
199             opShift = beginInstBit - beginVarBit;
200 
201             if (opShift > 0) {
202               Case += "      Value |= (op & " + utostr(opMask) + "U) << "
203                    +  itostr(opShift) + ";\n";
204             } else if (opShift < 0) {
205               Case += "      Value |= (op & " + utostr(opMask) + "U) >> "
206                    +  itostr(-opShift) + ";\n";
207             } else {
208               Case += "      Value |= op & " + utostr(opMask) + "U;\n";
209             }
210           }
211         }
212       }
213     }
214 
215     std::vector<std::string> &InstList = CaseMap[Case];
216     InstList.push_back(InstName);
217   }
218 
219 
220   // Emit initial function code
221   o << "  const unsigned opcode = MI.getOpcode();\n"
222     << "  unsigned Value = InstBits[opcode];\n"
223     << "  unsigned op = 0;\n"
224     << "  op = op;  // suppress warning\n"
225     << "  switch (opcode) {\n";
226 
227   // Emit each case statement
228   std::map<std::string, std::vector<std::string> >::iterator IE, EE;
229   for (IE = CaseMap.begin(), EE = CaseMap.end(); IE != EE; ++IE) {
230     const std::string &Case = IE->first;
231     std::vector<std::string> &InstList = IE->second;
232 
233     for (int i = 0, N = InstList.size(); i < N; i++) {
234       if (i) o << "\n";
235       o << "    case " << Namespace << InstList[i]  << ":";
236     }
237     o << " {\n";
238     o << Case;
239     o << "      break;\n"
240       << "    }\n";
241   }
242 
243   // Default case: unhandled opcode
244   o << "  default:\n"
245     << "    std::string msg;\n"
246     << "    raw_string_ostream Msg(msg);\n"
247     << "    Msg << \"Not supported instr: \" << MI;\n"
248     << "    report_fatal_error(Msg.str());\n"
249     << "  }\n"
250     << "  return Value;\n"
251     << "}\n\n";
252 }
253