1 //===- llvm/unittests/Target/AMDGPU/ExecMayBeModifiedBeforeAnyUse.cpp -----===// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 9 #include "AMDGPUSubtarget.h" 10 #include "AMDGPUTargetMachine.h" 11 #include "llvm/CodeGen/MachineModuleInfo.h" 12 #include "llvm/CodeGen/TargetSubtargetInfo.h" 13 #include "llvm/MC/MCTargetOptions.h" 14 #include "llvm/Support/TargetRegistry.h" 15 #include "llvm/Support/TargetSelect.h" 16 #include "llvm/Target/TargetMachine.h" 17 #include "gtest/gtest.h" 18 #include <thread> 19 20 using namespace llvm; 21 22 // implementation is in the llvm/unittests/Target/AMDGPU/DwarfRegMappings.cpp 23 std::unique_ptr<const GCNTargetMachine> 24 createTargetMachine(std::string TStr, StringRef CPU, StringRef FS); 25 26 TEST(AMDGPUExecMayBeModifiedBeforeAnyUse, TheTest) { 27 auto TM = createTargetMachine("amdgcn-amd-", "gfx906", ""); 28 if (!TM) 29 return; 30 31 GCNSubtarget ST(TM->getTargetTriple(), std::string(TM->getTargetCPU()), 32 std::string(TM->getTargetFeatureString()), *TM); 33 34 LLVMContext Ctx; 35 Module Mod("Module", Ctx); 36 Mod.setDataLayout(TM->createDataLayout()); 37 38 auto *Type = FunctionType::get(Type::getVoidTy(Ctx), false); 39 auto *F = Function::Create(Type, GlobalValue::ExternalLinkage, "Test", &Mod); 40 41 MachineModuleInfo MMI(TM.get()); 42 auto MF = std::make_unique<MachineFunction>(*F, *TM, ST, 42, MMI); 43 auto *BB = MF->CreateMachineBasicBlock(); 44 MF->push_back(BB); 45 46 auto E = BB->end(); 47 DebugLoc DL; 48 const auto &TII = *ST.getInstrInfo(); 49 auto &MRI = MF->getRegInfo(); 50 51 // create machine IR 52 Register R = MRI.createVirtualRegister(&AMDGPU::SReg_32RegClass); 53 54 MachineInstr *DefMI = 55 BuildMI(*BB, E, DL, TII.get(AMDGPU::S_MOV_B32), R).addImm(42).getInstr(); 56 57 auto First = 58 BuildMI(*BB, E, DL, TII.get(AMDGPU::S_NOP)).addReg(R, RegState::Implicit); 59 60 BuildMI(*BB, E, DL, TII.get(AMDGPU::S_NOP)).addReg(R, RegState::Implicit); 61 62 // this violates the continuous sequence of R's uses for the first S_NOP 63 First.addReg(R, RegState::Implicit); 64 65 #ifdef DEBUG_THIS_TEST 66 MF->dump(); 67 MRI.dumpUses(R); 68 #endif 69 70 // make sure execMayBeModifiedBeforeAnyUse doesn't crash 71 ASSERT_FALSE(execMayBeModifiedBeforeAnyUse(MRI, R, *DefMI)); 72 } 73